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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-61-g700cdbfac

From: openocd-gerrit <ope...@us...> - 2023-02-03 22:46:20

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commit 700cdbfac41014d9f3a9c12cbb13f01e59fb53d8
Author: Antonio Borneo <bor...@gm...>
Date:   Mon Dec 19 13:27:10 2022 +0100

    target: arc: rewrite command 'arc jtag get-aux-reg' as COMMAND_HANDLER
    
    This also fixes an incorrect return ERROR_OK from a jim command.
    
    Change-Id: I3c51355e7e05965327ce819a3114e370f2de5249
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7407
    Tested-by: jenkins
    Reviewed-by: Evgeniy Didin <di...@sy...>

diff --git a/src/target/arc_cmd.c b/src/target/arc_cmd.c
index 7a8004678..56eb0ec2d 100644
--- a/src/target/arc_cmd.c
+++ b/src/target/arc_cmd.c
@@ -318,39 +318,28 @@ static int jim_arc_set_aux_reg(Jim_Interp *interp, int argc, Jim_Obj * const *ar
 	return ERROR_OK;
 }
 
-static int jim_arc_get_aux_reg(Jim_Interp *interp, int argc, Jim_Obj * const *argv)
+COMMAND_HANDLER(arc_handle_get_aux_reg)
 {
-	struct command_context *context;
-	struct target *target;
-	uint32_t regnum;
-	uint32_t value;
-
-	struct jim_getopt_info goi;
-	JIM_CHECK_RETVAL(jim_getopt_setup(&goi, interp, argc-1, argv+1));
-
-	if (goi.argc != 1) {
-		Jim_SetResultFormatted(goi.interp,
-			"usage: %s <aux_reg_num>", Jim_GetString(argv[0], NULL));
-		return JIM_ERR;
-	}
-
-	context = current_command_context(interp);
-	assert(context);
+	if (CMD_ARGC != 1)
+		return ERROR_COMMAND_SYNTAX_ERROR;
 
-	target = get_current_target(context);
+	struct target *target = get_current_target(CMD_CTX);
 	if (!target) {
-		Jim_SetResultFormatted(goi.interp, "No current target");
-		return JIM_ERR;
+		command_print(CMD, "No current target");
+		return ERROR_FAIL;
 	}
 
 	/* Register number */
-	JIM_CHECK_RETVAL(arc_cmd_jim_get_uint32(&goi, &regnum));
+	uint32_t regnum;
+	COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], regnum);
 
 	struct arc_common *arc = target_to_arc(target);
 	assert(arc);
 
+	uint32_t value;
 	CHECK_RETVAL(arc_jtag_read_aux_reg_one(&arc->jtag_info, regnum, &value));
-	Jim_SetResultInt(interp, value);
+
+	command_print(CMD, "0x%" PRIx32, value);
 
 	return ERROR_OK;
 }
@@ -445,7 +434,7 @@ static int jim_arc_set_core_reg(Jim_Interp *interp, int argc, Jim_Obj * const *a
 static const struct command_registration arc_jtag_command_group[] = {
 	{
 		.name = "get-aux-reg",
-		.jim_handler = jim_arc_get_aux_reg,
+		.handler = arc_handle_get_aux_reg,
 		.mode = COMMAND_EXEC,
 		.help = "Get AUX register by number. This command does a "
 			"raw JTAG request that bypasses OpenOCD register cache "

-----------------------------------------------------------------------

Summary of changes:
 src/target/arc_cmd.c | 35 ++++++++++++-----------------------
 1 file changed, 12 insertions(+), 23 deletions(-)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-60-g9d97cace0

From: openocd-gerrit <ope...@us...> - 2023-02-03 22:45:55

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commit 9d97cace0e95437137e3c57e40347dfcce39ebc9
Author: Daniel Serpell <dan...@gm...>
Date:   Tue Jan 24 23:54:43 2023 -0300

    flash/nor/spi: Add some zbit flash chips.
    
    I have a RP2020 board from aliexpress that uses the ZB25VQ32 flash, this
    allows openocd to correctly identify it with the full flash size.
    
    I also added other models, the datasheets can be found at:
    
    Link: https://datasheet.lcsc.com/lcsc/2203210916_Zbit-Semi-ZB25VQ16ASIG_C2982491.pdf
    Link: https://datasheet.lcsc.com/lcsc/2003141132_Zbit-Semi-ZB25VQ32BSIG_C495744.pdf
    Link: https://datasheet.lcsc.com/lcsc/2003141132_Zbit-Semi-ZB25VQ64ASIG_C495745.pdf
    Link: https://datasheet.lcsc.com/lcsc/2006151421_Zbit-Semi-ZB25VQ128ASIG_C609616.pdf
    
    As noted by Andreas Bolsch, the devices supporting QSPI have different
    ID in QPI mode than SPI, so two entries are needed in the table for each
    one.
    
    Use 0x0B as qread command, as this does not need the dummy M7-0
    parameters.
    
    Signed-off-by: Daniel Serpell <dan...@gm...>
    Change-Id: Id99187b1963b02ac1a786b66bb352f5f48ed0ac2
    Reviewed-on: https://review.openocd.org/c/openocd/+/7445
    Reviewed-by: Andreas Bolsch <hyp...@gm...>
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/src/flash/nor/spi.c b/src/flash/nor/spi.c
index 373a9a144..9a606d545 100644
--- a/src/flash/nor/spi.c
+++ b/src/flash/nor/spi.c
@@ -112,6 +112,13 @@ const struct flash_device flash_devices[] = {
 	FLASH_ID("gd gd25q128c",        0x03, 0xeb, 0x02, 0xd8, 0xc7, 0x001840c8, 0x100, 0x10000, 0x1000000),
 	FLASH_ID("gd gd25q256c",        0x13, 0x00, 0x12, 0xdc, 0xc7, 0x001940c8, 0x100, 0x10000, 0x2000000),
 	FLASH_ID("gd gd25q512mc",       0x13, 0x00, 0x12, 0xdc, 0xc7, 0x002040c8, 0x100, 0x10000, 0x4000000),
+	FLASH_ID("zbit zb25vq16",       0x03, 0x00, 0x02, 0xd8, 0xc7, 0x0015605e, 0x100, 0x10000, 0x200000),
+	FLASH_ID("zbit zb25vq32",       0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0016405e, 0x100, 0x10000, 0x400000),
+	FLASH_ID("zbit zb25vq32",       0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0016605e, 0x100, 0x10000, 0x400000), /* QPI mode */
+	FLASH_ID("zbit zb25vq64",       0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0017405e, 0x100, 0x10000, 0x800000),
+	FLASH_ID("zbit zb25vq64",       0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0017605e, 0x100, 0x10000, 0x800000), /* QPI mode */
+	FLASH_ID("zbit zb25vq128",      0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0018405e, 0x100, 0x10000, 0x1000000),
+	FLASH_ID("zbit zb25vq128",      0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0018605e, 0x100, 0x10000, 0x1000000), /* QPI mode */
 	FLASH_ID("issi is25lq040b",     0x03, 0xeb, 0x02, 0x20, 0xc7, 0x0013409d, 0x100, 0x1000,  0x80000),
 	FLASH_ID("issi is25lp032",      0x03, 0x00, 0x02, 0xd8, 0xc7, 0x0016609d, 0x100, 0x10000, 0x400000),
 	FLASH_ID("issi is25lp064",      0x03, 0x00, 0x02, 0xd8, 0xc7, 0x0017609d, 0x100, 0x10000, 0x800000),

-----------------------------------------------------------------------

Summary of changes:
 src/flash/nor/spi.c | 7 +++++++
 1 file changed, 7 insertions(+)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-59-g0b6f53e94

From: openocd-gerrit <ope...@us...> - 2023-01-28 15:57:53

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- Log -----------------------------------------------------------------
commit 0b6f53e94cd81ee9c85ddc122004fa403b9cc454
Author: Tomas Vanek <va...@fb...>
Date:   Sun Oct 2 14:46:11 2022 +0200

    tcl/target: add rescue mode to RP2040 config
    
    Integrate a rescue mode inspired by [1].
    
    The current OpenOCD must be restarted before normal work with the RP2040
    because the rescue debug port must not be activated (or the target
    is reset every 'dap init'). To continue without restarting OpenOCD
    we would need to switch off the configured rescue dap.
    
    Change-Id: Ia05b960f06747063550c166e461939d92e232830
    Link: [1] https://github.com/raspberrypi/openocd/blob/rp2040/tcl/target/rp2040-rescue.cfg
    Signed-off-by: Tomas Vanek <va...@fb...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7327
    Reviewed-by: Jonathan Bell <jon...@ra...>
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/tcl/target/rp2040.cfg b/tcl/target/rp2040.cfg
index 0593e03ba..de76b4e29 100644
--- a/tcl/target/rp2040.cfg
+++ b/tcl/target/rp2040.cfg
@@ -26,6 +26,13 @@ if { [info exists CPUTAPID] } {
 	set _CPUTAPID 0x01002927
 }
 
+# Set to '1' to start rescue mode
+if { [info exists RESCUE] } {
+	set _RESCUE $RESCUE
+} else {
+	set _RESCUE 0
+}
+
 # Set to '0' or '1' for single core configuration, 'SMP' for -rtos hwthread
 # handling of both cores, anything else for isolated debugging of both cores
 if { [info exists USE_CORE] } {
@@ -37,6 +44,29 @@ set _BOTH_CORES [expr { $_USE_CORE != 0 && $_USE_CORE != 1 }]
 
 swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
 
+# The rescue debug port uses the DP CTRL/STAT bit DBGPWRUPREQ to reset the
+# PSM (power on state machine) of the RP2040 with a flag set in the
+# VREG_AND_POR_CHIP_RESET register. Once the reset is released
+# (by clearing the DBGPWRUPREQ flag), the bootrom will run, see this flag,
+# and halt. Allowing the user to load some fresh code, rather than loading
+# the potentially broken code stored in flash
+if { $_RESCUE } {
+	dap create $_CHIPNAME.rescue_dap -chain-position $_CHIPNAME.cpu -dp-id $_CPUTAPID -instance-id 0xf -ignore-syspwrupack
+	init
+
+	# Clear DBGPWRUPREQ
+	$_CHIPNAME.rescue_dap dpreg 0x4 0x00000000
+
+	# Verifying CTRL/STAT is 0
+	set _CTRLSTAT [$_CHIPNAME.rescue_dap dpreg 0x4]
+	if {[expr {$_CTRLSTAT & 0xf0000000}]} {
+		echo "Rescue failed, DP CTRL/STAT readback $_CTRLSTAT"
+	} else {
+		echo "Now restart OpenOCD without RESCUE flag and load code to RP2040"
+	}
+	shutdown
+}
+
 # core 0
 if { $_USE_CORE != 1 } {
 	dap create $_CHIPNAME.dap0 -chain-position $_CHIPNAME.cpu -dp-id $_CPUTAPID -instance-id 0

-----------------------------------------------------------------------

Summary of changes:
 tcl/target/rp2040.cfg | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-58-g4423e05d9

From: openocd-gerrit <ope...@us...> - 2023-01-28 15:57:24

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The branch, master has been updated
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- Log -----------------------------------------------------------------
commit 4423e05d9df8803e2311e70d5a2ffc55a92e5676
Author: Tomas Vanek <va...@fb...>
Date:   Mon Nov 28 10:54:48 2022 +0100

    jtag/drivers/jlink: allow SWD multidrop
    
    SW-DPv2 and SWJ-DPv2 devices do not reply to DP_TARGETSEL write cmd.
    
    Ignore the received ACK after TARGETSEL write.
    
    While on it, use swd_ack_to_error_code() for unified error code
    translation of the received ACK value for all other commands.
    
    Signed-off-by: Tomas Vanek <va...@fb...>
    Change-Id: If978c88c8496e31581175385e59c32faebfd20aa
    Reviewed-on: https://review.openocd.org/c/openocd/+/7383
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Reviewed-by: zapb <de...@za...>

diff --git a/src/jtag/drivers/jlink.c b/src/jtag/drivers/jlink.c
index 0a96ac255..243d1a46b 100644
--- a/src/jtag/drivers/jlink.c
+++ b/src/jtag/drivers/jlink.c
@@ -1976,6 +1976,8 @@ struct pending_scan_result {
 	void *buffer;
 	/** Offset in the destination buffer */
 	unsigned buffer_offset;
+	/** SWD command */
+	uint8_t swd_cmd;
 };
 
 #define MAX_PENDING_SCAN_RESULTS 256
@@ -2179,12 +2181,13 @@ static int jlink_swd_run_queue(void)
 	}
 
 	for (i = 0; i < pending_scan_results_length; i++) {
+		/* Devices do not reply to DP_TARGETSEL write cmd, ignore received ack */
+		bool check_ack = swd_cmd_returns_ack(pending_scan_results_buffer[i].swd_cmd);
 		int ack = buf_get_u32(tdo_buffer, pending_scan_results_buffer[i].first, 3);
-
-		if (ack != SWD_ACK_OK) {
+		if (check_ack && ack != SWD_ACK_OK) {
 			LOG_DEBUG("SWD ack not OK: %d %s", ack,
 				  ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK");
-			queued_retval = ack == SWD_ACK_WAIT ? ERROR_WAIT : ERROR_FAIL;
+			queued_retval = swd_ack_to_error_code(ack);
 			goto skip;
 		} else if (pending_scan_results_buffer[i].length) {
 			uint32_t data = buf_get_u32(tdo_buffer, 3 + pending_scan_results_buffer[i].first, 32);
@@ -2221,6 +2224,7 @@ static void jlink_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data, uint3
 	if (queued_retval != ERROR_OK)
 		return;
 
+	pending_scan_results_buffer[pending_scan_results_length].swd_cmd = cmd;
 	cmd |= SWD_CMD_START | SWD_CMD_PARK;
 
 	jlink_queue_data_out(&cmd, 8);

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/jlink.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)


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From: openocd-gerrit <ope...@us...> - 2023-01-28 15:56:10

This is an automated email from the git hooks/post-receive script. It was
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The branch, master has been updated
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- Log -----------------------------------------------------------------
commit 227577ba7616ca129790090e1101b503f7b9cdb7
Author: Erhan Kurubas <erh...@es...>
Date:   Sat Jan 21 12:46:33 2023 +0100

    rtos: remove config.h includes from stackings headers
    
    And add its own header to the rtos_xxx_stackings.c
    
    Signed-off-by: Erhan Kurubas <erh...@es...>
    Change-Id: I084130fde7ee8645129a7cf60bb7bf59448e2f39
    Reviewed-on: https://review.openocd.org/c/openocd/+/7441
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/rtos/rtos_chibios_stackings.c b/src/rtos/rtos_chibios_stackings.c
index e2fe0a27f..c0816ac3c 100644
--- a/src/rtos/rtos_chibios_stackings.c
+++ b/src/rtos/rtos_chibios_stackings.c
@@ -14,6 +14,7 @@
 
 #include "rtos.h"
 #include "target/armv7m.h"
+#include "rtos_chibios_stackings.h"
 
 static const struct stack_register_offset rtos_chibios_arm_v7m_stack_offsets[ARMV7M_NUM_CORE_REGS] = {
 	{ ARMV7M_R0,   -1,   32 },		/* r0   */
diff --git a/src/rtos/rtos_chibios_stackings.h b/src/rtos/rtos_chibios_stackings.h
index 23ad44ae3..e909451e2 100644
--- a/src/rtos/rtos_chibios_stackings.h
+++ b/src/rtos/rtos_chibios_stackings.h
@@ -8,10 +8,6 @@
 #ifndef OPENOCD_RTOS_RTOS_CHIBIOS_STACKINGS_H
 #define OPENOCD_RTOS_RTOS_CHIBIOS_STACKINGS_H
 
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
 #include "rtos.h"
 
 extern const struct rtos_register_stacking rtos_chibios_arm_v7m_stacking;
diff --git a/src/rtos/rtos_ecos_stackings.c b/src/rtos/rtos_ecos_stackings.c
index 86e176507..cae271270 100644
--- a/src/rtos/rtos_ecos_stackings.c
+++ b/src/rtos/rtos_ecos_stackings.c
@@ -5,8 +5,9 @@
 #endif
 
 #include "rtos.h"
-#include "rtos_standard_stackings.h"
 #include "target/armv7m.h"
+#include "rtos_standard_stackings.h"
+#include "rtos_ecos_stackings.h"
 
 /* For Cortex-M eCos applications the actual thread context register layout can
  * be different between active threads of an application depending on whether
diff --git a/src/rtos/rtos_ecos_stackings.h b/src/rtos/rtos_ecos_stackings.h
index 0375e2d1c..a6bcf1acb 100644
--- a/src/rtos/rtos_ecos_stackings.h
+++ b/src/rtos/rtos_ecos_stackings.h
@@ -3,10 +3,6 @@
 #ifndef OPENOCD_RTOS_RTOS_ECOS_STACKINGS_H
 #define OPENOCD_RTOS_RTOS_ECOS_STACKINGS_H
 
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
 #include "rtos.h"
 
 extern const struct rtos_register_stacking rtos_ecos_cortex_m3_stacking;
diff --git a/src/rtos/rtos_embkernel_stackings.c b/src/rtos/rtos_embkernel_stackings.c
index 809b622e0..b98628a13 100644
--- a/src/rtos/rtos_embkernel_stackings.c
+++ b/src/rtos/rtos_embkernel_stackings.c
@@ -12,6 +12,7 @@
 #include "rtos.h"
 #include "target/armv7m.h"
 #include "rtos_standard_stackings.h"
+#include "rtos_embkernel_stackings.h"
 
 static const struct stack_register_offset rtos_embkernel_cortex_m_stack_offsets[ARMV7M_NUM_CORE_REGS] = {
 	{ ARMV7M_R0,   0x24, 32 },		/* r0   */
diff --git a/src/rtos/rtos_embkernel_stackings.h b/src/rtos/rtos_embkernel_stackings.h
index 972bce66d..87bd0e73b 100644
--- a/src/rtos/rtos_embkernel_stackings.h
+++ b/src/rtos/rtos_embkernel_stackings.h
@@ -8,10 +8,6 @@
 #ifndef OPENOCD_RTOS_RTOS_EMBKERNEL_STACKINGS_H
 #define OPENOCD_RTOS_RTOS_EMBKERNEL_STACKINGS_H
 
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
 #include "rtos.h"
 
 extern const struct rtos_register_stacking rtos_embkernel_cortex_m_stacking;
diff --git a/src/rtos/rtos_mqx_stackings.c b/src/rtos/rtos_mqx_stackings.c
index 8c8fd2053..5ab743bf3 100644
--- a/src/rtos/rtos_mqx_stackings.c
+++ b/src/rtos/rtos_mqx_stackings.c
@@ -11,7 +11,7 @@
 
 #include "rtos.h"
 #include "target/armv7m.h"
-
+#include "rtos_mqx_stackings.h"
 
 /*
  * standard exception stack
diff --git a/src/rtos/rtos_mqx_stackings.h b/src/rtos/rtos_mqx_stackings.h
index f86c05a40..faa741de6 100644
--- a/src/rtos/rtos_mqx_stackings.h
+++ b/src/rtos/rtos_mqx_stackings.h
@@ -8,10 +8,6 @@
 #ifndef OPENOCD_RTOS_RTOS_MQX_STACKINGS_H
 #define OPENOCD_RTOS_RTOS_MQX_STACKINGS_H
 
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
 #include "rtos.h"
 
 extern const struct rtos_register_stacking rtos_mqx_arm_v7m_stacking;
diff --git a/src/rtos/rtos_riot_stackings.c b/src/rtos/rtos_riot_stackings.c
index e717e8cfe..e46762168 100644
--- a/src/rtos/rtos_riot_stackings.c
+++ b/src/rtos/rtos_riot_stackings.c
@@ -12,6 +12,7 @@
 #include "rtos.h"
 #include "target/armv7m.h"
 #include "rtos_standard_stackings.h"
+#include "rtos_riot_stackings.h"
 
 /* This works for the M0 and M34 stackings as xPSR is in a fixed
  * location
diff --git a/src/rtos/rtos_riot_stackings.h b/src/rtos/rtos_riot_stackings.h
index 3b6c5f41c..ebd533756 100644
--- a/src/rtos/rtos_riot_stackings.h
+++ b/src/rtos/rtos_riot_stackings.h
@@ -8,14 +8,9 @@
 #ifndef OPENOCD_RTOS_RTOS_RIOT_STACKINGS_H
 #define OPENOCD_RTOS_RTOS_RIOT_STACKINGS_H
 
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
 #include "rtos.h"
 
 extern const struct rtos_register_stacking rtos_riot_cortex_m0_stacking;
 extern const struct rtos_register_stacking rtos_riot_cortex_m34_stacking;
 
 #endif	/* OPENOCD_RTOS_RTOS_RIOT_STACKINGS_H */
-
diff --git a/src/rtos/rtos_standard_stackings.c b/src/rtos/rtos_standard_stackings.c
index f83f0a1fb..5478080cf 100644
--- a/src/rtos/rtos_standard_stackings.c
+++ b/src/rtos/rtos_standard_stackings.c
@@ -11,6 +11,7 @@
 
 #include "rtos.h"
 #include "target/armv7m.h"
+#include "rtos_standard_stackings.h"
 
 static const struct stack_register_offset rtos_standard_cortex_m3_stack_offsets[ARMV7M_NUM_CORE_REGS] = {
 	{ ARMV7M_R0,   0x20, 32 },		/* r0   */
diff --git a/src/rtos/rtos_standard_stackings.h b/src/rtos/rtos_standard_stackings.h
index 2477fffd1..99fbe07e4 100644
--- a/src/rtos/rtos_standard_stackings.h
+++ b/src/rtos/rtos_standard_stackings.h
@@ -8,10 +8,6 @@
 #ifndef OPENOCD_RTOS_RTOS_STANDARD_STACKINGS_H
 #define OPENOCD_RTOS_RTOS_STANDARD_STACKINGS_H
 
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
 #include "rtos.h"
 
 extern const struct rtos_register_stacking rtos_standard_cortex_m3_stacking;
diff --git a/src/rtos/rtos_ucos_iii_stackings.c b/src/rtos/rtos_ucos_iii_stackings.c
index 9ba5288bf..f1e248231 100644
--- a/src/rtos/rtos_ucos_iii_stackings.c
+++ b/src/rtos/rtos_ucos_iii_stackings.c
@@ -9,11 +9,11 @@
 #include "config.h"
 #endif
 
-#include <helper/types.h>
-#include <rtos/rtos.h>
-#include <rtos/rtos_standard_stackings.h>
-#include <target/armv7m.h>
-#include <target/esirisc.h>
+#include "rtos.h"
+#include "target/armv7m.h"
+#include "target/esirisc.h"
+#include "rtos_standard_stackings.h"
+#include "rtos_ucos_iii_stackings.h"
 
 static const struct stack_register_offset rtos_ucos_iii_cortex_m_stack_offsets[] = {
 	{ ARMV7M_R0,   0x20, 32 },	/* r0   */
diff --git a/src/rtos/rtos_ucos_iii_stackings.h b/src/rtos/rtos_ucos_iii_stackings.h
index 831c68e1c..dfe60b27b 100644
--- a/src/rtos/rtos_ucos_iii_stackings.h
+++ b/src/rtos/rtos_ucos_iii_stackings.h
@@ -8,11 +8,7 @@
 #ifndef OPENOCD_RTOS_RTOS_UCOS_III_STACKINGS_H
 #define OPENOCD_RTOS_RTOS_UCOS_III_STACKINGS_H
 
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include <rtos/rtos.h>
+#include "rtos.h"
 
 extern const struct rtos_register_stacking rtos_ucos_iii_cortex_m_stacking;
 extern const struct rtos_register_stacking rtos_ucos_iii_esi_risc_stacking;

-----------------------------------------------------------------------

Summary of changes:
 src/rtos/rtos_chibios_stackings.c   |  1 +
 src/rtos/rtos_chibios_stackings.h   |  4 ----
 src/rtos/rtos_ecos_stackings.c      |  3 ++-
 src/rtos/rtos_ecos_stackings.h      |  4 ----
 src/rtos/rtos_embkernel_stackings.c |  1 +
 src/rtos/rtos_embkernel_stackings.h |  4 ----
 src/rtos/rtos_mqx_stackings.c       |  2 +-
 src/rtos/rtos_mqx_stackings.h       |  4 ----
 src/rtos/rtos_riot_stackings.c      |  1 +
 src/rtos/rtos_riot_stackings.h      |  5 -----
 src/rtos/rtos_standard_stackings.c  |  1 +
 src/rtos/rtos_standard_stackings.h  |  4 ----
 src/rtos/rtos_ucos_iii_stackings.c  | 10 +++++-----
 src/rtos/rtos_ucos_iii_stackings.h  |  6 +-----
 14 files changed, 13 insertions(+), 37 deletions(-)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-56-gbec6c0eb0

From: openocd-gerrit <ope...@us...> - 2023-01-28 15:55:48

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- Log -----------------------------------------------------------------
commit bec6c0eb094fb7ca1752688118f41193dc83e026
Author: Tomas Vanek <va...@fb...>
Date:   Fri Oct 14 11:16:58 2022 +0200

    tcl/interface: universal config for all Raspberry Pi models
    
    Speed calibration coeffs are computed from cpufreq/scaling_max_freq
    and from the device-tree compatibility information.
    
    Raspberry Pi linux offers /dev/gpiomem for non-root access
    to the GPIO registers since ~2016.
    Do not configure 'bcm2835gpio peripheral_base' as it is necessary
    only if /dev/mem is used - it requires running OpenOCD as root
    - it's a security risk so it should be avoided.
    
    The configuration of the GPIO connector (40-pin header)
    is factored out and ready to use in interface configuration
    for other driver (e.g. linux gpiod).
    
    Mark raspberrypi2-native.cfg as deprecated and redirect
    it to raspberrypi-native.cfg
    
    Change-Id: Icce856fb660b45374e94174da279feb51f529908
    Signed-off-by: Tomas Vanek <va...@fb...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7264
    Tested-by: jenkins
    Reviewed-by: Jonathan Bell <jon...@ra...>
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/tcl/interface/raspberrypi-native.cfg b/tcl/interface/raspberrypi-gpio-connector.cfg
similarity index 56%
copy from tcl/interface/raspberrypi-native.cfg
copy to tcl/interface/raspberrypi-gpio-connector.cfg
index 02a356350..eff73fc92 100644
--- a/tcl/interface/raspberrypi-native.cfg
+++ b/tcl/interface/raspberrypi-gpio-connector.cfg
@@ -1,35 +1,33 @@
 # SPDX-License-Identifier: GPL-2.0-or-later
 
 #
-# Config for using Raspberry Pi's expansion header
+# Config for Raspberry Pi GPIO header
 #
 # This is best used with a fast enough buffer but also
 # is suitable for direct connection if the target voltage
 # matches RPi's 3.3V and the cable is short enough.
 #
-# Do not forget the GND connection, pin 6 of the expansion header.
+# Do not forget the GND connection, e.g. pin 20 of the GPIO header.
 #
 
-adapter driver bcm2835gpio
-
-bcm2835gpio peripheral_base 0x20000000
-
-# Transition delay calculation: SPEED_COEFF/khz - SPEED_OFFSET
-# These depend on system clock, calibrated for stock 700MHz
-# bcm2835gpio speed SPEED_COEFF SPEED_OFFSET
-bcm2835gpio speed_coeffs 113714 28
+# GPIO 25 (pin 22) previously used for TMS/SWDIO is pulled-down by default.
+# The JTAG/SWD specification requires pull-up at the target board
+# for either signal. Connecting the signal pulled-up on the target
+# to the pull-down on the adapter is not a good idea.
+# GPIO 8 is pulled-up by default.
+echo "Warn : TMS/SWDIO moved to GPIO 8 (pin 24). Check the wiring please!"
 
 # Each of the JTAG lines need a gpio number set: tck tms tdi tdo
-# Header pin numbers: 23 22 19 21
+# Header pin numbers: 23 24 19 21
 adapter gpio tck -chip 0 11
-adapter gpio tms -chip 0 25
+adapter gpio tms -chip 0 8
 adapter gpio tdi -chip 0 10
 adapter gpio tdo -chip 0 9
 
 # Each of the SWD lines need a gpio number set: swclk swdio
-# Header pin numbers: 23 22
+# Header pin numbers: 23 24
 adapter gpio swclk -chip 0 11
-adapter gpio swdio -chip 0 25
+adapter gpio swdio -chip 0 8
 
 # If you define trst or srst, use appropriate reset_config
 # Header pin numbers: TRST - 26, SRST - 18
diff --git a/tcl/interface/raspberrypi-native.cfg b/tcl/interface/raspberrypi-native.cfg
index 02a356350..95426c226 100644
--- a/tcl/interface/raspberrypi-native.cfg
+++ b/tcl/interface/raspberrypi-native.cfg
@@ -1,44 +1,71 @@
 # SPDX-License-Identifier: GPL-2.0-or-later
 
-#
-# Config for using Raspberry Pi's expansion header
-#
-# This is best used with a fast enough buffer but also
-# is suitable for direct connection if the target voltage
-# matches RPi's 3.3V and the cable is short enough.
-#
-# Do not forget the GND connection, pin 6 of the expansion header.
-#
+# Config for Raspberry Pi used as a bitbang adapter.
+# https://www.raspberrypi.com/documentation/computers/raspberry-pi.html
+
+# Supports all models with 40-pin or 26-pin GPIO connector up to Raspberry Pi 4 B
+# also supports Raspberry Pi Zero, Zero W and Zero 2 W.
+
+# Adapter speed calibration is computed from cpufreq/scaling_max_freq.
+# Adjusts automatically if CPU is overclocked.
 
 adapter driver bcm2835gpio
 
-bcm2835gpio peripheral_base 0x20000000
+proc read_file { name } {
+	if {[catch {open $name r} fd]} {
+		return ""
+	}
+	set result [read $fd]
+	close $fd
+	return $result
+}
 
-# Transition delay calculation: SPEED_COEFF/khz - SPEED_OFFSET
-# These depend on system clock, calibrated for stock 700MHz
-# bcm2835gpio speed SPEED_COEFF SPEED_OFFSET
-bcm2835gpio speed_coeffs 113714 28
+proc measure_clock {} {
+	set result [exec vcgencmd measure_clock arm]
+	set clock_hz [lindex [split $result "="] 1]
+	expr { $clock_hz / 1000 }
+}
+
+proc get_max_cpu_clock { default } {
+	set clock [read_file /sys/devices/system/cpu/cpu0/cpufreq/scaling_max_freq]
+	if { $clock > 100000 } {
+		return $clock
+	}
 
-# Each of the JTAG lines need a gpio number set: tck tms tdi tdo
-# Header pin numbers: 23 22 19 21
-adapter gpio tck -chip 0 11
-adapter gpio tms -chip 0 25
-adapter gpio tdi -chip 0 10
-adapter gpio tdo -chip 0 9
+	# cpufreq not available. As the last resort try Broadcom's proprietary utility
+	if {![catch measure_clock clock] && $clock > 100000} {
+		return $clock
+	}
 
-# Each of the SWD lines need a gpio number set: swclk swdio
-# Header pin numbers: 23 22
-adapter gpio swclk -chip 0 11
-adapter gpio swdio -chip 0 25
+	echo "WARNING: Host CPU clock unknown."
+	echo "WARNING: Using the highest possible value $default kHz as a safe default."
+	echo "WARNING: Expect JTAG/SWD clock significantly slower than requested."
 
-# If you define trst or srst, use appropriate reset_config
-# Header pin numbers: TRST - 26, SRST - 18
+	return $default
+}
 
-# adapter gpio trst -chip 0 7
-# reset_config trst_only
+set compat [read_file /proc/device-tree/compatible]
+set clocks_per_timing_loop 4
 
-# adapter gpio srst -chip 0 24
-# reset_config srst_only srst_push_pull
+if {[string match *bcm2711* $compat]} {
+	set speed_offset 52
+} elseif {[string match *bcm2837* $compat] || [string match *bcm2710* $compat]} {
+	set speed_offset 34
+} elseif {[string match *bcm2836* $compat] || [string match *bcm2709* $compat]} {
+	set speed_offset 36
+} elseif {[string match *bcm2835* $compat] || [string match *bcm2708* $compat]} {
+	set clocks_per_timing_loop 6
+	set speed_offset 32
+} else {
+	set speed_offset 32
+	echo "WARNING: Unknown type of the host SoC. Expect JTAG/SWD clock slower than requested."
+}
+
+set clock [get_max_cpu_clock 2000000]
+set speed_coeff [expr { $clock / $clocks_per_timing_loop }]
+
+# Transition delay calculation: SPEED_COEFF/khz - SPEED_OFFSET
+# The coefficients depend on system clock and CPU frequency scaling.
+bcm2835gpio speed_coeffs $speed_coeff $speed_offset
 
-# or if you have both connected,
-# reset_config trst_and_srst srst_push_pull
+source raspberrypi-gpio-connector.cfg
diff --git a/tcl/interface/raspberrypi2-native.cfg b/tcl/interface/raspberrypi2-native.cfg
index d5edded0f..fe9186f23 100644
--- a/tcl/interface/raspberrypi2-native.cfg
+++ b/tcl/interface/raspberrypi2-native.cfg
@@ -1,44 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0-or-later
 
-#
-# Config for using Raspberry Pi's expansion header
-#
-# This is best used with a fast enough buffer but also
-# is suitable for direct connection if the target voltage
-# matches RPi's 3.3V and the cable is short enough.
-#
-# Do not forget the GND connection, pin 6 of the expansion header.
-#
+echo "WARNING: interface/raspberrypi2-native.cfg is deprecated."
+echo "WARNING: Please use interface/raspberrypi-native.cfg for all Raspberry Pi models."
 
-adapter driver bcm2835gpio
-
-bcm2835gpio peripheral_base 0x3F000000
-
-# Transition delay calculation: SPEED_COEFF/khz - SPEED_OFFSET
-# These depend on system clock, calibrated for scaling_max_freq 900MHz
-# bcm2835gpio speed SPEED_COEFF SPEED_OFFSET
-bcm2835gpio speed_coeffs 225000 36
-
-# Each of the JTAG lines need a gpio number set: tck tms tdi tdo
-# Header pin numbers: 23 22 19 21
-adapter gpio tck -chip 0 11
-adapter gpio tms -chip 0 25
-adapter gpio tdi -chip 0 10
-adapter gpio tdo -chip 0 9
-
-# Each of the SWD lines need a gpio number set: swclk swdio
-# Header pin numbers: 23 22
-adapter gpio swclk -chip 0 11
-adapter gpio swdio -chip 0 25
-
-# If you define trst or srst, use appropriate reset_config
-# Header pin numbers: TRST - 26, SRST - 18
-
-# adapter gpio trst -chip 0 7
-# reset_config trst_only
-
-# adapter gpio srst -chip 0 24
-# reset_config srst_only srst_push_pull
-
-# or if you have both connected,
-# reset_config trst_and_srst srst_push_pull
+source [find interface/raspberrypi-native.cfg]

-----------------------------------------------------------------------

Summary of changes:
 ...2-native.cfg => raspberrypi-gpio-connector.cfg} | 26 +++----
 tcl/interface/raspberrypi-native.cfg               | 91 ++++++++++++++--------
 tcl/interface/raspberrypi2-native.cfg              | 44 +----------
 3 files changed, 74 insertions(+), 87 deletions(-)
 copy tcl/interface/{raspberrypi2-native.cfg => raspberrypi-gpio-connector.cfg} (56%)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-55-g2dde7e914

From: openocd-gerrit <ope...@us...> - 2023-01-28 15:54:45

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       via  b4dd8dbc37daf073bf6481fdc7f0f9d7f2e96809 (commit)
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- Log -----------------------------------------------------------------
commit 2dde7e914b429ffa5bc56faa20fb474ca451412e
Author: Tomas Vanek <va...@fb...>
Date:   Thu Oct 13 22:33:12 2022 +0200

    jtag/drivers/bcm2835gpio: refactor delays to inline function
    
    No functional change, the delay is unchanged.
    
    Change-Id: I5b5e837d741ac01fc573657357c5fe61ad901319
    Signed-off-by: Tomas Vanek <va...@fb...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7262
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/jtag/drivers/bcm2835gpio.c b/src/jtag/drivers/bcm2835gpio.c
index 320baba09..635d9a5ff 100644
--- a/src/jtag/drivers/bcm2835gpio.c
+++ b/src/jtag/drivers/bcm2835gpio.c
@@ -66,6 +66,12 @@ static inline void bcm2835_gpio_synchronize(void)
 	__sync_synchronize();
 }
 
+static inline void bcm2835_delay(void)
+{
+	for (unsigned int i = 0; i < jtag_delay; i++)
+		asm volatile ("");
+}
+
 static bool is_gpio_config_valid(enum adapter_gpio_config_index idx)
 {
 	/* Only chip 0 is supported, accept unset value (-1) too */
@@ -178,8 +184,7 @@ static int bcm2835gpio_write(int tck, int tms, int tdi)
 	GPIO_CLR = clear;
 	bcm2835_gpio_synchronize();
 
-	for (unsigned int i = 0; i < jtag_delay; i++)
-		asm volatile ("");
+	bcm2835_delay();
 
 	return ERROR_OK;
 }
@@ -199,8 +204,7 @@ static int bcm2835gpio_swd_write_fast(int swclk, int swdio)
 	GPIO_CLR = clear;
 	bcm2835_gpio_synchronize();
 
-	for (unsigned int i = 0; i < jtag_delay; i++)
-		asm volatile ("");
+	bcm2835_delay();
 
 	return ERROR_OK;
 }
@@ -211,8 +215,7 @@ static int bcm2835gpio_swd_write_generic(int swclk, int swdio)
 	set_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_SWDIO], swdio);
 	set_gpio_value(&adapter_gpio_config[ADAPTER_GPIO_IDX_SWCLK], swclk); /* Write clock last */
 
-	for (unsigned int i = 0; i < jtag_delay; ++i)
-		asm volatile ("");
+	bcm2835_delay();
 
 	return ERROR_OK;
 }

commit b4dd8dbc37daf073bf6481fdc7f0f9d7f2e96809
Author: Tomas Vanek <va...@fb...>
Date:   Thu Oct 13 16:46:31 2022 +0200

    jtag/drivers/bcm2835gpio: use rounding in delay math
    
    After setting adapter speed to some values, the driver
    shows the real speed little bit higher.
    Although it does not impose a problem from technical point
    of view because the difference is smaller than usual speed error,
    it looks at least strange to the user. The documentation reads
    that real frequency should be same or lower than requested.
    
    Use proper rounding in speed -> delay and delay -> speed
    conversions.
    
    Change-Id: I1831112cc58681875548d2aeb688391fb79fa37f
    Signed-off-by: Tomas Vanek <va...@fb...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7261
    Tested-by: jenkins
    Reviewed-by: Jonathan Bell <jon...@ra...>
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/jtag/drivers/bcm2835gpio.c b/src/jtag/drivers/bcm2835gpio.c
index 5aa1a99e4..320baba09 100644
--- a/src/jtag/drivers/bcm2835gpio.c
+++ b/src/jtag/drivers/bcm2835gpio.c
@@ -264,7 +264,8 @@ static int bcm2835gpio_khz(int khz, int *jtag_speed)
 		LOG_DEBUG("BCM2835 GPIO: RCLK not supported");
 		return ERROR_FAIL;
 	}
-	*jtag_speed = speed_coeff/khz - speed_offset;
+	*jtag_speed = DIV_ROUND_UP(speed_coeff, khz) - speed_offset;
+	LOG_DEBUG("jtag_delay %d", *jtag_speed);
 	if (*jtag_speed < 0)
 		*jtag_speed = 0;
 	return ERROR_OK;
@@ -272,7 +273,9 @@ static int bcm2835gpio_khz(int khz, int *jtag_speed)
 
 static int bcm2835gpio_speed_div(int speed, int *khz)
 {
-	*khz = speed_coeff/(speed + speed_offset);
+	int divisor = speed + speed_offset;
+	/* divide with roundig to the closest */
+	*khz = (speed_coeff + divisor / 2) / divisor;
 	return ERROR_OK;
 }
 

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/bcm2835gpio.c | 22 ++++++++++++++--------
 1 file changed, 14 insertions(+), 8 deletions(-)


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- Log -----------------------------------------------------------------
commit 148bc7e2151740527b4ca67d0a7c7c9f01725981
Author: Tomas Vanek <va...@fb...>
Date:   Fri Oct 14 09:19:29 2022 +0200

    jtag/drivers/bitbang: avoid mostly harmless glitch on SWDIO
    
    bitbang_swd_exchange(rnw=true,...) calls bitbang_interface->swd_write()
    with swdio clamped to 0.
    bitbang_swd_write_reg() reads 1 turnaround bit, 3 ack bits
    and 1 turnaround by one call to bitbang_swd_exchange()
    and then switches SWDIO to output.
    AFAIK all bitbang interfaces switch SWDIO GPIO direction immediately
    in bitbang_interface->swdio_drive().
    The GPIO now drives SWDIO line to the value stored in the output register
    which is always zero from previous bitbang_swd_exchange(rnw=true,...).
    In case the following data bit (bit 0) is 1 we can observe a glitch
    on SWDIO:
                                             _____ out 1 ____
    HiZ/pull-up ----\                       /
                     \                     /
                      \______ out 0 ______/
              swdio_drive(true)   swd_write(0,1)
    
    The glitch fortunately takes place far enough from SWCLK rising edge
    where SWDIO is sampled by the target, so I believe it is harmless
    except some corner cases where the reflected wave is delayed on long
    line.
    
    Anyway keeping electrical signals glitch free is a good practice.
    To keep performance penalty minimal, pre-write the first data
    bit to SWDIO GPIO output buffer while clocking the turnaround bit.
    Following swdio_drive(true) outputs the pre-written value
    and the same value is rewritten by the next swd_write()
    instead of glitching SWDIO.
    
    Change-Id: I72ea9c0b2fae57e8ff5aa616859182c67abc924f
    Signed-off-by: Tomas Vanek <va...@fb...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7260
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/jtag/drivers/bitbang.c b/src/jtag/drivers/bitbang.c
index 2ab0a2a76..665dbf329 100644
--- a/src/jtag/drivers/bitbang.c
+++ b/src/jtag/drivers/bitbang.c
@@ -525,7 +525,19 @@ static void bitbang_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay
 		bitbang_swd_exchange(false, &cmd, 0, 8);
 
 		bitbang_interface->swdio_drive(false);
-		bitbang_swd_exchange(true, trn_ack_data_parity_trn, 0, 1 + 3 + 1);
+		bitbang_swd_exchange(true, trn_ack_data_parity_trn, 0, 1 + 3);
+
+		/* Avoid a glitch on SWDIO when changing the direction to output.
+		 * To keep performance penalty minimal, pre-write the first data
+		 * bit to SWDIO GPIO output buffer while clocking the turnaround bit.
+		 * Following swdio_drive(true) outputs the pre-written value
+		 * and the same value is rewritten by the next swd_write()
+		 * instead of glitching SWDIO
+		 * HiZ/pull-up --------------> 0 -------------> 1
+		 *           swdio_drive(true)   swd_write(0,1)
+		 * in case of data bit 0 = 1
+		 */
+		bitbang_swd_exchange(false, trn_ack_data_parity_trn, 1 + 3 + 1, 1);
 		bitbang_interface->swdio_drive(true);
 		bitbang_swd_exchange(false, trn_ack_data_parity_trn, 1 + 3 + 1, 32 + 1);
 

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/bitbang.c | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)


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From: openocd-gerrit <ope...@us...> - 2023-01-28 15:53:28

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- Log -----------------------------------------------------------------
commit 20285b91008106c9fa966cea3269c6f6a81e539a
Author: N S <nl...@ya...>
Date:   Fri Dec 23 16:59:18 2022 -0800

    jtag/drivers/openjtag: fix annoying num_cycles > 16 warning
    
    The OpenJTAG driver logs "num_cycles > 16 on run test" warning
    whenever the JTAG_RUNTEST operation cycle count is larger than 16.
    
    Instead of logging the warning and only running the first 16 TCLK
    cycles, remove the warning and queue up multiple operations of up
    to 16 cycles each.
    
    Signed-off-by: N S <nl...@ya...>
    Change-Id: Id405fa802ff1cf3db7a21e76bd6df0c2d3a0fe61
    Reviewed-on: https://review.openocd.org/c/openocd/+/7420
    Tested-by: jenkins
    Reviewed-by: Jonathan McDowell <noo...@ea...>
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/jtag/drivers/openjtag.c b/src/jtag/drivers/openjtag.c
index 6be950718..12ea46330 100644
--- a/src/jtag/drivers/openjtag.c
+++ b/src/jtag/drivers/openjtag.c
@@ -742,16 +742,18 @@ static void openjtag_execute_runtest(struct jtag_command *cmd)
 		tap_set_state(TAP_IDLE);
 	}
 
-	if (cmd->cmd.runtest->num_cycles > 16)
-		LOG_WARNING("num_cycles > 16 on run test");
-
 	if (openjtag_variant != OPENJTAG_VARIANT_CY7C65215 ||
 		cmd->cmd.runtest->num_cycles) {
 		uint8_t command;
-		command = 7;
-		command |= ((cmd->cmd.runtest->num_cycles - 1) & 0x0F) << 4;
+		int cycles = cmd->cmd.runtest->num_cycles;
 
-		openjtag_add_byte(command);
+		do {
+			command = 7;
+			command |= (((cycles > 16 ? 16 : cycles) - 1) & 0x0F) << 4;
+
+			openjtag_add_byte(command);
+			cycles -= 16;
+		} while (cycles > 0);
 	}
 
 	tap_set_end_state(end_state);

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/openjtag.c | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)


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From: openocd-gerrit <ope...@us...> - 2023-01-28 15:52:56

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- Log -----------------------------------------------------------------
commit d032e7ec8c2978feda5df2ca7c4ddbcaec2fcbf5
Author: Andreas Fritiofson <and...@gm...>
Date:   Mon Nov 8 19:35:27 2021 +0100

    rtos: Fix constness of struct rtos_type
    
    Change-Id: Iaa89f2ff4036c23f944ffb4f37fe0c7afaf5069b
    Signed-off-by: Andreas Fritiofson <and...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/6680
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/rtos/FreeRTOS.c b/src/rtos/FreeRTOS.c
index 945c4b875..070275f2c 100644
--- a/src/rtos/FreeRTOS.c
+++ b/src/rtos/FreeRTOS.c
@@ -80,7 +80,7 @@ static int freertos_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
 		struct rtos_reg **reg_list, int *num_regs);
 static int freertos_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]);
 
-struct rtos_type freertos_rtos = {
+const struct rtos_type freertos_rtos = {
 	.name = "FreeRTOS",
 
 	.detect_rtos = freertos_detect_rtos,
diff --git a/src/rtos/chibios.c b/src/rtos/chibios.c
index 8319cc883..68fe8a14c 100644
--- a/src/rtos/chibios.c
+++ b/src/rtos/chibios.c
@@ -97,7 +97,7 @@ static int chibios_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
 		struct rtos_reg **reg_list, int *num_regs);
 static int chibios_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]);
 
-struct rtos_type chibios_rtos = {
+const struct rtos_type chibios_rtos = {
 	.name = "chibios",
 
 	.detect_rtos = chibios_detect_rtos,
diff --git a/src/rtos/embKernel.c b/src/rtos/embKernel.c
index c1b5723fc..a03b039e0 100644
--- a/src/rtos/embKernel.c
+++ b/src/rtos/embKernel.c
@@ -27,7 +27,7 @@ static int embkernel_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
 		struct rtos_reg **reg_list, int *num_regs);
 static int embkernel_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]);
 
-struct rtos_type embkernel_rtos = {
+const struct rtos_type embkernel_rtos = {
 		.name = "embKernel",
 		.detect_rtos = embkernel_detect_rtos,
 		.create = embkernel_create,
diff --git a/src/rtos/mqx.c b/src/rtos/mqx.c
index 8d483ed3b..d9b694282 100644
--- a/src/rtos/mqx.c
+++ b/src/rtos/mqx.c
@@ -498,7 +498,7 @@ static int mqx_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]
 	return ERROR_OK;
 }
 
-struct rtos_type mqx_rtos = {
+const struct rtos_type mqx_rtos = {
 	.name = "mqx",
 	.detect_rtos = mqx_detect_rtos,
 	.create = mqx_create,
diff --git a/src/rtos/nuttx.c b/src/rtos/nuttx.c
index 993ff84bd..78271181e 100644
--- a/src/rtos/nuttx.c
+++ b/src/rtos/nuttx.c
@@ -324,7 +324,7 @@ static int nuttx_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list
 	return 0;
 }
 
-struct rtos_type nuttx_rtos = {
+const struct rtos_type nuttx_rtos = {
 	.name = "nuttx",
 	.detect_rtos = nuttx_detect_rtos,
 	.create = nuttx_create,
diff --git a/src/rtos/rtos.c b/src/rtos/rtos.c
index bcd556a7b..f1e8956a3 100644
--- a/src/rtos/rtos.c
+++ b/src/rtos/rtos.c
@@ -16,22 +16,22 @@
 #include "server/gdb_server.h"
 
 /* RTOSs */
-extern struct rtos_type freertos_rtos;
-extern struct rtos_type threadx_rtos;
-extern struct rtos_type ecos_rtos;
-extern struct rtos_type linux_rtos;
-extern struct rtos_type chibios_rtos;
-extern struct rtos_type chromium_ec_rtos;
-extern struct rtos_type embkernel_rtos;
-extern struct rtos_type mqx_rtos;
-extern struct rtos_type ucos_iii_rtos;
-extern struct rtos_type nuttx_rtos;
-extern struct rtos_type hwthread_rtos;
-extern struct rtos_type riot_rtos;
-extern struct rtos_type zephyr_rtos;
-extern struct rtos_type rtkernel_rtos;
-
-static struct rtos_type *rtos_types[] = {
+extern const struct rtos_type freertos_rtos;
+extern const struct rtos_type threadx_rtos;
+extern const struct rtos_type ecos_rtos;
+extern const struct rtos_type linux_rtos;
+extern const struct rtos_type chibios_rtos;
+extern const struct rtos_type chromium_ec_rtos;
+extern const struct rtos_type embkernel_rtos;
+extern const struct rtos_type mqx_rtos;
+extern const struct rtos_type ucos_iii_rtos;
+extern const struct rtos_type nuttx_rtos;
+extern const struct rtos_type hwthread_rtos;
+extern const struct rtos_type riot_rtos;
+extern const struct rtos_type zephyr_rtos;
+extern const struct rtos_type rtkernel_rtos;
+
+static const struct rtos_type *rtos_types[] = {
 	&threadx_rtos,
 	&freertos_rtos,
 	&ecos_rtos,
@@ -70,7 +70,7 @@ static int rtos_target_for_threadid(struct connection *connection, int64_t threa
 	return ERROR_OK;
 }
 
-static int os_alloc(struct target *target, struct rtos_type *ostype)
+static int os_alloc(struct target *target, const struct rtos_type *ostype)
 {
 	struct rtos *os = target->rtos = calloc(1, sizeof(struct rtos));
 
@@ -100,7 +100,7 @@ static void os_free(struct target *target)
 	target->rtos = NULL;
 }
 
-static int os_alloc_create(struct target *target, struct rtos_type *ostype)
+static int os_alloc_create(struct target *target, const struct rtos_type *ostype)
 {
 	int ret = os_alloc(target, ostype);
 
@@ -683,7 +683,7 @@ int rtos_generic_stack_read(struct target *target,
 static int rtos_try_next(struct target *target)
 {
 	struct rtos *os = target->rtos;
-	struct rtos_type **type = rtos_types;
+	const struct rtos_type **type = rtos_types;
 
 	if (!os)
 		return 0;
diff --git a/src/rtos/zephyr.c b/src/rtos/zephyr.c
index b00b4b341..934a8dd1c 100644
--- a/src/rtos/zephyr.c
+++ b/src/rtos/zephyr.c
@@ -785,7 +785,7 @@ static int zephyr_get_symbol_list_to_lookup(struct symbol_table_elem **symbol_li
 	return ERROR_OK;
 }
 
-struct rtos_type zephyr_rtos = {
+const struct rtos_type zephyr_rtos = {
 	.name = "Zephyr",
 
 	.detect_rtos = zephyr_detect_rtos,

-----------------------------------------------------------------------

Summary of changes:
 src/rtos/FreeRTOS.c  |  2 +-
 src/rtos/chibios.c   |  2 +-
 src/rtos/embKernel.c |  2 +-
 src/rtos/mqx.c       |  2 +-
 src/rtos/nuttx.c     |  2 +-
 src/rtos/rtos.c      | 38 +++++++++++++++++++-------------------
 src/rtos/zephyr.c    |  2 +-
 7 files changed, 25 insertions(+), 25 deletions(-)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-50-g43c8aa28c

From: openocd-gerrit <ope...@us...> - 2023-01-28 15:52:36

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- Log -----------------------------------------------------------------
commit 43c8aa28cb1570c11e1099c43e685af228190679
Author: Andreas Fritiofson <and...@gm...>
Date:   Fri Apr 15 12:38:43 2016 +0200

    rtos: Support rt-kernel
    
    Works for the proprietary rt-kernel from rt-labs.
    
    See: https://rt-labs.com/product/rt-kernel/
    Change-Id: Id2c2e292c15fb17eab25e3d07db05014daa2a2b0
    Signed-off-by: Andreas Fritiofson <and...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/6668
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/doc/openocd.texi b/doc/openocd.texi
index b9ad3ff77..6c853f2ce 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -5000,7 +5000,7 @@ The value should normally correspond to a static mapping for the
 @var{rtos_type} can be one of @option{auto}, @option{none}, @option{eCos},
 @option{ThreadX}, @option{FreeRTOS}, @option{linux}, @option{ChibiOS},
 @option{embKernel}, @option{mqx}, @option{uCOS-III}, @option{nuttx},
-@option{RIOT}, @option{Zephyr}
+@option{RIOT}, @option{Zephyr}, @option{rtkernel}
 @xref{gdbrtossupport,,RTOS Support}.
 
 @item @code{-defer-examine} -- skip target examination at initial JTAG chain
@@ -11867,6 +11867,7 @@ Currently supported rtos's include:
 @item @option{RIOT}
 @item @option{hwthread} (This is not an actual RTOS. @xref{usingopenocdsmpwithgdb,,Using OpenOCD SMP with GDB}.)
 @item @option{Zephyr}
+@item @option{rtkernel}
 @end itemize
 
 At any time, it's possible to drop the selected RTOS using:
@@ -11908,6 +11909,8 @@ _tcb_name_offset.
 @end raggedright
 @item Zephyr symbols
 _kernel, _kernel_openocd_offsets, _kernel_openocd_size_t_size
+@item rtkernel symbols
+Multiple struct offsets.
 @end table
 
 For most RTOS supported the above symbols will be exported by default. However for
diff --git a/src/rtos/Makefile.am b/src/rtos/Makefile.am
index fc3ab8b42..b0f7daf5f 100644
--- a/src/rtos/Makefile.am
+++ b/src/rtos/Makefile.am
@@ -21,6 +21,7 @@ noinst_LTLIBRARIES += %D%/librtos.la
 	%D%/mqx.c \
 	%D%/uCOS-III.c \
 	%D%/nuttx.c \
+	%D%/rtkernel.c \
 	%D%/hwthread.c \
 	%D%/zephyr.c \
 	%D%/riot.c \
diff --git a/src/rtos/rtkernel.c b/src/rtos/rtkernel.c
new file mode 100644
index 000000000..ba1de2517
--- /dev/null
+++ b/src/rtos/rtkernel.c
@@ -0,0 +1,384 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/***************************************************************************
+ *   Copyright (C) 2016-2023 by Andreas Fritiofson                         *
+ *   and...@gm...                                          *
+ ***************************************************************************/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <helper/time_support.h>
+#include <jtag/jtag.h>
+#include "target/target.h"
+#include "target/target_type.h"
+#include "rtos.h"
+#include "helper/log.h"
+#include "helper/types.h"
+#include "rtos_standard_stackings.h"
+#include "target/armv7m.h"
+#include "target/cortex_m.h"
+
+#define ST_DEAD     BIT(0)    /* Task is waiting to be deleted */
+#define ST_WAIT     BIT(1)    /* Task is blocked: */
+#define ST_SEM      BIT(2)    /*  on semaphore */
+#define ST_MTX      BIT(3)    /*  on mutex */
+#define ST_SIG      BIT(4)    /*  on signal */
+#define ST_DLY      BIT(5)    /*  on timer */
+#define ST_FLAG     BIT(6)    /*  on flag */
+#define ST_FLAG_ALL BIT(7)    /*  on flag and flag mode is "ALL" */
+#define ST_MBOX     BIT(8)    /*  on mailbox */
+#define ST_STP      BIT(9)    /*  self stopped */
+#define ST_SUSPEND  BIT(10)   /* Task is suspended */
+#define ST_TT       BIT(11)   /* Time triggered task */
+#define ST_TT_YIELD BIT(12)   /* Time triggered task that yields */
+#define ST_CREATE   BIT(13)   /* Task was created by task_create() */
+
+struct rtkernel_params {
+	const char *target_name;
+	const struct rtos_register_stacking *stacking_info_cm3;
+	const struct rtos_register_stacking *stacking_info_cm4f;
+	const struct rtos_register_stacking *stacking_info_cm4f_fpu;
+};
+
+static const struct rtkernel_params rtkernel_params_list[] = {
+	{
+		"cortex_m",			/* target_name */
+		&rtos_standard_cortex_m3_stacking,	/* stacking_info */
+		&rtos_standard_cortex_m4f_stacking,
+		&rtos_standard_cortex_m4f_fpu_stacking,
+	},
+	{
+		"hla_target",			/* target_name */
+		&rtos_standard_cortex_m3_stacking,	/* stacking_info */
+		&rtos_standard_cortex_m4f_stacking,
+		&rtos_standard_cortex_m4f_fpu_stacking,
+	},
+};
+
+enum rtkernel_symbol_values {
+	sym_os_state = 0,
+	sym___off_os_state2chain = 1,
+	sym___off_os_state2current = 2,
+	sym___off_task2chain = 3,
+	sym___off_task2magic = 4,
+	sym___off_task2stack = 5,
+	sym___off_task2state = 6,
+	sym___off_task2name = 7,
+	sym___val_task_magic = 8,
+};
+
+struct symbols {
+	const char *name;
+	bool optional;
+};
+
+static const struct symbols rtkernel_symbol_list[] = {
+	{ "os_state", false },
+	{ "__off_os_state2chain", false },
+	{ "__off_os_state2current", false },
+	{ "__off_task2chain", false },
+	{ "__off_task2magic", false },
+	{ "__off_task2stack", false },
+	{ "__off_task2state", false },
+	{ "__off_task2name", false },
+	{ "__val_task_magic", false },
+	{ NULL, false }
+};
+
+static void *realloc_preserve(void *ptr, size_t old_size, size_t new_size)
+{
+	void *new_ptr = malloc(new_size);
+
+	if (new_ptr) {
+		memcpy(new_ptr, ptr, MIN(old_size, new_size));
+		free(ptr);
+	}
+
+	return new_ptr;
+}
+
+static int rtkernel_add_task(struct rtos *rtos, uint32_t task, uint32_t current_task)
+{
+	int retval;
+	int new_thread_count = rtos->thread_count + 1;
+	struct thread_detail *new_thread_details = realloc_preserve(rtos->thread_details,
+			rtos->thread_count * sizeof(struct thread_detail),
+			new_thread_count * sizeof(struct thread_detail));
+	if (!new_thread_details) {
+		LOG_ERROR("Error growing memory to %d threads", new_thread_count);
+		return ERROR_FAIL;
+	}
+	rtos->thread_details = new_thread_details;
+	struct thread_detail *thread = &new_thread_details[rtos->thread_count];
+
+	*thread = (struct thread_detail){ .threadid = task, .exists = true };
+
+	/* Read the task name */
+	uint32_t name;
+	retval = target_read_u32(rtos->target, task + rtos->symbols[sym___off_task2name].address, &name);
+	if (retval != ERROR_OK) {
+		LOG_ERROR("Could not read task name pointer from target");
+		return retval;
+	}
+	uint8_t tmp_str[33];
+	retval = target_read_buffer(rtos->target, name, sizeof(tmp_str) - 1, tmp_str);
+	if (retval != ERROR_OK) {
+		LOG_ERROR("Error reading task name from target");
+		return retval;
+	}
+	tmp_str[sizeof(tmp_str) - 1] = '\0';
+	LOG_DEBUG("task name at 0x%" PRIx32 ", value \"%s\"", name, tmp_str);
+
+	if (tmp_str[0] != '\0')
+		thread->thread_name_str = strdup((char *)tmp_str);
+	else
+		thread->thread_name_str = strdup("No Name");
+
+	/* Read the task state */
+	uint16_t state;
+	retval = target_read_u16(rtos->target, task + rtos->symbols[sym___off_task2state].address, &state);
+	if (retval != ERROR_OK) {
+		LOG_ERROR("Could not read task state from target");
+		return retval;
+	}
+
+	LOG_DEBUG("task state 0x%" PRIx16, state);
+
+	char state_str[64] = "";
+	if (state & ST_TT)
+		strcat(state_str, "TT|");
+	if (task == current_task) {
+		strcat(state_str, "RUN");
+	} else {
+		if (state & (ST_TT | ST_TT_YIELD))
+			strcat(state_str, "YIELD");
+		else if (state & ST_DEAD)
+			strcat(state_str, "DEAD");
+		else if (state & ST_WAIT)
+			strcat(state_str, "WAIT");
+		else if (state & ST_SUSPEND)
+			strcat(state_str, "SUSP");
+		else
+			strcat(state_str, "READY");
+	}
+	if (state & ST_SEM)
+		strcat(state_str, "|SEM");
+	if (state & ST_MTX)
+		strcat(state_str, "|MTX");
+	if (state & ST_SIG)
+		strcat(state_str, "|SIG");
+	if (state & ST_DLY)
+		strcat(state_str, "|DLY");
+	if ((state & ST_FLAG) || (state & ST_FLAG_ALL))
+		strcat(state_str, "|FLAG");
+	if (state & ST_FLAG_ALL)
+		strcat(state_str, "_ALL");
+	if (state & ST_MBOX)
+		strcat(state_str, "|MBOX");
+	if (state & ST_STP)
+		strcat(state_str, "|STP");
+
+	thread->extra_info_str = strdup(state_str);
+
+	rtos->thread_count = new_thread_count;
+	if (task == current_task)
+		rtos->current_thread = task;
+	return ERROR_OK;
+}
+
+static int rtkernel_verify_task(struct rtos *rtos, uint32_t task)
+{
+	int retval;
+	uint32_t magic;
+	retval = target_read_u32(rtos->target, task + rtos->symbols[sym___off_task2magic].address, &magic);
+	if (retval != ERROR_OK) {
+		LOG_ERROR("Could not read task magic from target");
+		return retval;
+	}
+	if (magic != rtos->symbols[sym___val_task_magic].address) {
+		LOG_ERROR("Invalid task found (magic=0x%" PRIx32 ")", magic);
+		return ERROR_FAIL;
+	}
+	return retval;
+}
+
+static int rtkernel_update_threads(struct rtos *rtos)
+{
+	/* wipe out previous thread details if any */
+	/* do this first because rtos layer does not check our retval */
+	rtos_free_threadlist(rtos);
+	rtos->current_thread = 0;
+
+	if (!rtos->symbols) {
+		LOG_ERROR("No symbols for rt-kernel");
+		return -3;
+	}
+
+	/* read the current task */
+	uint32_t current_task;
+	int retval = target_read_u32(rtos->target,
+			rtos->symbols[sym_os_state].address + rtos->symbols[sym___off_os_state2current].address,
+			&current_task);
+	if (retval != ERROR_OK) {
+		LOG_ERROR("Error reading current task");
+		return retval;
+	}
+	LOG_DEBUG("current task is 0x%" PRIx32, current_task);
+
+	retval = rtkernel_verify_task(rtos, current_task);
+	if (retval != ERROR_OK) {
+		LOG_ERROR("Current task is invalid");
+		return retval;
+	}
+
+	/* loop through kernel task list */
+	uint32_t chain = rtos->symbols[sym_os_state].address + rtos->symbols[sym___off_os_state2chain].address;
+	LOG_DEBUG("chain start at 0x%" PRIx32, chain);
+
+	uint32_t next = chain;
+	for (;;) {
+		retval = target_read_u32(rtos->target, next, &next);
+		if (retval != ERROR_OK) {
+			LOG_ERROR("Could not read rt-kernel data structure from target");
+			return retval;
+		}
+		LOG_DEBUG("next entry at 0x%" PRIx32, next);
+		if (next == chain) {
+			LOG_DEBUG("end of chain detected");
+			break;
+		}
+		uint32_t task = next - rtos->symbols[sym___off_task2chain].address;
+		LOG_DEBUG("found task at 0x%" PRIx32, task);
+
+		retval = rtkernel_verify_task(rtos, task);
+		if (retval != ERROR_OK) {
+			LOG_ERROR("Invalid task found");
+			return retval;
+		}
+
+		retval = rtkernel_add_task(rtos, task, current_task);
+		if (retval != ERROR_OK) {
+			LOG_ERROR("Could not add task to rtos system");
+			return retval;
+		}
+	}
+	return ERROR_OK;
+}
+
+static int rtkernel_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
+		struct rtos_reg **reg_list, int *num_regs)
+{
+	uint32_t stack_ptr = 0;
+
+	if (!rtos)
+		return -1;
+
+	if (thread_id == 0)
+		return -2;
+
+	if (!rtos->rtos_specific_params)
+		return -1;
+
+	const struct rtkernel_params *param = rtos->rtos_specific_params;
+
+	/* Read the stack pointer */
+	int retval = target_read_u32(rtos->target, thread_id + rtos->symbols[sym___off_task2stack].address, &stack_ptr);
+	if (retval != ERROR_OK) {
+		LOG_ERROR("Error reading stack pointer from rtkernel thread");
+		return retval;
+	}
+	LOG_DEBUG("stack pointer at 0x%" PRIx64 ", value 0x%" PRIx32,
+			thread_id + rtos->symbols[sym___off_task2stack].address,
+			stack_ptr);
+
+	/* Adjust stack pointer to ignore non-standard BASEPRI register stacking */
+	stack_ptr += 4;
+
+	/* Check for armv7m with *enabled* FPU, i.e. a Cortex M4F */
+	bool cm4_fpu_enabled = false;
+	struct armv7m_common *armv7m_target = target_to_armv7m(rtos->target);
+	if (is_armv7m(armv7m_target)) {
+		if (armv7m_target->fp_feature != FP_NONE) {
+			/* Found ARM v7m target which includes a FPU */
+			uint32_t cpacr;
+
+			retval = target_read_u32(rtos->target, FPU_CPACR, &cpacr);
+			if (retval != ERROR_OK) {
+				LOG_ERROR("Could not read CPACR register to check FPU state");
+				return -1;
+			}
+
+			/* Check if CP10 and CP11 are set to full access. */
+			if (cpacr & 0x00F00000) {
+				/* Found target with enabled FPU */
+				cm4_fpu_enabled = true;
+			}
+		}
+	}
+
+	if (!cm4_fpu_enabled) {
+		LOG_DEBUG("cm3 stacking");
+		return rtos_generic_stack_read(rtos->target, param->stacking_info_cm3, stack_ptr, reg_list, num_regs);
+	}
+
+	/* Read the LR to decide between stacking with or without FPU */
+	uint32_t lr_svc;
+	retval = target_read_u32(rtos->target, stack_ptr + 0x20, &lr_svc);
+	if (retval != ERROR_OK) {
+		LOG_OUTPUT("Error reading stack frame from rtkernel thread\r\n");
+		return retval;
+	}
+
+	if ((lr_svc & 0x10) == 0) {
+		LOG_DEBUG("cm4f_fpu stacking");
+		return rtos_generic_stack_read(rtos->target, param->stacking_info_cm4f_fpu, stack_ptr, reg_list, num_regs);
+	}
+
+	LOG_DEBUG("cm4f stacking");
+	return rtos_generic_stack_read(rtos->target, param->stacking_info_cm4f, stack_ptr, reg_list, num_regs);
+}
+
+static int rtkernel_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[])
+{
+	*symbol_list = calloc(ARRAY_SIZE(rtkernel_symbol_list), sizeof(struct symbol_table_elem));
+	if (!*symbol_list)
+		return ERROR_FAIL;
+
+	for (size_t i = 0; i < ARRAY_SIZE(rtkernel_symbol_list); i++) {
+		(*symbol_list)[i].symbol_name = rtkernel_symbol_list[i].name;
+		(*symbol_list)[i].optional = rtkernel_symbol_list[i].optional;
+	}
+
+	return ERROR_OK;
+}
+
+static bool rtkernel_detect_rtos(struct target *target)
+{
+	return (target->rtos->symbols) &&
+			(target->rtos->symbols[sym___off_os_state2chain].address != 0);
+}
+
+static int rtkernel_create(struct target *target)
+{
+	for (size_t i = 0; i < ARRAY_SIZE(rtkernel_params_list); i++) {
+		if (strcmp(rtkernel_params_list[i].target_name, target->type->name) == 0) {
+			target->rtos->rtos_specific_params = (void *)&rtkernel_params_list[i];
+			return 0;
+		}
+	}
+
+	LOG_ERROR("Could not find target in rt-kernel compatibility list");
+	return -1;
+}
+
+const struct rtos_type rtkernel_rtos = {
+	.name = "rtkernel",
+
+	.detect_rtos = rtkernel_detect_rtos,
+	.create = rtkernel_create,
+	.update_threads = rtkernel_update_threads,
+	.get_thread_reg_list = rtkernel_get_thread_reg_list,
+	.get_symbol_list_to_lookup = rtkernel_get_symbol_list_to_lookup,
+};
diff --git a/src/rtos/rtos.c b/src/rtos/rtos.c
index dfa158d01..bcd556a7b 100644
--- a/src/rtos/rtos.c
+++ b/src/rtos/rtos.c
@@ -29,6 +29,7 @@ extern struct rtos_type nuttx_rtos;
 extern struct rtos_type hwthread_rtos;
 extern struct rtos_type riot_rtos;
 extern struct rtos_type zephyr_rtos;
+extern struct rtos_type rtkernel_rtos;
 
 static struct rtos_type *rtos_types[] = {
 	&threadx_rtos,
@@ -43,6 +44,7 @@ static struct rtos_type *rtos_types[] = {
 	&nuttx_rtos,
 	&riot_rtos,
 	&zephyr_rtos,
+	&rtkernel_rtos,
 	/* keep this as last, as it always matches with rtos auto */
 	&hwthread_rtos,
 	NULL

-----------------------------------------------------------------------

Summary of changes:
 doc/openocd.texi     |   5 +-
 src/rtos/Makefile.am |   1 +
 src/rtos/rtkernel.c  | 384 +++++++++++++++++++++++++++++++++++++++++++++++++++
 src/rtos/rtos.c      |   2 +
 4 files changed, 391 insertions(+), 1 deletion(-)
 create mode 100644 src/rtos/rtkernel.c


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-49-gcf50bcb84

From: openocd-gerrit <ope...@us...> - 2023-01-28 15:51:47

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       via  cf50bcb841238726697dc1250d6b6cb49fc6d19d (commit)
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- Log -----------------------------------------------------------------
commit cf50bcb841238726697dc1250d6b6cb49fc6d19d
Author: Erhan Kurubas <erh...@es...>
Date:   Sat Jan 21 20:23:07 2023 +0100

    rtos/nuttx: add stacking info for Espressif Xtensa chips
    
    ESP32, ESP32-S2 and ESP32-S3 stack register offsets added
    
    Signed-off-by: Erhan Kurubas <erh...@es...>
    Change-Id: Ic6215c1d0152853fd08f82cbd3c138c7d62dbc46
    Reviewed-on: https://review.openocd.org/c/openocd/+/7443
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/rtos/rtos_nuttx_stackings.c b/src/rtos/rtos_nuttx_stackings.c
index b59b1356b..b70cccb33 100644
--- a/src/rtos/rtos_nuttx_stackings.c
+++ b/src/rtos/rtos_nuttx_stackings.c
@@ -108,3 +108,361 @@ const struct rtos_register_stacking nuttx_riscv_stacking = {
 	.calculate_process_stack = rtos_generic_stack_align8,
 	.register_offsets = nuttx_stack_offsets_riscv,
 };
+
+static int nuttx_esp_xtensa_stack_read(struct target *target,
+	int64_t stack_ptr, const struct rtos_register_stacking *stacking,
+	uint8_t *stack_data)
+{
+	int retval = target_read_buffer(target, stack_ptr, stacking->stack_registers_size, stack_data);
+	if (retval != ERROR_OK)
+		return retval;
+
+	stack_data[4] &= ~0x10;	/* Clear exception bit in PS */
+
+	return ERROR_OK;
+}
+
+static const struct stack_register_offset nuttx_stack_offsets_esp32[] = {
+	{ 0, 0x00, 32 },		/* PC */
+	{ 1, 0x08, 32 },		/* A0 */
+	{ 2, 0x0c, 32 },		/* A1 */
+	{ 3, 0x10, 32 },		/* A2 */
+	{ 4, 0x14, 32 },		/* A3 */
+	{ 5, 0x18, 32 },		/* A4 */
+	{ 6, 0x1c, 32 },		/* A5 */
+	{ 7, 0x20, 32 },		/* A6 */
+	{ 8, 0x24, 32 },		/* A7 */
+	{ 9, 0x28, 32 },		/* A8 */
+	{ 10, 0x2c, 32 },		/* A9 */
+	{ 11, 0x30, 32 },		/* A10 */
+	{ 12, 0x34, 32 },		/* A11 */
+	{ 13, 0x38, 32 },		/* A12 */
+	{ 14, 0x3c, 32 },		/* A13 */
+	{ 15, 0x40, 32 },		/* A14 */
+	{ 16, 0x44, 32 },		/* A15 */
+	/* A16-A63 aren't in the stack frame because they've been flushed to the stack earlier */
+	{ 17, -1, 32 },			/* A16 */
+	{ 18, -1, 32 },			/* A17 */
+	{ 19, -1, 32 },			/* A18 */
+	{ 20, -1, 32 },			/* A19 */
+	{ 21, -1, 32 },			/* A20 */
+	{ 22, -1, 32 },			/* A21 */
+	{ 23, -1, 32 },			/* A22 */
+	{ 24, -1, 32 },			/* A23 */
+	{ 25, -1, 32 },			/* A24 */
+	{ 26, -1, 32 },			/* A25 */
+	{ 27, -1, 32 },			/* A26 */
+	{ 28, -1, 32 },			/* A27 */
+	{ 29, -1, 32 },			/* A28 */
+	{ 30, -1, 32 },			/* A29 */
+	{ 31, -1, 32 },			/* A30 */
+	{ 32, -1, 32 },			/* A31 */
+	{ 33, -1, 32 },			/* A32 */
+	{ 34, -1, 32 },			/* A33 */
+	{ 35, -1, 32 },			/* A34 */
+	{ 36, -1, 32 },			/* A35 */
+	{ 37, -1, 32 },			/* A36 */
+	{ 38, -1, 32 },			/* A37 */
+	{ 39, -1, 32 },			/* A38 */
+	{ 40, -1, 32 },			/* A39 */
+	{ 41, -1, 32 },			/* A40 */
+	{ 42, -1, 32 },			/* A41 */
+	{ 43, -1, 32 },			/* A42 */
+	{ 44, -1, 32 },			/* A43 */
+	{ 45, -1, 32 },			/* A44 */
+	{ 46, -1, 32 },			/* A45 */
+	{ 47, -1, 32 },			/* A46 */
+	{ 48, -1, 32 },			/* A47 */
+	{ 49, -1, 32 },			/* A48 */
+	{ 50, -1, 32 },			/* A49 */
+	{ 51, -1, 32 },			/* A50 */
+	{ 52, -1, 32 },			/* A51 */
+	{ 53, -1, 32 },			/* A52 */
+	{ 54, -1, 32 },			/* A53 */
+	{ 55, -1, 32 },			/* A54 */
+	{ 56, -1, 32 },			/* A55 */
+	{ 57, -1, 32 },			/* A56 */
+	{ 58, -1, 32 },			/* A57 */
+	{ 59, -1, 32 },			/* A58 */
+	{ 60, -1, 32 },			/* A59 */
+	{ 61, -1, 32 },			/* A60 */
+	{ 62, -1, 32 },			/* A61 */
+	{ 63, -1, 32 },			/* A62 */
+	{ 64, -1, 32 },			/* A63 */
+	{ 65, 0x58, 32 },		/* lbeg */
+	{ 66, 0x5c, 32 },		/* lend */
+	{ 67, 0x60, 32 },		/* lcount */
+	{ 68, 0x48, 32 },		/* SAR */
+	{ 69, -1, 32 },			/* windowbase */
+	{ 70, -1, 32 },			/* windowstart */
+	{ 71, -1, 32 },			/* configid0 */
+	{ 72, -1, 32 },			/* configid1 */
+	{ 73, 0x04, 32 },		/* PS */
+	{ 74, -1, 32 },			/* threadptr */
+	{ 75, -1, 32 },			/* br */
+	{ 76, 0x54, 32 },		/* scompare1 */
+	{ 77, -1, 32 },			/* acclo */
+	{ 78, -1, 32 },			/* acchi */
+	{ 79, -1, 32 },			/* m0 */
+	{ 80, -1, 32 },			/* m1 */
+	{ 81, -1, 32 },			/* m2 */
+	{ 82, -1, 32 },			/* m3 */
+	{ 83, -1, 32 },			/* expstate */
+	{ 84, -1, 32 },			/* f64r_lo */
+	{ 85, -1, 32 },			/* f64r_hi */
+	{ 86, -1, 32 },			/* f64s */
+	{ 87, -1, 32 },			/* f0 */
+	{ 88, -1, 32 },			/* f1 */
+	{ 89, -1, 32 },			/* f2 */
+	{ 90, -1, 32 },			/* f3 */
+	{ 91, -1, 32 },			/* f4 */
+	{ 92, -1, 32 },			/* f5 */
+	{ 93, -1, 32 },			/* f6 */
+	{ 94, -1, 32 },			/* f7 */
+	{ 95, -1, 32 },			/* f8 */
+	{ 96, -1, 32 },			/* f9 */
+	{ 97, -1, 32 },			/* f10 */
+	{ 98, -1, 32 },			/* f11 */
+	{ 99, -1, 32 },			/* f12 */
+	{ 100, -1, 32 },		/* f13 */
+	{ 101, -1, 32 },		/* f14 */
+	{ 102, -1, 32 },		/* f15 */
+	{ 103, -1, 32 },		/* fcr */
+	{ 104, -1, 32 },		/* fsr */
+};
+
+const struct rtos_register_stacking nuttx_esp32_stacking = {
+	.stack_registers_size = 26 * 4,
+	.stack_growth_direction = -1,
+	.num_output_registers = ARRAY_SIZE(nuttx_stack_offsets_esp32),
+	.calculate_process_stack = rtos_generic_stack_align8,
+	.register_offsets = nuttx_stack_offsets_esp32,
+	.read_stack = nuttx_esp_xtensa_stack_read,
+};
+
+static const struct stack_register_offset nuttx_stack_offsets_esp32s2[] = {
+	{ 0, 0x00, 32 },		/* PC */
+	{ 1, 0x08, 32 },		/* A0 */
+	{ 2, 0x0c, 32 },		/* A1 */
+	{ 3, 0x10, 32 },		/* A2 */
+	{ 4, 0x14, 32 },		/* A3 */
+	{ 5, 0x18, 32 },		/* A4 */
+	{ 6, 0x1c, 32 },		/* A5 */
+	{ 7, 0x20, 32 },		/* A6 */
+	{ 8, 0x24, 32 },		/* A7 */
+	{ 9, 0x28, 32 },		/* A8 */
+	{ 10, 0x2c, 32 },		/* A9 */
+	{ 11, 0x30, 32 },		/* A10 */
+	{ 12, 0x34, 32 },		/* A11 */
+	{ 13, 0x38, 32 },		/* A12 */
+	{ 14, 0x3c, 32 },		/* A13 */
+	{ 15, 0x40, 32 },		/* A14 */
+	{ 16, 0x44, 32 },		/* A15 */
+	/* A16-A63 aren't in the stack frame because they've been flushed to the stack earlier */
+	{ 17, -1, 32 },			/* A16 */
+	{ 18, -1, 32 },			/* A17 */
+	{ 19, -1, 32 },			/* A18 */
+	{ 20, -1, 32 },			/* A19 */
+	{ 21, -1, 32 },			/* A20 */
+	{ 22, -1, 32 },			/* A21 */
+	{ 23, -1, 32 },			/* A22 */
+	{ 24, -1, 32 },			/* A23 */
+	{ 25, -1, 32 },			/* A24 */
+	{ 26, -1, 32 },			/* A25 */
+	{ 27, -1, 32 },			/* A26 */
+	{ 28, -1, 32 },			/* A27 */
+	{ 29, -1, 32 },			/* A28 */
+	{ 30, -1, 32 },			/* A29 */
+	{ 31, -1, 32 },			/* A30 */
+	{ 32, -1, 32 },			/* A31 */
+	{ 33, -1, 32 },			/* A32 */
+	{ 34, -1, 32 },			/* A33 */
+	{ 35, -1, 32 },			/* A34 */
+	{ 36, -1, 32 },			/* A35 */
+	{ 37, -1, 32 },			/* A36 */
+	{ 38, -1, 32 },			/* A37 */
+	{ 39, -1, 32 },			/* A38 */
+	{ 40, -1, 32 },			/* A39 */
+	{ 41, -1, 32 },			/* A40 */
+	{ 42, -1, 32 },			/* A41 */
+	{ 43, -1, 32 },			/* A42 */
+	{ 44, -1, 32 },			/* A43 */
+	{ 45, -1, 32 },			/* A44 */
+	{ 46, -1, 32 },			/* A45 */
+	{ 47, -1, 32 },			/* A46 */
+	{ 48, -1, 32 },			/* A47 */
+	{ 49, -1, 32 },			/* A48 */
+	{ 50, -1, 32 },			/* A49 */
+	{ 51, -1, 32 },			/* A50 */
+	{ 52, -1, 32 },			/* A51 */
+	{ 53, -1, 32 },			/* A52 */
+	{ 54, -1, 32 },			/* A53 */
+	{ 55, -1, 32 },			/* A54 */
+	{ 56, -1, 32 },			/* A55 */
+	{ 57, -1, 32 },			/* A56 */
+	{ 58, -1, 32 },			/* A57 */
+	{ 59, -1, 32 },			/* A58 */
+	{ 60, -1, 32 },			/* A59 */
+	{ 61, -1, 32 },			/* A60 */
+	{ 62, -1, 32 },			/* A61 */
+	{ 63, -1, 32 },			/* A62 */
+	{ 64, -1, 32 },			/* A63 */
+	{ 65, 0x48, 32 },		/* SAR */
+	{ 66, -1, 32 },			/* windowbase */
+	{ 67, -1, 32 },			/* windowstart */
+	{ 68, -1, 32 },			/* configid0 */
+	{ 69, -1, 32 },			/* configid1 */
+	{ 70, 0x04, 32 },		/* PS */
+	{ 71, -1, 32 },			/* threadptr */
+	{ 72, -1, 32 },			/* gpio_out */
+};
+
+const struct rtos_register_stacking nuttx_esp32s2_stacking = {
+	.stack_registers_size = 25 * 4,
+	.stack_growth_direction = -1,
+	.num_output_registers = ARRAY_SIZE(nuttx_stack_offsets_esp32s2),
+	.calculate_process_stack = rtos_generic_stack_align8,
+	.register_offsets = nuttx_stack_offsets_esp32s2,
+	.read_stack = nuttx_esp_xtensa_stack_read,
+};
+
+static const struct stack_register_offset nuttx_stack_offsets_esp32s3[] = {
+	{ 0, 0x00, 32 },		/* PC */
+	{ 1, 0x08, 32 },		/* A0 */
+	{ 2, 0x0c, 32 },		/* A1 */
+	{ 3, 0x10, 32 },		/* A2 */
+	{ 4, 0x14, 32 },		/* A3 */
+	{ 5, 0x18, 32 },		/* A4 */
+	{ 6, 0x1c, 32 },		/* A5 */
+	{ 7, 0x20, 32 },		/* A6 */
+	{ 8, 0x24, 32 },		/* A7 */
+	{ 9, 0x28, 32 },		/* A8 */
+	{ 10, 0x2c, 32 },		/* A9 */
+	{ 11, 0x30, 32 },		/* A10 */
+	{ 12, 0x34, 32 },		/* A11 */
+	{ 13, 0x38, 32 },		/* A12 */
+	{ 14, 0x3c, 32 },		/* A13 */
+	{ 15, 0x40, 32 },		/* A14 */
+	{ 16, 0x44, 32 },		/* A15 */
+	/* A16-A63 aren't in the stack frame because they've been flushed to the stack earlier */
+	{ 17, -1, 32 },			/* A16 */
+	{ 18, -1, 32 },			/* A17 */
+	{ 19, -1, 32 },			/* A18 */
+	{ 20, -1, 32 },			/* A19 */
+	{ 21, -1, 32 },			/* A20 */
+	{ 22, -1, 32 },			/* A21 */
+	{ 23, -1, 32 },			/* A22 */
+	{ 24, -1, 32 },			/* A23 */
+	{ 25, -1, 32 },			/* A24 */
+	{ 26, -1, 32 },			/* A25 */
+	{ 27, -1, 32 },			/* A26 */
+	{ 28, -1, 32 },			/* A27 */
+	{ 29, -1, 32 },			/* A28 */
+	{ 30, -1, 32 },			/* A29 */
+	{ 31, -1, 32 },			/* A30 */
+	{ 32, -1, 32 },			/* A31 */
+	{ 33, -1, 32 },			/* A32 */
+	{ 34, -1, 32 },			/* A33 */
+	{ 35, -1, 32 },			/* A34 */
+	{ 36, -1, 32 },			/* A35 */
+	{ 37, -1, 32 },			/* A36 */
+	{ 38, -1, 32 },			/* A37 */
+	{ 39, -1, 32 },			/* A38 */
+	{ 40, -1, 32 },			/* A39 */
+	{ 41, -1, 32 },			/* A40 */
+	{ 42, -1, 32 },			/* A41 */
+	{ 43, -1, 32 },			/* A42 */
+	{ 44, -1, 32 },			/* A43 */
+	{ 45, -1, 32 },			/* A44 */
+	{ 46, -1, 32 },			/* A45 */
+	{ 47, -1, 32 },			/* A46 */
+	{ 48, -1, 32 },			/* A47 */
+	{ 49, -1, 32 },			/* A48 */
+	{ 50, -1, 32 },			/* A49 */
+	{ 51, -1, 32 },			/* A50 */
+	{ 52, -1, 32 },			/* A51 */
+	{ 53, -1, 32 },			/* A52 */
+	{ 54, -1, 32 },			/* A53 */
+	{ 55, -1, 32 },			/* A54 */
+	{ 56, -1, 32 },			/* A55 */
+	{ 57, -1, 32 },			/* A56 */
+	{ 58, -1, 32 },			/* A57 */
+	{ 59, -1, 32 },			/* A58 */
+	{ 60, -1, 32 },			/* A59 */
+	{ 61, -1, 32 },			/* A60 */
+	{ 62, -1, 32 },			/* A61 */
+	{ 63, -1, 32 },			/* A62 */
+	{ 64, -1, 32 },			/* A63 */
+	{ 65, 0x58, 32 },		/* lbeg */
+	{ 66, 0x5c, 32 },		/* lend */
+	{ 67, 0x60, 32 },		/* lcount */
+	{ 68, 0x48, 32 },		/* SAR */
+	{ 69, -1, 32 },			/* windowbase */
+	{ 70, -1, 32 },			/* windowstart */
+	{ 71, -1, 32 },			/* configid0 */
+	{ 72, -1, 32 },			/* configid1 */
+	{ 73, 0x04, 32 },		/* PS */
+	{ 74, -1, 32 },			/* threadptr */
+	{ 75, -1, 32 },			/* br */
+	{ 76, 0x54, 32 },		/* scompare1 */
+	{ 77, -1, 32 },			/* acclo */
+	{ 78, -1, 32 },			/* acchi */
+	{ 79, -1, 32 },			/* m0 */
+	{ 80, -1, 32 },			/* m1 */
+	{ 81, -1, 32 },			/* m2 */
+	{ 82, -1, 32 },			/* m3 */
+	{ 83, -1, 32 },			/* gpio_out */
+	{ 84, -1, 32 },			/* f0 */
+	{ 85, -1, 32 },			/* f1 */
+	{ 86, -1, 32 },			/* f2 */
+	{ 87, -1, 32 },			/* f3 */
+	{ 88, -1, 32 },			/* f4 */
+	{ 89, -1, 32 },			/* f5 */
+	{ 90, -1, 32 },			/* f6 */
+	{ 91, -1, 32 },			/* f7 */
+	{ 92, -1, 32 },			/* f8 */
+	{ 93, -1, 32 },			/* f9 */
+	{ 94, -1, 32 },			/* f10 */
+	{ 95, -1, 32 },			/* f11 */
+	{ 96, -1, 32 },			/* f12 */
+	{ 97, -1, 32 },			/* f13 */
+	{ 98, -1, 32 },			/* f14 */
+	{ 99, -1, 32 },			/* f15 */
+	{ 100, -1, 32 },		/* fcr */
+	{ 101, -1, 32 },		/* fsr */
+	{ 102, -1, 32 },		/* accx_0 */
+	{ 103, -1, 32 },		/* accx_1 */
+	{ 104, -1, 32 },		/* qacc_h_0 */
+	{ 105, -1, 32 },		/* qacc_h_1 */
+	{ 106, -1, 32 },		/* qacc_h_2 */
+	{ 107, -1, 32 },		/* qacc_h_3 */
+	{ 108, -1, 32 },		/* qacc_h_4 */
+	{ 109, -1, 32 },		/* qacc_l_0 */
+	{ 110, -1, 32 },		/* qacc_l_1 */
+	{ 111, -1, 32 },		/* qacc_l_2 */
+	{ 112, -1, 32 },		/* qacc_l_3 */
+	{ 113, -1, 32 },		/* qacc_l_4 */
+	{ 114, -1, 32 },		/* sar_byte */
+	{ 115, -1, 32 },		/* fft_bit_width */
+	{ 116, -1, 32 },		/* ua_state_0 */
+	{ 117, -1, 32 },		/* ua_state_1 */
+	{ 118, -1, 32 },		/* ua_state_2 */
+	{ 119, -1, 32 },		/* ua_state_3 */
+	{ 120, -1, 128 },		/* q0 */
+	{ 121, -1, 128 },		/* q1 */
+	{ 122, -1, 128 },		/* q2 */
+	{ 123, -1, 128 },		/* q3 */
+	{ 124, -1, 128 },		/* q4 */
+	{ 125, -1, 128 },		/* q5 */
+	{ 126, -1, 128 },		/* q6 */
+	{ 127, -1, 128 },		/* q7 */
+};
+
+const struct rtos_register_stacking nuttx_esp32s3_stacking = {
+	.stack_registers_size = 26 * 4,
+	.stack_growth_direction = -1,
+	.num_output_registers = ARRAY_SIZE(nuttx_stack_offsets_esp32s3),
+	.calculate_process_stack = rtos_generic_stack_align8,
+	.register_offsets = nuttx_stack_offsets_esp32s3,
+	.read_stack = nuttx_esp_xtensa_stack_read,
+};

-----------------------------------------------------------------------

Summary of changes:
 src/rtos/rtos_nuttx_stackings.c | 358 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 358 insertions(+)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-48-g59bc761d5

From: openocd-gerrit <ope...@us...> - 2023-01-28 15:51:05

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       via  dfbbfac4d72e247e8094a49c8573b2f49689b6d5 (commit)
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- Log -----------------------------------------------------------------
commit 59bc761d56f9ce9a76c917e267a2c37f1a680611
Author: Erhan Kurubas <erh...@es...>
Date:   Sat Jan 21 20:10:21 2023 +0100

    rtos: add custom stack read function
    
    This is optional field for the targets which has to implement
    their custom stack read function.
    
    Signed-off-by: Erhan Kurubas <erh...@es...>
    Change-Id: Icbc9ed66a052fc2cc0ef67e3ec4d85ab0c2c1b94
    Reviewed-on: https://review.openocd.org/c/openocd/+/7442
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/rtos/rtos.c b/src/rtos/rtos.c
index 2e76b501a..dfa158d01 100644
--- a/src/rtos/rtos.c
+++ b/src/rtos/rtos.c
@@ -632,7 +632,10 @@ int rtos_generic_stack_read(struct target *target,
 
 	if (stacking->stack_growth_direction == 1)
 		address -= stacking->stack_registers_size;
-	retval = target_read_buffer(target, address, stacking->stack_registers_size, stack_data);
+	if (stacking->read_stack)
+		retval = stacking->read_stack(target, address, stacking, stack_data);
+	else
+		retval = target_read_buffer(target, address, stacking->stack_registers_size, stack_data);
 	if (retval != ERROR_OK) {
 		free(stack_data);
 		LOG_ERROR("Error reading stack frame from thread");
diff --git a/src/rtos/rtos.h b/src/rtos/rtos.h
index ace57514a..9128c163c 100644
--- a/src/rtos/rtos.h
+++ b/src/rtos/rtos.h
@@ -102,6 +102,13 @@ struct rtos_register_stacking {
 		const struct rtos_register_stacking *stacking,
 		target_addr_t stack_ptr);
 	const struct stack_register_offset *register_offsets;
+	/* Optional field for targets which may have to implement their own stack read function.
+	 * Because stack format can be weird or stack data needed to be edited before passing to the gdb.
+	 */
+	int (*read_stack)(struct target *target,
+		int64_t stack_ptr,
+		const struct rtos_register_stacking *stacking,
+		uint8_t *stack_data);
 };
 
 #define GDB_THREAD_PACKET_NOT_CONSUMED (-40)

commit dfbbfac4d72e247e8094a49c8573b2f49689b6d5
Author: Erhan Kurubas <erh...@es...>
Date:   Wed Oct 5 18:38:23 2022 +0200

    rtos/nuttx: add riscv stacking info
    
    Tested with Espressif ESP32-C3 MCU
    
    Signed-off-by: Erhan Kurubas <erh...@es...>
    Change-Id: Ia71ace4909f2dc93ddc07a2ec5524cf374f1937c
    Reviewed-on: https://review.openocd.org/c/openocd/+/7251
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/rtos/rtos_nuttx_stackings.c b/src/rtos/rtos_nuttx_stackings.c
index cb3a2b9b2..b59b1356b 100644
--- a/src/rtos/rtos_nuttx_stackings.c
+++ b/src/rtos/rtos_nuttx_stackings.c
@@ -7,6 +7,8 @@
 #include "rtos.h"
 #include "target/armv7m.h"
 #include "rtos_nuttx_stackings.h"
+#include "rtos_standard_stackings.h"
+#include <target/riscv/riscv.h>
 
 /* see arch/arm/include/armv7-m/irq_cmnvector.h */
 static const struct stack_register_offset nuttx_stack_offsets_cortex_m[] = {
@@ -62,3 +64,47 @@ const struct rtos_register_stacking nuttx_stacking_cortex_m_fpu = {
 	.num_output_registers = 17,
 	.register_offsets = nuttx_stack_offsets_cortex_m_fpu,
 };
+
+static const struct stack_register_offset nuttx_stack_offsets_riscv[] = {
+	{ GDB_REGNO_ZERO, -1, 32 },
+	{ GDB_REGNO_RA, 0x04, 32 },
+	{ GDB_REGNO_SP, 0x08, 32 },
+	{ GDB_REGNO_GP, 0x0c, 32 },
+	{ GDB_REGNO_TP, 0x10, 32 },
+	{ GDB_REGNO_T0, 0x14, 32 },
+	{ GDB_REGNO_T1, 0x18, 32 },
+	{ GDB_REGNO_T2, 0x1c, 32 },
+	{ GDB_REGNO_FP, 0x20, 32 },
+	{ GDB_REGNO_S1, 0x24, 32 },
+	{ GDB_REGNO_A0, 0x28, 32 },
+	{ GDB_REGNO_A1, 0x2c, 32 },
+	{ GDB_REGNO_A2, 0x30, 32 },
+	{ GDB_REGNO_A3, 0x34, 32 },
+	{ GDB_REGNO_A4, 0x38, 32 },
+	{ GDB_REGNO_A5, 0x3c, 32 },
+	{ GDB_REGNO_A6, 0x40, 32 },
+	{ GDB_REGNO_A7, 0x44, 32 },
+	{ GDB_REGNO_S2, 0x48, 32 },
+	{ GDB_REGNO_S3, 0x4c, 32 },
+	{ GDB_REGNO_S4, 0x50, 32 },
+	{ GDB_REGNO_S5, 0x54, 32 },
+	{ GDB_REGNO_S6, 0x58, 32 },
+	{ GDB_REGNO_S7, 0x5c, 32 },
+	{ GDB_REGNO_S8, 0x60, 32 },
+	{ GDB_REGNO_S9, 0x64, 32 },
+	{ GDB_REGNO_S10, 0x68, 32 },
+	{ GDB_REGNO_S11, 0x6c, 32 },
+	{ GDB_REGNO_T3, 0x70, 32 },
+	{ GDB_REGNO_T4, 0x74, 32 },
+	{ GDB_REGNO_T5, 0x78, 32 },
+	{ GDB_REGNO_T6, 0x7c, 32 },
+	{ GDB_REGNO_PC, 0x00, 32 },
+};
+
+const struct rtos_register_stacking nuttx_riscv_stacking = {
+	.stack_registers_size = 33 * 4,
+	.stack_growth_direction = -1,
+	.num_output_registers = 33,
+	.calculate_process_stack = rtos_generic_stack_align8,
+	.register_offsets = nuttx_stack_offsets_riscv,
+};
diff --git a/src/rtos/rtos_nuttx_stackings.h b/src/rtos/rtos_nuttx_stackings.h
index bfbc049f8..2e5f09212 100644
--- a/src/rtos/rtos_nuttx_stackings.h
+++ b/src/rtos/rtos_nuttx_stackings.h
@@ -7,5 +7,6 @@
 
 extern const struct rtos_register_stacking nuttx_stacking_cortex_m;
 extern const struct rtos_register_stacking nuttx_stacking_cortex_m_fpu;
+extern const struct rtos_register_stacking nuttx_riscv_stacking;
 
 #endif	/* INCLUDED_RTOS_NUTTX_STACKINGS_H */

-----------------------------------------------------------------------

Summary of changes:
 src/rtos/rtos.c                 |  5 ++++-
 src/rtos/rtos.h                 |  7 +++++++
 src/rtos/rtos_nuttx_stackings.c | 46 +++++++++++++++++++++++++++++++++++++++++
 src/rtos/rtos_nuttx_stackings.h |  1 +
 4 files changed, 58 insertions(+), 1 deletion(-)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-46-g463df9521

From: openocd-gerrit <ope...@us...> - 2023-01-28 15:45:59

This is an automated email from the git hooks/post-receive script. It was
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The branch, master has been updated
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- Log -----------------------------------------------------------------
commit 463df952157227866335e398102abe960ffa4131
Author: Erhan Kurubas <erh...@es...>
Date:   Wed Oct 5 17:59:54 2022 +0200

    rtos/nuttx: move stacking info to the new nuttx stackings file
    
    Other OSes have separate files to keep stack register offsets.
    Adding them for NuttX as well will provide a clearer way to expand.
    
    Signed-off-by: Erhan Kurubas <erh...@es...>
    Change-Id: I1428fefefa199a95431f2073c0279dd7028ad8da
    Reviewed-on: https://review.openocd.org/c/openocd/+/7250
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/rtos/Makefile.am b/src/rtos/Makefile.am
index f00d7194e..fc3ab8b42 100644
--- a/src/rtos/Makefile.am
+++ b/src/rtos/Makefile.am
@@ -10,6 +10,7 @@ noinst_LTLIBRARIES += %D%/librtos.la
 	%D%/rtos_mqx_stackings.c \
 	%D%/rtos_ucos_iii_stackings.c \
 	%D%/rtos_riot_stackings.c \
+	%D%/rtos_nuttx_stackings.c \
 	%D%/FreeRTOS.c \
 	%D%/ThreadX.c \
 	%D%/eCos.c \
@@ -32,4 +33,5 @@ noinst_LTLIBRARIES += %D%/librtos.la
 	%D%/rtos_mqx_stackings.h \
 	%D%/rtos_riot_stackings.h \
 	%D%/rtos_ucos_iii_stackings.h \
+	%D%/rtos_nuttx_stackings.h \
 	%D%/nuttx_header.h
diff --git a/src/rtos/nuttx.c b/src/rtos/nuttx.c
index 87b28c632..993ff84bd 100644
--- a/src/rtos/nuttx.c
+++ b/src/rtos/nuttx.c
@@ -21,7 +21,7 @@
 #include "server/gdb_server.h"
 
 #include "nuttx_header.h"
-
+#include "rtos_nuttx_stackings.h"
 
 int rtos_thread_packet(struct connection *connection, const char *packet, int packet_size);
 
@@ -85,62 +85,6 @@ static char *task_state_str[] = {
 #endif /* CONFIG_PAGING */
 };
 
-/* see arch/arm/include/armv7-m/irq_cmnvector.h */
-static const struct stack_register_offset nuttx_stack_offsets_cortex_m[] = {
-	{ ARMV7M_R0,	0x28, 32 },		/* r0   */
-	{ ARMV7M_R1,	0x2c, 32 },		/* r1   */
-	{ ARMV7M_R2,	0x30, 32 },		/* r2   */
-	{ ARMV7M_R3,	0x34, 32 },		/* r3   */
-	{ ARMV7M_R4,	0x08, 32 },		/* r4   */
-	{ ARMV7M_R5,	0x0c, 32 },		/* r5   */
-	{ ARMV7M_R6,	0x10, 32 },		/* r6   */
-	{ ARMV7M_R7,	0x14, 32 },		/* r7   */
-	{ ARMV7M_R8,	0x18, 32 },		/* r8   */
-	{ ARMV7M_R9,	0x1c, 32 },		/* r9   */
-	{ ARMV7M_R10,	0x20, 32 },		/* r10  */
-	{ ARMV7M_R11,	0x24, 32 },		/* r11  */
-	{ ARMV7M_R12,	0x38, 32 },		/* r12  */
-	{ ARMV7M_R13,	  0,  32 },		/* sp   */
-	{ ARMV7M_R14,	0x3c, 32 },		/* lr   */
-	{ ARMV7M_PC,	0x40, 32 },		/* pc   */
-	{ ARMV7M_XPSR,	0x44, 32 },		/* xPSR */
-};
-
-
-static const struct rtos_register_stacking nuttx_stacking_cortex_m = {
-	.stack_registers_size = 0x48,
-	.stack_growth_direction = -1,
-	.num_output_registers = 17,
-	.register_offsets = nuttx_stack_offsets_cortex_m
-};
-
-static const struct stack_register_offset nuttx_stack_offsets_cortex_m_fpu[] = {
-	{ ARMV7M_R0,	0x6c, 32 },		/* r0   */
-	{ ARMV7M_R1,	0x70, 32 },		/* r1   */
-	{ ARMV7M_R2,	0x74, 32 },		/* r2   */
-	{ ARMV7M_R3,	0x78, 32 },		/* r3   */
-	{ ARMV7M_R4,	0x08, 32 },		/* r4   */
-	{ ARMV7M_R5,	0x0c, 32 },		/* r5   */
-	{ ARMV7M_R6,	0x10, 32 },		/* r6   */
-	{ ARMV7M_R7,	0x14, 32 },		/* r7   */
-	{ ARMV7M_R8,	0x18, 32 },		/* r8   */
-	{ ARMV7M_R9,	0x1c, 32 },		/* r9   */
-	{ ARMV7M_R10,	0x20, 32 },		/* r10  */
-	{ ARMV7M_R11,	0x24, 32 },		/* r11  */
-	{ ARMV7M_R12,	0x7c, 32 },		/* r12  */
-	{ ARMV7M_R13,	  0,  32 },		/* sp   */
-	{ ARMV7M_R14,	0x80, 32 },		/* lr   */
-	{ ARMV7M_PC,	0x84, 32 },		/* pc   */
-	{ ARMV7M_XPSR,	0x88, 32 },		/* xPSR */
-};
-
-static const struct rtos_register_stacking nuttx_stacking_cortex_m_fpu = {
-	.stack_registers_size = 0x8c,
-	.stack_growth_direction = -1,
-	.num_output_registers = 17,
-	.register_offsets = nuttx_stack_offsets_cortex_m_fpu
-};
-
 static int pid_offset = PID;
 static int state_offset = STATE;
 static int name_offset =  NAME;
diff --git a/src/rtos/rtos_nuttx_stackings.c b/src/rtos/rtos_nuttx_stackings.c
new file mode 100644
index 000000000..cb3a2b9b2
--- /dev/null
+++ b/src/rtos/rtos_nuttx_stackings.c
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "rtos.h"
+#include "target/armv7m.h"
+#include "rtos_nuttx_stackings.h"
+
+/* see arch/arm/include/armv7-m/irq_cmnvector.h */
+static const struct stack_register_offset nuttx_stack_offsets_cortex_m[] = {
+	{ ARMV7M_R0, 0x28, 32 },		/* r0   */
+	{ ARMV7M_R1, 0x2c, 32 },		/* r1   */
+	{ ARMV7M_R2, 0x30, 32 },		/* r2   */
+	{ ARMV7M_R3, 0x34, 32 },		/* r3   */
+	{ ARMV7M_R4, 0x08, 32 },		/* r4   */
+	{ ARMV7M_R5, 0x0c, 32 },		/* r5   */
+	{ ARMV7M_R6, 0x10, 32 },		/* r6   */
+	{ ARMV7M_R7, 0x14, 32 },		/* r7   */
+	{ ARMV7M_R8, 0x18, 32 },		/* r8   */
+	{ ARMV7M_R9, 0x1c, 32 },		/* r9   */
+	{ ARMV7M_R10, 0x20, 32 },		/* r10  */
+	{ ARMV7M_R11, 0x24, 32 },		/* r11  */
+	{ ARMV7M_R12, 0x38, 32 },		/* r12  */
+	{ ARMV7M_R13, 0, 32 },			/* sp   */
+	{ ARMV7M_R14, 0x3c, 32 },		/* lr   */
+	{ ARMV7M_PC, 0x40, 32 },		/* pc   */
+	{ ARMV7M_XPSR, 0x44, 32 },		/* xPSR */
+};
+
+const struct rtos_register_stacking nuttx_stacking_cortex_m = {
+	.stack_registers_size = 0x48,
+	.stack_growth_direction = -1,
+	.num_output_registers = 17,
+	.register_offsets = nuttx_stack_offsets_cortex_m,
+};
+
+static const struct stack_register_offset nuttx_stack_offsets_cortex_m_fpu[] = {
+	{ ARMV7M_R0, 0x6c, 32 },		/* r0   */
+	{ ARMV7M_R1, 0x70, 32 },		/* r1   */
+	{ ARMV7M_R2, 0x74, 32 },		/* r2   */
+	{ ARMV7M_R3, 0x78, 32 },		/* r3   */
+	{ ARMV7M_R4, 0x08, 32 },		/* r4   */
+	{ ARMV7M_R5, 0x0c, 32 },		/* r5   */
+	{ ARMV7M_R6, 0x10, 32 },		/* r6   */
+	{ ARMV7M_R7, 0x14, 32 },		/* r7   */
+	{ ARMV7M_R8, 0x18, 32 },		/* r8   */
+	{ ARMV7M_R9, 0x1c, 32 },		/* r9   */
+	{ ARMV7M_R10, 0x20, 32 },		/* r10  */
+	{ ARMV7M_R11, 0x24, 32 },		/* r11  */
+	{ ARMV7M_R12, 0x7c, 32 },		/* r12  */
+	{ ARMV7M_R13, 0, 32 },			/* sp   */
+	{ ARMV7M_R14, 0x80, 32 },		/* lr   */
+	{ ARMV7M_PC, 0x84, 32 },		/* pc   */
+	{ ARMV7M_XPSR, 0x88, 32 },		/* xPSR */
+};
+
+const struct rtos_register_stacking nuttx_stacking_cortex_m_fpu = {
+	.stack_registers_size = 0x8c,
+	.stack_growth_direction = -1,
+	.num_output_registers = 17,
+	.register_offsets = nuttx_stack_offsets_cortex_m_fpu,
+};
diff --git a/src/rtos/rtos_nuttx_stackings.h b/src/rtos/rtos_nuttx_stackings.h
new file mode 100644
index 000000000..bfbc049f8
--- /dev/null
+++ b/src/rtos/rtos_nuttx_stackings.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef INCLUDED_RTOS_NUTTX_STACKINGS_H
+#define INCLUDED_RTOS_NUTTX_STACKINGS_H
+
+#include "rtos.h"
+
+extern const struct rtos_register_stacking nuttx_stacking_cortex_m;
+extern const struct rtos_register_stacking nuttx_stacking_cortex_m_fpu;
+
+#endif	/* INCLUDED_RTOS_NUTTX_STACKINGS_H */

-----------------------------------------------------------------------

Summary of changes:
 src/rtos/Makefile.am            |  2 ++
 src/rtos/nuttx.c                | 58 +------------------------------------
 src/rtos/rtos_nuttx_stackings.c | 64 +++++++++++++++++++++++++++++++++++++++++
 src/rtos/rtos_nuttx_stackings.h | 11 +++++++
 4 files changed, 78 insertions(+), 57 deletions(-)
 create mode 100644 src/rtos/rtos_nuttx_stackings.c
 create mode 100644 src/rtos/rtos_nuttx_stackings.h


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From: openocd-gerrit <ope...@us...> - 2023-01-28 15:44:16

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- Log -----------------------------------------------------------------
commit 41231db3f08150145fe7ddde53cd027e72128d4c
Author: Erhan Kurubas <erh...@es...>
Date:   Fri Jan 20 18:33:43 2023 +0100

    doc:usb_adapters: add lsusb dump of esp_usb_jtag
    
    Also, esp_usb_jtag added to the supported driver list of
    "adapter serial" command.
    
    Signed-off-by: Erhan Kurubas <erh...@es...>
    Change-Id: Ie65cbf9b44f5de6d7995102d1a281161468f6103
    Reviewed-on: https://review.openocd.org/c/openocd/+/7440
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/doc/openocd.texi b/doc/openocd.texi
index aa1707b7d..b9ad3ff77 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -2480,7 +2480,7 @@ This command is only available if your libusb1 is at least version 1.0.16.
 Specifies the @var{serial_string} of the adapter to use.
 If this command is not specified, serial strings are not checked.
 Only the following adapter drivers use the serial string from this command:
-arm-jtag-ew, cmsis_dap, ft232r, ftdi, hla (stlink, ti-icdi), jlink, kitprog, opendus,
+arm-jtag-ew, cmsis_dap, esp_usb_jtag, ft232r, ftdi, hla (stlink, ti-icdi), jlink, kitprog, opendus,
 openjtag, osbdm, presto, rlink, st-link, usb_blaster (ublast2), usbprog, vsllink, xds110.
 @end deffn
 
diff --git a/doc/usb_adapters/esp_usb_jtag/303a_1001_esp_usb_jtag.txt b/doc/usb_adapters/esp_usb_jtag/303a_1001_esp_usb_jtag.txt
new file mode 100644
index 000000000..8da58e581
--- /dev/null
+++ b/doc/usb_adapters/esp_usb_jtag/303a_1001_esp_usb_jtag.txt
@@ -0,0 +1,134 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
+
+# Optional comment
+
+Bus 002 Device 035: ID 303a:1001
+Device Descriptor:
+  bLength                18
+  bDescriptorType         1
+  bcdUSB               2.00
+  bDeviceClass          239 Miscellaneous Device
+  bDeviceSubClass         2
+  bDeviceProtocol         1 Interface Association
+  bMaxPacketSize0        64
+  idVendor           0x303a
+  idProduct          0x1001
+  bcdDevice            1.01
+  iManufacturer           1 Espressif
+  iProduct                2 USB JTAG/serial debug unit
+  iSerial                 3 7C:DF:A1:A2:8F:38
+  bNumConfigurations      1
+  Configuration Descriptor:
+    bLength                 9
+    bDescriptorType         2
+    wTotalLength       0x0062
+    bNumInterfaces          3
+    bConfigurationValue     1
+    iConfiguration          0
+    bmAttributes         0xc0
+      Self Powered
+    MaxPower              500mA
+    Interface Association:
+      bLength                 8
+      bDescriptorType        11
+      bFirstInterface         0
+      bInterfaceCount         2
+      bFunctionClass          2 Communications
+      bFunctionSubClass       2 Abstract (modem)
+      bFunctionProtocol       0
+      iFunction               0
+    Interface Descriptor:
+      bLength                 9
+      bDescriptorType         4
+      bInterfaceNumber        0
+      bAlternateSetting       0
+      bNumEndpoints           1
+      bInterfaceClass         2 Communications
+      bInterfaceSubClass      2 Abstract (modem)
+      bInterfaceProtocol      0
+      iInterface              0
+      CDC Header:
+        bcdCDC               1.10
+      CDC ACM:
+        bmCapabilities       0x02
+          line coding and serial state
+      CDC Union:
+        bMasterInterface        0
+        bSlaveInterface         1
+      CDC Call Management:
+        bmCapabilities       0x03
+          call management
+          use DataInterface
+        bDataInterface          1
+      Endpoint Descriptor:
+        bLength                 7
+        bDescriptorType         5
+        bEndpointAddress     0x82  EP 2 IN
+        bmAttributes            3
+          Transfer Type            Interrupt
+          Synch Type               None
+          Usage Type               Data
+        wMaxPacketSize     0x0040  1x 64 bytes
+        bInterval               1
+    Interface Descriptor:
+      bLength                 9
+      bDescriptorType         4
+      bInterfaceNumber        1
+      bAlternateSetting       0
+      bNumEndpoints           2
+      bInterfaceClass        10 CDC Data
+      bInterfaceSubClass      2
+      bInterfaceProtocol      0
+      iInterface              0
+      Endpoint Descriptor:
+        bLength                 7
+        bDescriptorType         5
+        bEndpointAddress     0x01  EP 1 OUT
+        bmAttributes            2
+          Transfer Type            Bulk
+          Synch Type               None
+          Usage Type               Data
+        wMaxPacketSize     0x0040  1x 64 bytes
+        bInterval               1
+      Endpoint Descriptor:
+        bLength                 7
+        bDescriptorType         5
+        bEndpointAddress     0x81  EP 1 IN
+        bmAttributes            2
+          Transfer Type            Bulk
+          Synch Type               None
+          Usage Type               Data
+        wMaxPacketSize     0x0040  1x 64 bytes
+        bInterval               1
+    Interface Descriptor:
+      bLength                 9
+      bDescriptorType         4
+      bInterfaceNumber        2
+      bAlternateSetting       0
+      bNumEndpoints           2
+      bInterfaceClass       255 Vendor Specific Class
+      bInterfaceSubClass    255 Vendor Specific Subclass
+      bInterfaceProtocol      1
+      iInterface              0
+      Endpoint Descriptor:
+        bLength                 7
+        bDescriptorType         5
+        bEndpointAddress     0x02  EP 2 OUT
+        bmAttributes            2
+          Transfer Type            Bulk
+          Synch Type               None
+          Usage Type               Data
+        wMaxPacketSize     0x0040  1x 64 bytes
+        bInterval               1
+      Endpoint Descriptor:
+        bLength                 7
+        bDescriptorType         5
+        bEndpointAddress     0x83  EP 3 IN
+        bmAttributes            2
+          Transfer Type            Bulk
+          Synch Type               None
+          Usage Type               Data
+        wMaxPacketSize     0x0040  1x 64 bytes
+        bInterval               1
+Device Status:     0x0001
+  Self Powered
diff --git a/doc/usb_adapters/readme.txt b/doc/usb_adapters/readme.txt
index 1d995e99f..19df4cf70 100644
--- a/doc/usb_adapters/readme.txt
+++ b/doc/usb_adapters/readme.txt
@@ -15,6 +15,7 @@ OpenOCD gerrit, as explained in HACKING.
 
 The dumps are organized in subfolders corresponding to OpenOCD drivers:
 - cmsis_dap;
+- esp_usb_jtag;
 - ft232r;
 - ftdi;
 - icdi;

-----------------------------------------------------------------------

Summary of changes:
 doc/openocd.texi                                   |  2 +-
 .../303a_1001_esp_usb_jtag.txt}                    | 89 ++++++++++------------
 doc/usb_adapters/readme.txt                        |  1 +
 3 files changed, 42 insertions(+), 50 deletions(-)
 copy doc/usb_adapters/{cmsis_dap/2a86_8011_wch_link.txt => esp_usb_jtag/303a_1001_esp_usb_jtag.txt} (68%)


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From: openocd-gerrit <ope...@us...> - 2023-01-28 15:42:49

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- Log -----------------------------------------------------------------
commit 98d816ff772ffb45b1f4fbba06cb48b30ca7d98f
Author: N S <nl...@ya...>
Date:   Wed Jan 18 21:58:43 2023 -0800

    doc: fix broken link to IgnoreHardwareSerialNumber in README.Windows
    
       URL for Microsoft documentation on IgnoreHardwareSerialNumber
       redirects to generic USB driver landing page instead of specific
       article. Update link to go to correct page.
    
    Signed-off-by: N S <nl...@ya...>
    Change-Id: Ifac6c730a1438242cdfe0a0a2867e043e03ceec7
    Reviewed-on: https://review.openocd.org/c/openocd/+/7439
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/README.Windows b/README.Windows
index 7326a356c..64bf5c0c6 100644
--- a/README.Windows
+++ b/README.Windows
@@ -52,5 +52,5 @@ port depending on which application to use.
 
 For more information, see:
 
-  http://msdn.microsoft.com/en-us/library/windows/hardware/jj649944(v=vs.85).aspx
+  https://learn.microsoft.com/en-us/windows-hardware/drivers/usbcon/usb-device-specific-registry-settings
   http://www.ftdichip.com/Support/Knowledgebase/index.html?ignorehardwareserialnumber.htm

-----------------------------------------------------------------------

Summary of changes:
 README.Windows | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)


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commit bc3c07b1768df878d04aa7cc8e9187e90cd93821
Author: Andreas Fritiofson <and...@gm...>
Date:   Wed Jan 18 09:23:32 2023 +0100

    stm32f3x: Allow overriding the flash bank size
    
    Same mechanism as in stm32f1x.cfg reused here.
    
    Change-Id: I81f02feb2b655e8259341b22180f3a8b82e28d05
    Signed-off-by: Andreas Fritiofson <and...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7438
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/tcl/target/stm32f3x.cfg b/tcl/target/stm32f3x.cfg
index 4ecc7eda3..aa978d9c8 100644
--- a/tcl/target/stm32f3x.cfg
+++ b/tcl/target/stm32f3x.cfg
@@ -24,6 +24,14 @@ if { [info exists WORKAREASIZE] } {
    set _WORKAREASIZE 0x4000
 }
 
+# Allow overriding the Flash bank size
+if { [info exists FLASH_SIZE] } {
+   set _FLASH_SIZE $FLASH_SIZE
+} else {
+   # autodetect size
+   set _FLASH_SIZE 0
+}
+
 # JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
 #
 # Since we may be running of an RC oscilator, we crank down the speed a
@@ -63,7 +71,7 @@ target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 
 set _FLASHNAME $_CHIPNAME.flash
-flash bank $_FLASHNAME stm32f1x 0 0 0 0 $_TARGETNAME
+flash bank $_FLASHNAME stm32f1x 0 $_FLASH_SIZE 0 0 $_TARGETNAME
 
 reset_config srst_nogate
 

-----------------------------------------------------------------------

Summary of changes:
 tcl/target/stm32f3x.cfg | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)


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commit 6e67f1473af15adc7c4052cee27ad84883b286d4
Author: Marian Buschsieweke <mar...@ov...>
Date:   Thu Dec 22 13:20:07 2022 +0100

    helper: Add generic little endian CRC32 function
    
    This generalizes the little endian CRC32 function used in the OR1K
    target and moves it to a common helper, so that other places do not need
    to reinvent the wheel. It is directly used in the OR1K target.
    
    Change-Id: I0e55340281a5bfd80669bb1994f3a96fecc1248a
    Signed-off-by: Marian Buschsieweke <mar...@ov...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7415
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/helper/Makefile.am b/src/helper/Makefile.am
index 7354f5422..c4c60d96b 100644
--- a/src/helper/Makefile.am
+++ b/src/helper/Makefile.am
@@ -9,6 +9,7 @@ noinst_LTLIBRARIES += %D%/libhelper.la
 	%D%/configuration.c \
 	%D%/log.c \
 	%D%/command.c \
+	%D%/crc32.c \
 	%D%/time_support.c \
 	%D%/replacements.c \
 	%D%/fileio.c \
@@ -24,6 +25,7 @@ noinst_LTLIBRARIES += %D%/libhelper.la
 	%D%/types.h \
 	%D%/log.h \
 	%D%/command.h \
+	%D%/crc32.h \
 	%D%/time_support.h \
 	%D%/replacements.h \
 	%D%/fileio.h \
diff --git a/src/helper/crc32.c b/src/helper/crc32.c
new file mode 100644
index 000000000..441a46c57
--- /dev/null
+++ b/src/helper/crc32.c
@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/***************************************************************************
+ *   Copyright (C) 2013-2014 by Franck Jullien                             *
+ *   ele...@gm...                                                    *
+ *                                                                         *
+ *   Copyright (C) 2022 Otto-von-Guericke-UniversitÃ¤t Magdeburg            *
+ *   mar...@ov...                                           *
+ ***************************************************************************/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "crc32.h"
+#include <stdint.h>
+#include <stddef.h>
+
+static uint32_t crc_le_step(uint32_t poly, uint32_t crc, uint32_t data_in,
+		unsigned int data_bits)
+{
+	for (unsigned int i = 0; i < data_bits; i++) {
+		uint32_t d, c;
+		d = ((data_in >> i) & 0x1) ? 0xffffffff : 0;
+		c = (crc & 0x1) ? 0xffffffff : 0;
+		crc = crc >> 1;
+		crc = crc ^ ((d ^ c) & poly);
+	}
+
+	return crc;
+}
+
+uint32_t crc32_le(uint32_t poly, uint32_t seed, const void *_data,
+		size_t data_len)
+{
+	if (((uintptr_t)_data & 0x3) || (data_len & 0x3)) {
+		/* data is unaligned, processing data one byte at a time */
+		const uint8_t *data = _data;
+		for (size_t i = 0; i < data_len; i++)
+			seed = crc_le_step(poly, seed, data[i], 8);
+	} else {
+		/* data is aligned, processing 32 bit at a time */
+		data_len >>= 2;
+		const uint32_t *data = _data;
+		for (size_t i = 0; i < data_len; i++)
+			seed = crc_le_step(poly, seed, data[i], 32);
+	}
+
+	return seed;
+}
diff --git a/src/helper/crc32.h b/src/helper/crc32.h
new file mode 100644
index 000000000..8f077863a
--- /dev/null
+++ b/src/helper/crc32.h
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+/***************************************************************************
+ *   Copyright (C) 2022 Otto-von-Guericke-UniversitÃ¤t Magdeburg            *
+ *   mar...@ov...                                           *
+ ***************************************************************************/
+
+#ifndef OPENOCD_HELPER_CRC32_H
+#define OPENOCD_HELPER_CRC32_H
+
+#include <stdint.h>
+#include <stddef.h>
+
+/** @file
+ * A generic CRC32 implementation
+ */
+
+/**
+ * CRC32 polynomial commonly used for little endian CRC32
+ */
+#define CRC32_POLY_LE	0xedb88320
+
+/**
+ * Calculate the CRC32 value of the given data
+ * @param	poly		The polynomial of the CRC
+ * @param	seed		The seed to use (mostly either `0` or `0xffffffff`)
+ * @param	data		The data to calculate the CRC32 of
+ * @param	data_len	The length of the data in @p data in bytes
+ * @return	The CRC value of the first @p data_len bytes at @p data
+ * @note	This function can be used to incrementally compute the CRC one
+ *			chunk of data at a time by using the CRC32 of the previous chunk
+ *			as @p seed for the next chunk.
+ */
+uint32_t crc32_le(uint32_t poly, uint32_t seed, const void *data,
+		size_t data_len);
+
+#endif /* OPENOCD_HELPER_CRC32_H */
diff --git a/src/target/openrisc/or1k_du_adv.c b/src/target/openrisc/or1k_du_adv.c
index e4c89e5b5..e4003a213 100644
--- a/src/target/openrisc/or1k_du_adv.c
+++ b/src/target/openrisc/or1k_du_adv.c
@@ -22,8 +22,9 @@
 #include "or1k_du.h"
 #include "jsp_server.h"
 
-#include <target/target.h>
+#include <helper/crc32.h>
 #include <jtag/jtag.h>
+#include <target/target.h>
 
 #define JSP_BANNER "\n\r" \
 		   "******************************\n\r" \
@@ -67,13 +68,6 @@
 #define DBG_CPU_CR_STALL		0x01
 #define DBG_CPU_CR_RESET		0x02
 
-/* Polynomial for the CRC calculation
- * Yes, it's backwards.  Yes, this is on purpose.
- * The hardware is designed this way to save on logic and routing,
- * and it's really all the same to us here.
- */
-#define ADBG_CRC_POLY			0xedb88320
-
 /* These are for the internal registers in the Wishbone module
  * The first is the length of the index register,
  * the indexes of the various registers are defined after that.
@@ -133,20 +127,6 @@ static struct or1k_du or1k_du_adv;
 
 static const char * const chain_name[] = {"WISHBONE", "CPU0", "CPU1", "JSP"};
 
-static uint32_t adbg_compute_crc(uint32_t crc, uint32_t data_in,
-				 int length_bits)
-{
-	for (int i = 0; i < length_bits; i++) {
-		uint32_t d, c;
-		d = ((data_in >> i) & 0x1) ? 0xffffffff : 0;
-		c = (crc & 0x1) ? 0xffffffff : 0;
-		crc = crc >> 1;
-		crc = crc ^ ((d ^ c) & ADBG_CRC_POLY);
-	}
-
-	return crc;
-}
-
 static int find_status_bit(void *_buf, int len)
 {
 	int i = 0;
@@ -522,9 +502,8 @@ retry_read_full:
 	memcpy(data, in_buffer, total_size_bytes);
 	memcpy(&crc_read, &in_buffer[total_size_bytes], 4);
 
-	uint32_t crc_calc = 0xffffffff;
-	for (int i = 0; i < total_size_bytes; i++)
-		crc_calc = adbg_compute_crc(crc_calc, data[i], 8);
+	uint32_t crc_calc = crc32_le(CRC32_POLY_LE, 0xffffffff, data,
+			total_size_bytes);
 
 	if (crc_calc != crc_read) {
 		LOG_WARNING("CRC ERROR! Computed 0x%08" PRIx32 ", read CRC 0x%08" PRIx32, crc_calc, crc_read);
@@ -650,9 +629,8 @@ retry_full_write:
 	field[0].out_value = &value;
 	field[0].in_value = NULL;
 
-	uint32_t crc_calc = 0xffffffff;
-	for (int i = 0; i < (count * size); i++)
-		crc_calc = adbg_compute_crc(crc_calc, data[i], 8);
+	uint32_t crc_calc = crc32_le(CRC32_POLY_LE, 0xffffffff, data,
+			count * size);
 
 	field[1].num_bits = count * size * 8;
 	field[1].out_value = data;

-----------------------------------------------------------------------

Summary of changes:
 src/helper/Makefile.am            |  2 ++
 src/helper/crc32.c                | 50 +++++++++++++++++++++++++++++++++++++++
 src/helper/crc32.h                | 37 +++++++++++++++++++++++++++++
 src/target/openrisc/or1k_du_adv.c | 34 +++++---------------------
 4 files changed, 95 insertions(+), 28 deletions(-)
 create mode 100644 src/helper/crc32.c
 create mode 100644 src/helper/crc32.h


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- Log -----------------------------------------------------------------
commit 92dd917f5a2af4470b151adc3492f9b3c68caaa9
Author: Tomas Vanek <va...@fb...>
Date:   Sun Sep 4 14:18:26 2022 +0200

    flash/nor/psoc4: drop jtag_poll_mask() from flash write
    
    Polling the target makes no harm during PSoC 4 flash write in the current
    OpenOCD code. Don't mask it.
    
    Change-Id: I6625ded0162ee3a96b92188844d0d2d6c30101c2
    Signed-off-by: Tomas Vanek <va...@fb...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7162
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/flash/nor/psoc4.c b/src/flash/nor/psoc4.c
index c935bd5f2..fb462c1e5 100644
--- a/src/flash/nor/psoc4.c
+++ b/src/flash/nor/psoc4.c
@@ -651,9 +651,6 @@ static int psoc4_write(struct flash_bank *bank, const uint8_t *buffer,
 	if (row_offset)
 		memset(row_buffer, bank->default_padded_value, row_offset);
 
-	/* Mask automatic polling triggered by execution of halted events */
-	bool save_poll_mask = jtag_poll_mask();
-
 	while (count) {
 		uint32_t chunk_size = psoc4_info->row_size - row_offset;
 		if (chunk_size > count) {
@@ -693,8 +690,6 @@ static int psoc4_write(struct flash_bank *bank, const uint8_t *buffer,
 	}
 
 cleanup:
-	jtag_poll_unmask(save_poll_mask);
-
 	free(sysrq_buffer);
 	return retval;
 }

-----------------------------------------------------------------------

Summary of changes:
 src/flash/nor/psoc4.c | 5 -----
 1 file changed, 5 deletions(-)


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commit cda39f929e65316478f2f41f461b0cbb3338806c
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Jan 1 19:17:18 2023 +0100

    jtag: hla: use generic helper for commands 'jtag newtap' 'swd newdap'
    
    The commands 'jtag newtap' and 'swd newdap' have to work either on
    HLA transport and on standard JTAG/SWD. Having a dedicated
    implementation for HLA is a non-sense.
    
    Reuse the generic code jim_jtag_newtap() and drop the files
    hla_tcl.[ch] as they are now empty.
    
    Change-Id: I9dabbdc2a6f338f23b2fd3ed1a4dc3da0200c080
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7428
    Tested-by: jenkins

diff --git a/src/jtag/hla/Makefile.am b/src/jtag/hla/Makefile.am
index 41117868a..ea6e11dd6 100644
--- a/src/jtag/hla/Makefile.am
+++ b/src/jtag/hla/Makefile.am
@@ -4,10 +4,8 @@ noinst_LTLIBRARIES += %D%/libocdhla.la
 
 %C%_libocdhla_la_SOURCES = \
 	%D%/hla_transport.c \
-	%D%/hla_tcl.c \
 	%D%/hla_interface.c \
 	%D%/hla_layout.c \
 	%D%/hla_transport.h \
 	%D%/hla_interface.h \
-	%D%/hla_layout.h \
-	%D%/hla_tcl.h
+	%D%/hla_layout.h
diff --git a/src/jtag/hla/hla_interface.c b/src/jtag/hla/hla_interface.c
index 6198b3db4..f4bfeb1a1 100644
--- a/src/jtag/hla/hla_interface.c
+++ b/src/jtag/hla/hla_interface.c
@@ -17,7 +17,6 @@
 #include <transport/transport.h>
 #include <helper/time_support.h>
 
-#include <jtag/hla/hla_tcl.h>
 #include <jtag/hla/hla_layout.h>
 #include <jtag/hla/hla_transport.h>
 #include <jtag/hla/hla_interface.h>
diff --git a/src/jtag/hla/hla_layout.c b/src/jtag/hla/hla_layout.c
index a760f0b3c..51671d60a 100644
--- a/src/jtag/hla/hla_layout.c
+++ b/src/jtag/hla/hla_layout.c
@@ -18,7 +18,6 @@
 #include <helper/time_support.h>
 
 #include <jtag/hla/hla_layout.h>
-#include <jtag/hla/hla_tcl.h>
 #include <jtag/hla/hla_transport.h>
 #include <jtag/hla/hla_interface.h>
 
diff --git a/src/jtag/hla/hla_tcl.c b/src/jtag/hla/hla_tcl.c
deleted file mode 100644
index 328339955..000000000
--- a/src/jtag/hla/hla_tcl.c
+++ /dev/null
@@ -1,143 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-
-/***************************************************************************
- *   Copyright (C) 2011 by Mathias Kuester                                 *
- *   Mathias Kuester <ke...@fr...>                                   *
- *                                                                         *
- *   Copyright (C) 2012 by Spencer Oliver                                  *
- *   sp...@sp...                                                  *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-/* project specific includes */
-#include <jtag/interface.h>
-#include <transport/transport.h>
-#include <helper/time_support.h>
-
-static int jim_newtap_expected_id(struct jim_nvp *n, struct jim_getopt_info *goi,
-				  struct jtag_tap *tap)
-{
-	jim_wide w;
-	int e = jim_getopt_wide(goi, &w);
-	if (e != JIM_OK) {
-		Jim_SetResultFormatted(goi->interp, "option: %s bad parameter",
-				       n->name);
-		return e;
-	}
-
-	uint32_t *p = realloc(tap->expected_ids,
-			      (tap->expected_ids_cnt + 1) * sizeof(uint32_t));
-	if (!p) {
-		Jim_SetResultFormatted(goi->interp, "no memory");
-		return JIM_ERR;
-	}
-
-	tap->expected_ids = p;
-	tap->expected_ids[tap->expected_ids_cnt++] = w;
-
-	return JIM_OK;
-}
-
-#define NTAP_OPT_IRLEN     0
-#define NTAP_OPT_IRMASK    1
-#define NTAP_OPT_IRCAPTURE 2
-#define NTAP_OPT_ENABLED   3
-#define NTAP_OPT_DISABLED  4
-#define NTAP_OPT_EXPECTED_ID 5
-#define NTAP_OPT_VERSION   6
-#define NTAP_OPT_BYPASS    7
-
-static int jim_hl_newtap_cmd(struct jim_getopt_info *goi)
-{
-	struct jtag_tap *tap;
-	int x;
-	int e;
-	struct jim_nvp *n;
-	char *cp;
-	const struct jim_nvp opts[] = {
-		{ .name = "-irlen",       .value = NTAP_OPT_IRLEN },
-		{ .name = "-irmask",       .value = NTAP_OPT_IRMASK },
-		{ .name = "-ircapture",       .value = NTAP_OPT_IRCAPTURE },
-		{ .name = "-enable",       .value = NTAP_OPT_ENABLED },
-		{ .name = "-disable",       .value = NTAP_OPT_DISABLED },
-		{ .name = "-expected-id",       .value = NTAP_OPT_EXPECTED_ID },
-		{ .name = "-ignore-version",       .value = NTAP_OPT_VERSION },
-		{ .name = "-ignore-bypass",       .value = NTAP_OPT_BYPASS },
-		{ .name = NULL, .value = -1},
-	};
-
-	tap = calloc(1, sizeof(struct jtag_tap));
-	if (!tap) {
-		Jim_SetResultFormatted(goi->interp, "no memory");
-		return JIM_ERR;
-	}
-
-	/*
-	 * we expect CHIP + TAP + OPTIONS
-	 * */
-	if (goi->argc < 3) {
-		Jim_SetResultFormatted(goi->interp,
-				       "Missing CHIP TAP OPTIONS ....");
-		free(tap);
-		return JIM_ERR;
-	}
-
-	const char *tmp;
-	jim_getopt_string(goi, &tmp, NULL);
-	tap->chip = strdup(tmp);
-
-	jim_getopt_string(goi, &tmp, NULL);
-	tap->tapname = strdup(tmp);
-
-	/* name + dot + name + null */
-	x = strlen(tap->chip) + 1 + strlen(tap->tapname) + 1;
-	cp = malloc(x);
-	sprintf(cp, "%s.%s", tap->chip, tap->tapname);
-	tap->dotted_name = cp;
-
-	LOG_DEBUG("Creating New Tap, Chip: %s, Tap: %s, Dotted: %s, %d params",
-		  tap->chip, tap->tapname, tap->dotted_name, goi->argc);
-
-	while (goi->argc) {
-		e = jim_getopt_nvp(goi, opts, &n);
-		if (e != JIM_OK) {
-			jim_getopt_nvp_unknown(goi, opts, 0);
-			free(cp);
-			free(tap);
-			return e;
-		}
-		LOG_DEBUG("Processing option: %s", n->name);
-		switch (n->value) {
-		case NTAP_OPT_EXPECTED_ID:
-			e = jim_newtap_expected_id(n, goi, tap);
-			if (e != JIM_OK) {
-				free(cp);
-				free(tap);
-				return e;
-			}
-			break;
-		case NTAP_OPT_IRLEN:
-		case NTAP_OPT_IRMASK:
-		case NTAP_OPT_IRCAPTURE:
-			/* dummy read to ignore the next argument */
-			jim_getopt_wide(goi, NULL);
-			break;
-		}		/* switch (n->value) */
-	}			/* while (goi->argc) */
-
-	/* default is enabled-after-reset */
-	tap->enabled = !tap->disabled_after_reset;
-
-	jtag_tap_init(tap);
-	return JIM_OK;
-}
-
-int jim_hl_newtap(Jim_Interp *interp, int argc, Jim_Obj * const *argv)
-{
-	struct jim_getopt_info goi;
-	jim_getopt_setup(&goi, interp, argc - 1, argv + 1);
-	return jim_hl_newtap_cmd(&goi);
-}
diff --git a/src/jtag/hla/hla_tcl.h b/src/jtag/hla/hla_tcl.h
deleted file mode 100644
index b028e4b50..000000000
--- a/src/jtag/hla/hla_tcl.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-
-/***************************************************************************
- *   Copyright (C) 2011 by Mathias Kuester                                 *
- *   Mathias Kuester <ke...@fr...>                                   *
- *                                                                         *
- *   Copyright (C) 2012 by Spencer Oliver                                  *
- *   sp...@sp...                                                  *
- ***************************************************************************/
-
-#ifndef OPENOCD_JTAG_HLA_HLA_TCL_H
-#define OPENOCD_JTAG_HLA_HLA_TCL_H
-
-/** */
-int jim_hl_newtap(Jim_Interp *interp, int argc, Jim_Obj * const *argv);
-
-#endif /* OPENOCD_JTAG_HLA_HLA_TCL_H */
diff --git a/src/jtag/hla/hla_transport.c b/src/jtag/hla/hla_transport.c
index 91228bed2..004e9f0c5 100644
--- a/src/jtag/hla/hla_transport.c
+++ b/src/jtag/hla/hla_transport.c
@@ -18,7 +18,6 @@
 #include <transport/transport.h>
 #include <helper/time_support.h>
 #include <target/target.h>
-#include <jtag/hla/hla_tcl.h>
 #include <jtag/hla/hla_transport.h>
 #include <jtag/hla/hla_interface.h>
 
@@ -38,7 +37,7 @@ static const struct command_registration hl_swd_transport_subcommand_handlers[]
 	{
 	 .name = "newdap",
 	 .mode = COMMAND_CONFIG,
-	 .jim_handler = jim_hl_newtap,
+	 .jim_handler = jim_jtag_newtap,
 	 .help = "declare a new SWD DAP",
 	 },
 	COMMAND_REGISTRATION_DONE
@@ -59,7 +58,7 @@ static const struct command_registration hl_transport_jtag_subcommand_handlers[]
 	{
 	 .name = "newtap",
 	 .mode = COMMAND_CONFIG,
-	 .jim_handler = jim_hl_newtap,
+	 .jim_handler = jim_jtag_newtap,
 	 .help = "Create a new TAP instance named basename.tap_type, "
 	 "and appends it to the scan chain.",
 	 .usage = "basename tap_type '-irlen' count "

commit 7a890a8f256f28b1c8b0dde3b62ab81c7c139d55
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Jan 1 18:26:53 2023 +0100

    jtag: parse command options in 'swd newdap'
    
    The same code is currently used for commands 'jtag newtap' and
    'swd newdap' (plus dapdirect versions), but for SWD case the code
    skips the parsing of the command line as not every flag is used.
    This has the drawback that syntax errors get unchecked.
    
    Move the check about the transport so the command line get always
    parsed even when the corresponding flags are not useful.
    
    Change-Id: I596c3beb04e9e8a9ebe6ee68a61395b679d43b3e
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7427
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c
index b1815b79d..fc0d562e2 100644
--- a/src/jtag/tcl.c
+++ b/src/jtag/tcl.c
@@ -557,13 +557,6 @@ static int jim_newtap_cmd(struct jim_getopt_info *goi)
 	LOG_DEBUG("Creating New Tap, Chip: %s, Tap: %s, Dotted: %s, %d params",
 		tap->chip, tap->tapname, tap->dotted_name, goi->argc);
 
-	if (!transport_is_jtag()) {
-		/* SWD doesn't require any JTAG tap parameters */
-		tap->enabled = true;
-		jtag_tap_init(tap);
-		return JIM_OK;
-	}
-
 	/* IEEE specifies that the two LSBs of an IR scan are 01, so make
 	 * that the default.  The "-ircapture" and "-irmask" options are only
 	 * needed to cope with nonstandard TAPs, or to specify more bits.
@@ -618,7 +611,7 @@ static int jim_newtap_cmd(struct jim_getopt_info *goi)
 	tap->enabled = !tap->disabled_after_reset;
 
 	/* Did all the required option bits get cleared? */
-	if (tap->ir_length != 0) {
+	if (!transport_is_jtag() || tap->ir_length != 0) {
 		jtag_tap_init(tap);
 		return JIM_OK;
 	}

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/hla/Makefile.am     |   4 +-
 src/jtag/hla/hla_interface.c |   1 -
 src/jtag/hla/hla_layout.c    |   1 -
 src/jtag/hla/hla_tcl.c       | 143 -------------------------------------------
 src/jtag/hla/hla_tcl.h       |  17 -----
 src/jtag/hla/hla_transport.c |   5 +-
 src/jtag/tcl.c               |   9 +--
 7 files changed, 4 insertions(+), 176 deletions(-)
 delete mode 100644 src/jtag/hla/hla_tcl.c
 delete mode 100644 src/jtag/hla/hla_tcl.h


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From: openocd-gerrit <ope...@us...> - 2023-01-15 15:11:54

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- Log -----------------------------------------------------------------
commit 69571354f4741f791a4a70c68ca082f765f98c88
Author: Marian Buschsieweke <mar...@ov...>
Date:   Wed Dec 21 11:00:53 2022 +0100

    .gitignore: Add .cache and compile_commands.json
    
    Enhancing the editor / IDE experience with the use of the language
    server protocol (lsp) is getting more and more common. The most widely
    used lsp implementation for C/C++ outside of Redmond is clangd.
    
    Clangd uses compile_commands.json, that contains the compiler invocation
    for each compilation unit, to get the required $CFLAGS to successfully
    located header files etc. This is best automatically generated from with
    bear on Makefile based build systems. Hence, there is little value in
    adding it to the git repo.
    
    In addition, clangd generates cache files in the .cache folder. Again,
    there is no reason in tracking it with git.
    
    Change-Id: Ic5165d10aca3a1cc9e9398af9dd2fbf0977608b3
    Signed-off-by: Marian Buschsieweke <mar...@ov...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7414
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/.gitignore b/.gitignore
index 818bb0cd3..103dad2c7 100644
--- a/.gitignore
+++ b/.gitignore
@@ -103,3 +103,11 @@ GTAGS
 
 # checkpatch script files
 .checkpatch-camelcase.*
+
+# clangd (e.g. for advanced code completion and linting) generates cache files
+# into .cache
+.cache
+
+# A compile_commands.json can be generated using bear and will help tools such
+# as clangd to locate header files and use correct $CFLAGS
+compile_commands.json

-----------------------------------------------------------------------

Summary of changes:
 .gitignore | 8 ++++++++
 1 file changed, 8 insertions(+)


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From: openocd-gerrit <ope...@us...> - 2023-01-15 15:11:32

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The branch, master has been updated
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      from  a3ed12401b1f7d9578fb7da881d3504e07acfc27 (commit)

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- Log -----------------------------------------------------------------
commit dbb42ca18d471b6bffddbd441b1da2ffe18d7400
Author: Marc Schink <de...@za...>
Date:   Wed Dec 7 13:13:04 2022 +0100

    flash/nor/stm32l4x: Add revision 'X' and 'C' for STM32U575/585 devices
    
    Change-Id: I4d950dc0a1421036418f2e5c1f0ed8eca86efc1a
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7390
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c
index 92d511c17..c67dbf75d 100644
--- a/src/flash/nor/stm32l4x.c
+++ b/src/flash/nor/stm32l4x.c
@@ -327,6 +327,7 @@ static const struct stm32l4_rev stm32g49_g4axx_revs[] = {
 
 static const struct stm32l4_rev stm32u57_u58xx_revs[] = {
 	{ 0x1000, "A" }, { 0x1001, "Z" }, { 0x1003, "Y" }, { 0x2000, "B" },
+	{ 0x2001, "X" }, { 0x3000, "C" },
 };
 
 static const struct stm32l4_rev stm32wb1xx_revs[] = {

-----------------------------------------------------------------------

Summary of changes:
 src/flash/nor/stm32l4x.c | 1 +
 1 file changed, 1 insertion(+)


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- Log -----------------------------------------------------------------
commit a3ed12401b1f7d9578fb7da881d3504e07acfc27
Author: Antonio Borneo <bor...@gm...>
Date:   Tue Nov 29 00:34:44 2022 +0100

    tcl/target: enable -rtos hwthread
    
    The rtos hwthread has been merged in 2019 with commit 85ba2dc4c6ab
    ("rtos/hwthread: add hardware-thread pseudo rtos").
    During review in patchset 19 the name of the rtos has been changed
    from 'hawt' to 'hwthread'.
    
    Some target config file was already merged ready for hwthread, but
    keeping the relevant lines commented and still reporting the old
    name.
    
    Enable rtos hwtread to the target that were supposed to use it.
    Fix the name of the rtos.
    
    Change-Id: I877862dcdba39f26462bb542bac06d1a5f5f222d
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7384
    Tested-by: jenkins

diff --git a/tcl/target/hi3798.cfg b/tcl/target/hi3798.cfg
index 4373962e4..722305dcf 100644
--- a/tcl/target/hi3798.cfg
+++ b/tcl/target/hi3798.cfg
@@ -42,8 +42,7 @@ for { set _core 0 } { $_core < $_cores } { incr _core 1 } {
         #set _command "$_command -defer-examine"
         set _smp_command "$_smp_command ${_TARGETNAME}$_core"
     } else {
-        # uncomment when "hawt" rtos is merged
-        # set _command "$_command -rtos hawt"
+        set _command "$_command -rtos hwthread"
         set _smp_command "target smp ${_TARGETNAME}$_core"
     }
 
diff --git a/tcl/target/hi6220.cfg b/tcl/target/hi6220.cfg
index f5f7fc9a4..5b0389925 100644
--- a/tcl/target/hi6220.cfg
+++ b/tcl/target/hi6220.cfg
@@ -49,8 +49,7 @@ for { set _core 0 } { $_core < $_cores } { incr _core 1 } {
         set _command "$_command -defer-examine"
         set _smp_command "$_smp_command ${_TARGETNAME}$_core"
     } else {
-        # uncomment when "hawt" rtos is merged
-        # set _command "$_command -rtos hawt"
+        set _command "$_command -rtos hwthread"
         set _smp_command "target smp ${_TARGETNAME}$_core"
     }
 
diff --git a/tcl/target/marvell/88f37x0.cfg b/tcl/target/marvell/88f37x0.cfg
index d80f4ef6f..738d22110 100644
--- a/tcl/target/marvell/88f37x0.cfg
+++ b/tcl/target/marvell/88f37x0.cfg
@@ -57,8 +57,7 @@ for { set _core 0 } { $_core < $_cores } { incr _core 1 } {
         set _command "$_command -defer-examine"
         set _smp_command "$_smp_command ${_TARGETNAME}$_core"
     } else {
-        # uncomment when "hawt" rtos is merged
-        # set _command "$_command -rtos hawt"
+        set _command "$_command -rtos hwthread"
         set _smp_command "target smp ${_TARGETNAME}$_core"
     }
 
diff --git a/tcl/target/xilinx_zynqmp.cfg b/tcl/target/xilinx_zynqmp.cfg
index 893372978..9734a1837 100644
--- a/tcl/target/xilinx_zynqmp.cfg
+++ b/tcl/target/xilinx_zynqmp.cfg
@@ -86,8 +86,7 @@ for { set _core 0 } { $_core < $_cores } { incr _core } {
         set _command "$_command -defer-examine"
         set _smp_command "$_smp_command $_TARGETNAME.$_core"
     } else {
-        # uncomment when "hawt" rtos is merged
-        #set _command "$_command -rtos hawt"
+        set _command "$_command -rtos hwthread"
         set _smp_command "target smp $_TARGETNAME.$_core"
     }
 

-----------------------------------------------------------------------

Summary of changes:
 tcl/target/hi3798.cfg          | 3 +--
 tcl/target/hi6220.cfg          | 3 +--
 tcl/target/marvell/88f37x0.cfg | 3 +--
 tcl/target/xilinx_zynqmp.cfg   | 3 +--
 4 files changed, 4 insertions(+), 8 deletions(-)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-35-g5292c7eae

From: openocd-gerrit <ope...@us...> - 2023-01-15 15:10:42

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The branch, master has been updated
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- Log -----------------------------------------------------------------
commit 5292c7eae925d59d6b6c0017b6a4995d39a6e9ee
Author: Tomas Vanek <va...@fb...>
Date:   Thu Nov 24 14:21:59 2022 +0100

    jtag/drivers/cmsis_dap: prevent conn/discon workaround before line reset
    
    The line reset SWD sequence is used quite often in SWD multidrop mode.
    Prevent the ugly connect/disconnect adapter firmware bug workaround
    to be called before each line reset.
    
    Signed-off-by: Tomas Vanek <va...@fb...>
    Change-Id: Id85bff075dba9077e4e501e2cdcfd64d5d9d0531
    Reviewed-on: https://review.openocd.org/c/openocd/+/7381
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/jtag/drivers/cmsis_dap.c b/src/jtag/drivers/cmsis_dap.c
index d2c30cc79..0c42a7f1e 100644
--- a/src/jtag/drivers/cmsis_dap.c
+++ b/src/jtag/drivers/cmsis_dap.c
@@ -1158,7 +1158,9 @@ static int cmsis_dap_swd_switch_seq(enum swd_special_seq seq)
 	unsigned int s_len;
 	int retval;
 
-	if ((output_pins & (SWJ_PIN_SRST | SWJ_PIN_TRST)) == (SWJ_PIN_SRST | SWJ_PIN_TRST)) {
+	if (seq != LINE_RESET &&
+			(output_pins & (SWJ_PIN_SRST | SWJ_PIN_TRST))
+				== (SWJ_PIN_SRST | SWJ_PIN_TRST)) {
 		/* Following workaround deasserts reset on most adapters.
 		 * Do not reconnect if a reset line is active!
 		 * Reconnecting would break connecting under reset. */

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/cmsis_dap.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-34-g630cb5ea4

From: openocd-gerrit <ope...@us...> - 2023-01-15 15:10:28

This is an automated email from the git hooks/post-receive script. It was
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The branch, master has been updated
       via  630cb5ea4d65edba42d1c77fa17d9fe78f7b38c2 (commit)
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- Log -----------------------------------------------------------------
commit 630cb5ea4d65edba42d1c77fa17d9fe78f7b38c2
Author: Tomas Vanek <va...@fb...>
Date:   Tue Nov 22 12:29:52 2022 +0100

    jtag/drivers/cmsis_dap: speed up long transfers using DAP_TransferBlock
    
    DAP_TransferBlock command saves n - 3 bytes in comparison to DAP_Transfer,
    where n is number of transfers.
    
    Use DAP_TransferBlock optionaly to save some USB bandwidth.
    
    The change increases the speed of the write transfer
    from 40 KiB/s to 42 KiB/s @ USB FS, adapter speed 1000.
    
    Signed-off-by: Tomas Vanek <va...@fb...>
    Change-Id: Ifde0159cfd44481d2b81b90daa088e731c03e26d
    Reviewed-on: https://review.openocd.org/c/openocd/+/7372
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/jtag/drivers/cmsis_dap.c b/src/jtag/drivers/cmsis_dap.c
index 10e663862..d2c30cc79 100644
--- a/src/jtag/drivers/cmsis_dap.c
+++ b/src/jtag/drivers/cmsis_dap.c
@@ -160,6 +160,11 @@ static bool swd_mode;
 #define CMD_DAP_TFER_BLOCK        0x06
 #define CMD_DAP_TFER_ABORT        0x07
 
+/* DAP_TransferBlock increases the sum of command/response sizes
+ * (due to 16-bit Transfer Count) if used in a small packet.
+ * Prevent using it until we have at least r/w operations. */
+#define CMD_DAP_TFER_BLOCK_MIN_OPS 4
+
 /* DAP Status Code */
 #define DAP_OK                    0
 #define DAP_ERROR                 0xFF
@@ -756,8 +761,9 @@ static void cmsis_dap_swd_write_from_queue(struct cmsis_dap *dap)
 	dap->write_count = 0;
 	dap->read_count = 0;
 
-	LOG_DEBUG_IO("Executing %d queued transactions from FIFO index %u",
-			  block->transfer_count, dap->pending_fifo_put_idx);
+	LOG_DEBUG_IO("Executing %d queued transactions from FIFO index %u%s",
+				 block->transfer_count, dap->pending_fifo_put_idx,
+				 cmsis_dap_handle->swd_cmds_differ ? "" : ", same swd ops");
 
 	if (queued_retval != ERROR_OK) {
 		LOG_DEBUG("Skipping due to previous errors: %d", queued_retval);
@@ -767,10 +773,21 @@ static void cmsis_dap_swd_write_from_queue(struct cmsis_dap *dap)
 	if (block->transfer_count == 0)
 		goto skip;
 
-	command[0] = CMD_DAP_TFER;
+	bool block_cmd = !cmsis_dap_handle->swd_cmds_differ
+					 && block->transfer_count >= CMD_DAP_TFER_BLOCK_MIN_OPS;
+	block->command = block_cmd ? CMD_DAP_TFER_BLOCK : CMD_DAP_TFER;
+
+	command[0] = block->command;
 	command[1] = 0x00;	/* DAP Index */
-	command[2] = block->transfer_count;
-	size_t idx = 3;
+
+	unsigned int idx;
+	if (block_cmd) {
+		h_u16_to_le(&command[2], block->transfer_count);
+		idx = 4;	/* The first transfer will store the common DAP register */
+	} else {
+		command[2] = block->transfer_count;
+		idx = 3;
+	}
 
 	for (unsigned int i = 0; i < block->transfer_count; i++) {
 		struct pending_transfer_result *transfer = &(block->transfers[i]);
@@ -801,7 +818,9 @@ static void cmsis_dap_swd_write_from_queue(struct cmsis_dap *dap)
 			data &= ~CORUNDETECT;
 		}
 
-		command[idx++] = (cmd >> 1) & 0x0f;
+		if (!block_cmd || i == 0)
+			command[idx++] = (cmd >> 1) & 0x0f;
+
 		if (!(cmd & SWD_CMD_RNW)) {
 			h_u32_to_le(&command[idx], data);
 			idx += 4;
@@ -846,20 +865,28 @@ static void cmsis_dap_swd_read_process(struct cmsis_dap *dap, int timeout_ms)
 	}
 
 	uint8_t *resp = dap->response;
-	if (resp[0] != CMD_DAP_TFER) {
+	if (resp[0] != block->command) {
 		LOG_ERROR("CMSIS-DAP command mismatch. Expected 0x%x received 0x%" PRIx8,
-			CMD_DAP_TFER, resp[0]);
+			block->command, resp[0]);
 		queued_retval = ERROR_FAIL;
 		goto skip;
 	}
 
-	unsigned int transfer_count = resp[1];
-	uint8_t ack = resp[2] & 0x07;
-	if (resp[2] & 0x08) {
+	unsigned int transfer_count;
+	unsigned int idx;
+	if (block->command == CMD_DAP_TFER_BLOCK) {
+		transfer_count = le_to_h_u16(&resp[1]);
+		idx = 3;
+	} else {
+		transfer_count = resp[1];
+		idx = 2;
+	}
+	if (resp[idx] & 0x08) {
 		LOG_DEBUG("CMSIS-DAP Protocol Error @ %d (wrong parity)", transfer_count);
 		queued_retval = ERROR_FAIL;
 		goto skip;
 	}
+	uint8_t ack = resp[idx++] & 0x07;
 	if (ack != SWD_ACK_OK) {
 		LOG_DEBUG("SWD ack not OK @ %d %s", transfer_count,
 			  ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK");
@@ -874,7 +901,7 @@ static void cmsis_dap_swd_read_process(struct cmsis_dap *dap, int timeout_ms)
 
 	LOG_DEBUG_IO("Received results of %d queued transactions FIFO index %u timeout %i",
 		 transfer_count, dap->pending_fifo_get_idx, timeout_ms);
-	unsigned int idx = 3;
+
 	for (unsigned int i = 0; i < transfer_count; i++) {
 		struct pending_transfer_result *transfer = &(block->transfers[i]);
 		if (transfer->cmd & SWD_CMD_RNW) {
@@ -923,19 +950,30 @@ static int cmsis_dap_swd_run_queue(void)
 }
 
 static unsigned int cmsis_dap_tfer_cmd_size(unsigned int write_count,
-											unsigned int read_count)
+							unsigned int read_count, bool block_tfer)
 {
-	unsigned int size = 3;			/* header */
-	size += write_count * (1 + 4);	/* DAP register + data */
-	size += read_count;				/* DAP register */
+	unsigned int size;
+	if (block_tfer) {
+		size = 5;						/* DAP_TransferBlock header */
+		size += write_count * 4;		/* data */
+	} else {
+		size = 3;						/* DAP_Transfer header */
+		size += write_count * (1 + 4);	/* DAP register + data */
+		size += read_count;				/* DAP register */
+	}
 	return size;
 }
 
 static unsigned int cmsis_dap_tfer_resp_size(unsigned int write_count,
-											 unsigned int read_count)
+							unsigned int read_count, bool block_tfer)
 {
-	unsigned int size = 3;			/* header */
-	size += read_count * 4;			/* data */
+	unsigned int size;
+	if (block_tfer)
+		size = 4;						/* DAP_TransferBlock response header */
+	else
+		size = 3;						/* DAP_Transfer response header */
+
+	size += read_count * 4;				/* data */
 	return size;
 }
 
@@ -947,13 +985,22 @@ static void cmsis_dap_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data)
 
 	unsigned int write_count = cmsis_dap_handle->write_count;
 	unsigned int read_count = cmsis_dap_handle->read_count;
+	bool block_cmd;
+	if (write_count + read_count < CMD_DAP_TFER_BLOCK_MIN_OPS)
+		block_cmd = false;
+	else
+		block_cmd = !cmsis_dap_handle->swd_cmds_differ
+					&& cmd == cmsis_dap_handle->common_swd_cmd;
+
 	if (cmd & SWD_CMD_RNW)
 		read_count++;
 	else
 		write_count++;
 
-	unsigned int cmd_size = cmsis_dap_tfer_cmd_size(write_count, read_count);
-	unsigned int resp_size = cmsis_dap_tfer_resp_size(write_count, read_count);
+	unsigned int cmd_size = cmsis_dap_tfer_cmd_size(write_count, read_count,
+													block_cmd);
+	unsigned int resp_size = cmsis_dap_tfer_resp_size(write_count, read_count,
+													block_cmd);
 
 	/* Does the DAP Transfer command and the expected response fit into one packet?
 	 * Run the queue also before a targetsel - it cannot be queued */
@@ -984,6 +1031,13 @@ static void cmsis_dap_swd_queue_cmd(uint8_t cmd, uint32_t *dst, uint32_t data)
 	struct pending_transfer_result *transfer = &(block->transfers[block->transfer_count]);
 	transfer->data = data;
 	transfer->cmd = cmd;
+	if (block->transfer_count == 0) {
+		cmsis_dap_handle->swd_cmds_differ = false;
+		cmsis_dap_handle->common_swd_cmd = cmd;
+	} else if (cmd != cmsis_dap_handle->common_swd_cmd) {
+		cmsis_dap_handle->swd_cmds_differ = true;
+	}
+
 	if (cmd & SWD_CMD_RNW) {
 		/* Queue a read transaction */
 		transfer->buffer = dst;
diff --git a/src/jtag/drivers/cmsis_dap.h b/src/jtag/drivers/cmsis_dap.h
index 1c30975da..16885a51d 100644
--- a/src/jtag/drivers/cmsis_dap.h
+++ b/src/jtag/drivers/cmsis_dap.h
@@ -21,6 +21,7 @@ struct pending_transfer_result {
 struct pending_request_block {
 	struct pending_transfer_result *transfers;
 	unsigned int transfer_count;
+	uint8_t command;
 };
 
 struct cmsis_dap {
@@ -33,11 +34,17 @@ struct cmsis_dap {
 	uint8_t *command;
 	uint8_t *response;
 
-	/* DAP register r/w operation counters used for checking the packet size
+	/* DP/AP register r/w operation counters used for checking the packet size
 	 * that would result from the queue run */
 	unsigned int write_count;
 	unsigned int read_count;
 
+	/* We can use DAP_TransferBlock only if all SWD operations in the packet
+	 * are either all writes or all reads and use the same DP/AP register.
+	 * The following variables keep track of it */
+	uint8_t common_swd_cmd;
+	bool swd_cmds_differ;
+
 	/* Pending requests are organized as a FIFO - circular buffer */
 	struct pending_request_block pending_fifo[MAX_PENDING_REQUESTS];
 	unsigned int packet_count;

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/cmsis_dap.c | 96 ++++++++++++++++++++++++++++++++++----------
 src/jtag/drivers/cmsis_dap.h |  9 ++++-
 2 files changed, 83 insertions(+), 22 deletions(-)


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