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From: Øyvind H. <go...@us...> - 2010-03-17 07:42:21
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 051e2c99ab8111f6bffdb412b40ceef333530ae6 (commit)
via 7e447043cd7967bd9b8976d829d5cb79bf359d3c (commit)
from 1d9fba8c1488c3774c8bde737c2d658b1f525d09 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 051e2c99ab8111f6bffdb412b40ceef333530ae6
Author: Ãyvind Harboe <oyv...@zy...>
Date: Tue Mar 16 14:45:07 2010 +0100
gdb_server: improved gdb load performance
by ack'ing memory writes immediately and reporting either
at next memory write or stepi/continue time. GDB will then
send off a new packet that is ready by the time the previous
packet has been written to target memory.
On faster adapters this can be as much as 10% improvement.
Signed-off-by: Ãyvind Harboe <oyv...@zy...>
diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c
index 17ca439..f46980e 100644
--- a/src/server/gdb_server.c
+++ b/src/server/gdb_server.c
@@ -2,7 +2,7 @@
* Copyright (C) 2005 by Dominic Rath *
* Dom...@gm... *
* *
- * Copyright (C) 2007-2009 Ãyvind Harboe *
+ * Copyright (C) 2007-2010 Ãyvind Harboe *
* oyv...@zy... *
* *
* Copyright (C) 2008 by Spencer Oliver *
@@ -61,7 +61,12 @@ struct gdb_connection
bool sync; /* set flag to true if you want the next stepi to return immediately.
allowing GDB to pick up a fresh set of register values from the target
without modifying the target state. */
-
+ /* We delay reporting memory write errors until next step/continue or memory
+ * write. This improves performance of gdb load significantly as the GDB packet
+ * can be replied immediately and a new GDB packet will be ready without delay
+ * (ca. 10% or so...).
+ */
+ bool mem_write_error;
};
@@ -821,6 +826,7 @@ static int gdb_new_connection(struct connection *connection)
gdb_connection->busy = 0;
gdb_connection->noack_mode = 0;
gdb_connection->sync = true;
+ gdb_connection->mem_write_error = false;
/* send ACK to GDB for debug request */
gdb_write(connection, "+", 1);
@@ -1361,7 +1367,7 @@ static int gdb_write_memory_binary_packet(struct connection *connection,
uint32_t addr = 0;
uint32_t len = 0;
- int retval;
+ int retval = ERROR_OK;
/* skip command character */
packet++;
@@ -1382,14 +1388,18 @@ static int gdb_write_memory_binary_packet(struct connection *connection,
return ERROR_SERVER_REMOTE_CLOSED;
}
- retval = ERROR_OK;
- if (len)
- {
- LOG_DEBUG("addr: 0x%8.8" PRIx32 ", len: 0x%8.8" PRIx32 "", addr, len);
+ struct gdb_connection *gdb_connection = connection->priv;
- retval = target_write_buffer(target, addr, len, (uint8_t*)separator);
+ if (gdb_connection->mem_write_error)
+ {
+ retval = ERROR_FAIL;
+ /* now that we have reported the memory write error, we can clear the condition */
+ gdb_connection->mem_write_error = false;
}
+ /* By replying the packet *immediately* GDB will send us a new packet
+ * while we write the last one to the target.
+ */
if (retval == ERROR_OK)
{
gdb_put_packet(connection, "OK", 2);
@@ -1400,6 +1410,17 @@ static int gdb_write_memory_binary_packet(struct connection *connection,
return retval;
}
+ if (len)
+ {
+ LOG_DEBUG("addr: 0x%8.8" PRIx32 ", len: 0x%8.8" PRIx32 "", addr, len);
+
+ retval = target_write_buffer(target, addr, len, (uint8_t*)separator);
+ if (retval != ERROR_OK)
+ {
+ gdb_connection->mem_write_error = true;
+ }
+ }
+
return ERROR_OK;
}
@@ -2211,6 +2232,14 @@ static int gdb_input_inner(struct connection *connection)
struct gdb_connection *gdb_con = connection->priv;
log_add_callback(gdb_log_callback, connection);
+ if (gdb_con->mem_write_error)
+ {
+ LOG_ERROR("Memory write failure!");
+
+ /* now that we have reported the memory write error, we can clear the condition */
+ gdb_con->mem_write_error = false;
+ }
+
bool nostep = false;
bool already_running = false;
if (target->state == TARGET_RUNNING)
commit 7e447043cd7967bd9b8976d829d5cb79bf359d3c
Author: Ãyvind Harboe <oyv...@zy...>
Date: Tue Mar 16 11:40:52 2010 +0100
zy1000: tweak the DCC inner loop a tiny bit
Uses FIFO a bit more efficiently now.
Signed-off-by: Ãyvind Harboe <oyv...@zy...>
diff --git a/src/jtag/zy1000/zy1000.c b/src/jtag/zy1000/zy1000.c
index 005a4e0..177d286 100644
--- a/src/jtag/zy1000/zy1000.c
+++ b/src/jtag/zy1000/zy1000.c
@@ -839,7 +839,7 @@ void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer,
int post_bits;
jtag_pre_post_bits(tap, &pre_bits, &post_bits);
- if ((pre_bits > 32) || (post_bits > 32))
+ if (pre_bits + post_bits + 6 > 32)
{
int i;
for (i = 0; i < count; i++)
@@ -854,15 +854,18 @@ void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer,
if (post_bits == 0)
shift_end_state = end_state;
+ shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
int i;
- for (i = 0; i < count; i++)
+ for (i = 0; i < count - 1; i++)
{
- shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
+ /* Fewer pokes means we get to use the FIFO more efficiently */
shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, little));
- shiftValueInner(TAP_DRSHIFT, shift_end_state, 6, reg_addr | (1 << 5));
- shiftValueInner(shift_end_state, end_state, post_bits, 0);
+ shiftValueInner(TAP_DRSHIFT, shift_end_state, 6 + post_bits + pre_bits, (reg_addr | (1 << 5)));
buffer += 4;
}
+ shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, little));
+ shiftValueInner(TAP_DRSHIFT, shift_end_state, 6, reg_addr | (1 << 5));
+ shiftValueInner(shift_end_state, end_state, post_bits, 0);
}
}
-----------------------------------------------------------------------
Summary of changes:
src/jtag/zy1000/zy1000.c | 13 ++++++++-----
src/server/gdb_server.c | 45 +++++++++++++++++++++++++++++++++++++--------
2 files changed, 45 insertions(+), 13 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: Øyvind H. <go...@us...> - 2010-03-17 07:41:23
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 1d9fba8c1488c3774c8bde737c2d658b1f525d09 (commit)
from 6f8b8593d63bc9781435270a54b6f7d245eecd8e (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 1d9fba8c1488c3774c8bde737c2d658b1f525d09
Author: Ãyvind Harboe <oyv...@zy...>
Date: Tue Mar 16 10:58:21 2010 +0100
arm7/9: remove unused post_restore_context
Unused. If something should happen after context restore, then the
calling code can just do it afterwards.
Signed-off-by: Ãyvind Harboe <oyv...@zy...>
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index f9deb83..d1e7a93 100644
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -1726,9 +1726,6 @@ int arm7_9_restore_context(struct target *target)
arm7_9->write_pc(target, buf_get_u32(armv4_5->pc->value, 0, 32));
armv4_5->pc->dirty = 0;
- if (arm7_9->post_restore_context)
- arm7_9->post_restore_context(target);
-
return ERROR_OK;
}
diff --git a/src/target/arm7_9_common.h b/src/target/arm7_9_common.h
index 93bee07..71f9a9d 100644
--- a/src/target/arm7_9_common.h
+++ b/src/target/arm7_9_common.h
@@ -103,9 +103,6 @@ struct arm7_9_common
void (*post_debug_entry)(struct target *target); /**< Callback function called after entering debug mode */
void (*pre_restore_context)(struct target *target); /**< Callback function called before restoring the processor context */
- void (*post_restore_context)(struct target *target); /**< Callback function called after restoring the processor context */
-
-
};
static inline struct arm7_9_common *
diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c
index bd29caf..ab8a3e5 100644
--- a/src/target/arm7tdmi.c
+++ b/src/target/arm7tdmi.c
@@ -685,7 +685,6 @@ int arm7tdmi_init_arch_info(struct target *target,
arm7_9->post_debug_entry = NULL;
arm7_9->pre_restore_context = NULL;
- arm7_9->post_restore_context = NULL;
/* initialize arch-specific breakpoint handling */
arm7_9->arm_bkpt = 0xdeeedeee;
diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c
index 7c1e372..f3935a3 100644
--- a/src/target/arm9tdmi.c
+++ b/src/target/arm9tdmi.c
@@ -787,7 +787,6 @@ int arm9tdmi_init_arch_info(struct target *target,
arm7_9->post_debug_entry = NULL;
arm7_9->pre_restore_context = NULL;
- arm7_9->post_restore_context = NULL;
/* initialize arch-specific breakpoint handling */
arm7_9->arm_bkpt = 0xdeeedeee;
diff --git a/src/target/armv7a.h b/src/target/armv7a.h
index 5ef8c42..621761d 100644
--- a/src/target/armv7a.h
+++ b/src/target/armv7a.h
@@ -65,8 +65,6 @@ struct armv7a_common
void (*post_debug_entry)(struct target *target);
void (*pre_restore_context)(struct target *target);
- void (*post_restore_context)(struct target *target);
-
};
static inline struct armv7a_common *
diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index 1216a45..f0829c6 100644
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -139,9 +139,6 @@ int armv7m_restore_context(struct target *target)
}
}
- if (armv7m->post_restore_context)
- armv7m->post_restore_context(target);
-
return ERROR_OK;
}
diff --git a/src/target/armv7m.h b/src/target/armv7m.h
index 51d6704..57d46ed 100644
--- a/src/target/armv7m.h
+++ b/src/target/armv7m.h
@@ -124,7 +124,6 @@ struct armv7m_common
void (*post_debug_entry)(struct target *target);
void (*pre_restore_context)(struct target *target);
- void (*post_restore_context)(struct target *target);
};
static inline struct armv7m_common *
diff --git a/src/target/cortex_a8.c b/src/target/cortex_a8.c
index 332a55a..a548027 100644
--- a/src/target/cortex_a8.c
+++ b/src/target/cortex_a8.c
@@ -1020,9 +1020,6 @@ static int cortex_a8_restore_context(struct target *target, bool bpwp)
arm_dpm_write_dirty_registers(&armv7a->dpm, bpwp);
- if (armv7a->post_restore_context)
- armv7a->post_restore_context(target);
-
return ERROR_OK;
}
@@ -1589,7 +1586,6 @@ static int cortex_a8_init_arch_info(struct target *target,
armv7a->post_debug_entry = cortex_a8_post_debug_entry;
armv7a->pre_restore_context = NULL;
- armv7a->post_restore_context = NULL;
armv7a->armv4_5_mmu.armv4_5_cache.ctype = -1;
// armv7a->armv4_5_mmu.get_ttb = armv7a_get_ttb;
armv7a->armv4_5_mmu.read_memory = cortex_a8_read_memory;
diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c
index d39d839..7f6cbaf 100644
--- a/src/target/cortex_m3.c
+++ b/src/target/cortex_m3.c
@@ -1876,7 +1876,6 @@ static int cortex_m3_init_arch_info(struct target *target,
armv7m->post_debug_entry = NULL;
armv7m->pre_restore_context = NULL;
- armv7m->post_restore_context = NULL;
armv7m->load_core_reg_u32 = cortex_m3_load_core_reg_u32;
armv7m->store_core_reg_u32 = cortex_m3_store_core_reg_u32;
diff --git a/src/target/fa526.c b/src/target/fa526.c
index b6149e3..d9d5d43 100644
--- a/src/target/fa526.c
+++ b/src/target/fa526.c
@@ -292,7 +292,6 @@ static int fa526_init_arch_info_2(struct target *target,
arm7_9->post_debug_entry = NULL;
arm7_9->pre_restore_context = NULL;
- arm7_9->post_restore_context = NULL;
/* initialize arch-specific breakpoint handling */
arm7_9->arm_bkpt = 0xdeeedeee;
-----------------------------------------------------------------------
Summary of changes:
src/target/arm7_9_common.c | 3 ---
src/target/arm7_9_common.h | 3 ---
src/target/arm7tdmi.c | 1 -
src/target/arm9tdmi.c | 1 -
src/target/armv7a.h | 2 --
src/target/armv7m.c | 3 ---
src/target/armv7m.h | 1 -
src/target/cortex_a8.c | 4 ----
src/target/cortex_m3.c | 1 -
src/target/fa526.c | 1 -
10 files changed, 0 insertions(+), 20 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: David B. <dbr...@us...> - 2010-03-16 22:50:21
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 6f8b8593d63bc9781435270a54b6f7d245eecd8e (commit)
from 030ee192dd9647b10ff0841a671facec9d6b833f (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 6f8b8593d63bc9781435270a54b6f7d245eecd8e
Author: David Brownell <dbr...@us...>
Date: Tue Mar 16 14:12:00 2010 -0700
ADIv5 transport support moves to separate files
Unclutter arm_adi_v5.c by moving most transport-specific code
to a transport-specific files adi_v5_{jtag,swd}.c ... it's not
a full cleanup, because of some issues which need to be addressed
as part of SWD support (along with implementing the DAP operations
on top of SWD transport):
- The mess where mem_ap_read_buf_u32() is currently coded to
know about JTAG scan chains, and thus needs rewriting before
it will work with SWD;
- Initialization is still JTAG-specific
Also move JTAG_{DP,ACK}_* constants from adi_v5.h to the JTAG
file; no other code should care about those values.
Signed-off-by: David Brownell <dbr...@us...>
diff --git a/src/target/Makefile.am b/src/target/Makefile.am
index ad0ff7c..ea6d88f 100644
--- a/src/target/Makefile.am
+++ b/src/target/Makefile.am
@@ -83,6 +83,8 @@ ARM_DEBUG_SRC = \
arm_simulator.c \
arm_semihosting.c \
arm_adi_v5.c \
+ adi_v5_jtag.c \
+ adi_v5_swd.c \
embeddedice.c \
trace.c \
etb.c \
diff --git a/src/target/adi_v5_jtag.c b/src/target/adi_v5_jtag.c
new file mode 100644
index 0000000..eac83b7
--- /dev/null
+++ b/src/target/adi_v5_jtag.c
@@ -0,0 +1,481 @@
+/***************************************************************************
+ * Copyright (C) 2006 by Magnus Lundin
+ * lu...@ml...
+ *
+ * Copyright (C) 2008 by Spencer Oliver
+ * sp...@sp...
+ *
+ * Copyright (C) 2009 by Oyvind Harboe
+ * oyv...@zy...
+ *
+ * Copyright (C) 2009-2010 by David Brownell
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the
+ * Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ ***************************************************************************/
+
+/**
+ * @file
+ * This file implements JTAG transport support for cores implementing
+ the ARM Debug Interface version 5 (ADIv5).
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "arm.h"
+#include "arm_adi_v5.h"
+#include <helper/time_support.h>
+
+
+/* JTAG instructions/registers for JTAG-DP and SWJ-DP */
+#define JTAG_DP_ABORT 0x8
+#define JTAG_DP_DPACC 0xA
+#define JTAG_DP_APACC 0xB
+#define JTAG_DP_IDCODE 0xE
+
+/* three-bit ACK values for DPACC and APACC reads */
+#define JTAG_ACK_OK_FAULT 0x2
+#define JTAG_ACK_WAIT 0x1
+
+/***************************************************************************
+ *
+ * DPACC and APACC scanchain access through JTAG-DP (or SWJ-DP)
+ *
+***************************************************************************/
+
+/**
+ * Scan DPACC or APACC using target ordered uint8_t buffers. No endianness
+ * conversions are performed. See section 4.4.3 of the ADIv5 spec, which
+ * discusses operations which access these registers.
+ *
+ * Note that only one scan is performed. If RnW is set, a separate scan
+ * will be needed to collect the data which was read; the "invalue" collects
+ * the posted result of a preceding operation, not the current one.
+ *
+ * @param swjdp the DAP
+ * @param instr JTAG_DP_APACC (AP access) or JTAG_DP_DPACC (DP access)
+ * @param reg_addr two significant bits; A[3:2]; for APACC access, the
+ * SELECT register has more addressing bits.
+ * @param RnW false iff outvalue will be written to the DP or AP
+ * @param outvalue points to a 32-bit (little-endian) integer
+ * @param invalue NULL, or points to a 32-bit (little-endian) integer
+ * @param ack points to where the three bit JTAG_ACK_* code will be stored
+ */
+
+/* FIXME don't export ... this is a temporary workaround for the
+ * mem_ap_read_buf_u32() mess, until it's no longer JTAG-specific.
+ */
+int adi_jtag_dp_scan(struct adiv5_dap *swjdp,
+ uint8_t instr, uint8_t reg_addr, uint8_t RnW,
+ uint8_t *outvalue, uint8_t *invalue, uint8_t *ack)
+{
+ struct arm_jtag *jtag_info = swjdp->jtag_info;
+ struct scan_field fields[2];
+ uint8_t out_addr_buf;
+
+ jtag_set_end_state(TAP_IDLE);
+ arm_jtag_set_instr(jtag_info, instr, NULL);
+
+ /* Scan out a read or write operation using some DP or AP register.
+ * For APACC access with any sticky error flag set, this is discarded.
+ */
+ fields[0].num_bits = 3;
+ buf_set_u32(&out_addr_buf, 0, 3, ((reg_addr >> 1) & 0x6) | (RnW & 0x1));
+ fields[0].out_value = &out_addr_buf;
+ fields[0].in_value = ack;
+
+ /* NOTE: if we receive JTAG_ACK_WAIT, the previous operation did not
+ * complete; data we write is discarded, data we read is unpredictable.
+ * When overrun detect is active, STICKYORUN is set.
+ */
+
+ fields[1].num_bits = 32;
+ fields[1].out_value = outvalue;
+ fields[1].in_value = invalue;
+
+ jtag_add_dr_scan(jtag_info->tap, 2, fields, jtag_get_end_state());
+
+ /* Add specified number of tck clocks after starting memory bus
+ * access, giving the hardware time to complete the access.
+ * They provide more time for the (MEM) AP to complete the read ...
+ * See "Minimum Response Time" for JTAG-DP, in the ADIv5 spec.
+ */
+ if ((instr == JTAG_DP_APACC)
+ && ((reg_addr == AP_REG_DRW)
+ || ((reg_addr & 0xF0) == AP_REG_BD0))
+ && (swjdp->memaccess_tck != 0))
+ jtag_add_runtest(swjdp->memaccess_tck,
+ jtag_set_end_state(TAP_IDLE));
+
+ return jtag_get_error();
+}
+
+/**
+ * Scan DPACC or APACC out and in from host ordered uint32_t buffers.
+ * This is exactly like adi_jtag_dp_scan(), except that endianness
+ * conversions are performed (so the types of invalue and outvalue
+ * must be different).
+ */
+static int adi_jtag_dp_scan_u32(struct adiv5_dap *swjdp,
+ uint8_t instr, uint8_t reg_addr, uint8_t RnW,
+ uint32_t outvalue, uint32_t *invalue, uint8_t *ack)
+{
+ uint8_t out_value_buf[4];
+ int retval;
+
+ buf_set_u32(out_value_buf, 0, 32, outvalue);
+
+ retval = adi_jtag_dp_scan(swjdp, instr, reg_addr, RnW,
+ out_value_buf, (uint8_t *)invalue, ack);
+ if (retval != ERROR_OK)
+ return retval;
+
+ if (invalue)
+ jtag_add_callback(arm_le_to_h_u32,
+ (jtag_callback_data_t) invalue);
+
+ return retval;
+}
+
+/**
+ * Utility to write AP registers.
+ */
+static inline int adi_jtag_ap_write_check(struct adiv5_dap *dap,
+ uint8_t reg_addr, uint8_t *outvalue)
+{
+ return adi_jtag_dp_scan(dap, JTAG_DP_APACC, reg_addr, DPAP_WRITE,
+ outvalue, NULL, NULL);
+}
+
+static int adi_jtag_scan_inout_check_u32(struct adiv5_dap *swjdp,
+ uint8_t instr, uint8_t reg_addr, uint8_t RnW,
+ uint32_t outvalue, uint32_t *invalue)
+{
+ int retval;
+
+ /* Issue the read or write */
+ retval = adi_jtag_dp_scan_u32(swjdp, instr, reg_addr,
+ RnW, outvalue, NULL, NULL);
+ if (retval != ERROR_OK)
+ return retval;
+
+ /* For reads, collect posted value; RDBUFF has no other effect.
+ * Assumes read gets acked with OK/FAULT, and CTRL_STAT says "OK".
+ */
+ if ((RnW == DPAP_READ) && (invalue != NULL))
+ retval = adi_jtag_dp_scan_u32(swjdp, JTAG_DP_DPACC,
+ DP_RDBUFF, DPAP_READ, 0, invalue, &swjdp->ack);
+ return retval;
+}
+
+static int jtagdp_transaction_endcheck(struct adiv5_dap *swjdp)
+{
+ int retval;
+ uint32_t ctrlstat;
+
+ /* too expensive to call keep_alive() here */
+
+#if 0
+ /* Danger!!!! BROKEN!!!! */
+ adi_jtag_scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
+ DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
+ /* Danger!!!! BROKEN!!!! Why will jtag_execute_queue() fail here????
+ R956 introduced the check on return value here and now Michael Schwingen reports
+ that this code no longer works....
+
+ https://lists.berlios.de/pipermail/openocd-development/2008-September/003107.html
+ */
+ if ((retval = jtag_execute_queue()) != ERROR_OK)
+ {
+ LOG_ERROR("BUG: Why does this fail the first time????");
+ }
+ /* Why??? second time it works??? */
+#endif
+
+ /* Post CTRL/STAT read; discard any previous posted read value
+ * but collect its ACK status.
+ */
+ adi_jtag_scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
+ DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
+ if ((retval = jtag_execute_queue()) != ERROR_OK)
+ return retval;
+
+ swjdp->ack = swjdp->ack & 0x7;
+
+ /* common code path avoids calling timeval_ms() */
+ if (swjdp->ack != JTAG_ACK_OK_FAULT)
+ {
+ long long then = timeval_ms();
+
+ while (swjdp->ack != JTAG_ACK_OK_FAULT)
+ {
+ if (swjdp->ack == JTAG_ACK_WAIT)
+ {
+ if ((timeval_ms()-then) > 1000)
+ {
+ /* NOTE: this would be a good spot
+ * to use JTAG_DP_ABORT.
+ */
+ LOG_WARNING("Timeout (1000ms) waiting "
+ "for ACK=OK/FAULT "
+ "in JTAG-DP transaction");
+ return ERROR_JTAG_DEVICE_ERROR;
+ }
+ }
+ else
+ {
+ LOG_WARNING("Invalid ACK %#x "
+ "in JTAG-DP transaction",
+ swjdp->ack);
+ return ERROR_JTAG_DEVICE_ERROR;
+ }
+
+ adi_jtag_scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
+ DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
+ if ((retval = dap_run(swjdp)) != ERROR_OK)
+ return retval;
+ swjdp->ack = swjdp->ack & 0x7;
+ }
+ }
+
+ /* REVISIT also STICKYCMP, for pushed comparisons (nyet used) */
+
+ /* Check for STICKYERR and STICKYORUN */
+ if (ctrlstat & (SSTICKYORUN | SSTICKYERR))
+ {
+ LOG_DEBUG("jtag-dp: CTRL/STAT error, 0x%" PRIx32, ctrlstat);
+ /* Check power to debug regions */
+ if ((ctrlstat & 0xf0000000) != 0xf0000000)
+ ahbap_debugport_init(swjdp);
+ else
+ {
+ uint32_t mem_ap_csw, mem_ap_tar;
+
+ /* Maybe print information about last intended
+ * MEM-AP access; but not if autoincrementing.
+ * *Real* CSW and TAR values are always shown.
+ */
+ if (swjdp->ap_tar_value != (uint32_t) -1)
+ LOG_DEBUG("MEM-AP Cached values: "
+ "ap_bank 0x%" PRIx32
+ ", ap_csw 0x%" PRIx32
+ ", ap_tar 0x%" PRIx32,
+ swjdp->ap_bank_value,
+ swjdp->ap_csw_value,
+ swjdp->ap_tar_value);
+
+ if (ctrlstat & SSTICKYORUN)
+ LOG_ERROR("JTAG-DP OVERRUN - check clock, "
+ "memaccess, or reduce jtag speed");
+
+ if (ctrlstat & SSTICKYERR)
+ LOG_ERROR("JTAG-DP STICKY ERROR");
+
+ /* Clear Sticky Error Bits */
+ adi_jtag_scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
+ DP_CTRL_STAT, DPAP_WRITE,
+ swjdp->dp_ctrl_stat | SSTICKYORUN
+ | SSTICKYERR, NULL);
+ adi_jtag_scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
+ DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
+ if ((retval = dap_run(swjdp)) != ERROR_OK)
+ return retval;
+
+ LOG_DEBUG("jtag-dp: CTRL/STAT 0x%" PRIx32, ctrlstat);
+
+ retval = dap_queue_ap_read(swjdp,
+ AP_REG_CSW, &mem_ap_csw);
+ if (retval != ERROR_OK)
+ return retval;
+
+ retval = dap_queue_ap_read(swjdp,
+ AP_REG_TAR, &mem_ap_tar);
+ if (retval != ERROR_OK)
+ return retval;
+
+ if ((retval = dap_run(swjdp)) != ERROR_OK)
+ return retval;
+ LOG_ERROR("MEM_AP_CSW 0x%" PRIx32 ", MEM_AP_TAR 0x%"
+ PRIx32, mem_ap_csw, mem_ap_tar);
+
+ }
+ if ((retval = dap_run(swjdp)) != ERROR_OK)
+ return retval;
+ return ERROR_JTAG_DEVICE_ERROR;
+ }
+
+ return ERROR_OK;
+}
+
+/*--------------------------------------------------------------------------*/
+
+static int jtag_idcode_q_read(struct adiv5_dap *dap,
+ uint8_t *ack, uint32_t *data)
+{
+ struct arm_jtag *jtag_info = dap->jtag_info;
+ int retval;
+ struct scan_field fields[1];
+
+ jtag_set_end_state(TAP_IDLE);
+
+ /* This is a standard JTAG operation -- no DAP tweakage */
+ retval = arm_jtag_set_instr(jtag_info, JTAG_DP_IDCODE, NULL);
+ if (retval != ERROR_OK)
+ return retval;
+
+ fields[0].num_bits = 32;
+ fields[0].out_value = NULL;
+ fields[0].in_value = (void *) data;
+
+ jtag_add_dr_scan(jtag_info->tap, 1, fields, jtag_get_end_state());
+ retval = jtag_get_error();
+ if (retval != ERROR_OK)
+ return retval;
+
+ jtag_add_callback(arm_le_to_h_u32,
+ (jtag_callback_data_t) data);
+
+ return retval;
+}
+
+static int jtag_dp_q_read(struct adiv5_dap *dap, unsigned reg,
+ uint32_t *data)
+{
+ return adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
+ reg, DPAP_READ, 0, data);
+}
+
+static int jtag_dp_q_write(struct adiv5_dap *dap, unsigned reg,
+ uint32_t data)
+{
+ return adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
+ reg, DPAP_WRITE, data, NULL);
+}
+
+/** Select the AP register bank matching bits 7:4 of reg. */
+static int jtag_ap_q_bankselect(struct adiv5_dap *dap, unsigned reg)
+{
+ uint32_t select = reg & 0x000000F0;
+
+ if (select == dap->ap_bank_value)
+ return ERROR_OK;
+ dap->ap_bank_value = select;
+
+ select |= dap->apsel;
+
+ return jtag_dp_q_write(dap, DP_SELECT, select);
+}
+
+static int jtag_ap_q_read(struct adiv5_dap *dap, unsigned reg,
+ uint32_t *data)
+{
+ int retval = jtag_ap_q_bankselect(dap, reg);
+
+ if (retval != ERROR_OK)
+ return retval;
+
+ return adi_jtag_scan_inout_check_u32(dap, JTAG_DP_APACC, reg,
+ DPAP_READ, 0, data);
+}
+
+static int jtag_ap_q_write(struct adiv5_dap *dap, unsigned reg,
+ uint32_t data)
+{
+ uint8_t out_value_buf[4];
+
+ int retval = jtag_ap_q_bankselect(dap, reg);
+ if (retval != ERROR_OK)
+ return retval;
+
+ buf_set_u32(out_value_buf, 0, 32, data);
+
+ return adi_jtag_ap_write_check(dap, reg, out_value_buf);
+}
+
+static int jtag_ap_q_abort(struct adiv5_dap *dap, uint8_t *ack)
+{
+ /* for JTAG, this is the only valid ABORT register operation */
+ return adi_jtag_dp_scan_u32(dap, JTAG_DP_ABORT,
+ 0, DPAP_WRITE, 1, NULL, ack);
+}
+
+static int jtag_dp_run(struct adiv5_dap *dap)
+{
+ return jtagdp_transaction_endcheck(dap);
+}
+
+/* FIXME don't export ... just initialize as
+ * part of DAP setup
+*/
+const struct dap_ops jtag_dp_ops = {
+ .queue_idcode_read = jtag_idcode_q_read,
+ .queue_dp_read = jtag_dp_q_read,
+ .queue_dp_write = jtag_dp_q_write,
+ .queue_ap_read = jtag_ap_q_read,
+ .queue_ap_write = jtag_ap_q_write,
+ .queue_ap_abort = jtag_ap_q_abort,
+ .run = jtag_dp_run,
+};
+
+
+const uint8_t swd2jtag_bitseq[] = {
+ /* More than 50 TCK/SWCLK cycles with TMS/SWDIO high,
+ * putting both JTAG and SWD logic into reset state.
+ */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ /* Switching equence disables SWD and enables JTAG
+ * NOTE: bits in the DP's IDCODE can expose the need for
+ * the old/deprecated sequence (0xae 0xde).
+ */
+ 0x3c, 0xe7,
+ /* At least 50 TCK/SWCLK cycles with TMS/SWDIO high,
+ * putting both JTAG and SWD logic into reset state.
+ * NOTE: some docs say "at least 5".
+ */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+};
+
+/** Put the debug link into JTAG mode, if the target supports it.
+ * The link's initial mode may be either SWD or JTAG.
+ *
+ * @param target Enters JTAG mode (if possible).
+ *
+ * Note that targets implemented with SW-DP do not support JTAG, and
+ * that some targets which could otherwise support it may have been
+ * configured to disable JTAG signaling
+ *
+ * @return ERROR_OK or else a fault code.
+ */
+int dap_to_jtag(struct target *target)
+{
+ int retval;
+
+ LOG_DEBUG("Enter JTAG mode");
+
+ /* REVISIT it's nasty to need to make calls to a "jtag"
+ * subsystem if the link isn't in JTAG mode...
+ */
+
+ retval = jtag_add_tms_seq(8 * sizeof(swd2jtag_bitseq),
+ swd2jtag_bitseq, TAP_RESET);
+ if (retval == ERROR_OK)
+ retval = jtag_execute_queue();
+
+ /* REVISIT set up the DAP's ops vector for JTAG mode. */
+
+ return retval;
+}
diff --git a/src/target/adi_v5_swd.c b/src/target/adi_v5_swd.c
new file mode 100644
index 0000000..f103e4b
--- /dev/null
+++ b/src/target/adi_v5_swd.c
@@ -0,0 +1,92 @@
+/***************************************************************************
+ *
+ * Copyright (C) 2010 by David Brownell
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the
+ * Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ ***************************************************************************/
+
+/**
+ * @file
+ * This file implements SWD transport support for cores implementing
+ the ARM Debug Interface version 5 (ADIv5).
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "arm.h"
+#include "arm_adi_v5.h"
+#include <helper/time_support.h>
+
+/*
+ * This represents the bits which must be sent out on TMS/SWDIO to
+ * switch a DAP implemented using an SWJ-DP module into SWD mode.
+ * These bits are stored (and transmitted) LSB-first.
+ *
+ * See the DAP-Lite specification, section 2.2.5 for information
+ * about making the debug link select SWD or JTAG. (Similar info
+ * is in a few other ARM documents.)
+ */
+static const uint8_t jtag2swd_bitseq[] = {
+ /* More than 50 TCK/SWCLK cycles with TMS/SWDIO high,
+ * putting both JTAG and SWD logic into reset state.
+ */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ /* Switching sequence enables SWD and disables JTAG
+ * NOTE: bits in the DP's IDCODE may expose the need for
+ * an old/deprecated sequence (0xb6 0xed).
+ */
+ 0x9e, 0xe7,
+ /* More than 50 TCK/SWCLK cycles with TMS/SWDIO high,
+ * putting both JTAG and SWD logic into reset state.
+ */
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+};
+
+/**
+ * Put the debug link into SWD mode, if the target supports it.
+ * The link's initial mode may be either JTAG (for example,
+ * with SWJ-DP after reset) or SWD.
+ *
+ * @param target Enters SWD mode (if possible).
+ *
+ * Note that targets using the JTAG-DP do not support SWD, and that
+ * some targets which could otherwise support it may have have been
+ * configured to disable SWD signaling
+ *
+ * @return ERROR_OK or else a fault code.
+ */
+int dap_to_swd(struct target *target)
+{
+ int retval;
+
+ LOG_DEBUG("Enter SWD mode");
+
+ /* REVISIT it's nasty to need to make calls to a "jtag"
+ * subsystem if the link isn't in JTAG mode...
+ */
+
+ retval = jtag_add_tms_seq(8 * sizeof(jtag2swd_bitseq),
+ jtag2swd_bitseq, TAP_INVALID);
+ if (retval == ERROR_OK)
+ retval = jtag_execute_queue();
+
+ /* REVISIT set up the DAP's ops vector for SWD mode. */
+
+ return retval;
+}
+
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index 61cf989..dcad0fb 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -87,272 +87,6 @@ static uint32_t max_tar_block_size(uint32_t tar_autoincr_block, uint32_t address
/***************************************************************************
* *
- * DPACC and APACC scanchain access through JTAG-DP *
- * *
-***************************************************************************/
-
-/**
- * Scan DPACC or APACC using target ordered uint8_t buffers. No endianness
- * conversions are performed. See section 4.4.3 of the ADIv5 spec, which
- * discusses operations which access these registers.
- *
- * Note that only one scan is performed. If RnW is set, a separate scan
- * will be needed to collect the data which was read; the "invalue" collects
- * the posted result of a preceding operation, not the current one.
- *
- * @param swjdp the DAP
- * @param instr JTAG_DP_APACC (AP access) or JTAG_DP_DPACC (DP access)
- * @param reg_addr two significant bits; A[3:2]; for APACC access, the
- * SELECT register has more addressing bits.
- * @param RnW false iff outvalue will be written to the DP or AP
- * @param outvalue points to a 32-bit (little-endian) integer
- * @param invalue NULL, or points to a 32-bit (little-endian) integer
- * @param ack points to where the three bit JTAG_ACK_* code will be stored
- */
-static int adi_jtag_dp_scan(struct adiv5_dap *swjdp,
- uint8_t instr, uint8_t reg_addr, uint8_t RnW,
- uint8_t *outvalue, uint8_t *invalue, uint8_t *ack)
-{
- struct arm_jtag *jtag_info = swjdp->jtag_info;
- struct scan_field fields[2];
- uint8_t out_addr_buf;
-
- jtag_set_end_state(TAP_IDLE);
- arm_jtag_set_instr(jtag_info, instr, NULL);
-
- /* Scan out a read or write operation using some DP or AP register.
- * For APACC access with any sticky error flag set, this is discarded.
- */
- fields[0].num_bits = 3;
- buf_set_u32(&out_addr_buf, 0, 3, ((reg_addr >> 1) & 0x6) | (RnW & 0x1));
- fields[0].out_value = &out_addr_buf;
- fields[0].in_value = ack;
-
- /* NOTE: if we receive JTAG_ACK_WAIT, the previous operation did not
- * complete; data we write is discarded, data we read is unpredictable.
- * When overrun detect is active, STICKYORUN is set.
- */
-
- fields[1].num_bits = 32;
- fields[1].out_value = outvalue;
- fields[1].in_value = invalue;
-
- jtag_add_dr_scan(jtag_info->tap, 2, fields, jtag_get_end_state());
-
- /* Add specified number of tck clocks after starting memory bus
- * access, giving the hardware time to complete the access.
- * They provide more time for the (MEM) AP to complete the read ...
- * See "Minimum Response Time" for JTAG-DP, in the ADIv5 spec.
- */
- if ((instr == JTAG_DP_APACC)
- && ((reg_addr == AP_REG_DRW)
- || ((reg_addr & 0xF0) == AP_REG_BD0))
- && (swjdp->memaccess_tck != 0))
- jtag_add_runtest(swjdp->memaccess_tck,
- jtag_set_end_state(TAP_IDLE));
-
- return jtag_get_error();
-}
-
-/**
- * Scan DPACC or APACC out and in from host ordered uint32_t buffers.
- * This is exactly like adi_jtag_dp_scan(), except that endianness
- * conversions are performed (so the types of invalue and outvalue
- * must be different).
- */
-static int adi_jtag_dp_scan_u32(struct adiv5_dap *swjdp,
- uint8_t instr, uint8_t reg_addr, uint8_t RnW,
- uint32_t outvalue, uint32_t *invalue, uint8_t *ack)
-{
- uint8_t out_value_buf[4];
- int retval;
-
- buf_set_u32(out_value_buf, 0, 32, outvalue);
-
- retval = adi_jtag_dp_scan(swjdp, instr, reg_addr, RnW,
- out_value_buf, (uint8_t *)invalue, ack);
- if (retval != ERROR_OK)
- return retval;
-
- if (invalue)
- jtag_add_callback(arm_le_to_h_u32,
- (jtag_callback_data_t) invalue);
-
- return retval;
-}
-
-/**
- * Utility to write AP registers.
- */
-static inline int adi_jtag_ap_write_check(struct adiv5_dap *dap,
- uint8_t reg_addr, uint8_t *outvalue)
-{
- return adi_jtag_dp_scan(dap, JTAG_DP_APACC, reg_addr, DPAP_WRITE,
- outvalue, NULL, NULL);
-}
-
-static int adi_jtag_scan_inout_check_u32(struct adiv5_dap *swjdp,
- uint8_t instr, uint8_t reg_addr, uint8_t RnW,
- uint32_t outvalue, uint32_t *invalue)
-{
- int retval;
-
- /* Issue the read or write */
- retval = adi_jtag_dp_scan_u32(swjdp, instr, reg_addr,
- RnW, outvalue, NULL, NULL);
- if (retval != ERROR_OK)
- return retval;
-
- /* For reads, collect posted value; RDBUFF has no other effect.
- * Assumes read gets acked with OK/FAULT, and CTRL_STAT says "OK".
- */
- if ((RnW == DPAP_READ) && (invalue != NULL))
- retval = adi_jtag_dp_scan_u32(swjdp, JTAG_DP_DPACC,
- DP_RDBUFF, DPAP_READ, 0, invalue, &swjdp->ack);
- return retval;
-}
-
-static int jtagdp_transaction_endcheck(struct adiv5_dap *swjdp)
-{
- int retval;
- uint32_t ctrlstat;
-
- /* too expensive to call keep_alive() here */
-
-#if 0
- /* Danger!!!! BROKEN!!!! */
- adi_jtag_scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
- DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
- /* Danger!!!! BROKEN!!!! Why will jtag_execute_queue() fail here????
- R956 introduced the check on return value here and now Michael Schwingen reports
- that this code no longer works....
-
- https://lists.berlios.de/pipermail/openocd-development/2008-September/003107.html
- */
- if ((retval = jtag_execute_queue()) != ERROR_OK)
- {
- LOG_ERROR("BUG: Why does this fail the first time????");
- }
- /* Why??? second time it works??? */
-#endif
-
- /* Post CTRL/STAT read; discard any previous posted read value
- * but collect its ACK status.
- */
- adi_jtag_scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
- DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
- if ((retval = jtag_execute_queue()) != ERROR_OK)
- return retval;
-
- swjdp->ack = swjdp->ack & 0x7;
-
- /* common code path avoids calling timeval_ms() */
- if (swjdp->ack != JTAG_ACK_OK_FAULT)
- {
- long long then = timeval_ms();
-
- while (swjdp->ack != JTAG_ACK_OK_FAULT)
- {
- if (swjdp->ack == JTAG_ACK_WAIT)
- {
- if ((timeval_ms()-then) > 1000)
- {
- /* NOTE: this would be a good spot
- * to use JTAG_DP_ABORT.
- */
- LOG_WARNING("Timeout (1000ms) waiting "
- "for ACK=OK/FAULT "
- "in JTAG-DP transaction");
- return ERROR_JTAG_DEVICE_ERROR;
- }
- }
- else
- {
- LOG_WARNING("Invalid ACK %#x "
- "in JTAG-DP transaction",
- swjdp->ack);
- return ERROR_JTAG_DEVICE_ERROR;
- }
-
- adi_jtag_scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
- DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
- if ((retval = dap_run(swjdp)) != ERROR_OK)
- return retval;
- swjdp->ack = swjdp->ack & 0x7;
- }
- }
-
- /* REVISIT also STICKYCMP, for pushed comparisons (nyet used) */
-
- /* Check for STICKYERR and STICKYORUN */
- if (ctrlstat & (SSTICKYORUN | SSTICKYERR))
- {
- LOG_DEBUG("jtag-dp: CTRL/STAT error, 0x%" PRIx32, ctrlstat);
- /* Check power to debug regions */
- if ((ctrlstat & 0xf0000000) != 0xf0000000)
- ahbap_debugport_init(swjdp);
- else
- {
- uint32_t mem_ap_csw, mem_ap_tar;
-
- /* Maybe print information about last intended
- * MEM-AP access; but not if autoincrementing.
- * *Real* CSW and TAR values are always shown.
- */
- if (swjdp->ap_tar_value != (uint32_t) -1)
- LOG_DEBUG("MEM-AP Cached values: "
- "ap_bank 0x%" PRIx32
- ", ap_csw 0x%" PRIx32
- ", ap_tar 0x%" PRIx32,
- swjdp->ap_bank_value,
- swjdp->ap_csw_value,
- swjdp->ap_tar_value);
-
- if (ctrlstat & SSTICKYORUN)
- LOG_ERROR("JTAG-DP OVERRUN - check clock, "
- "memaccess, or reduce jtag speed");
-
- if (ctrlstat & SSTICKYERR)
- LOG_ERROR("JTAG-DP STICKY ERROR");
-
- /* Clear Sticky Error Bits */
- adi_jtag_scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
- DP_CTRL_STAT, DPAP_WRITE,
- swjdp->dp_ctrl_stat | SSTICKYORUN
- | SSTICKYERR, NULL);
- adi_jtag_scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
- DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
- if ((retval = dap_run(swjdp)) != ERROR_OK)
- return retval;
-
- LOG_DEBUG("jtag-dp: CTRL/STAT 0x%" PRIx32, ctrlstat);
-
- retval = dap_queue_ap_read(swjdp,
- AP_REG_CSW, &mem_ap_csw);
- if (retval != ERROR_OK)
- return retval;
-
- retval = dap_queue_ap_read(swjdp,
- AP_REG_TAR, &mem_ap_tar);
- if (retval != ERROR_OK)
- return retval;
-
- if ((retval = dap_run(swjdp)) != ERROR_OK)
- return retval;
- LOG_ERROR("MEM_AP_CSW 0x%" PRIx32 ", MEM_AP_TAR 0x%"
- PRIx32, mem_ap_csw, mem_ap_tar);
-
- }
- if ((retval = dap_run(swjdp)) != ERROR_OK)
- return retval;
- return ERROR_JTAG_DEVICE_ERROR;
- }
-
- return ERROR_OK;
-}
-
-/***************************************************************************
- * *
* DP and MEM-AP register access through APACC and DPACC *
* *
***************************************************************************/
@@ -818,6 +552,13 @@ int mem_ap_write_buf_u8(struct adiv5_dap *swjdp, uint8_t *buffer, int count, uin
return retval;
}
+/* FIXME don't import ... this is a temporary workaround for the
+ * mem_ap_read_buf_u32() mess, until it's no longer JTAG-specific.
+ */
+extern int adi_jtag_dp_scan(struct adiv5_dap *swjdp,
+ uint8_t instr, uint8_t reg_addr, uint8_t RnW,
+ uint8_t *outvalue, uint8_t *invalue, uint8_t *ack);
+
/**
* Synchronously read a block of 32-bit words into a buffer
* @param swjdp The DAP connected to the MEM-AP.
@@ -1116,110 +857,11 @@ int mem_ap_read_buf_u8(struct adiv5_dap *swjdp, uint8_t *buffer,
/*--------------------------------------------------------------------------*/
-static int jtag_idcode_q_read(struct adiv5_dap *dap,
- uint8_t *ack, uint32_t *data)
-{
- struct arm_jtag *jtag_info = dap->jtag_info;
- int retval;
- struct scan_field fields[1];
-
- jtag_set_end_state(TAP_IDLE);
-
- /* This is a standard JTAG operation -- no DAP tweakage */
- retval = arm_jtag_set_instr(jtag_info, JTAG_DP_IDCODE, NULL);
- if (retval != ERROR_OK)
- return retval;
-
- fields[0].num_bits = 32;
- fields[0].out_value = NULL;
- fields[0].in_value = (void *) data;
-
- jtag_add_dr_scan(jtag_info->tap, 1, fields, jtag_get_end_state());
- retval = jtag_get_error();
- if (retval != ERROR_OK)
- return retval;
-
- jtag_add_callback(arm_le_to_h_u32,
- (jtag_callback_data_t) data);
-
- return retval;
-}
-
-static int jtag_dp_q_read(struct adiv5_dap *dap, unsigned reg,
- uint32_t *data)
-{
- return adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
- reg, DPAP_READ, 0, data);
-}
-
-static int jtag_dp_q_write(struct adiv5_dap *dap, unsigned reg,
- uint32_t data)
-{
- return adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
- reg, DPAP_WRITE, data, NULL);
-}
-
-/** Select the AP register bank matching bits 7:4 of reg. */
-static int jtag_ap_q_bankselect(struct adiv5_dap *dap, unsigned reg)
-{
- uint32_t select = reg & 0x000000F0;
-
- if (select == dap->ap_bank_value)
- return ERROR_OK;
- dap->ap_bank_value = select;
-
- select |= dap->apsel;
-
- return jtag_dp_q_write(dap, DP_SELECT, select);
-}
-
-static int jtag_ap_q_read(struct adiv5_dap *dap, unsigned reg,
- uint32_t *data)
-{
- int retval = jtag_ap_q_bankselect(dap, reg);
-
- if (retval != ERROR_OK)
- return retval;
-
- return adi_jtag_scan_inout_check_u32(dap, JTAG_DP_APACC, reg,
- DPAP_READ, 0, data);
-}
-
-static int jtag_ap_q_write(struct adiv5_dap *dap, unsigned reg,
- uint32_t data)
-{
- uint8_t out_value_buf[4];
-
- int retval = jtag_ap_q_bankselect(dap, reg);
- if (retval != ERROR_OK)
- return retval;
- buf_set_u32(out_value_buf, 0, 32, data);
-
- return adi_jtag_ap_write_check(dap, reg, out_value_buf);
-}
-
-static int jtag_ap_q_abort(struct adiv5_dap *dap, uint8_t *ack)
-{
- /* for JTAG, this is the only valid ABORT register operation */
- return adi_jtag_dp_scan_u32(dap, JTAG_DP_ABORT,
- 0, DPAP_WRITE, 1, NULL, ack);
-}
-
-static int jtag_dp_run(struct adiv5_dap *dap)
-{
- return jtagdp_transaction_endcheck(dap);
-}
-
-static const struct dap_ops jtag_dp_ops = {
- .queue_idcode_read = jtag_idcode_q_read,
- .queue_dp_read = jtag_dp_q_read,
- .queue_dp_write = jtag_dp_q_write,
- .queue_ap_read = jtag_ap_q_read,
- .queue_ap_write = jtag_ap_q_write,
- .queue_ap_abort = jtag_ap_q_abort,
- .run = jtag_dp_run,
-};
+/* FIXME don't import ... just initialize as
+ * part of DAP transport setup
+*/
+extern const struct dap_ops jtag_dp_ops;
/*--------------------------------------------------------------------------*/
@@ -1988,57 +1630,3 @@ int dap_to_swd(struct target *target)
return retval;
}
-/**
- * This represents the bits which must be sent out on TMS/SWDIO to
- * switch a DAP implemented using an SWJ-DP module into JTAG mode.
- * These bits are stored (and transmitted) LSB-first.
- *
- * These bits are stored (and transmitted) LSB-first.
- */
-static const uint8_t swd2jtag_bitseq[] = {
- /* More than 50 TCK/SWCLK cycles with TMS/SWDIO high,
- * putting both JTAG and SWD logic into reset state.
- */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- /* Switching equence disables SWD and enables JTAG
- * NOTE: bits in the DP's IDCODE can expose the need for
- * the old/deprecated sequence (0xae 0xde).
- */
- 0x3c, 0xe7,
- /* At least 50 TCK/SWCLK cycles with TMS/SWDIO high,
- * putting both JTAG and SWD logic into reset state.
- * NOTE: some docs say "at least 5".
- */
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-};
-
-/** Put the debug link into JTAG mode, if the target supports it.
- * The link's initial mode may be either SWD or JTAG.
- *
- * @param target Enters JTAG mode (if possible).
- *
- * Note that targets implemented with SW-DP do not support JTAG, and
- * that some targets which could otherwise support it may have been
- * configured to disable JTAG signaling
- *
- * @return ERROR_OK or else a fault code.
- */
-int dap_to_jtag(struct target *target)
-{
- int retval;
-
- LOG_DEBUG("Enter JTAG mode");
-
- /* REVISIT it's nasty to need to make calls to a "jtag"
- * subsystem if the link isn't in JTAG mode...
- */
-
- retval = jtag_add_tms_seq(8 * sizeof(swd2jtag_bitseq),
- swd2jtag_bitseq, TAP_RESET);
- if (retval == ERROR_OK)
- retval = jtag_execute_queue();
-
- /* REVISIT set up the DAP's ops vector for JTAG mode. */
-
- return retval;
-}
diff --git a/src/target/arm_adi_v5.h b/src/target/arm_adi_v5.h
index d207fd9..4ee36ff 100644
--- a/src/target/arm_adi_v5.h
+++ b/src/target/arm_adi_v5.h
@@ -32,15 +32,11 @@
#include "arm_jtag.h"
-/* JTAG instructions/registers for JTAG-DP and SWJ-DP */
-#define JTAG_DP_ABORT 0x8
+/* FIXME remove these JTAG-specific decls when mem_ap_read_buf_u32()
+ * is no longer JTAG-specific
+ */
#define JTAG_DP_DPACC 0xA
#define JTAG_DP_APACC 0xB
-#define JTAG_DP_IDCODE 0xE
-
-/* three-bit ACK values for DPACC and APACC reads */
-#define JTAG_ACK_OK_FAULT 0x2
-#define JTAG_ACK_WAIT 0x1
/* three-bit ACK values for SWD access (sent LSB first) */
#define SWD_ACK_OK 0x4
-----------------------------------------------------------------------
Summary of changes:
src/target/Makefile.am | 2 +
src/target/adi_v5_jtag.c | 481 ++++++++++++++++++++++++++++++++++++++++++++++
src/target/adi_v5_swd.c | 92 +++++++++
src/target/arm_adi_v5.c | 434 +----------------------------------------
src/target/arm_adi_v5.h | 10 +-
5 files changed, 589 insertions(+), 430 deletions(-)
create mode 100644 src/target/adi_v5_jtag.c
create mode 100644 src/target/adi_v5_swd.c
hooks/post-receive
--
Main OpenOCD repository
|
|
From: Øyvind H. <go...@us...> - 2010-03-16 21:46:00
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 030ee192dd9647b10ff0841a671facec9d6b833f (commit)
from 679f6602fd1a7e9763bac52f06bbf2db28098d9a (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 030ee192dd9647b10ff0841a671facec9d6b833f
Author: Ãyvind Harboe <oyv...@zy...>
Date: Mon Mar 1 08:25:18 2010 +0100
bitbang: add jtag_add_tms_seq support
Signed-off-by: Ãyvind Harboe <oyv...@zy...>
diff --git a/src/jtag/drivers/at91rm9200.c b/src/jtag/drivers/at91rm9200.c
index abaf3ad..89d7000 100644
--- a/src/jtag/drivers/at91rm9200.c
+++ b/src/jtag/drivers/at91rm9200.c
@@ -126,6 +126,7 @@ struct jtag_interface at91rm9200_interface =
{
.name = "at91rm9200",
+ .supported = DEBUG_CAP_TMS_SEQ,
.execute_queue = bitbang_execute_queue,
.speed = at91rm9200_speed,
diff --git a/src/jtag/drivers/bitbang.c b/src/jtag/drivers/bitbang.c
index 83c2d29..6159ef7 100644
--- a/src/jtag/drivers/bitbang.c
+++ b/src/jtag/drivers/bitbang.c
@@ -91,6 +91,31 @@ static void bitbang_state_move(int skip)
tap_set_state(tap_get_end_state());
}
+
+/**
+ * Clock a bunch of TMS (or SWDIO) transitions, to change the JTAG
+ * (or SWD) state machine.
+ */
+static int bitbang_execute_tms(struct jtag_command *cmd)
+{
+ unsigned num_bits = cmd->cmd.tms->num_bits;
+ const uint8_t *bits = cmd->cmd.tms->bits;
+
+ DEBUG_JTAG_IO("TMS: %d bits", num_bits);
+
+ int tms = 0;
+ for (unsigned i = 0; i < num_bits; i++)
+ {
+ tms = ((bits[i/8] >> (i % 8)) & 1);
+ bitbang_interface->write(0, tms, 0);
+ bitbang_interface->write(1, tms, 0);
+ }
+ bitbang_interface->write(CLOCK_IDLE(), tms, 0);
+
+ return ERROR_OK;
+}
+
+
static void bitbang_path_move(struct pathmove_command *cmd)
{
int num_states = cmd->num_states;
@@ -312,6 +337,9 @@ int bitbang_execute_queue(void)
#endif
jtag_sleep(cmd->cmd.sleep->us);
break;
+ case JTAG_TMS:
+ retval = bitbang_execute_tms(cmd);
+ break;
default:
LOG_ERROR("BUG: unknown JTAG command type encountered");
exit(-1);
diff --git a/src/jtag/drivers/dummy.c b/src/jtag/drivers/dummy.c
index 1880712..7cb0e33 100644
--- a/src/jtag/drivers/dummy.c
+++ b/src/jtag/drivers/dummy.c
@@ -164,6 +164,7 @@ static const struct command_registration dummy_command_handlers[] = {
struct jtag_interface dummy_interface = {
.name = "dummy",
+ .supported = DEBUG_CAP_TMS_SEQ,
.commands = dummy_command_handlers,
.execute_queue = &bitbang_execute_queue,
diff --git a/src/jtag/drivers/ep93xx.c b/src/jtag/drivers/ep93xx.c
index 61dc76e..0959a56 100644
--- a/src/jtag/drivers/ep93xx.c
+++ b/src/jtag/drivers/ep93xx.c
@@ -57,6 +57,7 @@ struct jtag_interface ep93xx_interface =
{
.name = "ep93xx",
+ .supported = DEBUG_CAP_TMS_SEQ,
.execute_queue = bitbang_execute_queue,
.speed = ep93xx_speed,
diff --git a/src/jtag/drivers/parport.c b/src/jtag/drivers/parport.c
index fa3373b..2323ec5 100644
--- a/src/jtag/drivers/parport.c
+++ b/src/jtag/drivers/parport.c
@@ -524,6 +524,7 @@ static const struct command_registration parport_command_handlers[] = {
struct jtag_interface parport_interface = {
.name = "parport",
+ .supported = DEBUG_CAP_TMS_SEQ,
.commands = parport_command_handlers,
.init = parport_init,
diff --git a/src/jtag/drivers/usb_blaster.c b/src/jtag/drivers/usb_blaster.c
index 3703323..59c5715 100644
--- a/src/jtag/drivers/usb_blaster.c
+++ b/src/jtag/drivers/usb_blaster.c
@@ -580,6 +580,7 @@ static const struct command_registration usb_blaster_command_handlers[] = {
struct jtag_interface usb_blaster_interface = {
.name = "usb_blaster",
.commands = usb_blaster_command_handlers,
+ .supported = DEBUG_CAP_TMS_SEQ,
.execute_queue = bitbang_execute_queue,
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/at91rm9200.c | 1 +
src/jtag/drivers/bitbang.c | 28 ++++++++++++++++++++++++++++
src/jtag/drivers/dummy.c | 1 +
src/jtag/drivers/ep93xx.c | 1 +
src/jtag/drivers/parport.c | 1 +
src/jtag/drivers/usb_blaster.c | 1 +
6 files changed, 33 insertions(+), 0 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: Spencer O. <nt...@us...> - 2010-03-16 11:13:25
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 679f6602fd1a7e9763bac52f06bbf2db28098d9a (commit)
via 82f44a4708cdfdf2bf4b386a4751e6b43adad2b2 (commit)
from ab5f98edcd3e8810c15d378d3244238d9d8f8d0e (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 679f6602fd1a7e9763bac52f06bbf2db28098d9a
Author: Spencer Oliver <nt...@us...>
Date: Tue Mar 16 09:59:05 2010 +0000
PARPORT: add PARPORTADDR tcl variable
Add PARPORTADDR tcl variable making it easier to
change parallel port address in scripts.
Signed-off-by: Spencer Oliver <nt...@us...>
diff --git a/tcl/interface/flashlink.cfg b/tcl/interface/flashlink.cfg
index 4b00de9..5c81cf5 100644
--- a/tcl/interface/flashlink.cfg
+++ b/tcl/interface/flashlink.cfg
@@ -5,6 +5,12 @@
# http://www.st.com/stonline/products/literature/um/7889.pdf
#
+if { [info exists PARPORTADDR] } {
+ set _PARPORTADDR $PARPORTADDR
+} else {
+ set _PARPORTADDR 0
+}
+
interface parport
-parport_port 0
+parport_port $_PARPORTADDR
parport_cable flashlink
diff --git a/tcl/interface/parport.cfg b/tcl/interface/parport.cfg
index 0f18ce9..326005a 100644
--- a/tcl/interface/parport.cfg
+++ b/tcl/interface/parport.cfg
@@ -3,6 +3,12 @@
#
# Addresses: 0x378/LPT1 or 0x278/LPT2 ...
+if { [info exists PARPORTADDR] } {
+ set _PARPORTADDR $PARPORTADDR
+} else {
+ set _PARPORTADDR 0x378
+}
+
interface parport
-parport_port 0x378
+parport_port $_PARPORTADDR
parport_cable wiggler
diff --git a/tcl/interface/parport_dlc5.cfg b/tcl/interface/parport_dlc5.cfg
index 85caefc..d0f183f 100644
--- a/tcl/interface/parport_dlc5.cfg
+++ b/tcl/interface/parport_dlc5.cfg
@@ -4,7 +4,13 @@
# http://www.xilinx.com/itp/xilinx4/data/docs/pac/appendixb.html
#
+if { [info exists PARPORTADDR] } {
+ set _PARPORTADDR $PARPORTADDR
+} else {
+ set _PARPORTADDR 0
+}
+
interface parport
-parport_port 0
+parport_port $_PARPORTADDR
parport_cable dlc5
commit 82f44a4708cdfdf2bf4b386a4751e6b43adad2b2
Author: Spencer Oliver <nt...@us...>
Date: Tue Mar 16 09:55:20 2010 +0000
PIC32: add Microchip Explorer16 cfg
- add Microchip Explorer16 cfg using PIC32MX360F512L PIM.
- remove reset config from PIC32 target cfg.
Signed-off-by: Spencer Oliver <nt...@us...>
diff --git a/tcl/board/microchip_explorer16.cfg b/tcl/board/microchip_explorer16.cfg
new file mode 100644
index 0000000..f5c4faa
--- /dev/null
+++ b/tcl/board/microchip_explorer16.cfg
@@ -0,0 +1,13 @@
+# Microchip Explorer 16 with PIC32MX360F512L PIM module.
+# http://www.microchip.com/stellent/idcplg?IdcService=SS_GET_PAGE&nodeId=1406&dDocName=en024858
+
+# TAPID for PIC32MX360F512L
+set CPUTAPID 0x30938053
+
+# use 32k working area
+set WORKAREASIZE 32768
+
+source [find target/pic32mx.cfg]
+
+# For more information about the configuration files, take a look at:
+# openocd.texi
diff --git a/tcl/board/pic-p32mx.cfg b/tcl/board/pic-p32mx.cfg
index 412a506..661e3d6 100644
--- a/tcl/board/pic-p32mx.cfg
+++ b/tcl/board/pic-p32mx.cfg
@@ -2,7 +2,3 @@
set CPUTAPID 0x40916053
source [find target/pic32mx.cfg]
-
-init
-flash probe 0
-flash probe 1
diff --git a/tcl/target/pic32mx.cfg b/tcl/target/pic32mx.cfg
index 8c9a93d..673d254 100644
--- a/tcl/target/pic32mx.cfg
+++ b/tcl/target/pic32mx.cfg
@@ -14,7 +14,7 @@ if { [info exists ENDIAN] } {
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
- # force an error till we get a good number
+ # force an error till we get a good number
set _CPUTAPID 0x30938053
}
@@ -29,9 +29,6 @@ if { [info exists WORKAREASIZE] } {
adapter_nsrst_delay 100
jtag_ntrst_delay 100
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config srst_only
-
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
-----------------------------------------------------------------------
Summary of changes:
tcl/board/microchip_explorer16.cfg | 13 +++++++++++++
tcl/board/pic-p32mx.cfg | 4 ----
tcl/interface/flashlink.cfg | 8 +++++++-
tcl/interface/parport.cfg | 8 +++++++-
tcl/interface/parport_dlc5.cfg | 8 +++++++-
tcl/target/pic32mx.cfg | 5 +----
6 files changed, 35 insertions(+), 11 deletions(-)
create mode 100644 tcl/board/microchip_explorer16.cfg
hooks/post-receive
--
Main OpenOCD repository
|
|
From: Øyvind H. <go...@us...> - 2010-03-16 10:47:25
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via ab5f98edcd3e8810c15d378d3244238d9d8f8d0e (commit)
from f85ad1e52a499bc98ae9d559157e8adbe8a5ad1f (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit ab5f98edcd3e8810c15d378d3244238d9d8f8d0e
Author: richard vegh <veg...@gm...>
Date: Tue Mar 16 10:46:41 2010 +0100
lpc3180: LPC3180(LPC3250) SLC driver implemented
Until this time only basic SLC functionality exists when you want to use SLC to access external nand flash.
Basic functionality can be selected with command:
lpc3180 select 0 slc
It is anyway very slow to write/read to/from nand flash.
With the new command, SLC speed improved about 20 times, and hardware ECC info also read/written from/to nand flash OOB area:
lpc3180 select 0 slc bulk
Speed improvement achieved by using working are in SRAM of the LPC3250 chip and controlling DMA controller to interact between SRAM and SLC peripheral.
Here are the patches, and if they are ok than take them.
Tested with hitex LPC3250 usb stick.
Signed-off-by: Ãyvind Harboe <oyv...@zy...>
diff --git a/src/flash/nand/lpc3180.c b/src/flash/nand/lpc3180.c
index acb5f58..6562e04 100644
--- a/src/flash/nand/lpc3180.c
+++ b/src/flash/nand/lpc3180.c
@@ -1,6 +1,9 @@
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath *
* Dom...@gm... *
+ *
+ * Copyright (C) 2010 richard vegh <veg...@gm...> *
+ * Copyright (C) 2010 Oyvind Harboe <oyv...@zy...> *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
@@ -28,6 +31,13 @@
static int lpc3180_reset(struct nand_device *nand);
static int lpc3180_controller_ready(struct nand_device *nand, int timeout);
+static int lpc3180_tc_ready(struct nand_device *nand, int timeout);
+
+
+#define ECC_OFFS 0x120
+#define SPARE_OFFS 0x140
+#define DATA_OFFS 0x200
+
/* nand device lpc3180 <target#> <oscillator_frequency>
*/
@@ -253,8 +263,21 @@ static int lpc3180_init(struct nand_device *nand)
/* FLASHCLK_CTRL = 0x05 (enable clock for SLC flash controller) */
target_write_u32(target, 0x400040c8, 0x05);
- /* SLC_CFG = 0x (Force nCE assert, ECC enabled, WIDTH = bus_width) */
- target_write_u32(target, 0x20020014, 0x28 | (bus_width == 16) ? 1 : 0);
+ /* after reset set other registers of SLC so reset calling is here at the begining*/
+ lpc3180_reset(nand);
+
+ /* SLC_CFG = 0x (Force nCE assert, DMA ECC enabled, ECC enabled, DMA burst enabled, DMA read from SLC, WIDTH = bus_width) */
+ target_write_u32(target, 0x20020014, 0x3e | (bus_width == 16) ? 1 : 0);
+
+ /* SLC_IEN = 3 (INT_RDY_EN = 1) ,(INT_TC_STAT = 1) */
+ target_write_u32(target, 0x20020020, 0x03);
+
+ /* DMA configuration */
+ /* DMACLK_CTRL = 0x01 (enable clock for DMA controller) */
+ target_write_u32(target, 0x400040e8, 0x01);
+ /* DMACConfig = DMA enabled*/
+ target_write_u32(target, 0x31000030, 0x01);
+
/* calculate NAND controller timings */
cycle = lpc3180_cycle_time(lpc3180_info);
@@ -270,7 +293,6 @@ static int lpc3180_init(struct nand_device *nand)
((r_width & 0xf) << 8) | ((r_rdy & 0xf) << 12) | ((w_setup & 0xf) << 16) |
((w_hold & 0xf) << 20) | ((w_width & 0xf) << 24) | ((w_rdy & 0xf) << 28));
- lpc3180_reset(nand);
}
return ERROR_OK;
@@ -476,6 +498,7 @@ static int lpc3180_write_page(struct nand_device *nand, uint32_t page, uint8_t *
struct target *target = lpc3180_info->target;
int retval;
uint8_t status;
+ uint8_t *page_buffer;
if (target->state != TARGET_HALTED)
{
@@ -490,7 +513,6 @@ static int lpc3180_write_page(struct nand_device *nand, uint32_t page, uint8_t *
}
else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER)
{
- uint8_t *page_buffer;
uint8_t *oob_buffer;
int quarter, num_quarters;
@@ -606,8 +628,202 @@ static int lpc3180_write_page(struct nand_device *nand, uint32_t page, uint8_t *
}
else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER)
{
+
+ /**********************************************************************
+ * Write both SLC NAND flash page main area and spare area.
+ * Small page -
+ * ------------------------------------------
+ * | 512 bytes main | 16 bytes spare |
+ * ------------------------------------------
+ * Large page -
+ * ------------------------------------------
+ * | 2048 bytes main | 64 bytes spare |
+ * ------------------------------------------
+ * If DMA & ECC enabled, then the ECC generated for the 1st 256-byte
+ * data is written to the 3rd word of the spare area. The ECC
+ * generated for the 2nd 256-byte data is written to the 4th word
+ * of the spare area. The ECC generated for the 3rd 256-byte data is
+ * written to the 7th word of the spare area. The ECC generated
+ * for the 4th 256-byte data is written to the 8th word of the
+ * spare area and so on.
+ *
+ **********************************************************************/
+
+ int retval,i=0,target_mem_base;
+ uint8_t *ecc_flash_buffer;
+ struct working_area *pworking_area;
+
+
+ if(lpc3180_info->is_bulk){
+
+ if (!data && oob){
+ /*if oob only mode is active original method is used as SLC controller hangs during DMA interworking. Anyway the code supports the oob only mode below. */
return nand_write_page_raw(nand, page, data, data_size, oob, oob_size);
}
+ retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
+ if (ERROR_OK != retval)
+ return retval;
+
+ /* allocate a working area */
+ if (target->working_area_size < (uint32_t) nand->page_size + 0x200){
+ LOG_ERROR("Reserve at least 0x%x physical target working area",nand->page_size + 0x200);
+ return ERROR_FLASH_OPERATION_FAILED;
+ }
+ if (target->working_area_phys%4){
+ LOG_ERROR("Reserve the physical target working area at word boundary");
+ return ERROR_FLASH_OPERATION_FAILED;
+ }
+ if (target_alloc_working_area(target, target->working_area_size, &pworking_area) != ERROR_OK)
+ {
+ LOG_ERROR("no working area specified, can't read LPC internal flash");
+ return ERROR_FLASH_OPERATION_FAILED;
+ }
+ target_mem_base = target->working_area_phys;
+
+
+ if (nand->page_size == 2048)
+ {
+ page_buffer = malloc(2048);
+ }
+ else
+ {
+ page_buffer = malloc(512);
+ }
+
+ ecc_flash_buffer = malloc(64);
+
+ /* SLC_CFG = 0x (Force nCE assert, DMA ECC enabled, ECC enabled, DMA burst enabled, DMA write to SLC, WIDTH = bus_width) */
+ target_write_u32(target, 0x20020014, 0x3c);
+
+ if( data && !oob){
+ /* set DMA LLI-s in target memory and in DMA*/
+ for(i=0;i<nand->page_size/0x100;i++){
+
+ int tmp;
+ /* -------LLI for 256 byte block---------*/
+ /* DMACC0SrcAddr = SRAM */
+ target_write_u32(target,target_mem_base+0+i*32,target_mem_base+DATA_OFFS+i*256 );
+ if(i==0) target_write_u32(target,0x31000100,target_mem_base+DATA_OFFS );
+ /* DMACCxDestAddr = SLC_DMA_DATA */
+ target_write_u32(target,target_mem_base+4+i*32,0x20020038 );
+ if(i==0) target_write_u32(target,0x31000104,0x20020038 );
+ /* DMACCxLLI = next element */
+ tmp = (target_mem_base+(1+i*2)*16)&0xfffffffc;
+ target_write_u32(target,target_mem_base+8+i*32, tmp );
+ if(i==0) target_write_u32(target,0x31000108, tmp );
+ /* DMACCxControl = TransferSize =64, Source burst size =16, Destination burst size = 16, Source transfer width = 32 bit,
+ Destination transfer width = 32 bit, Source AHB master select = M0, Destination AHB master select = M0, Source increment = 1,
+ Destination increment = 0, Terminal count interrupt enable bit = 0*/
+ target_write_u32(target,target_mem_base+12+i*32,0x40 | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 1<<26 | 0<<27| 0<<31);
+ if(i==0) target_write_u32(target,0x3100010c,0x40 | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 1<<26 | 0<<27| 0<<31);
+
+ /* -------LLI for 3 byte ECC---------*/
+ /* DMACC0SrcAddr = SLC_ECC*/
+ target_write_u32(target,target_mem_base+16+i*32,0x20020034 );
+ /* DMACCxDestAddr = SRAM */
+ target_write_u32(target,target_mem_base+20+i*32,target_mem_base+SPARE_OFFS+8+16*(i>>1)+(i%2)*4 );
+ /* DMACCxLLI = next element */
+ tmp = (target_mem_base+(2+i*2)*16)&0xfffffffc;
+ target_write_u32(target,target_mem_base+24+i*32, tmp );
+ /* DMACCxControl = TransferSize =1, Source burst size =4, Destination burst size = 4, Source transfer width = 32 bit,
+ Destination transfer width = 32 bit, Source AHB master select = M0, Destination AHB master select = M0, Source increment = 0,
+ Destination increment = 1, Terminal count interrupt enable bit = 0*/
+ target_write_u32(target,target_mem_base+28+i*32,0x01 | 1<<12 | 1<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 0<<26 | 1<<27| 0<<31);
+ }
+ }
+ else if (data && oob){
+ /* -------LLI for 512 or 2048 bytes page---------*/
+ /* DMACC0SrcAddr = SRAM */
+ target_write_u32(target,target_mem_base,target_mem_base+DATA_OFFS );
+ target_write_u32(target,0x31000100,target_mem_base+DATA_OFFS );
+ /* DMACCxDestAddr = SLC_DMA_DATA */
+ target_write_u32(target,target_mem_base+4,0x20020038 );
+ target_write_u32(target,0x31000104,0x20020038 );
+ /* DMACCxLLI = next element */
+ target_write_u32(target,target_mem_base+8, (target_mem_base+32)&0xfffffffc );
+ target_write_u32(target,0x31000108, (target_mem_base+32)&0xfffffffc );
+ /* DMACCxControl = TransferSize =512 or 128, Source burst size =16, Destination burst size = 16, Source transfer width = 32 bit,
+ Destination transfer width = 32 bit, Source AHB master select = M0, Destination AHB master select = M0, Source increment = 1,
+ Destination increment = 0, Terminal count interrupt enable bit = 0*/
+ target_write_u32(target,target_mem_base+12,(nand->page_size==2048?512:128) | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 1<<26 | 0<<27| 0<<31);
+ target_write_u32(target,0x3100010c,(nand->page_size==2048?512:128) | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 1<<26 | 0<<27| 0<<31);
+ i = 1;
+ }
+ else if (!data && oob){
+ i = 0;
+ }
+
+ /* -------LLI for spare area---------*/
+ /* DMACC0SrcAddr = SRAM*/
+ target_write_u32(target,target_mem_base+0+i*32,target_mem_base+SPARE_OFFS );
+ if(i==0) target_write_u32(target,0x31000100,target_mem_base+SPARE_OFFS );
+ /* DMACCxDestAddr = SLC_DMA_DATA */
+ target_write_u32(target,target_mem_base+4+i*32,0x20020038 );
+ if(i==0) target_write_u32(target,0x31000104,0x20020038 );
+ /* DMACCxLLI = next element = NULL */
+ target_write_u32(target,target_mem_base+8+i*32, 0 );
+ if(i==0) target_write_u32(target,0x31000108,0 );
+ /* DMACCxControl = TransferSize =16 for large page or 4 for small page, Source burst size =16, Destination burst size = 16, Source transfer width = 32 bit,
+ Destination transfer width = 32 bit, Source AHB master select = M0, Destination AHB master select = M0, Source increment = 1,
+ Destination increment = 0, Terminal count interrupt enable bit = 0*/
+ target_write_u32(target,target_mem_base+12+i*32, (nand->page_size==2048?0x10:0x04) | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 1<<26 | 0<<27| 0<<31);
+ if(i==0) target_write_u32(target,0x3100010c,(nand->page_size==2048?0x10:0x04) | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 1<<26 | 0<<27| 0<<31 );
+
+
+
+ memset(ecc_flash_buffer, 0xff, 64);
+ if( oob ){
+ memcpy(ecc_flash_buffer,oob, oob_size);
+ }
+ target_write_memory(target, target_mem_base+SPARE_OFFS, 4, 16, ecc_flash_buffer);
+
+ if (data){
+ memset(page_buffer, 0xff, nand->page_size == 2048?2048:512);
+ memcpy(page_buffer,data, data_size);
+ target_write_memory(target, target_mem_base+DATA_OFFS, 4, nand->page_size == 2048?512:128, page_buffer);
+ }
+
+ free(page_buffer);
+ free(ecc_flash_buffer);
+
+ /* Enable DMA after channel set up !
+ LLI only works when DMA is the flow controller!
+ */
+ /* DMACCxConfig= E=1, SrcPeripheral = 1 (SLC), DestPeripheral = 1 (SLC), FlowCntrl = 2 (Pher -> Mem, DMA), IE = 0, ITC = 0, L= 0, H=0*/
+ target_write_u32(target,0x31000110, 1 | 1<<1 | 1<<6 | 2<<11 | 0<<14 | 0<<15 | 0<<16 | 0<<18);
+
+
+
+ /* SLC_CTRL = 3 (START DMA), ECC_CLEAR */
+ target_write_u32(target, 0x20020010, 0x3);
+
+ /* SLC_ICR = 2, INT_TC_CLR, clear pending TC*/
+ target_write_u32(target, 0x20020028, 2);
+
+ /* SLC_TC */
+ if (!data && oob)
+ target_write_u32(target, 0x20020030, (nand->page_size==2048?0x10:0x04));
+ else
+ target_write_u32(target, 0x20020030, (nand->page_size==2048?0x840:0x210));
+
+ nand_write_finish(nand);
+
+
+ if (!lpc3180_tc_ready(nand, 1000))
+ {
+ LOG_ERROR("timeout while waiting for completion of DMA");
+ return ERROR_NAND_OPERATION_FAILED;
+ }
+
+ target_free_working_area(target,pworking_area);
+
+ LOG_INFO("Page = 0x%x was written.",page);
+
+ }
+ else
+ return nand_write_page_raw(nand, page, data, data_size, oob, oob_size);
+ }
+
return ERROR_OK;
}
@@ -616,6 +832,7 @@ static int lpc3180_read_page(struct nand_device *nand, uint32_t page, uint8_t *d
{
struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
struct target *target = lpc3180_info->target;
+ uint8_t *page_buffer;
if (target->state != TARGET_HALTED)
{
@@ -630,7 +847,6 @@ static int lpc3180_read_page(struct nand_device *nand, uint32_t page, uint8_t *d
}
else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER)
{
- uint8_t *page_buffer;
uint8_t *oob_buffer;
uint32_t page_bytes_done = 0;
uint32_t oob_bytes_done = 0;
@@ -753,6 +969,174 @@ static int lpc3180_read_page(struct nand_device *nand, uint32_t page, uint8_t *d
}
else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER)
{
+
+ /**********************************************************************
+ * Read both SLC NAND flash page main area and spare area.
+ * Small page -
+ * ------------------------------------------
+ * | 512 bytes main | 16 bytes spare |
+ * ------------------------------------------
+ * Large page -
+ * ------------------------------------------
+ * | 2048 bytes main | 64 bytes spare |
+ * ------------------------------------------
+ * If DMA & ECC enabled, then the ECC generated for the 1st 256-byte
+ * data is compared with the 3rd word of the spare area. The ECC
+ * generated for the 2nd 256-byte data is compared with the 4th word
+ * of the spare area. The ECC generated for the 3rd 256-byte data is
+ * compared with the 7th word of the spare area. The ECC generated
+ * for the 4th 256-byte data is compared with the 8th word of the
+ * spare area and so on.
+ *
+ **********************************************************************/
+
+ int retval,i,target_mem_base;
+ uint8_t *ecc_hw_buffer;
+ uint8_t *ecc_flash_buffer;
+ struct working_area *pworking_area;
+
+ if(lpc3180_info->is_bulk){
+
+ /* read always the data and also oob areas*/
+
+ retval = nand_page_command(nand, page, NAND_CMD_READ0, 0);
+ if (ERROR_OK != retval)
+ return retval;
+
+ /* allocate a working area */
+ if (target->working_area_size < (uint32_t) nand->page_size + 0x200){
+ LOG_ERROR("Reserve at least 0x%x physical target working area",nand->page_size + 0x200);
+ return ERROR_FLASH_OPERATION_FAILED;
+ }
+ if (target->working_area_phys%4){
+ LOG_ERROR("Reserve the physical target working area at word boundary");
+ return ERROR_FLASH_OPERATION_FAILED;
+ }
+ if (target_alloc_working_area(target, target->working_area_size, &pworking_area) != ERROR_OK)
+ {
+ LOG_ERROR("no working area specified, can't read LPC internal flash");
+ return ERROR_FLASH_OPERATION_FAILED;
+ }
+ target_mem_base = target->working_area_phys;
+
+ if (nand->page_size == 2048)
+ {
+ page_buffer = malloc(2048);
+ }
+ else
+ {
+ page_buffer = malloc(512);
+ }
+
+ ecc_hw_buffer = malloc(32);
+ ecc_flash_buffer = malloc(64);
+
+ /* SLC_CFG = 0x (Force nCE assert, DMA ECC enabled, ECC enabled, DMA burst enabled, DMA read from SLC, WIDTH = bus_width) */
+ target_write_u32(target, 0x20020014, 0x3e);
+
+ /* set DMA LLI-s in target memory and in DMA*/
+ for(i=0;i<nand->page_size/0x100;i++){
+ int tmp;
+ /* -------LLI for 256 byte block---------*/
+ /* DMACC0SrcAddr = SLC_DMA_DATA*/
+ target_write_u32(target,target_mem_base+0+i*32,0x20020038 );
+ if(i==0) target_write_u32(target,0x31000100,0x20020038 );
+ /* DMACCxDestAddr = SRAM */
+ target_write_u32(target,target_mem_base+4+i*32,target_mem_base+DATA_OFFS+i*256 );
+ if(i==0) target_write_u32(target,0x31000104,target_mem_base+DATA_OFFS );
+ /* DMACCxLLI = next element */
+ tmp = (target_mem_base+(1+i*2)*16)&0xfffffffc;
+ target_write_u32(target,target_mem_base+8+i*32, tmp );
+ if(i==0) target_write_u32(target,0x31000108, tmp );
+ /* DMACCxControl = TransferSize =64, Source burst size =16, Destination burst size = 16, Source transfer width = 32 bit,
+ Destination transfer width = 32 bit, Source AHB master select = M0, Destination AHB master select = M0, Source increment = 0,
+ Destination increment = 1, Terminal count interrupt enable bit = 0*/
+ target_write_u32(target,target_mem_base+12+i*32,0x40 | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 0<<26 | 1<<27| 0<<31);
+ if(i==0) target_write_u32(target,0x3100010c,0x40 | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 0<<26 | 1<<27| 0<<31);
+
+ /* -------LLI for 3 byte ECC---------*/
+ /* DMACC0SrcAddr = SLC_ECC*/
+ target_write_u32(target,target_mem_base+16+i*32,0x20020034 );
+ /* DMACCxDestAddr = SRAM */
+ target_write_u32(target,target_mem_base+20+i*32,target_mem_base+ECC_OFFS+i*4 );
+ /* DMACCxLLI = next element */
+ tmp = (target_mem_base+(2+i*2)*16)&0xfffffffc;
+ target_write_u32(target,target_mem_base+24+i*32, tmp );
+ /* DMACCxControl = TransferSize =1, Source burst size =4, Destination burst size = 4, Source transfer width = 32 bit,
+ Destination transfer width = 32 bit, Source AHB master select = M0, Destination AHB master select = M0, Source increment = 0,
+ Destination increment = 1, Terminal count interrupt enable bit = 0*/
+ target_write_u32(target,target_mem_base+28+i*32,0x01 | 1<<12 | 1<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 0<<26 | 1<<27| 0<<31);
+
+
+ }
+
+ /* -------LLI for spare area---------*/
+ /* DMACC0SrcAddr = SLC_DMA_DATA*/
+ target_write_u32(target,target_mem_base+0+i*32,0x20020038 );
+ /* DMACCxDestAddr = SRAM */
+ target_write_u32(target,target_mem_base+4+i*32,target_mem_base+SPARE_OFFS );
+ /* DMACCxLLI = next element = NULL */
+ target_write_u32(target,target_mem_base+8+i*32, 0 );
+ /* DMACCxControl = TransferSize =16 for large page or 4 for small page, Source burst size =16, Destination burst size = 16, Source transfer width = 32 bit,
+ Destination transfer width = 32 bit, Source AHB master select = M0, Destination AHB master select = M0, Source increment = 0,
+ Destination increment = 1, Terminal count interrupt enable bit = 0*/
+ target_write_u32(target,target_mem_base+12+i*32, (nand->page_size==2048?0x10:0x04) | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 0<<26 | 1<<27| 0<<31);
+
+ /* Enable DMA after channel set up !
+ LLI only works when DMA is the flow controller!
+ */
+ /* DMACCxConfig= E=1, SrcPeripheral = 1 (SLC), DestPeripheral = 1 (SLC), FlowCntrl = 2 (Pher-> Mem, DMA), IE = 0, ITC = 0, L= 0, H=0*/
+ target_write_u32(target,0x31000110, 1 | 1<<1 | 1<<6 | 2<<11 | 0<<14 | 0<<15 | 0<<16 | 0<<18);
+
+
+ /* SLC_CTRL = 3 (START DMA), ECC_CLEAR */
+ target_write_u32(target, 0x20020010, 0x3);
+
+ /* SLC_ICR = 2, INT_TC_CLR, clear pending TC*/
+ target_write_u32(target, 0x20020028, 2);
+
+ /* SLC_TC */
+ target_write_u32(target, 0x20020030, (nand->page_size==2048?0x840:0x210));
+
+ if (!lpc3180_tc_ready(nand, 1000))
+ {
+ LOG_ERROR("timeout while waiting for completion of DMA");
+ free(page_buffer);
+ free(ecc_hw_buffer);
+ free(ecc_flash_buffer);
+ target_free_working_area(target,pworking_area);
+ return ERROR_NAND_OPERATION_FAILED;
+ }
+
+ if (data){
+ target_read_memory(target, target_mem_base+DATA_OFFS, 4, nand->page_size == 2048?512:128, page_buffer);
+ memcpy(data, page_buffer, data_size);
+
+ LOG_INFO("Page = 0x%x was read.",page);
+
+ /* check hw generated ECC for each 256 bytes block with the saved ECC in flash spare area*/
+ int idx = nand->page_size/0x200 ;
+ target_read_memory(target, target_mem_base+SPARE_OFFS, 4, 16, ecc_flash_buffer);
+ target_read_memory(target, target_mem_base+ECC_OFFS, 4, 8, ecc_hw_buffer);
+ for(i=0;i<idx;i++){
+ if( (0x00ffffff&*(uint32_t *)(ecc_hw_buffer+i*8)) != (0x00ffffff&*(uint32_t *)(ecc_flash_buffer+8+i*16)) )
+ LOG_WARNING("ECC mismatch at 256 bytes size block= %d at page= 0x%x",i*2+1,page);
+ if( (0x00ffffff&*(uint32_t *)(ecc_hw_buffer+4+i*8)) != (0x00ffffff&*(uint32_t *)(ecc_flash_buffer+12+i*16)) )
+ LOG_WARNING("ECC mismatch at 256 bytes size block= %d at page= 0x%x",i*2+2,page);
+ }
+ }
+
+ if (oob)
+ memcpy(oob, ecc_flash_buffer, oob_size);
+
+ free(page_buffer);
+ free(ecc_hw_buffer);
+ free(ecc_flash_buffer);
+
+ target_free_working_area(target,pworking_area);
+
+ }
+ else
return nand_read_page_raw(nand, page, data, data_size, oob, oob_size);
}
@@ -855,6 +1239,42 @@ static int lpc3180_nand_ready(struct nand_device *nand, int timeout)
return 0;
}
+static int lpc3180_tc_ready(struct nand_device *nand, int timeout)
+{
+ struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
+ struct target *target = lpc3180_info->target;
+
+ if (target->state != TARGET_HALTED)
+ {
+ LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
+ return ERROR_NAND_OPERATION_FAILED;
+ }
+
+ LOG_DEBUG("lpc3180_tc_ready count start=%d",
+ timeout);
+
+ do
+ {
+ if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER)
+ {
+ uint32_t status = 0x0;
+ /* Read SLC_INT_STAT and check INT_TC_STAT bit */
+ target_read_u32(target, 0x2002001c, &status);
+
+ if (status & 2){
+ LOG_DEBUG("lpc3180_tc_ready count=%d",
+ timeout);
+ return 1;
+ }
+ }
+
+ alive_sleep(1);
+ } while (timeout-- > 0);
+
+ return 0;
+}
+
+
COMMAND_HANDLER(handle_lpc3180_select_command)
{
struct lpc3180_nand_controller *lpc3180_info = NULL;
@@ -863,7 +1283,7 @@ COMMAND_HANDLER(handle_lpc3180_select_command)
"no", "mlc", "slc"
};
- if ((CMD_ARGC < 1) || (CMD_ARGC > 2))
+ if ((CMD_ARGC < 1) || (CMD_ARGC > 3))
{
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -879,7 +1299,7 @@ COMMAND_HANDLER(handle_lpc3180_select_command)
lpc3180_info = nand->controller_priv;
- if (CMD_ARGC == 2)
+ if (CMD_ARGC >= 2)
{
if (strcmp(CMD_ARGV[1], "mlc") == 0)
{
@@ -888,6 +1308,12 @@ COMMAND_HANDLER(handle_lpc3180_select_command)
else if (strcmp(CMD_ARGV[1], "slc") == 0)
{
lpc3180_info->selected_controller = LPC3180_SLC_CONTROLLER;
+ if (CMD_ARGC == 3 && strcmp(CMD_ARGV[2], "bulk") == 0){
+ lpc3180_info->is_bulk = 1;
+ }
+ else{
+ lpc3180_info->is_bulk = 0;
+ }
}
else
{
@@ -895,7 +1321,12 @@ COMMAND_HANDLER(handle_lpc3180_select_command)
}
}
+ if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER)
command_print(CMD_CTX, "%s controller selected", selected[lpc3180_info->selected_controller]);
+ else{
+ command_print(CMD_CTX, lpc3180_info->is_bulk?"%s controller selected bulk mode is avaliable":"%s controller selected bulk mode is not avaliable", selected[lpc3180_info->selected_controller]);
+ }
+
return ERROR_OK;
}
@@ -905,8 +1336,8 @@ static const struct command_registration lpc3180_exec_command_handlers[] = {
.name = "select",
.handler = handle_lpc3180_select_command,
.mode = COMMAND_EXEC,
- .help = "select MLC or SLC controller (default is MLC)",
- .usage = "bank_id ['mlc'|'slc']",
+ .help = "select MLC or SLC controller (default is MLC), SLC can be set to bulk mode",
+ .usage = "bank_id ['mlc'|'slc' ['bulk'] ]",
},
COMMAND_REGISTRATION_DONE
};
diff --git a/src/flash/nand/lpc3180.h b/src/flash/nand/lpc3180.h
index 0891ced..88280f3 100644
--- a/src/flash/nand/lpc3180.h
+++ b/src/flash/nand/lpc3180.h
@@ -32,6 +32,7 @@ struct lpc3180_nand_controller
struct target *target;
int osc_freq;
enum lpc3180_selected_controller selected_controller;
+ int is_bulk;
int sw_write_protection;
uint32_t sw_wp_lower_bound;
uint32_t sw_wp_upper_bound;
-----------------------------------------------------------------------
Summary of changes:
src/flash/nand/lpc3180.c | 449 +++++++++++++++++++++++++++++++++++++++++++++-
src/flash/nand/lpc3180.h | 1 +
2 files changed, 441 insertions(+), 9 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: Øyvind H. <go...@us...> - 2010-03-16 10:37:56
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via f85ad1e52a499bc98ae9d559157e8adbe8a5ad1f (commit)
from a540033a71eb0b10bb8de85963781ec1b9c06cf1 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit f85ad1e52a499bc98ae9d559157e8adbe8a5ad1f
Author: Bradey Honsinger <br...@gm...>
Date: Mon Mar 15 08:43:41 2010 +0100
image loading: fix problem with offsets > 0x80000000
Fixes bug that prevented users from specifying a base address of
0x80000000 or higher in image commands (flash write_image, etm image,
xscale trace_image).
image.base_address is an offset from the start address contained in
the image file (if there is one), or from 0 (for binary files). As a
signed 32-bit int, it couldn't be greater than 0x7fffffff, which is a
problem when trying to write a binary file to flash above that
address. Changing it to a 64-bit long long keeps it as a signed
offset, but allows it to cover the entire 32-bit address space.
Signed-off-by: Ãyvind Harboe <oyv...@zy...>
diff --git a/src/flash/nor/tcl.c b/src/flash/nor/tcl.c
index a40230b..38cb655 100644
--- a/src/flash/nor/tcl.c
+++ b/src/flash/nor/tcl.c
@@ -434,7 +434,7 @@ COMMAND_HANDLER(handle_flash_write_image_command)
if (CMD_ARGC >= 2)
{
image.base_address_set = 1;
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], image.base_address);
+ COMMAND_PARSE_NUMBER(llong, CMD_ARGV[1], image.base_address);
}
else
{
diff --git a/src/target/etm.c b/src/target/etm.c
index 10ab72a..67dac06 100644
--- a/src/target/etm.c
+++ b/src/target/etm.c
@@ -1761,7 +1761,7 @@ COMMAND_HANDLER(handle_etm_image_command)
if (CMD_ARGC >= 2)
{
etm_ctx->image->base_address_set = 1;
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], etm_ctx->image->base_address);
+ COMMAND_PARSE_NUMBER(llong, CMD_ARGV[1], etm_ctx->image->base_address);
}
else
{
diff --git a/src/target/image.h b/src/target/image.h
index e963b3c..b096031 100644
--- a/src/target/image.h
+++ b/src/target/image.h
@@ -62,7 +62,7 @@ struct image
int num_sections; /* number of sections contained in the image */
struct imageection *sections; /* array of sections */
int base_address_set; /* whether the image has a base address set (for relocation purposes) */
- int base_address; /* base address, if one is set */
+ long long base_address; /* base address, if one is set */
int start_address_set; /* whether the image has a start address (entry point) associated */
uint32_t start_address; /* start address, if one is set */
};
diff --git a/src/target/xscale.c b/src/target/xscale.c
index 50c9595..dd4a7ee 100644
--- a/src/target/xscale.c
+++ b/src/target/xscale.c
@@ -3419,7 +3419,7 @@ COMMAND_HANDLER(xscale_handle_trace_image_command)
if (CMD_ARGC >= 2)
{
xscale->trace.image->base_address_set = 1;
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], xscale->trace.image->base_address);
+ COMMAND_PARSE_NUMBER(llong, CMD_ARGV[1], xscale->trace.image->base_address);
}
else
{
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/tcl.c | 2 +-
src/target/etm.c | 2 +-
src/target/image.h | 2 +-
src/target/xscale.c | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: David B. <dbr...@us...> - 2010-03-15 16:50:57
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via a540033a71eb0b10bb8de85963781ec1b9c06cf1 (commit)
via 1bd3ae398646da1107e00e0651abbf9691d2d9ff (commit)
via b559b273b526b3077b3ca219eecc8df9f86efac0 (commit)
via 96f9790279f74f39b35fc3ad09340fd03123180c (commit)
from 4b964a81ca1423b808a056b457e3d458689d50fa (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit a540033a71eb0b10bb8de85963781ec1b9c06cf1
Author: David Brownell <dbr...@us...>
Date: Mon Mar 15 08:43:16 2010 -0700
move "reset_config" out of JTAG command group
The SRST configuration options are not specific to JTAG, so this
command may be needed with non-JTAG debug sessions. Just move
the command to a different group.
(The TRST options are, however, clearly JTAG-specific, but for
compatibility, they're now left alone. The flags they control
could later be disabled in non-JTAG sessions.)
Signed-off-by: David Brownell <dbr...@us...>
diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c
index 686eb3e..90081cd 100644
--- a/src/jtag/tcl.c
+++ b/src/jtag/tcl.c
@@ -1645,6 +1645,17 @@ static const struct command_registration interface_command_handlers[] = {
.mode = COMMAND_ANY,
.help = "List all built-in debug adapter interfaces (drivers)",
},
+ {
+ .name = "reset_config",
+ .handler = handle_reset_config_command,
+ .mode = COMMAND_ANY,
+ .help = "configure adapter reset behavior",
+ .usage = "[none|trst_only|srst_only|trst_and_srst] "
+ "[srst_pulls_trst|trst_pulls_srst|combined|separate] "
+ "[srst_gates_jtag|srst_nogate] "
+ "[trst_push_pull|trst_open_drain] "
+ "[srst_push_pull|srst_open_drain]",
+ },
COMMAND_REGISTRATION_DONE
};
@@ -1670,17 +1681,6 @@ static const struct command_registration jtag_command_handlers[] = {
.usage = "[fallback_speed_khz]",
},
{
- .name = "reset_config",
- .handler = handle_reset_config_command,
- .mode = COMMAND_ANY,
- .help = "configure JTAG reset behavior",
- .usage = "[none|trst_only|srst_only|trst_and_srst] "
- "[srst_pulls_trst|trst_pulls_srst|combined|separate] "
- "[srst_gates_jtag|srst_nogate] "
- "[trst_push_pull|trst_open_drain] "
- "[srst_push_pull|srst_open_drain]",
- },
- {
.name = "jtag_ntrst_delay",
.handler = handle_jtag_ntrst_delay_command,
.mode = COMMAND_ANY,
commit 1bd3ae398646da1107e00e0651abbf9691d2d9ff
Author: David Brownell <dbr...@us...>
Date: Mon Mar 15 08:42:26 2010 -0700
rename jtag_nsrst_assert_width as adapter_nsrst_assert_width
Globally rename "jtag_nsrst_assert_width" as "adapter_nsrst_assert_width",
and move it out of the "jtag" command group ... it needs to be used with
non-JTAG transports
Includes a migration aid (in jtag/startup.tcl) so that old user scripts
won't break. That aid should Sunset in about a year.
Signed-off-by: David Brownell <dbr...@us...>
diff --git a/NEWS b/NEWS
index 924ee37..cc2560b 100644
--- a/NEWS
+++ b/NEWS
@@ -11,6 +11,7 @@ JTAG Layer:
will not be around forever.
jtag_khz ... is now adapter_khz
jtag_nsrst_delay ... is now adapter_nsrst_delay
+ jtag_nsrst_assert_width ... is now adapter_nsrst_assert_width
Boundary Scan:
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 9d1532b..e1bb2b7 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -2643,7 +2643,7 @@ needing to cope with both architecture and board specific constraints.
@section Commands for Handling Resets
-@deffn {Command} jtag_nsrst_assert_width milliseconds
+@deffn {Command} adapter_nsrst_assert_width milliseconds
Minimum amount of time (in milliseconds) OpenOCD should wait
after asserting nSRST (active-low system reset) before
allowing it to be deasserted.
diff --git a/src/jtag/core.c b/src/jtag/core.c
index bb11ff1..9792280 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -95,7 +95,7 @@ static int jtag_verify = 1;
/* how long the OpenOCD should wait before attempting JTAG communication after reset lines deasserted (in ms) */
static int adapter_nsrst_delay = 0; /* default to no nSRST delay */
static int jtag_ntrst_delay = 0; /* default to no nTRST delay */
-static int jtag_nsrst_assert_width = 0; /* width of assertion */
+static int adapter_nsrst_assert_width = 0; /* width of assertion */
static int jtag_ntrst_assert_width = 0; /* width of assertion */
/**
@@ -699,8 +699,8 @@ void jtag_add_reset(int req_tlr_or_trst, int req_srst)
if (jtag_srst)
{
LOG_DEBUG("SRST line asserted");
- if (jtag_nsrst_assert_width)
- jtag_add_sleep(jtag_nsrst_assert_width * 1000);
+ if (adapter_nsrst_assert_width)
+ jtag_add_sleep(adapter_nsrst_assert_width * 1000);
}
else {
LOG_DEBUG("SRST line released");
@@ -1714,11 +1714,11 @@ unsigned jtag_get_ntrst_delay(void)
void jtag_set_nsrst_assert_width(unsigned delay)
{
- jtag_nsrst_assert_width = delay;
+ adapter_nsrst_assert_width = delay;
}
unsigned jtag_get_nsrst_assert_width(void)
{
- return jtag_nsrst_assert_width;
+ return adapter_nsrst_assert_width;
}
void jtag_set_ntrst_assert_width(unsigned delay)
{
diff --git a/src/jtag/startup.tcl b/src/jtag/startup.tcl
index 42fbe4f..3a36886 100644
--- a/src/jtag/startup.tcl
+++ b/src/jtag/startup.tcl
@@ -84,4 +84,6 @@ proc srst_asserted {} {
#
proc jtag_khz args { eval adapter_khz $args }
proc jtag_nsrst_delay args { eval adapter_nsrst_delay $args }
+proc jtag_nsrst_assert_width args { eval adapter_nsrst_assert_width $args }
+
# END MIGRATION AIDS
diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c
index d587922..686eb3e 100644
--- a/src/jtag/tcl.c
+++ b/src/jtag/tcl.c
@@ -1321,7 +1321,7 @@ COMMAND_HANDLER(handle_jtag_ntrst_delay_command)
return ERROR_OK;
}
-COMMAND_HANDLER(handle_jtag_nsrst_assert_width_command)
+COMMAND_HANDLER(handle_adapter_nsrst_assert_width_command)
{
if (CMD_ARGC > 1)
return ERROR_COMMAND_SYNTAX_ERROR;
@@ -1332,7 +1332,7 @@ COMMAND_HANDLER(handle_jtag_nsrst_assert_width_command)
jtag_set_nsrst_assert_width(delay);
}
- command_print(CMD_CTX, "jtag_nsrst_assert_width: %u", jtag_get_nsrst_assert_width());
+ command_print(CMD_CTX, "adapter_nsrst_assert_width: %u", jtag_get_nsrst_assert_width());
return ERROR_OK;
}
@@ -1619,10 +1619,17 @@ static const struct command_registration interface_command_handlers[] = {
.usage = "[khz]",
},
{
+ .name = "adapter_nsrst_assert_width",
+ .handler = handle_adapter_nsrst_assert_width_command,
+ .mode = COMMAND_ANY,
+ .help = "delay after asserting SRST in ms",
+ .usage = "[milliseconds]",
+ },
+ {
.name = "adapter_nsrst_delay",
.handler = handle_adapter_nsrst_delay_command,
.mode = COMMAND_ANY,
- .help = "delay after deasserting srst in ms",
+ .help = "delay after deasserting SRST in ms",
.usage = "[milliseconds]",
},
{
@@ -1681,13 +1688,6 @@ static const struct command_registration jtag_command_handlers[] = {
.usage = "[milliseconds]",
},
{
- .name = "jtag_nsrst_assert_width",
- .handler = handle_jtag_nsrst_assert_width_command,
- .mode = COMMAND_ANY,
- .help = "delay after asserting srst in ms",
- .usage = "[milliseconds]",
- },
- {
.name = "jtag_ntrst_assert_width",
.handler = handle_jtag_ntrst_assert_width_command,
.mode = COMMAND_ANY,
diff --git a/tcl/board/telo.cfg b/tcl/board/telo.cfg
index 80040b1..a60cb02 100644
--- a/tcl/board/telo.cfg
+++ b/tcl/board/telo.cfg
@@ -13,7 +13,7 @@ source [find target/c100helper.tcl]
# use libftdi.so library instead with this script
# make the reset asserted to
# allow RC circuit to discharge for: [ms]
-jtag_nsrst_assert_width 100
+adapter_nsrst_assert_width 100
jtag_ntrst_assert_width 100
# don't talk to JTAG after reset for: [ms]
adapter_nsrst_delay 100
diff --git a/tcl/target/telo.cfg b/tcl/target/telo.cfg
index 40674b9..aa9ff22 100644
--- a/tcl/target/telo.cfg
+++ b/tcl/target/telo.cfg
@@ -13,7 +13,7 @@ source [find target/c100helper.tcl]
# use libftdi.so library instead with this script
# make the reset asserted to
# allow RC circuit to discharge for: [ms]
-jtag_nsrst_assert_width 100
+adapter_nsrst_assert_width 100
jtag_ntrst_assert_width 100
# don't talk to JTAG after reset for: [ms]
adapter_nsrst_delay 100
commit b559b273b526b3077b3ca219eecc8df9f86efac0
Author: David Brownell <dbr...@us...>
Date: Mon Mar 15 08:41:30 2010 -0700
rename jtag_nsrst_delay as adapter_nsrst_delay
Globally rename "jtag_nsrst_delay" as "adapter_nsrst_delay", and move it
out of the "jtag" command group ... it needs to be used with non-JTAG
transports
Includes a migration aid (in jtag/startup.tcl) so that old user scripts
won't break. That aid should Sunset in about a year.
Signed-off-by: David Brownell <dbr...@us...>
diff --git a/NEWS b/NEWS
index 4e093dc..924ee37 100644
--- a/NEWS
+++ b/NEWS
@@ -10,6 +10,7 @@ JTAG Layer:
convert your scripts to the new names, since those procedures
will not be around forever.
jtag_khz ... is now adapter_khz
+ jtag_nsrst_delay ... is now adapter_nsrst_delay
Boundary Scan:
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 5a1e095..9d1532b 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -2603,7 +2603,7 @@ stops issuing the reset. For example, there may be chip or board
requirements that all reset pulses last for at least a
certain amount of time; and reset buttons commonly have
hardware debouncing.
-Use the @command{jtag_nsrst_delay} and @command{jtag_ntrst_delay}
+Use the @command{adapter_nsrst_delay} and @command{jtag_ntrst_delay}
commands to say when extra delays are needed.
@item @emph{Drive type} ... Reset lines often have a pullup
@@ -2649,7 +2649,7 @@ after asserting nSRST (active-low system reset) before
allowing it to be deasserted.
@end deffn
-@deffn {Command} jtag_nsrst_delay milliseconds
+@deffn {Command} adapter_nsrst_delay milliseconds
How long (in milliseconds) OpenOCD should wait after deasserting
nSRST (active-low system reset) before starting new JTAG operations.
When a board has a reset button connected to SRST line it will
diff --git a/src/jtag/core.c b/src/jtag/core.c
index bdf968e..bb11ff1 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -93,7 +93,7 @@ static bool jtag_verify_capture_ir = true;
static int jtag_verify = 1;
/* how long the OpenOCD should wait before attempting JTAG communication after reset lines deasserted (in ms) */
-static int jtag_nsrst_delay = 0; /* default to no nSRST delay */
+static int adapter_nsrst_delay = 0; /* default to no nSRST delay */
static int jtag_ntrst_delay = 0; /* default to no nTRST delay */
static int jtag_nsrst_assert_width = 0; /* width of assertion */
static int jtag_ntrst_assert_width = 0; /* width of assertion */
@@ -704,8 +704,8 @@ void jtag_add_reset(int req_tlr_or_trst, int req_srst)
}
else {
LOG_DEBUG("SRST line released");
- if (jtag_nsrst_delay)
- jtag_add_sleep(jtag_nsrst_delay * 1000);
+ if (adapter_nsrst_delay)
+ jtag_add_sleep(adapter_nsrst_delay * 1000);
}
}
@@ -1696,11 +1696,11 @@ int jtag_get_srst(void)
void jtag_set_nsrst_delay(unsigned delay)
{
- jtag_nsrst_delay = delay;
+ adapter_nsrst_delay = delay;
}
unsigned jtag_get_nsrst_delay(void)
{
- return jtag_nsrst_delay;
+ return adapter_nsrst_delay;
}
void jtag_set_ntrst_delay(unsigned delay)
{
diff --git a/src/jtag/startup.tcl b/src/jtag/startup.tcl
index c49c43e..42fbe4f 100644
--- a/src/jtag/startup.tcl
+++ b/src/jtag/startup.tcl
@@ -83,4 +83,5 @@ proc srst_asserted {} {
# FIXME phase these aids out after about April 2011
#
proc jtag_khz args { eval adapter_khz $args }
+proc jtag_nsrst_delay args { eval adapter_nsrst_delay $args }
# END MIGRATION AIDS
diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c
index 8faefd1..d587922 100644
--- a/src/jtag/tcl.c
+++ b/src/jtag/tcl.c
@@ -1291,7 +1291,7 @@ next:
return ERROR_OK;
}
-COMMAND_HANDLER(handle_jtag_nsrst_delay_command)
+COMMAND_HANDLER(handle_adapter_nsrst_delay_command)
{
if (CMD_ARGC > 1)
return ERROR_COMMAND_SYNTAX_ERROR;
@@ -1302,7 +1302,7 @@ COMMAND_HANDLER(handle_jtag_nsrst_delay_command)
jtag_set_nsrst_delay(delay);
}
- command_print(CMD_CTX, "jtag_nsrst_delay: %u", jtag_get_nsrst_delay());
+ command_print(CMD_CTX, "adapter_nsrst_delay: %u", jtag_get_nsrst_delay());
return ERROR_OK;
}
@@ -1619,6 +1619,13 @@ static const struct command_registration interface_command_handlers[] = {
.usage = "[khz]",
},
{
+ .name = "adapter_nsrst_delay",
+ .handler = handle_adapter_nsrst_delay_command,
+ .mode = COMMAND_ANY,
+ .help = "delay after deasserting srst in ms",
+ .usage = "[milliseconds]",
+ },
+ {
.name = "interface",
.handler = handle_interface_command,
.mode = COMMAND_CONFIG,
@@ -1667,13 +1674,6 @@ static const struct command_registration jtag_command_handlers[] = {
"[srst_push_pull|srst_open_drain]",
},
{
- .name = "jtag_nsrst_delay",
- .handler = handle_jtag_nsrst_delay_command,
- .mode = COMMAND_ANY,
- .help = "delay after deasserting srst in ms",
- .usage = "[milliseconds]",
- },
- {
.name = "jtag_ntrst_delay",
.handler = handle_jtag_ntrst_delay_command,
.mode = COMMAND_ANY,
diff --git a/tcl/board/at91sam9g20-ek.cfg b/tcl/board/at91sam9g20-ek.cfg
index f24f1a1..c3eb952 100644
--- a/tcl/board/at91sam9g20-ek.cfg
+++ b/tcl/board/at91sam9g20-ek.cfg
@@ -32,7 +32,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
# affected by the board and type of JTAG adapter. A value of 200 ms seems
# to work reliably for the configuration listed in the file header above.
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
jtag_ntrst_delay 200
# Set fallback clock to 1/6 of worst-case clock speed (which would be the 32.768 kHz slow clock).
diff --git a/tcl/board/crossbow_tech_imote2.cfg b/tcl/board/crossbow_tech_imote2.cfg
index 88d4aa7..002b537 100644
--- a/tcl/board/crossbow_tech_imote2.cfg
+++ b/tcl/board/crossbow_tech_imote2.cfg
@@ -4,7 +4,7 @@ set CHIPNAME imote2
source [find target/pxa270.cfg]
# longer-than-normal reset delay
-jtag_nsrst_delay 800
+adapter_nsrst_delay 800
reset_config trst_and_srst separate
diff --git a/tcl/board/csb732.cfg b/tcl/board/csb732.cfg
index cad38e2..4d6f0e4 100644
--- a/tcl/board/csb732.cfg
+++ b/tcl/board/csb732.cfg
@@ -3,7 +3,7 @@ source [find target/imx35.cfg]
# Determined by trial and error
reset_config trst_and_srst combined
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
jtag_ntrst_delay 200
$_TARGETNAME configure -event gdb-attach { reset init }
diff --git a/tcl/board/digi_connectcore_wi-9c.cfg b/tcl/board/digi_connectcore_wi-9c.cfg
index 2d82376..ad40d53 100644
--- a/tcl/board/digi_connectcore_wi-9c.cfg
+++ b/tcl/board/digi_connectcore_wi-9c.cfg
@@ -36,7 +36,7 @@ if { [info exists CPUTAPID ] } {
set _TARGETNAME $_CHIPNAME.cpu
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
jtag_ntrst_delay 0
diff --git a/tcl/board/ek-lm3s1968.cfg b/tcl/board/ek-lm3s1968.cfg
index 6ce7f7f..28066f3 100644
--- a/tcl/board/ek-lm3s1968.cfg
+++ b/tcl/board/ek-lm3s1968.cfg
@@ -16,7 +16,7 @@ source [find target/lm3s1968.cfg]
# jtag speed
adapter_khz 3000
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
#LM3S1968 Evaluation Board has only srst
reset_config srst_only
diff --git a/tcl/board/ek-lm3s811.cfg b/tcl/board/ek-lm3s811.cfg
index 078cae1..7d3f2ce 100644
--- a/tcl/board/ek-lm3s811.cfg
+++ b/tcl/board/ek-lm3s811.cfg
@@ -12,7 +12,7 @@ source [find target/lm3s811.cfg]
# jtag speed
adapter_khz 500
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
#LM3S811 Evaluation Board has only srst
reset_config srst_only
diff --git a/tcl/board/ek-lm3s9b9x.cfg b/tcl/board/ek-lm3s9b9x.cfg
index b8be88b..fb6272a 100644
--- a/tcl/board/ek-lm3s9b9x.cfg
+++ b/tcl/board/ek-lm3s9b9x.cfg
@@ -11,7 +11,7 @@ source [find target/lm3s9b9x.cfg]
# jtag speed
adapter_khz 500
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
#LM3S9B9x Evaluation Board has only srst
reset_config srst_only
diff --git a/tcl/board/ethernut3.cfg b/tcl/board/ethernut3.cfg
index 359cb0b..34e9b72 100644
--- a/tcl/board/ethernut3.cfg
+++ b/tcl/board/ethernut3.cfg
@@ -20,7 +20,7 @@ flash bank $_FLASHNAME cfi 0x10000000 0x400000 2 2 $_TARGETNAME
# Micrel MIC2775-29YM5 Supervisor
# Reset output will remain active for 280ms (maximum)
#
-jtag_nsrst_delay 300
+adapter_nsrst_delay 300
jtag_ntrst_delay 300
diff --git a/tcl/board/hitex_lpc2929.cfg b/tcl/board/hitex_lpc2929.cfg
index 35cc7d0..d9ca110 100644
--- a/tcl/board/hitex_lpc2929.cfg
+++ b/tcl/board/hitex_lpc2929.cfg
@@ -2,7 +2,7 @@
# http://www.hitex.com/
# Delays on reset lines
-jtag_nsrst_delay 50
+adapter_nsrst_delay 50
jtag_ntrst_delay 1
# Maximum of 1/8 of clock frequency (XTAL = 16 MHz).
diff --git a/tcl/board/hitex_str9-comstick.cfg b/tcl/board/hitex_str9-comstick.cfg
index ade24f6..4d1bb2e 100644
--- a/tcl/board/hitex_str9-comstick.cfg
+++ b/tcl/board/hitex_str9-comstick.cfg
@@ -7,7 +7,7 @@ source [find interface/hitex_str9-comstick.cfg]
# set jtag speed
adapter_khz 3000
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
jtag_ntrst_delay 100
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst
diff --git a/tcl/board/lubbock.cfg b/tcl/board/lubbock.cfg
index 32af386..095c60a 100644
--- a/tcl/board/lubbock.cfg
+++ b/tcl/board/lubbock.cfg
@@ -4,7 +4,7 @@
source [find target/pxa255.cfg]
-jtag_nsrst_delay 250
+adapter_nsrst_delay 250
jtag_ntrst_delay 250
# NOTE: until after pinmux and such are set up, only CS0 is
diff --git a/tcl/board/mini2440.cfg b/tcl/board/mini2440.cfg
index b053c22..1688965 100644
--- a/tcl/board/mini2440.cfg
+++ b/tcl/board/mini2440.cfg
@@ -112,7 +112,7 @@ target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME
$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 1
#reset configuration
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
jtag_ntrst_delay 100
reset_config trst_and_srst
@@ -141,7 +141,7 @@ reset_config trst_and_srst
nand device s3c2440 0
- jtag_nsrst_delay 100
+ adapter_nsrst_delay 100
jtag_ntrst_delay 100
reset_config trst_and_srst
init
diff --git a/tcl/board/phytec_lpc3250.cfg b/tcl/board/phytec_lpc3250.cfg
index 51622ef..6a7e8e9 100644
--- a/tcl/board/phytec_lpc3250.cfg
+++ b/tcl/board/phytec_lpc3250.cfg
@@ -1,6 +1,6 @@
source [find target/lpc3250.cfg]
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
jtag_ntrst_delay 1
adapter_khz 200
reset_config trst_and_srst separate
diff --git a/tcl/board/pxa255_sst.cfg b/tcl/board/pxa255_sst.cfg
index ce90387..44f34ca 100644
--- a/tcl/board/pxa255_sst.cfg
+++ b/tcl/board/pxa255_sst.cfg
@@ -93,7 +93,7 @@ $_TARGETNAME configure -event reset-init {pxa255_sst_init}
reset_config trst_and_srst
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
jtag_ntrst_delay 200
#xscale debug_handler 0 0xFFFF0800 # debug handler base address
diff --git a/tcl/board/telo.cfg b/tcl/board/telo.cfg
index cb4bc2a..80040b1 100644
--- a/tcl/board/telo.cfg
+++ b/tcl/board/telo.cfg
@@ -16,7 +16,7 @@ source [find target/c100helper.tcl]
jtag_nsrst_assert_width 100
jtag_ntrst_assert_width 100
# don't talk to JTAG after reset for: [ms]
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
jtag_ntrst_delay 100
reset_config trst_and_srst separate
diff --git a/tcl/interface/calao-usb-a9260.cfg b/tcl/interface/calao-usb-a9260.cfg
index a9d7dec..5fae2f3 100644
--- a/tcl/interface/calao-usb-a9260.cfg
+++ b/tcl/interface/calao-usb-a9260.cfg
@@ -6,6 +6,6 @@
# See calao-usb-a9260-c01.cfg and calao-usb-a9260-c02.cfg.
#
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
jtag_ntrst_delay 200
diff --git a/tcl/target/aduc702x.cfg b/tcl/target/aduc702x.cfg
index 50b2a0d..d58b723 100644
--- a/tcl/target/aduc702x.cfg
+++ b/tcl/target/aduc702x.cfg
@@ -17,7 +17,7 @@ if { [info exists CPUTAPID] } {
set _CPUTAPID 0x3f0f0f0f
}
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
jtag_ntrst_delay 200
## JTAG scan chain
diff --git a/tcl/target/ar71xx.cfg b/tcl/target/ar71xx.cfg
index 2038331..126efe4 100644
--- a/tcl/target/ar71xx.cfg
+++ b/tcl/target/ar71xx.cfg
@@ -1,7 +1,7 @@
# Atheros AR71xx MIPS 24Kc SoC.
# tested on PB44 refererence board
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
jtag_ntrst_delay 100
reset_config trst_and_srst
diff --git a/tcl/target/at91sam9260.cfg b/tcl/target/at91sam9260.cfg
index df08d10..86258c6 100644
--- a/tcl/target/at91sam9260.cfg
+++ b/tcl/target/at91sam9260.cfg
@@ -26,7 +26,7 @@ reset_config trst_and_srst separate trst_push_pull srst_open_drain
#
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-jtag_nsrst_delay 300
+adapter_nsrst_delay 300
jtag_ntrst_delay 200
jtag_rclk 3
diff --git a/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg b/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg
index 0359540..034a348 100644
--- a/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg
+++ b/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg
@@ -30,7 +30,7 @@ if { [info exists CPUTAPID ] } {
reset_config trst_and_srst
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
jtag_ntrst_delay 200
diff --git a/tcl/target/at91sam9rl.cfg b/tcl/target/at91sam9rl.cfg
index 6db1826..5ee5c49 100644
--- a/tcl/target/at91sam9rl.cfg
+++ b/tcl/target/at91sam9rl.cfg
@@ -26,7 +26,7 @@ reset_config trst_and_srst separate trst_push_pull srst_open_drain
#
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-jtag_nsrst_delay 300
+adapter_nsrst_delay 300
jtag_ntrst_delay 200
jtag_rclk 3
diff --git a/tcl/target/dragonite.cfg b/tcl/target/dragonite.cfg
index d2e7e32..7e85624 100644
--- a/tcl/target/dragonite.cfg
+++ b/tcl/target/dragonite.cfg
@@ -26,6 +26,6 @@ set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME dragonite -endian $_ENDIAN -chain-position $_TARGETNAME
reset_config trst_and_srst
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
jtag_ntrst_delay 200
diff --git a/tcl/target/epc9301.cfg b/tcl/target/epc9301.cfg
index 7e4599d..d2dc7ec 100644
--- a/tcl/target/epc9301.cfg
+++ b/tcl/target/epc9301.cfg
@@ -20,7 +20,7 @@ if { [info exists CPUTAPID ] } {
}
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
jtag_ntrst_delay 100
set _TARGETNAME $_CHIPNAME.cpu
diff --git a/tcl/target/feroceon.cfg b/tcl/target/feroceon.cfg
index b707770..e90165b 100644
--- a/tcl/target/feroceon.cfg
+++ b/tcl/target/feroceon.cfg
@@ -26,6 +26,6 @@ set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME feroceon -endian $_ENDIAN -chain-position $_TARGETNAME
reset_config trst_and_srst
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
jtag_ntrst_delay 200
diff --git a/tcl/target/imx31.cfg b/tcl/target/imx31.cfg
index 46b4f94..3af6383 100644
--- a/tcl/target/imx31.cfg
+++ b/tcl/target/imx31.cfg
@@ -3,7 +3,7 @@
reset_config trst_and_srst srst_gates_jtag
-jtag_nsrst_delay 5
+adapter_nsrst_delay 5
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
diff --git a/tcl/target/lm3s6965.cfg b/tcl/target/lm3s6965.cfg
index c6e623e..137cba9 100644
--- a/tcl/target/lm3s6965.cfg
+++ b/tcl/target/lm3s6965.cfg
@@ -15,7 +15,7 @@ if { [info exists CPUTAPID ] } {
# jtag speed
adapter_khz 500
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
jtag_ntrst_delay 100
#LM3S6965 Evaluation Board has only srst
diff --git a/tcl/target/lpc1768.cfg b/tcl/target/lpc1768.cfg
index 182fb89..82a097f 100644
--- a/tcl/target/lpc1768.cfg
+++ b/tcl/target/lpc1768.cfg
@@ -25,7 +25,7 @@ if { [info exists CPUTAPID ] } {
}
#delays on reset lines
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
jtag_ntrst_delay 200
# LPC2000 & LPC1700 -> SRST causes TRST
diff --git a/tcl/target/lpc2103.cfg b/tcl/target/lpc2103.cfg
index 13535f5..2ebe91a 100644
--- a/tcl/target/lpc2103.cfg
+++ b/tcl/target/lpc2103.cfg
@@ -22,7 +22,7 @@ if { [info exists CPUTAPID ] } {
reset_config trst_and_srst srst_pulls_trst
# reset delays
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
jtag_ntrst_delay 100
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
diff --git a/tcl/target/lpc2124.cfg b/tcl/target/lpc2124.cfg
index ce55952..1b60c15 100644
--- a/tcl/target/lpc2124.cfg
+++ b/tcl/target/lpc2124.cfg
@@ -24,7 +24,7 @@ if { [info exists CPUTAPID ] } {
reset_config trst_and_srst srst_pulls_trst
# reset delays
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
jtag_ntrst_delay 100
adapter_khz 1000
diff --git a/tcl/target/lpc2129.cfg b/tcl/target/lpc2129.cfg
index 287fa5d..5b2a2f7 100644
--- a/tcl/target/lpc2129.cfg
+++ b/tcl/target/lpc2129.cfg
@@ -25,7 +25,7 @@ if { [info exists CPUTAPID ] } {
reset_config trst_and_srst srst_pulls_trst
# reset delays
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
jtag_ntrst_delay 100
#jtag scan chain
diff --git a/tcl/target/lpc2148.cfg b/tcl/target/lpc2148.cfg
index cf6287c..502a355 100644
--- a/tcl/target/lpc2148.cfg
+++ b/tcl/target/lpc2148.cfg
@@ -21,7 +21,7 @@ if { [info exists CPUTAPID ] } {
set _CPUTAPID 0x4f1f0f0f
}
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
jtag_ntrst_delay 200
# NOTE!!! LPCs need reset pulled while RTCK is low. 0 to activate
diff --git a/tcl/target/lpc2294.cfg b/tcl/target/lpc2294.cfg
index d43d740..9ac3c6c 100644
--- a/tcl/target/lpc2294.cfg
+++ b/tcl/target/lpc2294.cfg
@@ -17,7 +17,7 @@ if { [info exists CPUTAPID ] } {
set _CPUTAPID 0xffffffff
}
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
jtag_ntrst_delay 200
#use combined on interfaces or targets that can't set TRST/SRST separately
diff --git a/tcl/target/lpc2378.cfg b/tcl/target/lpc2378.cfg
index 7eb0dab..1a42e07 100644
--- a/tcl/target/lpc2378.cfg
+++ b/tcl/target/lpc2378.cfg
@@ -19,7 +19,7 @@ if { [info exists CPUTAPID ] } {
}
#delays on reset lines
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
jtag_ntrst_delay 200
# LPC2000 -> SRST causes TRST
diff --git a/tcl/target/lpc2478.cfg b/tcl/target/lpc2478.cfg
index d0bff1a..950ef63 100644
--- a/tcl/target/lpc2478.cfg
+++ b/tcl/target/lpc2478.cfg
@@ -19,7 +19,7 @@ if { [info exists CPUTAPID ] } {
}
#delays on reset lines
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
jtag_ntrst_delay 100
# LPC2000 -> SRST causes TRST
diff --git a/tcl/target/mega128.cfg b/tcl/target/mega128.cfg
index 697ec45..bb7cdee 100644
--- a/tcl/target/mega128.cfg
+++ b/tcl/target/mega128.cfg
@@ -7,7 +7,7 @@
adapter_khz 4500
reset_config srst_only
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
#jtag scan chain
if { [info exists CPUTAPID ] } {
diff --git a/tcl/target/netx500.cfg b/tcl/target/netx500.cfg
index 90315af..04a267b 100644
--- a/tcl/target/netx500.cfg
+++ b/tcl/target/netx500.cfg
@@ -20,7 +20,7 @@ if { [info exists CPUTAPID ] } {
# FIXME most reset config belongs in board code
reset_config trst_and_srst
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
jtag_ntrst_delay 100
# jtag scan chain
diff --git a/tcl/target/omap5912.cfg b/tcl/target/omap5912.cfg
index d825df7..ed64f52 100644
--- a/tcl/target/omap5912.cfg
+++ b/tcl/target/omap5912.cfg
@@ -14,7 +14,7 @@ if { [info exists CPUTAPID ] } {
set _CPUTAPID 0x0692602f
}
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
# NOTE: presumes irlen 38 is the C55x DSP, matching BSDL for
# its standalone siblings (like TMS320VC5502) of the same era
diff --git a/tcl/target/pic32mx.cfg b/tcl/target/pic32mx.cfg
index d77c3a8..8c9a93d 100644
--- a/tcl/target/pic32mx.cfg
+++ b/tcl/target/pic32mx.cfg
@@ -26,7 +26,7 @@ if { [info exists WORKAREASIZE] } {
}
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
jtag_ntrst_delay 100
#use combined on interfaces or targets that can't set TRST/SRST separately
diff --git a/tcl/target/pxa270.cfg b/tcl/target/pxa270.cfg
index 6ca057c..7aaef8c 100644
--- a/tcl/target/pxa270.cfg
+++ b/tcl/target/pxa270.cfg
@@ -28,9 +28,9 @@ if { [info exists CPUTAPID2 ] } {
}
-# set jtag_nsrst_delay to the delay introduced by your reset circuit
+# set adapter_nsrst_delay to the delay introduced by your reset circuit
# the rest of the needed delays are built into the openocd program
-jtag_nsrst_delay 260
+adapter_nsrst_delay 260
# set the jtag_ntrst_delay to the delay introduced by a reset circuit
# the rest of the needed delays are built into the openocd program
jtag_ntrst_delay 250
diff --git a/tcl/target/pxa3xx.cfg b/tcl/target/pxa3xx.cfg
index 5d64986..62c325b 100644
--- a/tcl/target/pxa3xx.cfg
+++ b/tcl/target/pxa3xx.cfg
@@ -59,9 +59,9 @@ if { [info exists CPUTAPID_PXA32X_C0 ] } {
set _CPUTAPID_PXA32X_C0 0x7E642013
}
-# set jtag_nsrst_delay to the delay introduced by your reset circuit
+# set adapter_nsrst_delay to the delay introduced by your reset circuit
# the rest of the needed delays are built into the openocd program
-jtag_nsrst_delay 260
+adapter_nsrst_delay 260
# set the jtag_ntrst_delay to the delay introduced by a reset circuit
# the rest of the needed delays are built into the openocd program
diff --git a/tcl/target/samsung_s3c6410.cfg b/tcl/target/samsung_s3c6410.cfg
index 9137199..f9738c2 100644
--- a/tcl/target/samsung_s3c6410.cfg
+++ b/tcl/target/samsung_s3c6410.cfg
@@ -42,7 +42,7 @@ jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm1176
-jtag_nsrst_delay 500
+adapter_nsrst_delay 500
jtag_ntrst_delay 500
#reset configuration
diff --git a/tcl/target/smp8634.cfg b/tcl/target/smp8634.cfg
index b6b037a..4f3959d 100644
--- a/tcl/target/smp8634.cfg
+++ b/tcl/target/smp8634.cfg
@@ -19,7 +19,7 @@ if { [info exists CPUTAPID ] } {
set _CPUTAPID 0x08630001
}
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
jtag_ntrst_delay 100
reset_config trst_and_srst separate
diff --git a/tcl/target/stm32.cfg b/tcl/target/stm32.cfg
index 29c9f7f..a13dc31 100644
--- a/tcl/target/stm32.cfg
+++ b/tcl/target/stm32.cfg
@@ -23,7 +23,7 @@ if { [info exists WORKAREASIZE] } {
# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
adapter_khz 1000
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
jtag_ntrst_delay 100
#jtag scan chain
diff --git a/tcl/target/str730.cfg b/tcl/target/str730.cfg
index 3a84897..a1491ff 100644
--- a/tcl/target/str730.cfg
+++ b/tcl/target/str730.cfg
@@ -27,7 +27,7 @@ reset_config trst_and_srst srst_pulls_trst
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
#jtag nTRST and nSRST delay
-jtag_nsrst_delay 500
+adapter_nsrst_delay 500
jtag_ntrst_delay 500
set _TARGETNAME $_CHIPNAME.cpu
diff --git a/tcl/target/str750.cfg b/tcl/target/str750.cfg
index c2fb786..8a64226 100644
--- a/tcl/target/str750.cfg
+++ b/tcl/target/str750.cfg
@@ -29,7 +29,7 @@ reset_config trst_and_srst srst_pulls_trst
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
#jtag nTRST and nSRST delay
-jtag_nsrst_delay 500
+adapter_nsrst_delay 500
jtag_ntrst_delay 500
set _TARGETNAME $_CHIPNAME.cpu
diff --git a/tcl/target/str912.cfg b/tcl/target/str912.cfg
index 2defe9f..6f2981a 100644
--- a/tcl/target/str912.cfg
+++ b/tcl/target/str912.cfg
@@ -15,7 +15,7 @@ if { [info exists ENDIAN] } {
# jtag speed. We need to stick to 16kHz until we've finished reset.
jtag_rclk 16
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
jtag_ntrst_delay 100
#use combined on interfaces or targets that can't set TRST/SRST separately
diff --git a/tcl/target/telo.cfg b/tcl/target/telo.cfg
index 99b9cd6..40674b9 100644
--- a/tcl/target/telo.cfg
+++ b/tcl/target/telo.cfg
@@ -16,7 +16,7 @@ source [find target/c100helper.tcl]
jtag_nsrst_assert_width 100
jtag_ntrst_assert_width 100
# don't talk to JTAG after reset for: [ms]
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
jtag_ntrst_delay 100
reset_config trst_and_srst separate
diff --git a/tcl/target/tmpa900.cfg b/tcl/target/tmpa900.cfg
index 329e03c..a551391 100644
--- a/tcl/target/tmpa900.cfg
+++ b/tcl/target/tmpa900.cfg
@@ -32,7 +32,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst
-jtag_nsrst_delay 20
+adapter_nsrst_delay 20
jtag_ntrst_delay 20
######################
diff --git a/tcl/target/tmpa910.cfg b/tcl/target/tmpa910.cfg
index 29d2d6e..fa6f87b 100644
--- a/tcl/target/tmpa910.cfg
+++ b/tcl/target/tmpa910.cfg
@@ -32,7 +32,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst
-jtag_nsrst_delay 20
+adapter_nsrst_delay 20
jtag_ntrst_delay 20
######################
diff --git a/tcl/target/xba_revA3.cfg b/tcl/target/xba_revA3.cfg
index fb02c68..8ff5be9 100644
--- a/tcl/target/xba_revA3.cfg
+++ b/tcl/target/xba_revA3.cfg
@@ -22,7 +22,7 @@ if { [info exists CPUTAPID ] } {
reset_config trst_and_srst separate
-jtag_nsrst_delay 100
+adapter_nsrst_delay 100
jtag_ntrst_delay 100
#jtag scan chain
diff --git a/tcl/test/syntax1.cfg b/tcl/test/syntax1.cfg
index c3d8ed9..79d5384 100644
--- a/tcl/test/syntax1.cfg
+++ b/tcl/test/syntax1.cfg
@@ -1,4 +1,4 @@
-jtag_nsrst_delay 200
+adapter_nsrst_delay 200
jtag_ntrst_delay 200
#use combined on interfaces or targets that can't set TRST/SRST separately
commit 96f9790279f74f39b35fc3ad09340fd03123180c
Author: David Brownell <dbr...@us...>
Date: Mon Mar 15 08:37:43 2010 -0700
rename jtag_khz as adapter_khz
Globally rename "jtag_khz" as "adapter_khz", and move it out of the "jtag"
command group ... it needs to be used with non-JTAG transports
Includes a migration aid (in jtag/startup.tcl) so that old user scripts
won't break. That aid should Sunset in about a year. (We may want to
update it to include a nag message too.)
Signed-off-by: David Brownell <dbr...@us...>
diff --git a/NEWS b/NEWS
index 77435e1..4e093dc 100644
--- a/NEWS
+++ b/NEWS
@@ -5,6 +5,11 @@ and other issues not mentioned here.
JTAG Layer:
New driver for "Bus Pirate"
+ Rename various commands so they're not JTAG-specific
+ There are migration procedures for these, but you should
+ convert your scripts to the new names, since those procedures
+ will not be around forever.
+ jtag_khz ... is now adapter_khz
Boundary Scan:
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 93757d4..5a1e095 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -1516,7 +1516,7 @@ solution just avoids using that instruction with JTAG debuggers.
If both the chip and the board support adaptive clocking,
use the @command{jtag_rclk}
command, in case your board is used with JTAG adapter which
-also supports it. Otherwise use @command{jtag_khz}.
+also supports it. Otherwise use @command{adapter_khz}.
Set the slow rate at the beginning of the reset sequence,
and the faster rate as soon as the clocks are at full speed.
@@ -2342,7 +2342,7 @@ you may encounter a problem.
@deffn Command {parport_toggling_time} [nanoseconds]
Displays how many nanoseconds the hardware needs to toggle TCK;
the parport driver uses this value to obey the
-@command{jtag_khz} configuration.
+@command{adapter_khz} configuration.
When the optional @var{nanoseconds} parameter is given,
that setting is changed before displaying the current value.
@@ -2353,7 +2353,7 @@ To measure the toggling time with a logic analyzer or a digital storage
oscilloscope, follow the procedure below:
@example
> parport_toggling_time 1000
-> jtag_khz 500
+> adapter_khz 500
@end example
This sets the maximum JTAG clock speed of the hardware, but
the actual speed probably deviates from the requested 500 kHz.
@@ -2364,14 +2364,14 @@ Update the setting to match your measurement:
@example
> parport_toggling_time <measured nanoseconds>
@end example
-Now the clock speed will be a better match for @command{jtag_khz rate}
+Now the clock speed will be a better match for @command{adapter_khz rate}
commands given in OpenOCD scripts and event handlers.
You can do something similar with many digital multimeters, but note
that you'll probably need to run the clock continuously for several
seconds before it decides what clock rate to show. Adjust the
toggling time up or down until the measured clock rate is a good
-match for the jtag_khz rate you specified; be conservative.
+match for the adapter_khz rate you specified; be conservative.
@end quotation
@end deffn
@@ -2470,10 +2470,10 @@ However, it introduces delays to synchronize clocks; so it
may not be the fastest solution.
@b{NOTE:} Script writers should consider using @command{jtag_rclk}
-instead of @command{jtag_khz}, but only for (ARM) cores and boards
+instead of @command{adapter_khz}, but only for (ARM) cores and boards
which support adaptive clocking.
-@deffn {Command} jtag_khz max_speed_kHz
+@deffn {Command} adapter_khz max_speed_kHz
A non-zero speed is in KHZ. Hence: 3000 is 3mhz.
JTAG interfaces usually support a limited number of
speeds. The speed actually used won't be faster
@@ -3881,7 +3881,7 @@ the target clocks are fully set up.)
before @command{reset_init} is called.
This is the most robust place to use @command{jtag_rclk}
-or @command{jtag_khz} to switch to a low JTAG clock rate,
+or @command{adapter_khz} to switch to a low JTAG clock rate,
when reset disables PLLs needed to use a fast clock.
@ignore
@item @b{reset-wait-pos}
@@ -7290,7 +7290,7 @@ To set the JTAG frequency use the command:
@example
# Example: 1.234MHz
-jtag_khz 1234
+adapter_khz 1234
@end example
diff --git a/src/jtag/core.c b/src/jtag/core.c
index e7cb48d..bdf968e 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -1556,7 +1556,7 @@ unsigned jtag_get_speed_khz(void)
return speed_khz;
}
-static int jtag_khz_to_speed(unsigned khz, int* speed)
+static int adapter_khz_to_speed(unsigned khz, int* speed)
{
LOG_DEBUG("convert khz to interface specific speed value");
speed_khz = khz;
@@ -1576,11 +1576,11 @@ static int jtag_khz_to_speed(unsigned khz, int* speed)
static int jtag_rclk_to_speed(unsigned fallback_speed_khz, int* speed)
{
- int retval = jtag_khz_to_speed(0, speed);
+ int retval = adapter_khz_to_speed(0, speed);
if ((ERROR_OK != retval) && fallback_speed_khz)
{
LOG_DEBUG("trying fallback speed...");
- retval = jtag_khz_to_speed(fallback_speed_khz, speed);
+ retval = adapter_khz_to_speed(fallback_speed_khz, speed);
}
return retval;
}
@@ -1598,7 +1598,7 @@ int jtag_config_khz(unsigned khz)
LOG_DEBUG("handle jtag khz");
clock_mode = CLOCK_MODE_KHZ;
int speed = 0;
- int retval = jtag_khz_to_speed(khz, &speed);
+ int retval = adapter_khz_to_speed(khz, &speed);
return (ERROR_OK != retval) ? retval : jtag_set_speed(speed);
}
@@ -1621,7 +1621,7 @@ int jtag_get_speed(void)
speed = jtag_speed;
break;
case CLOCK_MODE_KHZ:
- jtag_khz_to_speed(jtag_get_speed_khz(), &speed);
+ adapter_khz_to_speed(jtag_get_speed_khz(), &speed);
break;
case CLOCK_MODE_RCLK:
jtag_rclk_to_speed(rclk_fallback_speed_khz, &speed);
diff --git a/src/jtag/drivers/presto.c b/src/jtag/drivers/presto.c
index 72126a1..10bed27 100644
--- a/src/jtag/drivers/presto.c
+++ b/src/jtag/drivers/presto.c
@@ -680,7 +680,7 @@ static struct bitq_interface presto_bitq = {
/* -------------------------------------------------------------------------- */
-static int presto_jtag_khz(int khz, int *jtag_speed)
+static int presto_adapter_khz(int khz, int *jtag_speed)
{
if (khz < 0)
{
@@ -797,7 +797,7 @@ struct jtag_interface presto_interface = {
.execute_queue = bitq_execute_queue,
.speed = presto_jtag_speed,
- .khz = presto_jtag_khz,
+ .khz = presto_adapter_khz,
.speed_div = presto_jtag_speed_div,
.init = presto_jtag_init,
.quit = presto_jtag_quit,
diff --git a/src/jtag/startup.tcl b/src/jtag/startup.tcl
index 4e6d5fc..c49c43e 100644
--- a/src/jtag/startup.tcl
+++ b/src/jtag/startup.tcl
@@ -75,3 +75,12 @@ add_help_text srst_deasserted "Overridable procedure run when srst deassert is d
proc srst_asserted {} {
puts "Sensed nSRST asserted."
}
+
+# BEGIN MIGRATION AIDS ... these adapter operations originally had
+# JTAG-specific names despite the fact that the operations were not
+# specific to JTAG.
+#
+# FIXME phase these aids out after about April 2011
+#
+proc jtag_khz args { eval adapter_khz $args }
+# END MIGRATION AIDS
diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c
index ce17e4b..8faefd1 100644
--- a/src/jtag/tcl.c
+++ b/src/jtag/tcl.c
@@ -1351,7 +1351,7 @@ COMMAND_HANDLER(handle_jtag_ntrst_assert_width_command)
return ERROR_OK;
}
-COMMAND_HANDLER(handle_jtag_khz_command)
+COMMAND_HANDLER(handle_adapter_khz_command)
{
if (CMD_ARGC > 1)
return ERROR_COMMAND_SYNTAX_ERROR;
@@ -1609,6 +1609,16 @@ COMMAND_HANDLER(handle_tms_sequence_command)
static const struct command_registration interface_command_handlers[] = {
{
+ .name = "adapter_khz",
+ .handler = handle_adapter_khz_command,
+ .mode = COMMAND_ANY,
+ .help = "With an argument, change to the specified maximum "
+ "jtag speed. For JTAG, 0 KHz signifies adaptive "
+ " clocking. "
+ "With or without argument, display current setting.",
+ .usage = "[khz]",
+ },
+ {
.name = "interface",
.handler = handle_interface_command,
.mode = COMMAND_CONFIG,
@@ -1637,15 +1647,6 @@ int interface_register_commands(struct command_context *ctx)
static const struct command_registration jtag_command_handlers[] = {
{
- .name = "jtag_khz",
- .handler = handle_jtag_khz_command,
- .mode = COMMAND_ANY,
- .help = "With an argument, change to the specified maximum "
- "jtag speed. Pass 0 to require adaptive clocking. "
- "With or without argument, display current setting.",
- .usage = "[khz]",
- },
- {
.name = "jtag_rclk",
.handler = handle_jtag_rclk_command,
.mode = COMMAND_ANY,
diff --git a/src/svf/svf.c b/src/svf/svf.c
index fba499c..6e951e2 100644
--- a/src/svf/svf.c
+++ b/src/svf/svf.c
@@ -880,7 +880,7 @@ static int svf_run_command(struct command_context *cmd_ctx, char *cmd_str)
// TODO: set jtag speed to
if (svf_para.frequency > 0)
{
- command_run_linef(cmd_ctx, "jtag_khz %d", (int)svf_para.frequency / 1000);
+ command_run_linef(cmd_ctx, "adapter_khz %d", (int)svf_para.frequency / 1000);
LOG_DEBUG("\tfrequency = %f", svf_para.frequency);
}
}
diff --git a/tcl/board/at91eb40a.cfg b/tcl/board/at91eb40a.cfg
index 40f2e12..14f21a1 100644
--- a/tcl/board/at91eb40a.cfg
+++ b/tcl/board/at91eb40a.cfg
@@ -65,4 +65,4 @@ $_TARGETNAME configure -event reset-init {
}
# This target is pretty snappy...
-jtag_khz 16000
+adapter_khz 16000
diff --git a/tcl/board/at91rm9200-dk.cfg b/tcl/board/at91rm9200-dk.cfg
index 9a6f89e..476f5a8 100644
--- a/tcl/board/at91rm9200-dk.cfg
+++ b/tcl/board/at91rm9200-dk.cfg
@@ -15,7 +15,7 @@ flash_bank cfi 0x10000000 0x00200000 2 2 0
proc at91rm9200_dk_init { } {
# Try to run at 1khz... Yea, that slow!
# Chip is really running @ 32khz
- jtag_khz 8
+ adapter_khz 8
mww 0xfffffc64 0xffffffff
## disable all clocks but system clock
@@ -41,7 +41,7 @@ proc at91rm9200_dk_init { } {
#========================================
# CPU now runs at 180mhz
# SYS runs at 60mhz.
- jtag_khz 40000
+ adapter_khz 40000
#========================================
diff --git a/tcl/board/at91sam9g20-ek.cfg b/tcl/board/at91sam9g20-ek.cfg
index fb6068c..f24f1a1 100644
--- a/tcl/board/at91sam9g20-ek.cfg
+++ b/tcl/board/at91sam9g20-ek.cfg
@@ -77,7 +77,7 @@ proc at91sam9g20_init { } {
# means the master clock (MCLK) must be at or below 133 MHz or timing errors will occur. The processor
# core can operate up to 400 MHz and therefore PCLK must be at or below this to function properly.
- jtag_khz 2 # Slow-speed oscillator enabled at reset, so run jtag speed slow.
+ adapter_khz 2 # Slow-speed oscillator enabled at reset, so run jtag speed slow.
halt # Make sure processor is halted, or error will result in following steps.
mww 0xfffffd08 0xa5000501 # RSTC_MR : enable user reset.
mww 0xfffffd44 0x00008000 # WDT_MR : disable watchdog.
@@ -112,7 +112,7 @@ proc at91sam9g20_init { } {
# Switch over to adaptive clocking.
- jtag_khz 0
+ adapter_khz 0
# Enable faster DCC downloads.
diff --git a/tcl/board/csb337.cfg b/tcl/board/csb337.cfg
index b7bce48..5e225f5 100644
--- a/tcl/board/csb337.cfg
+++ b/tcl/board/csb337.cfg
@@ -19,7 +19,7 @@ if { [info exists ETM_DRIVER] } {
proc csb337_clk_init { } {
# CPU is in Slow Clock Mode (32KiHz) ... needs slow JTAG clock
- jtag_khz 8
+ adapter_khz 8
# CKGR_MOR: start main oscillator (3.6864 MHz)
mww 0xfffffc20 0xff01
@@ -37,7 +37,7 @@ proc csb337_clk_init { } {
sleep 20
# CPU is in Normal Mode ... allows faster JTAG clock speed
- jtag_khz 40000
+ adapter_khz 40000
}
proc csb337_nor_init { } {
diff --git a/tcl/board/dm365evm.cfg b/tcl/board/dm365evm.cfg
index f8ec4e0..8f268c4 100644
--- a/tcl/board/dm365evm.cfg
+++ b/tcl/board/dm365evm.cfg
@@ -103,7 +103,7 @@ proc dm365evm_init {} {
echo "Initialize DM365 EVM board"
# CLKIN = 24 MHz ... can't talk quickly to ARM yet
- jtag_khz 1500
+ adapter_khz 1500
# FIXME -- PLL init
diff --git a/tcl/board/ek-lm3s1968.cfg b/tcl/board/ek-lm3s1968.cfg
index bf4b097..6ce7f7f 100644
--- a/tcl/board/ek-lm3s1968.cfg
+++ b/tcl/board/ek-lm3s1968.cfg
@@ -4,7 +4,7 @@
# http://www.luminarymicro.com/products/lm3s1968_evaluation_kits.html
# NOTE: to use J-Link instead of the on-board interface,
-# you may also need to reduce jtag_khz to be about 1200.
+# you may also need to reduce adapter_khz to be about 1200.
# source [find interface/jlink.cfg]
# include the FT2232 interface config for on-board JTAG interface
@@ -14,7 +14,7 @@ source [find interface/luminary.cfg]
source [find target/lm3s1968.cfg]
# jtag speed
-jtag_khz 3000
+adapter_khz 3000
jtag_nsrst_delay 100
diff --git a/tcl/board/ek-lm3s811.cfg b/tcl/board/ek-lm3s811.cfg
index 5825c23..078cae1 100644
--- a/tcl/board/ek-lm3s811.cfg
+++ b/tcl/board/ek-lm3s811.cfg
@@ -10,7 +10,7 @@ source [find interface/luminary.cfg]
source [find target/lm3s811.cfg]
# jtag speed
-jtag_khz 500
+adapter_khz 500
jtag_nsrst_delay 100
diff --git a/tcl/board/ek-lm3s9b9x.cfg b/tcl/board/ek-lm3s9b9x.cfg
index 407ecc8..b8be88b 100644
--- a/tcl/board/ek-lm3s9b9x.cfg
+++ b/tcl/board/ek-lm3s9b9x.cfg
@@ -9,7 +9,7 @@ source [find interface/luminary-icdi.cfg]
source [find target/lm3s9b9x.cfg]
# jtag speed
-jtag_khz 500
+adapter_khz 500
jtag_nsrst_delay 100
diff --git a/tcl/board/ethernut3.cfg b/tcl/board/ethernut3.cfg
index f22e688..359cb0b 100644
--- a/tcl/board/ethernut3.cfg
+++ b/tcl/board/ethernut3.cfg
@@ -26,7 +26,7 @@ jtag_ntrst_delay 300
arm7_9 fast_memory_access enable
arm7_9 dcc_downloads enable
-jtag_khz 16000
+adapter_khz 16000
# Target events
diff --git a/tcl/board/hitex_lpc2929.cfg b/tcl/board/hitex_lpc2929.cfg
index 7d06f74..35cc7d0 100644
--- a/tcl/board/hitex_lpc2929.cfg
+++ b/tcl/board/hitex_lpc2929.cfg
@@ -7,7 +7,7 @@ jtag_ntrst_delay 1
# Maximum of 1/8 of clock frequency (XTAL = 16 MHz).
# Adaptive clocking through RTCK is not supported.
-jtag_khz 2000
+adapter_khz 2000
# Target device: LPC29xx with ETB
# The following variables are used by the LPC2900 script:
@@ -24,7 +24,7 @@ $_TARGETNAME configure -work-area-phys 0x58000000 -work-area-size 0x10000 -work-
# Event handlers
$_TARGETNAME configure -event reset-start {
# Back to the slow JTAG clock
- jtag_khz 2000
+ adapter_khz 2000
}
# External 16-bit flash at chip select CS7 (SST39VF3201-70, 4 MiB)
@@ -46,7 +46,7 @@ $_TARGETNAME configure -event reset-init {
mww 0xFFFF8070 0x02000000 # SYS_CLK_CONF: PLL
# Increase JTAG speed
- jtag_khz 6000
+ adapter_khz 6000
# Enable external memory bus (16-bit SRAM at CS6, 16-bit flash at CS7)
mww 0xE0001138 0x0000001F # P1.14 = D0
diff --git a/tcl/board/hitex_str9-comstick.cfg b/tcl/board/hitex_str9-comstick.cfg
index af7527a..ade24f6 100644
--- a/tcl/board/hitex_str9-comstick.cfg
+++ b/tcl/board/hitex_str9-comstick.cfg
@@ -5,7 +5,7 @@
source [find interface/hitex_str9-comstick.cfg]
# set jtag speed
-jtag_khz 3000
+adapter_khz 3000
jtag_nsrst_delay 100
jtag_ntrst_delay 100
diff --git a/tcl/board/imx27lnst.cfg b/tcl/board/imx27lnst.cfg
index ae141d4..e0ed057 100644
--- a/tcl/board/imx27lnst.cfg
+++ b/tcl/board/imx27lnst.cfg
@@ -8,7 +8,7 @@ proc imx27lnst_init { } {
# This setup puts RAM at 0xA0000000
# reset the board correctly
- jtag_khz 500
+ adapter_khz 500
reset run
reset halt
diff --git a/tcl/board/mini2440.cfg b/tcl/board/mini2440.cfg
index 47bebc4..b053c22 100644
--- a/tcl/board/mini2440.cfg
+++ b/tcl/board/mini2440.cfg
@@ -121,7 +121,7 @@ reset_config trst_and_srst
# IMPORTANT! See README at top of this file.
#-------------------------------------------------------------------------
- jtag_khz 12000
+ adapter_khz 12000
jtag interface
#-------------------------------------------------------------------------
diff --git a/tcl/board/phytec_lpc3250.cfg b/tcl/board/phytec_lpc3250.cfg
index 78cb90d..51622ef 100644
--- a/tcl/board/phytec_lpc3250.cfg
+++ b/tcl/board/phytec_lpc3250.cfg
@@ -2,7 +2,7 @@ source [find target/lpc3250.cfg]
jtag_nsrst_delay 200
jtag_ntrst_delay 1
-jtag_khz 200
+adapter_khz 200
reset_config trst_and_srst separate
arm7_9 dcc_downloads enable
@@ -11,11 +11,11 @@ $_TARGETNAME configure -event gdb-attach { reset init }
$_TARGETNAME configure -event reset-start {
arm7_9 fast_memory_access disable
- jtag_khz 200
+ adapter_khz 200
}
$_TARGETNAME configure -event reset-end {
- jtag_khz 6000
+ adapter_khz 6000
arm7_9 fast_memory_access enable
}
diff --git a/tcl/board/telo.cfg b/tcl/board/telo.cfg
index 0cbdb81..cb4bc2a 100644
--- a/tcl/board/telo.cfg
+++ b/tcl/board/telo.cfg
@@ -26,11 +26,11 @@ reset_config trst_and_srst separate
# issue telnet: reset init
# issue gdb: monitor reset init
$_TARGETNAME configure -event reset-init {
- jtag_khz 100
+ adapter_khz 100
# this will setup Telo board
setupTelo
#turn up the JTAG speed
- jtag_khz 3000
+ adapter_khz 3000
puts "JTAG speek now 3MHz"
puts "type helpC100 to get help on C100"
}
diff --git a/tcl/board/topas910.cfg b/tcl/board/topas910.cfg
index ae72c4b..303fc77 100644
--- a/tcl/board/topas910.cfg
+++ b/tcl/board/topas910.cfg
@@ -99,7 +99,7 @@ proc topas910_init { } {
mww 0xf4300004 0x00000000
sleep 10
-# jtag_khz NNNN
+# adapter_khz NNNN
# remap off in case of IROM boot
mww 0xf0000004 0x00000001
diff --git a/tcl/board/topasa900.cfg b/tcl/board/topasa900.cfg
index 5984f81..aa3f77f 100644
--- a/tcl/board/topasa900.cfg
+++ b/tcl/board/topasa900.cfg
@@ -105,7 +105,7 @@ proc topasa900_init { } {
mww 0xf4300004 0x00000000
sleep 10
-# jtag_khz NNNN
+# adapter_khz NNNN
# remap off in case of IROM boot
mww 0xf0000004 0x00000001
diff --git a/tcl/board/zy1000.cfg b/tcl/board/zy1000.cfg
index 8278fa4..17594c2 100644
--- a/tcl/board/zy1000.cfg
+++ b/tcl/board/zy1000.cfg
@@ -66,7 +66,7 @@ $_TARGETNAME configure -event reset-init {
# other things than flash programming.
$_TARGETNAME configure -work-area-phys 0x00020000 -work-area-size 0x20000 -work-area-backup 0
-jtag_khz 16000
+adapter_khz 16000
proc production_info {} {
diff --git a/tcl/interface/altera-usb-blaster.cfg b/tcl/interface/altera-usb-blaster.cfg
index ae21465..9f542d0 100644
--- a/tcl/interface/altera-usb-blaster.cfg
+++ b/tcl/interface/altera-usb-blaster.cfg
@@ -8,4 +8,4 @@ interface usb_blaster
# These are already the defaults.
# usb_blaster_vid_pid 0x09FB 0x6001
# usb_blaster_device_desc "USB-Blaster"
-jtag_khz 3000
+adapter_khz 3000
diff --git a/tcl/interface/oocdlink.cfg b/tcl/interface/oocdlink.cfg
index 9022afd..4e962f5 100644
--- a/tcl/interface/oocdlink.cfg
+++ b/tcl/interface/oocdlink.cfg
@@ -8,5 +8,5 @@ interface ft2232
ft2232_device_desc "OOCDLink"
ft2232_layout oocdlink
ft2232_vid_pid 0x0403 0xbaf8
-jtag_khz 5
+adapter_khz 5
diff --git a/tcl/interface/openrd.cfg b/tcl/interface/openrd.cfg
index b01205b..322b508 100644
--- a/tcl/interface/openrd.cfg
+++ b/tcl/interface/openrd.cfg
@@ -8,5 +8,5 @@ interface ft2232
ft2232_layout sheevaplug
ft2232_vid_pid 0x0403 0x9e90
ft2232_device_desc "OpenRD JTAGKey FT2232D B"
-jtag_khz 3000
+adapter_khz 3000
diff --git a/tcl/interface/sheevaplug.cfg b/tcl/interface/sheevaplug.cfg
index 556f44d..d46d71e 100644
--- a/tcl/interface/sheevaplug.cfg
+++ b/tcl/interface/sheevaplug.cfg
@@ -8,5 +8,5 @@ interface ft2232
ft2232_layout sheevaplug
ft2232_vid_pid 0x9e88 0x9e8f
ft2232_device_desc "SheevaPlug JTAGKey FT2232D B"
-jtag_khz 2000
+adapter_khz 2000
diff --git a/tcl/interface/usb-jtag.cfg b/tcl/interface/usb-jtag.cfg
index b81028d..a3db11e 100644
--- a/tcl/interface/usb-jtag.cfg
+++ b/tcl/interface/usb-jtag.cfg
@@ -7,5 +7,5 @@
interface usb_blaster
usb_blaster_vid_pid 0x16C0 0x06AD
usb_blaster_device_desc "USB-JTAG-IF"
-jtag_khz 3000
+adapter_khz 3000
diff --git a/tcl/interface/vsllink.cfg b/tcl/interface/vsllink.cfg
index 7c9de7f..07a5a06 100644
--- a/tcl/interface/vsllink.cfg
+++ b/tcl/interface/vsllink.cfg
@@ -19,7 +19,7 @@ vsllink_usb_bulkout 0x03
vsllink_usb_interface 1
# vsllink mode, dma or normal
-# for low jtag_khz, use normal
-# for high jtag_khz, use dma
+# for low adapter_khz, use normal
+# for high adapter_khz, use dma
#vsllink_mode dma
vsllink_mode normal
diff --git a/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg b/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg
index 690406b..0359540 100644
--- a/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg
+++ b/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg
@@ -1,7 +1,7 @@
-jtag_khz 4
+adapter_khz 4
######################################
@@ -62,7 +62,7 @@ flash bank $_FLASHNAME cfi 0x10000000 0x01000000 2 2 $_TARGETNAME
proc at91sam_init { } {
# at reset chip runs at 32khz
- jtag_khz 8
+ adapter_khz 8
halt
mww 0xfffffd08 0xa5000501 # RSTC_MR : enable user reset
mww 0xfffffd44 0x00008000 # WDT_MR : disable watchdog
@@ -79,7 +79,7 @@ proc at91sam_init { } {
sleep 10 # wait 10 ms
# Now run at anything fast... ie: 10mhz!
- jtag_khz 10000 # Increase JTAG Speed to 6 MHz
+ adapter_khz 10000 # Increase JTAG Speed to 6 MHz
arm7_9 dcc_downloads enable # Enable faster DCC downloads
mww 0xffffec00 0x0a0a0a0a # SMC_SETUP0 : Setup SMC for Intel NOR Flash JS28F128P30T85 128MBit
diff --git a/tcl/target/c100.cfg b/tcl/target/c100.cfg
index b175f23..23eca0c 100644
--- a/tcl/target/c100.cfg
+++ b/tcl/target/c100.cfg
@@ -3,7 +3,7 @@
# this script only configures one core (that is used to run Linux)
# assume no PLL lock, start slowly
-jtag_khz 100
+adapter_khz 100
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
diff --git a/tcl/target/c100helper.tcl b/tcl/target/c100helper.tcl
index 9658871..1fd58b6 100644
--- a/tcl/target/c100helper.tcl
+++ b/tcl/target/c100helper.tcl
@@ -504,7 +504,7 @@ proc reboot {} {
mww $TIMER_WDT_HIGH_BOUND 0xffffff
mww $TIMER_WDT_CURRENT_COUNT 0x0
puts "JTAG speed lowered to 100kHz"
- jtag_khz 100
+ adapter_khz 100
mww $TIMER_WDT_CONTROL 0x1
# wait until the reset
puts -nonewline "Wating for watchdog to trigger..."
diff --git a/tcl/target/dsp56321.cfg b/tcl/target/dsp56321.cfg
index 4506837..281c4dd 100644
--- a/tcl/target/dsp56321.cfg
+++ b/tcl/target/dsp56321.cfg
@@ -22,7 +22,7 @@ if { [info exists CPUTAPID ] } {
}
#jtag speed
-jtag_khz 4500
+adapter_khz 4500
#has only srst
reset_config srst_only
diff --git a/tcl/target/lm3s6965.cfg b/tcl/target/lm3s6965.cfg
index 02d85d4..c6e623e 100644
--- a/tcl/target/lm3s6965.cfg
+++ b/tcl/target/lm3s6965.cfg
@@ -13,7 +13,7 @@ if { [info exists CPUTAPID ] } {
}
# jtag speed
-jtag_khz 500
+adapter_khz 500
jtag_nsrst_delay 100
jtag_ntrst_delay 100
diff --git a/tcl/target/lpc2124.cfg b/tcl/target/lpc2124.cfg
index 9a27aec..ce55952 100644
--- a/tcl/target/lpc2124.cfg
+++ b/tcl/target/lpc2124.cfg
@@ -27,7 +27,7 @@ reset_config trst_and_srst srst_pulls_trst
jtag_nsrst_delay 100
jtag_ntrst_delay 100
-jtag_khz 1000
+adapter_khz 1000
#jtag scan chain
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
diff --git a/tcl/target/lpc2378.cfg b/tcl/target/lpc2378.cfg
index 4e50ac5..7eb0dab 100644
--- a/tcl/target/lpc2378.cfg
+++ b/tcl/target/lpc2378.cfg
@@ -47,4 +47,4 @@ set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME lpc2000 0x0 0x0007D000 0 0 $_TARGETNAME lpc2000_v2 4000 calc_checksum
# 4MHz / 6 = 666kHz, so use 500
-jtag_khz 500
+adapter_khz 500
diff --git a/tcl/target/mc13224v.cfg b/tcl/target/mc13224v.cfg
index 497e376..33351ca 100644
--- a/tcl/target/mc13224v.cfg
+++ b/tcl/target/mc13224v.cfg
@@ -36,7 +36,7 @@ jtag_ntrst_delay 200
# rclk hasn't been working well. This maybe the mc13224v or something else.
#jtag_rclk 2000
-jtag_khz 2000
+adapter_khz 2000
######################
# Target configuration
diff --git a/tcl/target/mega128.cfg b/tcl/target/mega128.cfg
index 2cf31d6..697ec45 100644
--- a/tcl/target/mega128.cfg
+++ b/tcl/target/mega128.cfg
@@ -4,7 +4,7 @@
set _ENDIAN little
# jtag speed
-jtag_khz 4500
+adapter_khz 4500
reset_config srst_only
jtag_nsrst_delay 100
@@ -27,7 +27,7 @@ flash bank $_FLASHNAME avr 0 0 0 0 $_TARGETNAME
#to use it, script will be like:
#init
-#jtag_khz 4500
+#adapter_khz 4500
#reset init
#verify_ircapture disable
#
diff --git a/tcl/target/pxa255.cfg b/tcl/target/pxa255.cfg
index 44efdaa..5b745f8 100644
--- a/tcl/target/pxa255.cfg
+++ b/tcl/target/pxa255.cfg
@@ -28,8 +28,8 @@ target create $_TARGETNAME xscale -endian $_ENDIAN \
# PXA255 comes out of reset using 3.6864 MHz oscillator.
# Until the PLL kicks in, keep the JTAG clock slow enough
# that we get no errors.
-jtag_khz 300
-$_TARGETNAME configure -event "reset-start" { jtag_khz 300 }
+adapter_khz 300
+$_TARGETNAME configure -event "reset-start" { adapter_khz 300 }
# both TRST and SRST are *required* for debug
# DCSR is often accessed with SRST active
diff --git a/tcl/target/readme.txt b/tcl/target/readme.txt
index 39f8d12..f028b11 100644
--- a/tcl/target/readme.txt
+++ b/tcl/target/readme.txt
@@ -26,12 +26,12 @@ assumed that all write-protect mechanisms should be disabled.
flash write_image [file] <parameters>
verify_image [file] <parameters>
-4. jtag_khz sets the maximum speed (or alternatively RCLK). If invoked
+4. adapter_khz sets the maximum speed (or alternatively RCLK). If invoked
multiple times only the last setting is used.
interface/xxx.cfg files are always executed *before* target/xxx.cfg
-files, so any jtag_khz in interface/xxx.cfg will be overridden by
-target/xxx.cfg. jtag_khz in interface/xxx.cfg would then, effectively,
+files, so any adapter_khz in interface/xxx.cfg will be overridden by
+target/xxx.cfg. adapter_khz in interface/xxx.cfg would then, effectively,
set the default JTAG speed.
Note that a target/xxx.cfg file can invoke another target/yyy.cfg file,
diff --git a/tcl/target/samsung_s3c2450.cfg b/tcl/target/samsung_s3c2450.cfg
index 071b271..0075426 100644
--- a/tcl/target/samsung_s3c2450.cfg
+++ b/tcl/target/samsung_s3c2450.cfg
@@ -7,11 +7,11 @@
#
# RCLK?
#
-# jtag_khz 0
+# adapter_khz 0
#
# Really low clock during reset?
#
-# jtag_khz 1
+# adapter_khz 1
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
diff --git a/tcl/target/stellaris.cfg b/tcl/target/stellaris.cfg
index 6fafac9..5f4428f 100644
--- a/tcl/target/stellaris.cfg
+++ b/tcl/target/stellaris.cfg
@@ -41,8 +41,8 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x2000
# NOTE: this may be increased by a reset-init handler, after it
# configures and enables the PLL. Or ...
[truncated message content] |
|
From: Spencer O. <nt...@us...> - 2010-03-15 11:08:16
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 4b964a81ca1423b808a056b457e3d458689d50fa (commit)
from de761e350ba8d89fab4fac6f14b1072f8369d778 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 4b964a81ca1423b808a056b457e3d458689d50fa
Author: Spencer Oliver <nt...@us...>
Date: Mon Mar 15 10:06:47 2010 +0000
FT2232: bulidfix
Fix build issue with commit c23d4596d2239bdbba080499de837f53e0c89e59
Signed-off-by: Spencer Oliver <nt...@us...>
diff --git a/src/jtag/drivers/ft2232.c b/src/jtag/drivers/ft2232.c
index 10e4636..b45e8a4 100644
--- a/src/jtag/drivers/ft2232.c
+++ b/src/jtag/drivers/ft2232.c
@@ -2021,7 +2021,7 @@ static int ft2232_init_ftd2xx(uint16_t vid, uint16_t pid, int more, int* try_mor
char* openex_string = NULL;
uint8_t latency_timer;
- if ((layout == NULL) {
+ if (layout == NULL) {
LOG_WARNING("No ft2232 layout specified'");
return ERROR_JTAG_INIT_FAILED;
}
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/ft2232.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: Spencer O. <nt...@us...> - 2010-03-15 10:40:43
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via de761e350ba8d89fab4fac6f14b1072f8369d778 (commit)
from c25fda2c95f130d758c7784277fe5f2693ff3dd4 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit de761e350ba8d89fab4fac6f14b1072f8369d778
Author: Spencer Oliver <nt...@us...>
Date: Mon Mar 15 09:36:46 2010 +0000
PIC32MX: update cfg script
The default config script will now dynamically setup the BMX registers
in the reset init script.
This will also work if the user overrides the default working area.
Signed-off-by: Spencer Oliver <nt...@us...>
diff --git a/tcl/target/pic32mx.cfg b/tcl/target/pic32mx.cfg
index 0f1fa66..d77c3a8 100644
--- a/tcl/target/pic32mx.cfg
+++ b/tcl/target/pic32mx.cfg
@@ -18,14 +18,14 @@ if { [info exists CPUTAPID ] } {
set _CPUTAPID 0x30938053
}
-# working area is 16384 - 2048
-# loose first 2048 bytes due to BMXDKPBA reg
+# default working area is 16384
if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE $WORKAREASIZE
} else {
- set _WORKAREASIZE [expr (16384 - 2048)]
+ set _WORKAREASIZE 0x4000
}
+
jtag_nsrst_delay 100
jtag_ntrst_delay 100
@@ -39,22 +39,35 @@ jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_C
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME mips_m4k -endian $_ENDIAN -chain-position $_TARGETNAME
-$_TARGETNAME configure -work-area-phys 0xa0000800 -work-area-size $_WORKAREASIZE -work-area-backup 0
+#
+# At reset the pic32mx does not allow code execution from RAM
+# we have to setup the BMX registers to allow this.
+# One limitation is that we loose the first 2k of RAM.
+#
+
+global _PIC32MX_DATASIZE
+global _PIC32MX_PROGSIZE
+set _PIC32MX_DATASIZE 0x800
+set _PIC32MX_PROGSIZE [expr ($_WORKAREASIZE - $_PIC32MX_DATASIZE)]
+$_TARGETNAME configure -work-area-phys 0xa0000800 -work-area-size $_PIC32MX_PROGSIZE -work-area-backup 0
$_TARGETNAME configure -event reset-init {
#
# from reset the pic32 cannot execute code in ram - enable ram execution
# minimum offset from start of ram is 2k
#
+ global _PIC32MX_DATASIZE
+ global _PIC32MX_PROGSIZE
+
# BMXCON
mww 0xbf882000 0x001f0040
- # BMXDKPBA: 0xa0000800
- mww 0xbf882010 0x00000800
- # BMXDUDBA
- mww 0xbf882020 0x00004000
- # BMXDUPBA
- mww 0xbf882030 0x00004000
+ # BMXDKPBA: 2k kernel data @ 0xa0000800
+ mww 0xbf882010 $_PIC32MX_DATASIZE
+ # BMXDUDBA: 16k kernel program @ 0xa0000800
+ mww 0xbf882020 $_PIC32MX_PROGSIZE
+ # BMXDUPBA: 0k user program
+ mww 0xbf882030 $_PIC32MX_PROGSIZE
}
set _FLASHNAME $_CHIPNAME.flash
-----------------------------------------------------------------------
Summary of changes:
tcl/target/pic32mx.cfg | 33 +++++++++++++++++++++++----------
1 files changed, 23 insertions(+), 10 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: David B. <dbr...@us...> - 2010-03-14 21:22:12
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via c25fda2c95f130d758c7784277fe5f2693ff3dd4 (commit)
via c23d4596d2239bdbba080499de837f53e0c89e59 (commit)
from 763013f15e348d760e193da807c5bd79437ab8c7 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit c25fda2c95f130d758c7784277fe5f2693ff3dd4
Author: David Brownell <dbr...@us...>
Date: Sun Mar 14 13:13:39 2010 -0700
rename jtag_interface_{init,quit}()
These routines apply to non-JTAG debug adapters too. To
reduce confusion, give them better (non-misleading) names.
Signed-off-by: David Brownell <dbr...@us...>
diff --git a/src/jtag/core.c b/src/jtag/core.c
index 706f2f2..e7cb48d 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -1346,7 +1346,11 @@ void jtag_tap_free(struct jtag_tap *tap)
free(tap);
}
-int jtag_interface_init(struct command_context *cmd_ctx)
+/**
+ * Do low-level setup like initializing registers, output signals,
+ * and clocking.
+ */
+int adapter_init(struct command_context *cmd_ctx)
{
if (jtag)
return ERROR_OK;
@@ -1354,7 +1358,8 @@ int jtag_interface_init(struct command_context *cmd_ctx)
if (!jtag_interface)
{
/* nothing was previously specified by "interface" command */
- LOG_ERROR("JTAG interface has to be specified, see \"interface\" command");
+ LOG_ERROR("Debug Adapter has to be specified, "
+ "see \"interface\" command");
return ERROR_JTAG_INVALID_INTERFACE;
}
@@ -1369,9 +1374,10 @@ int jtag_interface_init(struct command_context *cmd_ctx)
int actual_khz = requested_khz;
int retval = jtag_get_speed_readable(&actual_khz);
if (ERROR_OK != retval)
- LOG_INFO("interface specific clock speed value %d", jtag_get_speed());
+ LOG_INFO("adapter-specific clock speed value %d", jtag_get_speed());
else if (actual_khz)
{
+ /* Adaptive clocking -- JTAG-specific */
if ((CLOCK_MODE_RCLK == clock_mode)
|| ((CLOCK_MODE_KHZ == clock_mode) && !requested_khz))
{
@@ -1459,7 +1465,7 @@ int jtag_init_inner(struct command_context *cmd_ctx)
return ERROR_OK;
}
-int jtag_interface_quit(void)
+int adapter_quit(void)
{
if (!jtag || !jtag->quit)
return ERROR_OK;
@@ -1477,7 +1483,7 @@ int jtag_init_reset(struct command_context *cmd_ctx)
{
int retval;
- if ((retval = jtag_interface_init(cmd_ctx)) != ERROR_OK)
+ if ((retval = adapter_init(cmd_ctx)) != ERROR_OK)
return retval;
LOG_DEBUG("Initializing with hard TRST+SRST reset");
@@ -1531,7 +1537,7 @@ int jtag_init(struct command_context *cmd_ctx)
{
int retval;
- if ((retval = jtag_interface_init(cmd_ctx)) != ERROR_OK)
+ if ((retval = adapter_init(cmd_ctx)) != ERROR_OK)
return retval;
/* guard against oddball hardware: force resets to be inactive */
diff --git a/src/jtag/jtag.h b/src/jtag/jtag.h
index ae85961..0bbea5f 100644
--- a/src/jtag/jtag.h
+++ b/src/jtag/jtag.h
@@ -305,14 +305,11 @@ void jtag_set_verify_capture_ir(bool enable);
/// @returns True if IR scan verification will be performed.
bool jtag_will_verify_capture_ir(void);
-/**
- * Initialize interface upon startup. Return a successful no-op upon
- * subsequent invocations.
- */
-int jtag_interface_init(struct command_context* cmd_ctx);
+/** Initialize debug adapter upon startup. */
+int adapter_init(struct command_context* cmd_ctx);
-/// Shutdown the JTAG interface upon program exit.
-int jtag_interface_quit(void);
+/// Shutdown the debug adapter upon program exit.
+int adapter_quit(void);
/**
* Initialize JTAG chain using only a RESET reset. If init fails,
diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c
index 3ffa930..ce17e4b 100644
--- a/src/jtag/tcl.c
+++ b/src/jtag/tcl.c
@@ -1430,7 +1430,7 @@ COMMAND_HANDLER(handle_jtag_reset_command)
else
return ERROR_COMMAND_SYNTAX_ERROR;
- if (jtag_interface_init(CMD_CTX) != ERROR_OK)
+ if (adapter_init(CMD_CTX) != ERROR_OK)
return ERROR_JTAG_INIT_FAILED;
jtag_add_reset(trst, srst);
diff --git a/src/openocd.c b/src/openocd.c
index 4250434..d376f5f 100644
--- a/src/openocd.c
+++ b/src/openocd.c
@@ -115,12 +115,12 @@ COMMAND_HANDLER(handle_init_command)
if (ERROR_OK != retval)
return ERROR_FAIL;
- if ((retval = jtag_interface_init(CMD_CTX)) != ERROR_OK)
+ if ((retval = adapter_init(CMD_CTX)) != ERROR_OK)
{
- /* we must be able to set up the jtag interface */
+ /* we must be able to set up the debug adapter */
return retval;
}
- LOG_DEBUG("jtag interface init complete");
+ LOG_DEBUG("Debug Adapter init complete");
/* Try to initialize & examine the JTAG chain at this point,
* but continue startup regardless. Note that platforms
@@ -297,7 +297,7 @@ int openocd_main(int argc, char *argv[])
/* free commandline interface */
command_done(cmd_ctx);
- jtag_interface_quit();
+ adapter_quit();
return ret;
}
commit c23d4596d2239bdbba080499de837f53e0c89e59
Author: David Brownell <dbr...@us...>
Date: Sun Mar 14 13:10:26 2010 -0700
FT2232: lookup and save layout just once
Streamline use of the layout: have the "ft2232_layout" command
look it up and save the result, instead of having a few different
chunks of code looking it up later, and saving just its name (which
is already part of the layout). This
- is cleaner
- reports errors sooner
- facilitates earlier adapter-specific setup
- removes unused "default to "usbjtag" logic
Signed-off-by: David Brownell <dbr...@us...>
diff --git a/src/jtag/drivers/ft2232.c b/src/jtag/drivers/ft2232.c
index 38195c7..10e4636 100644
--- a/src/jtag/drivers/ft2232.c
+++ b/src/jtag/drivers/ft2232.c
@@ -141,7 +141,6 @@ static int ft2232_stableclocks(int num_cycles, struct jtag_command* cmd);
static char * ft2232_device_desc_A = NULL;
static char* ft2232_device_desc = NULL;
static char* ft2232_serial = NULL;
-static char* ft2232_layout = NULL;
static uint8_t ft2232_latency = 2;
static unsigned ft2232_max_tck = FTDI_2232C_MAX_TCK;
@@ -289,7 +288,9 @@ static const struct ft2232_layout ft2232_layouts[] =
static uint8_t nTRST, nTRSTnOE, nSRST, nSRSTnOE;
+/** the layout being used with this debug session */
static const struct ft2232_layout *layout;
+
static uint8_t low_output = 0x0;
static uint8_t low_direction = 0x0;
static uint8_t high_output = 0x0;
@@ -2020,7 +2021,12 @@ static int ft2232_init_ftd2xx(uint16_t vid, uint16_t pid, int more, int* try_mor
char* openex_string = NULL;
uint8_t latency_timer;
- LOG_DEBUG("'ft2232' interface using FTD2XX with '%s' layout (%4.4x:%4.4x)", ft2232_layout, vid, pid);
+ if ((layout == NULL) {
+ LOG_WARNING("No ft2232 layout specified'");
+ return ERROR_JTAG_INIT_FAILED;
+ }
+
+ LOG_DEBUG("'ft2232' interface using FTD2XX with '%s' layout (%4.4x:%4.4x)", layout->name, vid, pid);
#if IS_WIN32 == 0
/* Add non-standard Vid/Pid to the linux driver */
@@ -2187,8 +2193,13 @@ static int ft2232_init_libftdi(uint16_t vid, uint16_t pid, int more, int* try_mo
{
uint8_t latency_timer;
+ if (layout == NULL) {
+ LOG_WARNING("No ft2232 layout specified'");
+ return ERROR_JTAG_INIT_FAILED;
+ }
+
LOG_DEBUG("'ft2232' interface using libftdi with '%s' layout (%4.4x:%4.4x)",
- ft2232_layout, vid, pid);
+ layout->name, vid, pid);
if (ftdi_init(&ftdic) < 0)
return ERROR_JTAG_INIT_FAILED;
@@ -2268,8 +2279,6 @@ static int ft2232_init(void)
uint8_t buf[1];
int retval;
uint32_t bytes_written;
- const struct ft2232_layout* cur_layout = ft2232_layouts;
- int i;
if (tap_get_tms_path_len(TAP_IRPAUSE,TAP_IRPAUSE) == 7)
{
@@ -2280,29 +2289,12 @@ static int ft2232_init(void)
LOG_DEBUG("ft2232 interface using shortest path jtag state transitions");
}
- if ((ft2232_layout == NULL) || (ft2232_layout[0] == 0))
- {
- ft2232_layout = "usbjtag";
- LOG_WARNING("No ft2232 layout specified, using default 'usbjtag'");
- }
-
- while (cur_layout->name)
- {
- if (strcmp(cur_layout->name, ft2232_layout) == 0)
- {
- layout = cur_layout;
- break;
- }
- cur_layout++;
- }
-
- if (!layout)
- {
- LOG_ERROR("No matching layout found for %s", ft2232_layout);
+ if (layout == NULL) {
+ LOG_WARNING("No ft2232 layout specified'");
return ERROR_JTAG_INIT_FAILED;
}
- for (i = 0; 1; i++)
+ for (int i = 0; 1; i++)
{
/*
* "more indicates that there are more IDs to try, so we should
@@ -2321,7 +2313,7 @@ static int ft2232_init(void)
more, &try_more);
#elif BUILD_FT2232_LIBFTDI == 1
retval = ft2232_init_libftdi(ft2232_vid[i], ft2232_pid[i],
- more, &try_more, cur_layout->channel);
+ more, &try_more, layout->channel);
#endif
if (retval >= 0)
break;
@@ -2371,6 +2363,7 @@ static int usbjtag_init(void)
{
uint8_t buf[3];
uint32_t bytes_written;
+ char *ft2232_layout = layout->name;
low_output = 0x08;
low_direction = 0x0b;
@@ -3131,13 +3124,28 @@ COMMAND_HANDLER(ft2232_handle_serial_command)
COMMAND_HANDLER(ft2232_handle_layout_command)
{
- if (CMD_ARGC == 0)
- return ERROR_OK;
+ if (CMD_ARGC != 1) {
+ LOG_ERROR("Need exactly one argument to ft2232_layout");
+ return ERROR_FAIL;
+ }
- ft2232_layout = malloc(strlen(CMD_ARGV[0]) + 1);
- strcpy(ft2232_layout, CMD_ARGV[0]);
+ if (layout) {
+ LOG_ERROR("already specified ft2232_layout %s",
+ layout->name);
+ return (strcmp(layout->name, CMD_ARGV[0]) != 0)
+ ? ERROR_FAIL
+ : ERROR_OK;
+ }
- return ERROR_OK;
+ for (const struct ft2232_layout *l = ft2232_layouts; l->name; l++) {
+ if (strcmp(l->name, CMD_ARGV[0]) == 0) {
+ layout = l;
+ return ERROR_OK;
+ }
+ }
+
+ LOG_ERROR("No FT2232 layout '%s' found", CMD_ARGV[0]);
+ return ERROR_FAIL;
}
COMMAND_HANDLER(ft2232_handle_vid_pid_command)
-----------------------------------------------------------------------
Summary of changes:
src/jtag/core.c | 18 ++++++++----
src/jtag/drivers/ft2232.c | 70 +++++++++++++++++++++++++--------------------
src/jtag/jtag.h | 11 ++----
src/jtag/tcl.c | 2 +-
src/openocd.c | 8 ++--
5 files changed, 60 insertions(+), 49 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: David B. <dbr...@us...> - 2010-03-12 01:58:13
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 763013f15e348d760e193da807c5bd79437ab8c7 (commit)
from 03a26d31e991976ff978c8c9b245210f116f6ece (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 763013f15e348d760e193da807c5bd79437ab8c7
Author: Mike Dunn <mik...@ne...>
Date: Thu Mar 11 16:53:05 2010 -0800
fix xscale icache and dcache commands
Simple patch that fixes the broken xscale icache and dcache commands.
This broke when the helper functions and macros were changed.
[ dbr...@us...: don't use strcasecmp ]
Signed-off-by: David Brownell <dbr...@us...>
diff --git a/src/target/xscale.c b/src/target/xscale.c
index 602034e..50c9595 100644
--- a/src/target/xscale.c
+++ b/src/target/xscale.c
@@ -3197,9 +3197,9 @@ COMMAND_HANDLER(xscale_handle_idcache_command)
return ERROR_OK;
}
- bool icache;
- COMMAND_PARSE_BOOL(CMD_NAME, icache, "icache", "dcache");
-
+ bool icache = false;
+ if (strcmp(CMD_NAME, "icache") == 0)
+ icache = true;
if (CMD_ARGC >= 1)
{
bool enable;
-----------------------------------------------------------------------
Summary of changes:
src/target/xscale.c | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: David B. <dbr...@us...> - 2010-03-11 23:23:03
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 03a26d31e991976ff978c8c9b245210f116f6ece (commit)
via db464f3cd4ed83b9f3411a98362dd67aad7bc3fd (commit)
from 24e1e3dd2699b817fa72a7843d36197abcd9e3a3 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 03a26d31e991976ff978c8c9b245210f116f6ece
Author: David Brownell <dbr...@us...>
Date: Thu Mar 11 14:21:36 2010 -0800
versaloon cleanup patch
Remove undesirable
- backslashes at end-of-line;
- initializations of BSS data to zero/NULL;
- overlong lines (80+ characters)
- whitespace issues
- brackets around single-line statements
And other minor issues reported by the Linux "checkpatch" utility
Signed-off-by: David Brownell <dbr...@us...>
diff --git a/src/jtag/drivers/vsllink.c b/src/jtag/drivers/vsllink.c
index 451d5f8..a985677 100644
--- a/src/jtag/drivers/vsllink.c
+++ b/src/jtag/drivers/vsllink.c
@@ -39,11 +39,11 @@ static uint8_t vsllink_usb_bulkin;
static uint8_t vsllink_usb_interface;
static int VSLLINK_USB_TIMEOUT = 1000;
-static int vsllink_tms_offset = 0;
+static int vsllink_tms_offset;
/* Global USB buffers */
-static uint8_t* vsllink_usb_in_buffer = NULL;
-static uint8_t* vsllink_usb_out_buffer = NULL;
+static uint8_t *vsllink_usb_in_buffer;
+static uint8_t *vsllink_usb_out_buffer;
static int vsllink_buffer_size = 128;
/* Constants for Versaloon command */
@@ -90,8 +90,8 @@ struct pending_scan_result {
#define MAX_PENDING_SCAN_RESULTS 256
static int pending_scan_results_length;
-static struct pending_scan_result \
- pending_scan_results_buffer[MAX_PENDING_SCAN_RESULTS];
+static struct pending_scan_result
+ pending_scan_results_buffer[MAX_PENDING_SCAN_RESULTS];
/* Queue command functions */
static void vsllink_end_state(tap_state_t state);
@@ -99,8 +99,8 @@ static void vsllink_state_move(void);
static void vsllink_path_move(int num_states, tap_state_t *path);
static void vsllink_runtest(int num_cycles);
static void vsllink_stableclocks(int num_cycles, int tms);
-static void vsllink_scan(bool ir_scan, enum scan_type type, uint8_t *buffer, \
- int scan_size, struct scan_command *command);
+static void vsllink_scan(bool ir_scan, enum scan_type type,
+ uint8_t *buffer, int scan_size, struct scan_command *command);
static void vsllink_reset(int trst, int srst);
static void vsllink_simple_command(uint8_t command);
@@ -109,17 +109,17 @@ static void vsllink_tap_append_step(int tms, int tdi);
static void vsllink_tap_init(void);
static int vsllink_tap_execute(void);
static void vsllink_tap_ensure_pending(int scans);
-static void vsllink_tap_append_scan(int length, uint8_t *buffer, \
- struct scan_command *command);
+static void vsllink_tap_append_scan(int length, uint8_t *buffer,
+ struct scan_command *command);
/* VSLLink lowlevel functions */
struct vsllink {
- struct usb_dev_handle* usb_handle;
+ struct usb_dev_handle *usb_handle;
};
static struct vsllink *vsllink_usb_open(void);
static void vsllink_usb_close(struct vsllink *vsllink);
-static int vsllink_usb_message(struct vsllink *vsllink, int out_length, \
+static int vsllink_usb_message(struct vsllink *vsllink, int out_length,
int in_length);
static int vsllink_usb_write(struct vsllink *vsllink, int out_length);
static int vsllink_usb_read(struct vsllink *vsllink);
@@ -128,13 +128,13 @@ static int vsllink_usb_read(struct vsllink *vsllink);
static void vsllink_debug_buffer(uint8_t *buffer, int length);
#endif
-static int tap_length = 0;
-static int tap_buffer_size = 0;
-static uint8_t *tms_buffer = NULL;
-static uint8_t *tdi_buffer = NULL;
-static uint8_t *tdo_buffer = NULL;
+static int tap_length;
+static int tap_buffer_size;
+static uint8_t *tms_buffer;
+static uint8_t *tdi_buffer;
+static uint8_t *tdo_buffer;
-static struct vsllink* vsllink_handle = NULL;
+static struct vsllink *vsllink_handle;
static void reset_command_pointer(void)
{
@@ -148,80 +148,91 @@ static int vsllink_execute_queue(void)
enum scan_type type;
uint8_t *buffer;
- DEBUG_JTAG_IO( "-------------------------------------"
- " vsllink "
- "-------------------------------------");
+ DEBUG_JTAG_IO("-------------------------------------"
+ " vsllink "
+ "-------------------------------------");
reset_command_pointer();
- while (cmd != NULL)
- {
- switch (cmd->type)
- {
+ while (cmd != NULL) {
+ switch (cmd->type) {
case JTAG_RUNTEST:
- DEBUG_JTAG_IO("runtest %i cycles, end in %s", \
- cmd->cmd.runtest->num_cycles, \
- tap_state_name(cmd->cmd.runtest->end_state));
+ DEBUG_JTAG_IO("runtest %i cycles, end in %s",
+ cmd->cmd.runtest->num_cycles,
+ tap_state_name(cmd->cmd.runtest
+ ->end_state));
vsllink_end_state(cmd->cmd.runtest->end_state);
vsllink_runtest(cmd->cmd.runtest->num_cycles);
break;
case JTAG_STATEMOVE:
- DEBUG_JTAG_IO("statemove end in %s", \
- tap_state_name(cmd->cmd.statemove->end_state));
+ DEBUG_JTAG_IO("statemove end in %s",
+ tap_state_name(cmd->cmd.statemove
+ ->end_state));
- vsllink_end_state(cmd->cmd.statemove->end_state);
+ vsllink_end_state(cmd->cmd.statemove
+ ->end_state);
vsllink_state_move();
break;
case JTAG_PATHMOVE:
- DEBUG_JTAG_IO("pathmove: %i states, end in %s", \
- cmd->cmd.pathmove->num_states, \
- tap_state_name(cmd->cmd.pathmove->path[cmd->cmd.pathmove->num_states - 1]));
-
- vsllink_path_move(cmd->cmd.pathmove->num_states, \
- cmd->cmd.pathmove->path);
+ DEBUG_JTAG_IO("pathmove: %i states, end in %s",
+ cmd->cmd.pathmove->num_states,
+ tap_state_name(cmd->cmd.pathmove
+ ->path[cmd->cmd.pathmove
+ ->num_states - 1]));
+
+ vsllink_path_move(
+ cmd->cmd.pathmove->num_states,
+ cmd->cmd.pathmove->path);
break;
case JTAG_SCAN:
vsllink_end_state(cmd->cmd.scan->end_state);
- scan_size = jtag_build_buffer(cmd->cmd.scan, &buffer);
+ scan_size = jtag_build_buffer(
+ cmd->cmd.scan, &buffer);
+
if (cmd->cmd.scan->ir_scan)
- {
- DEBUG_JTAG_IO("JTAG Scan write IR(%d bits), end in %s:", \
- scan_size, \
- tap_state_name(cmd->cmd.scan->end_state));
- }
+ DEBUG_JTAG_IO(
+ "JTAG Scan write IR(%d bits), "
+ "end in %s:",
+ scan_size,
+ tap_state_name(cmd->cmd.scan
+ ->end_state));
+
else
- {
- DEBUG_JTAG_IO("JTAG Scan write DR(%d bits), end in %s:", \
- scan_size, \
- tap_state_name(cmd->cmd.scan->end_state));
- }
+ DEBUG_JTAG_IO(
+ "JTAG Scan write DR(%d bits), "
+ "end in %s:",
+ scan_size,
+ tap_state_name(cmd->cmd.scan
+ ->end_state));
#ifdef _DEBUG_JTAG_IO_
- vsllink_debug_buffer(buffer, DIV_ROUND_UP(scan_size, 8));
+ vsllink_debug_buffer(buffer,
+ DIV_ROUND_UP(scan_size, 8));
#endif
type = jtag_scan_type(cmd->cmd.scan);
- vsllink_scan(cmd->cmd.scan->ir_scan, type, buffer, \
- scan_size, cmd->cmd.scan);
+ vsllink_scan(cmd->cmd.scan->ir_scan,
+ type, buffer, scan_size,
+ cmd->cmd.scan);
break;
case JTAG_RESET:
- DEBUG_JTAG_IO("reset trst: %i srst %i", \
- cmd->cmd.reset->trst, \
- cmd->cmd.reset->srst);
+ DEBUG_JTAG_IO("reset trst: %i srst %i",
+ cmd->cmd.reset->trst,
+ cmd->cmd.reset->srst);
vsllink_tap_execute();
if (cmd->cmd.reset->trst == 1)
- {
tap_set_state(TAP_RESET);
- }
- vsllink_reset(cmd->cmd.reset->trst, cmd->cmd.reset->srst);
+
+ vsllink_reset(cmd->cmd.reset->trst,
+ cmd->cmd.reset->srst);
break;
case JTAG_SLEEP:
@@ -231,12 +242,13 @@ static int vsllink_execute_queue(void)
break;
case JTAG_STABLECLOCKS:
- DEBUG_JTAG_IO("add %d clocks", \
- cmd->cmd.stableclocks->num_cycles);
- switch (tap_get_state())
- {
+ DEBUG_JTAG_IO("add %d clocks",
+ cmd->cmd.stableclocks->num_cycles);
+ switch (tap_get_state()) {
case TAP_RESET:
- // tms should be '1' to stay in TAP_RESET mode
+ /* tms must be '1' to stay
+ * n TAP_RESET mode
+ */
scan_size = 1;
break;
case TAP_DRSHIFT:
@@ -244,21 +256,24 @@ static int vsllink_execute_queue(void)
case TAP_DRPAUSE:
case TAP_IRSHIFT:
case TAP_IRPAUSE:
- // in other mode, tms should be '0'
+ /* else, tms should be '0' */
scan_size = 0;
- break; /* above stable states are OK */
+ break;
+ /* above stable states are OK */
default:
- LOG_ERROR("jtag_add_clocks() in non-stable state \"%s\"",
- tap_state_name(tap_get_state()));
- exit(-1);
+ LOG_ERROR("jtag_add_clocks() "
+ "in non-stable state \"%s\"",
+ tap_state_name(tap_get_state())
+ );
+ exit(-1);
}
- vsllink_stableclocks(cmd->cmd.stableclocks->num_cycles, \
- scan_size);
+ vsllink_stableclocks(cmd->cmd.stableclocks
+ ->num_cycles, scan_size);
break;
default:
- LOG_ERROR("BUG: unknown JTAG command type encountered: %d", \
- cmd->type);
+ LOG_ERROR("BUG: unknown JTAG command type "
+ "encountered: %d", cmd->type);
exit(-1);
}
cmd = cmd->next;
@@ -278,11 +293,8 @@ static int vsllink_speed(int speed)
result = vsllink_usb_write(vsllink_handle, 3);
if (result == 3)
- {
return ERROR_OK;
- }
- else
- {
+ else {
LOG_ERROR("VSLLink setting speed failed (%d)", result);
return ERROR_JTAG_DEVICE_ERROR;
}
@@ -312,66 +324,60 @@ static int vsllink_init(void)
vsllink_usb_in_buffer = malloc(vsllink_buffer_size);
vsllink_usb_out_buffer = malloc(vsllink_buffer_size);
- if ((vsllink_usb_in_buffer == NULL) || (vsllink_usb_out_buffer == NULL))
- {
+ if ((vsllink_usb_in_buffer == NULL)
+ || (vsllink_usb_out_buffer == NULL)) {
LOG_ERROR("Not enough memory");
exit(-1);
}
vsllink_handle = vsllink_usb_open();
- if (vsllink_handle == 0)
- {
+ if (vsllink_handle == 0) {
LOG_ERROR("Can't find USB JTAG Interface!"\
- "Please check connection and permissions.");
+ "Please check connection and permissions.");
return ERROR_JTAG_INIT_FAILED;
}
- LOG_DEBUG("vsllink found on %04X:%04X", vsllink_usb_vid, vsllink_usb_pid);
+ LOG_DEBUG("vsllink found on %04X:%04X",
+ vsllink_usb_vid, vsllink_usb_pid);
to_tmp = VSLLINK_USB_TIMEOUT;
VSLLINK_USB_TIMEOUT = 100;
check_cnt = 0;
- while (check_cnt < 5)
- {
+ while (check_cnt < 5) {
vsllink_simple_command(VERSALOON_GET_INFO);
result = vsllink_usb_read(vsllink_handle);
- if (result > 2)
- {
+ if (result > 2) {
vsllink_usb_in_buffer[result] = 0;
- vsllink_buffer_size = vsllink_usb_in_buffer[0] + \
- (vsllink_usb_in_buffer[1] << 8);
- strncpy(version_str, (char *)vsllink_usb_in_buffer + 2, \
+ vsllink_buffer_size = vsllink_usb_in_buffer[0]
+ + (vsllink_usb_in_buffer[1] << 8);
+ strncpy(version_str, (char *)vsllink_usb_in_buffer + 2,
sizeof(version_str));
LOG_INFO("%s", version_str);
- // free the pre-alloc memroy
+ /* free the pre-allocated memory */
free(vsllink_usb_in_buffer);
free(vsllink_usb_out_buffer);
vsllink_usb_in_buffer = NULL;
vsllink_usb_out_buffer = NULL;
- // alloc new memory
+ /* alloc new memory */
vsllink_usb_in_buffer = malloc(vsllink_buffer_size);
vsllink_usb_out_buffer = malloc(vsllink_buffer_size);
- if ((vsllink_usb_in_buffer == NULL) || \
- (vsllink_usb_out_buffer == NULL))
- {
+ if ((vsllink_usb_in_buffer == NULL) ||
+ (vsllink_usb_out_buffer == NULL)) {
LOG_ERROR("Not enough memory");
exit(-1);
- }
- else
- {
- LOG_INFO("buffer size for USB is %d bytes", \
+ } else
+ LOG_INFO("buffer size for USB is %d bytes",
vsllink_buffer_size);
- }
- // alloc tms/tdi/tdo buffer
+
+ /* alloc tms/tdi/tdo buffer */
tap_buffer_size = (vsllink_buffer_size - 3) / 2;
- tms_buffer = (uint8_t*)malloc(tap_buffer_size);
- tdi_buffer = (uint8_t*)malloc(tap_buffer_size);
- tdo_buffer = (uint8_t*)malloc(tap_buffer_size);
- if ((tms_buffer == NULL) || (tdi_buffer == NULL) || \
- (tdo_buffer == NULL))
- {
+ tms_buffer = (uint8_t *)malloc(tap_buffer_size);
+ tdi_buffer = (uint8_t *)malloc(tap_buffer_size);
+ tdo_buffer = (uint8_t *)malloc(tap_buffer_size);
+ if ((tms_buffer == NULL) || (tdi_buffer == NULL) ||
+ (tdo_buffer == NULL)) {
LOG_ERROR("Not enough memory");
exit(-1);
}
@@ -380,9 +386,8 @@ static int vsllink_init(void)
vsllink_simple_command(VSLLINK_CMD_DISCONN);
check_cnt++;
}
- if (check_cnt == 3)
- {
- // Fail to access Versaloon
+ if (check_cnt == 3) {
+ /* Fail to access Versaloon */
LOG_ERROR("VSLLink initial failed");
exit(-1);
}
@@ -394,33 +399,27 @@ static int vsllink_init(void)
vsllink_simple_command(VERSALOON_GET_TVCC);
result = vsllink_usb_read(vsllink_handle);
if (result != 2)
- {
LOG_WARNING("Fail to get target voltage");
- }
else
- {
- LOG_INFO("Target runs at %d mV", vsllink_usb_in_buffer[0] + \
+ LOG_INFO("Target runs at %d mV", vsllink_usb_in_buffer[0] +
(vsllink_usb_in_buffer[1] << 8));
- }
- // connect to vsllink
+ /* connect to vsllink */
vsllink_usb_out_buffer[0] = VSLLINK_CMD_CONN;
vsllink_usb_out_buffer[1] = 1;
vsllink_usb_message(vsllink_handle, 2, 0);
- if (vsllink_usb_read(vsllink_handle) > 2)
- {
- strncpy(version_str, (char *)vsllink_usb_in_buffer + 2, \
+ if (vsllink_usb_read(vsllink_handle) > 2) {
+ strncpy(version_str, (char *)vsllink_usb_in_buffer + 2,
sizeof(version_str));
LOG_INFO("%s", version_str);
}
- // Set SRST and TRST to output, Set USR1 and USR2 to input
+ /* Set SRST and TRST to output, Set USR1 and USR2 to input */
vsllink_usb_out_buffer[0] = VSLLINK_CMD_SET_PORTDIR;
- vsllink_usb_out_buffer[1] = JTAG_PINMSK_SRST | JTAG_PINMSK_TRST | \
- JTAG_PINMSK_USR1 | JTAG_PINMSK_USR2;
+ vsllink_usb_out_buffer[1] = JTAG_PINMSK_SRST | JTAG_PINMSK_TRST
+ | JTAG_PINMSK_USR1 | JTAG_PINMSK_USR2;
vsllink_usb_out_buffer[2] = JTAG_PINMSK_SRST | JTAG_PINMSK_TRST;
- if (vsllink_usb_write(vsllink_handle, 3) != 3)
- {
+ if (vsllink_usb_write(vsllink_handle, 3) != 3) {
LOG_ERROR("VSLLink USB send data error");
exit(-1);
}
@@ -436,15 +435,14 @@ static int vsllink_init(void)
static int vsllink_quit(void)
{
- if ((vsllink_usb_in_buffer != NULL) && (vsllink_usb_out_buffer != NULL))
- {
+ if ((vsllink_usb_in_buffer != NULL)
+ && (vsllink_usb_out_buffer != NULL)) {
// Set all pins to input
vsllink_usb_out_buffer[0] = VSLLINK_CMD_SET_PORTDIR;
- vsllink_usb_out_buffer[1] = JTAG_PINMSK_SRST | JTAG_PINMSK_TRST | \
- JTAG_PINMSK_USR1 | JTAG_PINMSK_USR2;
+ vsllink_usb_out_buffer[1] = JTAG_PINMSK_SRST | JTAG_PINMSK_TRST
+ | JTAG_PINMSK_USR1 | JTAG_PINMSK_USR2;
vsllink_usb_out_buffer[2] = 0;
- if (vsllink_usb_write(vsllink_handle, 3) != 3)
- {
+ if (vsllink_usb_write(vsllink_handle, 3) != 3) {
LOG_ERROR("VSLLink USB send data error");
exit(-1);
}
@@ -455,13 +453,11 @@ static int vsllink_quit(void)
vsllink_handle = NULL;
}
- if (vsllink_usb_in_buffer != NULL)
- {
+ if (vsllink_usb_in_buffer != NULL) {
free(vsllink_usb_in_buffer);
vsllink_usb_in_buffer = NULL;
}
- if (vsllink_usb_out_buffer != NULL)
- {
+ if (vsllink_usb_out_buffer != NULL) {
free(vsllink_usb_out_buffer);
vsllink_usb_out_buffer = NULL;
}
@@ -475,11 +471,8 @@ static int vsllink_quit(void)
static void vsllink_end_state(tap_state_t state)
{
if (tap_is_state_stable(state))
- {
tap_set_end_state(state);
- }
- else
- {
+ else {
LOG_ERROR("BUG: %i is not a valid end state", state);
exit(-1);
}
@@ -489,34 +482,27 @@ static void vsllink_end_state(tap_state_t state)
static void vsllink_state_move(void)
{
int i;
- uint8_t tms_scan = tap_get_tms_path(tap_get_state(), tap_get_end_state());
- uint8_t tms_scan_bits = \
- tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
+ uint8_t tms_scan = tap_get_tms_path(tap_get_state(),
+ tap_get_end_state());
+ uint8_t tms_scan_bits = tap_get_tms_path_len(tap_get_state(),
+ tap_get_end_state());
for (i = 0; i < tms_scan_bits; i++)
- {
vsllink_tap_append_step((tms_scan >> i) & 1, 0);
- }
tap_set_state(tap_get_end_state());
}
static void vsllink_path_move(int num_states, tap_state_t *path)
{
- for (int i = 0; i < num_states; i++)
- {
+ for (int i = 0; i < num_states; i++) {
if (path[i] == tap_state_transition(tap_get_state(), false))
- {
vsllink_tap_append_step(0, 0);
- }
else if (path[i] == tap_state_transition(tap_get_state(), true))
- {
vsllink_tap_append_step(1, 0);
- }
- else
- {
- LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", \
- tap_state_name(tap_get_state()), \
+ else {
+ LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition",
+ tap_state_name(tap_get_state()),
tap_state_name(path[i]));
exit(-1);
}
@@ -529,8 +515,7 @@ static void vsllink_path_move(int num_states, tap_state_t *path)
static void vsllink_stableclocks(int num_cycles, int tms)
{
- while (num_cycles > 0)
- {
+ while (num_cycles > 0) {
vsllink_tap_append_step(tms, 0);
num_cycles--;
}
@@ -540,9 +525,8 @@ static void vsllink_runtest(int num_cycles)
{
tap_state_t saved_end_state = tap_get_end_state();
- if (tap_get_state() != TAP_IDLE)
- {
- // enter into IDLE state
+ if (tap_get_state() != TAP_IDLE) {
+ /* enter IDLE state */
vsllink_end_state(TAP_IDLE);
vsllink_state_move();
}
@@ -553,13 +537,11 @@ static void vsllink_runtest(int num_cycles)
// set end_state
vsllink_end_state(saved_end_state);
if (tap_get_end_state() != tap_get_end_state())
- {
vsllink_state_move();
- }
}
-static void vsllink_scan(bool ir_scan, enum scan_type type, uint8_t *buffer, \
- int scan_size, struct scan_command *command)
+static void vsllink_scan(bool ir_scan, enum scan_type type, uint8_t *buffer,
+ int scan_size, struct scan_command *command)
{
tap_state_t saved_end_state;
@@ -569,9 +551,7 @@ static void vsllink_scan(bool ir_scan, enum scan_type type, uint8_t *buffer, \
vsllink_end_state(ir_scan ? TAP_IRSHIFT : TAP_DRSHIFT);
if (tap_get_state() != tap_get_end_state())
- {
vsllink_state_move();
- }
vsllink_end_state(saved_end_state);
/* Scan */
@@ -584,9 +564,7 @@ static void vsllink_scan(bool ir_scan, enum scan_type type, uint8_t *buffer, \
tap_set_state(ir_scan ? TAP_IRPAUSE : TAP_DRPAUSE);
if (tap_get_state() != tap_get_end_state())
- {
vsllink_state_move();
- }
}
static void vsllink_reset(int trst, int srst)
@@ -600,19 +578,14 @@ static void vsllink_reset(int trst, int srst)
vsllink_usb_out_buffer[1] = JTAG_PINMSK_SRST | JTAG_PINMSK_TRST;
vsllink_usb_out_buffer[2] = 0;
if (srst == 0)
- {
vsllink_usb_out_buffer[2] |= JTAG_PINMSK_SRST;
- }
if (trst == 0)
- {
vsllink_usb_out_buffer[2] |= JTAG_PINMSK_TRST;
- }
result = vsllink_usb_write(vsllink_handle, 3);
if (result != 3)
- {
- LOG_ERROR("VSLLink command VSLLINK_CMD_SET_PORT failed (%d)", result);
- }
+ LOG_ERROR("VSLLink command VSLLINK_CMD_SET_PORT failed (%d)",
+ result);
}
static void vsllink_simple_command(uint8_t command)
@@ -625,9 +598,8 @@ static void vsllink_simple_command(uint8_t command)
result = vsllink_usb_write(vsllink_handle, 1);
if (result != 1)
- {
- LOG_ERROR("VSLLink command 0x%02x failed (%d)", command, result);
- }
+ LOG_ERROR("VSLLink command 0x%02x failed (%d)",
+ command, result);
}
COMMAND_HANDLER(vsllink_handle_mode_command)
@@ -643,8 +615,7 @@ COMMAND_HANDLER(vsllink_handle_mode_command)
COMMAND_HANDLER(vsllink_handle_usb_vid_command)
{
- if (CMD_ARGC != 1)
- {
+ if (CMD_ARGC != 1) {
LOG_ERROR("parameter error, "
"should be one parameter for VID");
return ERROR_OK;
@@ -656,8 +627,7 @@ COMMAND_HANDLER(vsllink_handle_usb_vid_command)
COMMAND_HANDLER(vsllink_handle_usb_pid_command)
{
- if (CMD_ARGC != 1)
- {
+ if (CMD_ARGC != 1) {
LOG_ERROR("parameter error, "
"should be one parameter for PID");
return ERROR_OK;
@@ -668,10 +638,9 @@ COMMAND_HANDLER(vsllink_handle_usb_pid_command)
COMMAND_HANDLER(vsllink_handle_usb_bulkin_command)
{
- if (CMD_ARGC != 1)
- {
+ if (CMD_ARGC != 1) {
LOG_ERROR("parameter error, "
- "should be one parameter for BULKIN endpoint");
+ "should be one parameter for BULKIN endpoint");
return ERROR_OK;
}
@@ -684,10 +653,9 @@ COMMAND_HANDLER(vsllink_handle_usb_bulkin_command)
COMMAND_HANDLER(vsllink_handle_usb_bulkout_command)
{
- if (CMD_ARGC != 1)
- {
+ if (CMD_ARGC != 1) {
LOG_ERROR("parameter error, "
- "should be one parameter for BULKOUT endpoint");
+ "should be one parameter for BULKOUT endpoint");
return ERROR_OK;
}
@@ -700,10 +668,9 @@ COMMAND_HANDLER(vsllink_handle_usb_bulkout_command)
COMMAND_HANDLER(vsllink_handle_usb_interface_command)
{
- if (CMD_ARGC != 1)
- {
+ if (CMD_ARGC != 1) {
LOG_ERROR("parameter error, "
- "should be one parameter for interface number");
+ "should be one parameter for interface number");
return ERROR_OK;
}
@@ -723,13 +690,11 @@ static void vsllink_tap_init(void)
static void vsllink_tap_ensure_pending(int scans)
{
- int available_scans = \
+ int available_scans =
MAX_PENDING_SCAN_RESULTS - pending_scan_results_length;
if (scans > available_scans)
- {
vsllink_tap_execute();
- }
}
static void vsllink_tap_append_step(int tms, int tdi)
@@ -740,52 +705,40 @@ static void vsllink_tap_append_step(int tms, int tdi)
uint8_t bit = 1 << bit_index;
if (tms)
- {
tms_buffer[index] |= bit;
- }
else
- {
tms_buffer[index] &= ~bit;
- }
if (tdi)
- {
tdi_buffer[index] |= bit;
- }
else
- {
tdi_buffer[index] &= ~bit;
- }
tap_length++;
+
if (tap_buffer_size * 8 <= tap_length)
- {
vsllink_tap_execute();
- }
}
-static void vsllink_tap_append_scan(int length, uint8_t *buffer, \
- struct scan_command *command)
+static void vsllink_tap_append_scan(int length, uint8_t *buffer,
+ struct scan_command *command)
{
struct pending_scan_result *pending_scan_result;
int len_tmp, len_all, i;
len_all = 0;
- while (len_all < length)
- {
+ while (len_all < length) {
vsllink_tap_ensure_pending(1);
- pending_scan_result = \
- &pending_scan_results_buffer[pending_scan_results_length];
+ pending_scan_result =
+ &pending_scan_results_buffer[
+ pending_scan_results_length];
- if ((length - len_all) > (tap_buffer_size * 8 - tap_length))
- {
- /* Use all memory available
+ if ((length - len_all) > (tap_buffer_size * 8 - tap_length)) {
+ /* Use all memory available
vsllink_tap_append_step will commit automatically */
len_tmp = tap_buffer_size * 8 - tap_length;
pending_scan_result->last = false;
- }
- else
- {
+ } else {
len_tmp = length - len_all;
pending_scan_result->last = true;
}
@@ -796,10 +749,11 @@ static void vsllink_tap_append_scan(int length, uint8_t *buffer, \
pending_scan_result->buffer = buffer;
pending_scan_results_length++;
- for (i = 0; i < len_tmp; i++)
- {
- vsllink_tap_append_step(((len_all + i) < length-1 ? 0 : 1), \
- (buffer[(len_all + i)/8] >> ((len_all + i)%8)) & 1);
+ for (i = 0; i < len_tmp; i++) {
+ vsllink_tap_append_step(((len_all + i) < length-1
+ ? 0 : 1),
+ (buffer[(len_all + i)/8]
+ >> ((len_all + i)%8)) & 1);
}
len_all += len_tmp;
@@ -813,61 +767,70 @@ static int vsllink_tap_execute(void)
int result;
if (tap_length <= 0)
- {
return ERROR_OK;
- }
/* Pad data so that tap_length is divisible by 8 */
- if ((tap_length % 8) != 0)
- {
- if (vsllink_tms_offset > 0)
- {
- /* append tms:0 at vsllink_tms_offset, which is in Pause */
+ if ((tap_length % 8) != 0) {
+ if (vsllink_tms_offset > 0) {
+ /* append tms:0 at vsllink_tms_offset,
+ * which is in Pause
+ */
int start_pos = DIV_ROUND_UP(tap_length, 8) - 1;
int end_pos = DIV_ROUND_UP(vsllink_tms_offset, 8) - 1;
int shift_cnt = (start_pos + 1) * 8 - tap_length;
- uint8_t last_mask = ~((1 << (vsllink_tms_offset % 8)) - 1);
-
- while (1)
- {
- if (start_pos == end_pos)
- {
- tms_buffer[start_pos] = \
- (tms_buffer[start_pos] & ~last_mask) | \
- ((tms_buffer[start_pos] & last_mask) << shift_cnt);
- tdi_buffer[start_pos] = \
- (tdi_buffer[start_pos] & ~last_mask) | \
- ((tdi_buffer[start_pos] & last_mask) << shift_cnt);
+ uint8_t last_mask = ~(
+ (1 << (vsllink_tms_offset % 8)) - 1);
+
+ while (1) {
+ if (start_pos == end_pos) {
+ tms_buffer[start_pos] =
+ (tms_buffer[start_pos]
+ & ~last_mask)
+ | ((tms_buffer[start_pos]
+ & last_mask)
+ << shift_cnt);
+ tdi_buffer[start_pos] =
+ (tdi_buffer[start_pos]
+ & ~last_mask)
+ |
+ ((tdi_buffer[start_pos]
+ & last_mask)
+ << shift_cnt);
break;
- }
- else if (start_pos == (end_pos + 1))
- {
- tms_buffer[start_pos] = \
- (tms_buffer[start_pos] << shift_cnt) | \
- ((tms_buffer[start_pos - 1] & last_mask) >> (8 - shift_cnt));
- tdi_buffer[start_pos] = \
- (tdi_buffer[start_pos] << shift_cnt) | \
- ((tdi_buffer[start_pos - 1] & last_mask) >> (8 - shift_cnt));
- }
- else
- {
- tms_buffer[start_pos] = \
- (tms_buffer[start_pos] << shift_cnt) | \
- (tms_buffer[start_pos - 1] >> (8 - shift_cnt));
- tdi_buffer[start_pos] = \
- (tdi_buffer[start_pos] << shift_cnt) | \
- (tdi_buffer[start_pos - 1] >> (8 - shift_cnt));
+ } else if (start_pos == (end_pos + 1)) {
+ tms_buffer[start_pos] =
+ (tms_buffer[start_pos]
+ << shift_cnt) |
+ ((tms_buffer[start_pos - 1]
+ & last_mask)
+ >> (8 - shift_cnt));
+ tdi_buffer[start_pos] =
+ (tdi_buffer[start_pos]
+ << shift_cnt) |
+ ((tdi_buffer[start_pos - 1]
+ & last_mask)
+ >> (8 - shift_cnt));
+ } else {
+ tms_buffer[start_pos] =
+ (tms_buffer[start_pos]
+ << shift_cnt) |
+ (tms_buffer[start_pos - 1]
+ >> (8 - shift_cnt));
+ tdi_buffer[start_pos] =
+ (tdi_buffer[start_pos]
+ << shift_cnt) |
+ (tdi_buffer[start_pos - 1]
+ >> (8 - shift_cnt));
}
start_pos--;
}
tap_length = DIV_ROUND_UP(tap_length, 8) * 8;
- }
- else
- {
+ } else {
/* append data at last */
- while ((tap_length % 8) != 0)
- {
- vsllink_tap_append_step((tap_get_state() == TAP_RESET)?1:0, 0);
+ while ((tap_length % 8) != 0) {
+ vsllink_tap_append_step(
+ (tap_get_state() == TAP_RESET)
+ ? 1 : 0, 0);
}
}
}
@@ -878,51 +841,48 @@ static int vsllink_tap_execute(void)
vsllink_usb_out_buffer[2] = ((byte_length * 2 + 3) >> 8) & 0xff;
memcpy(&vsllink_usb_out_buffer[3], tdi_buffer, byte_length);
- memcpy(&vsllink_usb_out_buffer[3 + byte_length], tms_buffer, byte_length);
+ memcpy(&vsllink_usb_out_buffer[3 + byte_length], tms_buffer,
+ byte_length);
- result = vsllink_usb_message(vsllink_handle, 3 + 2 * byte_length, \
- byte_length);
+ result = vsllink_usb_message(vsllink_handle, 3 + 2 * byte_length,
+ byte_length);
- if (result == byte_length)
- {
- for (i = 0; i < pending_scan_results_length; i++)
- {
- struct pending_scan_result *pending_scan_result = \
- &pending_scan_results_buffer[i];
+ if (result == byte_length) {
+ for (i = 0; i < pending_scan_results_length; i++) {
+ struct pending_scan_result *pending_scan_result =
+ &pending_scan_results_buffer[i];
uint8_t *buffer = pending_scan_result->buffer;
int length = pending_scan_result->length;
int src_first = pending_scan_result->src_offset;
int dest_first = pending_scan_result->dest_offset;
bool last = pending_scan_result->last;
- struct scan_command *command = pending_scan_result->command;
- buf_set_buf(vsllink_usb_in_buffer, src_first, buffer, \
+ struct scan_command *command;
+
+ command = pending_scan_result->command;
+ buf_set_buf(vsllink_usb_in_buffer, src_first, buffer,
dest_first, length);
- DEBUG_JTAG_IO("JTAG scan read(%d bits, from %d bits):", \
- length, dest_first);
+ DEBUG_JTAG_IO("JTAG scan read(%d bits, from %d bits):",
+ length, dest_first);
#ifdef _DEBUG_JTAG_IO_
- vsllink_debug_buffer(buffer + dest_first / 8, DIV_ROUND_UP(length, 7));
+ vsllink_debug_buffer(buffer + dest_first / 8,
+ DIV_ROUND_UP(length, 7));
#endif
- if (last)
- {
- if (jtag_read_buffer(buffer, command) != ERROR_OK)
- {
+ if (last) {
+ if (jtag_read_buffer(buffer, command)
+ != ERROR_OK) {
vsllink_tap_init();
return ERROR_JTAG_QUEUE_FAILED;
}
if (pending_scan_result->buffer != NULL)
- {
free(pending_scan_result->buffer);
- }
}
}
- }
- else
- {
- LOG_ERROR("vsllink_tap_execute, wrong result %d, expected %d", \
+ } else {
+ LOG_ERROR("vsllink_tap_execute, wrong result %d, expected %d",
result, byte_length);
return ERROR_JTAG_QUEUE_FAILED;
}
@@ -935,7 +895,7 @@ static int vsllink_tap_execute(void)
/*****************************************************************************/
/* VSLLink USB low-level functions */
-static struct vsllink* vsllink_usb_open(void)
+static struct vsllink *vsllink_usb_open(void)
{
usb_init();
@@ -947,17 +907,16 @@ static struct vsllink* vsllink_usb_open(void)
/* usb_set_configuration required under win32 */
struct usb_device *udev = usb_device(dev);
- int ret = usb_set_configuration(dev, udev->config[0].bConfigurationValue);
- if (ret != 0)
- {
+ int ret = usb_set_configuration(dev,
+ udev->config[0].bConfigurationValue);
+ if (ret != 0) {
LOG_ERROR("fail to set configuration to %d (error %d)."
"Not enough permissions for the device?",
udev->config[0].bConfigurationValue, ret);
return NULL;
}
ret = usb_claim_interface(dev, vsllink_usb_interface);
- if (ret != 0)
- {
+ if (ret != 0) {
LOG_ERROR("fail to claim interface %d, %d returned",
vsllink_usb_interface, ret);
return NULL;
@@ -979,17 +938,16 @@ static void vsllink_usb_close(struct vsllink *vsllink)
{
int ret;
- ret = usb_release_interface(vsllink->usb_handle, vsllink_usb_interface);
- if (ret != 0)
- {
- LOG_ERROR("fail to release interface %d, %d returned", \
+ ret = usb_release_interface(vsllink->usb_handle,
+ vsllink_usb_interface);
+ if (ret != 0) {
+ LOG_ERROR("fail to release interface %d, %d returned",
vsllink_usb_interface, ret);
exit(-1);
}
ret = usb_close(vsllink->usb_handle);
- if (ret != 0)
- {
+ if (ret != 0) {
LOG_ERROR("fail to close usb, %d returned", ret);
exit(-1);
}
@@ -998,33 +956,27 @@ static void vsllink_usb_close(struct vsllink *vsllink)
}
/* Send a message and receive the reply. */
-static int vsllink_usb_message(struct vsllink *vsllink, int out_length, \
+static int vsllink_usb_message(struct vsllink *vsllink, int out_length,
int in_length)
{
int result;
result = vsllink_usb_write(vsllink, out_length);
- if (result == out_length)
- {
- if (in_length > 0)
- {
+ if (result == out_length) {
+ if (in_length > 0) {
result = vsllink_usb_read(vsllink);
if (result == in_length)
- {
return result;
- }
- else
- {
- LOG_ERROR("usb_bulk_read failed (requested=%d, result=%d)", \
+ else {
+ LOG_ERROR("usb_bulk_read failed "
+ "(requested=%d, result=%d)",
in_length, result);
return -1;
}
}
return 0;
- }
- else
- {
- LOG_ERROR("usb_bulk_write failed (requested=%d, result=%d)", \
+ } else {
+ LOG_ERROR("usb_bulk_write failed (requested=%d, result=%d)",
out_length, result);
return -1;
}
@@ -1035,17 +987,17 @@ static int vsllink_usb_write(struct vsllink *vsllink, int out_length)
{
int result;
- if (out_length > vsllink_buffer_size)
- {
- LOG_ERROR("vsllink_write illegal out_length=%d (max=%d)", \
+ if (out_length > vsllink_buffer_size) {
+ LOG_ERROR("vsllink_write illegal out_length=%d (max=%d)",
out_length, vsllink_buffer_size);
return -1;
}
- result = usb_bulk_write(vsllink->usb_handle, vsllink_usb_bulkout, \
- (char *)vsllink_usb_out_buffer, out_length, VSLLINK_USB_TIMEOUT);
+ result = usb_bulk_write(vsllink->usb_handle, vsllink_usb_bulkout,
+ (char *)vsllink_usb_out_buffer, out_length,
+ VSLLINK_USB_TIMEOUT);
- DEBUG_JTAG_IO("vsllink_usb_write, out_length = %d, result = %d", \
+ DEBUG_JTAG_IO("vsllink_usb_write, out_length = %d, result = %d",
out_length, result);
#ifdef _DEBUG_USB_COMMS_
@@ -1063,8 +1015,8 @@ static int vsllink_usb_write(struct vsllink *vsllink, int out_length)
/* Read data from USB into in_buffer. */
static int vsllink_usb_read(struct vsllink *vsllink)
{
- int result = usb_bulk_read(vsllink->usb_handle, vsllink_usb_bulkin, \
- (char *)vsllink_usb_in_buffer, vsllink_buffer_size, \
+ int result = usb_bulk_read(vsllink->usb_handle, vsllink_usb_bulkin,
+ (char *)vsllink_usb_in_buffer, vsllink_buffer_size,
VSLLINK_USB_TIMEOUT);
DEBUG_JTAG_IO("vsllink_usb_read, result = %d", result);
@@ -1086,18 +1038,16 @@ static void vsllink_debug_buffer(uint8_t *buffer, int length)
int i;
int j;
- for (i = 0; i < length; i += BYTES_PER_LINE)
- {
+ for (i = 0; i < length; i += BYTES_PER_LINE) {
snprintf(line, 5, "%04x", i);
- for (j = i; j < i + BYTES_PER_LINE && j < length; j++)
- {
+ for (j = i; j < i + BYTES_PER_LINE && j < length; j++) {
snprintf(s, 4, " %02x", buffer[j]);
strcat(line, s);
}
LOG_DEBUG("%s", line);
}
}
-#endif // _DEBUG_USB_COMMS_ || _DEBUG_JTAG_IO_
+#endif /* _DEBUG_USB_COMMS_ || _DEBUG_JTAG_IO_ */
static const struct command_registration vsllink_command_handlers[] = {
{
commit db464f3cd4ed83b9f3411a98362dd67aad7bc3fd
Author: simon qian <sim...@gm...>
Date: Thu Mar 11 14:11:30 2010 -0800
New JTAG driver for Versaloon
This patch greatly simplifies the Versaloon driver:
- reducing the code size from more than 50K to less than 28K
- adding support for IR/DR scan with unlimited size
- using tap_get_tms_path and tap_get_tms_path_len.
Signed-off-by: David Brownell <dbr...@us...>
diff --git a/src/jtag/drivers/vsllink.c b/src/jtag/drivers/vsllink.c
index 65c3bf1..451d5f8 100644
--- a/src/jtag/drivers/vsllink.c
+++ b/src/jtag/drivers/vsllink.c
@@ -1,5 +1,5 @@
/***************************************************************************
- * Copyright (C) 2009 by Simon Qian <Sim...@Si...> *
+ * Copyright (C) 2009-2010 by Simon Qian <Sim...@Si...> *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
@@ -18,7 +18,7 @@
***************************************************************************/
/* Versaloon is a programming tool for multiple MCUs.
- * OpenOCD and MSP430 supports are distributed under GPLv2.
+ * It's distributed under GPLv3.
* You can find it at http://www.SimonQian.com/en/Versaloon.
*/
@@ -32,179 +32,85 @@
//#define _VSLLINK_IN_DEBUG_MODE_
-#define VSLLINK_MODE_NORMAL 0
-#define VSLLINK_MODE_DMA 1
-
static uint16_t vsllink_usb_vid;
static uint16_t vsllink_usb_pid;
-static uint8_t vsllink_usb_bulkout;
-static uint8_t vsllink_usb_bulkin;
-static uint8_t vsllink_usb_interface;
-static uint8_t vsllink_mode = VSLLINK_MODE_NORMAL;
-static int VSLLINK_USB_TIMEOUT = 10000;
+static uint8_t vsllink_usb_bulkout;
+static uint8_t vsllink_usb_bulkin;
+static uint8_t vsllink_usb_interface;
+static int VSLLINK_USB_TIMEOUT = 1000;
-static int VSLLINK_BufferSize = 1024;
+static int vsllink_tms_offset = 0;
/* Global USB buffers */
-static int vsllink_usb_out_buffer_idx;
-static int vsllink_usb_in_want_length;
-static uint8_t* vsllink_usb_in_buffer = NULL;
+static uint8_t* vsllink_usb_in_buffer = NULL;
static uint8_t* vsllink_usb_out_buffer = NULL;
+static int vsllink_buffer_size = 128;
-/* Constants for VSLLink command */
-#define VSLLINK_CMD_CONN 0x80
-#define VSLLINK_CMD_DISCONN 0x81
-#define VSLLINK_CMD_SET_SPEED 0x82
-#define VSLLINK_CMD_SET_PORT 0x90
-#define VSLLINK_CMD_GET_PORT 0x91
-#define VSLLINK_CMD_SET_PORTDIR 0x92
-#define VSLLINK_CMD_HW_JTAGSEQCMD 0xA0
-#define VSLLINK_CMD_HW_JTAGHLCMD 0xA1
-#define VSLLINK_CMD_HW_SWDCMD 0xA2
-#define VSLLINK_CMD_HW_JTAGRAWCMD 0xA3
-
-#define VSLLINK_CMDJTAGSEQ_TMSBYTE 0x00
-#define VSLLINK_CMDJTAGSEQ_TMSCLOCK 0x40
-#define VSLLINK_CMDJTAGSEQ_SCAN 0x80
-
-#define VSLLINK_CMDJTAGSEQ_CMDMSK 0xC0
-#define VSLLINK_CMDJTAGSEQ_LENMSK 0x3F
-
-#define JTAG_PINMSK_SRST (1 << 0)
-#define JTAG_PINMSK_TRST (1 << 1)
-#define JTAG_PINMSK_USR1 (1 << 2)
-#define JTAG_PINMSK_USR2 (1 << 3)
-#define JTAG_PINMSK_TCK (1 << 4)
-#define JTAG_PINMSK_TMS (1 << 5)
-#define JTAG_PINMSK_TDI (1 << 6)
-#define JTAG_PINMSK_TDO (1 << 7)
-
-
-#define VSLLINK_TAP_MOVE(from, to) VSLLINK_tap_move[tap_move_ndx(from)][tap_move_ndx(to)]
-
-/* VSLLINK_tap_move[i][j]: tap movement command to go from state i to state j
- * 0: Test-Logic-Reset
- * 1: Run-Test/Idle
- * 2: Shift-DR
- * 3: Pause-DR
- * 4: Shift-IR
- * 5: Pause-IR
- *
- * SD->SD and SI->SI have to be caught in interface specific code
- */
-static uint8_t VSLLINK_tap_move[6][6] =
-{
-/* TLR RTI SD PD SI PI */
- {0xff, 0x7f, 0x2f, 0x0a, 0x37, 0x16}, /* TLR */
- {0xff, 0x00, 0x45, 0x05, 0x4b, 0x0b}, /* RTI */
- {0xff, 0x61, 0x00, 0x01, 0x0f, 0x2f}, /* SD */
- {0xfe, 0x60, 0x40, 0x5c, 0x3c, 0x5e}, /* PD */
- {0xff, 0x61, 0x07, 0x17, 0x00, 0x01}, /* SI */
- {0xfe, 0x60, 0x38, 0x5c, 0x40, 0x5e} /* PI */
-};
-
-struct insert_insignificant_operation {
- unsigned char insert_value;
- unsigned char insert_position;
-};
-
-static struct insert_insignificant_operation VSLLINK_TAP_MOVE_INSERT_INSIGNIFICANT[6][6] =
-{
-/* stuff offset */
- {/* TLR */
- {1, 0,}, /* TLR */
- {1, 0,}, /* RTI */
- {1, 0,}, /* SD */
- {1, 0,}, /* PD */
- {1, 0,}, /* SI */
- {1, 0,}}, /* PI */
- {/* RTI */
- {1, 0,}, /* TLR */
- {0, 0,}, /* RTI */
- {0, 4,}, /* SD */
- {0, 7,}, /* PD */
- {0, 5,}, /* SI */
- {0, 7,}}, /* PI */
- {/* SD */
- {0, 0,}, /* TLR */
- {0, 0,}, /* RTI */
- {0, 0,}, /* SD */
- {0, 0,}, /* PD */
- {0, 0,}, /* SI */
- {0, 0,}}, /* PI */
- {/* PD */
- {0, 0,}, /* TLR */
- {0, 0,}, /* RTI */
- {0, 0,}, /* SD */
- {0, 0,}, /* PD */
- {0, 0,}, /* SI */
- {0, 0,}}, /* PI */
- {/* SI */
- {0, 0,}, /* TLR */
- {0, 0,}, /* RTI */
- {0, 0,}, /* SD */
- {0, 0,}, /* PD */
- {0, 0,}, /* SI */
- {0, 0,}}, /* PI */
- {/* PI */
- {0, 0,}, /* TLR */
- {0, 0,}, /* RTI */
- {0, 0,}, /* SD */
- {0, 0,}, /* PD */
- {0, 0,}, /* SI */
- {0, 0,}}, /* PI */
-};
+/* Constants for Versaloon command */
+#define VERSALOON_GET_INFO 0x00
+#define VERSALOON_GET_TVCC 0x01
-static uint8_t VSLLINK_BIT_MSK[8] =
-{
- 0x00, 0x01, 0x03, 0x07, 0x0f, 0x1f, 0x3f, 0x7f
-};
+/* Constants for VSLLink command */
+#define VSLLINK_CMD_CONN 0x80
+#define VSLLINK_CMD_DISCONN 0x81
+#define VSLLINK_CMD_SET_SPEED 0x82
+#define VSLLINK_CMD_SET_PORT 0x90
+#define VSLLINK_CMD_GET_PORT 0x91
+#define VSLLINK_CMD_SET_PORTDIR 0x92
+#define VSLLINK_CMD_HW_JTAGSEQCMD 0xA0
+#define VSLLINK_CMD_HW_JTAGHLCMD 0xA1
+#define VSLLINK_CMD_HW_SWDCMD 0xA2
+#define VSLLINK_CMD_HW_JTAGRAWCMD 0xA3
+
+#define VSLLINK_CMDJTAGSEQ_TMSBYTE 0x00
+#define VSLLINK_CMDJTAGSEQ_TMSCLOCK 0x40
+#define VSLLINK_CMDJTAGSEQ_SCAN 0x80
+
+#define VSLLINK_CMDJTAGSEQ_CMDMSK 0xC0
+#define VSLLINK_CMDJTAGSEQ_LENMSK 0x3F
+
+#define JTAG_PINMSK_SRST (1 << 0)
+#define JTAG_PINMSK_TRST (1 << 1)
+#define JTAG_PINMSK_USR1 (1 << 2)
+#define JTAG_PINMSK_USR2 (1 << 3)
+#define JTAG_PINMSK_TCK (1 << 4)
+#define JTAG_PINMSK_TMS (1 << 5)
+#define JTAG_PINMSK_TDI (1 << 6)
+#define JTAG_PINMSK_TDO (1 << 7)
struct pending_scan_result {
- int offset;
+ int src_offset;
+ int dest_offset;
int length; /* Number of bits to read */
struct scan_command *command; /* Corresponding scan command */
uint8_t *buffer;
+ bool last; /* indicate the last scan pending */
};
#define MAX_PENDING_SCAN_RESULTS 256
static int pending_scan_results_length;
-static struct pending_scan_result pending_scan_results_buffer[MAX_PENDING_SCAN_RESULTS];
+static struct pending_scan_result \
+ pending_scan_results_buffer[MAX_PENDING_SCAN_RESULTS];
/* Queue command functions */
static void vsllink_end_state(tap_state_t state);
-static void vsllink_state_move_dma(void);
-static void vsllink_state_move_normal(void);
-static void (*vsllink_state_move)(void);
-static void vsllink_path_move_dma(int num_states, tap_state_t *path);
-static void vsllink_path_move_normal(int num_states, tap_state_t *path);
-static void (*vsllink_path_move)(int num_states, tap_state_t *path);
+static void vsllink_state_move(void);
+static void vsllink_path_move(int num_states, tap_state_t *path);
static void vsllink_runtest(int num_cycles);
-static void vsllink_stableclocks_dma(int num_cycles, int tms);
-static void vsllink_stableclocks_normal(int num_cycles, int tms);
-static void (*vsllink_stableclocks)(int num_cycles, int tms);
-static void vsllink_scan_dma(bool ir_scan, enum scan_type type, uint8_t *buffer, int scan_size, struct scan_command *command);
-static void vsllink_scan_normal(bool ir_scan, enum scan_type type, uint8_t *buffer, int scan_size, struct scan_command *command);
-static void (*vsllink_scan)(bool ir_scan, enum scan_type type, uint8_t *buffer, int scan_size, struct scan_command *command);
+static void vsllink_stableclocks(int num_cycles, int tms);
+static void vsllink_scan(bool ir_scan, enum scan_type type, uint8_t *buffer, \
+ int scan_size, struct scan_command *command);
static void vsllink_reset(int trst, int srst);
static void vsllink_simple_command(uint8_t command);
-static int vsllink_connect(void);
-static int vsllink_disconnect(void);
/* VSLLink tap buffer functions */
static void vsllink_tap_append_step(int tms, int tdi);
-static void vsllink_tap_init_dma(void);
-static void vsllink_tap_init_normal(void);
-static void (*vsllink_tap_init)(void);
-static int vsllink_tap_execute_dma(void);
-static int vsllink_tap_execute_normal(void);
-static int (*vsllink_tap_execute)(void);
-static void vsllink_tap_ensure_space_dma(int scans, int length);
-static void vsllink_tap_ensure_space_normal(int scans, int length);
-static void (*vsllink_tap_ensure_space)(int scans, int length);
-static void vsllink_tap_append_scan_dma(int length, uint8_t *buffer, struct scan_command *command);
-static void vsllink_tap_append_scan_normal(int length, uint8_t *buffer, struct scan_command *command, int offset);
+static void vsllink_tap_init(void);
+static int vsllink_tap_execute(void);
+static void vsllink_tap_ensure_pending(int scans);
+static void vsllink_tap_append_scan(int length, uint8_t *buffer, \
+ struct scan_command *command);
/* VSLLink lowlevel functions */
struct vsllink {
@@ -213,7 +119,8 @@ struct vsllink {
static struct vsllink *vsllink_usb_open(void);
static void vsllink_usb_close(struct vsllink *vsllink);
-static int vsllink_usb_message(struct vsllink *vsllink, int out_length, int in_length);
+static int vsllink_usb_message(struct vsllink *vsllink, int out_length, \
+ int in_length);
static int vsllink_usb_write(struct vsllink *vsllink, int out_length);
static int vsllink_usb_read(struct vsllink *vsllink);
@@ -221,29 +128,17 @@ static int vsllink_usb_read(struct vsllink *vsllink);
static void vsllink_debug_buffer(uint8_t *buffer, int length);
#endif
-static int vsllink_tms_data_len = 0;
-static uint8_t* vsllink_tms_cmd_pos;
-
static int tap_length = 0;
static int tap_buffer_size = 0;
static uint8_t *tms_buffer = NULL;
static uint8_t *tdi_buffer = NULL;
static uint8_t *tdo_buffer = NULL;
-static int last_tms;
static struct vsllink* vsllink_handle = NULL;
static void reset_command_pointer(void)
{
- if (vsllink_mode == VSLLINK_MODE_NORMAL)
- {
- vsllink_usb_out_buffer[0] = VSLLINK_CMD_HW_JTAGSEQCMD;
- vsllink_usb_out_buffer_idx = 3;
- }
- else
- {
- tap_length = 0;
- }
+ tap_length = 0;
}
static int vsllink_execute_queue(void)
@@ -253,7 +148,9 @@ static int vsllink_execute_queue(void)
enum scan_type type;
uint8_t *buffer;
- DEBUG_JTAG_IO("--------------------------------- vsllink -------------------------------------");
+ DEBUG_JTAG_IO( "-------------------------------------"
+ " vsllink "
+ "-------------------------------------");
reset_command_pointer();
while (cmd != NULL)
@@ -261,15 +158,17 @@ static int vsllink_execute_queue(void)
switch (cmd->type)
{
case JTAG_RUNTEST:
- DEBUG_JTAG_IO("runtest %i cycles, end in %s", cmd->cmd.runtest->num_cycles, \
- tap_state_name(cmd->cmd.runtest->end_state));
+ DEBUG_JTAG_IO("runtest %i cycles, end in %s", \
+ cmd->cmd.runtest->num_cycles, \
+ tap_state_name(cmd->cmd.runtest->end_state));
vsllink_end_state(cmd->cmd.runtest->end_state);
vsllink_runtest(cmd->cmd.runtest->num_cycles);
break;
case JTAG_STATEMOVE:
- DEBUG_JTAG_IO("statemove end in %s", tap_state_name(cmd->cmd.statemove->end_state));
+ DEBUG_JTAG_IO("statemove end in %s", \
+ tap_state_name(cmd->cmd.statemove->end_state));
vsllink_end_state(cmd->cmd.statemove->end_state);
vsllink_state_move();
@@ -280,7 +179,8 @@ static int vsllink_execute_queue(void)
cmd->cmd.pathmove->num_states, \
tap_state_name(cmd->cmd.pathmove->path[cmd->cmd.pathmove->num_states - 1]));
- vsllink_path_move(cmd->cmd.pathmove->num_states, cmd->cmd.pathmove->path);
+ vsllink_path_move(cmd->cmd.pathmove->num_states, \
+ cmd->cmd.pathmove->path);
break;
case JTAG_SCAN:
@@ -289,24 +189,31 @@ static int vsllink_execute_queue(void)
scan_size = jtag_build_buffer(cmd->cmd.scan, &buffer);
if (cmd->cmd.scan->ir_scan)
{
- DEBUG_JTAG_IO("JTAG Scan write IR(%d bits), end in %s:", scan_size, tap_state_name(cmd->cmd.scan->end_state));
+ DEBUG_JTAG_IO("JTAG Scan write IR(%d bits), end in %s:", \
+ scan_size, \
+ tap_state_name(cmd->cmd.scan->end_state));
}
else
{
- DEBUG_JTAG_IO("JTAG Scan write DR(%d bits), end in %s:", scan_size, tap_state_name(cmd->cmd.scan->end_state));
+ DEBUG_JTAG_IO("JTAG Scan write DR(%d bits), end in %s:", \
+ scan_size, \
+ tap_state_name(cmd->cmd.scan->end_state));
}
#ifdef _DEBUG_JTAG_IO_
- vsllink_debug_buffer(buffer, (scan_size + 7) >> 3);
+ vsllink_debug_buffer(buffer, DIV_ROUND_UP(scan_size, 8));
#endif
type = jtag_scan_type(cmd->cmd.scan);
- vsllink_scan(cmd->cmd.scan->ir_scan, type, buffer, scan_size, cmd->cmd.scan);
+ vsllink_scan(cmd->cmd.scan->ir_scan, type, buffer, \
+ scan_size, cmd->cmd.scan);
break;
case JTAG_RESET:
- DEBUG_JTAG_IO("reset trst: %i srst %i", cmd->cmd.reset->trst, cmd->cmd.reset->srst);
+ DEBUG_JTAG_IO("reset trst: %i srst %i", \
+ cmd->cmd.reset->trst, \
+ cmd->cmd.reset->srst);
vsllink_tap_execute();
@@ -324,7 +231,8 @@ static int vsllink_execute_queue(void)
break;
case JTAG_STABLECLOCKS:
- DEBUG_JTAG_IO("add %d clocks", cmd->cmd.stableclocks->num_cycles);
+ DEBUG_JTAG_IO("add %d clocks", \
+ cmd->cmd.stableclocks->num_cycles);
switch (tap_get_state())
{
case TAP_RESET:
@@ -340,15 +248,17 @@ static int vsllink_execute_queue(void)
scan_size = 0;
break; /* above stable states are OK */
default:
- LOG_ERROR("jtag_add_clocks() was called with TAP in non-stable state \"%s\"",
- tap_state_name(tap_get_state()));
+ LOG_ERROR("jtag_add_clocks() in non-stable state \"%s\"",
+ tap_state_name(tap_get_state()));
exit(-1);
}
- vsllink_stableclocks(cmd->cmd.stableclocks->num_cycles, scan_size);
+ vsllink_stableclocks(cmd->cmd.stableclocks->num_cycles, \
+ scan_size);
break;
default:
- LOG_ERROR("BUG: unknown JTAG command type encountered: %d", cmd->type);
+ LOG_ERROR("BUG: unknown JTAG command type encountered: %d", \
+ cmd->type);
exit(-1);
}
cmd = cmd->next;
@@ -400,8 +310,8 @@ static int vsllink_init(void)
int result;
char version_str[100];
- vsllink_usb_in_buffer = malloc(VSLLINK_BufferSize);
- vsllink_usb_out_buffer = malloc(VSLLINK_BufferSize);
+ vsllink_usb_in_buffer = malloc(vsllink_buffer_size);
+ vsllink_usb_out_buffer = malloc(vsllink_buffer_size);
if ((vsllink_usb_in_buffer == NULL) || (vsllink_usb_out_buffer == NULL))
{
LOG_ERROR("Not enough memory");
@@ -409,10 +319,10 @@ static int vsllink_init(void)
}
vsllink_handle = vsllink_usb_open();
-
if (vsllink_handle == 0)
{
- LOG_ERROR("Can't find USB JTAG Interface! Please check connection and permissions.");
+ LOG_ERROR("Can't find USB JTAG Interface!"\
+ "Please check connection and permissions.");
return ERROR_JTAG_INIT_FAILED;
}
LOG_DEBUG("vsllink found on %04X:%04X", vsllink_usb_vid, vsllink_usb_pid);
@@ -422,14 +332,16 @@ static int vsllink_init(void)
check_cnt = 0;
while (check_cnt < 5)
{
- vsllink_simple_command(0x00);
+ vsllink_simple_command(VERSALOON_GET_INFO);
result = vsllink_usb_read(vsllink_handle);
if (result > 2)
{
vsllink_usb_in_buffer[result] = 0;
- VSLLINK_BufferSize = vsllink_usb_in_buffer[0] + (vsllink_usb_in_buffer[1] << 8);
- strncpy(version_str, (char *)vsllink_usb_in_buffer + 2, sizeof(version_str));
+ vsllink_buffer_size = vsllink_usb_in_buffer[0] + \
+ (vsllink_usb_in_buffer[1] << 8);
+ strncpy(version_str, (char *)vsllink_usb_in_buffer + 2, \
+ sizeof(version_str));
LOG_INFO("%s", version_str);
// free the pre-alloc memroy
@@ -439,29 +351,29 @@ static int vsllink_init(void)
vsllink_usb_out_buffer = NULL;
// alloc new memory
- vsllink_usb_in_buffer = malloc(VSLLINK_BufferSize);
- vsllink_usb_out_buffer = malloc(VSLLINK_BufferSize);
- if ((vsllink_usb_in_buffer == NULL) || (vsllink_usb_out_buffer == NULL))
+ vsllink_usb_in_buffer = malloc(vsllink_buffer_size);
+ vsllink_usb_out_buffer = malloc(vsllink_buffer_size);
+ if ((vsllink_usb_in_buffer == NULL) || \
+ (vsllink_usb_out_buffer == NULL))
{
LOG_ERROR("Not enough memory");
exit(-1);
}
else
{
- LOG_INFO("buffer size for USB is %d bytes", VSLLINK_BufferSize);
+ LOG_INFO("buffer size for USB is %d bytes", \
+ vsllink_buffer_size);
}
- // alloc memory for dma mode
- if (vsllink_mode == VSLLINK_MODE_DMA)
+ // alloc tms/tdi/tdo buffer
+ tap_buffer_size = (vsllink_buffer_size - 3) / 2;
+ tms_buffer = (uint8_t*)malloc(tap_buffer_size);
+ tdi_buffer = (uint8_t*)malloc(tap_buffer_size);
+ tdo_buffer = (uint8_t*)malloc(tap_buffer_size);
+ if ((tms_buffer == NULL) || (tdi_buffer == NULL) || \
+ (tdo_buffer == NULL))
{
- tap_buffer_size = (VSLLINK_BufferSize - 3) / 2;
- tms_buffer = (uint8_t*)malloc(tap_buffer_size);
- tdi_buffer = (uint8_t*)malloc(tap_buffer_size);
- tdo_buffer = (uint8_t*)malloc(tap_buffer_size);
- if ((tms_buffer == NULL) || (tdi_buffer == NULL) || (tdo_buffer == NULL))
- {
- LOG_ERROR("Not enough memory");
- exit(-1);
- }
+ LOG_ERROR("Not enough memory");
+ exit(-1);
}
break;
}
@@ -470,7 +382,7 @@ static int vsllink_init(void)
}
if (check_cnt == 3)
{
- // It's dangerout to proced
+ // Fail to access Versaloon
LOG_ERROR("VSLLink initial failed");
exit(-1);
}
@@ -479,49 +391,33 @@ static int vsllink_init(void)
/* Some older firmware versions sometimes fail if the
* voltage isn't read first.
*/
- vsllink_simple_command(0x01);
+ vsllink_simple_command(VERSALOON_GET_TVCC);
result = vsllink_usb_read(vsllink_handle);
if (result != 2)
- LOG_WARNING("Fail to get target voltage");
- else
- LOG_INFO("Target runs at %d mV", vsllink_usb_in_buffer[0]
- + (vsllink_usb_in_buffer[1] << 8));
-
- // connect to vsllink
- vsllink_connect();
- // initialize function pointers
- if (vsllink_mode == VSLLINK_MODE_NORMAL)
{
- // normal mode
- vsllink_state_move = vsllink_state_move_normal;
- vsllink_path_move = vsllink_path_move_normal;
- vsllink_stableclocks = vsllink_stableclocks_normal;
- vsllink_scan = vsllink_scan_normal;
-
- vsllink_tap_init = vsllink_tap_init_normal;
- vsllink_tap_execute = vsllink_tap_execute_normal;
- vsllink_tap_ensure_space = vsllink_tap_ensure_space_normal;
-
- LOG_INFO("vsllink run in NORMAL mode");
+ LOG_WARNING("Fail to get target voltage");
}
else
{
- // dma mode
- vsllink_state_move = vsllink_state_move_dma;
- vsllink_path_move = vsllink_path_move_dma;
- vsllink_stableclocks = vsllink_stableclocks_dma;
- vsllink_scan = vsllink_scan_dma;
-
- vsllink_tap_init = vsllink_tap_init_dma;
- vsllink_tap_execute = vsllink_tap_execute_dma;
- vsllink_tap_ensure_space = vsllink_tap_ensure_space_dma;
+ LOG_INFO("Target runs at %d mV", vsllink_usb_in_buffer[0] + \
+ (vsllink_usb_in_buffer[1] << 8));
+ }
- LOG_INFO("vsllink run in DMA mode");
+ // connect to vsllink
+ vsllink_usb_out_buffer[0] = VSLLINK_CMD_CONN;
+ vsllink_usb_out_buffer[1] = 1;
+ vsllink_usb_message(vsllink_handle, 2, 0);
+ if (vsllink_usb_read(vsllink_handle) > 2)
+ {
+ strncpy(version_str, (char *)vsllink_usb_in_buffer + 2, \
+ sizeof(version_str));
+ LOG_INFO("%s", version_str);
}
// Set SRST and TRST to output, Set USR1 and USR2 to input
vsllink_usb_out_buffer[0] = VSLLINK_CMD_SET_PORTDIR;
- vsllink_usb_out_buffer[1] = JTAG_PINMSK_SRST | JTAG_PINMSK_TRST | JTAG_PINMSK_USR1 | JTAG_PINMSK_USR2;
+ vsllink_usb_out_buffer[1] = JTAG_PINMSK_SRST | JTAG_PINMSK_TRST | \
+ JTAG_PINMSK_USR1 | JTAG_PINMSK_USR2;
vsllink_usb_out_buffer[2] = JTAG_PINMSK_SRST | JTAG_PINMSK_TRST;
if (vsllink_usb_write(vsllink_handle, 3) != 3)
{
@@ -531,7 +427,7 @@ static int vsllink_init(void)
vsllink_reset(0, 0);
- LOG_INFO("VSLLink JTAG Interface ready");
+ LOG_INFO("VSLLink Interface ready");
vsllink_tap_init();
@@ -544,7 +440,8 @@ static int vsllink_quit(void)
{
// Set all pins to input
vsllink_usb_out_buffer[0] = VSLLINK_CMD_SET_PORTDIR;
- vsllink_usb_out_buffer[1] = JTAG_PINMSK_SRST | JTAG_PINMSK_TRST | JTAG_PINMSK_USR1 | JTAG_PINMSK_USR2;
+ vsllink_usb_out_buffer[1] = JTAG_PINMSK_SRST | JTAG_PINMSK_TRST | \
+ JTAG_PINMSK_USR1 | JTAG_PINMSK_USR2;
vsllink_usb_out_buffer[2] = 0;
if (vsllink_usb_write(vsllink_handle, 3) != 3)
{
@@ -553,7 +450,7 @@ static int vsllink_quit(void)
}
// disconnect
- vsllink_disconnect();
+ vsllink_simple_command(VSLLINK_CMD_DISCONN);
vsllink_usb_close(vsllink_handle);
vsllink_handle = NULL;
}
@@ -574,61 +471,6 @@ static int vsllink_quit(void)
/***************************************************************************/
/* Queue command implementations */
-static int vsllink_disconnect(void)
-{
- vsllink_simple_command(VSLLINK_CMD_DISCONN);
- return ERROR_OK;
-}
-
-static int vsllink_connect(void)
-{
- char vsllink_str[100];
-
- vsllink_usb_out_buffer[0] = VSLLINK_CMD_CONN;
- vsllink_usb_out_buffer[1] = vsllink_mode;
- vsllink_usb_message(vsllink_handle, 2, 0);
- if (vsllink_usb_read(vsllink_handle) > 2)
- {
- strncpy(vsllink_str, (char *)vsllink_usb_in_buffer + 2, sizeof(vsllink_str));
- LOG_INFO("%s", vsllink_str);
- }
-
- return ERROR_OK;
-}
-
-// when vsllink_tms_data_len > 0, vsllink_usb_out_buffer[vsllink_usb_out_buffer_idx] is the byte that need to be appended.
-// length of VSLLINK_CMDJTAGSEQ_TMSBYTE has been set, no need to set it here.
-static void vsllink_append_tms(void)
-{
- uint8_t tms_scan = VSLLINK_TAP_MOVE(tap_get_state(), tap_get_end_state());
- uint16_t tms2;
- struct insert_insignificant_operation *insert = \
- &VSLLINK_TAP_MOVE_INSERT_INSIGNIFICANT[tap_move_ndx(tap_get_state())][tap_move_ndx(tap_get_end_state())];
-
- if (((tap_get_state() != TAP_RESET) && (tap_get_state() != TAP_IDLE) && (tap_get_state() != TAP_DRPAUSE) && (tap_get_state() != TAP_IRPAUSE)) || \
- (vsllink_tms_data_len <= 0) || (vsllink_tms_data_len >= 8) || \
- (vsllink_tms_cmd_pos == NULL))
- {
- LOG_ERROR("There MUST be some bugs in the driver");
- exit(-1);
- }
-
- tms2 = (tms_scan & VSLLINK_BIT_MSK[insert->insert_position]) << \
- vsllink_tms_data_len;
- if (insert->insert_value == 1)
- {
- tms2 |= VSLLINK_BIT_MSK[8 - vsllink_tms_data_len] << \
- (vsllink_tms_data_len + insert->insert_position);
- }
- tms2 |= (tms_scan >> insert->insert_position) << \
- (8 + insert->insert_position);
-
- vsllink_usb_out_buffer[vsllink_usb_out_buffer_idx++] |= (tms2 >> 0) & 0xff;
- vsllink_usb_out_buffer[vsllink_usb_out_buffer_idx++] = (tms2 >> 8) & 0xff;
-
- vsllink_tms_data_len = 0;
- vsllink_tms_cmd_pos = NULL;
-}
static void vsllink_end_state(tap_state_t state)
{
@@ -644,482 +486,53 @@ static void vsllink_end_state(tap_state_t state)
}
/* Goes to the end state. */
-static void vsllink_state_move_normal(void)
+static void vsllink_state_move(void)
{
- if (vsllink_tms_data_len > 0)
- {
- vsllink_append_tms();
- }
- else
- {
- vsllink_tap_ensure_space(0, 2);
-
- vsllink_usb_out_buffer[vsllink_usb_out_buffer_idx++] = VSLLINK_CMDJTAGSEQ_TMSBYTE;
- vsllink_usb_out_buffer[vsllink_usb_out_buffer_idx++] = VSLLINK_TAP_MOVE(tap_get_state(), tap_get_end_state());
- }
-
- tap_set_state(tap_get_end_state());
-}
-static void vsllink_state_move_dma(void)
-{
- int i, insert_length = (tap_length % 8) ? (8 - (tap_length % 8)) : 0;
- struct insert_insignificant_operation *insert = \
- &VSLLINK_TAP_MOVE_INSERT_INSIGNIFICANT[tap_move_ndx(tap_get_state())][tap_move_ndx(tap_get_end_state())];
- uint8_t tms_scan = VSLLINK_TAP_MOVE(tap_get_state(), tap_get_end_state());
-
- if (tap_get_state() == TAP_RESET)
- {
- vsllink_tap_ensure_space(0, 8);
-
- for (i = 0; i < 8; i++)
- {
- vsllink_tap_append_step(1, 0);
- }
- }
-
- if (insert_length > 0)
- {
- vsllink_tap_ensure_space(0, 16);
+ int i;
+ uint8_t tms_scan = tap_get_tms_path(tap_get_state(), tap_get_end_state());
+ uint8_t tms_scan_bits = \
+ tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
- for (i = 0; i < insert->insert_position; i++)
- {
- vsllink_tap_append_step((tms_scan >> i) & 1, 0);
- }
- for (i = 0; i < insert_length; i++)
- {
- vsllink_tap_append_step(insert->insert_value, 0);
- }
- for (i = insert->insert_position; i < 8; i++)
- {
- vsllink_tap_append_step((tms_scan >> i) & 1, 0);
- }
- }
- else
+ for (i = 0; i < tms_scan_bits; i++)
{
- vsllink_tap_ensure_space(0, 8);
-
- for (i = 0; i < 8; i++)
- {
- vsllink_tap_append_step((tms_scan >> i) & 1, 0);
- }
+ vsllink_tap_append_step((tms_scan >> i) & 1, 0);
}
tap_set_state(tap_get_end_state());
}
-// write tms from current vsllink_usb_out_buffer[vsllink_usb_out_buffer_idx]
-static void vsllink_add_path(int start, int num, tap_state_t *path)
+static void vsllink_path_move(int num_states, tap_state_t *path)
{
- int i;
-
- for (i = start; i < (start + num); i++)
+ for (int i = 0; i < num_states; i++)
{
- if ((i & 7) == 0)
- {
- if (i > 0)
- {
- vsllink_usb_out_buffer_idx++;
- }
- vsllink_usb_out_buffer[vsllink_usb_out_buffer_idx] = 0;
- }
-
- if (path[i - start] == tap_state_transition(tap_get_state(), true))
+ if (path[i] == tap_state_transition(tap_get_state(), false))
{
- vsllink_usb_out_buffer[vsllink_usb_out_buffer_idx] |= 1 << (i & 7);
+ vsllink_tap_append_step(0, 0);
}
- else if (path[i - start] == tap_state_transition(tap_get_state(), false))
+ else if (path[i] == tap_state_transition(tap_get_state(), true))
{
- // nothing to do
+ vsllink_tap_append_step(1, 0);
}
else
{
- LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_name(tap_get_state()), tap_state_name(path[i]));
+ LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", \
+ tap_state_name(tap_get_state()), \
+ tap_state_name(path[i]));
exit(-1);
}
- tap_set_state(path[i - start]);
- }
- if ((i > 0) && ((i & 7) == 0))
- {
- ...
[truncated message content] |
|
From: David B. <dbr...@us...> - 2010-03-11 21:11:11
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 24e1e3dd2699b817fa72a7843d36197abcd9e3a3 (commit)
from 591e0bbab957e86c8b2c6e19420a8cd9f89993cd (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 24e1e3dd2699b817fa72a7843d36197abcd9e3a3
Author: Michal Demin <mic...@gm...>
Date: Mon Mar 8 13:45:14 2010 +0100
Add support for Bus Pirate as a JTAG adapter.
This includes a driver and matching config file. This support needs to be
enabled through the initial "configure" (use "--enable-buspirate").
Signed-off-by: Michal Demin <mic...@gm...>
Signed-off-by: David Brownell <dbr...@us...>
diff --git a/NEWS b/NEWS
index 4fef5b2..77435e1 100644
--- a/NEWS
+++ b/NEWS
@@ -4,6 +4,7 @@ history for details about what changed, including bugfixes
and other issues not mentioned here.
JTAG Layer:
+ New driver for "Bus Pirate"
Boundary Scan:
diff --git a/configure.in b/configure.in
index 3b0a06d..d93b21a 100644
--- a/configure.in
+++ b/configure.in
@@ -474,6 +474,10 @@ AC_ARG_ENABLE(arm-jtag-ew,
AS_HELP_STRING([--enable-arm-jtag-ew], [Enable building support for the Olimex ARM-JTAG-EW Programmer]),
[build_armjtagew=$enableval], [build_armjtagew=no])
+AC_ARG_ENABLE(buspirate,
+ AS_HELP_STRING([--enable-buspirate], [Enable building support for the Buspirate]),
+ [build_buspirate=$enableval], [build_buspirate=no])
+
AC_ARG_ENABLE(minidriver_dummy,
AS_HELP_STRING([--enable-minidriver-dummy], [Enable the dummy minidriver.]),
[build_minidriver_dummy=$enableval], [build_minidriver_dummy=no])
@@ -741,6 +745,12 @@ else
AC_DEFINE(BUILD_ARMJTAGEW, 0, [0 if you don't want the ARM-JTAG-EW JTAG driver.])
fi
+if test $build_buspirate = yes; then
+ AC_DEFINE(BUILD_BUSPIRATE, 1, [1 if you want the Buspirate JTAG driver.])
+else
+ AC_DEFINE(BUILD_BUSPIRATE, 0, [0 if you don't want the Buspirate JTAG driver.])
+fi
+
#-- Deal with MingW/Cygwin FTD2XX issues
if test $is_win32 = yes; then
@@ -1035,6 +1045,7 @@ AM_CONDITIONAL(JLINK, test $build_jlink = yes)
AM_CONDITIONAL(VSLLINK, test $build_vsllink = yes)
AM_CONDITIONAL(RLINK, test $build_rlink = yes)
AM_CONDITIONAL(ARMJTAGEW, test $build_armjtagew = yes)
+AM_CONDITIONAL(BUSPIRATE, test $build_buspirate = yes)
AM_CONDITIONAL(USB, test $build_usb = yes)
AM_CONDITIONAL(IS_CYGWIN, test $is_cygwin = yes)
AM_CONDITIONAL(IS_MINGW, test $is_mingw = yes)
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 33c442f..93757d4 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -432,6 +432,9 @@ Raisonance has an adapter called @b{RLink}. It exists in a stripped-down form o
@item @b{ARM-JTAG-EW}
@* Link: @url{http://www.olimex.com/dev/arm-jtag-ew.html}
+
+@item @b{Buspirate}
+@* Link: @url{http://dangerousprototypes.com/bus-pirate-manual/}
@end itemize
@section IBM PC Parallel Printer Port Based
diff --git a/src/jtag/drivers/Makefile.am b/src/jtag/drivers/Makefile.am
index d6113c6..0588126 100644
--- a/src/jtag/drivers/Makefile.am
+++ b/src/jtag/drivers/Makefile.am
@@ -64,6 +64,9 @@ endif
if ARMJTAGEW
DRIVERFILES += arm-jtag-ew.c
endif
+if BUSPIRATE
+DRIVERFILES += buspirate.c
+endif
noinst_HEADERS = \
bitbang.h \
diff --git a/src/jtag/drivers/buspirate.c b/src/jtag/drivers/buspirate.c
new file mode 100644
index 0000000..99210d2
--- /dev/null
+++ b/src/jtag/drivers/buspirate.c
@@ -0,0 +1,969 @@
+/***************************************************************************
+ * Copyright (C) 2010 by Michal Demin *
+ * based on usbprog.c and arm-jtag-ew.c *
+ * *
+ * This program is free software; you can redistribute it and/or modify *
+ * it under the terms of the GNU General Public License as published by *
+ * the Free Software Foundation; either version 2 of the License, or *
+ * (at your option) any later version. *
+ * *
+ * This program is distributed in the hope that it will be useful, *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
+ * GNU General Public License for more details. *
+ * *
+ * You should have received a copy of the GNU General Public License *
+ * along with this program; if not, write to the *
+ * Free Software Foundation, Inc., *
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
+ ***************************************************************************/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <jtag/interface.h>
+#include <jtag/commands.h>
+
+#include <termios.h>
+#include <fcntl.h>
+#include <sys/ioctl.h>
+
+#undef DEBUG_SERIAL
+/*#define DEBUG_SERIAL */
+static int buspirate_execute_queue(void);
+static int buspirate_speed(int speed);
+static int buspirate_khz(int khz, int *jtag_speed);
+static int buspirate_init(void);
+static int buspirate_quit(void);
+
+static void buspirate_end_state(tap_state_t state);
+static void buspirate_state_move(void);
+static void buspirate_path_move(int num_states, tap_state_t *path);
+static void buspirate_runtest(int num_cycles);
+static void buspirate_scan(bool ir_scan, enum scan_type type,
+ uint8_t *buffer, int scan_size, struct scan_command *command);
+
+
+#define CMD_UNKOWN 0x00
+#define CMD_PORT_MODE 0x01
+#define CMD_FEATURE 0x02
+#define CMD_READ_ADCS 0x03
+/*#define CMD_TAP_SHIFT 0x04 // old protocol */
+#define CMD_TAP_SHIFT 0x05
+#define CMD_ENTER_OOCD 0x06
+#define CMD_UART_SPEED 0x07
+#define CMD_JTAG_SPEED 0x08
+
+enum {
+ MODE_HIZ = 0,
+ MODE_JTAG = 1, /* push-pull outputs */
+ MODE_JTAG_OD = 2, /* open-drain outputs */
+};
+
+enum {
+ FEATURE_LED = 0x01,
+ FEATURE_VREG = 0x02,
+ FEATURE_TRST = 0x04,
+ FEATURE_SRST = 0x08,
+ FEATURE_PULLUP = 0x10
+};
+
+enum {
+ ACTION_DISABLE = 0,
+ ACTION_ENABLE = 1
+};
+
+enum {
+ SERIAL_NORMAL = 0,
+ SERIAL_FAST = 1
+};
+
+
+static int buspirate_fd = -1;
+static int buspirate_pinmode = MODE_JTAG_OD;
+static int buspirate_baudrate = SERIAL_NORMAL;
+static int buspirate_vreg;
+static int buspirate_pullup;
+static char *buspirate_port;
+
+
+/* TAP interface */
+static void buspirate_tap_init(void);
+static int buspirate_tap_execute(void);
+static void buspirate_tap_append(int tms, int tdi);
+static void buspirate_tap_append_scan(int length, uint8_t *buffer,
+ struct scan_command *command);
+static void buspirate_tap_make_space(int scan, int bits);
+
+static void buspirate_reset(int trst, int srst);
+
+/* low level interface */
+static void buspirate_jtag_reset(int);
+static void buspirate_jtag_enable(int);
+static unsigned char buspirate_jtag_command(int, char *, int);
+static void buspirate_jtag_set_speed(int, char);
+static void buspirate_jtag_set_mode(int, char);
+static void buspirate_jtag_set_feature(int, char, char);
+static void buspirate_jtag_get_adcs(int);
+
+/* low level HW communication interface */
+static int buspirate_serial_setspeed(int fd, speed_t speed);
+static int buspirate_serial_write(int fd, char *buf, int size);
+static int buspirate_serial_read(int fd, char *buf, int size);
+static void buspirate_print_buffer(char *buf, int size);
+
+static int buspirate_speed(int speed)
+{
+ /* TODO */
+ LOG_INFO("Want to set speed to %dkHz, but not implemented yet", speed);
+ return ERROR_OK;
+}
+
+static int buspirate_khz(int khz, int *jtag_speed)
+{
+ *jtag_speed = khz;
+ return ERROR_OK;
+}
+
+static int buspirate_execute_queue(void)
+{
+ /* currently processed command */
+ struct jtag_command *cmd = jtag_command_queue;
+ int scan_size;
+ enum scan_type type;
+ uint8_t *buffer;
+
+ while (cmd) {
+ switch (cmd->type) {
+ case JTAG_RUNTEST:
+ DEBUG_JTAG_IO("runtest %i cycles, end in %s",
+ cmd->cmd.runtest->num_cycles,
+ tap_state_name(cmd->cmd.runtest
+ ->end_state));
+ buspirate_end_state(cmd->cmd.runtest
+ ->end_state);
+ buspirate_runtest(cmd->cmd.runtest
+ ->num_cycles);
+ break;
+ case JTAG_STATEMOVE:
+ DEBUG_JTAG_IO("statemove end in %s",
+ tap_state_name(cmd->cmd.statemove
+ ->end_state));
+ buspirate_end_state(cmd->cmd.statemove
+ ->end_state);
+ buspirate_state_move();
+ break;
+ case JTAG_PATHMOVE:
+ DEBUG_JTAG_IO("pathmove: %i states, end in %s",
+ cmd->cmd.pathmove->num_states,
+ tap_state_name(cmd->cmd.pathmove
+ ->path[cmd->cmd.pathmove
+ ->num_states - 1]));
+ buspirate_path_move(cmd->cmd.pathmove
+ ->num_states,
+ cmd->cmd.pathmove->path);
+ break;
+ case JTAG_SCAN:
+ DEBUG_JTAG_IO("scan end in %s",
+ tap_state_name(cmd->cmd.scan
+ ->end_state));
+
+ buspirate_end_state(cmd->cmd.scan
+ ->end_state);
+
+ scan_size = jtag_build_buffer(cmd->cmd.scan,
+ &buffer);
+ type = jtag_scan_type(cmd->cmd.scan);
+ buspirate_scan(cmd->cmd.scan->ir_scan, type,
+ buffer, scan_size, cmd->cmd.scan);
+
+ break;
+ case JTAG_RESET:
+ DEBUG_JTAG_IO("reset trst: %i srst %i",
+ cmd->cmd.reset->trst, cmd->cmd.reset->srst);
+
+ /* flush buffers, so we can reset */
+ buspirate_tap_execute();
+
+ if (cmd->cmd.reset->trst == 1)
+ tap_set_state(TAP_RESET);
+ buspirate_reset(cmd->cmd.reset->trst,
+ cmd->cmd.reset->srst);
+ break;
+ case JTAG_SLEEP:
+ DEBUG_JTAG_IO("sleep %i", cmd->cmd.sleep->us);
+ buspirate_tap_execute();
+ jtag_sleep(cmd->cmd.sleep->us);
+ break;
+ default:
+ LOG_ERROR("BUG: unknown JTAG command type encountered");
+ exit(-1);
+ }
+
+ cmd = cmd->next;
+ }
+
+ return buspirate_tap_execute();
+}
+
+static int buspirate_init(void)
+{
+ if (buspirate_port == NULL) {
+ LOG_ERROR("You need to specify port !");
+ return ERROR_JTAG_INIT_FAILED;
+ }
+
+ buspirate_fd = open(buspirate_port, O_RDWR | O_NOCTTY);
+ if (buspirate_fd == -1) {
+ LOG_ERROR("Could not open serial port.");
+ return ERROR_JTAG_INIT_FAILED;
+ }
+
+ buspirate_serial_setspeed(buspirate_fd, B115200);
+
+ buspirate_jtag_enable(buspirate_fd);
+
+ if (buspirate_baudrate != SERIAL_NORMAL)
+ buspirate_jtag_set_speed(buspirate_fd, SERIAL_FAST);
+
+ LOG_INFO("Buspirate Interface ready!");
+
+ buspirate_tap_init();
+ buspirate_jtag_set_mode(buspirate_fd, buspirate_pinmode);
+ buspirate_jtag_set_feature(buspirate_fd, FEATURE_VREG,
+ (buspirate_vreg == 1) ? ACTION_ENABLE : ACTION_DISABLE);
+ buspirate_jtag_set_feature(buspirate_fd, FEATURE_PULLUP,
+ (buspirate_pullup == 1) ? ACTION_ENABLE : ACTION_DISABLE);
+ buspirate_reset(0, 0);
+
+ return ERROR_OK;
+}
+
+static int buspirate_quit(void)
+{
+ LOG_INFO("Shuting down buspirate ");
+ buspirate_jtag_set_mode(buspirate_fd, MODE_HIZ);
+
+ buspirate_jtag_set_speed(buspirate_fd, SERIAL_NORMAL);
+ buspirate_jtag_reset(buspirate_fd);
+ if (buspirate_port) {
+ free(buspirate_port);
+ buspirate_port = NULL;
+ }
+ return ERROR_OK;
+}
+
+/* openocd command interface */
+COMMAND_HANDLER(buspirate_handle_adc_command)
+{
+ if (CMD_ARGC != 0) {
+ LOG_ERROR("usage: buspirate_adc");
+ return ERROR_OK;
+ }
+
+ if (buspirate_fd == -1)
+ return ERROR_OK;
+
+ /* send the command */
+ buspirate_jtag_get_adcs(buspirate_fd);
+
+ return ERROR_OK;
+
+}
+
+COMMAND_HANDLER(buspirate_handle_vreg_command)
+{
+ if (CMD_ARGC != 1) {
+ LOG_ERROR("usage: buspirate_vreg <1|0>");
+ return ERROR_OK;
+ }
+
+ if (atoi(CMD_ARGV[0]) == 1)
+ buspirate_vreg = 1;
+ else
+ buspirate_vreg = 0;
+
+ return ERROR_OK;
+
+}
+
+COMMAND_HANDLER(buspirate_handle_pullup_command)
+{
+ if (CMD_ARGC != 1) {
+ LOG_ERROR("usage: buspirate_pullup <1|0>");
+ return ERROR_OK;
+ }
+
+ if (atoi(CMD_ARGV[0]) == 1)
+ buspirate_pullup = 1;
+ else
+ buspirate_pullup = 0;
+
+ return ERROR_OK;
+
+}
+
+COMMAND_HANDLER(buspirate_handle_led_command)
+{
+ if (CMD_ARGC != 1) {
+ LOG_ERROR("usage: buspirate_led <1|0>");
+ return ERROR_OK;
+ }
+
+ if (atoi(CMD_ARGV[0]) == 1) {
+ /* enable led */
+ buspirate_jtag_set_feature(buspirate_fd, FEATURE_LED,
+ ACTION_ENABLE);
+ } else {
+ /* disable led */
+ buspirate_jtag_set_feature(buspirate_fd, FEATURE_LED,
+ ACTION_DISABLE);
+ }
+
+ return ERROR_OK;
+
+}
+
+COMMAND_HANDLER(buspirate_handle_mode_command)
+{
+ if (CMD_ARGC != 1) {
+ LOG_ERROR("usage: buspirate_mode <normal|open-drain>");
+ return ERROR_OK;
+ }
+
+ if (CMD_ARGV[0][0] == 'n')
+ buspirate_pinmode = MODE_JTAG;
+ else if (CMD_ARGV[0][0] == 'o')
+ buspirate_pinmode = MODE_JTAG_OD;
+ else
+ LOG_ERROR("usage: buspirate_mode <normal|open-drain>");
+
+ return ERROR_OK;
+
+}
+
+COMMAND_HANDLER(buspirate_handle_speed_command)
+{
+ if (CMD_ARGC != 1) {
+ LOG_ERROR("usage: buspirate_speed <normal|fast>");
+ return ERROR_OK;
+ }
+
+ if (CMD_ARGV[0][0] == 'n')
+ buspirate_baudrate = SERIAL_NORMAL;
+ else if (CMD_ARGV[0][0] == 'f')
+ buspirate_baudrate = SERIAL_FAST;
+ else
+ LOG_ERROR("usage: buspirate_speed <normal|fast>");
+
+ return ERROR_OK;
+
+}
+
+COMMAND_HANDLER(buspirate_handle_port_command)
+{
+ if (CMD_ARGC != 1) {
+ LOG_ERROR("usage: buspirate_port /dev/ttyUSB0");
+ return ERROR_OK;
+ }
+
+ if (buspirate_port == 0)
+ buspirate_port = strdup(CMD_ARGV[0]);
+
+ return ERROR_OK;
+
+}
+
+static const struct command_registration buspirate_command_handlers[] = {
+ {
+ .name = "buspirate_adc",
+ .handler = &buspirate_handle_adc_command,
+ .mode = COMMAND_EXEC,
+ .help = "reads voltages on adc pins",
+ },
+ {
+ .name = "buspirate_vreg",
+ .handler = &buspirate_handle_vreg_command,
+ .mode = COMMAND_CONFIG,
+ .help = "changes the state of voltage regulators",
+ },
+ {
+ .name = "buspirate_pullup",
+ .handler = &buspirate_handle_pullup_command,
+ .mode = COMMAND_CONFIG,
+ .help = "changes the state of pullup",
+ },
+ {
+ .name = "buspirate_led",
+ .handler = &buspirate_handle_led_command,
+ .mode = COMMAND_EXEC,
+ .help = "changes the state of led",
+ },
+ {
+ .name = "buspirate_speed",
+ .handler = &buspirate_handle_speed_command,
+ .mode = COMMAND_CONFIG,
+ .help = "speed of the interface",
+ },
+ {
+ .name = "buspirate_mode",
+ .handler = &buspirate_handle_mode_command,
+ .mode = COMMAND_CONFIG,
+ .help = "pin mode of the interface",
+ },
+ {
+ .name = "buspirate_port",
+ .handler = &buspirate_handle_port_command,
+ .mode = COMMAND_CONFIG,
+ .help = "name of the serial port to open",
+ },
+ COMMAND_REGISTRATION_DONE
+};
+
+struct jtag_interface buspirate_interface = {
+ .name = "buspirate",
+ .execute_queue = buspirate_execute_queue,
+ .speed = buspirate_speed,
+ .khz = buspirate_khz,
+ .commands = buspirate_command_handlers,
+ .init = buspirate_init,
+ .quit = buspirate_quit
+};
+
+/*************** jtag execute commands **********************/
+static void buspirate_end_state(tap_state_t state)
+{
+ if (tap_is_state_stable(state))
+ tap_set_end_state(state);
+ else {
+ LOG_ERROR("BUG: %i is not a valid end state", state);
+ exit(-1);
+ }
+}
+
+static void buspirate_state_move(void)
+{
+ int i = 0, tms = 0;
+ uint8_t tms_scan = tap_get_tms_path(tap_get_state(),
+ tap_get_end_state());
+ int tms_count = tap_get_tms_path_len(tap_get_state(),
+ tap_get_end_state());
+
+ for (i = 0; i < tms_count; i++) {
+ tms = (tms_scan >> i) & 1;
+ buspirate_tap_append(tms, 0);
+ }
+
+ tap_set_state(tap_get_end_state());
+}
+
+static void buspirate_path_move(int num_states, tap_state_t *path)
+{
+ int i;
+
+ for (i = 0; i < num_states; i++) {
+ if (tap_state_transition(tap_get_state(), false) == path[i]) {
+ buspirate_tap_append(0, 0);
+ } else if (tap_state_transition(tap_get_state(), true)
+ == path[i]) {
+ buspirate_tap_append(1, 0);
+ } else {
+ LOG_ERROR("BUG: %s -> %s isn't a valid "
+ "TAP transition",
+ tap_state_name(tap_get_state()),
+ tap_state_name(path[i]));
+ exit(-1);
+ }
+
+ tap_set_state(path[i]);
+ }
+
+ tap_set_end_state(tap_get_state());
+}
+
+static void buspirate_runtest(int num_cycles)
+{
+ int i;
+
+ tap_state_t saved_end_state = tap_get_end_state();
+
+ /* only do a state_move when we're not already in IDLE */
+ if (tap_get_state() != TAP_IDLE) {
+ buspirate_end_state(TAP_IDLE);
+ buspirate_state_move();
+ }
+
+ for (i = 0; i < num_cycles; i++)
+ buspirate_tap_append(0, 0);
+
+ DEBUG_JTAG_IO("runtest: cur_state %s end_state %s",
+ tap_state_name(tap_get_state()),
+ tap_state_name(tap_get_end_state()));
+
+ /* finish in end_state */
+ buspirate_end_state(saved_end_state);
+ if (tap_get_state() != tap_get_end_state())
+ buspirate_state_move();
+}
+
+static void buspirate_scan(bool ir_scan, enum scan_type type,
+ uint8_t *buffer, int scan_size, struct scan_command *command)
+{
+ tap_state_t saved_end_state;
+
+ buspirate_tap_make_space(1, scan_size+8);
+ /* is 8 correct ? (2 moves = 16) */
+
+ saved_end_state = tap_get_end_state();
+
+ buspirate_end_state(ir_scan ? TAP_IRSHIFT : TAP_DRSHIFT);
+ buspirate_state_move();
+
+ buspirate_tap_append_scan(scan_size, buffer, command);
+
+ /* move to PAUSE */
+ buspirate_tap_append(0, 0);
+
+ /* restore the saved state */
+ buspirate_end_state(saved_end_state);
+ tap_set_state(ir_scan ? TAP_IRPAUSE : TAP_DRPAUSE);
+
+ if (tap_get_state() != tap_get_end_state())
+ buspirate_state_move();
+}
+
+
+/************************* TAP related stuff **********/
+
+#define BUSPIRATE_BUFFER_SIZE 1024
+#define BUSPIRATE_MAX_PENDING_SCANS 32
+
+static char tms_chain[BUSPIRATE_BUFFER_SIZE]; /* send */
+static char tdi_chain[BUSPIRATE_BUFFER_SIZE]; /* send */
+static int tap_chain_index;
+
+struct pending_scan_result /* this was stolen from arm-jtag-ew */
+{
+ int first; /* First bit position in tdo_buffer to read */
+ int length; /* Number of bits to read */
+ struct scan_command *command; /* Corresponding scan command */
+ uint8_t *buffer;
+};
+
+static struct pending_scan_result
+tap_pending_scans[BUSPIRATE_MAX_PENDING_SCANS];
+static int tap_pending_scans_num;
+
+static void buspirate_tap_init(void)
+{
+ tap_chain_index = 0;
+ tap_pending_scans_num = 0;
+}
+
+static int buspirate_tap_execute(void)
+{
+ char tmp[4096];
+ uint8_t *in_buf;
+ int i;
+ int fill_index = 0;
+ int ret;
+ int bytes_to_send;
+
+ if (tap_chain_index <= 0)
+ return ERROR_OK;
+
+ LOG_DEBUG("executing tap num bits = %i scans = %i",
+ tap_chain_index, tap_pending_scans_num);
+
+ bytes_to_send = (tap_chain_index+7) / 8;
+
+ tmp[0] = CMD_TAP_SHIFT; /* this command expects number of bits */
+ tmp[1] = (char)(tap_chain_index >> 8); /* high */
+ tmp[2] = (char)(tap_chain_index); /* low */
+
+ fill_index = 3;
+ for (i = 0; i < bytes_to_send; i++) {
+ tmp[fill_index] = tdi_chain[i];
+ fill_index++;
+ tmp[fill_index] = tms_chain[i];
+ fill_index++;
+ }
+
+ ret = buspirate_serial_write(buspirate_fd, tmp, 3 + bytes_to_send*2);
+ if (ret != bytes_to_send*2+3) {
+ LOG_ERROR("error writing :(");
+ return ERROR_JTAG_DEVICE_ERROR;
+ }
+
+ ret = buspirate_serial_read(buspirate_fd, tmp, bytes_to_send + 3);
+ in_buf = (uint8_t *)(&tmp[3]);
+
+ /* parse the scans */
+ for (i = 0; i < tap_pending_scans_num; i++) {
+ uint8_t *buffer = tap_pending_scans[i].buffer;
+ int length = tap_pending_scans[i].length;
+ int first = tap_pending_scans[i].first;
+ struct scan_command *command = tap_pending_scans[i].command;
+
+ /* copy bits from buffer */
+ buf_set_buf(in_buf, first, buffer, 0, length);
+
+ /* return buffer to higher level */
+ if (jtag_read_buffer(buffer, command) != ERROR_OK) {
+ buspirate_tap_init();
+ return ERROR_JTAG_QUEUE_FAILED;
+ }
+
+ free(buffer);
+ }
+ tap_pending_scans_num = 0;
+ tap_chain_index = 0;
+ return ERROR_OK;
+}
+
+static void buspirate_tap_make_space(int scans, int bits)
+{
+ int have_scans = BUSPIRATE_MAX_PENDING_SCANS - tap_pending_scans_num;
+ int have_bits = BUSPIRATE_BUFFER_SIZE * 8 - tap_chain_index;
+
+ if ((have_scans < scans) || (have_bits < bits))
+ buspirate_tap_execute();
+}
+
+static void buspirate_tap_append(int tms, int tdi)
+{
+ int index;
+
+ buspirate_tap_make_space(0, 1);
+ index = tap_chain_index / 8;
+
+ if (index < BUSPIRATE_BUFFER_SIZE) {
+ int bit_index = tap_chain_index % 8;
+ uint8_t bit = 1 << bit_index;
+
+ if (tms)
+ tms_chain[index] |= bit;
+ else
+ tms_chain[index] &= ~bit;
+
+ if (tdi)
+ tdi_chain[index] |= bit;
+ else
+ tdi_chain[index] &= ~bit;
+
+ tap_chain_index++;
+ } else
+ LOG_ERROR("tap_chain overflow, Bad things will happen");
+
+}
+
+static void buspirate_tap_append_scan(int length, uint8_t *buffer,
+ struct scan_command *command)
+{
+ int i;
+ tap_pending_scans[tap_pending_scans_num].length = length;
+ tap_pending_scans[tap_pending_scans_num].buffer = buffer;
+ tap_pending_scans[tap_pending_scans_num].command = command;
+ tap_pending_scans[tap_pending_scans_num].first = tap_chain_index;
+
+ for (i = 0; i < length; i++) {
+ int tms = (i < length-1 ? 0 : 1);
+ int tdi = (buffer[i/8] >> (i%8)) & 1;
+ buspirate_tap_append(tms, tdi);
+ }
+ tap_pending_scans_num++;
+}
+
+/*************** jtag wrapper functions *********************/
+
+/* (1) assert or (0) deassert reset lines */
+static void buspirate_reset(int trst, int srst)
+{
+ LOG_DEBUG("trst: %i, srst: %i", trst, srst);
+
+ if (trst)
+ buspirate_jtag_set_feature(buspirate_fd,
+ FEATURE_TRST, ACTION_DISABLE);
+ else
+ buspirate_jtag_set_feature(buspirate_fd,
+ FEATURE_TRST, ACTION_ENABLE);
+
+ if (srst)
+ buspirate_jtag_set_feature(buspirate_fd,
+ FEATURE_SRST, ACTION_DISABLE);
+ else
+ buspirate_jtag_set_feature(buspirate_fd,
+ FEATURE_SRST, ACTION_ENABLE);
+}
+
+/*************** jtag lowlevel functions ********************/
+static void buspirate_jtag_enable(int fd)
+{
+ int ret;
+ char tmp[21] = { [0 ... 20] = 0x00 };
+ int done = 0;
+ int cmd_sent = 0;
+
+ LOG_DEBUG("Entering binary mode");
+ buspirate_serial_write(fd, tmp, 20);
+ usleep(10000);
+
+ /* reads 1 to n "BBIO1"s and one "OCD1" */
+ while (!done) {
+ ret = buspirate_serial_read(fd, tmp, 4);
+ if (ret != 4) {
+ LOG_ERROR("Buspirate did not respond :"
+ "( restart everything");
+ exit(-1);
+ }
+ LOG_DEBUG("TUI");
+ if (strncmp(tmp, "BBIO", 4) == 0) {
+ ret = buspirate_serial_read(fd, tmp, 1);
+ if (ret != 1) {
+ LOG_ERROR("Buspirate did not respond well :"
+ "( restart everything");
+ exit(-1);
+ }
+ if (tmp[0] != '1') {
+ LOG_ERROR("Unsupported binary protocol ");
+ exit(-1);
+ }
+ if (cmd_sent == 0) {
+ cmd_sent = 1;
+ tmp[0] = CMD_ENTER_OOCD;
+ ret = buspirate_serial_write(fd, tmp, 1);
+ }
+ } else if (strncmp(tmp, "OCD1", 4) == 0)
+ done = 1;
+ else {
+ LOG_ERROR("Buspirate did not respond :"
+ "( restart everything");
+ exit(-1);
+ }
+ }
+
+}
+
+static void buspirate_jtag_reset(int fd)
+{
+ int ret;
+ char tmp[5];
+
+ tmp[0] = 0x00; /* exit OCD1 mode */
+ buspirate_serial_write(fd, tmp, 1);
+ usleep(10000);
+ ret = buspirate_serial_read(fd, tmp, 5);
+ if (strncmp(tmp, "BBIO1", 5) == 0) {
+ tmp[0] = 0x0F; /* reset BP */
+ buspirate_serial_write(fd, tmp, 1);
+ } else
+ LOG_ERROR("Bad reply :( Please restart manually");
+}
+
+static void buspirate_jtag_set_speed(int fd, char speed)
+{
+ int ret;
+ char tmp[2];
+ char ack[2];
+ speed_t baudrate = B115200;
+
+ ack[0] = 0xAA;
+ ack[1] = 0x55;
+
+ tmp[0] = CMD_UART_SPEED;
+ tmp[1] = speed;
+ buspirate_jtag_command(fd, tmp, 2);
+
+ /* here the adapter changes speed, we need follow */
+ if (speed == SERIAL_FAST)
+ baudrate = B1000000;
+
+ buspirate_serial_setspeed(fd, baudrate);
+
+ buspirate_serial_write(fd, ack, 2);
+ ret = buspirate_serial_read(fd, tmp, 2);
+ if (ret != 2) {
+ LOG_ERROR("Buspirate did not respond :"
+ "( restart everything");
+ exit(-1);
+ }
+ if ((tmp[0] != CMD_UART_SPEED) || (tmp[1] != speed)) {
+ LOG_ERROR("Buspirate didn't reply as expected :"
+ "( restart everything");
+ exit(-1);
+ }
+ LOG_INFO("Buspirate switched to %s mode",
+ (speed == SERIAL_NORMAL) ? "normal" : "FAST");
+}
+
+
+static void buspirate_jtag_set_mode(int fd, char mode)
+{
+ char tmp[2];
+ tmp[0] = CMD_PORT_MODE;
+ tmp[1] = mode;
+ buspirate_jtag_command(fd, tmp, 2);
+}
+
+static void buspirate_jtag_set_feature(int fd, char feat, char action)
+{
+ char tmp[3];
+ tmp[0] = CMD_FEATURE;
+ tmp[1] = feat; /* what */
+ tmp[2] = action; /* action */
+ buspirate_jtag_command(fd, tmp, 3);
+}
+
+static void buspirate_jtag_get_adcs(int fd)
+{
+ uint8_t tmp[10];
+ uint16_t a, b, c, d;
+ tmp[0] = CMD_READ_ADCS;
+ buspirate_jtag_command(fd, (char *)tmp, 1);
+ a = tmp[2] << 8 | tmp[3];
+ b = tmp[4] << 8 | tmp[5];
+ c = tmp[6] << 8 | tmp[7];
+ d = tmp[8] << 8 | tmp[9];
+
+ LOG_INFO("ADC: ADC_Pin = %.02f VPullup = %.02f V33 = %.02f "
+ "V50 = %.02f",
+ ((float)a)/155.1515, ((float)b)/155.1515,
+ ((float)c)/155.1515, ((float)d)/155.1515);
+}
+
+static unsigned char buspirate_jtag_command(int buspirate_fd,
+ char *cmd, int cmdlen)
+{
+ int res;
+ int len = 0;
+
+ res = buspirate_serial_write(buspirate_fd, cmd, cmdlen);
+
+ if ((cmd[0] == CMD_UART_SPEED)
+ || (cmd[0] == CMD_PORT_MODE)
+ || (cmd[0] == CMD_FEATURE)
+ || (cmd[0] == CMD_JTAG_SPEED))
+ return 1;
+
+ if (res == cmdlen) {
+ switch (cmd[0]) {
+ case CMD_READ_ADCS:
+ len = 10; /* 2*sizeof(char)+4*sizeof(uint16_t) */
+ break;
+ case CMD_TAP_SHIFT:
+ len = cmdlen;
+ break;
+ default:
+ LOG_INFO("Wrong !");
+ }
+ res = buspirate_serial_read(buspirate_fd, cmd, len);
+ if (res > 0)
+ return (unsigned char)cmd[1];
+ else
+ return -1;
+ } else
+ return -1;
+ return 0;
+}
+
+/* low level serial port */
+/* TODO add support for WIN32 and others ! */
+static int buspirate_serial_setspeed(int fd, speed_t speed)
+{
+ struct termios t_opt;
+
+ /* set the serial port parameters */
+ fcntl(buspirate_fd, F_SETFL, 0);
+ tcgetattr(buspirate_fd, &t_opt);
+ cfsetispeed(&t_opt, speed);
+ cfsetospeed(&t_opt, speed);
+ t_opt.c_cflag |= (CLOCAL | CREAD);
+ t_opt.c_cflag &= ~PARENB;
+ t_opt.c_cflag &= ~CSTOPB;
+ t_opt.c_cflag &= ~CSIZE;
+ t_opt.c_cflag |= CS8;
+ t_opt.c_lflag &= ~(ICANON | ECHO | ECHOE | ISIG);
+ t_opt.c_iflag &= ~(IXON | IXOFF | IXANY);
+ t_opt.c_oflag &= ~OPOST;
+ t_opt.c_cc[VMIN] = 0;
+ t_opt.c_cc[VTIME] = 10;
+ tcflush(buspirate_fd, TCIFLUSH);
+ tcsetattr(buspirate_fd, TCSANOW, &t_opt);
+
+ return 0;
+}
+
+static int buspirate_serial_write(int fd, char *buf, int size)
+{
+ int ret = 0;
+
+ ret = write(fd, buf, size);
+
+ LOG_DEBUG("size = %d ret = %d", size, ret);
+ buspirate_print_buffer(buf, size);
+
+ if (ret != size)
+ LOG_ERROR("Error sending data");
+
+ return ret;
+}
+
+static int buspirate_serial_read(int fd, char *buf, int size)
+{
+ int len = 0;
+ int ret = 0;
+ int timeout = 0;
+
+ while (len < size) {
+ ret = read(fd, buf+len, size-len);
+ if (ret == -1)
+ return -1;
+
+ if (ret == 0) {
+ timeout++;
+
+ if (timeout >= 10)
+ break;
+
+ continue;
+ }
+
+ len += ret;
+ }
+
+ LOG_DEBUG("should have read = %d actual size = %d", size, len);
+ buspirate_print_buffer(buf, len);
+
+ if (len != size)
+ LOG_ERROR("Error sending data");
+
+ return len;
+}
+
+#define LINE_SIZE 81
+#define BYTES_PER_LINE 16
+static void buspirate_print_buffer(char *buf, int size)
+{
+ char line[LINE_SIZE];
+ char tmp[10];
+ int offset = 0;
+
+ line[0] = 0;
+ while (offset < size) {
+ snprintf(tmp, 5, "%02x ", (uint8_t)buf[offset]);
+ offset++;
+
+ strcat(line, tmp);
+
+ if (offset % BYTES_PER_LINE == 0) {
+ LOG_DEBUG("%s", line);
+ line[0] = 0;
+ }
+ }
+
+ if (line[0] != 0) {
+ LOG_DEBUG("%s", line);
+ }
+}
+
diff --git a/src/jtag/interfaces.c b/src/jtag/interfaces.c
index f6d8219..8d13a08 100644
--- a/src/jtag/interfaces.c
+++ b/src/jtag/interfaces.c
@@ -91,6 +91,9 @@ extern struct jtag_interface rlink_interface;
#if BUILD_ARMJTAGEW == 1
extern struct jtag_interface armjtagew_interface;
#endif
+#if BUILD_BUSPIRATE == 1
+extern struct jtag_interface buspirate_interface;
+#endif
#endif // standard drivers
/**
@@ -151,6 +154,9 @@ struct jtag_interface *jtag_interfaces[] = {
#if BUILD_ARMJTAGEW == 1
&armjtagew_interface,
#endif
+#if BUILD_BUSPIRATE == 1
+ &buspirate_interface,
+#endif
#endif // standard drivers
NULL,
};
diff --git a/tcl/interface/buspirate.cfg b/tcl/interface/buspirate.cfg
new file mode 100644
index 0000000..9c7e0e7
--- /dev/null
+++ b/tcl/interface/buspirate.cfg
@@ -0,0 +1,26 @@
+#
+# Buspirate with OpenOCD support
+#
+# http://dangerousprototypes.com/bus-pirate-manual/
+#
+
+interface buspirate
+
+# you need to specify port on which BP lives
+#buspirate_port /dev/ttyUSB0
+
+# communication speed setting
+buspirate_speed normal # or fast
+
+# voltage regulator Enabled = 1 Disabled = 0
+#buspirate_vreg 0
+
+# pin mode normal or open-drain
+#buspirate_mode normal
+
+# pullup state Enabled = 1 Disabled = 0
+#buspirate_pullup 0
+
+# this depends on the cable, you are safe with this option
+reset_config srst_only
+
-----------------------------------------------------------------------
Summary of changes:
NEWS | 1 +
configure.in | 11 +
doc/openocd.texi | 3 +
src/jtag/drivers/Makefile.am | 3 +
src/jtag/drivers/buspirate.c | 969 ++++++++++++++++++++++++++++++++++++++++++
src/jtag/interfaces.c | 6 +
tcl/interface/buspirate.cfg | 26 ++
7 files changed, 1019 insertions(+), 0 deletions(-)
create mode 100644 src/jtag/drivers/buspirate.c
create mode 100644 tcl/interface/buspirate.cfg
hooks/post-receive
--
Main OpenOCD repository
|
|
From: David B. <dbr...@us...> - 2010-03-11 18:52:57
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 591e0bbab957e86c8b2c6e19420a8cd9f89993cd (commit)
from edf52a6cc5314a1db34c110050090a539c8ab3ed (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 591e0bbab957e86c8b2c6e19420a8cd9f89993cd
Author: David Brownell <dbr...@us...>
Date: Thu Mar 11 09:47:47 2010 -0800
split "interface" commands from "jtag" ones
We'll need to be able to work with debug adapter interfaces (drivers)
even when they're not used for JTAG ... for example, while there are
multi-transport drivers which support JTAG *and* several other
transports (or just one more, like SWD) there are also adapters
with more limited goals (and no JTAG support at all).
Start decoupling the two concepts ("debug adapter driver", "jtag")
by having two command groups, which initialize separately.
This will help us support OpenOCD sessions using only non-JTAG
transports, in which JTAG commands should not be registered.
Update docs to mention that the JTAG, SVF, and XSVF commands
won't work without a JTAG transport.
Note that at least commands working with SRST are still inappropriately
coupled to JTAG ... inappropriate because (a) SRST is not part of the
JTAG standard, for all that many platforms (like ARM) expect it; and also
(b) because they're used with non-JTAG debug and programming interfaces,
too. They should perhaps become generic "interface" operations at some
point. (Similarly with the clock rate to be used by a given adapter.)
Signed-off-by: David Brownell <dbr...@us...>
diff --git a/doc/openocd.texi b/doc/openocd.texi
index f9f9b68..33c442f 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -6641,6 +6641,8 @@ the order of TAP state transitions.
If you're not debugging OpenOCD internals, or bringing up a
new JTAG adapter or a new type of TAP device (like a CPU or
JTAG router), you probably won't need to use these commands.
+In a debug session that doesn't use JTAG for its transport protocol,
+these commands are not available.
@deffn Command {drscan} tap [numbits value]+ [@option{-endstate} tap_state]
Loads the data register of @var{tap} with a series of bit fields
@@ -6831,6 +6833,7 @@ OpenOCD also includes some boundary scan commands.
The Serial Vector Format, better known as @dfn{SVF}, is a
way to represent JTAG test patterns in text files.
+In a debug session using JTAG for its transport protocol,
OpenOCD supports running such test files.
@deffn Command {svf} filename [@option{quiet}]
@@ -6847,6 +6850,7 @@ each command is logged before it is executed.
The Xilinx Serial Vector Format, better known as @dfn{XSVF}, is a
binary representation of SVF which is optimized for use with
Xilinx devices.
+In a debug session using JTAG for its transport protocol,
OpenOCD supports running such test files.
@quotation Important
diff --git a/src/jtag/driver.h b/src/jtag/driver.h
new file mode 100644
index 0000000..62cda41
--- /dev/null
+++ b/src/jtag/driver.h
@@ -0,0 +1,4 @@
+struct command_context;
+
+int interface_register_commands(struct command_context *ctx);
+
diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c
index 1073abc..3ffa930 100644
--- a/src/jtag/tcl.c
+++ b/src/jtag/tcl.c
@@ -985,7 +985,7 @@ COMMAND_HANDLER(handle_interface_list_command)
if (strcmp(CMD_NAME, "interface_list") == 0 && CMD_ARGC > 0)
return ERROR_COMMAND_SYNTAX_ERROR;
- command_print(CMD_CTX, "The following JTAG interfaces are available:");
+ command_print(CMD_CTX, "The following debug interfaces are available:");
for (unsigned i = 0; NULL != jtag_interfaces[i]; i++)
{
const char *name = jtag_interfaces[i]->name;
@@ -1038,7 +1038,7 @@ COMMAND_HANDLER(handle_interface_command)
/* no valid interface was found (i.e. the configuration option,
* didn't match one of the compiled-in interfaces
*/
- LOG_ERROR("The specified JTAG interface was not found (%s)", CMD_ARGV[0]);
+ LOG_ERROR("The specified debug interface was not found (%s)", CMD_ARGV[0]);
CALL_COMMAND_HANDLER(handle_interface_list_command);
return ERROR_JTAG_INVALID_INTERFACE;
}
@@ -1607,20 +1607,35 @@ COMMAND_HANDLER(handle_tms_sequence_command)
return ERROR_OK;
}
-static const struct command_registration jtag_command_handlers[] = {
+static const struct command_registration interface_command_handlers[] = {
{
.name = "interface",
.handler = handle_interface_command,
.mode = COMMAND_CONFIG,
- .help = "Select a JTAG interface",
+ .help = "Select a debug adapter interface (driver)",
.usage = "driver_name",
},
{
.name = "interface_list",
.handler = handle_interface_list_command,
.mode = COMMAND_ANY,
- .help = "List all built-in interfaces",
+ .help = "List all built-in debug adapter interfaces (drivers)",
},
+ COMMAND_REGISTRATION_DONE
+};
+
+/**
+ * Register the commands which deal with arbitrary debug adapter drivers.
+ *
+ * @todo Remove internal assumptions that all debug adapters use JTAG for
+ * transport. Various types and data structures are not named generically.
+ */
+int interface_register_commands(struct command_context *ctx)
+{
+ return register_commands(ctx, NULL, interface_command_handlers);
+}
+
+static const struct command_registration jtag_command_handlers[] = {
{
.name = "jtag_khz",
.handler = handle_jtag_khz_command,
@@ -1746,6 +1761,7 @@ static const struct command_registration jtag_command_handlers[] = {
},
COMMAND_REGISTRATION_DONE
};
+
int jtag_register_commands(struct command_context *cmd_ctx)
{
return register_commands(cmd_ctx, NULL, jtag_command_handlers);
diff --git a/src/openocd.c b/src/openocd.c
index 7833606..4250434 100644
--- a/src/openocd.c
+++ b/src/openocd.c
@@ -29,6 +29,7 @@
#endif
#include "openocd.h"
+#include <jtag/driver.h>
#include <jtag/jtag.h>
#include <helper/ioutil.h>
#include <helper/configuration.h>
@@ -207,6 +208,7 @@ struct command_context *setup_command_handler(Jim_Interp *interp)
&server_register_commands,
&gdb_register_commands,
&log_register_commands,
+ &interface_register_commands,
&jtag_register_commands,
&xsvf_register_commands,
&svf_register_commands,
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 4 ++++
src/jtag/driver.h | 4 ++++
src/jtag/tcl.c | 26 +++++++++++++++++++++-----
src/openocd.c | 2 ++
4 files changed, 31 insertions(+), 5 deletions(-)
create mode 100644 src/jtag/driver.h
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Main OpenOCD repository
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|
From: Spencer O. <nt...@us...> - 2010-03-10 23:23:22
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via edf52a6cc5314a1db34c110050090a539c8ab3ed (commit)
from 6030a5cb2af17fc4bb47788265c9b1400318da6b (commit)
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- Log -----------------------------------------------------------------
commit edf52a6cc5314a1db34c110050090a539c8ab3ed
Author: Spencer Oliver <nt...@us...>
Date: Wed Mar 10 22:23:01 2010 +0000
MIPS: make fixed code arrays static const
Signed-off-by: Spencer Oliver <nt...@us...>
diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index e0550a8..984b535 100644
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -129,7 +129,7 @@ int mips_ejtag_drscan_32(struct mips_ejtag *ejtag_info, uint32_t *data)
int mips_ejtag_step_enable(struct mips_ejtag *ejtag_info)
{
- uint32_t code[] = {
+ static const uint32_t code[] = {
MIPS32_MTC0(1,31,0), /* move $1 to COP0 DeSave */
MIPS32_MFC0(1,23,0), /* move COP0 Debug to $1 */
MIPS32_ORI(1,1,0x0100), /* set SSt bit in debug reg */
@@ -145,7 +145,7 @@ int mips_ejtag_step_enable(struct mips_ejtag *ejtag_info)
}
int mips_ejtag_step_disable(struct mips_ejtag *ejtag_info)
{
- uint32_t code[] = {
+ static const uint32_t code[] = {
MIPS32_MTC0(15,31,0), /* move $15 to COP0 DeSave */
MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */
MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK)),
@@ -209,7 +209,7 @@ int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info)
int mips_ejtag_read_debug(struct mips_ejtag *ejtag_info, uint32_t* debug_reg)
{
/* read ejtag ECR */
- uint32_t code[] = {
+ static const uint32_t code[] = {
MIPS32_MTC0(15,31,0), /* move $15 to COP0 DeSave */
MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */
MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK)),
-----------------------------------------------------------------------
Summary of changes:
src/target/mips_ejtag.c | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
hooks/post-receive
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From: Spencer O. <nt...@us...> - 2010-03-10 22:54:55
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 6030a5cb2af17fc4bb47788265c9b1400318da6b (commit)
from 257a764582f52235414b5c35717b0ee2b49d4b0d (commit)
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- Log -----------------------------------------------------------------
commit 6030a5cb2af17fc4bb47788265c9b1400318da6b
Author: Spencer Oliver <nt...@us...>
Date: Wed Mar 10 21:54:21 2010 +0000
JLINK: user info message cleanup
- remove trailing LF's from user info messages.
- split long lines.
Signed-off-by: Spencer Oliver <nt...@us...>
diff --git a/src/jtag/drivers/jlink.c b/src/jtag/drivers/jlink.c
index f22ad7c..21dfab2 100644
--- a/src/jtag/drivers/jlink.c
+++ b/src/jtag/drivers/jlink.c
@@ -62,10 +62,10 @@ static uint8_t usb_out_buffer[JLINK_OUT_BUFFER_SIZE];
static uint8_t usb_emu_result_buffer[JLINK_EMU_RESULT_BUFFER_SIZE];
/* Constants for JLink command */
-#define EMU_CMD_VERSION 0x01
+#define EMU_CMD_VERSION 0x01
#define EMU_CMD_SET_SPEED 0x05
#define EMU_CMD_GET_STATE 0x07
-#define EMU_CMD_HW_CLOCK 0xc8
+#define EMU_CMD_HW_CLOCK 0xc8
#define EMU_CMD_HW_TMS0 0xc9
#define EMU_CMD_HW_TMS1 0xca
#define EMU_CMD_HW_JTAG2 0xce
@@ -90,7 +90,8 @@ static void jlink_end_state(tap_state_t state);
static void jlink_state_move(void);
static void jlink_path_move(int num_states, tap_state_t *path);
static void jlink_runtest(int num_cycles);
-static void jlink_scan(bool ir_scan, enum scan_type type, uint8_t *buffer, int scan_size, struct scan_command *command);
+static void jlink_scan(bool ir_scan, enum scan_type type, uint8_t *buffer,
+ int scan_size, struct scan_command *command);
static void jlink_reset(int trst, int srst);
static void jlink_simple_command(uint8_t command);
static int jlink_get_status(void);
@@ -100,7 +101,8 @@ static void jlink_tap_init(void);
static int jlink_tap_execute(void);
static void jlink_tap_ensure_space(int scans, int bits);
static void jlink_tap_append_step(int tms, int tdi);
-static void jlink_tap_append_scan(int length, uint8_t *buffer, struct scan_command *command);
+static void jlink_tap_append_scan(int length, uint8_t *buffer,
+ struct scan_command *command);
/* Jlink lowlevel functions */
struct jlink {
@@ -276,18 +278,26 @@ static int jlink_init(void)
if (jlink_handle == 0)
{
- LOG_ERROR("Cannot find jlink Interface! Please check connection and permissions.");
+ LOG_ERROR("Cannot find jlink Interface! Please check "
+ "connection and permissions.");
return ERROR_JTAG_INIT_FAILED;
}
/*
- * The next three instructions were added after discovering a problem while using an oscilloscope. For the V8
- * SAM-ICE dongle (and likely other j-link device variants), the reset line to the target microprocessor was found to
- * cycle only intermittently during emulator startup (even after encountering the downstream reset instruction later
- * in the code). This was found to create two issues: 1) In general it is a bad practice to not reset a CPU to a known
- * state when starting an emulator and 2) something critical happens inside the dongle when it does the first read
- * following a new USB session. Keeping the processor in reset during the first read collecting version information
- * seems to prevent errant "J-Link command EMU_CMD_VERSION failed" issues.
+ * The next three instructions were added after discovering a problem
+ * while using an oscilloscope.
+ * For the V8 SAM-ICE dongle (and likely other j-link device variants),
+ * the reset line to the target microprocessor was found to cycle only
+ * intermittently during emulator startup (even after encountering the
+ * downstream reset instruction later in the code).
+ * This was found to create two issues:
+ * 1) In general it is a bad practice to not reset a CPU to a known
+ * state when starting an emulator and
+ * 2) something critical happens inside the dongle when it does the
+ * first read following a new USB session.
+ * Keeping the processor in reset during the first read collecting
+ * version information seems to prevent errant
+ * "J-Link command EMU_CMD_VERSION failed" issues.
*/
LOG_INFO("J-Link initialization started / target CPU reset initiated");
@@ -375,7 +385,8 @@ static void jlink_path_move(int num_states, tap_state_t *path)
}
else
{
- LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_name(tap_get_state()), tap_state_name(path[i]));
+ LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition",
+ tap_state_name(tap_get_state()), tap_state_name(path[i]));
exit(-1);
}
@@ -415,7 +426,8 @@ static void jlink_runtest(int num_cycles)
}
}
-static void jlink_scan(bool ir_scan, enum scan_type type, uint8_t *buffer, int scan_size, struct scan_command *command)
+static void jlink_scan(bool ir_scan, enum scan_type type, uint8_t *buffer,
+ int scan_size, struct scan_command *command)
{
tap_state_t saved_end_state;
@@ -500,13 +512,13 @@ static int jlink_get_status(void)
}
int vref = usb_in_buffer[0] + (usb_in_buffer[1] << 8);
- LOG_INFO("Vref = %d.%d TCK = %d TDI = %d TDO = %d TMS = %d SRST = %d TRST = %d\n", \
+ LOG_INFO("Vref = %d.%d TCK = %d TDI = %d TDO = %d TMS = %d SRST = %d TRST = %d", \
vref / 1000, vref % 1000, \
usb_in_buffer[2], usb_in_buffer[3], usb_in_buffer[4], \
usb_in_buffer[5], usb_in_buffer[6], usb_in_buffer[7]);
if (vref < 1500)
- LOG_ERROR("Vref too low. Check Target Power\n");
+ LOG_ERROR("Vref too low. Check Target Power");
return ERROR_OK;
}
@@ -523,7 +535,7 @@ static int jlink_get_version_info(void)
result = jlink_usb_read(jlink_handle, 2);
if (2 != result)
{
- LOG_ERROR("J-Link command EMU_CMD_VERSION failed (%d)\n", result);
+ LOG_ERROR("J-Link command EMU_CMD_VERSION failed (%d)", result);
return ERROR_JTAG_DEVICE_ERROR;
}
@@ -537,7 +549,7 @@ static int jlink_get_version_info(void)
result = jlink_usb_read(jlink_handle, len);
if (result != len)
{
- LOG_ERROR("J-Link command EMU_CMD_VERSION failed (%d)\n", result);
+ LOG_ERROR("J-Link command EMU_CMD_VERSION failed (%d)", result);
return ERROR_JTAG_DEVICE_ERROR;
}
@@ -550,7 +562,7 @@ static int jlink_get_version_info(void)
result = jlink_usb_read(jlink_handle, 4);
if (4 != result)
{
- LOG_ERROR("J-Link command EMU_CMD_GET_CAPS failed (%d)\n", result);
+ LOG_ERROR("J-Link command EMU_CMD_GET_CAPS failed (%d)", result);
return ERROR_JTAG_DEVICE_ERROR;
}
@@ -565,7 +577,7 @@ static int jlink_get_version_info(void)
result = jlink_usb_read(jlink_handle, 4);
if (4 != result)
{
- LOG_ERROR("J-Link command EMU_CMD_GET_HW_VERSION failed (%d)\n", result);
+ LOG_ERROR("J-Link command EMU_CMD_GET_HW_VERSION failed (%d)", result);
return ERROR_JTAG_DEVICE_ERROR;
}
@@ -585,7 +597,7 @@ static int jlink_get_version_info(void)
result = jlink_usb_read(jlink_handle, 4);
if (4 != result)
{
- LOG_ERROR("J-Link command EMU_CMD_GET_MAX_MEM_BLOCK failed (%d)\n", result);
+ LOG_ERROR("J-Link command EMU_CMD_GET_MAX_MEM_BLOCK failed (%d)", result);
return ERROR_JTAG_DEVICE_ERROR;
}
@@ -731,7 +743,8 @@ static void jlink_tap_append_step(int tms, int tdi)
tap_length++;
}
-static void jlink_tap_append_scan(int length, uint8_t *buffer, struct scan_command *command)
+static void jlink_tap_append_scan(int length, uint8_t *buffer,
+ struct scan_command *command)
{
struct pending_scan_result *pending_scan_result =
&pending_scan_results_buffer[pending_scan_results_length];
@@ -767,7 +780,7 @@ static int jlink_tap_execute(void)
* WARNING: This will interfere with tap state counting. */
while ((DIV_ROUND_UP(tap_length, 8) % 64) == 0)
{
- jlink_tap_append_step((tap_get_state() == TAP_RESET)?1:0, 0);
+ jlink_tap_append_step((tap_get_state() == TAP_RESET) ? 1 : 0, 0);
}
// number of full bytes (plus one if some would be left over)
@@ -787,7 +800,8 @@ static int jlink_tap_execute(void)
result = jlink_usb_message(jlink_handle, 4 + 2 * byte_length, byte_length);
if (result != byte_length)
{
- LOG_ERROR("jlink_tap_execute, wrong result %d (expected %d)", result, byte_length);
+ LOG_ERROR("jlink_tap_execute, wrong result %d (expected %d)",
+ result, byte_length);
jlink_tap_init();
return ERROR_JTAG_QUEUE_FAILED;
}
@@ -942,7 +956,8 @@ static int jlink_usb_message(struct jlink *jlink, int out_length, int in_length)
result2 = jlink_usb_read_emu_result(jlink);
if (1 != result2)
{
- LOG_ERROR("jlink_usb_read_emu_result retried requested = 1, result=%d, in_length=%i", result2,in_length);
+ LOG_ERROR("jlink_usb_read_emu_result retried requested = 1, "
+ "result=%d, in_length=%i", result2, in_length);
/* Try again once, should only happen if (in_length%64 == 0) */
result2 = jlink_usb_read_emu_result(jlink);
if (1 != result2)
@@ -971,7 +986,8 @@ static int jlink_usb_message(struct jlink *jlink, int out_length, int in_length)
return result;
}
-/* calls the given usb_bulk_* function, allowing for the data to trickle in with some timeouts */
+/* calls the given usb_bulk_* function, allowing for the data to
+ * trickle in with some timeouts */
static int usb_bulk_with_retries(
int (*f)(usb_dev_handle *, int, char *, int, int),
usb_dev_handle *dev, int ep,
@@ -1018,14 +1034,16 @@ static int jlink_usb_write(struct jlink *jlink, int out_length)
if (out_length > JLINK_OUT_BUFFER_SIZE)
{
- LOG_ERROR("jlink_write illegal out_length=%d (max=%d)", out_length, JLINK_OUT_BUFFER_SIZE);
+ LOG_ERROR("jlink_write illegal out_length=%d (max=%d)",
+ out_length, JLINK_OUT_BUFFER_SIZE);
return -1;
}
result = usb_bulk_write_ex(jlink->usb_handle, jlink_write_ep,
(char *)usb_out_buffer, out_length, JLINK_USB_TIMEOUT);
- DEBUG_JTAG_IO("jlink_usb_write, out_length = %d, result = %d", out_length, result);
+ DEBUG_JTAG_IO("jlink_usb_write, out_length = %d, result = %d",
+ out_length, result);
#ifdef _DEBUG_USB_COMMS_
jlink_debug_buffer(usb_out_buffer, out_length);
@@ -1084,4 +1102,3 @@ static void jlink_debug_buffer(uint8_t *buffer, int length)
}
}
#endif
-
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/jlink.c | 75 ++++++++++++++++++++++++++++------------------
1 files changed, 46 insertions(+), 29 deletions(-)
hooks/post-receive
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Main OpenOCD repository
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From: Spencer O. <nt...@us...> - 2010-03-10 22:05:48
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 257a764582f52235414b5c35717b0ee2b49d4b0d (commit)
from f10ed95a5ce6be416bcb2ec20826c6e508e4b622 (commit)
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- Log -----------------------------------------------------------------
commit 257a764582f52235414b5c35717b0ee2b49d4b0d
Author: Spencer Oliver <nt...@us...>
Date: Mon Mar 8 22:54:18 2010 +0000
PIC32: add flash algorithm support
Add flash algorithm support for the PIC32MX.
Still a few things todo but this dramatically decreases
the programing time, eg. approx programming for 2.5k test file.
- without fastload: 60secs
- with fastload: 45secs
- with fastload and algorithm: 2secs.
Add new devices to supported list.
Signed-off-by: Spencer Oliver <nt...@us...>
diff --git a/src/flash/nor/pic32mx.c b/src/flash/nor/pic32mx.c
index 1f66346..c46264c 100644
--- a/src/flash/nor/pic32mx.c
+++ b/src/flash/nor/pic32mx.c
@@ -29,38 +29,40 @@
#include "imp.h"
#include "pic32mx.h"
+#include <target/algorithm.h>
#include <target/mips32.h>
-
-static
-struct pic32mx_devs_s {
+static const struct pic32mx_devs_s {
uint8_t devid;
- char *name;
- uint32_t pfm_size;
+ char *name;
} pic32mx_devs[] = {
- { 0x78, "460F512L USB", 512 },
- { 0x74, "460F256L USB", 256 },
- { 0x6D, "440F128L USB", 128 },
- { 0x56, "440F512H USB", 512 },
- { 0x52, "440F256H USB", 256 },
- { 0x4D, "440F128H USB", 128 },
- { 0x42, "420F032H USB", 32 },
- { 0x38, "360F512L", 512 },
- { 0x34, "360F256L", 256 },
- { 0x2D, "340F128L", 128 },
- { 0x2A, "320F128L", 128 },
- { 0x16, "340F512H", 512 },
- { 0x12, "340F256H", 256 },
- { 0x0D, "340F128H", 128 },
- { 0x0A, "320F128H", 128 },
- { 0x06, "320F064H", 64 },
- { 0x02, "320F032H", 32 },
- { 0x00, NULL, 0 }
+ {0x38, "360F512L"},
+ {0x34, "360F256L"},
+ {0x2D, "340F128L"},
+ {0x2A, "320F128L"},
+ {0x16, "340F512H"},
+ {0x12, "340F256H"},
+ {0x0D, "340F128H"},
+ {0x0A, "320F128H"},
+ {0x06, "320F064H"},
+ {0x02, "320F032H"},
+ {0x07, "795F512L"},
+ {0x0E, "795F512H"},
+ {0x11, "675F512L"},
+ {0x0C, "675F512H"},
+ {0x0F, "575F512L"},
+ {0x09, "575F512H"},
+ {0x17, "575F256H"},
+ {0x78, "460F512L"},
+ {0x74, "460F256L"},
+ {0x6D, "440F128L"},
+ {0x56, "440F512H"},
+ {0x52, "440F256H"},
+ {0x4D, "440F128H"},
+ {0x42, "420F032H"},
+ {0x00, NULL}
};
-static int pic32mx_write_row(struct flash_bank *bank, uint32_t address, uint32_t srcaddr);
-static int pic32mx_write_word(struct flash_bank *bank, uint32_t address, uint32_t word);
-
/* flash bank pic32mx <base> <size> 0 0 <target#>
*/
FLASH_BANK_COMMAND_HANDLER(pic32mx_flash_bank_command)
@@ -145,9 +147,10 @@ static int pic32mx_protect_check(struct flash_bank *bank)
}
target_read_u32(target, PIC32MX_DEVCFG0, &devcfg0);
+
if ((devcfg0 & (1 << 28)) == 0) /* code protect bit */
num_pages = 0xffff; /* All pages protected */
- else if (bank->base == PIC32MX_KSEG1_BOOT_FLASH)
+ else if (Virt2Phys(bank->base) == PIC32MX_PHYS_BOOT_FLASH)
{
if (devcfg0 & (1 << 24))
num_pages = 0; /* All pages unprotected */
@@ -156,6 +159,7 @@ static int pic32mx_protect_check(struct flash_bank *bank)
}
else /* pgm flash */
num_pages = (~devcfg0 >> 12) & 0xff;
+
for (s = 0; s < bank->num_sectors && s < num_pages; s++)
bank->sectors[s].is_protected = 1;
for (; s < bank->num_sectors; s++)
@@ -176,8 +180,11 @@ static int pic32mx_erase(struct flash_bank *bank, int first, int last)
return ERROR_TARGET_NOT_HALTED;
}
- if ((first == 0) && (last == (bank->num_sectors - 1)) && (bank->base == PIC32MX_KSEG0_PGM_FLASH || bank->base == PIC32MX_KSEG1_PGM_FLASH))
+ if ((first == 0) && (last == (bank->num_sectors - 1))
+ && (Virt2Phys(bank->base) == PIC32MX_PHYS_PGM_FLASH))
{
+ /* this will only erase the Program Flash (PFM), not the Boot Flash (BFM)
+ * we need to use the MTAP to perform a full erase */
LOG_DEBUG("Erasing entire program flash");
status = pic32mx_nvm_exec(bank, NVMCON_OP_PFM_ERASE, 50);
if (status & NVMCON_NVMERR)
@@ -189,10 +196,7 @@ static int pic32mx_erase(struct flash_bank *bank, int first, int last)
for (i = first; i <= last; i++)
{
- if (bank->base >= PIC32MX_KSEG1_PGM_FLASH)
- target_write_u32(target, PIC32MX_NVMADDR, KS1Virt2Phys(bank->base + bank->sectors[i].offset));
- else
- target_write_u32(target, PIC32MX_NVMADDR, KS0Virt2Phys(bank->base + bank->sectors[i].offset));
+ target_write_u32(target, PIC32MX_NVMADDR, Virt2Phys(bank->base + bank->sectors[i].offset));
status = pic32mx_nvm_exec(bank, NVMCON_OP_PAGE_ERASE, 10);
@@ -210,12 +214,6 @@ static int pic32mx_protect(struct flash_bank *bank, int set, int first, int last
{
struct pic32mx_flash_bank *pic32mx_info = NULL;
struct target *target = bank->target;
-#if 0
- uint16_t prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
- int i, reg, bit;
- int status;
- uint32_t protection;
-#endif
pic32mx_info = bank->driver_priv;
@@ -225,205 +223,177 @@ static int pic32mx_protect(struct flash_bank *bank, int set, int first, int last
return ERROR_TARGET_NOT_HALTED;
}
-#if 0
- if ((first && (first % pic32mx_info->ppage_size)) || ((last + 1) && (last + 1) % pic32mx_info->ppage_size))
- {
- LOG_WARNING("sector start/end incorrect - stm32 has %dK sector protection", pic32mx_info->ppage_size);
- return ERROR_FLASH_SECTOR_INVALID;
- }
-
- /* medium density - each bit refers to a 4bank protection
- * high density - each bit refers to a 2bank protection */
- target_read_u32(target, PIC32MX_FLASH_WRPR, &protection);
-
- prot_reg[0] = (uint16_t)protection;
- prot_reg[1] = (uint16_t)(protection >> 8);
- prot_reg[2] = (uint16_t)(protection >> 16);
- prot_reg[3] = (uint16_t)(protection >> 24);
-
- if (pic32mx_info->ppage_size == 2)
- {
- /* high density flash */
-
- /* bit 7 controls sector 62 - 255 protection */
- if (last > 61)
- {
- if (set)
- prot_reg[3] &= ~(1 << 7);
- else
- prot_reg[3] |= (1 << 7);
- }
-
- if (first > 61)
- first = 62;
- if (last > 61)
- last = 61;
-
- for (i = first; i <= last; i++)
- {
- reg = (i / pic32mx_info->ppage_size) / 8;
- bit = (i / pic32mx_info->ppage_size) - (reg * 8);
-
- if (set)
- prot_reg[reg] &= ~(1 << bit);
- else
- prot_reg[reg] |= (1 << bit);
- }
- }
- else
- {
- /* medium density flash */
- for (i = first; i <= last; i++)
- {
- reg = (i / pic32mx_info->ppage_size) / 8;
- bit = (i / pic32mx_info->ppage_size) - (reg * 8);
-
- if (set)
- prot_reg[reg] &= ~(1 << bit);
- else
- prot_reg[reg] |= (1 << bit);
- }
- }
-
- if ((status = pic32mx_erase_options(bank)) != ERROR_OK)
- return status;
-
- pic32mx_info->option_bytes.protection[0] = prot_reg[0];
- pic32mx_info->option_bytes.protection[1] = prot_reg[1];
- pic32mx_info->option_bytes.protection[2] = prot_reg[2];
- pic32mx_info->option_bytes.protection[3] = prot_reg[3];
-
- return pic32mx_write_options(bank);
-#else
return ERROR_OK;
-#endif
}
-static int pic32mx_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
+static const uint32_t pic32mx_flash_write_code[] = {
+ /* write: */
+ 0x3C08AA99, /* lui $t0, 0xaa99 */
+ 0x35086655, /* ori $t0, 0x6655 */
+ 0x3C095566, /* lui $t1, 0x5566 */
+ 0x352999AA, /* ori $t1, 0x99aa */
+ 0x3C0ABF80, /* lui $t2, 0xbf80 */
+ 0x354AF400, /* ori $t2, 0xf400 */
+ 0x340B4003, /* ori $t3, $zero, 0x4003 */
+ 0x340C8000, /* ori $t4, $zero, 0x8000 */
+ /* write_row: */
+ 0x2CD30080, /* sltiu $s3, $a2, 128 */
+ 0x16600008, /* bne $s3, $zero, write_word */
+ 0x340D4000, /* ori $t5, $zero, 0x4000 */
+ 0xAD450020, /* sw $a1, 32($t2) */
+ 0xAD440040, /* sw $a0, 64($t2) */
+ 0x04110016, /* bal progflash */
+ 0x24840200, /* addiu $a0, $a0, 512 */
+ 0x24A50200, /* addiu $a1, $a1, 512 */
+ 0x1000FFF7, /* beq $zero, $zero, write_row */
+ 0x24C6FF80, /* addiu $a2, $a2, -128 */
+ /* write_word: */
+ 0x3C15A000, /* lui $s5, 0xa000 */
+ 0x36B50000, /* ori $s5, $s5, 0x0 */
+ 0x00952025, /* or $a0, $a0, $s5 */
+ 0x10000008, /* beq $zero, $zero, next_word */
+ 0x340B4001, /* ori $t3, $zero, 0x4001 */
+ /* prog_word: */
+ 0x8C940000, /* lw $s4, 0($a0) */
+ 0xAD540030, /* sw $s4, 48($t2) */
+ 0xAD450020, /* sw $a1, 32($t2) */
+ 0x04110009, /* bal progflash */
+ 0x24840004, /* addiu $a0, $a0, 4 */
+ 0x24A50004, /* addiu $a1, $a1, 4 */
+ 0x24C6FFFF, /* addiu $a2, $a2, -1 */
+ /* next_word: */
+ 0x14C0FFF8, /* bne $a2, $zero, prog_word */
+ 0x00000000, /* nop */
+ /* done: */
+ 0x10000002, /* beq $zero, $zero, exit */
+ 0x24040000, /* addiu $a0, $zero, 0 */
+ /* error: */
+ 0x26240000, /* addiu $a0, $s1, 0 */
+ /* exit: */
+ 0x7000003F, /* sdbbp */
+ /* progflash: */
+ 0xAD4B0000, /* sw $t3, 0($t2) */
+ 0xAD480010, /* sw $t0, 16($t2) */
+ 0xAD490010, /* sw $t1, 16($t2) */
+ 0xAD4C0008, /* sw $t4, 8($t2) */
+ /* waitflash: */
+ 0x8D500000, /* lw $s0, 0($t2) */
+ 0x020C8024, /* and $s0, $s0, $t4 */
+ 0x1600FFFD, /* bne $s0, $zero, waitflash */
+ 0x00000000, /* nop */
+ 0x00000000, /* nop */
+ 0x00000000, /* nop */
+ 0x00000000, /* nop */
+ 0x00000000, /* nop */
+ 0x8D510000, /* lw $s1, 0($t2) */
+ 0x30113000, /* andi $s1, $zero, 0x3000 */
+ 0x1620FFEF, /* bne $s1, $zero, error */
+ 0xAD4D0004, /* sw $t5, 4($t2) */
+ 0x03E00008, /* jr $ra */
+ 0x00000000 /* nop */
+};
+
+static int pic32mx_write_block(struct flash_bank *bank, uint8_t *buffer,
+ uint32_t offset, uint32_t count)
{
struct target *target = bank->target;
- uint32_t buffer_size = 512;
+ uint32_t buffer_size = 16384;
struct working_area *source;
uint32_t address = bank->base + offset;
+ struct reg_param reg_params[3];
int retval = ERROR_OK;
-#if 0
+
struct pic32mx_flash_bank *pic32mx_info = bank->driver_priv;
- struct armv7m_algorithm armv7m_info;
-
- uint8_t pic32mx_flash_write_code[] = {
- /* write: */
- 0xDF, 0xF8, 0x24, 0x40, /* ldr r4, PIC32MX_FLASH_CR */
- 0x09, 0x4D, /* ldr r5, PIC32MX_FLASH_SR */
- 0x4F, 0xF0, 0x01, 0x03, /* mov r3, #1 */
- 0x23, 0x60, /* str r3, [r4, #0] */
- 0x30, 0xF8, 0x02, 0x3B, /* ldrh r3, [r0], #2 */
- 0x21, 0xF8, 0x02, 0x3B, /* strh r3, [r1], #2 */
- /* busy: */
- 0x2B, 0x68, /* ldr r3, [r5, #0] */
- 0x13, 0xF0, 0x01, 0x0F, /* tst r3, #0x01 */
- 0xFB, 0xD0, /* beq busy */
- 0x13, 0xF0, 0x14, 0x0F, /* tst r3, #0x14 */
- 0x01, 0xD1, /* bne exit */
- 0x01, 0x3A, /* subs r2, r2, #1 */
- 0xED, 0xD1, /* bne write */
- /* exit: */
- 0xFE, 0xE7, /* b exit */
- 0x10, 0x20, 0x02, 0x40, /* PIC32MX_FLASH_CR: .word 0x40022010 */
- 0x0C, 0x20, 0x02, 0x40 /* PIC32MX_FLASH_SR: .word 0x4002200C */
- };
+ struct mips32_algorithm mips32_info;
/* flash write code */
- if (target_alloc_working_area(target, sizeof(pic32mx_flash_write_code), &pic32mx_info->write_algorithm) != ERROR_OK)
+ if (target_alloc_working_area(target, sizeof(pic32mx_flash_write_code),
+ &pic32mx_info->write_algorithm) != ERROR_OK)
{
LOG_WARNING("no working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
};
- if ((retval = target_write_buffer(target, pic32mx_info->write_algorithm->address, sizeof(pic32mx_flash_write_code), pic32mx_flash_write_code)) != ERROR_OK)
+ if ((retval = target_write_buffer(target,
+ pic32mx_info->write_algorithm->address,
+ sizeof(pic32mx_flash_write_code),
+ (uint8_t*)pic32mx_flash_write_code)) != ERROR_OK)
return retval;
-#endif
/* memory buffer */
- if (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK)
+ while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK)
{
-#if 0
- /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
- if (pic32mx_info->write_algorithm)
- target_free_working_area(target, pic32mx_info->write_algorithm);
-#endif
+ buffer_size /= 2;
+ if (buffer_size <= 256)
+ {
+ /* if we already allocated the writing code, but failed to get a
+ * buffer, free the algorithm */
+ if (pic32mx_info->write_algorithm)
+ target_free_working_area(target, pic32mx_info->write_algorithm);
- LOG_WARNING("no large enough working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
+ LOG_WARNING("no large enough working area available, can't do block memory writes");
+ return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+ }
+ };
+
+ mips32_info.common_magic = MIPS32_COMMON_MAGIC;
+ mips32_info.isa_mode = MIPS32_ISA_MIPS32;
- while (count >= buffer_size/4)
+ init_reg_param(®_params[0], "a0", 32, PARAM_IN_OUT);
+ init_reg_param(®_params[1], "a1", 32, PARAM_OUT);
+ init_reg_param(®_params[2], "a2", 32, PARAM_OUT);
+
+ while (count > 0)
{
uint32_t status;
+ uint32_t thisrun_count = (count > (buffer_size / 4)) ?
+ (buffer_size / 4) : count;
- if ((retval = target_write_buffer(target, source->address, buffer_size, buffer)) != ERROR_OK) {
- LOG_ERROR("Failed to write row buffer (%d words) to RAM", (int)(buffer_size/4));
+ if ((retval = target_write_buffer(target, source->address,
+ thisrun_count * 4, buffer)) != ERROR_OK)
break;
- }
-#if 0
- buf_set_u32(reg_params[0].value, 0, 32, source->address);
- buf_set_u32(reg_params[1].value, 0, 32, address);
- buf_set_u32(reg_params[2].value, 0, 32, buffer_size/4);
+ buf_set_u32(reg_params[0].value, 0, 32, Virt2Phys(source->address));
+ buf_set_u32(reg_params[1].value, 0, 32, Virt2Phys(address));
+ buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
- if ((retval = target_run_algorithm(target, 0, NULL, 4, reg_params, pic32mx_info->write_algorithm->address, \
- pic32mx_info->write_algorithm->address + (sizeof(pic32mx_flash_write_code) - 10), 10000, &armv7m_info)) != ERROR_OK)
+ if ((retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
+ pic32mx_info->write_algorithm->address,
+ pic32mx_info->write_algorithm->address + (sizeof(pic32mx_flash_write_code) - 76),
+ 10000, &mips32_info)) != ERROR_OK)
{
LOG_ERROR("error executing pic32mx flash write algorithm");
retval = ERROR_FLASH_OPERATION_FAILED;
break;
}
- if (buf_get_u32(reg_params[3].value, 0, 32) & 0x14)
+ status = buf_get_u32(reg_params[0].value, 0, 32);
+
+ if (status & NVMCON_NVMERR)
{
- retval = ERROR_FLASH_OPERATION_FAILED;
- break;
- }
-#endif
- status = pic32mx_write_row(bank, address, source->address);
- if (status & NVMCON_NVMERR) {
LOG_ERROR("Flash write error NVMERR (status = 0x%08" PRIx32 ")", status);
retval = ERROR_FLASH_OPERATION_FAILED;
break;
}
- if (status & NVMCON_LVDERR) {
+
+ if (status & NVMCON_LVDERR)
+ {
LOG_ERROR("Flash write error LVDERR (status = 0x%08" PRIx32 ")", status);
retval = ERROR_FLASH_OPERATION_FAILED;
break;
}
- buffer += buffer_size;
- address += buffer_size;
- count -= buffer_size/4;
+ buffer += thisrun_count * 4;
+ address += thisrun_count * 4;
+ count -= thisrun_count;
}
target_free_working_area(target, source);
+ target_free_working_area(target, pic32mx_info->write_algorithm);
- while (count > 0)
- {
- uint32_t value;
- memcpy(&value, buffer, sizeof(uint32_t));
-
- uint32_t status = pic32mx_write_word(bank, address, value);
- if (status & NVMCON_NVMERR) {
- LOG_ERROR("Flash write error NVMERR (status = 0x%08" PRIx32 ")", status);
- retval = ERROR_FLASH_OPERATION_FAILED;
- break;
- }
- if (status & NVMCON_LVDERR) {
- LOG_ERROR("Flash write error LVDERR (status = 0x%08" PRIx32 ")", status);
- retval = ERROR_FLASH_OPERATION_FAILED;
- break;
- }
-
- buffer += 4;
- address += 4;
- count--;
- }
+ destroy_reg_param(®_params[0]);
+ destroy_reg_param(®_params[1]);
+ destroy_reg_param(®_params[2]);
return retval;
}
@@ -432,36 +402,12 @@ static int pic32mx_write_word(struct flash_bank *bank, uint32_t address, uint32_
{
struct target *target = bank->target;
- if (bank->base >= PIC32MX_KSEG1_PGM_FLASH)
- target_write_u32(target, PIC32MX_NVMADDR, KS1Virt2Phys(address));
- else
- target_write_u32(target, PIC32MX_NVMADDR, KS0Virt2Phys(address));
+ target_write_u32(target, PIC32MX_NVMADDR, Virt2Phys(address));
target_write_u32(target, PIC32MX_NVMDATA, word);
return pic32mx_nvm_exec(bank, NVMCON_OP_WORD_PROG, 5);
}
-/*
- * Write a 128 word (512 byte) row to flash address from RAM srcaddr.
- */
-static int pic32mx_write_row(struct flash_bank *bank, uint32_t address, uint32_t srcaddr)
-{
- struct target *target = bank->target;
-
- LOG_DEBUG("addr: 0x%08" PRIx32 " srcaddr: 0x%08" PRIx32 "", address, srcaddr);
-
- if (address >= PIC32MX_KSEG1_PGM_FLASH)
- target_write_u32(target, PIC32MX_NVMADDR, KS1Virt2Phys(address));
- else
- target_write_u32(target, PIC32MX_NVMADDR, KS0Virt2Phys(address));
- if (srcaddr >= PIC32MX_KSEG1_RAM)
- target_write_u32(target, PIC32MX_NVMSRCADDR, KS1Virt2Phys(srcaddr));
- else
- target_write_u32(target, PIC32MX_NVMSRCADDR, KS0Virt2Phys(srcaddr));
-
- return pic32mx_nvm_exec(bank, NVMCON_OP_ROW_PROG, 100);
-}
-
static int pic32mx_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
uint32_t words_remaining = (count / 4);
@@ -477,6 +423,9 @@ static int pic32mx_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offs
return ERROR_TARGET_NOT_HALTED;
}
+ LOG_DEBUG("writing to flash at address 0x%08" PRIx32 " at offset 0x%8.8" PRIx32
+ " count: 0x%8.8" PRIx32 "", bank->base, offset, count);
+
if (offset & 0x3)
{
LOG_WARNING("offset 0x%" PRIx32 "breaks required 4-byte alignment", offset);
@@ -515,10 +464,18 @@ static int pic32mx_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offs
memcpy(&value, buffer + bytes_written, sizeof(uint32_t));
status = pic32mx_write_word(bank, address, value);
+
if (status & NVMCON_NVMERR)
+ {
+ LOG_ERROR("Flash write error NVMERR (status = 0x%08" PRIx32 ")", status);
return ERROR_FLASH_OPERATION_FAILED;
+ }
+
if (status & NVMCON_LVDERR)
+ {
+ LOG_ERROR("Flash write error LVDERR (status = 0x%08" PRIx32 ")", status);
return ERROR_FLASH_OPERATION_FAILED;
+ }
bytes_written += 4;
words_remaining--;
@@ -531,10 +488,18 @@ static int pic32mx_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offs
memcpy(&value, buffer + bytes_written, bytes_remaining);
status = pic32mx_write_word(bank, address, value);
+
if (status & NVMCON_NVMERR)
+ {
+ LOG_ERROR("Flash write error NVMERR (status = 0x%08" PRIx32 ")", status);
return ERROR_FLASH_OPERATION_FAILED;
+ }
+
if (status & NVMCON_LVDERR)
+ {
+ LOG_ERROR("Flash write error LVDERR (status = 0x%08" PRIx32 ")", status);
return ERROR_FLASH_OPERATION_FAILED;
+ }
}
return ERROR_OK;
@@ -547,70 +512,60 @@ static int pic32mx_probe(struct flash_bank *bank)
struct mips32_common *mips32 = target->arch_info;
struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
int i;
- uint16_t num_pages = 0;
+ uint32_t num_pages = 0;
uint32_t device_id;
int page_size;
pic32mx_info->probed = 0;
device_id = ejtag_info->idcode;
- LOG_INFO("device id = 0x%08" PRIx32 " (manuf 0x%03x dev 0x%02x, ver 0x%03x)",
+ LOG_INFO("device id = 0x%08" PRIx32 " (manuf 0x%03x dev 0x%02x, ver 0x%02x)",
device_id,
- (unsigned)((device_id >> 1)&0x7ff),
- (unsigned)((device_id >> 12)&0xff),
- (unsigned)((device_id >> 20)&0xfff));
+ (unsigned)((device_id >> 1) & 0x7ff),
+ (unsigned)((device_id >> 12) & 0xff),
+ (unsigned)((device_id >> 28) & 0xf));
- if (((device_id >> 1)&0x7ff) != PIC32MX_MANUF_ID) {
+ if (((device_id >> 1) & 0x7ff) != PIC32MX_MANUF_ID) {
LOG_WARNING("Cannot identify target as a PIC32MX family.");
return ERROR_FLASH_OPERATION_FAILED;
}
page_size = 4096;
- if (bank->base == PIC32MX_KSEG1_BOOT_FLASH || bank->base == 1) {
- /* 0xBFC00000: Boot flash size fixed at 12k */
- num_pages = 12;
- } else {
- /* 0xBD000000: Program flash size varies with device */
- for (i = 0; pic32mx_devs[i].name != NULL; i++)
- if (pic32mx_devs[i].devid == ((device_id >> 12) & 0xff)) {
- num_pages = pic32mx_devs[i].pfm_size;
- break;
- }
- if (pic32mx_devs[i].name == NULL) {
- LOG_WARNING("Cannot identify target as a PIC32MX family.");
- return ERROR_FLASH_OPERATION_FAILED;
- }
- }
-#if 0
- if (bank->target->state != TARGET_HALTED)
+ if (Virt2Phys(bank->base) == PIC32MX_PHYS_BOOT_FLASH)
{
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
+ /* 0x1FC00000: Boot flash size */
+#if 0
+ /* for some reason this register returns 8k for the boot bank size
+ * this does not match the docs, so for now set the boot bank at a
+ * fixed 12k */
+ if (target_read_u32(target, PIC32MX_BMXBOOTSZ, &num_pages) != ERROR_OK) {
+ LOG_WARNING("PIC32MX flash size failed, probe inaccurate - assuming 12k flash");
+ num_pages = (12 * 1024);
+ }
+#else
+ /* fixed 12k boot bank - see comments above */
+ num_pages = (12 * 1024);
+#endif
}
-
- /* get flash size from target */
- if (target_read_u16(target, 0x1FFFF7E0, &num_pages) != ERROR_OK)
+ else
{
- /* failed reading flash size, default to max target family */
- num_pages = 0xffff;
+ /* read the flash size from the device */
+ if (target_read_u32(target, PIC32MX_BMXPFMSZ, &num_pages) != ERROR_OK) {
+ LOG_WARNING("PIC32MX flash size failed, probe inaccurate - assuming 512k flash");
+ num_pages = (512 * 1024);
+ }
}
-#endif
- LOG_INFO("flash size = %dkbytes", num_pages);
+ LOG_INFO("flash size = %dkbytes", num_pages / 1024);
/* calculate numbers of pages */
- num_pages /= (page_size / 1024);
-
- if (bank->base == 0) bank->base = PIC32MX_KSEG1_PGM_FLASH;
- if (bank->base == 1) bank->base = PIC32MX_KSEG1_BOOT_FLASH;
+ num_pages /= page_size;
bank->size = (num_pages * page_size);
bank->num_sectors = num_pages;
- bank->chip_width = 4;
- bank->bus_width = 4;
bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
- for (i = 0; i < num_pages; i++)
+ for (i = 0; i < (int)num_pages; i++)
{
bank->sectors[i].offset = i * page_size;
bank->sectors[i].size = page_size;
@@ -631,13 +586,6 @@ static int pic32mx_auto_probe(struct flash_bank *bank)
return pic32mx_probe(bank);
}
-#if 0
-COMMAND_HANDLER(pic32mx_handle_part_id_command)
-{
- return ERROR_OK;
-}
-#endif
-
static int pic32mx_info(struct flash_bank *bank, char *buf, int buf_size)
{
struct target *target = bank->target;
@@ -648,198 +596,30 @@ static int pic32mx_info(struct flash_bank *bank, char *buf, int buf_size)
device_id = ejtag_info->idcode;
- if (((device_id >> 1)&0x7ff) != PIC32MX_MANUF_ID) {
+ if (((device_id >> 1) & 0x7ff) != PIC32MX_MANUF_ID) {
snprintf(buf, buf_size,
"Cannot identify target as a PIC32MX family (manufacturer 0x%03d != 0x%03d)\n",
- (unsigned)((device_id >> 1)&0x7ff),
+ (unsigned)((device_id >> 1) & 0x7ff),
PIC32MX_MANUF_ID);
return ERROR_FLASH_OPERATION_FAILED;
}
+
for (i = 0; pic32mx_devs[i].name != NULL; i++)
+ {
if (pic32mx_devs[i].devid == ((device_id >> 12) & 0xff)) {
printed = snprintf(buf, buf_size, "PIC32MX%s", pic32mx_devs[i].name);
break;
}
- if (pic32mx_devs[i].name == NULL) {
- snprintf(buf, buf_size, "Cannot identify target as a PIC32MX family\n");
- return ERROR_FLASH_OPERATION_FAILED;
}
- buf += printed;
- buf_size -= printed;
- printed = snprintf(buf, buf_size, " Ver: 0x%03x",
- (unsigned)((device_id >> 20)&0xfff));
-
- return ERROR_OK;
-}
-
-#if 0
-COMMAND_HANDLER(pic32mx_handle_lock_command)
-{
- struct target *target = NULL;
- struct pic32mx_flash_bank *pic32mx_info = NULL;
-
- if (CMD_ARGC < 1)
- {
- command_print(CMD_CTX, "pic32mx lock <bank>");
- return ERROR_OK;
- }
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- pic32mx_info = bank->driver_priv;
-
- target = bank->target;
-
- if (target->state != TARGET_HALTED)
- {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (pic32mx_erase_options(bank) != ERROR_OK)
- {
- command_print(CMD_CTX, "pic32mx failed to erase options");
- return ERROR_OK;
- }
-
- /* set readout protection */
- pic32mx_info->option_bytes.RDP = 0;
-
- if (pic32mx_write_options(bank) != ERROR_OK)
- {
- command_print(CMD_CTX, "pic32mx failed to lock device");
- return ERROR_OK;
- }
-
- command_print(CMD_CTX, "pic32mx locked");
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(pic32mx_handle_unlock_command)
-{
- struct target *target = NULL;
- struct pic32mx_flash_bank *pic32mx_info = NULL;
-
- if (CMD_ARGC < 1)
- {
- command_print(CMD_CTX, "pic32mx unlock <bank>");
- return ERROR_OK;
- }
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
- pic32mx_info = bank->driver_priv;
-
- target = bank->target;
-
- if (target->state != TARGET_HALTED)
- {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (pic32mx_erase_options(bank) != ERROR_OK)
- {
- command_print(CMD_CTX, "pic32mx failed to unlock device");
- return ERROR_OK;
- }
-
- if (pic32mx_write_options(bank) != ERROR_OK)
- {
- command_print(CMD_CTX, "pic32mx failed to lock device");
- return ERROR_OK;
- }
-
- command_print(CMD_CTX, "pic32mx unlocked");
-
- return ERROR_OK;
-}
-#endif
-
-#if 0
-static int pic32mx_chip_erase(struct flash_bank *bank)
-{
- struct target *target = bank->target;
-#if 0
- uint32_t status;
-#endif
-
- if (target->state != TARGET_HALTED)
- {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- LOG_INFO("PIC32MX chip erase called");
-
-#if 0
- /* unlock option flash registers */
- target_write_u32(target, PIC32MX_FLASH_KEYR, KEY1);
- target_write_u32(target, PIC32MX_FLASH_KEYR, KEY2);
-
- /* chip erase flash memory */
- target_write_u32(target, PIC32MX_FLASH_CR, FLASH_MER);
- target_write_u32(target, PIC32MX_FLASH_CR, FLASH_MER | FLASH_STRT);
-
- status = pic32mx_wait_status_busy(bank, 10);
-
- target_write_u32(target, PIC32MX_FLASH_CR, FLASH_LOCK);
-
- if (status & FLASH_WRPRTERR)
- {
- LOG_ERROR("pic32mx device protected");
- return ERROR_OK;
- }
-
- if (status & FLASH_PGERR)
- {
- LOG_ERROR("pic32mx device programming failed");
- return ERROR_OK;
- }
-#endif
-
- return ERROR_OK;
-}
-#endif
-
-COMMAND_HANDLER(pic32mx_handle_chip_erase_command)
-{
-#if 0
- int i;
-
- if (CMD_ARGC != 0)
- {
- command_print(CMD_CTX, "pic32mx chip_erase");
- return ERROR_OK;
+ if (pic32mx_devs[i].name == NULL) {
+ printed = snprintf(buf, buf_size, "Unknown");
}
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- if (pic32mx_chip_erase(bank) == ERROR_OK)
- {
- /* set all sectors as erased */
- for (i = 0; i < bank->num_sectors; i++)
- {
- bank->sectors[i].is_erased = 1;
- }
-
- command_print(CMD_CTX, "pic32mx chip erase complete");
- }
- else
- {
- command_print(CMD_CTX, "pic32mx chip erase failed");
- }
-#endif
+ buf += printed;
+ buf_size -= printed;
+ printed = snprintf(buf, buf_size, " Ver: 0x%02x",
+ (unsigned)((device_id >> 28) & 0xf));
return ERROR_OK;
}
@@ -883,14 +663,9 @@ COMMAND_HANDLER(pic32mx_handle_pgm_word_command)
return ERROR_OK;
}
+
static const struct command_registration pic32mx_exec_command_handlers[] = {
{
- .name = "chip_erase",
- .handler = pic32mx_handle_chip_erase_command,
- .mode = COMMAND_EXEC,
- .help = "erase device",
- },
- {
.name = "pgm_word",
.handler = pic32mx_handle_pgm_word_command,
.mode = COMMAND_EXEC,
@@ -898,6 +673,7 @@ static const struct command_registration pic32mx_exec_command_handlers[] = {
},
COMMAND_REGISTRATION_DONE
};
+
static const struct command_registration pic32mx_command_handlers[] = {
{
.name = "pic32mx",
diff --git a/src/flash/nor/pic32mx.h b/src/flash/nor/pic32mx.h
index b3bdad2..79fa40e 100644
--- a/src/flash/nor/pic32mx.h
+++ b/src/flash/nor/pic32mx.h
@@ -29,8 +29,6 @@
struct pic32mx_flash_bank
{
struct working_area *write_algorithm;
- int devid;
- int ppage_size;
int probed;
};
@@ -38,18 +36,6 @@ struct pic32mx_flash_bank
/* pic32mx memory locations */
-#define PIC32MX_KUSEG_PGM_FLASH 0x7D000000
-#define PIC32MX_KUSEG_RAM 0x7F000000
-
-#define PIC32MX_KSEG0_RAM 0x80000000
-#define PIC32MX_KSEG0_PGM_FLASH 0x9D000000
-#define PIC32MX_KSEG0_BOOT_FLASH 0x9FC00000
-
-#define PIC32MX_KSEG1_RAM 0xA0000000
-#define PIC32MX_KSEG1_PGM_FLASH 0xBD000000
-#define PIC32MX_KSEG1_PERIPHERAL 0xBF800000
-#define PIC32MX_KSEG1_BOOT_FLASH 0xBFC00000
-
#define PIC32MX_PHYS_RAM 0x00000000
#define PIC32MX_PHYS_PGM_FLASH 0x1D000000
#define PIC32MX_PHYS_PERIPHERALS 0x1F800000
@@ -59,19 +45,21 @@ struct pic32mx_flash_bank
* Translate Virtual and Physical addresses.
* Note: These macros only work for KSEG0/KSEG1 addresses.
*/
-#define KS1Virt2Phys(vaddr) ((vaddr)-0xA0000000)
-#define Phys2KS1Virt(paddr) ((paddr) + 0xA0000000)
-#define KS0Virt2Phys(vaddr) ((vaddr)-0x80000000)
-#define Phys2KS0Virt(paddr) ((paddr) + 0x80000000)
+
+#define Virt2Phys(v) ((v) & 0x1FFFFFFF)
/* pic32mx configuration register locations */
#define PIC32MX_DEVCFG0 0xBFC02FFC
#define PIC32MX_DEVCFG1 0xBFC02FF8
#define PIC32MX_DEVCFG2 0xBFC02FF4
-#define PIC32MX_DEVCFG3 0XBFC02FF0
+#define PIC32MX_DEVCFG3 0xBFC02FF0
#define PIC32MX_DEVID 0xBF80F220
+#define PIC32MX_BMXPFMSZ 0xBF882060
+#define PIC32MX_BMXBOOTSZ 0xBF882070
+#define PIC32MX_BMXDRMSZ 0xBF882040
+
/* pic32mx flash controller register locations */
#define PIC32MX_NVMCON 0xBF80F400
@@ -102,10 +90,5 @@ struct pic32mx_flash_bank
#define NVMKEY1 0xAA996655
#define NVMKEY2 0x556699AA
-struct pic32mx_mem_layout {
- uint32_t sector_start;
- uint32_t sector_size;
-};
-
#endif /* PIC32MX_H */
diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c
index f20c69e..bcba0f1 100644
--- a/src/target/mips32_pracc.c
+++ b/src/target/mips32_pracc.c
@@ -969,7 +969,7 @@ int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_are
/* write program into RAM */
mips32_pracc_write_mem32(ejtag_info, source->address, ARRAY_SIZE(handler_code), handler_code);
- LOG_DEBUG("%s using 0x%.8" PRIx32 " for write handler\n", __func__, source->address);
+ LOG_DEBUG("%s using 0x%.8" PRIx32 " for write handler", __func__, source->address);
jmp_code[1] |= UPPER16(source->address);
jmp_code[2] |= LOWER16(source->address);
@@ -1030,7 +1030,7 @@ int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_are
mips_ejtag_drscan_32(ejtag_info, &address);
if (address != MIPS32_PRACC_TEXT)
- LOG_ERROR("mini program did not return to start\n");
+ LOG_ERROR("mini program did not return to start");
return retval;
}
diff --git a/src/target/mips_ejtag.h b/src/target/mips_ejtag.h
index 2f62f2b..5c1f245 100644
--- a/src/target/mips_ejtag.h
+++ b/src/target/mips_ejtag.h
@@ -40,6 +40,10 @@
#define EJTAG_INST_TCBDATA 0x12
#define EJTAG_INST_BYPASS 0xFF
+/* microchip PIC32MX specific instructions */
+#define MTAP_SW_MTAP 0x04
+#define MTAP_SW_ETAP 0x05
+
/* ejtag control register bits ECR */
#define EJTAG_CTRL_TOF (1 << 1)
#define EJTAG_CTRL_TIF (1 << 2)
diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index f581ddf..389daf9 100644
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -914,7 +914,7 @@ int mips_m4k_examine(struct target *target)
{
/* we are using a pic32mx so select ejtag port
* as it is not selected by default */
- mips_ejtag_set_instr(ejtag_info, 0x05, NULL);
+ mips_ejtag_set_instr(ejtag_info, MTAP_SW_ETAP, NULL);
LOG_DEBUG("PIC32MX Detected - using EJTAG Interface");
}
}
diff --git a/tcl/target/pic32mx.cfg b/tcl/target/pic32mx.cfg
index 1561d73..0f1fa66 100644
--- a/tcl/target/pic32mx.cfg
+++ b/tcl/target/pic32mx.cfg
@@ -18,6 +18,14 @@ if { [info exists CPUTAPID ] } {
set _CPUTAPID 0x30938053
}
+# working area is 16384 - 2048
+# loose first 2048 bytes due to BMXDKPBA reg
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE [expr (16384 - 2048)]
+}
+
jtag_nsrst_delay 100
jtag_ntrst_delay 100
@@ -26,12 +34,12 @@ reset_config srst_only
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
+jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME mips_m4k -endian $_ENDIAN -chain-position $_TARGETNAME
-$_TARGETNAME configure -work-area-phys 0xa0000800 -work-area-size 16384 -work-area-backup 0
+$_TARGETNAME configure -work-area-phys 0xa0000800 -work-area-size $_WORKAREASIZE -work-area-backup 0
$_TARGETNAME configure -event reset-init {
#
@@ -50,9 +58,9 @@ $_TARGETNAME configure -event reset-init {
}
set _FLASHNAME $_CHIPNAME.flash
-flash bank $_FLASHNAME pic32mx 0xbd000000 0 0 0 $_TARGETNAME
+flash bank $_FLASHNAME pic32mx 0x1fc00000 0 0 0 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
-flash bank $_FLASHNAME pic32mx 0xbfc00000 0 0 0 $_TARGETNAME
+flash bank $_FLASHNAME pic32mx 0x1d000000 0 0 0 $_TARGETNAME
# For more information about the configuration files, take a look at:
# openocd.texi
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/pic32mx.c | 664 +++++++++++++++------------------------------
src/flash/nor/pic32mx.h | 31 +--
src/target/mips32_pracc.c | 4 +-
src/target/mips_ejtag.h | 4 +
src/target/mips_m4k.c | 2 +-
tcl/target/pic32mx.cfg | 16 +-
6 files changed, 246 insertions(+), 475 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: Spencer O. <nt...@us...> - 2010-03-10 21:38:14
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via f10ed95a5ce6be416bcb2ec20826c6e508e4b622 (commit)
via d0a57c0f0c3be172195b12e27b668919488f5d00 (commit)
via 6344f2ab98cf1fd1f92403de46b6e36b3b122ad5 (commit)
via 2946c895a175e586a7f79797e2168c9fd0eddbbe (commit)
from 17d437a7a193e783e8daeb0837e6dad5e6811213 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit f10ed95a5ce6be416bcb2ec20826c6e508e4b622
Author: Spencer Oliver <nt...@us...>
Date: Mon Mar 8 20:32:11 2010 +0000
STM32: flash loader cleanup
- make algorithm array static const.
Signed-off-by: Spencer Oliver <nt...@us...>
diff --git a/src/flash/nor/stm32x.c b/src/flash/nor/stm32x.c
index ebdcde7..845d589 100644
--- a/src/flash/nor/stm32x.c
+++ b/src/flash/nor/stm32x.c
@@ -362,9 +362,11 @@ static int stm32x_protect(struct flash_bank *bank, int set, int first, int last)
return ERROR_TARGET_NOT_HALTED;
}
- if ((first && (first % stm32x_info->ppage_size)) || ((last + 1) && (last + 1) % stm32x_info->ppage_size))
+ if ((first && (first % stm32x_info->ppage_size)) || ((last + 1) &&
+ (last + 1) % stm32x_info->ppage_size))
{
- LOG_WARNING("Error: start and end sectors must be on a %d sector boundary", stm32x_info->ppage_size);
+ LOG_WARNING("Error: start and end sectors must be on a %d sector boundary",
+ stm32x_info->ppage_size);
return ERROR_FLASH_SECTOR_INVALID;
}
@@ -432,7 +434,8 @@ static int stm32x_protect(struct flash_bank *bank, int set, int first, int last)
return stm32x_write_options(bank);
}
-static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
+static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
+ uint32_t offset, uint32_t count)
{
struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
struct target *target = bank->target;
@@ -443,7 +446,7 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t
struct armv7m_algorithm armv7m_info;
int retval = ERROR_OK;
- uint8_t stm32x_flash_write_code[] = {
+ static const uint8_t stm32x_flash_write_code[] = {
/* write: */
0xDF, 0xF8, 0x24, 0x40, /* ldr r4, STM32_FLASH_CR */
0x09, 0x4D, /* ldr r5, STM32_FLASH_SR */
@@ -465,13 +468,16 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t
};
/* flash write code */
- if (target_alloc_working_area(target, sizeof(stm32x_flash_write_code), &stm32x_info->write_algorithm) != ERROR_OK)
+ if (target_alloc_working_area(target, sizeof(stm32x_flash_write_code),
+ &stm32x_info->write_algorithm) != ERROR_OK)
{
LOG_WARNING("no working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
};
- if ((retval = target_write_buffer(target, stm32x_info->write_algorithm->address, sizeof(stm32x_flash_write_code), stm32x_flash_write_code)) != ERROR_OK)
+ if ((retval = target_write_buffer(target, stm32x_info->write_algorithm->address,
+ sizeof(stm32x_flash_write_code),
+ (uint8_t*)stm32x_flash_write_code)) != ERROR_OK)
return retval;
/* memory buffer */
@@ -480,7 +486,8 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t
buffer_size /= 2;
if (buffer_size <= 256)
{
- /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
+ /* if we already allocated the writing code, but failed to get a
+ * buffer, free the algorithm */
if (stm32x_info->write_algorithm)
target_free_working_area(target, stm32x_info->write_algorithm);
@@ -499,17 +506,21 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t
while (count > 0)
{
- uint32_t thisrun_count = (count > (buffer_size / 2)) ? (buffer_size / 2) : count;
+ uint32_t thisrun_count = (count > (buffer_size / 2)) ?
+ (buffer_size / 2) : count;
- if ((retval = target_write_buffer(target, source->address, thisrun_count * 2, buffer)) != ERROR_OK)
+ if ((retval = target_write_buffer(target, source->address,
+ thisrun_count * 2, buffer)) != ERROR_OK)
break;
buf_set_u32(reg_params[0].value, 0, 32, source->address);
buf_set_u32(reg_params[1].value, 0, 32, address);
buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
- if ((retval = target_run_algorithm(target, 0, NULL, 4, reg_params, stm32x_info->write_algorithm->address, \
- stm32x_info->write_algorithm->address + (sizeof(stm32x_flash_write_code) - 10), 10000, &armv7m_info)) != ERROR_OK)
+ if ((retval = target_run_algorithm(target, 0, NULL, 4, reg_params,
+ stm32x_info->write_algorithm->address,
+ stm32x_info->write_algorithm->address + (sizeof(stm32x_flash_write_code) - 10),
+ 10000, &armv7m_info)) != ERROR_OK)
{
LOG_ERROR("error executing stm32x flash write algorithm");
retval = ERROR_FLASH_OPERATION_FAILED;
@@ -550,7 +561,8 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t
return retval;
}
-static int stm32x_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
+static int stm32x_write(struct flash_bank *bank, uint8_t *buffer,
+ uint32_t offset, uint32_t count)
{
struct target *target = bank->target;
uint32_t words_remaining = (count / 2);
@@ -1269,6 +1281,7 @@ static const struct command_registration stm32x_exec_command_handlers[] = {
},
COMMAND_REGISTRATION_DONE
};
+
static const struct command_registration stm32x_command_handlers[] = {
{
.name = "stm32x",
commit d0a57c0f0c3be172195b12e27b668919488f5d00
Author: Spencer Oliver <nt...@us...>
Date: Mon Mar 8 20:31:50 2010 +0000
STR7: flash loader cleanup
- make algorithm array static const.
- increase algorithm buffer size to 32k.
Signed-off-by: Spencer Oliver <nt...@us...>
diff --git a/src/flash/nor/str7x.c b/src/flash/nor/str7x.c
index 3bf07c9..fa1744c 100644
--- a/src/flash/nor/str7x.c
+++ b/src/flash/nor/str7x.c
@@ -316,18 +316,19 @@ static int str7x_protect(struct flash_bank *bank, int set, int first, int last)
return ERROR_OK;
}
-static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
+static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer,
+ uint32_t offset, uint32_t count)
{
struct str7x_flash_bank *str7x_info = bank->driver_priv;
struct target *target = bank->target;
- uint32_t buffer_size = 8192;
+ uint32_t buffer_size = 32768;
struct working_area *source;
uint32_t address = bank->base + offset;
struct reg_param reg_params[6];
struct arm_algorithm armv4_5_info;
int retval = ERROR_OK;
- uint32_t str7x_flash_write_code[] = {
+ static const uint32_t str7x_flash_write_code[] = {
/* write: */
0xe3a04201, /* mov r4, #0x10000000 */
0xe5824000, /* str r4, [r2, #0x0] */
@@ -354,13 +355,16 @@ static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t
};
/* flash write code */
- if (target_alloc_working_area(target, 4 * 20, &str7x_info->write_algorithm) != ERROR_OK)
+ if (target_alloc_working_area(target, sizeof(str7x_flash_write_code),
+ &str7x_info->write_algorithm) != ERROR_OK)
{
LOG_WARNING("no working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
};
- target_write_buffer(target, str7x_info->write_algorithm->address, 20 * 4, (uint8_t*)str7x_flash_write_code);
+ target_write_buffer(target, str7x_info->write_algorithm->address,
+ sizeof(str7x_flash_write_code),
+ (uint8_t*)str7x_flash_write_code);
/* memory buffer */
while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK)
@@ -368,7 +372,8 @@ static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t
buffer_size /= 2;
if (buffer_size <= 256)
{
- /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
+ /* if we already allocated the writing code, but failed to get a
+ * buffer, free the algorithm */
if (str7x_info->write_algorithm)
target_free_working_area(target, str7x_info->write_algorithm);
@@ -400,7 +405,10 @@ static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t
buf_set_u32(reg_params[3].value, 0, 32, thisrun_count);
buf_set_u32(reg_params[5].value, 0, 32, str7x_info->busy_bits);
- if ((retval = target_run_algorithm(target, 0, NULL, 6, reg_params, str7x_info->write_algorithm->address, str7x_info->write_algorithm->address + (19 * 4), 10000, &armv4_5_info)) != ERROR_OK)
+ if ((retval = target_run_algorithm(target, 0, NULL, 6, reg_params,
+ str7x_info->write_algorithm->address,
+ str7x_info->write_algorithm->address + (sizeof(str7x_flash_write_code) - 4),
+ 10000, &armv4_5_info)) != ERROR_OK)
{
LOG_ERROR("error executing str7x flash write algorithm");
retval = ERROR_FLASH_OPERATION_FAILED;
@@ -431,7 +439,8 @@ static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t
return retval;
}
-static int str7x_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
+static int str7x_write(struct flash_bank *bank, uint8_t *buffer,
+ uint32_t offset, uint32_t count)
{
struct target *target = bank->target;
struct str7x_flash_bank *str7x_info = bank->driver_priv;
@@ -482,7 +491,8 @@ static int str7x_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset
if (dwords_remaining > 0)
{
/* try using a block write */
- if ((retval = str7x_write_block(bank, buffer, offset, dwords_remaining)) != ERROR_OK)
+ if ((retval = str7x_write_block(bank, buffer, offset,
+ dwords_remaining)) != ERROR_OK)
{
if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
{
@@ -517,11 +527,13 @@ static int str7x_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset
target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), address);
/* data word 1 */
- target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR0), 4, 1, buffer + bytes_written);
+ target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR0),
+ 4, 1, buffer + bytes_written);
bytes_written += 4;
/* data word 2 */
- target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR1), 4, 1, buffer + bytes_written);
+ target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR1),
+ 4, 1, buffer + bytes_written);
bytes_written += 4;
/* start programming cycle */
@@ -564,11 +576,13 @@ static int str7x_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset
target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), address);
/* data word 1 */
- target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR0), 4, 1, last_dword);
+ target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR0),
+ 4, 1, last_dword);
bytes_written += 4;
/* data word 2 */
- target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR1), 4, 1, last_dword + 4);
+ target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR1),
+ 4, 1, last_dword + 4);
bytes_written += 4;
/* start programming cycle */
@@ -677,7 +691,8 @@ COMMAND_HANDLER(str7x_handle_disable_jtag_command)
flash_cmd = FLASH_SPR;
target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), flash_cmd);
target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), 0x4010DFBC);
- target_write_u32(target, str7x_get_flash_adr(bank, FLASH_DR0), ~(1 << (15 + ProtectionLevel)));
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_DR0),
+ ~(1 << (15 + ProtectionLevel)));
flash_cmd = FLASH_SPR | FLASH_WMS;
target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), flash_cmd);
}
@@ -694,6 +709,7 @@ static const struct command_registration str7x_exec_command_handlers[] = {
},
COMMAND_REGISTRATION_DONE
};
+
static const struct command_registration str7x_command_handlers[] = {
{
.name = "str7x",
commit 6344f2ab98cf1fd1f92403de46b6e36b3b122ad5
Author: Spencer Oliver <nt...@us...>
Date: Mon Mar 8 20:31:25 2010 +0000
STR9: flash loader cleanup
- make algorithm array static const.
- increase algorithm buffer size to 32k.
Signed-off-by: Spencer Oliver <nt...@us...>
diff --git a/src/flash/nor/str9x.c b/src/flash/nor/str9x.c
index 0875851..3d8b84b 100644
--- a/src/flash/nor/str9x.c
+++ b/src/flash/nor/str9x.c
@@ -340,14 +340,14 @@ static int str9x_write_block(struct flash_bank *bank,
{
struct str9x_flash_bank *str9x_info = bank->driver_priv;
struct target *target = bank->target;
- uint32_t buffer_size = 8192;
+ uint32_t buffer_size = 32768;
struct working_area *source;
uint32_t address = bank->base + offset;
struct reg_param reg_params[4];
struct arm_algorithm armv4_5_info;
int retval = ERROR_OK;
- uint32_t str9x_flash_write_code[] = {
+ static const uint32_t str9x_flash_write_code[] = {
/* write: */
0xe3c14003, /* bic r4, r1, #3 */
0xe3a03040, /* mov r3, #0x40 */
@@ -373,13 +373,16 @@ static int str9x_write_block(struct flash_bank *bank,
};
/* flash write code */
- if (target_alloc_working_area(target, 4 * 19, &str9x_info->write_algorithm) != ERROR_OK)
+ if (target_alloc_working_area(target, sizeof(str9x_flash_write_code),
+ &str9x_info->write_algorithm) != ERROR_OK)
{
LOG_WARNING("no working area available, can't do block memory writes");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
};
- target_write_buffer(target, str9x_info->write_algorithm->address, 19 * 4, (uint8_t*)str9x_flash_write_code);
+ target_write_buffer(target, str9x_info->write_algorithm->address,
+ sizeof(str9x_flash_write_code),
+ (uint8_t*)str9x_flash_write_code);
/* memory buffer */
while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK)
@@ -387,7 +390,8 @@ static int str9x_write_block(struct flash_bank *bank,
buffer_size /= 2;
if (buffer_size <= 256)
{
- /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
+ /* if we already allocated the writing code, but failed to get a
+ * buffer, free the algorithm */
if (str9x_info->write_algorithm)
target_free_working_area(target, str9x_info->write_algorithm);
@@ -415,7 +419,10 @@ static int str9x_write_block(struct flash_bank *bank,
buf_set_u32(reg_params[1].value, 0, 32, address);
buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
- if ((retval = target_run_algorithm(target, 0, NULL, 4, reg_params, str9x_info->write_algorithm->address, str9x_info->write_algorithm->address + (18 * 4), 10000, &armv4_5_info)) != ERROR_OK)
+ if ((retval = target_run_algorithm(target, 0, NULL, 4, reg_params,
+ str9x_info->write_algorithm->address,
+ str9x_info->write_algorithm->address + (sizeof(str9x_flash_write_code) - 4),
+ 10000, &armv4_5_info)) != ERROR_OK)
{
LOG_ERROR("error executing str9x flash write algorithm");
retval = ERROR_FLASH_OPERATION_FAILED;
@@ -676,6 +683,7 @@ static const struct command_registration str9x_config_command_handlers[] = {
},
COMMAND_REGISTRATION_DONE
};
+
static const struct command_registration str9x_command_handlers[] = {
{
.name = "str9x",
diff --git a/src/flash/nor/str9xpec.c b/src/flash/nor/str9xpec.c
index b6d24f5..35fe806 100644
--- a/src/flash/nor/str9xpec.c
+++ b/src/flash/nor/str9xpec.c
@@ -551,7 +551,8 @@ static int str9xpec_set_address(struct flash_bank *bank, uint8_t sector)
return ERROR_OK;
}
-static int str9xpec_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
+static int str9xpec_write(struct flash_bank *bank, uint8_t *buffer,
+ uint32_t offset, uint32_t count)
{
struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
uint32_t dwords_remaining = (count / 8);
@@ -619,7 +620,8 @@ static int str9xpec_write(struct flash_bank *bank, uint8_t *buffer, uint32_t off
{
str9xpec_set_address(bank, str9xpec_info->sector_bits[i]);
- dwords_remaining = dwords_remaining < (bank->sectors[i].size/8) ? dwords_remaining : (bank->sectors[i].size/8);
+ dwords_remaining = dwords_remaining < (bank->sectors[i].size/8)
+ ? dwords_remaining : (bank->sectors[i].size/8);
while (dwords_remaining > 0)
{
@@ -1226,6 +1228,7 @@ static const struct command_registration str9xpec_config_command_handlers[] = {
},
COMMAND_REGISTRATION_DONE
};
+
static const struct command_registration str9xpec_command_handlers[] = {
{
.name = "str9xpec",
commit 2946c895a175e586a7f79797e2168c9fd0eddbbe
Author: Spencer Oliver <nt...@us...>
Date: Mon Mar 8 20:30:53 2010 +0000
ADUC702x: flash loader cleanup
- make algorithm array static const.
Signed-off-by: Spencer Oliver <nt...@us...>
diff --git a/src/flash/nor/aduc702x.c b/src/flash/nor/aduc702x.c
index 7e81b32..88072b9 100644
--- a/src/flash/nor/aduc702x.c
+++ b/src/flash/nor/aduc702x.c
@@ -188,7 +188,7 @@ static int aduc702x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32
r6 - set to 2, used to write flash command
*/
- uint32_t aduc702x_flash_write_code[] = {
+ static const uint32_t aduc702x_flash_write_code[] = {
//<_start>:
0xe3a05008, // mov r5, #8 ; 0x8
0xe5845004, // str r5, [r4, #4]
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/aduc702x.c | 2 +-
src/flash/nor/stm32x.c | 37 +++++++++++++++++++++++++------------
src/flash/nor/str7x.c | 44 ++++++++++++++++++++++++++++++--------------
src/flash/nor/str9x.c | 20 ++++++++++++++------
src/flash/nor/str9xpec.c | 7 +++++--
5 files changed, 75 insertions(+), 35 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: Øyvind H. <go...@us...> - 2010-03-09 22:55:02
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 17d437a7a193e783e8daeb0837e6dad5e6811213 (commit)
from c986cc200cb7e0904a200992e1288007aa4c8c07 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 17d437a7a193e783e8daeb0837e6dad5e6811213
Author: Antonio Borneo <bor...@gm...>
Date: Tue Mar 9 00:43:59 2010 +0800
CFI CORE: bug-fix protect single sector
Cannot protect or unprotect single sector in cfi flash.
When first==last the procedure fails.
Signed-off-by: Antonio Borneo <bor...@gm...>
Signed-off-by: Ãyvind Harboe <oyv...@zy...>
diff --git a/src/flash/nor/core.c b/src/flash/nor/core.c
index 767006d..8b581b0 100644
--- a/src/flash/nor/core.c
+++ b/src/flash/nor/core.c
@@ -73,7 +73,7 @@ int flash_driver_protect(struct flash_bank *bank, int set, int first, int last)
* speeds at least some things up.
*/
scan:
- for (int i = first; i < last; i++) {
+ for (int i = first; i <= last; i++) {
struct flash_sector *sector = bank->sectors + i;
/* Only filter requests to protect the already-protected, or
@@ -108,7 +108,7 @@ scan:
}
/* Single sector, already protected? Nothing to do! */
- if (first == last)
+ if (first > last)
return ERROR_OK;
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/core.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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|
From: David B. <dbr...@us...> - 2010-03-09 04:19:26
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via c986cc200cb7e0904a200992e1288007aa4c8c07 (commit)
from fc1063a1b9df5857ee3f1c18f88e5b821b5f0960 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit c986cc200cb7e0904a200992e1288007aa4c8c07
Author: David Brownell <dbr...@us...>
Date: Mon Mar 8 19:10:05 2010 -0800
move a constant table to .rodata section
The table of command registration functions shouldn't be
in writable memory, where stray pointers can clobber it.
Also, it shouldn't be initialized at runtime; that just
consumes needless code space.
Signed-off-by: David Brownell <dbr...@us...>
diff --git a/src/openocd.c b/src/openocd.c
index a689d59..7833606 100644
--- a/src/openocd.c
+++ b/src/openocd.c
@@ -202,7 +202,7 @@ struct command_context *setup_command_handler(Jim_Interp *interp)
/* register subsystem commands */
typedef int (*command_registrant_t)(struct command_context *cmd_ctx);
- command_registrant_t command_registrants[] = {
+ static const command_registrant_t command_registrants[] = {
&openocd_register_commands,
&server_register_commands,
&gdb_register_commands,
-----------------------------------------------------------------------
Summary of changes:
src/openocd.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: Øyvind H. <go...@us...> - 2010-03-08 18:46:44
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via fc1063a1b9df5857ee3f1c18f88e5b821b5f0960 (commit)
from 7a5c9c2f4ae409e09faf12d5b8b76af135a85e73 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit fc1063a1b9df5857ee3f1c18f88e5b821b5f0960
Author: Antonio Borneo <bor...@gm...>
Date: Mon Mar 8 18:31:27 2010 +0100
cfi: simplify and clearify code
At the end I have added comments /* FIXME: to be removed */
There are 3 lines in which my simplification is not complete due to
data dependency with LOG_DEBUG() messages visible in the patch.
Such log_debug has been introduced on Jan 22, 2007 with commit
4fc97d3f2726efa147cfdb0c456eace51550e1e3 during development activity
in this file/procedure.
From my point of view, these logs can be removed, since not part of a
consistent flow of information.
Alternatively, could be borrowed in the new cfi_send_command(), but
this will increase verbosity.
Signed-off-by: Ãyvind Harboe <oyv...@zy...>
diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c
index b0c7b0b..5f7ed1e 100644
--- a/src/flash/nor/cfi.c
+++ b/src/flash/nor/cfi.c
@@ -132,6 +132,14 @@ static void cfi_command(struct flash_bank *bank, uint8_t cmd, uint8_t *cmd_buf)
}
}
+static int cfi_send_command(struct flash_bank *bank, uint8_t cmd, uint32_t address)
+{
+ uint8_t command[CFI_MAX_BUS_WIDTH];
+
+ cfi_command(bank, cmd, command);
+ return target_write_memory(bank->target, address, bank->bus_width, 1, command);
+}
+
/* read unsigned 8-bit value from the bank
* flash banks are expected to be made of similar chips
* the query result should be the same for all
@@ -226,7 +234,6 @@ static uint32_t cfi_query_u32(struct flash_bank *bank, int sector, uint32_t offs
static void cfi_intel_clear_status_register(struct flash_bank *bank)
{
struct target *target = bank->target;
- uint8_t command[8];
if (target->state != TARGET_HALTED)
{
@@ -234,8 +241,7 @@ static void cfi_intel_clear_status_register(struct flash_bank *bank)
exit(-1);
}
- cfi_command(bank, 0x50, command);
- target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
+ cfi_send_command(bank, 0x50, flash_address(bank, 0, 0x0));
}
uint8_t cfi_intel_wait_status_busy(struct flash_bank *bank, int timeout)
@@ -319,8 +325,6 @@ static int cfi_read_intel_pri_ext(struct flash_bank *bank)
int retval;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct cfi_intel_pri_ext *pri_ext = malloc(sizeof(struct cfi_intel_pri_ext));
- struct target *target = bank->target;
- uint8_t command[8];
cfi_info->pri_ext = pri_ext;
@@ -330,13 +334,11 @@ static int cfi_read_intel_pri_ext(struct flash_bank *bank)
if ((pri_ext->pri[0] != 'P') || (pri_ext->pri[1] != 'R') || (pri_ext->pri[2] != 'I'))
{
- cfi_command(bank, 0xf0, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0))) != ERROR_OK)
{
return retval;
}
- cfi_command(bank, 0xff, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0))) != ERROR_OK)
{
return retval;
}
@@ -385,8 +387,6 @@ static int cfi_read_spansion_pri_ext(struct flash_bank *bank)
int retval;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct cfi_spansion_pri_ext *pri_ext = malloc(sizeof(struct cfi_spansion_pri_ext));
- struct target *target = bank->target;
- uint8_t command[8];
cfi_info->pri_ext = pri_ext;
@@ -396,8 +396,7 @@ static int cfi_read_spansion_pri_ext(struct flash_bank *bank)
if ((pri_ext->pri[0] != 'P') || (pri_ext->pri[1] != 'R') || (pri_ext->pri[2] != 'I'))
{
- cfi_command(bank, 0xf0, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0))) != ERROR_OK)
{
return retval;
}
@@ -451,8 +450,6 @@ static int cfi_read_atmel_pri_ext(struct flash_bank *bank)
struct cfi_atmel_pri_ext atmel_pri_ext;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct cfi_spansion_pri_ext *pri_ext = malloc(sizeof(struct cfi_spansion_pri_ext));
- struct target *target = bank->target;
- uint8_t command[8];
/* ATMEL devices use the same CFI primary command set (0x2) as AMD/Spansion,
* but a different primary extended query table.
@@ -469,8 +466,7 @@ static int cfi_read_atmel_pri_ext(struct flash_bank *bank)
if ((atmel_pri_ext.pri[0] != 'P') || (atmel_pri_ext.pri[1] != 'R') || (atmel_pri_ext.pri[2] != 'I'))
{
- cfi_command(bank, 0xf0, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0))) != ERROR_OK)
{
return retval;
}
@@ -647,22 +643,18 @@ static int cfi_intel_erase(struct flash_bank *bank, int first, int last)
{
int retval;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
- struct target *target = bank->target;
- uint8_t command[8];
int i;
cfi_intel_clear_status_register(bank);
for (i = first; i <= last; i++)
{
- cfi_command(bank, 0x20, command);
- if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0x20, flash_address(bank, i, 0x0))) != ERROR_OK)
{
return retval;
}
- cfi_command(bank, 0xd0, command);
- if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xd0, flash_address(bank, i, 0x0))) != ERROR_OK)
{
return retval;
}
@@ -671,8 +663,7 @@ static int cfi_intel_erase(struct flash_bank *bank, int first, int last)
bank->sectors[i].is_erased = 1;
else
{
- cfi_command(bank, 0xff, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0))) != ERROR_OK)
{
return retval;
}
@@ -682,9 +673,7 @@ static int cfi_intel_erase(struct flash_bank *bank, int first, int last)
}
}
- cfi_command(bank, 0xff, command);
- return target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
-
+ return cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0));
}
static int cfi_spansion_erase(struct flash_bank *bank, int first, int last)
@@ -692,44 +681,36 @@ static int cfi_spansion_erase(struct flash_bank *bank, int first, int last)
int retval;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
- struct target *target = bank->target;
- uint8_t command[8];
int i;
for (i = first; i <= last; i++)
{
- cfi_command(bank, 0xaa, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xaa, flash_address(bank, 0, pri_ext->_unlock1))) != ERROR_OK)
{
return retval;
}
- cfi_command(bank, 0x55, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0x55, flash_address(bank, 0, pri_ext->_unlock2))) != ERROR_OK)
{
return retval;
}
- cfi_command(bank, 0x80, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0x80, flash_address(bank, 0, pri_ext->_unlock1))) != ERROR_OK)
{
return retval;
}
- cfi_command(bank, 0xaa, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xaa, flash_address(bank, 0, pri_ext->_unlock1))) != ERROR_OK)
{
return retval;
}
- cfi_command(bank, 0x55, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0x55, flash_address(bank, 0, pri_ext->_unlock2))) != ERROR_OK)
{
return retval;
}
- cfi_command(bank, 0x30, command);
- if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0x30, flash_address(bank, i, 0x0))) != ERROR_OK)
{
return retval;
}
@@ -738,8 +719,7 @@ static int cfi_spansion_erase(struct flash_bank *bank, int first, int last)
bank->sectors[i].is_erased = 1;
else
{
- cfi_command(bank, 0xf0, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0))) != ERROR_OK)
{
return retval;
}
@@ -749,8 +729,7 @@ static int cfi_spansion_erase(struct flash_bank *bank, int first, int last)
}
}
- cfi_command(bank, 0xf0, command);
- return target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
+ return cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0));
}
static int cfi_erase(struct flash_bank *bank, int first, int last)
@@ -793,8 +772,8 @@ static int cfi_intel_protect(struct flash_bank *bank, int set, int first, int la
int retval;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct cfi_intel_pri_ext *pri_ext = cfi_info->pri_ext;
- struct target *target = bank->target;
- uint8_t command[8];
+ struct target *target = bank->target; /* FIXME: to be removed */
+ uint8_t command[CFI_MAX_BUS_WIDTH]; /* FIXME: to be removed */
int retry = 0;
int i;
@@ -808,17 +787,17 @@ static int cfi_intel_protect(struct flash_bank *bank, int set, int first, int la
for (i = first; i <= last; i++)
{
- cfi_command(bank, 0x60, command);
+ cfi_command(bank, 0x60, command); /* FIXME: to be removed */
LOG_DEBUG("address: 0x%4.4" PRIx32 ", command: 0x%4.4" PRIx32, flash_address(bank, i, 0x0), target_buffer_get_u32(target, command));
- if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0x60, flash_address(bank, i, 0x0))) != ERROR_OK)
{
return retval;
}
if (set)
{
- cfi_command(bank, 0x01, command);
+ cfi_command(bank, 0x01, command); /* FIXME: to be removed */
LOG_DEBUG("address: 0x%4.4" PRIx32 ", command: 0x%4.4" PRIx32 , flash_address(bank, i, 0x0), target_buffer_get_u32(target, command));
- if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0x01, flash_address(bank, i, 0x0))) != ERROR_OK)
{
return retval;
}
@@ -826,9 +805,9 @@ static int cfi_intel_protect(struct flash_bank *bank, int set, int first, int la
}
else
{
- cfi_command(bank, 0xd0, command);
+ cfi_command(bank, 0xd0, command); /* FIXME: to be removed */
LOG_DEBUG("address: 0x%4.4" PRIx32 ", command: 0x%4.4" PRIx32, flash_address(bank, i, 0x0), target_buffer_get_u32(target, command));
- if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xd0, flash_address(bank, i, 0x0))) != ERROR_OK)
{
return retval;
}
@@ -845,8 +824,7 @@ static int cfi_intel_protect(struct flash_bank *bank, int set, int first, int la
{
uint8_t block_status;
/* read block lock bit, to verify status */
- cfi_command(bank, 0x90, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0x90, flash_address(bank, 0, 0x55))) != ERROR_OK)
{
return retval;
}
@@ -855,8 +833,7 @@ static int cfi_intel_protect(struct flash_bank *bank, int set, int first, int la
if ((block_status & 0x1) != set)
{
LOG_ERROR("couldn't change block lock status (set = %i, block_status = 0x%2.2x)", set, block_status);
- cfi_command(bank, 0x70, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0x70, flash_address(bank, 0, 0x55))) != ERROR_OK)
{
return retval;
}
@@ -884,14 +861,12 @@ static int cfi_intel_protect(struct flash_bank *bank, int set, int first, int la
{
cfi_intel_clear_status_register(bank);
- cfi_command(bank, 0x60, command);
- if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0x60, flash_address(bank, i, 0x0))) != ERROR_OK)
{
return retval;
}
- cfi_command(bank, 0x01, command);
- if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0x01, flash_address(bank, i, 0x0))) != ERROR_OK)
{
return retval;
}
@@ -901,8 +876,7 @@ static int cfi_intel_protect(struct flash_bank *bank, int set, int first, int la
}
}
- cfi_command(bank, 0xff, command);
- return target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
+ return cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0));
}
static int cfi_protect(struct flash_bank *bank, int set, int first, int last)
@@ -1555,11 +1529,9 @@ static int cfi_intel_write_word(struct flash_bank *bank, uint8_t *word, uint32_t
int retval;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct target *target = bank->target;
- uint8_t command[8];
cfi_intel_clear_status_register(bank);
- cfi_command(bank, 0x40, command);
- if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0x40, address)) != ERROR_OK)
{
return retval;
}
@@ -1571,8 +1543,7 @@ static int cfi_intel_write_word(struct flash_bank *bank, uint8_t *word, uint32_t
if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->word_write_timeout_max)) != 0x80)
{
- cfi_command(bank, 0xff, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0))) != ERROR_OK)
{
return retval;
}
@@ -1589,7 +1560,6 @@ static int cfi_intel_write_words(struct flash_bank *bank, uint8_t *word, uint32_
int retval;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct target *target = bank->target;
- uint8_t command[8];
/* Calculate buffer size and boundary mask */
uint32_t buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width);
@@ -1627,15 +1597,13 @@ static int cfi_intel_write_words(struct flash_bank *bank, uint8_t *word, uint32_
cfi_intel_clear_status_register(bank);
/* Initiate buffer operation _*/
- cfi_command(bank, 0xE8, command);
- if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xe8, address)) != ERROR_OK)
{
return retval;
}
if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->buf_write_timeout_max)) != 0x80)
{
- cfi_command(bank, 0xff, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0))) != ERROR_OK)
{
return retval;
}
@@ -1645,8 +1613,7 @@ static int cfi_intel_write_words(struct flash_bank *bank, uint8_t *word, uint32_
}
/* Write buffer wordcount-1 and data words */
- cfi_command(bank, bufferwsize-1, command);
- if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, bufferwsize-1, address)) != ERROR_OK)
{
return retval;
}
@@ -1657,15 +1624,13 @@ static int cfi_intel_write_words(struct flash_bank *bank, uint8_t *word, uint32_
}
/* Commit write operation */
- cfi_command(bank, 0xd0, command);
- if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xd0, address)) != ERROR_OK)
{
return retval;
}
if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->buf_write_timeout_max)) != 0x80)
{
- cfi_command(bank, 0xff, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0))) != ERROR_OK)
{
return retval;
}
@@ -1683,22 +1648,18 @@ static int cfi_spansion_write_word(struct flash_bank *bank, uint8_t *word, uint3
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
struct target *target = bank->target;
- uint8_t command[8];
- cfi_command(bank, 0xaa, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xaa, flash_address(bank, 0, pri_ext->_unlock1))) != ERROR_OK)
{
return retval;
}
- cfi_command(bank, 0x55, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0x55, flash_address(bank, 0, pri_ext->_unlock2))) != ERROR_OK)
{
return retval;
}
- cfi_command(bank, 0xa0, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xa0, flash_address(bank, 0, pri_ext->_unlock1))) != ERROR_OK)
{
return retval;
}
@@ -1710,8 +1671,7 @@ static int cfi_spansion_write_word(struct flash_bank *bank, uint8_t *word, uint3
if (cfi_spansion_wait_status_busy(bank, 1000 * (1 << cfi_info->word_write_timeout_max)) != ERROR_OK)
{
- cfi_command(bank, 0xf0, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0))) != ERROR_OK)
{
return retval;
}
@@ -1728,7 +1688,6 @@ static int cfi_spansion_write_words(struct flash_bank *bank, uint8_t *word, uint
int retval;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct target *target = bank->target;
- uint8_t command[8];
struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
/* Calculate buffer size and boundary mask */
@@ -1762,28 +1721,24 @@ static int cfi_spansion_write_words(struct flash_bank *bank, uint8_t *word, uint
}
// Unlock
- cfi_command(bank, 0xaa, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xaa, flash_address(bank, 0, pri_ext->_unlock1))) != ERROR_OK)
{
return retval;
}
- cfi_command(bank, 0x55, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0x55, flash_address(bank, 0, pri_ext->_unlock2))) != ERROR_OK)
{
return retval;
}
// Buffer load command
- cfi_command(bank, 0x25, command);
- if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0x25, address)) != ERROR_OK)
{
return retval;
}
/* Write buffer wordcount-1 and data words */
- cfi_command(bank, bufferwsize-1, command);
- if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, bufferwsize-1, address)) != ERROR_OK)
{
return retval;
}
@@ -1794,16 +1749,14 @@ static int cfi_spansion_write_words(struct flash_bank *bank, uint8_t *word, uint
}
/* Commit write operation */
- cfi_command(bank, 0x29, command);
- if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0x29, address)) != ERROR_OK)
{
return retval;
}
if (cfi_spansion_wait_status_busy(bank, 1000 * (1 << cfi_info->word_write_timeout_max)) != ERROR_OK)
{
- cfi_command(bank, 0xf0, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0))) != ERROR_OK)
{
return retval;
}
@@ -2017,13 +1970,11 @@ int cfi_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_
}
/* return to read array mode, so we can read from flash again for padding */
- cfi_command(bank, 0xf0, current_word);
- if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0))) != ERROR_OK)
{
return retval;
}
- cfi_command(bank, 0xff, current_word);
- if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0))) != ERROR_OK)
{
return retval;
}
@@ -2057,13 +2008,11 @@ int cfi_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_
}
/* return to read array mode */
- cfi_command(bank, 0xf0, current_word);
- if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0))) != ERROR_OK)
{
return retval;
}
- cfi_command(bank, 0xff, current_word);
- return target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word);
+ return cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0));
}
static void cfi_fixup_atmel_reversed_erase_regions(struct flash_bank *bank, void *param)
@@ -2112,12 +2061,9 @@ static void cfi_fixup_0002_unlock_addresses(struct flash_bank *bank, void *param
static int cfi_query_string(struct flash_bank *bank, int address)
{
struct cfi_flash_bank *cfi_info = bank->driver_priv;
- struct target *target = bank->target;
int retval;
- uint8_t command[8];
- cfi_command(bank, 0x98, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, address), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0x98, flash_address(bank, 0, address))) != ERROR_OK)
{
return retval;
}
@@ -2130,13 +2076,11 @@ static int cfi_query_string(struct flash_bank *bank, int address)
if ((cfi_info->qry[0] != 'Q') || (cfi_info->qry[1] != 'R') || (cfi_info->qry[2] != 'Y'))
{
- cfi_command(bank, 0xf0, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0))) != ERROR_OK)
{
return retval;
}
- cfi_command(bank, 0xff, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0))) != ERROR_OK)
{
return retval;
}
@@ -2151,7 +2095,6 @@ static int cfi_probe(struct flash_bank *bank)
{
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct target *target = bank->target;
- uint8_t command[8];
int num_sectors = 0;
int i;
int sector = 0;
@@ -2177,18 +2120,15 @@ static int cfi_probe(struct flash_bank *bank)
}
/* switch to read identifier codes mode ("AUTOSELECT") */
- cfi_command(bank, 0xaa, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xaa, flash_address(bank, 0, unlock1))) != ERROR_OK)
{
return retval;
}
- cfi_command(bank, 0x55, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, unlock2), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0x55, flash_address(bank, 0, unlock2))) != ERROR_OK)
{
return retval;
}
- cfi_command(bank, 0x90, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0x90, flash_address(bank, 0, unlock1))) != ERROR_OK)
{
return retval;
}
@@ -2221,13 +2161,11 @@ static int cfi_probe(struct flash_bank *bank)
LOG_INFO("Flash Manufacturer/Device: 0x%04x 0x%04x", cfi_info->manufacturer, cfi_info->device_id);
/* switch back to read array mode */
- cfi_command(bank, 0xf0, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x00))) != ERROR_OK)
{
return retval;
}
- cfi_command(bank, 0xff, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x00))) != ERROR_OK)
{
return retval;
}
@@ -2344,13 +2282,11 @@ static int cfi_probe(struct flash_bank *bank)
/* return to read array mode
* we use both reset commands, as some Intel flashes fail to recognize the 0xF0 command
*/
- cfi_command(bank, 0xf0, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0))) != ERROR_OK)
{
return retval;
}
- cfi_command(bank, 0xff, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0))) != ERROR_OK)
{
return retval;
}
@@ -2440,16 +2376,13 @@ static int cfi_intel_protect_check(struct flash_bank *bank)
int retval;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct cfi_intel_pri_ext *pri_ext = cfi_info->pri_ext;
- struct target *target = bank->target;
- uint8_t command[CFI_MAX_BUS_WIDTH];
int i;
/* check if block lock bits are supported on this device */
if (!(pri_ext->blk_status_reg_mask & 0x1))
return ERROR_FLASH_OPERATION_FAILED;
- cfi_command(bank, 0x90, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0x90, flash_address(bank, 0, 0x55))) != ERROR_OK)
{
return retval;
}
@@ -2464,8 +2397,7 @@ static int cfi_intel_protect_check(struct flash_bank *bank)
bank->sectors[i].is_protected = 0;
}
- cfi_command(bank, 0xff, command);
- return target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
+ return cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0));
}
static int cfi_spansion_protect_check(struct flash_bank *bank)
@@ -2473,24 +2405,19 @@ static int cfi_spansion_protect_check(struct flash_bank *bank)
int retval;
struct cfi_flash_bank *cfi_info = bank->driver_priv;
struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
- struct target *target = bank->target;
- uint8_t command[8];
int i;
- cfi_command(bank, 0xaa, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0xaa, flash_address(bank, 0, pri_ext->_unlock1))) != ERROR_OK)
{
return retval;
}
- cfi_command(bank, 0x55, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0x55, flash_address(bank, 0, pri_ext->_unlock2))) != ERROR_OK)
{
return retval;
}
- cfi_command(bank, 0x90, command);
- if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
+ if ((retval = cfi_send_command(bank, 0x90, flash_address(bank, 0, pri_ext->_unlock1))) != ERROR_OK)
{
return retval;
}
@@ -2505,8 +2432,7 @@ static int cfi_spansion_protect_check(struct flash_bank *bank)
bank->sectors[i].is_protected = 0;
}
- cfi_command(bank, 0xf0, command);
- return target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
+ return cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0));
}
static int cfi_protect_check(struct flash_bank *bank)
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/cfi.c | 224 +++++++++++++++++----------------------------------
1 files changed, 75 insertions(+), 149 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: Øyvind H. <go...@us...> - 2010-03-08 08:35:55
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 7a5c9c2f4ae409e09faf12d5b8b76af135a85e73 (commit)
from 50dc56a488c6e4d5acdfd73f12e3502e1586c51e (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 7a5c9c2f4ae409e09faf12d5b8b76af135a85e73
Author: Ãyvind Harboe <oyv...@zy...>
Date: Mon Mar 8 08:32:45 2010 +0100
zy1000: embedded ice dcc tweak
How many bits to shift out before/after enabled tap not
in bypass is calculated outside the loop. This is more of
a demonstration of principle and to clarify code than
a performance optimisation as such. Follows up a bit
on the simplification work in jtag interface.
Signed-off-by: Ãyvind Harboe <oyv...@zy...>
diff --git a/src/jtag/zy1000/zy1000.c b/src/jtag/zy1000/zy1000.c
index 65d8402..005a4e0 100644
--- a/src/jtag/zy1000/zy1000.c
+++ b/src/jtag/zy1000/zy1000.c
@@ -803,34 +803,43 @@ int interface_jtag_add_pathmove(int num_states, const tap_state_t *path)
return interface_add_tms_seq(state_count, seq, cur_state);
}
-void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer, int little, int count)
+static void jtag_pre_post_bits(struct jtag_tap *tap, int *pre, int *post)
{
-// static int const reg_addr = 0x5;
- tap_state_t end_state = jtag_get_end_state();
- if (jtag_tap_next_enabled(jtag_tap_next_enabled(NULL)) == NULL)
+ /* bypass bits before and after */
+ int pre_bits = 0;
+ int post_bits = 0;
+
+ bool found = false;
+ struct jtag_tap *cur_tap, *nextTap;
+ for (cur_tap = jtag_tap_next_enabled(NULL); cur_tap!= NULL; cur_tap = nextTap)
{
- /* better performance via code duplication */
- if (little)
+ nextTap = jtag_tap_next_enabled(cur_tap);
+ if (cur_tap == tap)
{
- int i;
- for (i = 0; i < count; i++)
- {
- shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, 1));
- shiftValueInner(TAP_DRSHIFT, end_state, 6, reg_addr | (1 << 5));
- buffer += 4;
- }
+ found = true;
} else
{
- int i;
- for (i = 0; i < count; i++)
+ if (found)
{
- shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, 0));
- shiftValueInner(TAP_DRSHIFT, end_state, 6, reg_addr | (1 << 5));
- buffer += 4;
+ post_bits++;
+ } else
+ {
+ pre_bits++;
}
}
}
- else
+ *pre = pre_bits;
+ *post = post_bits;
+}
+
+void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer, int little, int count)
+{
+
+ int pre_bits;
+ int post_bits;
+ jtag_pre_post_bits(tap, &pre_bits, &post_bits);
+
+ if ((pre_bits > 32) || (post_bits > 32))
{
int i;
for (i = 0; i < count; i++)
@@ -838,6 +847,22 @@ void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer,
embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer, little));
buffer += 4;
}
+ } else
+ {
+ tap_state_t end_state = jtag_get_end_state();
+ tap_state_t shift_end_state;
+ if (post_bits == 0)
+ shift_end_state = end_state;
+
+ int i;
+ for (i = 0; i < count; i++)
+ {
+ shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
+ shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, little));
+ shiftValueInner(TAP_DRSHIFT, shift_end_state, 6, reg_addr | (1 << 5));
+ shiftValueInner(shift_end_state, end_state, post_bits, 0);
+ buffer += 4;
+ }
}
}
@@ -858,8 +883,9 @@ int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap * tap, uint32_t opc
/* bypass bits before and after */
- int pre_bits = 0;
- int post_bits = 0;
+ int pre_bits;
+ int post_bits;
+ jtag_pre_post_bits(tap, &pre_bits, &post_bits);
bool found = false;
struct jtag_tap *cur_tap, *nextTap;
@@ -895,6 +921,7 @@ int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap * tap, uint32_t opc
value |= (*t++<<24);
shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, value);
+ /* minimum 2 bits */
shiftValueInner(TAP_DRSHIFT, TAP_DRPAUSE, post_bits, 0);
#if 1
-----------------------------------------------------------------------
Summary of changes:
src/jtag/zy1000/zy1000.c | 69 ++++++++++++++++++++++++++++++++--------------
1 files changed, 48 insertions(+), 21 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: Øyvind H. <go...@us...> - 2010-03-08 08:12:17
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 50dc56a488c6e4d5acdfd73f12e3502e1586c51e (commit)
via 57d7743639d5092770d79f7c4b12ae694c482750 (commit)
via e018c7c1d29e8dabb9b4a90bb9eb3574eb1668bb (commit)
from f7d1be714b91fcc12e56c8fa78c702e75a733019 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 50dc56a488c6e4d5acdfd73f12e3502e1586c51e
Author: Ãyvind Harboe <oyv...@zy...>
Date: Sat Mar 6 11:29:59 2010 +0100
jtag: simplify jtag_add_plain_ir/dr_scan
These fn's now clearly just clock out/in bits. No mystical
fields are involved.
Signed-off-by: Ãyvind Harboe <oyv...@zy...>
diff --git a/src/jtag/core.c b/src/jtag/core.c
index bce332f..706f2f2 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -388,15 +388,16 @@ void jtag_add_ir_scan(struct jtag_tap *active, struct scan_field *in_fields, tap
}
}
-void jtag_add_plain_ir_scan(int in_num_fields, const struct scan_field *in_fields,
+void jtag_add_plain_ir_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits,
tap_state_t state)
{
+ assert(out_bits != NULL);
assert(state != TAP_RESET);
jtag_prelude(state);
int retval = interface_jtag_add_plain_ir_scan(
- in_num_fields, in_fields, state);
+ num_bits, out_bits, in_bits, state);
jtag_set_error(retval);
}
@@ -469,15 +470,16 @@ void jtag_add_dr_scan(struct jtag_tap *active, int in_num_fields, const struct s
jtag_set_error(retval);
}
-void jtag_add_plain_dr_scan(int in_num_fields, const struct scan_field *in_fields,
+void jtag_add_plain_dr_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits,
tap_state_t state)
{
+ assert(out_bits != NULL);
assert(state != TAP_RESET);
jtag_prelude(state);
int retval;
- retval = interface_jtag_add_plain_dr_scan(in_num_fields, in_fields, state);
+ retval = interface_jtag_add_plain_dr_scan(num_bits, out_bits, in_bits, state);
jtag_set_error(retval);
}
@@ -906,7 +908,7 @@ static int jtag_examine_chain_execute(uint8_t *idcode_buffer, unsigned num_idcod
for (unsigned i = 0; i < JTAG_MAX_CHAIN_SIZE; i++)
buf_set_u32(idcode_buffer, i * 32, 32, END_OF_CHAIN_FLAG);
- jtag_add_plain_dr_scan(1, &field, TAP_DRPAUSE);
+ jtag_add_plain_dr_scan(field.num_bits, field.out_value, field.in_value, TAP_DRPAUSE);
jtag_add_tlr();
return jtag_execute_queue();
}
@@ -1207,7 +1209,7 @@ static int jtag_validate_ircapture(void)
field.out_value = ir_test;
field.in_value = ir_test;
- jtag_add_plain_ir_scan(1, &field, TAP_IDLE);
+ jtag_add_plain_ir_scan(field.num_bits, field.out_value, field.in_value, TAP_IDLE);
LOG_DEBUG("IR capture validation scan");
retval = jtag_execute_queue();
diff --git a/src/jtag/drivers/driver.c b/src/jtag/drivers/driver.c
index 57bc28d..7f7f879 100644
--- a/src/jtag/drivers/driver.c
+++ b/src/jtag/drivers/driver.c
@@ -2,7 +2,7 @@
* Copyright (C) 2005 by Dominic Rath *
* Dom...@gm... *
* *
- * Copyright (C) 2007-2009 Ãyvind Harboe *
+ * Copyright (C) 2007-2010 Ãyvind Harboe *
* oyv...@zy... *
* *
* Copyright (C) 2009 SoftPLC Corporation *
@@ -130,35 +130,6 @@ int interface_jtag_add_ir_scan(struct jtag_tap* active, const struct scan_field
}
/**
- * see jtag_add_plain_ir_scan()
- *
- */
-int interface_jtag_add_plain_ir_scan(int in_num_fields, const struct scan_field *in_fields, tap_state_t state)
-{
-
- struct jtag_command * cmd = cmd_queue_alloc(sizeof(struct jtag_command));
- struct scan_command * scan = cmd_queue_alloc(sizeof(struct scan_command));
- struct scan_field * out_fields = cmd_queue_alloc(in_num_fields * sizeof(struct scan_field));
-
- jtag_queue_command(cmd);
-
- cmd->type = JTAG_SCAN;
- cmd->cmd.scan = scan;
-
- scan->ir_scan = true;
- scan->num_fields = in_num_fields;
- scan->fields = out_fields;
- scan->end_state = state;
-
- for (int i = 0; i < in_num_fields; i++)
- cmd_queue_scan_field_clone(out_fields + i, in_fields + i);
-
- return ERROR_OK;
-}
-
-
-
-/**
* see jtag_add_dr_scan()
*
*/
@@ -324,32 +295,40 @@ void interface_jtag_add_dr_out(struct jtag_tap *target_tap,
assert(target_tap_match); /* target_tap should be enabled and not bypassed */
}
-/**
- * see jtag_add_plain_dr_scan()
- *
- */
-int interface_jtag_add_plain_dr_scan(int in_num_fields, const struct scan_field *in_fields, tap_state_t state)
+static int jtag_add_plain_scan(int num_bits, const uint8_t *out_bits,
+ uint8_t *in_bits, tap_state_t state, bool ir_scan)
{
struct jtag_command * cmd = cmd_queue_alloc(sizeof(struct jtag_command));
struct scan_command * scan = cmd_queue_alloc(sizeof(struct scan_command));
- struct scan_field * out_fields = cmd_queue_alloc(in_num_fields * sizeof(struct scan_field));
+ struct scan_field * out_fields = cmd_queue_alloc(sizeof(struct scan_field));
jtag_queue_command(cmd);
cmd->type = JTAG_SCAN;
cmd->cmd.scan = scan;
- scan->ir_scan = false;
- scan->num_fields = in_num_fields;
+ scan->ir_scan = ir_scan;
+ scan->num_fields = 1;
scan->fields = out_fields;
scan->end_state = state;
- for (int i = 0; i < in_num_fields; i++)
- cmd_queue_scan_field_clone(out_fields + i, in_fields + i);
+ out_fields->num_bits = num_bits;
+ out_fields->out_value = buf_cpy(out_bits, cmd_queue_alloc(DIV_ROUND_UP(num_bits, 8)), num_bits);
+ out_fields->in_value = in_bits;
return ERROR_OK;
}
+int interface_jtag_add_plain_dr_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
+{
+ return jtag_add_plain_scan(num_bits, out_bits, in_bits, state, false);
+}
+
+int interface_jtag_add_plain_ir_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
+{
+ return jtag_add_plain_scan(num_bits, out_bits, in_bits, state, true);
+}
+
int interface_jtag_add_tlr(void)
{
tap_state_t state = TAP_RESET;
diff --git a/src/jtag/jtag.h b/src/jtag/jtag.h
index fe57db1..ae85961 100644
--- a/src/jtag/jtag.h
+++ b/src/jtag/jtag.h
@@ -359,12 +359,12 @@ void jtag_add_ir_scan(struct jtag_tap* tap,
void jtag_add_ir_scan_noverify(struct jtag_tap* tap,
const struct scan_field *fields, tap_state_t state);
/**
- * Duplicate the scan fields passed into the function into an IR SCAN
- * command. This function assumes that the caller handles extra fields
- * for bypassed TAPs.
+ * Scan out the bits in ir scan mode.
+ *
+ * If in_bits == NULL, discard incoming bits.
*/
-void jtag_add_plain_ir_scan(int num_fields,
- const struct scan_field* fields, tap_state_t endstate);
+void jtag_add_plain_ir_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits,
+ tap_state_t endstate);
/**
@@ -390,12 +390,12 @@ void jtag_add_dr_scan(struct jtag_tap* tap, int num_fields,
void jtag_add_dr_scan_check(struct jtag_tap* tap, int num_fields,
struct scan_field* fields, tap_state_t endstate);
/**
- * Duplicate the scan fields passed into the function into a DR SCAN
- * command. Unlike jtag_add_dr_scan(), this function assumes that the
- * caller handles extra fields for bypassed TAPs.
+ * Scan out the bits in ir scan mode.
+ *
+ * If in_bits == NULL, discard incoming bits.
*/
-void jtag_add_plain_dr_scan(int num_fields,
- const struct scan_field* fields, tap_state_t endstate);
+void jtag_add_plain_dr_scan(int num_bits,
+ const uint8_t *out_bits, uint8_t *in_bits, tap_state_t endstate);
/**
* Defines the type of data passed to the jtag_callback_t interface.
diff --git a/src/jtag/minidriver.h b/src/jtag/minidriver.h
index 4631593..59b2a32 100644
--- a/src/jtag/minidriver.h
+++ b/src/jtag/minidriver.h
@@ -53,14 +53,14 @@ int interface_jtag_add_ir_scan(struct jtag_tap* active,
const struct scan_field* fields,
tap_state_t endstate);
int interface_jtag_add_plain_ir_scan(
- int num_fields, const struct scan_field* fields,
+ int num_bits, const uint8_t *out_bits, uint8_t *in_bits,
tap_state_t endstate);
int interface_jtag_add_dr_scan(struct jtag_tap* active,
int num_fields, const struct scan_field* fields,
tap_state_t endstate);
int interface_jtag_add_plain_dr_scan(
- int num_fields, const struct scan_field* fields,
+ int num_bits, const uint8_t *out_bits, uint8_t *in_bits,
tap_state_t endstate);
int interface_jtag_add_tlr(void);
diff --git a/src/jtag/minidummy/minidummy.c b/src/jtag/minidummy/minidummy.c
index 1eef087..46ec9c3 100644
--- a/src/jtag/minidummy/minidummy.c
+++ b/src/jtag/minidummy/minidummy.c
@@ -54,7 +54,7 @@ int interface_jtag_add_ir_scan(struct jtag_tap *active, const struct scan_field
}
-int interface_jtag_add_plain_ir_scan(int num_fields, const struct scan_field *fields, tap_state_t state)
+int interface_jtag_add_plain_ir_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
{
/* synchronously do the operation here */
@@ -68,7 +68,7 @@ int interface_jtag_add_dr_scan(struct jtag_tap *active, int num_fields, const st
return ERROR_OK;
}
-int interface_jtag_add_plain_dr_scan(int num_fields, const struct scan_field *fields, tap_state_t state)
+int interface_jtag_add_plain_dr_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
{
/* synchronously do the operation here */
diff --git a/src/jtag/zy1000/zy1000.c b/src/jtag/zy1000/zy1000.c
index 391d8f2..65d8402 100644
--- a/src/jtag/zy1000/zy1000.c
+++ b/src/jtag/zy1000/zy1000.c
@@ -611,9 +611,14 @@ int interface_jtag_add_ir_scan(struct jtag_tap *active, const struct scan_field
-int interface_jtag_add_plain_ir_scan(int num_fields, const struct scan_field *fields, tap_state_t state)
+int interface_jtag_add_plain_ir_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
{
- scanFields(num_fields, fields, TAP_IRSHIFT, 1);
+ struct scan_field field;
+ field.num_bits = num_bits;
+ field.out_value = out_bits;
+ field.in_value = in_bits;
+
+ scanFields(1, &field, TAP_IRSHIFT, 1);
gotoEndState(state);
return ERROR_OK;
@@ -644,9 +649,14 @@ int interface_jtag_add_dr_scan(struct jtag_tap *active, int num_fields, const st
return ERROR_OK;
}
-int interface_jtag_add_plain_dr_scan(int num_fields, const struct scan_field *fields, tap_state_t state)
+int interface_jtag_add_plain_dr_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
{
- scanFields(num_fields, fields, TAP_DRSHIFT, 1);
+ struct scan_field field;
+ field.num_bits = num_bits;
+ field.out_value = out_bits;
+ field.in_value = in_bits;
+
+ scanFields(1, &field, TAP_DRSHIFT, 1);
gotoEndState(state);
return ERROR_OK;
}
diff --git a/src/svf/svf.c b/src/svf/svf.c
index 28595d5..fba499c 100644
--- a/src/svf/svf.c
+++ b/src/svf/svf.c
@@ -1084,7 +1084,7 @@ static int svf_run_command(struct command_context *cmd_ctx, char *cmd_str)
field.out_value = &svf_tdi_buffer[svf_buffer_index];
field.in_value = &svf_tdi_buffer[svf_buffer_index];
/* NOTE: doesn't use SVF-specified state paths */
- jtag_add_plain_dr_scan(1, &field, svf_para.dr_end_state);
+ jtag_add_plain_dr_scan(field.num_bits, field.out_value, field.in_value, svf_para.dr_end_state);
svf_buffer_index += (i + 7) >> 3;
}
@@ -1179,7 +1179,8 @@ static int svf_run_command(struct command_context *cmd_ctx, char *cmd_str)
field.out_value = &svf_tdi_buffer[svf_buffer_index];
field.in_value = &svf_tdi_buffer[svf_buffer_index];
/* NOTE: doesn't use SVF-specified state paths */
- jtag_add_plain_ir_scan(1, &field, svf_para.ir_end_state);
+ jtag_add_plain_ir_scan(field.num_bits, field.out_value, field.in_value,
+ svf_para.ir_end_state);
svf_buffer_index += (i + 7) >> 3;
}
diff --git a/src/target/avrt.c b/src/target/avrt.c
index 5d912da..720261e 100644
--- a/src/target/avrt.c
+++ b/src/target/avrt.c
@@ -190,12 +190,8 @@ int mcu_write_ir(struct jtag_tap *tap, uint8_t *ir_in, uint8_t *ir_out, int ir_l
}
{
- struct scan_field field[1];
-
- field[0].num_bits = tap->ir_length;
- field[0].out_value = ir_out;
- field[0].in_value = ir_in;
- jtag_add_plain_ir_scan(ARRAY_SIZE(field), field, jtag_set_end_state(TAP_IDLE));
+ jtag_add_plain_ir_scan(tap->ir_length, ir_out, ir_in,
+ jtag_set_end_state(TAP_IDLE));
}
return ERROR_OK;
@@ -210,12 +206,7 @@ int mcu_write_dr(struct jtag_tap *tap, uint8_t *dr_in, uint8_t *dr_out, int dr_l
}
{
- struct scan_field field[1];
-
- field[0].num_bits = dr_len;
- field[0].out_value = dr_out;
- field[0].in_value = dr_in;
- jtag_add_plain_dr_scan(ARRAY_SIZE(field), field, jtag_set_end_state(TAP_IDLE));
+ jtag_add_plain_dr_scan(dr_len, dr_out, dr_in, jtag_set_end_state(TAP_IDLE));
}
return ERROR_OK;
diff --git a/src/target/dsp563xx.c b/src/target/dsp563xx.c
index a379121..4be7f3b 100644
--- a/src/target/dsp563xx.c
+++ b/src/target/dsp563xx.c
@@ -863,12 +863,7 @@ int dsp563xx_write_ir(struct jtag_tap *tap, uint8_t * ir_in, uint8_t * ir_out,
}
{
- struct scan_field field[1];
-
- field[0].num_bits = tap->ir_length;
- field[0].out_value = ir_out;
- field[0].in_value = ir_in;
- jtag_add_plain_ir_scan(ARRAY_SIZE(field), field,
+ jtag_add_plain_ir_scan(tap->ir_length, ir_out, ir_in,
jtag_set_end_state(TAP_IDLE));
}
@@ -885,12 +880,7 @@ int dsp563xx_write_dr(struct jtag_tap *tap, uint8_t * dr_in, uint8_t * dr_out,
}
{
- struct scan_field field[1];
-
- field[0].num_bits = dr_len;
- field[0].out_value = dr_out;
- field[0].in_value = dr_in;
- jtag_add_plain_dr_scan(ARRAY_SIZE(field), field,
+ jtag_add_plain_dr_scan(dr_len, dr_out, dr_in,
jtag_set_end_state(TAP_IDLE));
}
diff --git a/src/xsvf/xsvf.c b/src/xsvf/xsvf.c
index 14bed8e..f2c1a42 100644
--- a/src/xsvf/xsvf.c
+++ b/src/xsvf/xsvf.c
@@ -481,7 +481,8 @@ COMMAND_HANDLER(handle_xsvf_command)
field.in_value = calloc(DIV_ROUND_UP(field.num_bits, 8), 1);
if (tap == NULL)
- jtag_add_plain_dr_scan(1, &field, jtag_set_end_state(TAP_DRPAUSE));
+ jtag_add_plain_dr_scan(field.num_bits, field.out_value, field.in_value,
+ jtag_set_end_state(TAP_DRPAUSE));
else
jtag_add_dr_scan(tap, 1, &field, jtag_set_end_state(TAP_DRPAUSE));
@@ -702,7 +703,8 @@ COMMAND_HANDLER(handle_xsvf_command)
if (tap == NULL)
- jtag_add_plain_ir_scan(1, &field, my_end_state);
+ jtag_add_plain_ir_scan(field.num_bits,
+ field.out_value, field.in_value, my_end_state);
else
jtag_add_ir_scan(tap, &field, my_end_state);
@@ -936,7 +938,8 @@ COMMAND_HANDLER(handle_xsvf_command)
LOG_USER("LSDR retry %d", attempt);
if (tap == NULL)
- jtag_add_plain_dr_scan(1, &field, jtag_set_end_state(TAP_DRPAUSE));
+ jtag_add_plain_dr_scan(field.num_bits, field.out_value, field.in_value,
+ jtag_set_end_state(TAP_DRPAUSE));
else
jtag_add_dr_scan(tap, 1, &field, jtag_set_end_state(TAP_DRPAUSE));
commit 57d7743639d5092770d79f7c4b12ae694c482750
Author: Ãyvind Harboe <oyv...@zy...>
Date: Thu Mar 4 14:38:19 2010 +0100
jtag: jtag_add_ir_scan() now takes a single field
In the code a single field was all that was ever used. Makes
jtag_add_ir_scan() simpler and leaves more complicated stuff
to jtag_add_plain_ir_scan().
Signed-off-by: Ãyvind Harboe <oyv...@zy...>
diff --git a/src/flash/nor/str9xpec.c b/src/flash/nor/str9xpec.c
index 3796a4b..b6d24f5 100644
--- a/src/flash/nor/str9xpec.c
+++ b/src/flash/nor/str9xpec.c
@@ -48,7 +48,7 @@ int str9xpec_set_instr(struct jtag_tap *tap, uint32_t new_instr, tap_state_t end
buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
field.in_value = NULL;
- jtag_add_ir_scan(tap, 1, &field, end_state);
+ jtag_add_ir_scan(tap, &field, end_state);
free(field.out_value);
}
diff --git a/src/jtag/core.c b/src/jtag/core.c
index 2e09cb6..bce332f 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -42,7 +42,8 @@
/// The number of JTAG queue flushes (for profiling and debugging purposes).
static int jtag_flush_queue_count;
-static void jtag_add_scan_check(struct jtag_tap *active, void (*jtag_add_scan)(struct jtag_tap *active, int in_num_fields, const struct scan_field *in_fields, tap_state_t state),
+static void jtag_add_scan_check(struct jtag_tap *active,
+ void (*jtag_add_scan)(struct jtag_tap *active, int in_num_fields, const struct scan_field *in_fields, tap_state_t state),
int in_num_fields, struct scan_field *in_fields, tap_state_t state);
/**
@@ -352,17 +353,22 @@ void jtag_alloc_in_value32(struct scan_field *field)
interface_jtag_alloc_in_value32(field);
}
-void jtag_add_ir_scan_noverify(struct jtag_tap *active, int in_count, const struct scan_field *in_fields,
+void jtag_add_ir_scan_noverify(struct jtag_tap *active, const struct scan_field *in_fields,
tap_state_t state)
{
jtag_prelude(state);
- int retval = interface_jtag_add_ir_scan(active, in_count, in_fields, state);
+ int retval = interface_jtag_add_ir_scan(active, in_fields, state);
jtag_set_error(retval);
}
+static void jtag_add_ir_scan_noverify_callback(struct jtag_tap *active, int dummy, const struct scan_field *in_fields,
+ tap_state_t state)
+{
+ jtag_add_ir_scan_noverify(active, in_fields, state);
+}
-void jtag_add_ir_scan(struct jtag_tap *active, int in_num_fields, struct scan_field *in_fields, tap_state_t state)
+void jtag_add_ir_scan(struct jtag_tap *active, struct scan_field *in_fields, tap_state_t state)
{
assert(state != TAP_RESET);
@@ -370,18 +376,15 @@ void jtag_add_ir_scan(struct jtag_tap *active, int in_num_fields, struct scan_fi
{
/* 8 x 32 bit id's is enough for all invocations */
- for (int j = 0; j < in_num_fields; j++)
- {
- /* if we are to run a verification of the ir scan, we need to get the input back.
- * We may have to allocate space if the caller didn't ask for the input back.
- */
- in_fields[j].check_value = active->expected;
- in_fields[j].check_mask = active->expected_mask;
- }
- jtag_add_scan_check(active, jtag_add_ir_scan_noverify, in_num_fields, in_fields, state);
+ /* if we are to run a verification of the ir scan, we need to get the input back.
+ * We may have to allocate space if the caller didn't ask for the input back.
+ */
+ in_fields->check_value = active->expected;
+ in_fields->check_mask = active->expected_mask;
+ jtag_add_scan_check(active, jtag_add_ir_scan_noverify_callback, 1, in_fields, state);
} else
{
- jtag_add_ir_scan_noverify(active, in_num_fields, in_fields, state);
+ jtag_add_ir_scan_noverify(active, in_fields, state);
}
}
diff --git a/src/jtag/drivers/driver.c b/src/jtag/drivers/driver.c
index 673d191..57bc28d 100644
--- a/src/jtag/drivers/driver.c
+++ b/src/jtag/drivers/driver.c
@@ -74,7 +74,7 @@ static void cmd_queue_scan_field_clone(struct scan_field * dst, const struct sca
* see jtag_add_ir_scan()
*
*/
-int interface_jtag_add_ir_scan(struct jtag_tap* active, int in_num_fields, const struct scan_field *in_fields, tap_state_t state)
+int interface_jtag_add_ir_scan(struct jtag_tap* active, const struct scan_field *in_fields, tap_state_t state)
{
size_t num_taps = jtag_tap_count_enabled();
@@ -106,8 +106,7 @@ int interface_jtag_add_ir_scan(struct jtag_tap* active, int in_num_fields, const
/* if TAP is listed in input fields, copy the value */
tap->bypass = 0;
- for (int j = 0; j < in_num_fields; j++)
- cmd_queue_scan_field_clone(field, in_fields + j);
+ cmd_queue_scan_field_clone(field, in_fields);
} else
{
/* if a TAP isn't listed in input fields, set it to BYPASS */
diff --git a/src/jtag/jtag.h b/src/jtag/jtag.h
index 6e21024..fe57db1 100644
--- a/src/jtag/jtag.h
+++ b/src/jtag/jtag.h
@@ -350,13 +350,13 @@ int jtag_init_inner(struct command_context *cmd_ctx);
* subsequent DR SCANs.
*
*/
-void jtag_add_ir_scan(struct jtag_tap* tap, int num_fields,
+void jtag_add_ir_scan(struct jtag_tap* tap,
struct scan_field* fields, tap_state_t endstate);
/**
* The same as jtag_add_ir_scan except no verification is performed out
* the output values.
*/
-void jtag_add_ir_scan_noverify(struct jtag_tap* tap, int num_fields,
+void jtag_add_ir_scan_noverify(struct jtag_tap* tap,
const struct scan_field *fields, tap_state_t state);
/**
* Duplicate the scan fields passed into the function into an IR SCAN
diff --git a/src/jtag/minidriver.h b/src/jtag/minidriver.h
index a417216..4631593 100644
--- a/src/jtag/minidriver.h
+++ b/src/jtag/minidriver.h
@@ -50,7 +50,7 @@
#include <jtag/minidriver_imp.h>
int interface_jtag_add_ir_scan(struct jtag_tap* active,
- int num_fields, const struct scan_field* fields,
+ const struct scan_field* fields,
tap_state_t endstate);
int interface_jtag_add_plain_ir_scan(
int num_fields, const struct scan_field* fields,
diff --git a/src/jtag/minidummy/minidummy.c b/src/jtag/minidummy/minidummy.c
index 98b449f..1eef087 100644
--- a/src/jtag/minidummy/minidummy.c
+++ b/src/jtag/minidummy/minidummy.c
@@ -46,7 +46,7 @@ int interface_jtag_execute_queue(void)
return ERROR_OK;
}
-int interface_jtag_add_ir_scan(struct jtag_tap *active, int num_fields, const struct scan_field *fields, tap_state_t state)
+int interface_jtag_add_ir_scan(struct jtag_tap *active, const struct scan_field *fields, tap_state_t state)
{
/* synchronously do the operation here */
diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c
index da01f81..1073abc 100644
--- a/src/jtag/tcl.c
+++ b/src/jtag/tcl.c
@@ -1490,6 +1490,15 @@ COMMAND_HANDLER(handle_irscan_command)
}
int num_fields = CMD_ARGC / 2;
+ if (num_fields > 1)
+ {
+ /* we really should be looking at plain_ir_scan if we want
+ * anything more fancy.
+ */
+ LOG_ERROR("Specify a single value for tap");
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ }
+
size_t fields_len = sizeof(struct scan_field) * num_fields;
fields = malloc(fields_len);
memset(fields, 0, fields_len);
@@ -1521,7 +1530,7 @@ COMMAND_HANDLER(handle_irscan_command)
}
/* did we have an endstate? */
- jtag_add_ir_scan(tap, num_fields, fields, endstate);
+ jtag_add_ir_scan(tap, fields, endstate);
retval = jtag_execute_queue();
diff --git a/src/jtag/zy1000/zy1000.c b/src/jtag/zy1000/zy1000.c
index 0b11258..391d8f2 100644
--- a/src/jtag/zy1000/zy1000.c
+++ b/src/jtag/zy1000/zy1000.c
@@ -574,13 +574,11 @@ static __inline void scanFields(int num_fields, const struct scan_field *fields,
}
}
-int interface_jtag_add_ir_scan(struct jtag_tap *active, int num_fields, const struct scan_field *fields, tap_state_t state)
+int interface_jtag_add_ir_scan(struct jtag_tap *active, const struct scan_field *fields, tap_state_t state)
{
int scan_size = 0;
struct jtag_tap *tap, *nextTap;
- assert(num_fields == 1);
-
for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
{
nextTap = jtag_tap_next_enabled(tap);
@@ -590,7 +588,7 @@ int interface_jtag_add_ir_scan(struct jtag_tap *active, int num_fields, const st
/* search the list */
if (tap == active)
{
- scanFields(num_fields, fields, TAP_IRSHIFT, pause);
+ scanFields(1, fields, TAP_IRSHIFT, pause);
/* update device information */
buf_cpy(fields[0].out_value, tap->cur_instr, scan_size);
diff --git a/src/pld/virtex2.c b/src/pld/virtex2.c
index 15685e6..976535b 100644
--- a/src/pld/virtex2.c
+++ b/src/pld/virtex2.c
@@ -40,7 +40,7 @@ static int virtex2_set_instr(struct jtag_tap *tap, uint32_t new_instr)
buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
field.in_value = NULL;
- jtag_add_ir_scan(tap, 1, &field, jtag_set_end_state(TAP_IDLE));
+ jtag_add_ir_scan(tap, &field, jtag_set_end_state(TAP_IDLE));
free(field.out_value);
}
diff --git a/src/target/arm11_dbgtap.c b/src/target/arm11_dbgtap.c
index f049059..2b7b4e4 100644
--- a/src/target/arm11_dbgtap.c
+++ b/src/target/arm11_dbgtap.c
@@ -49,13 +49,13 @@ static const tap_state_t arm11_move_pi_to_si_via_ci[] =
/* REVISIT no error handling here! */
-static void arm11_add_ir_scan_vc(struct jtag_tap *tap, int num_fields, struct scan_field *fields,
+static void arm11_add_ir_scan_vc(struct jtag_tap *tap, struct scan_field *fields,
tap_state_t state)
{
if (cmd_queue_cur_state == TAP_IRPAUSE)
jtag_add_pathmove(ARRAY_SIZE(arm11_move_pi_to_si_via_ci), arm11_move_pi_to_si_via_ci);
- jtag_add_ir_scan(tap, num_fields, fields, state);
+ jtag_add_ir_scan(tap, fields, state);
}
static const tap_state_t arm11_move_pd_to_sd_via_cd[] =
@@ -149,7 +149,7 @@ void arm11_add_IR(struct arm11_common * arm11, uint8_t instr, tap_state_t state)
arm11_setup_field(arm11, 5, &instr, NULL, &field);
- arm11_add_ir_scan_vc(arm11->arm.target->tap, 1, &field, state == ARM11_TAP_DEFAULT ? TAP_IRPAUSE : state);
+ arm11_add_ir_scan_vc(arm11->arm.target->tap, &field, state == ARM11_TAP_DEFAULT ? TAP_IRPAUSE : state);
}
/** Verify data shifted out from Scan Chain Register (SCREG). */
diff --git a/src/target/arm_jtag.c b/src/target/arm_jtag.c
index 3e27b76..5ed104c 100644
--- a/src/target/arm_jtag.c
+++ b/src/target/arm_jtag.c
@@ -45,13 +45,13 @@ int arm_jtag_set_instr_inner(struct arm_jtag *jtag_info, uint32_t new_instr, vo
if (no_verify_capture == NULL)
{
- jtag_add_ir_scan(tap, 1, &field, jtag_get_end_state());
+ jtag_add_ir_scan(tap, &field, jtag_get_end_state());
} else
{
/* FIX!!!! this is a kludge!!! arm926ejs.c should reimplement this arm_jtag_set_instr to
* have special verification code.
*/
- jtag_add_ir_scan_noverify(tap, 1, &field, jtag_get_end_state());
+ jtag_add_ir_scan_noverify(tap, &field, jtag_get_end_state());
}
return ERROR_OK;
diff --git a/src/target/etb.c b/src/target/etb.c
index 1f73ff5..2c4e3eb 100644
--- a/src/target/etb.c
+++ b/src/target/etb.c
@@ -60,7 +60,7 @@ static int etb_set_instr(struct etb *etb, uint32_t new_instr)
field.in_value = NULL;
- jtag_add_ir_scan(tap, 1, &field, jtag_get_end_state());
+ jtag_add_ir_scan(tap, &field, jtag_get_end_state());
free(field.out_value);
}
diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index 79160fc..e0550a8 100644
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -46,7 +46,7 @@ int mips_ejtag_set_instr(struct mips_ejtag *ejtag_info, int new_instr, void *del
buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
field.in_value = NULL;
- jtag_add_ir_scan(tap, 1, &field, jtag_get_end_state());
+ jtag_add_ir_scan(tap, &field, jtag_get_end_state());
}
return ERROR_OK;
diff --git a/src/target/xscale.c b/src/target/xscale.c
index 4973898..602034e 100644
--- a/src/target/xscale.c
+++ b/src/target/xscale.c
@@ -173,7 +173,7 @@ static int xscale_jtag_set_instr(struct jtag_tap *tap, uint32_t new_instr)
field.out_value = scratch;
buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
- jtag_add_ir_scan(tap, 1, &field, jtag_get_end_state());
+ jtag_add_ir_scan(tap, &field, jtag_get_end_state());
}
return ERROR_OK;
diff --git a/src/xsvf/xsvf.c b/src/xsvf/xsvf.c
index faa5542..14bed8e 100644
--- a/src/xsvf/xsvf.c
+++ b/src/xsvf/xsvf.c
@@ -704,7 +704,7 @@ COMMAND_HANDLER(handle_xsvf_command)
if (tap == NULL)
jtag_add_plain_ir_scan(1, &field, my_end_state);
else
- jtag_add_ir_scan(tap, 1, &field, my_end_state);
+ jtag_add_ir_scan(tap, &field, my_end_state);
if (xruntest)
{
commit e018c7c1d29e8dabb9b4a90bb9eb3574eb1668bb
Author: Ãyvind Harboe <oyv...@zy...>
Date: Mon Mar 1 20:00:59 2010 +0100
jtag: retire tap field
jtag_add_dr/ir_scan() now takes the tap as the first
argument, rather than for each of the fields passed
in.
The code never exercised the path where there was
more than one tap being scanned, who knows if it even
worked.
This simplifies the implementation and reduces clutter
in the calling code.
use jtag_add_ir/dr_plain_scan() for more fancy situations.
Signed-off-by: Ãyvind Harboe <oyv...@zy...>
diff --git a/src/flash/nor/str9xpec.c b/src/flash/nor/str9xpec.c
index 243336a..3796a4b 100644
--- a/src/flash/nor/str9xpec.c
+++ b/src/flash/nor/str9xpec.c
@@ -43,13 +43,12 @@ int str9xpec_set_instr(struct jtag_tap *tap, uint32_t new_instr, tap_state_t end
{
struct scan_field field;
- field.tap = tap;
field.num_bits = tap->ir_length;
field.out_value = calloc(DIV_ROUND_UP(field.num_bits, 8), 1);
buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
field.in_value = NULL;
- jtag_add_ir_scan(1, &field, end_state);
+ jtag_add_ir_scan(tap, 1, &field, end_state);
free(field.out_value);
}
@@ -65,13 +64,12 @@ static uint8_t str9xpec_isc_status(struct jtag_tap *tap)
if (str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE) != ERROR_OK)
return ISC_STATUS_ERROR;
- field.tap = tap;
field.num_bits = 8;
field.out_value = NULL;
field.in_value = &status;
- jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
+ jtag_add_dr_scan(tap, 1, &field, jtag_set_end_state(TAP_IDLE));
jtag_execute_queue();
LOG_DEBUG("status: 0x%2.2x", status);
@@ -153,13 +151,12 @@ static int str9xpec_read_config(struct flash_bank *bank)
/* execute ISC_CONFIGURATION command */
str9xpec_set_instr(tap, ISC_CONFIGURATION, TAP_IRPAUSE);
- field.tap = tap;
field.num_bits = 64;
field.out_value = NULL;
field.in_value = str9xpec_info->options;
- jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
+ jtag_add_dr_scan(tap, 1, &field, jtag_set_end_state(TAP_IDLE));
jtag_execute_queue();
status = str9xpec_isc_status(tap);
@@ -301,21 +298,19 @@ static int str9xpec_blank_check(struct flash_bank *bank, int first, int last)
/* execute ISC_BLANK_CHECK command */
str9xpec_set_instr(tap, ISC_BLANK_CHECK, TAP_IRPAUSE);
- field.tap = tap;
field.num_bits = 64;
field.out_value = buffer;
field.in_value = NULL;
- jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
+ jtag_add_dr_scan(tap, 1, &field, jtag_set_end_state(TAP_IDLE));
jtag_add_sleep(40000);
/* read blank check result */
- field.tap = tap;
field.num_bits = 64;
field.out_value = NULL;
field.in_value = buffer;
- jtag_add_dr_scan(1, &field, TAP_IRPAUSE);
+ jtag_add_dr_scan(tap, 1, &field, TAP_IRPAUSE);
jtag_execute_queue();
status = str9xpec_isc_status(tap);
@@ -407,12 +402,11 @@ static int str9xpec_erase_area(struct flash_bank *bank, int first, int last)
/* execute ISC_ERASE command */
str9xpec_set_instr(tap, ISC_ERASE, TAP_IRPAUSE);
- field.tap = tap;
field.num_bits = 64;
field.out_value = buffer;
field.in_value = NULL;
- jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
+ jtag_add_dr_scan(tap, 1, &field, jtag_set_end_state(TAP_IDLE));
jtag_execute_queue();
jtag_add_sleep(10);
@@ -468,12 +462,11 @@ static int str9xpec_lock_device(struct flash_bank *bank)
str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
do {
- field.tap = tap;
field.num_bits = 8;
field.out_value = NULL;
field.in_value = &status;
- jtag_add_dr_scan(1, &field, jtag_get_end_state());
+ jtag_add_dr_scan(tap, 1, &field, jtag_get_end_state());
jtag_execute_queue();
} while (!(status & ISC_STATUS_BUSY));
@@ -549,12 +542,11 @@ static int str9xpec_set_address(struct flash_bank *bank, uint8_t sector)
/* set flash controller address */
str9xpec_set_instr(tap, ISC_ADDRESS_SHIFT, TAP_IRPAUSE);
- field.tap = tap;
field.num_bits = 8;
field.out_value = §or;
field.in_value = NULL;
- jtag_add_dr_scan(1, &field, jtag_get_end_state());
+ jtag_add_dr_scan(tap, 1, &field, jtag_get_end_state());
return ERROR_OK;
}
@@ -633,12 +625,11 @@ static int str9xpec_write(struct flash_bank *bank, uint8_t *buffer, uint32_t off
{
str9xpec_set_instr(tap, ISC_PROGRAM, TAP_IRPAUSE);
- field.tap = tap;
field.num_bits = 64;
field.out_value = (buffer + bytes_written);
field.in_value = NULL;
- jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
+ jtag_add_dr_scan(tap, 1, &field, jtag_set_end_state(TAP_IDLE));
/* small delay before polling */
jtag_add_sleep(50);
@@ -646,12 +637,11 @@ static int str9xpec_write(struct flash_bank *bank, uint8_t *buffer, uint32_t off
str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
do {
- field.tap = tap;
field.num_bits = 8;
field.out_value = NULL;
field.in_value = scanbuf;
- jtag_add_dr_scan(1, &field, jtag_get_end_state());
+ jtag_add_dr_scan(tap, 1, &field, jtag_get_end_state());
jtag_execute_queue();
status = buf_get_u32(scanbuf, 0, 8);
@@ -683,12 +673,11 @@ static int str9xpec_write(struct flash_bank *bank, uint8_t *buffer, uint32_t off
str9xpec_set_instr(tap, ISC_PROGRAM, TAP_IRPAUSE);
- field.tap = tap;
field.num_bits = 64;
field.out_value = last_dword;
field.in_value = NULL;
- jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
+ jtag_add_dr_scan(tap, 1, &field, jtag_set_end_state(TAP_IDLE));
/* small delay before polling */
jtag_add_sleep(50);
@@ -696,12 +685,11 @@ static int str9xpec_write(struct flash_bank *bank, uint8_t *buffer, uint32_t off
str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
do {
- field.tap = tap;
field.num_bits = 8;
field.out_value = NULL;
field.in_value = scanbuf;
- jtag_add_dr_scan(1, &field, jtag_get_end_state());
+ jtag_add_dr_scan(tap, 1, &field, jtag_get_end_state());
jtag_execute_queue();
status = buf_get_u32(scanbuf, 0, 8);
@@ -750,12 +738,11 @@ COMMAND_HANDLER(str9xpec_handle_part_id_command)
str9xpec_set_instr(tap, ISC_IDCODE, TAP_IRPAUSE);
- field.tap = tap;
field.num_bits = 32;
field.out_value = NULL;
field.in_value = buffer;
- jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
+ jtag_add_dr_scan(tap, 1, &field, jtag_set_end_state(TAP_IDLE));
jtag_execute_queue();
idcode = buf_get_u32(buffer, 0, 32);
@@ -867,12 +854,11 @@ static int str9xpec_write_options(struct flash_bank *bank)
/* execute ISC_PROGRAM command */
str9xpec_set_instr(tap, ISC_PROGRAM, TAP_IRPAUSE);
- field.tap = tap;
field.num_bits = 64;
field.out_value = str9xpec_info->options;
field.in_value = NULL;
- jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
+ jtag_add_dr_scan(tap, 1, &field, jtag_set_end_state(TAP_IDLE));
/* small delay before polling */
jtag_add_sleep(50);
@@ -880,12 +866,11 @@ static int str9xpec_write_options(struct flash_bank *bank)
str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
do {
- field.tap = tap;
field.num_bits = 8;
field.out_value = NULL;
field.in_value = &status;
- jtag_add_dr_scan(1, &field, jtag_get_end_state());
+ jtag_add_dr_scan(tap, 1, &field, jtag_get_end_state());
jtag_execute_queue();
} while (!(status & ISC_STATUS_BUSY));
diff --git a/src/jtag/core.c b/src/jtag/core.c
index d43bd1c..2e09cb6 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -42,7 +42,7 @@
/// The number of JTAG queue flushes (for profiling and debugging purposes).
static int jtag_flush_queue_count;
-static void jtag_add_scan_check(void (*jtag_add_scan)(int in_num_fields, const struct scan_field *in_fields, tap_state_t state),
+static void jtag_add_scan_check(struct jtag_tap *active, void (*jtag_add_scan)(struct jtag_tap *active, int in_num_fields, const struct scan_field *in_fields, tap_state_t state),
int in_num_fields, struct scan_field *in_fields, tap_state_t state);
/**
@@ -352,17 +352,17 @@ void jtag_alloc_in_value32(struct scan_field *field)
interface_jtag_alloc_in_value32(field);
}
-void jtag_add_ir_scan_noverify(int in_count, const struct scan_field *in_fields,
+void jtag_add_ir_scan_noverify(struct jtag_tap *active, int in_count, const struct scan_field *in_fields,
tap_state_t state)
{
jtag_prelude(state);
- int retval = interface_jtag_add_ir_scan(in_count, in_fields, state);
+ int retval = interface_jtag_add_ir_scan(active, in_count, in_fields, state);
jtag_set_error(retval);
}
-void jtag_add_ir_scan(int in_num_fields, struct scan_field *in_fields, tap_state_t state)
+void jtag_add_ir_scan(struct jtag_tap *active, int in_num_fields, struct scan_field *in_fields, tap_state_t state)
{
assert(state != TAP_RESET);
@@ -375,13 +375,13 @@ void jtag_add_ir_scan(int in_num_fields, struct scan_field *in_fields, tap_state
/* if we are to run a verification of the ir scan, we need to get the input back.
* We may have to allocate space if the caller didn't ask for the input back.
*/
- in_fields[j].check_value = in_fields[j].tap->expected;
- in_fields[j].check_mask = in_fields[j].tap->expected_mask;
+ in_fields[j].check_value = active->expected;
+ in_fields[j].check_mask = active->expected_mask;
}
- jtag_add_scan_check(jtag_add_ir_scan_noverify, in_num_fields, in_fields, state);
+ jtag_add_scan_check(active, jtag_add_ir_scan_noverify, in_num_fields, in_fields, state);
} else
{
- jtag_add_ir_scan_noverify(in_num_fields, in_fields, state);
+ jtag_add_ir_scan_noverify(active, in_num_fields, in_fields, state);
}
}
@@ -405,7 +405,7 @@ static int jtag_check_value_mask_callback(jtag_callback_data_t data0, jtag_callb
return jtag_check_value_inner((uint8_t *)data0, (uint8_t *)data1, (uint8_t *)data2, (int)data3);
}
-static void jtag_add_scan_check(void (*jtag_add_scan)(int in_num_fields, const struct scan_field *in_fields, tap_state_t state),
+static void jtag_add_scan_check(struct jtag_tap *active, void (*jtag_add_scan)(struct jtag_tap *active, int in_num_fields, const struct scan_field *in_fields, tap_state_t state),
int in_num_fields, struct scan_field *in_fields, tap_state_t state)
{
for (int i = 0; i < in_num_fields; i++)
@@ -419,7 +419,7 @@ static void jtag_add_scan_check(void (*jtag_add_scan)(int in_num_fields, const s
field->modified = 1;
}
- jtag_add_scan(in_num_fields, in_fields, state);
+ jtag_add_scan(active, in_num_fields, in_fields, state);
for (int i = 0; i < in_num_fields; i++)
{
@@ -442,19 +442,19 @@ static void jtag_add_scan_check(void (*jtag_add_scan)(int in_num_fields, const s
}
}
-void jtag_add_dr_scan_check(int in_num_fields, struct scan_field *in_fields, tap_state_t state)
+void jtag_add_dr_scan_check(struct jtag_tap *active, int in_num_fields, struct scan_field *in_fields, tap_state_t state)
{
if (jtag_verify)
{
- jtag_add_scan_check(jtag_add_dr_scan, in_num_fields, in_fields, state);
+ jtag_add_scan_check(active, jtag_add_dr_scan, in_num_fields, in_fields, state);
} else
{
- jtag_add_dr_scan(in_num_fields, in_fields, state);
+ jtag_add_dr_scan(active, in_num_fields, in_fields, state);
}
}
-void jtag_add_dr_scan(int in_num_fields, const struct scan_field *in_fields,
+void jtag_add_dr_scan(struct jtag_tap *active, int in_num_fields, const struct scan_field *in_fields,
tap_state_t state)
{
assert(state != TAP_RESET);
@@ -462,7 +462,7 @@ void jtag_add_dr_scan(int in_num_fields, const struct scan_field *in_fields,
jtag_prelude(state);
int retval;
- retval = interface_jtag_add_dr_scan(in_num_fields, in_fields, state);
+ retval = interface_jtag_add_dr_scan(active, in_num_fields, in_fields, state);
jtag_set_error(retval);
}
@@ -894,7 +894,6 @@ void jtag_sleep(uint32_t us)
static int jtag_examine_chain_execute(uint8_t *idcode_buffer, unsigned num_idcode)
{
struct scan_field field = {
- .tap = NULL,
.num_bits = num_idcode * 32,
.out_value = idcode_buffer,
.in_value = idcode_buffer,
@@ -1201,7 +1200,6 @@ static int jtag_validate_ircapture(void)
/* after this scan, all TAPs will capture BYPASS instructions */
buf_set_ones(ir_test, total_ir_length);
- field.tap = NULL;
field.num_bits = total_ir_length;
field.out_value = ir_test;
field.in_value = ir_test;
diff --git a/src/jtag/drivers/driver.c b/src/jtag/drivers/driver.c
index ca59239..673d191 100644
--- a/src/jtag/drivers/driver.c
+++ b/src/jtag/drivers/driver.c
@@ -64,7 +64,6 @@ static void jtag_callback_queue_reset(void)
*/
static void cmd_queue_scan_field_clone(struct scan_field * dst, const struct scan_field * src)
{
- dst->tap = src->tap;
dst->num_bits = src->num_bits;
dst->out_value = buf_cpy(src->out_value, cmd_queue_alloc(DIV_ROUND_UP(src->num_bits, 8)), src->num_bits);
dst->in_value = src->in_value;
@@ -75,7 +74,7 @@ static void cmd_queue_scan_field_clone(struct scan_field * dst, const struct sca
* see jtag_add_ir_scan()
*
*/
-int interface_jtag_add_ir_scan(int in_num_fields, const struct scan_field *in_fields, tap_state_t state)
+int interface_jtag_add_ir_scan(struct jtag_tap* active, int in_num_fields, const struct scan_field *in_fields, tap_state_t state)
{
size_t num_taps = jtag_tap_count_enabled();
@@ -102,33 +101,19 @@ int interface_jtag_add_ir_scan(int in_num_fields, const struct scan_field *in_fi
{
/* search the input field list for fields for the current TAP */
- bool found = false;
-
- for (int j = 0; j < in_num_fields; j++)
+ if (tap == active)
{
- if (tap != in_fields[j].tap)
- continue;
-
/* if TAP is listed in input fields, copy the value */
-
- found = true;
-
tap->bypass = 0;
- assert(in_fields[j].num_bits == tap->ir_length); /* input fields must have the same length as the TAP's IR */
-
- cmd_queue_scan_field_clone(field, in_fields + j);
-
- break;
- }
-
- if (!found)
+ for (int j = 0; j < in_num_fields; j++)
+ cmd_queue_scan_field_clone(field, in_fields + j);
+ } else
{
/* if a TAP isn't listed in input fields, set it to BYPASS */
tap->bypass = 1;
- field->tap = tap;
field->num_bits = tap->ir_length;
field->out_value = buf_set_ones(cmd_queue_alloc(DIV_ROUND_UP(tap->ir_length, 8)), tap->ir_length);
field->in_value = NULL; /* do not collect input for tap's in bypass */
@@ -178,7 +163,7 @@ int interface_jtag_add_plain_ir_scan(int in_num_fields, const struct scan_field
* see jtag_add_dr_scan()
*
*/
-int interface_jtag_add_dr_scan(int in_num_fields, const struct scan_field *in_fields, tap_state_t state)
+int interface_jtag_add_dr_scan(struct jtag_tap* active, int in_num_fields, const struct scan_field *in_fields, tap_state_t state)
{
/* count devices in bypass */
@@ -215,6 +200,7 @@ int interface_jtag_add_dr_scan(int in_num_fields, const struct scan_field *in_fi
if (!tap->bypass)
{
+ assert(active == tap);
#ifndef NDEBUG
/* remember initial position for assert() */
struct scan_field *start_field = field;
@@ -222,9 +208,6 @@ int interface_jtag_add_dr_scan(int in_num_fields, const struct scan_field *in_fi
for (int j = 0; j < in_num_fields; j++)
{
- if (tap != in_fields[j].tap)
- continue;
-
cmd_queue_scan_field_clone(field, in_fields + j);
field++;
@@ -236,7 +219,6 @@ int interface_jtag_add_dr_scan(int in_num_fields, const struct scan_field *in_fi
/* if a TAP is bypassed, generated a dummy bit*/
else
{
- field->tap = tap;
field->num_bits = 1;
field->out_value = NULL;
field->in_value = NULL;
@@ -320,7 +302,6 @@ void interface_jtag_add_dr_out(struct jtag_tap *target_tap,
size_t scan_size = num_bits[j];
buf_set_u32(out_value, 0, scan_size, value[j]);
- field->tap = tap;
field->num_bits = scan_size;
field->out_value = buf_cpy(out_value, cmd_queue_alloc(DIV_ROUND_UP(scan_size, 8)), scan_size);
field->in_value = NULL;
@@ -333,7 +314,6 @@ void interface_jtag_add_dr_out(struct jtag_tap *target_tap,
else
{
- field->tap = tap;
field->num_bits = 1;
field->out_value = NULL;
field->in_value = NULL;
diff --git a/src/jtag/jtag.h b/src/jtag/jtag.h
index 7e5dc10..6e21024 100644
--- a/src/jtag/jtag.h
+++ b/src/jtag/jtag.h
@@ -109,9 +109,6 @@ extern tap_state_t cmd_queue_cur_state;
* The allocated, modified, and intmp fields are internal work space.
*/
struct scan_field {
- /// A pointer to the tap structure to which this field refers.
- struct jtag_tap* tap;
-
/// The number of bits this field specifies (up to 32)
int num_bits;
/// A pointer to value to be scanned into the device
@@ -353,13 +350,13 @@ int jtag_init_inner(struct command_context *cmd_ctx);
* subsequent DR SCANs.
*
*/
-void jtag_add_ir_scan(int num_fields,
+void jtag_add_ir_scan(struct jtag_tap* tap, int num_fields,
struct scan_field* fields, tap_state_t endstate);
/**
* The same as jtag_add_ir_scan except no verification is performed out
* the output values.
*/
-void jtag_add_ir_scan_noverify(int num_fields,
+void jtag_add_ir_scan_noverify(struct jtag_tap* tap, int num_fields,
const struct scan_field *fields, tap_state_t state);
/**
* Duplicate the scan fields passed into the function into an IR SCAN
@@ -387,10 +384,10 @@ void jtag_alloc_in_value32(struct scan_field *field);
* specified there. For bypassed TAPs, the function generates a dummy
* 1-bit field. The bypass status of TAPs is set by jtag_add_ir_scan().
*/
-void jtag_add_dr_scan(int num_fields,
+void jtag_add_dr_scan(struct jtag_tap* tap, int num_fields,
const struct scan_field* fields, tap_state_t endstate);
/// A version of jtag_add_dr_scan() that uses the check_value/mask fields
-void jtag_add_dr_scan_check(int num_fields,
+void jtag_add_dr_scan_check(struct jtag_tap* tap, int num_fields,
struct scan_field* fields, tap_state_t endstate);
/**
* Duplicate the scan fields passed into the function into a DR SCAN
diff --git a/src/jtag/minidriver.h b/src/jtag/minidriver.h
index 810bb0e..a417216 100644
--- a/src/jtag/minidriver.h
+++ b/src/jtag/minidriver.h
@@ -49,14 +49,14 @@
// and it may provide additional declarations that must be defined.
#include <jtag/minidriver_imp.h>
-int interface_jtag_add_ir_scan(
+int interface_jtag_add_ir_scan(struct jtag_tap* active,
int num_fields, const struct scan_field* fields,
tap_state_t endstate);
int interface_jtag_add_plain_ir_scan(
int num_fields, const struct scan_field* fields,
tap_state_t endstate);
-int interface_jtag_add_dr_scan(
+int interface_jtag_add_dr_scan(struct jtag_tap* active,
int num_fields, const struct scan_field* fields,
tap_state_t endstate);
int interface_jtag_add_plain_dr_scan(
diff --git a/src/jtag/minidummy/minidummy.c b/src/jtag/minidummy/minidummy.c
index 01cdd2e..98b449f 100644
--- a/src/jtag/minidummy/minidummy.c
+++ b/src/jtag/minidummy/minidummy.c
@@ -46,7 +46,7 @@ int interface_jtag_execute_queue(void)
return ERROR_OK;
}
-int interface_jtag_add_ir_scan(int num_fields, const struct scan_field *fields, tap_state_t state)
+int interface_jtag_add_ir_scan(struct jtag_tap *active, int num_fields, const struct scan_field *fields, tap_state_t state)
{
/* synchronously do the operation here */
@@ -61,7 +61,7 @@ int interface_jtag_add_plain_ir_scan(int num_fields, const struct scan_field *fi
return ERROR_OK;
}
-int interface_jtag_add_dr_scan(int num_fields, const struct scan_field *fields, tap_state_t state)
+int interface_jtag_add_dr_scan(struct jtag_tap *active, int num_fields, const struct scan_field *fields, tap_state_t state)
{
/* synchronously do the operation here */
diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c
index ffb5d27..da01f81 100644
--- a/src/jtag/tcl.c
+++ b/src/jtag/tcl.c
@@ -175,7 +175,6 @@ static int Jim_Command_drscan(Jim_Interp *interp, int argc, Jim_Obj *const *args
Jim_GetLong(interp, args[i], &bits);
str = Jim_GetString(args[i + 1], &len);
- fields[field_count].tap = tap;
fields[field_count].num_bits = bits;
fields[field_count].out_value = malloc(DIV_ROUND_UP(bits, 8));
str_to_buf(str, len, fields[field_count].out_value, bits, 0);
@@ -183,7 +182,7 @@ static int Jim_Command_drscan(Jim_Interp *interp, int argc, Jim_Obj *const *args
field_count++;
}
- jtag_add_dr_scan(num_fields, fields, endstate);
+ jtag_add_dr_scan(tap, num_fields, fields, endstate);
retval = jtag_execute_queue();
if (retval != ERROR_OK)
@@ -1462,7 +1461,7 @@ COMMAND_HANDLER(handle_irscan_command)
{
int i;
struct scan_field *fields;
- struct jtag_tap *tap;
+ struct jtag_tap *tap = NULL;
tap_state_t endstate;
if ((CMD_ARGC < 2) || (CMD_ARGC % 2))
@@ -1510,7 +1509,6 @@ COMMAND_HANDLER(handle_irscan_command)
return ERROR_FAIL;
}
int field_size = tap->ir_length;
- fields[i].tap = tap;
fields[i].num_bits = field_size;
fields[i].out_value = malloc(DIV_ROUND_UP(field_size, 8));
@@ -1523,7 +1521,7 @@ COMMAND_HANDLER(handle_irscan_command)
}
/* did we have an endstate? */
- jtag_add_ir_scan(num_fields, fields, endstate);
+ jtag_add_ir_scan(tap, num_fields, fields, endstate);
retval = jtag_execute_queue();
diff --git a/src/jtag/zy1000/zy1000.c b/src/jtag/zy1000/zy1000.c
index c5bc0ff..0b11258 100644
--- a/src/jtag/zy1000/zy1000.c
+++ b/src/jtag/zy1000/zy1000.c
@@ -574,38 +574,28 @@ static __inline void scanFields(int num_fields, const struct scan_field *fields,
}
}
-int interface_jtag_add_ir_scan(int num_fields, const struct scan_field *fields, tap_state_t state)
+int interface_jtag_add_ir_scan(struct jtag_tap *active, int num_fields, const struct scan_field *fields, tap_state_t state)
{
-
- int j;
int scan_size = 0;
struct jtag_tap *tap, *nextTap;
+
+ assert(num_fields == 1);
+
for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
{
nextTap = jtag_tap_next_enabled(tap);
- int pause = (nextTap==NULL);
-
- int found = 0;
-
+ bool pause = (nextTap==NULL);
scan_size = tap->ir_length;
/* search the list */
- for (j = 0; j < num_fields; j++)
+ if (tap == active)
{
- if (tap == fields[j].tap)
- {
- found = 1;
-
- scanFields(1, fields + j, TAP_IRSHIFT, pause);
- /* update device information */
- buf_cpy(fields[j].out_value, tap->cur_instr, scan_size);
+ scanFields(num_fields, fields, TAP_IRSHIFT, pause);
+ /* update device information */
+ buf_cpy(fields[0].out_value, tap->cur_instr, scan_size);
- tap->bypass = 0;
- break;
- }
- }
-
- if (!found)
+ tap->bypass = 0;
+ } else
{
/* if a device isn't listed, set it to BYPASS */
assert(scan_size <= 32);
@@ -631,46 +621,26 @@ int interface_jtag_add_plain_ir_scan(int num_fields, const struct scan_field *fi
return ERROR_OK;
}
-int interface_jtag_add_dr_scan(int num_fields, const struct scan_field *fields, tap_state_t state)
+int interface_jtag_add_dr_scan(struct jtag_tap *active, int num_fields, const struct scan_field *fields, tap_state_t state)
{
-
- int j;
struct jtag_tap *tap, *nextTap;
for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
{
nextTap = jtag_tap_next_enabled(tap);
- int found = 0;
- int pause = (nextTap==NULL);
+ bool pause = (nextTap==NULL);
- for (j = 0; j < num_fields; j++)
+ /* Find a range of fields to write to this tap */
+ if (tap == active)
{
- /* Find a range of fields to write to this tap */
- if (tap == fields[j].tap)
- {
- found = 1;
- int i;
- for (i = j + 1; i < num_fields; i++)
- {
- if (tap != fields[j].tap)
- {
- break;
- }
- }
-
- scanFields(i - j, fields + j, TAP_DRSHIFT, pause);
+ assert(!tap->bypass);
- j = i;
- }
- }
-
- if (!found)
+ scanFields(num_fields, fields, TAP_DRSHIFT, pause);
+ } else
{
/* Shift out a 0 for disabled tap's */
+ assert(tap->bypass);
shiftValueInner(TAP_DRSHIFT, pause?TAP_DRPAUSE:TAP_DRSHIFT, 1, 0);
}
- else
- {
- }
}
gotoEndState(state);
return ERROR_OK;
@@ -683,7 +653,6 @@ int interface_jtag_add_plain_dr_scan(int num_fields, const struct scan_field *fi
return ERROR_OK;
}
-
int interface_jtag_add_tlr()
{
setCurrentState(TAP_RESET);
@@ -691,8 +660,6 @@ int interface_jtag_add_tlr()
}
-
-
int interface_jtag_add_reset(int req_trst, int req_srst)
{
zy1000_reset(req_trst, req_srst);
@@ -737,7 +704,6 @@ static int zy1000_jtag_add_clocks(int num_cycles, tap_state_t state, tap_state_t
ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
#endif
-
return ERROR_OK;
}
diff --git a/src/pld/virtex2.c b/src/pld/virtex2.c
index bbf6b66..15685e6 100644
--- a/src/pld/virtex2.c
+++ b/src/pld/virtex2.c
@@ -35,13 +35,12 @@ static int virtex2_set_instr(struct jtag_tap *tap, uint32_t new_instr)
{
struct scan_field field;
- field.tap = tap;
field.num_bits = tap->ir_length;
field.out_value = calloc(DIV_ROUND_UP(field.num_bits, 8), 1);
buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
field.in_value = NULL;
- jtag_add_ir_scan(1, &field, jtag_set_end_state(TAP_IDLE));
+ jtag_add_ir_scan(tap, 1, &field, jtag_set_end_state(TAP_IDLE));
free(field.out_value);
}
@@ -59,7 +58,6 @@ static int virtex2_send_32(struct pld_device *pld_device,
values = malloc(num_words * 4);
- scan_field.tap = virtex2_info->tap;
scan_field.num_bits = num_words * 32;
scan_field.out_value = values;
scan_field.in_value = NULL;
@@ -69,7 +67,7 @@ static int virtex2_send_32(struct pld_device *pld_device,
virtex2_set_instr(virtex2_info->tap, 0x5); /* CFG_IN */
- jtag_add_dr_scan(1, &scan_field, jtag_set_end_state(TAP_DRPAUSE));
+ jtag_add_dr_scan(virtex2_info->tap, 1, &scan_field, jtag_set_end_state(TAP_DRPAUSE));
free(values);
@@ -88,7 +86,6 @@ static int virtex2_receive_32(struct pld_device *pld_device,
struct virtex2_pld_device *virtex2_info = pld_device->driver_priv;
struct scan_field scan_field;
- scan_field.tap = virtex2_info->tap;
scan_field.num_bits = 32;
scan_field.out_value = NULL;
scan_field.in_value = NULL;
@@ -99,7 +96,7 @@ static int virtex2_receive_32(struct pld_device *pld_device,
{
scan_field.in_value = (uint8_t *)words;
- jtag_add_dr_scan(1, &scan_field, jtag_set_end_state(TAP_DRPAUSE));
+ jtag_add_dr_scan(virtex2_info->tap, 1, &scan_field, jtag_set_end_state(TAP_DRPAUSE));
jtag_add_callback(virtexflip32, (jtag_callback_data_t)words);
@@ -139,7 +136,6 @@ static int virtex2_load(struct pld_device *pld_device, const char *filename)
unsigned int i;
struct scan_field field;
- field.tap = virtex2_info->tap;
field.in_value = NULL;
if ((retval = xilinx_read_bit_file(&bit_file, filename)) != ERROR_OK)
@@ -159,7 +155,7 @@ static int virtex2_load(struct pld_device *pld_device, const char *filename)
field.num_bits = bit_file.length * 8;
field.out_value = bit_file.data;
- jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_DRPAUSE));
+ jtag_add_dr_scan(virtex2_info->tap, 1, &field, jtag_set_end_state(TAP_DRPAUSE));
jtag_execute_queue();
jtag_add_tlr();
diff --git a/src/svf/svf.c b/src/svf/svf.c
index f46d698..28595d5 100644
--- a/src/svf/svf.c
+++ b/src/svf/svf.c
@@ -216,8 +216,6 @@ static char *svf_command_buffer = NULL;
static int svf_command_buffer_size = 0;
static int svf_line_number = 1;
-static struct jtag_tap *tap = NULL;
-
#define SVF_MAX_BUFFER_SIZE_TO_COMMIT (4 * 1024)
static uint8_t *svf_tdi_buffer = NULL, *svf_tdo_buffer = NULL, *svf_mask_buffer = NULL;
static int svf_buffer_index = 0, svf_buffer_size = 0;
@@ -1082,7 +1080,6 @@ static int svf_run_command(struct command_context *cmd_ctx, char *cmd_str)
{
svf_add_check_para(0, svf_buffer_index, i);
}
- field.tap = tap;
field.num_bits = i;
field.out_value = &svf_tdi_buffer[svf_buffer_index];
field.in_value = &svf_tdi_buffer[svf_buffer_index];
@@ -1178,7 +1175,6 @@ static int svf_run_command(struct command_context *cmd_ctx, char *cmd_str)
{
svf_add_check_para(0, svf_buffer_index, i);
}
- field.tap = tap;
field.num_bits = i;
field.out_value = &svf_tdi_buffer[svf_buffer_index];
field.in_value = &svf_tdi_buffer[svf_buffer_index];
diff --git a/src/target/arm11.c b/src/target/arm11.c
index 51be701..36bbaba 100644
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -123,7 +123,7 @@ static int arm11_debug_entry(struct arm11_common *arm11)
arm11_setup_field(arm11, 1, NULL, NULL, chain5_fields + 1);
arm11_setup_field(arm11, 1, NULL, NULL, chain5_fields + 2);
- arm11_add_dr_scan_vc(ARRAY_SIZE(chain5_fields), chain5_fields, TAP_DRPAUSE);
+ arm11_add_dr_scan_vc(arm11->arm.target->tap, ARRAY_SIZE(chain5_fields), chain5_fields, TAP_DRPAUSE);
}
@@ -317,7 +317,7 @@ static int arm11_leave_debug_state(struct arm11_common *arm11, bool bpwp)
arm11_setup_field(arm11, 1, &Ready, NULL, chain5_fields + 1);
arm11_setup_field(arm11, 1, &Valid, NULL, chain5_fields + 2);
- arm11_add_dr_scan_vc(ARRAY_SIZE(chain5_fields), chain5_fields, TAP_DRPAUSE);
+ arm11_add_dr_scan_vc(arm11->arm.target->tap, ARRAY_SIZE(chain5_fields), chain5_fields, TAP_DRPAUSE);
}
/* now processor is ready to RESTART */
@@ -1194,7 +1194,7 @@ static int arm11_examine(struct target *target)
arm11_setup_field(arm11, 32, NULL, &device_id, &idcode_field);
- arm11_add_dr_scan_vc(1, &idcode_field, TAP_DRPAUSE);
+ arm11_add_dr_scan_vc(arm11->arm.target->tap, 1, &idcode_field, TAP_DRPAUSE);
/* check DIDR */
@@ -1207,7 +1207,7 @@ static int arm11_examine(struct target *target)
arm11_setup_field(arm11, 32, NULL, &didr, chain0_fields + 0);
arm11_setup_field(arm11, 8, NULL, &implementor, chain0_fields + 1);
- arm11_add_dr_scan_vc(ARRAY_SIZE(chain0_fields), chain0_fields, TAP_IDLE);
+ arm11_add_dr_scan_vc(arm11->arm.target->tap, ARRAY_SIZE(chain0_fields), chain0_fields, TAP_IDLE);
CHECK_RETVAL(jtag_execute_queue());
diff --git a/src/target/arm11_dbgtap.c b/src/target/arm11_dbgtap.c
index b8388c8..f049059 100644
--- a/src/target/arm11_dbgtap.c
+++ b/src/target/arm11_dbgtap.c
@@ -49,13 +49,13 @@ static const tap_state_t arm11_move_pi_to_si_via_ci[] =
/* REVISIT no error handling here! */
-static void arm11_add_ir_scan_vc(int num_fields, struct scan_field *fields,
+static void arm11_add_ir_scan_vc(struct jtag_tap *tap, int num_fields, struct scan_field *fields,
tap_state_t state)
{
if (cmd_queue_cur_state == TAP_IRPAUSE)
jtag_add_pathmove(ARRAY_SIZE(arm11_move_pi_to_si_via_ci), arm11_move_pi_to_si_via_ci);
- jtag_add_ir_scan(num_fields, fields, state);
+ jtag_add_ir_scan(tap, num_fields, fields, state);
}
static const tap_state_t arm11_move_pd_to_sd_via_cd[] =
@@ -64,13 +64,13 @@ static const tap_state_t arm11_move_pd_to_sd_via_cd[] =
};
/* REVISIT no error handling here! */
-void arm11_add_dr_scan_vc(int num_fields, struct scan_field *fields,
+void arm11_add_dr_scan_vc(struct jtag_tap *tap, int num_fields, struct scan_field *fields,
tap_state_t state)
{
if (cmd_queue_cur_state == TAP_DRPAUSE)
jtag_add_pathmove(ARRAY_SIZE(arm11_move_pd_to_sd_via_cd), arm11_move_pd_to_sd_via_cd);
- jtag_add_dr_scan(num_fields, fields, state);
+ jtag_add_dr_scan(tap, num_fields, fields, state);
}
@@ -87,7 +87,6 @@ void arm11_add_dr_scan_vc(int num_fields, struct scan_field *fields,
void arm11_setup_field(struct arm11_common *arm11, int num_bits,
void *out_data, void *in_data, struct scan_field *field)
{
- field->tap = arm11->arm.target->tap;
field->num_bits = num_bits;
field->out_value = out_data;
field->in_value = in_data;
@@ -150,7 +149,7 @@ void arm11_add_IR(struct arm11_common * arm11, uint8_t instr, tap_state_t state)
arm11_setup_field(arm11, 5, &instr, NULL, &field);
- arm11_add_ir_scan_vc(1, &field, state == ARM11_TAP_DEFAULT ? TAP_IRPAUSE : state);
+ arm11_add_ir_scan_vc(arm11->arm.target->tap, 1, &field, state == ARM11_TAP_DEFAULT ? TAP_IRPAUSE : state);
}
/** Verify data shifted out from Scan Chain Register (SCREG). */
@@ -214,7 +213,7 @@ int arm11_add_debug_SCAN_N(struct arm11_common *arm11,
uint8_t tmp[1];
arm11_setup_field(arm11, 5, &chain, &tmp, &field);
- arm11_add_dr_scan_vc(1, &field, state == ARM11_TAP_DEFAULT ? TAP_DRPAUSE : state);
+ arm11_add_dr_scan_vc(arm11->arm.target->tap, 1, &field, state == ARM11_TAP_DEFAULT ? TAP_DRPAUSE : state);
jtag_execute_queue_noclear();
@@ -253,7 +252,7 @@ static void arm11_add_debug_INST(struct arm11_common * arm11,
arm11_setup_field(arm11, 32, &inst, NULL, itr + 0);
arm11_setup_field(arm11, 1, NULL, flag, itr + 1);
- arm11_add_dr_scan_vc(ARRAY_SIZE(itr), itr, state);
+ arm11_add_dr_scan_vc(arm11->arm.target->tap, ARRAY_SIZE(itr), itr, state);
}
/**
@@ -281,7 +280,7 @@ int arm...
[truncated message content] |
|
From: Øyvind H. <go...@us...> - 2010-03-06 09:53:48
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via f7d1be714b91fcc12e56c8fa78c702e75a733019 (commit)
from c6e323b9838254b338310ec165a5345635c5d177 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit f7d1be714b91fcc12e56c8fa78c702e75a733019
Author: Antonio Borneo <bor...@gm...>
Date: Sat Mar 6 00:56:36 2010 +0800
CFI: review print of Voltage values
JEDEC standard reports Vpp integer part encoded as 4 bit HEX value.
To print it using decimal digits, %u is required.
Other voltage values are coded as BCD, so %x is appropriate.
Code already prints one nibble at a time, so no need for field width
and precision in format string.
Signed-off-by: Antonio Borneo <bor...@gm...>
Signed-off-by: Ãyvind Harboe <oyv...@zy...>
diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c
index 42aa294..b0c7b0b 100644
--- a/src/flash/nor/cfi.c
+++ b/src/flash/nor/cfi.c
@@ -361,7 +361,7 @@ static int cfi_read_intel_pri_ext(struct flash_bank *bank)
pri_ext->vcc_optimal = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0xc);
pri_ext->vpp_optimal = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0xd);
- LOG_DEBUG("Vcc opt: %1.1x.%1.1x, Vpp opt: %1.1x.%1.1x",
+ LOG_DEBUG("Vcc opt: %x.%x, Vpp opt: %u.%x",
(pri_ext->vcc_optimal & 0xf0) >> 4, pri_ext->vcc_optimal & 0x0f,
(pri_ext->vpp_optimal & 0xf0) >> 4, pri_ext->vpp_optimal & 0x0f);
@@ -431,7 +431,7 @@ static int cfi_read_spansion_pri_ext(struct flash_bank *bank)
LOG_DEBUG("Burst Mode: 0x%x, Page Mode: 0x%x, ", pri_ext->BurstMode, pri_ext->PageMode);
- LOG_DEBUG("Vpp min: %2.2d.%1.1d, Vpp max: %2.2d.%1.1x",
+ LOG_DEBUG("Vpp min: %u.%x, Vpp max: %u.%x",
(pri_ext->VppMin & 0xf0) >> 4, pri_ext->VppMin & 0x0f,
(pri_ext->VppMax & 0xf0) >> 4, pri_ext->VppMax & 0x0f);
@@ -554,7 +554,7 @@ static int cfi_spansion_info(struct flash_bank *bank, char *buf, int buf_size)
buf += printed;
buf_size -= printed;
- printed = snprintf(buf, buf_size, "VppMin: %2.2d.%1.1x, VppMax: %2.2d.%1.1x\n",
+ printed = snprintf(buf, buf_size, "VppMin: %u.%x, VppMax: %u.%x\n",
(pri_ext->VppMin & 0xf0) >> 4, pri_ext->VppMin & 0x0f,
(pri_ext->VppMax & 0xf0) >> 4, pri_ext->VppMax & 0x0f);
@@ -579,7 +579,7 @@ static int cfi_intel_info(struct flash_bank *bank, char *buf, int buf_size)
buf += printed;
buf_size -= printed;
- printed = snprintf(buf, buf_size, "Vcc opt: %1.1x.%1.1x, Vpp opt: %1.1x.%1.1x\n",
+ printed = snprintf(buf, buf_size, "Vcc opt: %x.%x, Vpp opt: %u.%x\n",
(pri_ext->vcc_optimal & 0xf0) >> 4, pri_ext->vcc_optimal & 0x0f,
(pri_ext->vpp_optimal & 0xf0) >> 4, pri_ext->vpp_optimal & 0x0f);
buf += printed;
@@ -2285,7 +2285,7 @@ static int cfi_probe(struct flash_bank *bank)
cfi_info->block_erase_timeout_max = cfi_query_u8(bank, 0, 0x25);
cfi_info->chip_erase_timeout_max = cfi_query_u8(bank, 0, 0x26);
- LOG_DEBUG("Vcc min: %1.1x.%1.1x, Vcc max: %1.1x.%1.1x, Vpp min: %1.1x.%1.1x, Vpp max: %1.1x.%1.1x",
+ LOG_DEBUG("Vcc min: %x.%x, Vcc max: %x.%x, Vpp min: %u.%x, Vpp max: %u.%x",
(cfi_info->vcc_min & 0xf0) >> 4, cfi_info->vcc_min & 0x0f,
(cfi_info->vcc_max & 0xf0) >> 4, cfi_info->vcc_max & 0x0f,
(cfi_info->vpp_min & 0xf0) >> 4, cfi_info->vpp_min & 0x0f,
@@ -2568,7 +2568,7 @@ static int cfi_info(struct flash_bank *bank, char *buf, int buf_size)
buf += printed;
buf_size -= printed;
- printed = snprintf(buf, buf_size, "Vcc min: %1.1x.%1.1x, Vcc max: %1.1x.%1.1x, Vpp min: %1.1x.%1.1x, Vpp max: %1.1x.%1.1x\n",
+ printed = snprintf(buf, buf_size, "Vcc min: %x.%x, Vcc max: %x.%x, Vpp min: %u.%x, Vpp max: %u.%x\n",
(cfi_info->vcc_min & 0xf0) >> 4, cfi_info->vcc_min & 0x0f,
(cfi_info->vcc_max & 0xf0) >> 4, cfi_info->vcc_max & 0x0f,
(cfi_info->vpp_min & 0xf0) >> 4, cfi_info->vpp_min & 0x0f,
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/cfi.c | 12 ++++++------
1 files changed, 6 insertions(+), 6 deletions(-)
hooks/post-receive
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Main OpenOCD repository
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