openocd-commit — OpenOCD commit maling list - read only

[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-751-g595bb965b

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- Log -----------------------------------------------------------------
commit 595bb965b745371e07091c96ced478c8cd0b0d82
Author: Antonio Borneo <bor...@gm...>
Date:   Mon Sep 16 10:58:37 2024 +0200

    jtag: bcm2835gpio: fix macro definition
    
    The macros trigger few errors with checkpatch:
    
            ERROR:MACRO_ARG_REUSE: Macro argument reuse 'g' - possible
            side-effects?
    
            ERROR:TRAILING_STATEMENTS: trailing statements should be
            on next line
    
            ERROR:SPACING: spaces preferred around (several cases)
    
            ERROR:SINGLE_STATEMENT_DO_WHILE_MACRO: Single statement
            macros should not use a do {} while (0) loop
    
    plus an empty line triggers
    
            ERROR:BRACES: Blank lines aren't necessary before a close
            brace '}'
    
    Fix them!
    
    Change-Id: I0690b68b511ed7f45a7e0909a0addd2822ba9fe8
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8499
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/jtag/drivers/bcm2835gpio.c b/src/jtag/drivers/bcm2835gpio.c
index ff10b0a78..b8d91bf38 100644
--- a/src/jtag/drivers/bcm2835gpio.c
+++ b/src/jtag/drivers/bcm2835gpio.c
@@ -31,16 +31,28 @@ static off_t bcm2835_peri_base = 0x20000000;
 #define BCM2835_GPIO_MODE_OUTPUT 1
 
 /* GPIO setup macros */
-#define MODE_GPIO(g) (*(pio_base+((g)/10))>>(((g)%10)*3) & 7)
-#define INP_GPIO(g) do { *(pio_base+((g)/10)) &= ~(7<<(((g)%10)*3)); } while (0)
-#define SET_MODE_GPIO(g, m) do { /* clear the mode bits first, then set as necessary */ \
-		INP_GPIO(g);						\
-		*(pio_base+((g)/10)) |=  ((m)<<(((g)%10)*3)); } while (0)
+#define MODE_GPIO(_g) ({                                   \
+	typeof(_g) g = (_g);                                   \
+	*(pio_base + (g / 10)) >> ((g % 10) * 3) & 7;          \
+})
+
+#define INP_GPIO(_g) do {                                  \
+	typeof(_g) g1 = (_g);                                  \
+	*(pio_base + (g1 / 10)) &= ~(7 << ((g1 % 10) * 3));    \
+} while (0)
+
+#define SET_MODE_GPIO(_g, m) do {                          \
+	typeof(_g) g = (_g);                                   \
+	/* clear the mode bits first, then set as necessary */ \
+	INP_GPIO(g);                                           \
+	*(pio_base + (g / 10)) |= ((m) << ((g % 10) * 3));     \
+} while (0)
+
 #define OUT_GPIO(g) SET_MODE_GPIO(g, BCM2835_GPIO_MODE_OUTPUT)
 
-#define GPIO_SET (*(pio_base+7))  /* sets   bits which are 1, ignores bits which are 0 */
-#define GPIO_CLR (*(pio_base+10)) /* clears bits which are 1, ignores bits which are 0 */
-#define GPIO_LEV (*(pio_base+13)) /* current level of the pin */
+#define GPIO_SET (*(pio_base + 7))  /* sets   bits which are 1, ignores bits which are 0 */
+#define GPIO_CLR (*(pio_base + 10)) /* clears bits which are 1, ignores bits which are 0 */
+#define GPIO_LEV (*(pio_base + 13)) /* current level of the pin */
 
 static int dev_mem_fd;
 static volatile uint32_t *pio_base = MAP_FAILED;
@@ -175,7 +187,6 @@ static bb_value_t bcm2835gpio_read(void)
 	unsigned int shift = adapter_gpio_config[ADAPTER_GPIO_IDX_TDO].gpio_num;
 	uint32_t value = (GPIO_LEV >> shift) & 1;
 	return value ^ (adapter_gpio_config[ADAPTER_GPIO_IDX_TDO].active_low ? BB_HIGH : BB_LOW);
-
 }
 
 static int bcm2835gpio_write(int tck, int tms, int tdi)

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/bcm2835gpio.c | 29 ++++++++++++++++++++---------
 1 file changed, 20 insertions(+), 9 deletions(-)


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- Log -----------------------------------------------------------------
commit 8c23e6c1759be497c1328837fb49992d489b0719
Author: Antonio Borneo <bor...@gm...>
Date:   Mon Sep 16 13:49:04 2024 +0200

    target: arm: drop casts commented-out
    
    The function dpm->finish() returns a value that is almost always
    ignored.
    Drop the commented-out cast
            /* (void) */
    
    Change-Id: I7ff210a2693dd1877b7c7591705cdcd96a2c6125
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8498
    Tested-by: jenkins
    Reviewed-by: zapb <de...@za...>

diff --git a/src/target/arm_dpm.c b/src/target/arm_dpm.c
index 318d5afec..0b2db77c5 100644
--- a/src/target/arm_dpm.c
+++ b/src/target/arm_dpm.c
@@ -59,7 +59,7 @@ static int dpm_mrc(struct target *target, int cpnum,
 			ARMV4_5_MRC(cpnum, op1, 0, crn, crm, op2),
 			value);
 
-	/* (void) */ dpm->finish(dpm);
+	dpm->finish(dpm);
 	return retval;
 }
 
@@ -82,7 +82,7 @@ static int dpm_mrrc(struct target *target, int cpnum,
 			ARMV5_T_MRRC(cpnum, op, 0, 1, crm),
 			value);
 
-	/* (void) */ dpm->finish(dpm);
+	dpm->finish(dpm);
 	return retval;
 }
 
@@ -107,7 +107,7 @@ static int dpm_mcr(struct target *target, int cpnum,
 			ARMV4_5_MCR(cpnum, op1, 0, crn, crm, op2),
 			value);
 
-	/* (void) */ dpm->finish(dpm);
+	dpm->finish(dpm);
 	return retval;
 }
 
@@ -129,7 +129,7 @@ static int dpm_mcrr(struct target *target, int cpnum,
 	retval = dpm->instr_write_data_r0_r1(dpm,
 			ARMV5_T_MCRR(cpnum, op, 0, 1, crm), value);
 
-	/* (void) */ dpm->finish(dpm);
+	dpm->finish(dpm);
 
 	return retval;
 }
@@ -422,7 +422,7 @@ int arm_dpm_read_current_registers(struct arm_dpm *dpm)
 	 */
 
 fail:
-	/* (void) */ dpm->finish(dpm);
+	dpm->finish(dpm);
 	return retval;
 }
 
@@ -632,7 +632,7 @@ int arm_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp)
 		cache->reg_list[i].dirty = false;
 	}
 
-	/* (void) */ dpm->finish(dpm);
+	dpm->finish(dpm);
 done:
 	return retval;
 }
@@ -719,10 +719,10 @@ static int arm_dpm_read_core_reg(struct target *target, struct reg *r,
 	/* always clean up, regardless of error */
 
 	if (mode != ARM_MODE_ANY)
-		/* (void) */ arm_dpm_modeswitch(dpm, ARM_MODE_ANY);
+		arm_dpm_modeswitch(dpm, ARM_MODE_ANY);
 
 fail:
-	/* (void) */ dpm->finish(dpm);
+	dpm->finish(dpm);
 	return retval;
 }
 
@@ -761,10 +761,10 @@ static int arm_dpm_write_core_reg(struct target *target, struct reg *r,
 	/* always clean up, regardless of error */
 
 	if (mode != ARM_MODE_ANY)
-		/* (void) */ arm_dpm_modeswitch(dpm, ARM_MODE_ANY);
+		arm_dpm_modeswitch(dpm, ARM_MODE_ANY);
 
 fail:
-	/* (void) */ dpm->finish(dpm);
+	dpm->finish(dpm);
 	return retval;
 }
 
@@ -831,7 +831,7 @@ static int arm_dpm_full_context(struct target *target)
 	} while (did_read);
 
 	retval = arm_dpm_modeswitch(dpm, ARM_MODE_ANY);
-	/* (void) */ dpm->finish(dpm);
+	dpm->finish(dpm);
 done:
 	return retval;
 }
diff --git a/src/target/armv7a.c b/src/target/armv7a.c
index dc3752e0b..e22d309a0 100644
--- a/src/target/armv7a.c
+++ b/src/target/armv7a.c
@@ -74,7 +74,7 @@ static void armv7a_show_fault_registers(struct target *target)
 		", IFAR: %8.8" PRIx32, ifsr, ifar);
 
 done:
-	/* (void) */ dpm->finish(dpm);
+	dpm->finish(dpm);
 }
 
 
diff --git a/src/target/armv8.c b/src/target/armv8.c
index 3bf094275..61d72741a 100644
--- a/src/target/armv8.c
+++ b/src/target/armv8.c
@@ -1010,7 +1010,7 @@ static void armv8_show_fault_registers32(struct armv8_common *armv8)
 		", IFAR: %8.8" PRIx32, ifsr, ifar);
 
 done:
-	/* (void) */ dpm->finish(dpm);
+	dpm->finish(dpm);
 }
 
 static __attribute__((unused)) void armv8_show_fault_registers(struct target *target)
diff --git a/src/target/armv8_dpm.c b/src/target/armv8_dpm.c
index 22617fd0e..d1cee8a10 100644
--- a/src/target/armv8_dpm.c
+++ b/src/target/armv8_dpm.c
@@ -500,7 +500,7 @@ static int dpmv8_mrc(struct target *target, int cpnum,
 			ARMV4_5_MRC(cpnum, op1, 0, crn, crm, op2),
 			value);
 
-	/* (void) */ dpm->finish(dpm);
+	dpm->finish(dpm);
 	return retval;
 }
 
@@ -525,7 +525,7 @@ static int dpmv8_mcr(struct target *target, int cpnum,
 			ARMV4_5_MCR(cpnum, op1, 0, crn, crm, op2),
 			value);
 
-	/* (void) */ dpm->finish(dpm);
+	dpm->finish(dpm);
 	return retval;
 }
 
@@ -991,7 +991,7 @@ static int armv8_dpm_read_core_reg(struct target *target, struct reg *r,
 		goto fail;
 
 fail:
-	/* (void) */ dpm->finish(dpm);
+	dpm->finish(dpm);
 	return retval;
 }
 
@@ -1085,7 +1085,7 @@ static int armv8_dpm_full_context(struct target *target)
 	} while (did_read);
 
 	retval = armv8_dpm_modeswitch(dpm, ARM_MODE_ANY);
-	/* (void) */ dpm->finish(dpm);
+	dpm->finish(dpm);
 done:
 	return retval;
 }

-----------------------------------------------------------------------

Summary of changes:
 src/target/arm_dpm.c   | 22 +++++++++++-----------
 src/target/armv7a.c    |  2 +-
 src/target/armv8.c     |  2 +-
 src/target/armv8_dpm.c |  8 ++++----
 4 files changed, 17 insertions(+), 17 deletions(-)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-749-g3ccf68cd0

[openocd-gerrit <ope...@us...>]

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- Log -----------------------------------------------------------------
commit 3ccf68cd0a8aa740565456317bae9d43618ef662
Author: Antonio Borneo <bor...@gm...>
Date:   Mon Sep 16 11:55:20 2024 +0200

    OpenOCD: drop comparison with true/false
    
    Fix checkpatch errors:
    
            ERROR:BOOL_COMPARISON: Using comparison to true/false is
            error prone
    
    While there,
    - drop useless parenthesis,
    - drop unnecessary else after a return.
    
    Change-Id: I1234737b3e65bd10df5e938d1c36f9abaf02d348
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8496
    Reviewed-by: zapb <de...@za...>
    Tested-by: jenkins

diff --git a/src/flash/nor/psoc6.c b/src/flash/nor/psoc6.c
index 47f3ac698..662910aa0 100644
--- a/src/flash/nor/psoc6.c
+++ b/src/flash/nor/psoc6.c
@@ -487,7 +487,7 @@ static int psoc6_get_info(struct flash_bank *bank, struct command_invocation *cm
 {
 	struct psoc6_target_info *psoc6_info = bank->driver_priv;
 
-	if (psoc6_info->is_probed == false)
+	if (!psoc6_info->is_probed)
 		return ERROR_FAIL;
 
 	int hr = get_silicon_id(bank->target, &psoc6_info->silicon_id, &psoc6_info->protection);
diff --git a/src/flash/nor/xcf.c b/src/flash/nor/xcf.c
index 1d67b0943..4011fa42b 100644
--- a/src/flash/nor/xcf.c
+++ b/src/flash/nor/xcf.c
@@ -143,28 +143,27 @@ static int isc_enter(struct flash_bank *bank)
 
 	struct xcf_status status = read_status(bank);
 
-	if (true == status.isc_mode)
+	if (status.isc_mode)
 		return ERROR_OK;
-	else {
-		struct scan_field scan;
 
-		scan.check_mask = NULL;
-		scan.check_value = NULL;
-		scan.num_bits = 16;
-		scan.out_value = cmd_isc_enable;
-		scan.in_value = NULL;
+	struct scan_field scan;
 
-		jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE);
-		jtag_execute_queue();
+	scan.check_mask = NULL;
+	scan.check_value = NULL;
+	scan.num_bits = 16;
+	scan.out_value = cmd_isc_enable;
+	scan.in_value = NULL;
 
-		status = read_status(bank);
-		if (!status.isc_mode) {
-			LOG_ERROR("*** XCF: FAILED to enter ISC mode");
-			return ERROR_FLASH_OPERATION_FAILED;
-		}
+	jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE);
+	jtag_execute_queue();
 
-		return ERROR_OK;
+	status = read_status(bank);
+	if (!status.isc_mode) {
+		LOG_ERROR("*** XCF: FAILED to enter ISC mode");
+		return ERROR_FLASH_OPERATION_FAILED;
 	}
+
+	return ERROR_OK;
 }
 
 static int isc_leave(struct flash_bank *bank)
@@ -174,27 +173,26 @@ static int isc_leave(struct flash_bank *bank)
 
 	if (!status.isc_mode)
 		return ERROR_OK;
-	else {
-		struct scan_field scan;
-
-		scan.check_mask = NULL;
-		scan.check_value = NULL;
-		scan.num_bits = 16;
-		scan.out_value = cmd_isc_disable;
-		scan.in_value = NULL;
-
-		jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE);
-		jtag_execute_queue();
-		alive_sleep(1);	/* device needs 50 uS to leave ISC mode */
-
-		status = read_status(bank);
-		if (status.isc_mode) {
-			LOG_ERROR("*** XCF: FAILED to leave ISC mode");
-			return ERROR_FLASH_OPERATION_FAILED;
-		}
 
-		return ERROR_OK;
+	struct scan_field scan;
+
+	scan.check_mask = NULL;
+	scan.check_value = NULL;
+	scan.num_bits = 16;
+	scan.out_value = cmd_isc_disable;
+	scan.in_value = NULL;
+
+	jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE);
+	jtag_execute_queue();
+	alive_sleep(1);	/* device needs 50 uS to leave ISC mode */
+
+	status = read_status(bank);
+	if (status.isc_mode) {
+		LOG_ERROR("*** XCF: FAILED to leave ISC mode");
+		return ERROR_FLASH_OPERATION_FAILED;
 	}
+
+	return ERROR_OK;
 }
 
 static int sector_state(uint8_t wrpt, int sector)
diff --git a/src/jtag/drivers/ulink.c b/src/jtag/drivers/ulink.c
index ad3bc6e37..3a248e388 100644
--- a/src/jtag/drivers/ulink.c
+++ b/src/jtag/drivers/ulink.c
@@ -606,7 +606,7 @@ static void ulink_clear_queue(struct ulink *device)
 
 		/* IN payload MUST be freed ONLY if no other commands use the
 		 * payload_in_start buffer */
-		if (current->free_payload_in_start == true) {
+		if (current->free_payload_in_start) {
 			free(current->payload_in_start);
 			current->payload_in_start = NULL;
 			current->payload_in = NULL;
@@ -1861,7 +1861,7 @@ static int ulink_post_process_queue(struct ulink *device)
 
 		/* Check if a corresponding OpenOCD command is stored for this
 		 * OpenULINK command */
-		if ((current->needs_postprocessing == true) && (openocd_cmd)) {
+		if (current->needs_postprocessing && openocd_cmd) {
 			switch (openocd_cmd->type) {
 			    case JTAG_SCAN:
 				    ret = ulink_post_process_scan(current);
@@ -2131,7 +2131,7 @@ static int ulink_init(void)
 			download_firmware = true;
 	}
 
-	if (download_firmware == true) {
+	if (download_firmware) {
 		LOG_INFO("Loading OpenULINK firmware. This is reversible by power-cycling"
 			" ULINK device.");
 		ret = ulink_load_firmware_and_renumerate(&ulink_handle,
diff --git a/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c b/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c
index e790f3ae5..8f0ed96f3 100644
--- a/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c
+++ b/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c
@@ -215,7 +215,7 @@ static int ublast2_libusb_init(struct ublast_lowlevel *low)
 	const uint16_t vids_renum[] = { low->ublast_vid, 0 };
 	const uint16_t pids_renum[] = { low->ublast_pid, 0 };
 
-	if (renumeration == false) {
+	if (!renumeration) {
 		if (jtag_libusb_open(vids_renum, pids_renum, NULL, &low->libusb_dev, NULL) != ERROR_OK) {
 			LOG_ERROR("Altera USB-Blaster II not found");
 			return ERROR_FAIL;
diff --git a/src/rtos/hwthread.c b/src/rtos/hwthread.c
index 65b89eb22..1890a3d87 100644
--- a/src/rtos/hwthread.c
+++ b/src/rtos/hwthread.c
@@ -254,7 +254,7 @@ static int hwthread_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
 
 	int j = 0;
 	for (int i = 0; i < reg_list_size; i++) {
-		if (!reg_list[i] || reg_list[i]->exist == false || reg_list[i]->hidden)
+		if (!reg_list[i] || !reg_list[i]->exist || reg_list[i]->hidden)
 			continue;
 		j++;
 	}
@@ -267,7 +267,7 @@ static int hwthread_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
 
 	j = 0;
 	for (int i = 0; i < reg_list_size; i++) {
-		if (!reg_list[i] || reg_list[i]->exist == false || reg_list[i]->hidden)
+		if (!reg_list[i] || !reg_list[i]->exist || reg_list[i]->hidden)
 			continue;
 		if (!reg_list[i]->valid) {
 			retval = reg_list[i]->type->get(reg_list[i]);
diff --git a/src/rtos/rtos.c b/src/rtos/rtos.c
index 0df1182c0..54e31e426 100644
--- a/src/rtos/rtos.c
+++ b/src/rtos/rtos.c
@@ -389,7 +389,7 @@ int rtos_thread_packet(struct connection *connection, char const *packet, int pa
 		return ERROR_OK;
 	} else if (strncmp(packet, "qSymbol", 7) == 0) {
 		if (rtos_qsymbol(connection, packet, packet_size) == 1) {
-			if (target->rtos_auto_detect == true) {
+			if (target->rtos_auto_detect) {
 				target->rtos_auto_detect = false;
 				target->rtos->type->create(target);
 			}
diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c
index 854c4dc65..c1e5e268f 100644
--- a/src/server/gdb_server.c
+++ b/src/server/gdb_server.c
@@ -1262,7 +1262,7 @@ static int gdb_get_registers_packet(struct connection *connection,
 		return gdb_error(connection, retval);
 
 	for (i = 0; i < reg_list_size; i++) {
-		if (!reg_list[i] || reg_list[i]->exist == false || reg_list[i]->hidden)
+		if (!reg_list[i] || !reg_list[i]->exist || reg_list[i]->hidden)
 			continue;
 		reg_packet_size += DIV_ROUND_UP(reg_list[i]->size, 8) * 2;
 	}
@@ -1276,7 +1276,7 @@ static int gdb_get_registers_packet(struct connection *connection,
 	reg_packet_p = reg_packet;
 
 	for (i = 0; i < reg_list_size; i++) {
-		if (!reg_list[i] || reg_list[i]->exist == false || reg_list[i]->hidden)
+		if (!reg_list[i] || !reg_list[i]->exist || reg_list[i]->hidden)
 			continue;
 		retval = gdb_get_reg_value_as_str(target, reg_packet_p, reg_list[i]);
 		if (retval != ERROR_OK && gdb_report_register_access_error) {
@@ -2254,7 +2254,7 @@ static int get_reg_features_list(struct target *target, char const **feature_lis
 	*feature_list = calloc(1, sizeof(char *));
 
 	for (int i = 0; i < reg_list_size; i++) {
-		if (reg_list[i]->exist == false || reg_list[i]->hidden)
+		if (!reg_list[i]->exist || reg_list[i]->hidden)
 			continue;
 
 		if (reg_list[i]->feature
@@ -2464,7 +2464,7 @@ static int gdb_generate_target_description(struct target *target, char **tdesc_o
 			int i;
 			for (i = 0; i < reg_list_size; i++) {
 
-				if (reg_list[i]->exist == false || reg_list[i]->hidden)
+				if (!reg_list[i]->exist || reg_list[i]->hidden)
 					continue;
 
 				if (strcmp(reg_list[i]->feature->name, features[current_feature]))
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 880a83a18..bd0e8d886 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -1521,7 +1521,7 @@ static int cortex_m_step(struct target *target, int current,
 	/* if no bkpt instruction is found at pc then we can perform
 	 * a normal step, otherwise we have to manually step over the bkpt
 	 * instruction - as such simulate a step */
-	if (bkpt_inst_found == false) {
+	if (!bkpt_inst_found) {
 		if (cortex_m->isrmasking_mode != CORTEX_M_ISRMASK_AUTO) {
 			/* Automatic ISR masking mode off: Just step over the next
 			 * instruction, with interrupts on or off as appropriate. */
diff --git a/src/target/target.c b/src/target/target.c
index 2be8b24b9..49611dfb4 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -3042,7 +3042,7 @@ COMMAND_HANDLER(handle_reg_command)
 			for (i = 0, reg = cache->reg_list;
 					i < cache->num_regs;
 					i++, reg++, count++) {
-				if (reg->exist == false || reg->hidden)
+				if (!reg->exist || reg->hidden)
 					continue;
 				/* only print cached values if they are valid */
 				if (reg->valid) {

-----------------------------------------------------------------------

Summary of changes:
 src/flash/nor/psoc6.c                              |  2 +-
 src/flash/nor/xcf.c                                | 68 +++++++++++-----------
 src/jtag/drivers/ulink.c                           |  6 +-
 .../drivers/usb_blaster/ublast2_access_libusb.c    |  2 +-
 src/rtos/hwthread.c                                |  4 +-
 src/rtos/rtos.c                                    |  2 +-
 src/server/gdb_server.c                            |  8 +--
 src/target/cortex_m.c                              |  2 +-
 src/target/target.c                                |  2 +-
 9 files changed, 47 insertions(+), 49 deletions(-)


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commit 66006d83b99843ab7c6ec19125e2fc20855a4c7c
Author: Antonio Borneo <bor...@gm...>
Date:   Mon Sep 16 11:37:05 2024 +0200

    target: drop comparison to NULL
    
    Fix checkpatch error:
    
            ERROR:COMPARISON_TO_NULL: Comparison to NULL could be
            written "cmd_ctx"
    
    Change-Id: I3615fc427f8b160d44b6edbf7a066a086cab99bb
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8495
    Tested-by: jenkins
    Reviewed-by: zapb <de...@za...>

diff --git a/src/target/target.c b/src/target/target.c
index 56aa8b1e7..2be8b24b9 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -4596,7 +4596,7 @@ static int target_jim_write_memory(Jim_Interp *interp, int argc,
 	}
 
 	struct command_context *cmd_ctx = current_command_context(interp);
-	assert(cmd_ctx != NULL);
+	assert(cmd_ctx);
 	struct target *target = get_current_target(cmd_ctx);
 
 	const size_t buffersize = 4096;
@@ -4739,7 +4739,7 @@ static int target_jim_get_reg(Jim_Interp *interp, int argc,
 		return JIM_ERR;
 
 	struct command_context *cmd_ctx = current_command_context(interp);
-	assert(cmd_ctx != NULL);
+	assert(cmd_ctx);
 	const struct target *target = get_current_target(cmd_ctx);
 
 	for (int i = 0; i < length; i++) {

commit 39197cdb4ee8f7ed605308a07bac67b33fb4973f
Author: Antonio Borneo <bor...@gm...>
Date:   Mon Sep 16 11:36:03 2024 +0200

    jtag: stlink_usb: drop comparison to NULL
    
    Fix checkpatch error:
    
            ERROR:COMPARISON_TO_NULL: Comparison to NULL could be
            written "handle"
    
    Change-Id: I0ac12ccfc5fce4dd41266f83eb4b973a4e6a314d
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8494
    Reviewed-by: zapb <de...@za...>
    Tested-by: jenkins

diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c
index 812a192c2..0385e4d85 100644
--- a/src/jtag/drivers/stlink_usb.c
+++ b/src/jtag/drivers/stlink_usb.c
@@ -2754,7 +2754,7 @@ static int stlink_usb_read_mem32_noaddrinc(void *handle, uint8_t ap_num, uint32_
 {
 	struct stlink_usb_handle *h = handle;
 
-	assert(handle != NULL);
+	assert(handle);
 
 	if (!(h->version.flags & STLINK_F_HAS_MEM_RD_NO_INC))
 		return ERROR_COMMAND_NOTFOUND;
@@ -2796,7 +2796,7 @@ static int stlink_usb_write_mem32_noaddrinc(void *handle, uint8_t ap_num, uint32
 {
 	struct stlink_usb_handle *h = handle;
 
-	assert(handle != NULL);
+	assert(handle);
 
 	if (!(h->version.flags & STLINK_F_HAS_MEM_WR_NO_INC))
 		return ERROR_COMMAND_NOTFOUND;
@@ -3947,7 +3947,7 @@ static int stlink_usb_rw_misc_out(void *handle, uint32_t items, const uint8_t *b
 
 	LOG_DEBUG_IO("%s(%" PRIu32 ")", __func__, items);
 
-	assert(handle != NULL);
+	assert(handle);
 
 	if (!(h->version.flags & STLINK_F_HAS_RW_MISC))
 		return ERROR_COMMAND_NOTFOUND;
@@ -3968,7 +3968,7 @@ static int stlink_usb_rw_misc_in(void *handle, uint32_t items, uint8_t *buffer)
 
 	LOG_DEBUG_IO("%s(%" PRIu32 ")", __func__, items);
 
-	assert(handle != NULL);
+	assert(handle);
 
 	if (!(h->version.flags & STLINK_F_HAS_RW_MISC))
 		return ERROR_COMMAND_NOTFOUND;

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/stlink_usb.c | 8 ++++----
 src/target/target.c           | 4 ++--
 2 files changed, 6 insertions(+), 6 deletions(-)


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- Log -----------------------------------------------------------------
commit 4214fca4478404fff21110fd8ce5b4dc9ccfa72a
Author: Antonio Borneo <bor...@gm...>
Date:   Mon Sep 16 11:31:37 2024 +0200

    OpenOCD: fix code alignment
    
    Fix checkpatch errors:
    
            ERROR:TABSTOP: Statements should start on a tabstop
    
    Change-Id: Ia771e7b7fa2cc4ef0be7f52b670525175555c8e4
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8493
    Reviewed-by: zapb <de...@za...>
    Tested-by: jenkins

diff --git a/src/flash/nor/ocl.c b/src/flash/nor/ocl.c
index e00c365ed..61af908f5 100644
--- a/src/flash/nor/ocl.c
+++ b/src/flash/nor/ocl.c
@@ -160,7 +160,7 @@ static int ocl_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t of
 		retval = embeddedice_send(ocl->jtag_info, dcc_buffer, dcc_bufptr-dcc_buffer);
 		if (retval != ERROR_OK) {
 			free(dcc_buffer);
-		  return retval;
+			return retval;
 		}
 
 		/* wait for response, fixed timeout of 1 s */
diff --git a/src/jtag/drivers/buspirate.c b/src/jtag/drivers/buspirate.c
index b01a79644..6f8df5ada 100644
--- a/src/jtag/drivers/buspirate.c
+++ b/src/jtag/drivers/buspirate.c
@@ -1442,7 +1442,7 @@ static void buspirate_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_del
 			data);
 
 	switch (ack) {
-	 case SWD_ACK_OK:
+	case SWD_ACK_OK:
 		if (parity != parity_u32(data)) {
 			LOG_DEBUG("Read data parity mismatch %x %x", parity, parity_u32(data));
 			queued_retval = ERROR_FAIL;
@@ -1453,15 +1453,15 @@ static void buspirate_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_del
 		if (cmd & SWD_CMD_APNDP)
 			buspirate_swd_idle_clocks(ap_delay_clk);
 		return;
-	 case SWD_ACK_WAIT:
+	case SWD_ACK_WAIT:
 		LOG_DEBUG("SWD_ACK_WAIT");
 		buspirate_swd_clear_sticky_errors();
 		return;
-	 case SWD_ACK_FAULT:
+	case SWD_ACK_FAULT:
 		LOG_DEBUG("SWD_ACK_FAULT");
 		queued_retval = ack;
 		return;
-	 default:
+	default:
 		LOG_DEBUG("No valid acknowledge: ack=%d", ack);
 		queued_retval = ack;
 		return;
@@ -1500,19 +1500,19 @@ static void buspirate_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_del
 			value);
 
 	switch (ack) {
-	 case SWD_ACK_OK:
+	case SWD_ACK_OK:
 		if (cmd & SWD_CMD_APNDP)
 			buspirate_swd_idle_clocks(ap_delay_clk);
 		return;
-	 case SWD_ACK_WAIT:
+	case SWD_ACK_WAIT:
 		LOG_DEBUG("SWD_ACK_WAIT");
 		buspirate_swd_clear_sticky_errors();
 		return;
-	 case SWD_ACK_FAULT:
+	case SWD_ACK_FAULT:
 		LOG_DEBUG("SWD_ACK_FAULT");
 		queued_retval = ack;
 		return;
-	 default:
+	default:
 		LOG_DEBUG("No valid acknowledge: ack=%d", ack);
 		queued_retval = ack;
 		return;
diff --git a/src/jtag/hla/hla_interface.c b/src/jtag/hla/hla_interface.c
index c73f6c8d3..f284278dd 100644
--- a/src/jtag/hla/hla_interface.c
+++ b/src/jtag/hla/hla_interface.c
@@ -348,7 +348,7 @@ static const struct command_registration hl_interface_subcommand_handlers[] = {
 	 .help = "select which ST-Link backend to use",
 	 .usage = "usb | tcp [port]",
 	},
-	 {
+	{
 	 .name = "command",
 	 .handler = &interface_handle_hla_command,
 	 .mode = COMMAND_EXEC,
diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c
index 2d0bd641b..587e20d2b 100644
--- a/src/target/mips32_pracc.c
+++ b/src/target/mips32_pracc.c
@@ -212,7 +212,7 @@ static int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_i
 			store_pending--;
 
 		} else {					/* read/fetch access */
-			 if (!final_check) {			/* executing function code */
+			if (!final_check) {			/* executing function code */
 				/* check address */
 				if (ejtag_info->pa_addr != (MIPS32_PRACC_TEXT + code_count * 4)) {
 					LOG_DEBUG("reading at unexpected address %" PRIx32 ", expected %x",
@@ -243,7 +243,7 @@ static int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_i
 				if (code_count == ctx->code_count)	/* last instruction, start final check */
 					final_check = 1;
 
-			 } else {	/* final check after function code shifted out */
+			} else {	/* final check after function code shifted out */
 					/* check address */
 				if (ejtag_info->pa_addr == MIPS32_PRACC_TEXT) {
 					if (!pass) {	/* first pass through pracc text */
@@ -275,7 +275,7 @@ static int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_i
 					}
 				instr = MIPS32_NOP;	/* shift out NOPs instructions */
 				code_count++;
-			 }
+			}
 
 			/* Send instruction out */
 			mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
diff --git a/src/target/openrisc/or1k_du_adv.c b/src/target/openrisc/or1k_du_adv.c
index e4003a213..f401ea9fb 100644
--- a/src/target/openrisc/or1k_du_adv.c
+++ b/src/target/openrisc/or1k_du_adv.c
@@ -362,7 +362,7 @@ static int adbg_ctrl_read(struct or1k_jtag *jtag_info, uint32_t regidx,
 	default:
 		LOG_ERROR("Illegal debug chain selected (%i) while doing control read",
 			  jtag_info->or1k_jtag_module_selected);
-		 return ERROR_FAIL;
+		return ERROR_FAIL;
 	}
 
 	/* Zero MSB = op for module, not top-level debug unit */

commit 537793bb245750f4af992a04547f856d1a99cbfc
Author: Antonio Borneo <bor...@gm...>
Date:   Mon Sep 16 10:45:17 2024 +0200

    target: mem_ap: drop return from void function
    
    Checkpatch triggers the error
    
            ERROR:RETURN_VOID: void function return statements are not
            generally useful
    
    Fix it!
    
    Change-Id: I72d9fb8242d6a91c0aa481d5d023f0359c76a5ec
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8492
    Tested-by: jenkins
    Reviewed-by: zapb <de...@za...>

diff --git a/src/target/mem_ap.c b/src/target/mem_ap.c
index 61a9475e6..411402077 100644
--- a/src/target/mem_ap.c
+++ b/src/target/mem_ap.c
@@ -75,7 +75,6 @@ static void mem_ap_deinit_target(struct target *target)
 
 	free(target->private_config);
 	free(target->arch_info);
-	return;
 }
 
 static int mem_ap_arch_state(struct target *target)

-----------------------------------------------------------------------

Summary of changes:
 src/flash/nor/ocl.c               |  2 +-
 src/jtag/drivers/buspirate.c      | 16 ++++++++--------
 src/jtag/hla/hla_interface.c      |  2 +-
 src/target/mem_ap.c               |  1 -
 src/target/mips32_pracc.c         |  6 +++---
 src/target/openrisc/or1k_du_adv.c |  2 +-
 6 files changed, 14 insertions(+), 15 deletions(-)


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- Log -----------------------------------------------------------------
commit 39f024900e7e69d2695071267fb079afb5ad6635
Author: Antonio Borneo <bor...@gm...>
Date:   Mon Sep 16 10:42:47 2024 +0200

    flash: stm32l4x: fix open brace style
    
    Checkpatch triggers the error
    
            ERROR:OPEN_BRACE: open brace '{' following function
            definitions go on the next line
    
    Fix it!
    
    Change-Id: I0ce4585a6507eca094b82cdabdecf6fdbe7923b1
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8491
    Tested-by: jenkins
    Reviewed-by: zapb <de...@za...>

diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c
index 9235dd787..d66a83dd3 100644
--- a/src/flash/nor/stm32l4x.c
+++ b/src/flash/nor/stm32l4x.c
@@ -717,7 +717,8 @@ struct range {
 };
 
 static void bitmap_to_ranges(unsigned long *bitmap, unsigned int nbits,
-		struct range *ranges, unsigned int *ranges_count) {
+		struct range *ranges, unsigned int *ranges_count)
+{
 	*ranges_count = 0;
 	bool last_bit = 0, cur_bit;
 	for (unsigned int i = 0; i < nbits; i++) {

-----------------------------------------------------------------------

Summary of changes:
 src/flash/nor/stm32l4x.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)


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- Log -----------------------------------------------------------------
commit 436e6f1770e4da6ec5b52724cfb637e8916b535a
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Sep 8 21:22:40 2024 +0200

    openocd: convert 'unsigned' to 'unsigned int'
    
    Conversion done with
            checkpatch --fix-inplace -types UNSPECIFIED_INT
    
    Ignore the cast as they could be better addressed.
    Fix only minor additional checkpatch issue (spacing and line
    length).
    
    Change-Id: I4f936ffc4cedb153afa331cd293b08f4c913dc93
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8482
    Tested-by: jenkins

diff --git a/src/helper/binarybuffer.c b/src/helper/binarybuffer.c
index a7ca5af9d..6fba86a66 100644
--- a/src/helper/binarybuffer.c
+++ b/src/helper/binarybuffer.c
@@ -40,7 +40,7 @@ static const char hex_digits[] = {
 	'a', 'b', 'c', 'd', 'e', 'f'
 };
 
-void *buf_cpy(const void *from, void *_to, unsigned size)
+void *buf_cpy(const void *from, void *_to, unsigned int size)
 {
 	if (!from || !_to)
 		return NULL;
@@ -49,7 +49,7 @@ void *buf_cpy(const void *from, void *_to, unsigned size)
 	memcpy(_to, from, DIV_ROUND_UP(size, 8));
 
 	/* mask out bits that don't belong to the buffer */
-	unsigned trailing_bits = size % 8;
+	unsigned int trailing_bits = size % 8;
 	if (trailing_bits) {
 		uint8_t *to = _to;
 		to[size / 8] &= (1 << trailing_bits) - 1;
@@ -61,22 +61,22 @@ static bool buf_eq_masked(uint8_t a, uint8_t b, uint8_t m)
 {
 	return (a & m) == (b & m);
 }
-static bool buf_eq_trailing(uint8_t a, uint8_t b, uint8_t m, unsigned trailing)
+static bool buf_eq_trailing(uint8_t a, uint8_t b, uint8_t m, unsigned int trailing)
 {
 	uint8_t mask = (1 << trailing) - 1;
 	return buf_eq_masked(a, b, mask & m);
 }
 
-bool buf_eq(const void *_buf1, const void *_buf2, unsigned size)
+bool buf_eq(const void *_buf1, const void *_buf2, unsigned int size)
 {
 	if (!_buf1 || !_buf2)
 		return _buf1 == _buf2;
 
-	unsigned last = size / 8;
+	unsigned int last = size / 8;
 	if (memcmp(_buf1, _buf2, last) != 0)
 		return false;
 
-	unsigned trailing = size % 8;
+	unsigned int trailing = size % 8;
 	if (!trailing)
 		return true;
 
@@ -85,24 +85,24 @@ bool buf_eq(const void *_buf1, const void *_buf2, unsigned size)
 }
 
 bool buf_eq_mask(const void *_buf1, const void *_buf2,
-	const void *_mask, unsigned size)
+	const void *_mask, unsigned int size)
 {
 	if (!_buf1 || !_buf2)
 		return _buf1 == _buf2 && _buf1 == _mask;
 
 	const uint8_t *buf1 = _buf1, *buf2 = _buf2, *mask = _mask;
-	unsigned last = size / 8;
-	for (unsigned i = 0; i < last; i++) {
+	unsigned int last = size / 8;
+	for (unsigned int i = 0; i < last; i++) {
 		if (!buf_eq_masked(buf1[i], buf2[i], mask[i]))
 			return false;
 	}
-	unsigned trailing = size % 8;
+	unsigned int trailing = size % 8;
 	if (!trailing)
 		return true;
 	return buf_eq_trailing(buf1[last], buf2[last], mask[last], trailing);
 }
 
-void *buf_set_ones(void *_buf, unsigned size)
+void *buf_set_ones(void *_buf, unsigned int size)
 {
 	uint8_t *buf = _buf;
 	if (!buf)
@@ -110,19 +110,19 @@ void *buf_set_ones(void *_buf, unsigned size)
 
 	memset(buf, 0xff, size / 8);
 
-	unsigned trailing_bits = size % 8;
+	unsigned int trailing_bits = size % 8;
 	if (trailing_bits)
 		buf[size / 8] = (1 << trailing_bits) - 1;
 
 	return buf;
 }
 
-void *buf_set_buf(const void *_src, unsigned src_start,
-	void *_dst, unsigned dst_start, unsigned len)
+void *buf_set_buf(const void *_src, unsigned int src_start,
+	void *_dst, unsigned int dst_start, unsigned int len)
 {
 	const uint8_t *src = _src;
 	uint8_t *dst = _dst;
-	unsigned i, sb, db, sq, dq, lb, lq;
+	unsigned int i, sb, db, sq, dq, lb, lq;
 
 	sb = src_start / 8;
 	db = dst_start / 8;
@@ -175,13 +175,13 @@ uint32_t flip_u32(uint32_t value, unsigned int num)
 	return c;
 }
 
-char *buf_to_hex_str(const void *_buf, unsigned buf_len)
+char *buf_to_hex_str(const void *_buf, unsigned int buf_len)
 {
-	unsigned len_bytes = DIV_ROUND_UP(buf_len, 8);
+	unsigned int len_bytes = DIV_ROUND_UP(buf_len, 8);
 	char *str = calloc(len_bytes * 2 + 1, 1);
 
 	const uint8_t *buf = _buf;
-	for (unsigned i = 0; i < len_bytes; i++) {
+	for (unsigned int i = 0; i < len_bytes; i++) {
 		uint8_t tmp = buf[len_bytes - i - 1];
 		if ((i == 0) && (buf_len % 8))
 			tmp &= (0xff >> (8 - (buf_len % 8)));
@@ -289,8 +289,8 @@ void bit_copy_queue_init(struct bit_copy_queue *q)
 	INIT_LIST_HEAD(&q->list);
 }
 
-int bit_copy_queued(struct bit_copy_queue *q, uint8_t *dst, unsigned dst_offset, const uint8_t *src,
-	unsigned src_offset, unsigned bit_count)
+int bit_copy_queued(struct bit_copy_queue *q, uint8_t *dst, unsigned int dst_offset, const uint8_t *src,
+	unsigned int src_offset, unsigned int bit_count)
 {
 	struct bit_copy_queue_entry *qe = malloc(sizeof(*qe));
 	if (!qe)
@@ -395,12 +395,12 @@ size_t hexify(char *hex, const uint8_t *bin, size_t count, size_t length)
 	return i;
 }
 
-void buffer_shr(void *_buf, unsigned buf_len, unsigned count)
+void buffer_shr(void *_buf, unsigned int buf_len, unsigned int count)
 {
-	unsigned i;
+	unsigned int i;
 	unsigned char *buf = _buf;
-	unsigned bytes_to_remove;
-	unsigned shift;
+	unsigned int bytes_to_remove;
+	unsigned int shift;
 
 	bytes_to_remove = count / 8;
 	shift = count - (bytes_to_remove * 8);
diff --git a/src/helper/binarybuffer.h b/src/helper/binarybuffer.h
index ed13b980f..99132798b 100644
--- a/src/helper/binarybuffer.h
+++ b/src/helper/binarybuffer.h
@@ -32,7 +32,7 @@
  * @param value Up to 32 bits that will be copied to _buffer.
  */
 static inline void buf_set_u32(uint8_t *_buffer,
-	unsigned first, unsigned num, uint32_t value)
+	unsigned int first, unsigned int num, uint32_t value)
 {
 	assert(num >= 1 && num <= 32);
 	uint8_t *buffer = _buffer;
@@ -43,7 +43,7 @@ static inline void buf_set_u32(uint8_t *_buffer,
 		buffer[1] = (value >> 8) & 0xff;
 		buffer[0] = (value >> 0) & 0xff;
 	} else {
-		for (unsigned i = first; i < first + num; i++) {
+		for (unsigned int i = first; i < first + num; i++) {
 			if (((value >> (i - first)) & 1) == 1)
 				buffer[i / 8] |= 1 << (i % 8);
 			else
@@ -63,7 +63,7 @@ static inline void buf_set_u32(uint8_t *_buffer,
  * @param value Up to 64 bits that will be copied to _buffer.
  */
 static inline void buf_set_u64(uint8_t *_buffer,
-	unsigned first, unsigned num, uint64_t value)
+	unsigned int first, unsigned int num, uint64_t value)
 {
 	assert(num >= 1 && num <= 64);
 	uint8_t *buffer = _buffer;
@@ -83,7 +83,7 @@ static inline void buf_set_u64(uint8_t *_buffer,
 		buffer[1] = (value >> 8) & 0xff;
 		buffer[0] = (value >> 0) & 0xff;
 	} else {
-		for (unsigned i = first; i < first + num; i++) {
+		for (unsigned int i = first; i < first + num; i++) {
 			if (((value >> (i - first)) & 1) == 1)
 				buffer[i / 8] |= 1 << (i % 8);
 			else
@@ -102,7 +102,7 @@ static inline void buf_set_u64(uint8_t *_buffer,
  * @returns Up to 32-bits that were read from @c _buffer.
  */
 static inline uint32_t buf_get_u32(const uint8_t *_buffer,
-	unsigned first, unsigned num)
+	unsigned int first, unsigned int num)
 {
 	assert(num >= 1 && num <= 32);
 	const uint8_t *buffer = _buffer;
@@ -114,7 +114,7 @@ static inline uint32_t buf_get_u32(const uint8_t *_buffer,
 				(((uint32_t)buffer[0]) << 0);
 	} else {
 		uint32_t result = 0;
-		for (unsigned i = first; i < first + num; i++) {
+		for (unsigned int i = first; i < first + num; i++) {
 			if (((buffer[i / 8] >> (i % 8)) & 1) == 1)
 				result |= 1U << (i - first);
 		}
@@ -132,7 +132,7 @@ static inline uint32_t buf_get_u32(const uint8_t *_buffer,
  * @returns Up to 64-bits that were read from @c _buffer.
  */
 static inline uint64_t buf_get_u64(const uint8_t *_buffer,
-	unsigned first, unsigned num)
+	unsigned int first, unsigned int num)
 {
 	assert(num >= 1 && num <= 64);
 	const uint8_t *buffer = _buffer;
@@ -153,7 +153,7 @@ static inline uint64_t buf_get_u64(const uint8_t *_buffer,
 				(((uint64_t)buffer[0]) << 0));
 	} else {
 		uint64_t result = 0;
-		for (unsigned i = first; i < first + num; i++) {
+		for (unsigned int i = first; i < first + num; i++) {
 			if (((buffer[i / 8] >> (i % 8)) & 1) == 1)
 				result = result | ((uint64_t)1 << (uint64_t)(i - first));
 		}
@@ -170,11 +170,11 @@ static inline uint64_t buf_get_u64(const uint8_t *_buffer,
  * @param width The number of bits in value (2-32).
  * @returns A 32-bit word with @c value in reversed bit-order.
  */
-uint32_t flip_u32(uint32_t value, unsigned width);
+uint32_t flip_u32(uint32_t value, unsigned int width);
 
-bool buf_eq(const void *buf1, const void *buf2, unsigned size);
+bool buf_eq(const void *buf1, const void *buf2, unsigned int size);
 bool buf_eq_mask(const void *buf1, const void *buf2,
-		const void *mask, unsigned size);
+		const void *mask, unsigned int size);
 
 /**
  * Copies @c size bits out of @c from and into @c to.  Any extra
@@ -183,7 +183,7 @@ bool buf_eq_mask(const void *buf1, const void *buf2,
  * @param to The buffer that will receive the copy of @c from.
  * @param size The number of bits to copy.
  */
-void *buf_cpy(const void *from, void *to, unsigned size);
+void *buf_cpy(const void *from, void *to, unsigned int size);
 
 /**
  * Set the contents of @c buf with @c count bits, all set to 1.
@@ -191,10 +191,10 @@ void *buf_cpy(const void *from, void *to, unsigned size);
  * @param size The number of bits.
  * @returns The original buffer (@c buf).
  */
-void *buf_set_ones(void *buf, unsigned size);
+void *buf_set_ones(void *buf, unsigned int size);
 
-void *buf_set_buf(const void *src, unsigned src_start,
-		  void *dst, unsigned dst_start, unsigned len);
+void *buf_set_buf(const void *src, unsigned int src_start,
+		  void *dst, unsigned int dst_start, unsigned int len);
 
 /**
  * Parse an unsigned number (provided as a zero-terminated string)
@@ -207,7 +207,7 @@ void *buf_set_buf(const void *src, unsigned src_start,
  */
 int str_to_buf(const char *str, void *_buf, unsigned int buf_bitsize);
 
-char *buf_to_hex_str(const void *buf, unsigned size);
+char *buf_to_hex_str(const void *buf, unsigned int size);
 
 /* read a uint32_t from a buffer in target memory endianness */
 static inline uint32_t fast_target_buffer_get_u32(const void *p, bool le)
@@ -215,8 +215,8 @@ static inline uint32_t fast_target_buffer_get_u32(const void *p, bool le)
 	return le ? le_to_h_u32(p) : be_to_h_u32(p);
 }
 
-static inline void bit_copy(uint8_t *dst, unsigned dst_offset, const uint8_t *src,
-	unsigned src_offset, unsigned bit_count)
+static inline void bit_copy(uint8_t *dst, unsigned int dst_offset, const uint8_t *src,
+	unsigned int src_offset, unsigned int bit_count)
 {
 	buf_set_buf(src, src_offset, dst, dst_offset, bit_count);
 }
@@ -227,16 +227,16 @@ struct bit_copy_queue {
 
 struct bit_copy_queue_entry {
 	uint8_t *dst;
-	unsigned dst_offset;
+	unsigned int dst_offset;
 	const uint8_t *src;
-	unsigned src_offset;
-	unsigned bit_count;
+	unsigned int src_offset;
+	unsigned int bit_count;
 	struct list_head list;
 };
 
 void bit_copy_queue_init(struct bit_copy_queue *q);
-int bit_copy_queued(struct bit_copy_queue *q, uint8_t *dst, unsigned dst_offset, const uint8_t *src,
-		    unsigned src_offset, unsigned bit_count);
+int bit_copy_queued(struct bit_copy_queue *q, uint8_t *dst, unsigned int dst_offset, const uint8_t *src,
+		    unsigned int src_offset, unsigned int bit_count);
 void bit_copy_execute(struct bit_copy_queue *q);
 void bit_copy_discard(struct bit_copy_queue *q);
 
@@ -244,6 +244,6 @@ void bit_copy_discard(struct bit_copy_queue *q);
  * used in ti-icdi driver and gdb server */
 size_t unhexify(uint8_t *bin, const char *hex, size_t count);
 size_t hexify(char *hex, const uint8_t *bin, size_t count, size_t out_maxlen);
-void buffer_shr(void *_buf, unsigned buf_len, unsigned count);
+void buffer_shr(void *_buf, unsigned int buf_len, unsigned int count);
 
 #endif /* OPENOCD_HELPER_BINARYBUFFER_H */
diff --git a/src/helper/command.c b/src/helper/command.c
index 907869325..d90d34141 100644
--- a/src/helper/command.c
+++ b/src/helper/command.c
@@ -58,7 +58,7 @@ void *jimcmd_privdata(Jim_Cmd *cmd)
 	return cmd->isproc ? NULL : cmd->u.native.privData;
 }
 
-static void tcl_output(void *privData, const char *file, unsigned line,
+static void tcl_output(void *privData, const char *file, unsigned int line,
 	const char *function, const char *string)
 {
 	struct log_capture_state *state = privData;
@@ -144,7 +144,7 @@ static void script_debug(Jim_Interp *interp, unsigned int argc, Jim_Obj * const
 		return;
 
 	char *dbg = alloc_printf("command -");
-	for (unsigned i = 0; i < argc; i++) {
+	for (unsigned int i = 0; i < argc; i++) {
 		const char *w = Jim_GetString(argv[i], NULL);
 		char *t = alloc_printf("%s %s", dbg, w);
 		free(dbg);
@@ -288,7 +288,7 @@ int __register_commands(struct command_context *cmd_ctx, const char *cmd_prefix,
 	struct target *override_target)
 {
 	int retval = ERROR_OK;
-	unsigned i;
+	unsigned int i;
 	for (i = 0; cmds[i].name || cmds[i].chain; i++) {
 		const struct command_registration *cr = cmds + i;
 
@@ -323,7 +323,7 @@ int __register_commands(struct command_context *cmd_ctx, const char *cmd_prefix,
 		}
 	}
 	if (retval != ERROR_OK) {
-		for (unsigned j = 0; j < i; j++)
+		for (unsigned int j = 0; j < i; j++)
 			unregister_command(cmd_ctx, cmd_prefix, cmds[j].name);
 	}
 	return retval;
@@ -728,12 +728,12 @@ static COMMAND_HELPER(command_help_show_list, bool show_help, const char *cmd_ma
 
 #define HELP_LINE_WIDTH(_n) (int)(76 - (2 * _n))
 
-static void command_help_show_indent(unsigned n)
+static void command_help_show_indent(unsigned int n)
 {
-	for (unsigned i = 0; i < n; i++)
+	for (unsigned int i = 0; i < n; i++)
 		LOG_USER_N("  ");
 }
-static void command_help_show_wrap(const char *str, unsigned n, unsigned n2)
+static void command_help_show_wrap(const char *str, unsigned int n, unsigned int n2)
 {
 	const char *cp = str, *last = str;
 	while (*cp) {
@@ -1317,7 +1317,7 @@ DEFINE_PARSE_NUM_TYPE(_llong, long long, strtoll, LLONG_MIN, LLONG_MAX)
 
 #define DEFINE_PARSE_ULONGLONG(name, type, min, max) \
 	DEFINE_PARSE_WRAPPER(name, type, min, max, unsigned long long, _ullong)
-DEFINE_PARSE_ULONGLONG(_uint, unsigned, 0, UINT_MAX)
+DEFINE_PARSE_ULONGLONG(_uint, unsigned int, 0, UINT_MAX)
 DEFINE_PARSE_ULONGLONG(_u64,  uint64_t, 0, UINT64_MAX)
 DEFINE_PARSE_ULONGLONG(_u32,  uint32_t, 0, UINT32_MAX)
 DEFINE_PARSE_ULONGLONG(_u16,  uint16_t, 0, UINT16_MAX)
diff --git a/src/helper/command.h b/src/helper/command.h
index b224bd022..18fe56178 100644
--- a/src/helper/command.h
+++ b/src/helper/command.h
@@ -77,7 +77,7 @@ struct command_invocation {
 	struct command_context *ctx;
 	struct command *current;
 	const char *name;
-	unsigned argc;
+	unsigned int argc;
 	const char **argv;
 	Jim_Obj * const *jimtcl_argv;
 	Jim_Obj *output;
@@ -414,7 +414,7 @@ int parse_llong(const char *str, long long *ul);
 #define DECLARE_PARSE_WRAPPER(name, type) \
 		int parse ## name(const char *str, type * ul)
 
-DECLARE_PARSE_WRAPPER(_uint, unsigned);
+DECLARE_PARSE_WRAPPER(_uint, unsigned int);
 DECLARE_PARSE_WRAPPER(_u64, uint64_t);
 DECLARE_PARSE_WRAPPER(_u32, uint32_t);
 DECLARE_PARSE_WRAPPER(_u16, uint16_t);
diff --git a/src/helper/log.c b/src/helper/log.c
index 471069ade..62ba4da4c 100644
--- a/src/helper/log.c
+++ b/src/helper/log.c
@@ -53,7 +53,7 @@ static const char * const log_strings[6] = {
 static int count;
 
 /* forward the log to the listeners */
-static void log_forward(const char *file, unsigned line, const char *function, const char *string)
+static void log_forward(const char *file, unsigned int line, const char *function, const char *string)
 {
 	struct log_callback *cb, *next;
 	cb = log_callbacks;
@@ -133,7 +133,7 @@ static void log_puts(enum log_levels level,
 
 void log_printf(enum log_levels level,
 	const char *file,
-	unsigned line,
+	unsigned int line,
 	const char *function,
 	const char *format,
 	...)
@@ -156,7 +156,7 @@ void log_printf(enum log_levels level,
 	va_end(ap);
 }
 
-void log_vprintf_lf(enum log_levels level, const char *file, unsigned line,
+void log_vprintf_lf(enum log_levels level, const char *file, unsigned int line,
 		const char *function, const char *format, va_list args)
 {
 	char *tmp;
@@ -182,7 +182,7 @@ void log_vprintf_lf(enum log_levels level, const char *file, unsigned line,
 
 void log_printf_lf(enum log_levels level,
 	const char *file,
-	unsigned line,
+	unsigned int line,
 	const char *function,
 	const char *format,
 	...)
@@ -505,7 +505,7 @@ void log_socket_error(const char *socket_desc)
  * Find the first non-printable character in the char buffer, return a pointer to it.
  * If no such character exists, return NULL.
  */
-char *find_nonprint_char(char *buf, unsigned buf_len)
+char *find_nonprint_char(char *buf, unsigned int buf_len)
 {
 	for (unsigned int i = 0; i < buf_len; i++) {
 		if (!isprint(buf[i]))
diff --git a/src/helper/log.h b/src/helper/log.h
index d52c05f99..0f11cfa9a 100644
--- a/src/helper/log.h
+++ b/src/helper/log.h
@@ -48,12 +48,12 @@ enum log_levels {
 	LOG_LVL_DEBUG_IO = 4,
 };
 
-void log_printf(enum log_levels level, const char *file, unsigned line,
+void log_printf(enum log_levels level, const char *file, unsigned int line,
 		const char *function, const char *format, ...)
 __attribute__ ((format (PRINTF_ATTRIBUTE_FORMAT, 5, 6)));
-void log_vprintf_lf(enum log_levels level, const char *file, unsigned line,
+void log_vprintf_lf(enum log_levels level, const char *file, unsigned int line,
 		const char *function, const char *format, va_list args);
-void log_printf_lf(enum log_levels level, const char *file, unsigned line,
+void log_printf_lf(enum log_levels level, const char *file, unsigned int line,
 		const char *function, const char *format, ...)
 __attribute__ ((format (PRINTF_ATTRIBUTE_FORMAT, 5, 6)));
 
@@ -73,7 +73,7 @@ void busy_sleep(uint64_t ms);
 
 void log_socket_error(const char *socket_desc);
 
-typedef void (*log_callback_fn)(void *priv, const char *file, unsigned line,
+typedef void (*log_callback_fn)(void *priv, const char *file, unsigned int line,
 		const char *function, const char *string);
 
 struct log_callback {
@@ -89,7 +89,7 @@ char *alloc_vprintf(const char *fmt, va_list ap);
 char *alloc_printf(const char *fmt, ...)
 	__attribute__ ((format (PRINTF_ATTRIBUTE_FORMAT, 1, 2)));
 
-char *find_nonprint_char(char *buf, unsigned buf_len);
+char *find_nonprint_char(char *buf, unsigned int buf_len);
 
 extern int debug_level;
 
diff --git a/src/helper/replacements.h b/src/helper/replacements.h
index 6e30b628b..ecc0e5e95 100644
--- a/src/helper/replacements.h
+++ b/src/helper/replacements.h
@@ -111,7 +111,7 @@ size_t strnlen(const char *s, size_t maxlen);
 
 #ifndef HAVE_USLEEP
 #ifdef _WIN32
-static inline unsigned usleep(unsigned int usecs)
+static inline unsigned int usleep(unsigned int usecs)
 {
 	Sleep((usecs/1000));
 	return 0;
diff --git a/src/openocd.c b/src/openocd.c
index 54c5eb34f..7a5147050 100644
--- a/src/openocd.c
+++ b/src/openocd.c
@@ -258,7 +258,7 @@ static struct command_context *setup_command_handler(Jim_Interp *interp)
 		&arm_tpiu_swo_register_commands,
 		NULL
 	};
-	for (unsigned i = 0; command_registrants[i]; i++) {
+	for (unsigned int i = 0; command_registrants[i]; i++) {
 		int retval = (*command_registrants[i])(cmd_ctx);
 		if (retval != ERROR_OK) {
 			command_done(cmd_ctx);
diff --git a/src/rtos/hwthread.c b/src/rtos/hwthread.c
index 4fe841902..65b89eb22 100644
--- a/src/rtos/hwthread.c
+++ b/src/rtos/hwthread.c
@@ -320,7 +320,7 @@ static int hwthread_get_thread_reg(struct rtos *rtos, int64_t thread_id,
 
 	rtos_reg->number = reg->number;
 	rtos_reg->size = reg->size;
-	unsigned bytes = (reg->size + 7) / 8;
+	unsigned int bytes = (reg->size + 7) / 8;
 	assert(bytes <= sizeof(rtos_reg->value));
 	memcpy(rtos_reg->value, reg->value, bytes);
 
diff --git a/src/svf/svf.c b/src/svf/svf.c
index 470889948..9dd2463c0 100644
--- a/src/svf/svf.c
+++ b/src/svf/svf.c
@@ -245,7 +245,7 @@ static int svf_last_printed_percentage = -1;
 #define SVF_BUF_LOG(_lvl, _buf, _nbits, _desc)							\
 	svf_hexbuf_print(LOG_LVL_##_lvl,  __FILE__, __LINE__, __func__, _buf, _nbits, _desc)
 
-static void svf_hexbuf_print(int dbg_lvl, const char *file, unsigned line,
+static void svf_hexbuf_print(int dbg_lvl, const char *file, unsigned int line,
 							 const char *function, const uint8_t *buf,
 							 int bit_len, const char *desc)
 {
@@ -316,7 +316,7 @@ static void svf_free_xxd_para(struct svf_xxr_para *para)
 int svf_add_statemove(tap_state_t state_to)
 {
 	tap_state_t state_from = cmd_queue_cur_state;
-	unsigned index_var;
+	unsigned int index_var;
 
 	/* when resetting, be paranoid and ignore current state */
 	if (state_to == TAP_RESET) {
diff --git a/src/transport/transport.c b/src/transport/transport.c
index bf306e731..c7293e7fd 100644
--- a/src/transport/transport.c
+++ b/src/transport/transport.c
@@ -176,8 +176,8 @@ struct transport *get_current_transport(void)
 COMMAND_HELPER(transport_list_parse, char ***vector)
 {
 	char **argv;
-	unsigned n = CMD_ARGC;
-	unsigned j = 0;
+	unsigned int n = CMD_ARGC;
+	unsigned int j = 0;
 
 	*vector = NULL;
 
@@ -189,7 +189,7 @@ COMMAND_HELPER(transport_list_parse, char ***vector)
 	if (!argv)
 		return ERROR_FAIL;
 
-	for (unsigned i = 0; i < n; i++) {
+	for (unsigned int i = 0; i < n; i++) {
 		struct transport *t;
 
 		for (t = transport_list; t; t = t->next) {
@@ -208,7 +208,7 @@ COMMAND_HELPER(transport_list_parse, char ***vector)
 	return ERROR_OK;
 
 fail:
-	for (unsigned i = 0; i < n; i++)
+	for (unsigned int i = 0; i < n; i++)
 		free(argv[i]);
 	free(argv);
 	return ERROR_FAIL;
diff --git a/src/xsvf/xsvf.c b/src/xsvf/xsvf.c
index 0266c2120..74a4dcfde 100644
--- a/src/xsvf/xsvf.c
+++ b/src/xsvf/xsvf.c
@@ -217,7 +217,7 @@ COMMAND_HANDLER(handle_xsvf_command)
 
 	bool collecting_path = false;
 	tap_state_t path[XSTATE_MAX_PATH];
-	unsigned pathlen = 0;
+	unsigned int pathlen = 0;
 
 	/* a flag telling whether to clock TCK during waits,
 	 * or simply sleep, controlled by virt2

-----------------------------------------------------------------------

Summary of changes:
 src/helper/binarybuffer.c | 48 +++++++++++++++++++++++------------------------
 src/helper/binarybuffer.h | 48 +++++++++++++++++++++++------------------------
 src/helper/command.c      | 16 ++++++++--------
 src/helper/command.h      |  4 ++--
 src/helper/log.c          | 10 +++++-----
 src/helper/log.h          | 10 +++++-----
 src/helper/replacements.h |  2 +-
 src/openocd.c             |  2 +-
 src/rtos/hwthread.c       |  2 +-
 src/svf/svf.c             |  4 ++--
 src/transport/transport.c |  8 ++++----
 src/xsvf/xsvf.c           |  2 +-
 12 files changed, 78 insertions(+), 78 deletions(-)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-742-ga64dc23bf

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the project "Main OpenOCD repository".

The branch, master has been updated
       via  a64dc23bf19fb4a7626fbda3c02693523ab5a75b (commit)
      from  e72733d59025b5d595bf955b227e95e5db7305c7 (commit)

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not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit a64dc23bf19fb4a7626fbda3c02693523ab5a75b
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Sep 8 21:21:35 2024 +0200

    jtag: convert 'unsigned' to 'unsigned int'
    
    Conversion done with
            checkpatch --fix-inplace -types UNSPECIFIED_INT
    
    Ignore the cast as they could be better addressed.
    Fix only minor additional checkpatch issue (spacing and line
    length).
    
    Change-Id: I2c1ef03bbc828112cc5bea89463cff9fc0c1e94f
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8481
    Reviewed-by: zapb <de...@za...>
    Tested-by: jenkins

diff --git a/src/jtag/adapter.c b/src/jtag/adapter.c
index bbf1cb3d2..996a23f1f 100644
--- a/src/jtag/adapter.c
+++ b/src/jtag/adapter.c
@@ -401,7 +401,7 @@ COMMAND_HANDLER(adapter_transports_command)
 	retval = allow_transports(CMD_CTX, (const char **)transports);
 
 	if (retval != ERROR_OK) {
-		for (unsigned i = 0; transports[i]; i++)
+		for (unsigned int i = 0; transports[i]; i++)
 			free(transports[i]);
 		free(transports);
 	}
@@ -414,7 +414,7 @@ COMMAND_HANDLER(handle_adapter_list_command)
 		return ERROR_COMMAND_SYNTAX_ERROR;
 
 	command_print(CMD, "The following debug adapters are available:");
-	for (unsigned i = 0; adapter_drivers[i]; i++) {
+	for (unsigned int i = 0; adapter_drivers[i]; i++) {
 		const char *name = adapter_drivers[i]->name;
 		command_print(CMD, "%u: %s", i + 1, name);
 	}
@@ -436,7 +436,7 @@ COMMAND_HANDLER(handle_adapter_driver_command)
 	if (CMD_ARGC != 1 || CMD_ARGV[0][0] == '\0')
 		return ERROR_COMMAND_SYNTAX_ERROR;
 
-	for (unsigned i = 0; adapter_drivers[i]; i++) {
+	for (unsigned int i = 0; adapter_drivers[i]; i++) {
 		if (strcmp(CMD_ARGV[0], adapter_drivers[i]->name) != 0)
 			continue;
 
@@ -684,7 +684,7 @@ COMMAND_HANDLER(handle_adapter_srst_delay_command)
 	if (CMD_ARGC > 1)
 		return ERROR_COMMAND_SYNTAX_ERROR;
 	if (CMD_ARGC == 1) {
-		unsigned delay;
+		unsigned int delay;
 		COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], delay);
 
 		jtag_set_nsrst_delay(delay);
@@ -698,7 +698,7 @@ COMMAND_HANDLER(handle_adapter_srst_pulse_width_command)
 	if (CMD_ARGC > 1)
 		return ERROR_COMMAND_SYNTAX_ERROR;
 	if (CMD_ARGC == 1) {
-		unsigned width;
+		unsigned int width;
 		COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], width);
 
 		jtag_set_nsrst_assert_width(width);
@@ -714,7 +714,7 @@ COMMAND_HANDLER(handle_adapter_speed_command)
 
 	int retval = ERROR_OK;
 	if (CMD_ARGC == 1) {
-		unsigned khz = 0;
+		unsigned int khz = 0;
 		COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], khz);
 
 		retval = adapter_config_khz(khz);
diff --git a/src/jtag/core.c b/src/jtag/core.c
index 6515d7160..907883f09 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -224,7 +224,7 @@ static void jtag_tap_add(struct jtag_tap *t)
 }
 
 /* returns a pointer to the n-th device in the scan chain */
-struct jtag_tap *jtag_tap_by_position(unsigned n)
+struct jtag_tap *jtag_tap_by_position(unsigned int n)
 {
 	struct jtag_tap *t = jtag_all_taps();
 
@@ -246,7 +246,7 @@ struct jtag_tap *jtag_tap_by_string(const char *s)
 	}
 
 	/* no tap found by name, so try to parse the name as a number */
-	unsigned n;
+	unsigned int n;
 	if (parse_uint(s, &n) != ERROR_OK)
 		return NULL;
 
diff --git a/src/jtag/drivers/bitbang.c b/src/jtag/drivers/bitbang.c
index e41659263..17e01a233 100644
--- a/src/jtag/drivers/bitbang.c
+++ b/src/jtag/drivers/bitbang.c
@@ -92,13 +92,13 @@ static int bitbang_state_move(int skip)
  */
 static int bitbang_execute_tms(struct jtag_command *cmd)
 {
-	unsigned num_bits = cmd->cmd.tms->num_bits;
+	unsigned int num_bits = cmd->cmd.tms->num_bits;
 	const uint8_t *bits = cmd->cmd.tms->bits;
 
 	LOG_DEBUG_IO("TMS: %u bits", num_bits);
 
 	int tms = 0;
-	for (unsigned i = 0; i < num_bits; i++) {
+	for (unsigned int i = 0; i < num_bits; i++) {
 		tms = ((bits[i/8] >> (i % 8)) & 1);
 		if (bitbang_interface->write(0, tms, 0) != ERROR_OK)
 			return ERROR_FAIL;
@@ -193,10 +193,10 @@ static int bitbang_stableclocks(unsigned int num_cycles)
 }
 
 static int bitbang_scan(bool ir_scan, enum scan_type type, uint8_t *buffer,
-		unsigned scan_size)
+		unsigned int scan_size)
 {
 	tap_state_t saved_end_state = tap_get_end_state();
-	unsigned bit_cnt;
+	unsigned int bit_cnt;
 
 	if (!((!ir_scan &&
 			(tap_get_state() == TAP_DRSHIFT)) ||
@@ -254,7 +254,7 @@ static int bitbang_scan(bool ir_scan, enum scan_type type, uint8_t *buffer,
 		if (type != SCAN_OUT && bitbang_interface->buf_size &&
 				(buffered == bitbang_interface->buf_size ||
 				 bit_cnt == scan_size - 1)) {
-			for (unsigned i = bit_cnt + 1 - buffered; i <= bit_cnt; i++) {
+			for (unsigned int i = bit_cnt + 1 - buffered; i <= bit_cnt; i++) {
 				switch (bitbang_interface->read_sample()) {
 					case BB_LOW:
 						buffer[i/8] &= ~(1 << (i % 8));
diff --git a/src/jtag/drivers/cmsis_dap.c b/src/jtag/drivers/cmsis_dap.c
index 4ba6b51be..2f776cb38 100644
--- a/src/jtag/drivers/cmsis_dap.c
+++ b/src/jtag/drivers/cmsis_dap.c
@@ -2153,7 +2153,7 @@ COMMAND_HANDLER(cmsis_dap_handle_cmd_command)
 {
 	uint8_t *command = cmsis_dap_handle->command;
 
-	for (unsigned i = 0; i < CMD_ARGC; i++)
+	for (unsigned int i = 0; i < CMD_ARGC; i++)
 		COMMAND_PARSE_NUMBER(u8, CMD_ARGV[i], command[i]);
 
 	int retval = cmsis_dap_xfer(cmsis_dap_handle, CMD_ARGC);
@@ -2185,7 +2185,7 @@ COMMAND_HANDLER(cmsis_dap_handle_vid_pid_command)
 		CMD_ARGC -= 1;
 	}
 
-	unsigned i;
+	unsigned int i;
 	for (i = 0; i < CMD_ARGC; i += 2) {
 		COMMAND_PARSE_NUMBER(u16, CMD_ARGV[i], cmsis_dap_vid[i >> 1]);
 		COMMAND_PARSE_NUMBER(u16, CMD_ARGV[i + 1], cmsis_dap_pid[i >> 1]);
diff --git a/src/jtag/drivers/driver.c b/src/jtag/drivers/driver.c
index 2aad4a0c1..d52a345a0 100644
--- a/src/jtag/drivers/driver.c
+++ b/src/jtag/drivers/driver.c
@@ -234,7 +234,7 @@ int interface_jtag_add_tlr(void)
 	return ERROR_OK;
 }
 
-int interface_add_tms_seq(unsigned num_bits, const uint8_t *seq, enum tap_state state)
+int interface_add_tms_seq(unsigned int num_bits, const uint8_t *seq, enum tap_state state)
 {
 	struct jtag_command *cmd;
 
diff --git a/src/jtag/drivers/ft232r.c b/src/jtag/drivers/ft232r.c
index a4d072cd7..6dc130493 100644
--- a/src/jtag/drivers/ft232r.c
+++ b/src/jtag/drivers/ft232r.c
@@ -177,7 +177,7 @@ static void ft232r_increase_buf_size(size_t new_buf_size)
  */
 static void ft232r_write(int tck, int tms, int tdi)
 {
-	unsigned out_value = (1<<ntrst_gpio) | (1<<nsysrst_gpio);
+	unsigned int out_value = (1 << ntrst_gpio) | (1 << nsysrst_gpio);
 	if (tck)
 		out_value |= (1<<tck_gpio);
 	if (tms)
@@ -201,7 +201,7 @@ static void ft232r_write(int tck, int tms, int tdi)
  */
 static void ft232r_reset(int trst, int srst)
 {
-	unsigned out_value = (1<<ntrst_gpio) | (1<<nsysrst_gpio);
+	unsigned int out_value = (1 << ntrst_gpio) | (1 << nsysrst_gpio);
 	LOG_DEBUG("ft232r_reset(%d,%d)", trst, srst);
 
 	if (trst == 1)
@@ -281,7 +281,7 @@ static int ft232r_init(void)
 	}
 
 	/* Exactly 500 nsec between updates. */
-	unsigned divisor = 1;
+	unsigned int divisor = 1;
 	unsigned char latency_timer = 1;
 
 	/* Frequency divisor is 14-bit non-zero value. */
@@ -654,13 +654,13 @@ static void syncbb_state_move(int skip)
  */
 static int syncbb_execute_tms(struct jtag_command *cmd)
 {
-	unsigned num_bits = cmd->cmd.tms->num_bits;
+	unsigned int num_bits = cmd->cmd.tms->num_bits;
 	const uint8_t *bits = cmd->cmd.tms->bits;
 
 	LOG_DEBUG_IO("TMS: %u bits", num_bits);
 
 	int tms = 0;
-	for (unsigned i = 0; i < num_bits; i++) {
+	for (unsigned int i = 0; i < num_bits; i++) {
 		tms = ((bits[i/8] >> (i % 8)) & 1);
 		ft232r_write(0, tms, 0);
 		ft232r_write(1, tms, 0);
diff --git a/src/jtag/drivers/ftdi.c b/src/jtag/drivers/ftdi.c
index 82117f12c..42ecda117 100644
--- a/src/jtag/drivers/ftdi.c
+++ b/src/jtag/drivers/ftdi.c
@@ -324,7 +324,7 @@ static void ftdi_execute_runtest(struct jtag_command *cmd)
 	unsigned int i = cmd->cmd.runtest->num_cycles;
 	while (i > 0) {
 		/* there are no state transitions in this code, so omit state tracking */
-		unsigned this_len = i > 7 ? 7 : i;
+		unsigned int this_len = i > 7 ? 7 : i;
 		mpsse_clock_tms_cs_out(mpsse_ctx, &zero, 0, this_len, false, ftdi_jtag_mode);
 		i -= this_len;
 	}
@@ -378,7 +378,7 @@ static void ftdi_execute_pathmove(struct jtag_command *cmd)
 		tap_state_name(path[num_states-1]));
 
 	int state_count = 0;
-	unsigned bit_count = 0;
+	unsigned int bit_count = 0;
 	uint8_t tms_byte = 0;
 
 	LOG_DEBUG_IO("-");
@@ -447,7 +447,7 @@ static void ftdi_execute_scan(struct jtag_command *cmd)
 	ftdi_end_state(cmd->cmd.scan->end_state);
 
 	struct scan_field *field = cmd->cmd.scan->fields;
-	unsigned scan_size = 0;
+	unsigned int scan_size = 0;
 
 	for (unsigned int i = 0; i < cmd->cmd.scan->num_fields; i++, field++) {
 		scan_size += field->num_bits;
@@ -584,7 +584,7 @@ static void ftdi_execute_stableclocks(struct jtag_command *cmd)
 	 * the correct level and remain there during the scan */
 	while (num_cycles > 0) {
 		/* there are no state transitions in this code, so omit state tracking */
-		unsigned this_len = num_cycles > 7 ? 7 : num_cycles;
+		unsigned int this_len = num_cycles > 7 ? 7 : num_cycles;
 		mpsse_clock_tms_cs_out(mpsse_ctx, &tms, 0, this_len, false, ftdi_jtag_mode);
 		num_cycles -= this_len;
 	}
@@ -750,7 +750,7 @@ COMMAND_HANDLER(ftdi_handle_layout_signal_command)
 	uint16_t input_mask = 0;
 	bool invert_oe = false;
 	uint16_t oe_mask = 0;
-	for (unsigned i = 1; i < CMD_ARGC; i += 2) {
+	for (unsigned int i = 1; i < CMD_ARGC; i += 2) {
 		if (strcmp("-data", CMD_ARGV[i]) == 0) {
 			invert_data = false;
 			COMMAND_PARSE_NUMBER(u16, CMD_ARGV[i + 1], data_mask);
@@ -879,7 +879,7 @@ COMMAND_HANDLER(ftdi_handle_vid_pid_command)
 		CMD_ARGC -= 1;
 	}
 
-	unsigned i;
+	unsigned int i;
 	for (i = 0; i < CMD_ARGC; i += 2) {
 		COMMAND_PARSE_NUMBER(u16, CMD_ARGV[i], ftdi_vid[i >> 1]);
 		COMMAND_PARSE_NUMBER(u16, CMD_ARGV[i + 1], ftdi_pid[i >> 1]);
diff --git a/src/jtag/drivers/jlink.c b/src/jtag/drivers/jlink.c
index 1b2fb4e30..74660744a 100644
--- a/src/jtag/drivers/jlink.c
+++ b/src/jtag/drivers/jlink.c
@@ -104,10 +104,10 @@ static int jlink_flush(void);
  * @param in_offset A bit offset for TDO data.
  * @param length Amount of bits to transfer out and in.
  */
-static void jlink_clock_data(const uint8_t *out, unsigned out_offset,
-			     const uint8_t *tms_out, unsigned tms_offset,
-			     uint8_t *in, unsigned in_offset,
-			     unsigned length);
+static void jlink_clock_data(const uint8_t *out, unsigned int out_offset,
+			     const uint8_t *tms_out, unsigned int tms_offset,
+			     uint8_t *in, unsigned int in_offset,
+			     unsigned int length);
 
 static enum tap_state jlink_last_state = TAP_RESET;
 static int queued_retval;
@@ -179,7 +179,7 @@ static void jlink_execute_scan(struct jtag_command *cmd)
 	jlink_end_state(cmd->cmd.scan->end_state);
 
 	struct scan_field *field = cmd->cmd.scan->fields;
-	unsigned scan_size = 0;
+	unsigned int scan_size = 0;
 
 	for (unsigned int i = 0; i < cmd->cmd.scan->num_fields; i++, field++) {
 		scan_size += field->num_bits;
@@ -1962,7 +1962,7 @@ static void jlink_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay_c
 /***************************************************************************/
 /* J-Link tap functions */
 
-static unsigned tap_length;
+static unsigned int tap_length;
 /* In SWD mode use tms buffer for direction control */
 static uint8_t tms_buffer[JLINK_TAP_BUFFER_SIZE];
 static uint8_t tdi_buffer[JLINK_TAP_BUFFER_SIZE];
@@ -1970,13 +1970,13 @@ static uint8_t tdo_buffer[JLINK_TAP_BUFFER_SIZE];
 
 struct pending_scan_result {
 	/** First bit position in tdo_buffer to read. */
-	unsigned first;
+	unsigned int first;
 	/** Number of bits to read. */
-	unsigned length;
+	unsigned int length;
 	/** Location to store the result */
 	void *buffer;
 	/** Offset in the destination buffer */
-	unsigned buffer_offset;
+	unsigned int buffer_offset;
 	/** SWD command */
 	uint8_t swd_cmd;
 };
@@ -1994,13 +1994,13 @@ static void jlink_tap_init(void)
 	memset(tdi_buffer, 0, sizeof(tdi_buffer));
 }
 
-static void jlink_clock_data(const uint8_t *out, unsigned out_offset,
-			     const uint8_t *tms_out, unsigned tms_offset,
-			     uint8_t *in, unsigned in_offset,
-			     unsigned length)
+static void jlink_clock_data(const uint8_t *out, unsigned int out_offset,
+			     const uint8_t *tms_out, unsigned int tms_offset,
+			     uint8_t *in, unsigned int in_offset,
+			     unsigned int length)
 {
 	do {
-		unsigned available_length = JLINK_TAP_BUFFER_SIZE - tap_length / 8;
+		unsigned int available_length = JLINK_TAP_BUFFER_SIZE - tap_length / 8;
 
 		if (!available_length ||
 		    (in && pending_scan_results_length == MAX_PENDING_SCAN_RESULTS)) {
@@ -2012,7 +2012,7 @@ static void jlink_clock_data(const uint8_t *out, unsigned out_offset,
 		struct pending_scan_result *pending_scan_result =
 			&pending_scan_results_buffer[pending_scan_results_length];
 
-		unsigned scan_length = length > available_length ?
+		unsigned int scan_length = length > available_length ?
 			available_length : length;
 
 		if (out)
diff --git a/src/jtag/drivers/jtag_vpi.c b/src/jtag/drivers/jtag_vpi.c
index 15b2679bb..079bb1d0a 100644
--- a/src/jtag/drivers/jtag_vpi.c
+++ b/src/jtag/drivers/jtag_vpi.c
@@ -158,7 +158,7 @@ retry_write:
 
 static int jtag_vpi_receive_cmd(struct vpi_cmd *vpi)
 {
-	unsigned bytes_buffered = 0;
+	unsigned int bytes_buffered = 0;
 	while (bytes_buffered < sizeof(struct vpi_cmd)) {
 		int bytes_to_receive = sizeof(struct vpi_cmd) - bytes_buffered;
 		int retval = read_socket(sockfd, ((char *)vpi) + bytes_buffered, bytes_to_receive);
diff --git a/src/jtag/drivers/libusb_helper.c b/src/jtag/drivers/libusb_helper.c
index 57ea8cd3f..ee90e78b3 100644
--- a/src/jtag/drivers/libusb_helper.c
+++ b/src/jtag/drivers/libusb_helper.c
@@ -53,7 +53,7 @@ static int jtag_libusb_error(int err)
 bool jtag_libusb_match_ids(struct libusb_device_descriptor *dev_desc,
 		const uint16_t vids[], const uint16_t pids[])
 {
-	for (unsigned i = 0; vids[i]; i++) {
+	for (unsigned int i = 0; vids[i]; i++) {
 		if (dev_desc->idVendor == vids[i] &&
 			dev_desc->idProduct == pids[i]) {
 			return true;
diff --git a/src/jtag/drivers/minidriver_imp.h b/src/jtag/drivers/minidriver_imp.h
index 7afb46345..b29b3c9cc 100644
--- a/src/jtag/drivers/minidriver_imp.h
+++ b/src/jtag/drivers/minidriver_imp.h
@@ -13,7 +13,7 @@
 
 static inline void interface_jtag_add_scan_check_alloc(struct scan_field *field)
 {
-	unsigned num_bytes = DIV_ROUND_UP(field->num_bits, 8);
+	unsigned int num_bytes = DIV_ROUND_UP(field->num_bits, 8);
 	field->in_value = cmd_queue_alloc(num_bytes);
 }
 
diff --git a/src/jtag/drivers/mpsse.c b/src/jtag/drivers/mpsse.c
index 3decddb0e..1ef9550a0 100644
--- a/src/jtag/drivers/mpsse.c
+++ b/src/jtag/drivers/mpsse.c
@@ -64,13 +64,13 @@ struct mpsse_ctx {
 	uint8_t interface;
 	enum ftdi_chip_type type;
 	uint8_t *write_buffer;
-	unsigned write_size;
-	unsigned write_count;
+	unsigned int write_size;
+	unsigned int write_count;
 	uint8_t *read_buffer;
-	unsigned read_size;
-	unsigned read_count;
+	unsigned int read_size;
+	unsigned int read_count;
 	uint8_t *read_chunk;
-	unsigned read_chunk_size;
+	unsigned int read_chunk_size;
 	struct bit_copy_queue read_queue;
 	int retval;
 };
@@ -444,13 +444,13 @@ void mpsse_purge(struct mpsse_ctx *ctx)
 	}
 }
 
-static unsigned buffer_write_space(struct mpsse_ctx *ctx)
+static unsigned int buffer_write_space(struct mpsse_ctx *ctx)
 {
 	/* Reserve one byte for SEND_IMMEDIATE */
 	return ctx->write_size - ctx->write_count - 1;
 }
 
-static unsigned buffer_read_space(struct mpsse_ctx *ctx)
+static unsigned int buffer_read_space(struct mpsse_ctx *ctx)
 {
 	return ctx->read_size - ctx->read_count;
 }
@@ -462,8 +462,8 @@ static void buffer_write_byte(struct mpsse_ctx *ctx, uint8_t data)
 	ctx->write_buffer[ctx->write_count++] = data;
 }
 
-static unsigned buffer_write(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_offset,
-	unsigned bit_count)
+static unsigned int buffer_write(struct mpsse_ctx *ctx, const uint8_t *out, unsigned int out_offset,
+	unsigned int bit_count)
 {
 	LOG_DEBUG_IO("%d bits", bit_count);
 	assert(ctx->write_count + DIV_ROUND_UP(bit_count, 8) <= ctx->write_size);
@@ -472,8 +472,8 @@ static unsigned buffer_write(struct mpsse_ctx *ctx, const uint8_t *out, unsigned
 	return bit_count;
 }
 
-static unsigned buffer_add_read(struct mpsse_ctx *ctx, uint8_t *in, unsigned in_offset,
-	unsigned bit_count, unsigned offset)
+static unsigned int buffer_add_read(struct mpsse_ctx *ctx, uint8_t *in, unsigned int in_offset,
+	unsigned int bit_count, unsigned int offset)
 {
 	LOG_DEBUG_IO("%d bits, offset %d", bit_count, offset);
 	assert(ctx->read_count + DIV_ROUND_UP(bit_count, 8) <= ctx->read_size);
@@ -483,20 +483,20 @@ static unsigned buffer_add_read(struct mpsse_ctx *ctx, uint8_t *in, unsigned in_
 	return bit_count;
 }
 
-void mpsse_clock_data_out(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_offset,
-	unsigned length, uint8_t mode)
+void mpsse_clock_data_out(struct mpsse_ctx *ctx, const uint8_t *out, unsigned int out_offset,
+	unsigned int length, uint8_t mode)
 {
 	mpsse_clock_data(ctx, out, out_offset, NULL, 0, length, mode);
 }
 
-void mpsse_clock_data_in(struct mpsse_ctx *ctx, uint8_t *in, unsigned in_offset, unsigned length,
+void mpsse_clock_data_in(struct mpsse_ctx *ctx, uint8_t *in, unsigned int in_offset, unsigned int length,
 	uint8_t mode)
 {
 	mpsse_clock_data(ctx, NULL, 0, in, in_offset, length, mode);
 }
 
-void mpsse_clock_data(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_offset, uint8_t *in,
-	unsigned in_offset, unsigned length, uint8_t mode)
+void mpsse_clock_data(struct mpsse_ctx *ctx, const uint8_t *out, unsigned int out_offset, uint8_t *in,
+	unsigned int in_offset, unsigned int length, uint8_t mode)
 {
 	/* TODO: Fix MSB first modes */
 	LOG_DEBUG_IO("%s%s %d bits", in ? "in" : "", out ? "out" : "", length);
@@ -531,7 +531,7 @@ void mpsse_clock_data(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_of
 			length = 0;
 		} else {
 			/* Byte transfer */
-			unsigned this_bytes = length / 8;
+			unsigned int this_bytes = length / 8;
 			/* MPSSE command limit */
 			if (this_bytes > 65536)
 				this_bytes = 65536;
@@ -558,7 +558,7 @@ void mpsse_clock_data(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_of
 							this_bytes * 8,
 							0);
 				if (!out && !in)
-					for (unsigned n = 0; n < this_bytes; n++)
+					for (unsigned int n = 0; n < this_bytes; n++)
 						buffer_write_byte(ctx, 0x00);
 				length -= this_bytes * 8;
 			}
@@ -566,14 +566,14 @@ void mpsse_clock_data(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_of
 	}
 }
 
-void mpsse_clock_tms_cs_out(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_offset,
-	unsigned length, bool tdi, uint8_t mode)
+void mpsse_clock_tms_cs_out(struct mpsse_ctx *ctx, const uint8_t *out, unsigned int out_offset,
+	unsigned int length, bool tdi, uint8_t mode)
 {
 	mpsse_clock_tms_cs(ctx, out, out_offset, NULL, 0, length, tdi, mode);
 }
 
-void mpsse_clock_tms_cs(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_offset, uint8_t *in,
-	unsigned in_offset, unsigned length, bool tdi, uint8_t mode)
+void mpsse_clock_tms_cs(struct mpsse_ctx *ctx, const uint8_t *out, unsigned int out_offset, uint8_t *in,
+	unsigned int in_offset, unsigned int length, bool tdi, uint8_t mode)
 {
 	LOG_DEBUG_IO("%sout %d bits, tdi=%d", in ? "in" : "", length, tdi);
 	assert(out);
@@ -593,7 +593,7 @@ void mpsse_clock_tms_cs(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_
 			ctx->retval = mpsse_flush(ctx);
 
 		/* Byte transfer */
-		unsigned this_bits = length;
+		unsigned int this_bits = length;
 		/* MPSSE command limit */
 		/* NOTE: there's a report of an FT2232 bug in this area, where shifting
 		 * exactly 7 bits can make problems with TMS signaling for the last
@@ -783,7 +783,7 @@ int mpsse_set_frequency(struct mpsse_ctx *ctx, int frequency)
 struct transfer_result {
 	struct mpsse_ctx *ctx;
 	bool done;
-	unsigned transferred;
+	unsigned int transferred;
 };
 
 static LIBUSB_CALL void read_cb(struct libusb_transfer *transfer)
@@ -791,16 +791,16 @@ static LIBUSB_CALL void read_cb(struct libusb_transfer *transfer)
 	struct transfer_result *res = transfer->user_data;
 	struct mpsse_ctx *ctx = res->ctx;
 
-	unsigned packet_size = ctx->max_packet_size;
+	unsigned int packet_size = ctx->max_packet_size;
 
 	DEBUG_PRINT_BUF(transfer->buffer, transfer->actual_length);
 
 	/* Strip the two status bytes sent at the beginning of each USB packet
 	 * while copying the chunk buffer to the read buffer */
-	unsigned num_packets = DIV_ROUND_UP(transfer->actual_length, packet_size);
-	unsigned chunk_remains = transfer->actual_length;
-	for (unsigned i = 0; i < num_packets && chunk_remains > 2; i++) {
-		unsigned this_size = packet_size - 2;
+	unsigned int num_packets = DIV_ROUND_UP(transfer->actual_length, packet_size);
+	unsigned int chunk_remains = transfer->actual_length;
+	for (unsigned int i = 0; i < num_packets && chunk_remains > 2; i++) {
+		unsigned int this_size = packet_size - 2;
 		if (this_size > chunk_remains - 2)
 			this_size = chunk_remains - 2;
 		if (this_size > ctx->read_count - res->transferred)
diff --git a/src/jtag/drivers/mpsse.h b/src/jtag/drivers/mpsse.h
index 737560d95..4a625d890 100644
--- a/src/jtag/drivers/mpsse.h
+++ b/src/jtag/drivers/mpsse.h
@@ -44,16 +44,16 @@ bool mpsse_is_high_speed(struct mpsse_ctx *ctx);
 /* Command queuing. These correspond to the MPSSE commands with the same names, but no need to care
  * about bit/byte transfer or data length limitation. Read data is guaranteed to be available only
  * after the following mpsse_flush(). */
-void mpsse_clock_data_out(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_offset,
-			 unsigned length, uint8_t mode);
-void mpsse_clock_data_in(struct mpsse_ctx *ctx, uint8_t *in, unsigned in_offset, unsigned length,
+void mpsse_clock_data_out(struct mpsse_ctx *ctx, const uint8_t *out, unsigned int out_offset,
+			 unsigned int length, uint8_t mode);
+void mpsse_clock_data_in(struct mpsse_ctx *ctx, uint8_t *in, unsigned int in_offset, unsigned int length,
 			uint8_t mode);
-void mpsse_clock_data(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_offset, uint8_t *in,
-		     unsigned in_offset, unsigned length, uint8_t mode);
-void mpsse_clock_tms_cs_out(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_offset,
-			   unsigned length, bool tdi, uint8_t mode);
-void mpsse_clock_tms_cs(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_offset, uint8_t *in,
-		       unsigned in_offset, unsigned length, bool tdi, uint8_t mode);
+void mpsse_clock_data(struct mpsse_ctx *ctx, const uint8_t *out, unsigned int out_offset, uint8_t *in,
+		     unsigned int in_offset, unsigned int length, uint8_t mode);
+void mpsse_clock_tms_cs_out(struct mpsse_ctx *ctx, const uint8_t *out, unsigned int out_offset,
+			   unsigned int length, bool tdi, uint8_t mode);
+void mpsse_clock_tms_cs(struct mpsse_ctx *ctx, const uint8_t *out, unsigned int out_offset, uint8_t *in,
+		       unsigned int in_offset, unsigned int length, bool tdi, uint8_t mode);
 void mpsse_set_data_bits_low_byte(struct mpsse_ctx *ctx, uint8_t data, uint8_t dir);
 void mpsse_set_data_bits_high_byte(struct mpsse_ctx *ctx, uint8_t data, uint8_t dir);
 void mpsse_read_data_bits_low_byte(struct mpsse_ctx *ctx, uint8_t *data);
diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c
index 8cf3b0c73..812a192c2 100644
--- a/src/jtag/drivers/stlink_usb.c
+++ b/src/jtag/drivers/stlink_usb.c
@@ -3740,7 +3740,7 @@ static int stlink_open(struct hl_interface_param *param, enum stlink_mode mode,
 
 	h->st_mode = mode;
 
-	for (unsigned i = 0; param->vid[i]; i++) {
+	for (unsigned int i = 0; param->vid[i]; i++) {
 		LOG_DEBUG("transport: %d vid: 0x%04x pid: 0x%04x serial: %s",
 			  h->st_mode, param->vid[i], param->pid[i],
 			  adapter_get_required_serial() ? adapter_get_required_serial() : "");
diff --git a/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c b/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c
index de0d2d847..e790f3ae5 100644
--- a/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c
+++ b/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c
@@ -30,7 +30,7 @@
 #define SECTION_BUFFERSIZE		16384
 
 static int ublast2_libusb_read(struct ublast_lowlevel *low, uint8_t *buf,
-			      unsigned size, uint32_t *bytes_read)
+			      unsigned int size, uint32_t *bytes_read)
 {
 	int ret, tmp = 0;
 
diff --git a/src/jtag/drivers/usb_blaster/ublast_access.h b/src/jtag/drivers/usb_blaster/ublast_access.h
index 3e138bd23..e9c926813 100644
--- a/src/jtag/drivers/usb_blaster/ublast_access.h
+++ b/src/jtag/drivers/usb_blaster/ublast_access.h
@@ -30,7 +30,7 @@ struct ublast_lowlevel {
 
 	int (*write)(struct ublast_lowlevel *low, uint8_t *buf, int size,
 		     uint32_t *bytes_written);
-	int (*read)(struct ublast_lowlevel *low, uint8_t *buf, unsigned size,
+	int (*read)(struct ublast_lowlevel *low, uint8_t *buf, unsigned int size,
 		    uint32_t *bytes_read);
 	int (*open)(struct ublast_lowlevel *low);
 	int (*close)(struct ublast_lowlevel *low);
diff --git a/src/jtag/drivers/usb_blaster/ublast_access_ftdi.c b/src/jtag/drivers/usb_blaster/ublast_access_ftdi.c
index eb312ef4e..9647f2b82 100644
--- a/src/jtag/drivers/usb_blaster/ublast_access_ftdi.c
+++ b/src/jtag/drivers/usb_blaster/ublast_access_ftdi.c
@@ -28,7 +28,7 @@ static struct ftdi_context *ublast_getftdic(struct ublast_lowlevel *low)
 }
 
 static int ublast_ftdi_read(struct ublast_lowlevel *low, uint8_t *buf,
-			    unsigned size, uint32_t *bytes_read)
+			    unsigned int size, uint32_t *bytes_read)
 {
 	int retval;
 	int timeout = 100;
diff --git a/src/jtag/drivers/usb_blaster/usb_blaster.c b/src/jtag/drivers/usb_blaster/usb_blaster.c
index 53dd158f6..496466ca3 100644
--- a/src/jtag/drivers/usb_blaster/usb_blaster.c
+++ b/src/jtag/drivers/usb_blaster/usb_blaster.c
@@ -158,7 +158,7 @@ static char *hexdump(uint8_t *buf, unsigned int size)
 	return str;
 }
 
-static int ublast_buf_read(uint8_t *buf, unsigned size, uint32_t *bytes_read)
+static int ublast_buf_read(uint8_t *buf, unsigned int size, uint32_t *bytes_read)
 {
 	int ret = info.drv->read(info.drv, buf, size, bytes_read);
 	char *str = hexdump(buf, *bytes_read);
diff --git a/src/jtag/drivers/xlnx-pcie-xvc.c b/src/jtag/drivers/xlnx-pcie-xvc.c
index b5c7e2fd6..d90a022cd 100644
--- a/src/jtag/drivers/xlnx-pcie-xvc.c
+++ b/src/jtag/drivers/xlnx-pcie-xvc.c
@@ -43,7 +43,7 @@
 
 struct xlnx_pcie_xvc {
 	int fd;
-	unsigned offset;
+	unsigned int offset;
 	char *device;
 };
 
diff --git a/src/jtag/interface.c b/src/jtag/interface.c
index 1230bb1b3..87d704db9 100644
--- a/src/jtag/interface.c
+++ b/src/jtag/interface.c
@@ -343,7 +343,7 @@ static const struct name_mapping {
 
 const char *tap_state_name(tap_state_t state)
 {
-	unsigned i;
+	unsigned int i;
 
 	for (i = 0; i < ARRAY_SIZE(tap_name_mapping); i++) {
 		if (tap_name_mapping[i].symbol == state)
@@ -354,7 +354,7 @@ const char *tap_state_name(tap_state_t state)
 
 tap_state_t tap_state_by_name(const char *name)
 {
-	unsigned i;
+	unsigned int i;
 
 	for (i = 0; i < ARRAY_SIZE(tap_name_mapping); i++) {
 		/* be nice to the human */
@@ -376,11 +376,11 @@ tap_state_t jtag_debug_state_machine_(const void *tms_buf, const void *tdi_buf,
 {
 	const uint8_t *tms_buffer;
 	const uint8_t *tdi_buffer;
-	unsigned tap_bytes;
-	unsigned cur_byte;
-	unsigned cur_bit;
+	unsigned int tap_bytes;
+	unsigned int cur_byte;
+	unsigned int cur_bit;
 
-	unsigned tap_out_bits;
+	unsigned int tap_out_bits;
 	char tms_str[33];
 	char tdi_str[33];
 
@@ -400,7 +400,7 @@ tap_state_t jtag_debug_state_machine_(const void *tms_buf, const void *tdi_buf,
 	for (cur_byte = 0; cur_byte < tap_bytes; cur_byte++) {
 		for (cur_bit = 0; cur_bit < 8; cur_bit++) {
 			/* make sure we do not run off the end of the buffers */
-			unsigned tap_bit = cur_byte * 8 + cur_bit;
+			unsigned int tap_bit = cur_byte * 8 + cur_bit;
 			if (tap_bit == tap_bits)
 				break;
 
diff --git a/src/jtag/interface.h b/src/jtag/interface.h
index 28c1458cb..b448851dc 100644
--- a/src/jtag/interface.h
+++ b/src/jtag/interface.h
@@ -159,7 +159,7 @@ tap_state_t jtag_debug_state_machine_(const void *tms_buf, const void *tdi_buf,
  * @returns the final TAP state; pass as @a start_tap_state in following call.
  */
 static inline tap_state_t jtag_debug_state_machine(const void *tms_buf,
-		const void *tdi_buf, unsigned tap_len, tap_state_t start_tap_state)
+		const void *tdi_buf, unsigned int tap_len, tap_state_t start_tap_state)
 {
 	if (LOG_LEVEL_IS(LOG_LVL_DEBUG_IO))
 		return jtag_debug_state_machine_(tms_buf, tdi_buf, tap_len, start_tap_state);
@@ -183,7 +183,7 @@ struct jtag_interface {
 	/**
 	 * Bit vector listing capabilities exposed by this driver.
 	 */
-	unsigned supported;
+	unsigned int supported;
 #define DEBUG_CAP_TMS_SEQ	(1 << 0)
 
 	/**
diff --git a/src/jtag/minidriver.h b/src/jtag/minidriver.h
index 45b0bf619..1b1094dd5 100644
--- a/src/jtag/minidriver.h
+++ b/src/jtag/minidriver.h
@@ -54,7 +54,7 @@ int interface_jtag_add_tlr(void);
 int interface_jtag_add_pathmove(unsigned int num_states, const tap_state_t *path);
 int interface_jtag_add_runtest(unsigned int num_cycles, tap_state_t endstate);
 
-int interface_add_tms_seq(unsigned num_bits,
+int interface_add_tms_seq(unsigned int num_bits,
 		const uint8_t *bits, enum tap_state state);
 
 /**
diff --git a/src/jtag/swd.h b/src/jtag/swd.h
index 5f626c1bf..3fe1365b5 100644
--- a/src/jtag/swd.h
+++ b/src/jtag/swd.h
@@ -101,7 +101,7 @@ static const uint8_t swd_seq_line_reset[] = {
 	/* At least 2 idle (low) cycles */
 	0x00,
 };
-static const unsigned swd_seq_line_reset_len = 64;
+static const unsigned int swd_seq_line_reset_len = 64;
 
 /**
  * JTAG-to-SWD sequence.
@@ -122,7 +122,7 @@ static const uint8_t swd_seq_jtag_to_swd[] = {
 	/* At least 2 idle (low) cycles */
 	0x00,
 };
-static const unsigned swd_seq_jtag_to_swd_len = 136;
+static const unsigned int swd_seq_jtag_to_swd_len = 136;
 
 /**
  * SWD-to-JTAG sequence.
@@ -141,7 +141,7 @@ static const uint8_t swd_seq_swd_to_jtag[] = {
 	/* At least 5 TCK/SWCLK cycles with TMS/SWDIO high */
 	0xff,
 };
-static const unsigned swd_seq_swd_to_jtag_len = 80;
+static const unsigned int swd_seq_swd_to_jtag_len = 80;
 
 /**
  * SWD-to-dormant sequence.
@@ -156,7 +156,7 @@ static const uint8_t swd_seq_swd_to_dormant[] = {
 	 /* Switching sequence from SWD to dormant */
 	0xbc, 0xe3,
 };
-static const unsigned swd_seq_swd_to_dormant_len = 72;
+static const unsigned int swd_seq_swd_to_dormant_len = 72;
 
 /**
  * Dormant-to-SWD sequence.
@@ -187,7 +187,7 @@ static const uint8_t swd_seq_dormant_to_swd[] = {
 	/* At least 2 idle (low) cycles */
 	0x00,
 };
-static const unsigned swd_seq_dormant_to_swd_len = 224;
+static const unsigned int swd_seq_dormant_to_swd_len = 224;
 
 /**
  * JTAG-to-dormant sequence.
@@ -208,7 +208,7 @@ static const uint8_t swd_seq_jtag_to_dormant[] = {
 	0x77, /* ((0xbb >> 7) & GENMASK(0, 0)) | ((0xbb << 1) & GENMASK(7, 1)) */
 	0x67, /* ((0xbb >> 7) & GENMASK(0, 0)) | ((0x33 << 1) & GENMASK(7, 1)) */
 };
-static const unsigned swd_seq_jtag_to_dormant_len = 40;
+static const unsigned int swd_seq_jtag_to_dormant_len = 40;
 
 /**
  * Dormant-to-JTAG sequence.
@@ -241,7 +241,7 @@ static const uint8_t swd_seq_dormant_to_jtag[] = {
 	/* put the TAP in Run/Test Idle */
 	0x00,
 };
-static const unsigned swd_seq_dormant_to_jtag_len = 160;
+static const unsigned int swd_seq_dormant_to_jtag_len = 160;
 
 struct swd_driver {
 	/**
diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c
index e2b3b45a6..790aedfc4 100644
--- a/src/jtag/tcl.c
+++ b/src/jtag/tcl.c
@@ -843,7 +843,7 @@ COMMAND_HANDLER(handle_jtag_ntrst_delay_command)
 	if (CMD_ARGC > 1)
 		return ERROR_COMMAND_SYNTAX_ERROR;
 	if (CMD_ARGC == 1) {
-		unsigned delay;
+		unsigned int delay;
 		COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], delay);
 
 		jtag_set_ntrst_delay(delay);
@@ -857,7 +857,7 @@ COMMAND_HANDLER(handle_jtag_ntrst_assert_width_command)
 	if (CMD_ARGC > 1)
 		return ERROR_COMMAND_SYNTAX_ERROR;
 	if (CMD_ARGC == 1) {
-		unsigned delay;
+		unsigned int delay;
 		COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], delay);
 
 		jtag_set_ntrst_assert_width(delay);
@@ -873,7 +873,7 @@ COMMAND_HANDLER(handle_jtag_rclk_command)
 
 	int retval = ERROR_OK;
 	if (CMD_ARGC == 1) {
-		unsigned khz = 0;
+		unsigned int khz = 0;
 		COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], khz);
 
 		retval = adapter_config_rclk(khz);
@@ -899,7 +899,7 @@ COMMAND_HANDLER(handle_runtest_command)
 	if (CMD_ARGC != 1)
 		return ERROR_COMMAND_SYNTAX_ERROR;
 
-	unsigned num_clocks;
+	unsigned int num_clocks;
 	COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num_clocks);
 
 	jtag_add_runtest(num_clocks, TAP_IDLE);

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/adapter.c                                 | 12 ++---
 src/jtag/core.c                                    |  4 +-
 src/jtag/drivers/bitbang.c                         | 10 ++--
 src/jtag/drivers/cmsis_dap.c                       |  4 +-
 src/jtag/drivers/driver.c                          |  2 +-
 src/jtag/drivers/ft232r.c                          | 10 ++--
 src/jtag/drivers/ftdi.c                            | 12 ++---
 src/jtag/drivers/jlink.c                           | 30 +++++------
 src/jtag/drivers/jtag_vpi.c                        |  2 +-
 src/jtag/drivers/libusb_helper.c                   |  2 +-
 src/jtag/drivers/minidriver_imp.h                  |  2 +-
 src/jtag/drivers/mpsse.c                           | 58 +++++++++++-----------
 src/jtag/drivers/mpsse.h                           | 18 +++----
 src/jtag/drivers/stlink_usb.c                      |  2 +-
 .../drivers/usb_blaster/ublast2_access_libusb.c    |  2 +-
 src/jtag/drivers/usb_blaster/ublast_access.h       |  2 +-
 src/jtag/drivers/usb_blaster/ublast_access_ftdi.c  |  2 +-
 src/jtag/drivers/usb_blaster/usb_blaster.c         |  2 +-
 src/jtag/drivers/xlnx-pcie-xvc.c                   |  2 +-
 src/jtag/interface.c                               | 14 +++---
 src/jtag/interface.h                               |  4 +-
 src/jtag/minidriver.h                              |  2 +-
 src/jtag/swd.h                                     | 14 +++---
 src/jtag/tcl.c                                     |  8 +--
 24 files changed, 110 insertions(+), 110 deletions(-)


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       via  e72733d59025b5d595bf955b227e95e5db7305c7 (commit)
      from  2ad48b78d4a19921f57a8cb7a4994b534c047b95 (commit)

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- Log -----------------------------------------------------------------
commit e72733d59025b5d595bf955b227e95e5db7305c7
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Sep 8 21:20:48 2024 +0200

    target: convert 'unsigned' to 'unsigned int'
    
    Conversion done with
            checkpatch --fix-inplace -types UNSPECIFIED_INT
    
    Ignore the cast as they could be better addressed.
    Fix only minor additional checkpatch issue (spacing and line
    length).
    
    Use Checkpatch-ignore below for the function pointers in the file
    'armv7a_cache_l2x.h' that do not assign the identifier names to
    the function arguments.
    Most of these struct are unused and should be fixed or dropped.
    
    Checkpatch-ignore: FUNCTION_ARGUMENTS
    
    Change-Id: I8f27e68eb3502e431c1ba801b362358105f9f2dc
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8480
    Tested-by: jenkins
    Reviewed-by: zapb <de...@za...>

diff --git a/src/target/adi_v5_jtag.c b/src/target/adi_v5_jtag.c
index 8d54a50fb..fee1a2485 100644
--- a/src/target/adi_v5_jtag.c
+++ b/src/target/adi_v5_jtag.c
@@ -736,7 +736,7 @@ static int jtag_send_sequence(struct adiv5_dap *dap, enum swd_special_seq seq)
 	return retval;
 }
 
-static int jtag_dp_q_read(struct adiv5_dap *dap, unsigned reg,
+static int jtag_dp_q_read(struct adiv5_dap *dap, unsigned int reg,
 		uint32_t *data)
 {
 	int retval = jtag_limit_queue_size(dap);
@@ -749,7 +749,7 @@ static int jtag_dp_q_read(struct adiv5_dap *dap, unsigned reg,
 	return retval;
 }
 
-static int jtag_dp_q_write(struct adiv5_dap *dap, unsigned reg,
+static int jtag_dp_q_write(struct adiv5_dap *dap, unsigned int reg,
 		uint32_t data)
 {
 	int retval = jtag_limit_queue_size(dap);
@@ -763,7 +763,7 @@ static int jtag_dp_q_write(struct adiv5_dap *dap, unsigned reg,
 }
 
 /** Select the AP register bank */
-static int jtag_ap_q_bankselect(struct adiv5_ap *ap, unsigned reg)
+static int jtag_ap_q_bankselect(struct adiv5_ap *ap, unsigned int reg)
 {
 	int retval;
 	struct adiv5_dap *dap = ap->dap;
@@ -818,7 +818,7 @@ static int jtag_ap_q_bankselect(struct adiv5_ap *ap, unsigned reg)
 	return ERROR_OK;
 }
 
-static int jtag_ap_q_read(struct adiv5_ap *ap, unsigned reg,
+static int jtag_ap_q_read(struct adiv5_ap *ap, unsigned int reg,
 		uint32_t *data)
 {
 	int retval = jtag_limit_queue_size(ap->dap);
@@ -840,7 +840,7 @@ static int jtag_ap_q_read(struct adiv5_ap *ap, unsigned reg,
 	return retval;
 }
 
-static int jtag_ap_q_write(struct adiv5_ap *ap, unsigned reg,
+static int jtag_ap_q_write(struct adiv5_ap *ap, unsigned int reg,
 		uint32_t data)
 {
 	int retval = jtag_limit_queue_size(ap->dap);
diff --git a/src/target/adi_v5_swd.c b/src/target/adi_v5_swd.c
index 123100588..dda1b0674 100644
--- a/src/target/adi_v5_swd.c
+++ b/src/target/adi_v5_swd.c
@@ -485,7 +485,7 @@ static int swd_queue_ap_abort(struct adiv5_dap *dap, uint8_t *ack)
 	return check_sync(dap);
 }
 
-static int swd_queue_dp_read(struct adiv5_dap *dap, unsigned reg,
+static int swd_queue_dp_read(struct adiv5_dap *dap, unsigned int reg,
 		uint32_t *data)
 {
 	int retval = swd_check_reconnect(dap);
@@ -499,7 +499,7 @@ static int swd_queue_dp_read(struct adiv5_dap *dap, unsigned reg,
 	return swd_queue_dp_read_inner(dap, reg, data);
 }
 
-static int swd_queue_dp_write(struct adiv5_dap *dap, unsigned reg,
+static int swd_queue_dp_write(struct adiv5_dap *dap, unsigned int reg,
 		uint32_t data)
 {
 	const struct swd_driver *swd = adiv5_dap_swd_driver(dap);
@@ -517,7 +517,7 @@ static int swd_queue_dp_write(struct adiv5_dap *dap, unsigned reg,
 }
 
 /** Select the AP register bank */
-static int swd_queue_ap_bankselect(struct adiv5_ap *ap, unsigned reg)
+static int swd_queue_ap_bankselect(struct adiv5_ap *ap, unsigned int reg)
 {
 	int retval;
 	struct adiv5_dap *dap = ap->dap;
@@ -567,7 +567,7 @@ static int swd_queue_ap_bankselect(struct adiv5_ap *ap, unsigned reg)
 	return ERROR_OK;
 }
 
-static int swd_queue_ap_read(struct adiv5_ap *ap, unsigned reg,
+static int swd_queue_ap_read(struct adiv5_ap *ap, unsigned int reg,
 		uint32_t *data)
 {
 	struct adiv5_dap *dap = ap->dap;
@@ -592,7 +592,7 @@ static int swd_queue_ap_read(struct adiv5_ap *ap, unsigned reg,
 	return check_sync(dap);
 }
 
-static int swd_queue_ap_write(struct adiv5_ap *ap, unsigned reg,
+static int swd_queue_ap_write(struct adiv5_ap *ap, unsigned int reg,
 		uint32_t data)
 {
 	struct adiv5_dap *dap = ap->dap;
diff --git a/src/target/arc.c b/src/target/arc.c
index 72e4d918d..28ce93947 100644
--- a/src/target/arc.c
+++ b/src/target/arc.c
@@ -516,7 +516,7 @@ static int arc_get_gdb_reg_list(struct target *target, struct reg **reg_list[],
 		unsigned long i = 0;
 		struct reg_cache *reg_cache = target->reg_cache;
 		while (reg_cache) {
-			for (unsigned j = 0; j < reg_cache->num_regs; j++, i++)
+			for (unsigned int j = 0; j < reg_cache->num_regs; j++, i++)
 				(*reg_list)[i] =  &reg_cache->reg_list[j];
 			reg_cache = reg_cache->next;
 		}
@@ -527,7 +527,7 @@ static int arc_get_gdb_reg_list(struct target *target, struct reg **reg_list[],
 		unsigned long gdb_reg_number = 0;
 		struct reg_cache *reg_cache = target->reg_cache;
 		while (reg_cache) {
-			for (unsigned j = 0;
+			for (unsigned int j = 0;
 				 j < reg_cache->num_regs && gdb_reg_number <= arc->last_general_reg;
 				 j++) {
 				if (reg_cache->reg_list[j].exist) {
diff --git a/src/target/arm.h b/src/target/arm.h
index 0de322a5a..79ec99d11 100644
--- a/src/target/arm.h
+++ b/src/target/arm.h
@@ -143,8 +143,8 @@ enum {
 	ARM_VFP_V3_FPSCR,
 };
 
-const char *arm_mode_name(unsigned psr_mode);
-bool is_arm_mode(unsigned psr_mode);
+const char *arm_mode_name(unsigned int psr_mode);
+bool is_arm_mode(unsigned int psr_mode);
 
 /** The PSR "T" and "J" bits define the mode of "classic ARM" cores. */
 enum arm_state {
@@ -325,7 +325,7 @@ int arm_blank_check_memory(struct target *target,
 		struct target_memory_check_block *blocks, int num_blocks, uint8_t erased_value);
 
 void arm_set_cpsr(struct arm *arm, uint32_t cpsr);
-struct reg *arm_reg_current(struct arm *arm, unsigned regnum);
-struct reg *armv8_reg_current(struct arm *arm, unsigned regnum);
+struct reg *arm_reg_current(struct arm *arm, unsigned int regnum);
+struct reg *armv8_reg_current(struct arm *arm, unsigned int regnum);
 
 #endif /* OPENOCD_TARGET_ARM_H */
diff --git a/src/target/arm11.c b/src/target/arm11.c
index 43790c737..c583a2ebd 100644
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -478,7 +478,7 @@ static int arm11_resume(struct target *target, int current,
 	/* activate all breakpoints */
 	if (true) {
 		struct breakpoint *bp;
-		unsigned brp_num = 0;
+		unsigned int brp_num = 0;
 
 		for (bp = target->breakpoints; bp; bp = bp->next) {
 			struct arm11_sc7_action brp[2];
diff --git a/src/target/arm11.h b/src/target/arm11.h
index 1f56f7bba..40a3f9024 100644
--- a/src/target/arm11.h
+++ b/src/target/arm11.h
@@ -39,7 +39,7 @@ struct arm11_common {
 	/** Debug module state. */
 	struct arm_dpm dpm;
 	struct arm11_sc7_action *bpwp_actions;
-	unsigned bpwp_n;
+	unsigned int bpwp_n;
 
 	size_t brp;			/**< Number of Breakpoint Register Pairs from DIDR	*/
 	size_t free_brps;		/**< Number of breakpoints allocated */
diff --git a/src/target/arm11_dbgtap.c b/src/target/arm11_dbgtap.c
index b66f88618..36325911a 100644
--- a/src/target/arm11_dbgtap.c
+++ b/src/target/arm11_dbgtap.c
@@ -567,8 +567,8 @@ static int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap *tap,
 	chain5_fields[2].in_value               = NULL;
 
 	uint8_t *readies;
-	unsigned readies_num = count;
-	unsigned bytes = sizeof(*readies)*readies_num;
+	unsigned int readies_num = count;
+	unsigned int bytes = sizeof(*readies) * readies_num;
 
 	readies = malloc(bytes);
 	if (!readies) {
@@ -592,7 +592,7 @@ static int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap *tap,
 
 	int retval = jtag_execute_queue();
 	if (retval == ERROR_OK) {
-		unsigned error_count = 0;
+		unsigned int error_count = 0;
 
 		for (size_t i = 0; i < readies_num; i++) {
 			if (readies[i] != 1)
@@ -1042,7 +1042,7 @@ static int arm11_dpm_instr_read_data_r0(struct arm_dpm *dpm,
  * and watchpoint operations instead of running them right away.  Since we
  * pre-allocated our vector, we don't need to worry about space.
  */
-static int arm11_bpwp_enable(struct arm_dpm *dpm, unsigned index_t,
+static int arm11_bpwp_enable(struct arm_dpm *dpm, unsigned int index_t,
 	uint32_t addr, uint32_t control)
 {
 	struct arm11_common *arm11 = dpm_to_arm11(dpm);
@@ -1079,7 +1079,7 @@ static int arm11_bpwp_enable(struct arm_dpm *dpm, unsigned index_t,
 	return ERROR_OK;
 }
 
-static int arm11_bpwp_disable(struct arm_dpm *dpm, unsigned index_t)
+static int arm11_bpwp_disable(struct arm_dpm *dpm, unsigned int index_t)
 {
 	struct arm11_common *arm11 = dpm_to_arm11(dpm);
 	struct arm11_sc7_action *action;
diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c
index 3bacfaefd..7e31306b6 100644
--- a/src/target/arm9tdmi.c
+++ b/src/target/arm9tdmi.c
@@ -821,9 +821,9 @@ COMMAND_HANDLER(handle_arm9tdmi_catch_vectors_command)
 		else if (strcmp(CMD_ARGV[0], "none") == 0) {
 			/* do nothing */
 		} else {
-			for (unsigned i = 0; i < CMD_ARGC; i++) {
+			for (unsigned int i = 0; i < CMD_ARGC; i++) {
 				/* go through list of vectors */
-				unsigned j;
+				unsigned int j;
 				for (j = 0; arm9tdmi_vectors[j].name; j++) {
 					if (strcmp(CMD_ARGV[i], arm9tdmi_vectors[j].name) == 0) {
 						vector_catch_value |= arm9tdmi_vectors[j].value;
@@ -850,7 +850,7 @@ COMMAND_HANDLER(handle_arm9tdmi_catch_vectors_command)
 	}
 
 	/* output current settings */
-	for (unsigned i = 0; arm9tdmi_vectors[i].name; i++) {
+	for (unsigned int i = 0; arm9tdmi_vectors[i].name; i++) {
 		command_print(CMD, "%s: %s", arm9tdmi_vectors[i].name,
 			(vector_catch_value & arm9tdmi_vectors[i].value)
 				? "catch" : "don't catch");
diff --git a/src/target/arm_adi_v5.h b/src/target/arm_adi_v5.h
index 92c3dbc3a..ebd2752bd 100644
--- a/src/target/arm_adi_v5.h
+++ b/src/target/arm_adi_v5.h
@@ -454,17 +454,17 @@ struct dap_ops {
 	int (*send_sequence)(struct adiv5_dap *dap, enum swd_special_seq seq);
 
 	/** DP register read. */
-	int (*queue_dp_read)(struct adiv5_dap *dap, unsigned reg,
+	int (*queue_dp_read)(struct adiv5_dap *dap, unsigned int reg,
 			uint32_t *data);
 	/** DP register write. */
-	int (*queue_dp_write)(struct adiv5_dap *dap, unsigned reg,
+	int (*queue_dp_write)(struct adiv5_dap *dap, unsigned int reg,
 			uint32_t data);
 
 	/** AP register read. */
-	int (*queue_ap_read)(struct adiv5_ap *ap, unsigned reg,
+	int (*queue_ap_read)(struct adiv5_ap *ap, unsigned int reg,
 			uint32_t *data);
 	/** AP register write. */
-	int (*queue_ap_write)(struct adiv5_ap *ap, unsigned reg,
+	int (*queue_ap_write)(struct adiv5_ap *ap, unsigned int reg,
 			uint32_t data);
 
 	/** AP operation abort. */
@@ -553,7 +553,7 @@ static inline int dap_send_sequence(struct adiv5_dap *dap,
  * @return ERROR_OK for success, else a fault code.
  */
 static inline int dap_queue_dp_read(struct adiv5_dap *dap,
-		unsigned reg, uint32_t *data)
+		unsigned int reg, uint32_t *data)
 {
 	assert(dap->ops);
 	return dap->ops->queue_dp_read(dap, reg, data);
@@ -571,7 +571,7 @@ static inline int dap_queue_dp_read(struct adiv5_dap *dap,
  * @return ERROR_OK for success, else a fault code.
  */
 static inline int dap_queue_dp_write(struct adiv5_dap *dap,
-		unsigned reg, uint32_t data)
+		unsigned int reg, uint32_t data)
 {
 	assert(dap->ops);
 	return dap->ops->queue_dp_write(dap, reg, data);
@@ -588,7 +588,7 @@ static inline int dap_queue_dp_write(struct adiv5_dap *dap,
  * @return ERROR_OK for success, else a fault code.
  */
 static inline int dap_queue_ap_read(struct adiv5_ap *ap,
-		unsigned reg, uint32_t *data)
+		unsigned int reg, uint32_t *data)
 {
 	assert(ap->dap->ops);
 	if (ap->refcount == 0) {
@@ -608,7 +608,7 @@ static inline int dap_queue_ap_read(struct adiv5_ap *ap,
  * @return ERROR_OK for success, else a fault code.
  */
 static inline int dap_queue_ap_write(struct adiv5_ap *ap,
-		unsigned reg, uint32_t data)
+		unsigned int reg, uint32_t data)
 {
 	assert(ap->dap->ops);
 	if (ap->refcount == 0) {
@@ -659,7 +659,7 @@ static inline int dap_sync(struct adiv5_dap *dap)
 	return ERROR_OK;
 }
 
-static inline int dap_dp_read_atomic(struct adiv5_dap *dap, unsigned reg,
+static inline int dap_dp_read_atomic(struct adiv5_dap *dap, unsigned int reg,
 				     uint32_t *value)
 {
 	int retval;
@@ -671,7 +671,7 @@ static inline int dap_dp_read_atomic(struct adiv5_dap *dap, unsigned reg,
 	return dap_run(dap);
 }
 
-static inline int dap_dp_poll_register(struct adiv5_dap *dap, unsigned reg,
+static inline int dap_dp_poll_register(struct adiv5_dap *dap, unsigned int reg,
 				       uint32_t mask, uint32_t value, int timeout)
 {
 	assert(timeout > 0);
diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c
index 5c52ad899..8619f8f82 100644
--- a/src/target/arm_disassembler.c
+++ b/src/target/arm_disassembler.c
@@ -114,7 +114,7 @@ static int evaluate_pld(uint32_t opcode,
 	if ((opcode & 0x0d30f000) == 0x0510f000) {
 		uint8_t rn;
 		uint8_t u;
-		unsigned offset;
+		unsigned int offset;
 
 		instruction->type = ARM_PLD;
 		rn = (opcode & 0xf0000) >> 16;
@@ -701,9 +701,9 @@ static int evaluate_load_store(uint32_t opcode,
 
 static int evaluate_extend(uint32_t opcode, uint32_t address, char *cp)
 {
-	unsigned rm = (opcode >> 0) & 0xf;
-	unsigned rd = (opcode >> 12) & 0xf;
-	unsigned rn = (opcode >> 16) & 0xf;
+	unsigned int rm = (opcode >> 0) & 0xf;
+	unsigned int rd = (opcode >> 12) & 0xf;
+	unsigned int rn = (opcode >> 16) & 0xf;
 	char *type, *rot;
 
 	switch ((opcode >> 24) & 0x3) {
@@ -892,7 +892,7 @@ static int evaluate_media(uint32_t opcode, uint32_t address,
 
 	/* multiplies */
 	if ((opcode & 0x01f00080) == 0x01000000) {
-		unsigned rn = (opcode >> 12) & 0xf;
+		unsigned int rn = (opcode >> 12) & 0xf;
 
 		if (rn != 0xf)
 			sprintf(cp, "SML%cD%s%s\tr%d, r%d, r%d, r%d",
@@ -925,7 +925,7 @@ static int evaluate_media(uint32_t opcode, uint32_t address,
 		return ERROR_OK;
 	}
 	if ((opcode & 0x01f00000) == 0x01500000) {
-		unsigned rn = (opcode >> 12) & 0xf;
+		unsigned int rn = (opcode >> 12) & 0xf;
 
 		switch (opcode & 0xc0) {
 			case 3:
@@ -1001,8 +1001,8 @@ static int evaluate_media(uint32_t opcode, uint32_t address,
 			return ERROR_OK;
 	}
 	if (mnemonic) {
-		unsigned rm = (opcode >> 0) & 0xf;
-		unsigned rd = (opcode >> 12) & 0xf;
+		unsigned int rm = (opcode >> 0) & 0xf;
+		unsigned int rd = (opcode >> 12) & 0xf;
 
 		sprintf(cp, "%s%s\tr%d, r%d", mnemonic, COND(opcode), rm, rd);
 		return ERROR_OK;
@@ -2747,7 +2747,7 @@ static int evaluate_cond_branch_thumb(uint16_t opcode,
 static int evaluate_cb_thumb(uint16_t opcode, uint32_t address,
 			     struct arm_instruction *instruction)
 {
-	unsigned offset;
+	unsigned int offset;
 
 	/* added in Thumb2 */
 	offset = (opcode >> 3) & 0x1f;
@@ -2858,7 +2858,7 @@ static int evaluate_hint_thumb(uint16_t opcode, uint32_t address,
 static int evaluate_ifthen_thumb(uint16_t opcode, uint32_t address,
 				 struct arm_instruction *instruction)
 {
-	unsigned cond = (opcode >> 4) & 0x0f;
+	unsigned int cond = (opcode >> 4) & 0x0f;
 	char *x = "", *y = "", *z = "";
 
 	if (opcode & 0x01)
diff --git a/src/target/arm_disassembler.h b/src/target/arm_disassembler.h
index 1be567475..8317da997 100644
--- a/src/target/arm_disassembler.h
+++ b/src/target/arm_disassembler.h
@@ -171,7 +171,7 @@ struct arm_instruction {
 	uint32_t opcode;
 
 	/* return value ... Thumb-2 sizes vary */
-	unsigned instruction_size;
+	unsigned int instruction_size;
 
 	union {
 		struct arm_b_bl_bx_blx_instr b_bl_bx_blx;
diff --git a/src/target/arm_dpm.c b/src/target/arm_dpm.c
index 94e91ad6c..318d5afec 100644
--- a/src/target/arm_dpm.c
+++ b/src/target/arm_dpm.c
@@ -167,7 +167,7 @@ int arm_dpm_modeswitch(struct arm_dpm *dpm, enum arm_mode mode)
 }
 
 /* Read 64bit VFP registers */
-static int dpm_read_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
+static int dpm_read_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned int regnum)
 {
 	int retval = ERROR_FAIL;
 	uint32_t value_r0, value_r1;
@@ -205,7 +205,7 @@ static int dpm_read_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
 }
 
 /* just read the register -- rely on the core mode being right */
-int arm_dpm_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
+int arm_dpm_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned int regnum)
 {
 	uint32_t value;
 	int retval;
@@ -272,7 +272,7 @@ int arm_dpm_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
 }
 
 /* Write 64bit VFP registers */
-static int dpm_write_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
+static int dpm_write_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned int regnum)
 {
 	int retval = ERROR_FAIL;
 	uint32_t value_r0 = buf_get_u32(r->value, 0, 32);
@@ -308,7 +308,7 @@ static int dpm_write_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned regnum
 }
 
 /* just write the register -- rely on the core mode being right */
-static int dpm_write_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
+static int dpm_write_reg(struct arm_dpm *dpm, struct reg *r, unsigned int regnum)
 {
 	int retval;
 	uint32_t value = buf_get_u32(r->value, 0, 32);
@@ -386,7 +386,7 @@ int arm_dpm_read_current_registers(struct arm_dpm *dpm)
 		return retval;
 
 	/* read R0 and R1 first (it's used for scratch), then CPSR */
-	for (unsigned i = 0; i < 2; i++) {
+	for (unsigned int i = 0; i < 2; i++) {
 		r = arm->core_cache->reg_list + i;
 		if (!r->valid) {
 			retval = arm_dpm_read_reg(dpm, r, i);
@@ -404,7 +404,7 @@ int arm_dpm_read_current_registers(struct arm_dpm *dpm)
 	arm_set_cpsr(arm, cpsr);
 
 	/* REVISIT we can probably avoid reading R1..R14, saving time... */
-	for (unsigned i = 2; i < 16; i++) {
+	for (unsigned int i = 2; i < 16; i++) {
 		r = arm_reg_current(arm, i);
 		if (r->valid)
 			continue;
@@ -501,7 +501,7 @@ int arm_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp)
 	 * cope with the hand-crafted breakpoint code.
 	 */
 	if (arm->target->type->add_breakpoint == dpm_add_breakpoint) {
-		for (unsigned i = 0; i < dpm->nbp; i++) {
+		for (unsigned int i = 0; i < dpm->nbp; i++) {
 			struct dpm_bp *dbp = dpm->dbp + i;
 			struct breakpoint *bp = dbp->bp;
 
@@ -513,7 +513,7 @@ int arm_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp)
 	}
 
 	/* enable/disable watchpoints */
-	for (unsigned i = 0; i < dpm->nwp; i++) {
+	for (unsigned int i = 0; i < dpm->nwp; i++) {
 		struct dpm_wp *dwp = dpm->dwp + i;
 		struct watchpoint *wp = dwp->wp;
 
@@ -538,9 +538,9 @@ int arm_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp)
 		did_write = false;
 
 		/* check everything except our scratch registers R0 and R1 */
-		for (unsigned i = 2; i < cache->num_regs; i++) {
+		for (unsigned int i = 2; i < cache->num_regs; i++) {
 			struct arm_reg *r;
-			unsigned regnum;
+			unsigned int regnum;
 
 			/* also skip PC, CPSR, and non-dirty */
 			if (i == 15)
@@ -625,7 +625,7 @@ int arm_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp)
 	arm->pc->dirty = false;
 
 	/* flush R0 and R1 (our scratch registers) */
-	for (unsigned i = 0; i < 2; i++) {
+	for (unsigned int i = 0; i < 2; i++) {
 		retval = dpm_write_reg(dpm, &cache->reg_list[i], i);
 		if (retval != ERROR_OK)
 			goto done;
@@ -643,7 +643,7 @@ done:
  * or MODE_ANY.
  */
 static enum arm_mode dpm_mapmode(struct arm *arm,
-	unsigned num, enum arm_mode mode)
+	unsigned int num, enum arm_mode mode)
 {
 	enum arm_mode amode = arm->core_mode;
 
@@ -793,7 +793,7 @@ static int arm_dpm_full_context(struct target *target)
 		 * Pick some mode with unread registers and read them all.
 		 * Repeat until done.
 		 */
-		for (unsigned i = 0; i < cache->num_regs; i++) {
+		for (unsigned int i = 0; i < cache->num_regs; i++) {
 			struct arm_reg *r;
 
 			if (!cache->reg_list[i].exist || cache->reg_list[i].valid)
@@ -921,7 +921,7 @@ static int dpm_add_breakpoint(struct target *target, struct breakpoint *bp)
 	if (bp->type == BKPT_SOFT)
 		LOG_DEBUG("using HW bkpt, not SW...");
 
-	for (unsigned i = 0; i < dpm->nbp; i++) {
+	for (unsigned int i = 0; i < dpm->nbp; i++) {
 		if (!dpm->dbp[i].bp) {
 			retval = dpm_bpwp_setup(dpm, &dpm->dbp[i].bpwp,
 					bp->address, bp->length);
@@ -940,7 +940,7 @@ static int dpm_remove_breakpoint(struct target *target, struct breakpoint *bp)
 	struct arm_dpm *dpm = arm->dpm;
 	int retval = ERROR_COMMAND_SYNTAX_ERROR;
 
-	for (unsigned i = 0; i < dpm->nbp; i++) {
+	for (unsigned int i = 0; i < dpm->nbp; i++) {
 		if (dpm->dbp[i].bp == bp) {
 			dpm->dbp[i].bp = NULL;
 			dpm->dbp[i].bpwp.dirty = true;
@@ -954,7 +954,7 @@ static int dpm_remove_breakpoint(struct target *target, struct breakpoint *bp)
 	return retval;
 }
 
-static int dpm_watchpoint_setup(struct arm_dpm *dpm, unsigned index_t,
+static int dpm_watchpoint_setup(struct arm_dpm *dpm, unsigned int index_t,
 	struct watchpoint *wp)
 {
 	int retval;
@@ -997,7 +997,7 @@ static int dpm_add_watchpoint(struct target *target, struct watchpoint *wp)
 	int retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 
 	if (dpm->bpwp_enable) {
-		for (unsigned i = 0; i < dpm->nwp; i++) {
+		for (unsigned int i = 0; i < dpm->nwp; i++) {
 			if (!dpm->dwp[i].wp) {
 				retval = dpm_watchpoint_setup(dpm, i, wp);
 				break;
@@ -1014,7 +1014,7 @@ static int dpm_remove_watchpoint(struct target *target, struct watchpoint *wp)
 	struct arm_dpm *dpm = arm->dpm;
 	int retval = ERROR_COMMAND_SYNTAX_ERROR;
 
-	for (unsigned i = 0; i < dpm->nwp; i++) {
+	for (unsigned int i = 0; i < dpm->nwp; i++) {
 		if (dpm->dwp[i].wp == wp) {
 			dpm->dwp[i].wp = NULL;
 			dpm->dwp[i].bpwp.dirty = true;
@@ -1161,7 +1161,7 @@ int arm_dpm_initialize(struct arm_dpm *dpm)
 {
 	/* Disable all breakpoints and watchpoints at startup. */
 	if (dpm->bpwp_disable) {
-		unsigned i;
+		unsigned int i;
 
 		for (i = 0; i < dpm->nbp; i++) {
 			dpm->dbp[i].bpwp.number = i;
diff --git a/src/target/arm_dpm.h b/src/target/arm_dpm.h
index 2da463111..16c801ea5 100644
--- a/src/target/arm_dpm.h
+++ b/src/target/arm_dpm.h
@@ -19,7 +19,7 @@
  */
 
 struct dpm_bpwp {
-	unsigned number;
+	unsigned int number;
 	uint32_t address;
 	uint32_t control;
 	/* true if hardware state needs flushing */
@@ -109,7 +109,7 @@ struct arm_dpm {
 			uint32_t opcode, uint64_t *data);
 
 	struct reg *(*arm_reg_current)(struct arm *arm,
-			unsigned regnum);
+			unsigned int regnum);
 
 	/* BREAKPOINT/WATCHPOINT SUPPORT */
 
@@ -119,7 +119,7 @@ struct arm_dpm {
 	 * must currently be disabled.  Indices 0..15 are used for
 	 * breakpoints; indices 16..31 are for watchpoints.
 	 */
-	int (*bpwp_enable)(struct arm_dpm *dpm, unsigned index_value,
+	int (*bpwp_enable)(struct arm_dpm *dpm, unsigned int index_value,
 			uint32_t addr, uint32_t control);
 
 	/**
@@ -127,15 +127,15 @@ struct arm_dpm {
 	 * hardware control registers.  Indices are the same ones
 	 * accepted by bpwp_enable().
 	 */
-	int (*bpwp_disable)(struct arm_dpm *dpm, unsigned index_value);
+	int (*bpwp_disable)(struct arm_dpm *dpm, unsigned int index_value);
 
 	/* The breakpoint and watchpoint arrays are private to the
 	 * DPM infrastructure.  There are nbp indices in the dbp
 	 * array.  There are nwp indices in the dwp array.
 	 */
 
-	unsigned nbp;
-	unsigned nwp;
+	unsigned int nbp;
+	unsigned int nwp;
 	struct dpm_bp *dbp;
 	struct dpm_wp *dwp;
 
@@ -158,7 +158,7 @@ struct arm_dpm {
 int arm_dpm_setup(struct arm_dpm *dpm);
 int arm_dpm_initialize(struct arm_dpm *dpm);
 
-int arm_dpm_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum);
+int arm_dpm_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned int regnum);
 int arm_dpm_read_current_registers(struct arm_dpm *dpm);
 int arm_dpm_modeswitch(struct arm_dpm *dpm, enum arm_mode mode);
 
diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index ae89762e1..c1836bc7a 100644
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -168,9 +168,9 @@ static const struct {
 };
 
 /** Map PSR mode bits to the name of an ARM processor operating mode. */
-const char *arm_mode_name(unsigned psr_mode)
+const char *arm_mode_name(unsigned int psr_mode)
 {
-	for (unsigned i = 0; i < ARRAY_SIZE(arm_mode_data); i++) {
+	for (unsigned int i = 0; i < ARRAY_SIZE(arm_mode_data); i++) {
 		if (arm_mode_data[i].psr == psr_mode)
 			return arm_mode_data[i].name;
 	}
@@ -179,9 +179,9 @@ const char *arm_mode_name(unsigned psr_mode)
 }
 
 /** Return true iff the parameter denotes a valid ARM processor mode. */
-bool is_arm_mode(unsigned psr_mode)
+bool is_arm_mode(unsigned int psr_mode)
 {
-	for (unsigned i = 0; i < ARRAY_SIZE(arm_mode_data); i++) {
+	for (unsigned int i = 0; i < ARRAY_SIZE(arm_mode_data); i++) {
 		if (arm_mode_data[i].psr == psr_mode)
 			return true;
 	}
@@ -272,8 +272,8 @@ static const struct {
 	 * CPSR -or- SPSR depending on whether 'mode' is MODE_ANY.
 	 * (Exception modes have both CPSR and SPSR registers ...)
 	 */
-	unsigned cookie;
-	unsigned gdb_index;
+	unsigned int cookie;
+	unsigned int gdb_index;
 	enum arm_mode mode;
 } arm_core_regs[] = {
 	/* IMPORTANT:  we guarantee that the first eight cached registers
@@ -499,7 +499,7 @@ void arm_set_cpsr(struct arm *arm, uint32_t cpsr)
  *	However, R8..R14, and SPSR (arm->spsr) *must* be mapped.
  *	CPSR (arm->cpsr) is also not mapped.
  */
-struct reg *arm_reg_current(struct arm *arm, unsigned regnum)
+struct reg *arm_reg_current(struct arm *arm, unsigned int regnum)
 {
 	struct reg *r;
 
@@ -840,7 +840,7 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
 
 	regs = arm->core_cache->reg_list;
 
-	for (unsigned mode = 0; mode < ARRAY_SIZE(arm_mode_data); mode++) {
+	for (unsigned int mode = 0; mode < ARRAY_SIZE(arm_mode_data); mode++) {
 		const char *name;
 		char *sep = "\n";
 		char *shadow = "";
@@ -875,11 +875,11 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
 			sep, name, shadow);
 
 		/* display N rows of up to 4 registers each */
-		for (unsigned i = 0; i < arm_mode_data[mode].n_indices; ) {
+		for (unsigned int i = 0; i < arm_mode_data[mode].n_indices; ) {
 			char output[80];
 			int output_len = 0;
 
-			for (unsigned j = 0; j < 4; j++, i++) {
+			for (unsigned int j = 0; j < 4; j++, i++) {
 				uint32_t value;
 				struct reg *reg = regs;
 
@@ -1750,7 +1750,7 @@ cleanup:
 static int arm_full_context(struct target *target)
 {
 	struct arm *arm = target_to_arm(target);
-	unsigned num_regs = arm->core_cache->num_regs;
+	unsigned int num_regs = arm->core_cache->num_regs;
 	struct reg *reg = arm->core_cache->reg_list;
 	int retval = ERROR_OK;
 
diff --git a/src/target/armv7a_cache_l2x.h b/src/target/armv7a_cache_l2x.h
index d5f1a6f0e..ea726ec58 100644
--- a/src/target/armv7a_cache_l2x.h
+++ b/src/target/armv7a_cache_l2x.h
@@ -122,16 +122,16 @@ struct outer_cache_fns {
 	void (*resume)(void);
 
 	/* This is an ARM L2C thing */
-	void (*write_sec)(unsigned long, unsigned);
+	void (*write_sec)(unsigned long, unsigned int);
 	void (*configure)(const struct l2x0_regs *);
 };
 
 struct l2c_init_data {
 	const char *type;
-	unsigned way_size_0;
-	unsigned num_lock;
+	unsigned int way_size_0;
+	unsigned int num_lock;
 
-	void (*enable)(uint32_t, uint32_t, unsigned);
+	void (*enable)(uint32_t, uint32_t, unsigned int);
 	void (*fixup)(uint32_t, uint32_t, struct outer_cache_fns *);
 	void (*save)(uint32_t);
 	void (*configure)(uint32_t);
diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index d508af7bf..a403b25a9 100644
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -74,9 +74,9 @@ const int armv7m_msp_reg_map[ARMV7M_NUM_CORE_REGS] = {
  * doesn't include basepri or faultmask registers.
  */
 static const struct {
-	unsigned id;
+	unsigned int id;
 	const char *name;
-	unsigned bits;
+	unsigned int bits;
 	enum reg_type type;
 	const char *group;
 	const char *feature;
@@ -530,7 +530,7 @@ int armv7m_start_algorithm(struct target *target,
 	}
 
 	/* Store all non-debug execution registers to armv7m_algorithm_info context */
-	for (unsigned i = 0; i < armv7m->arm.core_cache->num_regs; i++) {
+	for (unsigned int i = 0; i < armv7m->arm.core_cache->num_regs; i++) {
 		struct reg *reg = &armv7m->arm.core_cache->reg_list[i];
 		if (!reg->exist)
 			continue;
diff --git a/src/target/armv8.c b/src/target/armv8.c
index 3e0ea0b75..3bf094275 100644
--- a/src/target/armv8.c
+++ b/src/target/armv8.c
@@ -36,7 +36,7 @@ static const char * const armv8_state_strings[] = {
 
 static const struct {
 	const char *name;
-	unsigned psr;
+	unsigned int psr;
 } armv8_mode_data[] = {
 	{
 		.name = "USR",
@@ -105,9 +105,9 @@ static const struct {
 };
 
 /** Map PSR mode bits to the name of an ARM processor operating mode. */
-const char *armv8_mode_name(unsigned psr_mode)
+const char *armv8_mode_name(unsigned int psr_mode)
 {
-	for (unsigned i = 0; i < ARRAY_SIZE(armv8_mode_data); i++) {
+	for (unsigned int i = 0; i < ARRAY_SIZE(armv8_mode_data); i++) {
 		if (armv8_mode_data[i].psr == psr_mode)
 			return armv8_mode_data[i].name;
 	}
@@ -683,7 +683,7 @@ static int armv8_read_reg_simdfp_aarch32(struct armv8_common *armv8, int regnum,
 	struct arm_dpm *dpm = &armv8->dpm;
 	struct reg *reg_r1 = dpm->arm->core_cache->reg_list + ARMV8_R1;
 	uint32_t value_r0 = 0, value_r1 = 0;
-	unsigned num = (regnum - ARMV8_V0) << 1;
+	unsigned int num = (regnum - ARMV8_V0) << 1;
 
 	switch (regnum) {
 	case ARMV8_V0 ... ARMV8_V15:
@@ -817,7 +817,7 @@ static int armv8_write_reg_simdfp_aarch32(struct armv8_common *armv8, int regnum
 	struct arm_dpm *dpm = &armv8->dpm;
 	struct reg *reg_r1 = dpm->arm->core_cache->reg_list + ARMV8_R1;
 	uint32_t value_r0 = 0, value_r1 = 0;
-	unsigned num = (regnum - ARMV8_V0) << 1;
+	unsigned int num = (regnum - ARMV8_V0) << 1;
 
 	switch (regnum) {
 	case ARMV8_V0 ... ARMV8_V15:
@@ -1506,9 +1506,9 @@ static struct reg_data_type aarch64_flags_cpsr[] = {
 };
 
 static const struct {
-	unsigned id;
+	unsigned int id;
 	const char *name;
-	unsigned bits;
+	unsigned int bits;
 	enum arm_mode mode;
 	enum reg_type type;
 	const char *group;
@@ -1611,10 +1611,10 @@ static const struct {
 };
 
 static const struct {
-	unsigned id;
-	unsigned mapping;
+	unsigned int id;
+	unsigned int mapping;
 	const char *name;
-	unsigned bits;
+	unsigned int bits;
 	enum arm_mode mode;
 	enum reg_type type;
 	const char *group;
@@ -1881,7 +1881,7 @@ struct reg_cache *armv8_build_reg_cache(struct target *target)
 	return cache;
 }
 
-struct reg *armv8_reg_current(struct arm *arm, unsigned regnum)
+struct reg *armv8_reg_current(struct arm *arm, unsigned int regnum)
 {
 	struct reg *r;
 
diff --git a/src/target/armv8.h b/src/target/armv8.h
index 156b5f8bb..349c8f002 100644
--- a/src/target/armv8.h
+++ b/src/target/armv8.h
@@ -329,7 +329,7 @@ static inline unsigned int armv8_curel_from_core_mode(enum arm_mode core_mode)
 	}
 }
 
-const char *armv8_mode_name(unsigned psr_mode);
+const char *armv8_mode_name(unsigned int psr_mode);
 void armv8_select_reg_access(struct armv8_common *armv8, bool is_aarch64);
 int armv8_set_dbgreg_bits(struct armv8_common *armv8, unsigned int reg, unsigned long mask, unsigned long value);
 
diff --git a/src/target/armv8_dpm.c b/src/target/armv8_dpm.c
index bcecedc9d..22617fd0e 100644
--- a/src/target/armv8_dpm.c
+++ b/src/target/armv8_dpm.c
@@ -417,7 +417,7 @@ static int dpmv8_instr_read_data_r0_64(struct arm_dpm *dpm,
 }
 
 #if 0
-static int dpmv8_bpwp_enable(struct arm_dpm *dpm, unsigned index_t,
+static int dpmv8_bpwp_enable(struct arm_dpm *dpm, unsigned int index_t,
 	target_addr_t addr, uint32_t control)
 {
 	struct armv8_common *armv8 = dpm->arm->arch_info;
@@ -450,7 +450,7 @@ static int dpmv8_bpwp_enable(struct arm_dpm *dpm, unsigned index_t,
 }
 #endif
 
-static int dpmv8_bpwp_disable(struct arm_dpm *dpm, unsigned index_t)
+static int dpmv8_bpwp_disable(struct arm_dpm *dpm, unsigned int index_t)
 {
 	struct armv8_common *armv8 = dpm->arm->arch_info;
 	uint32_t cr;
@@ -641,7 +641,7 @@ int armv8_dpm_modeswitch(struct arm_dpm *dpm, enum arm_mode mode)
 /*
  * Common register read, relies on armv8_select_reg_access() having been called.
  */
-static int dpmv8_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
+static int dpmv8_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned int regnum)
 {
 	struct armv8_common *armv8 = dpm->arm->arch_info;
 	int retval = ERROR_FAIL;
@@ -684,7 +684,7 @@ static int dpmv8_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
 /*
  * Common register write, relies on armv8_select_reg_access() having been called.
  */
-static int dpmv8_write_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
+static int dpmv8_write_reg(struct arm_dpm *dpm, struct reg *r, unsigned int regnum)
 {
 	struct armv8_common *armv8 = dpm->arm->arch_info;
 	int retval = ERROR_FAIL;
@@ -887,7 +887,7 @@ int armv8_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp)
 	 * cope with the hand-crafted breakpoint code.
 	 */
 	if (arm->target->type->add_breakpoint == dpmv8_add_breakpoint) {
-		for (unsigned i = 0; i < dpm->nbp; i++) {
+		for (unsigned int i = 0; i < dpm->nbp; i++) {
 			struct dpm_bp *dbp = dpm->dbp + i;
 			struct breakpoint *bp = dbp->bp;
 
@@ -899,7 +899,7 @@ int armv8_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp)
 	}
 
 	/* enable/disable watchpoints */
-	for (unsigned i = 0; i < dpm->nwp; i++) {
+	for (unsigned int i = 0; i < dpm->nwp; i++) {
 		struct dpm_wp *dwp = dpm->dwp + i;
 		struct watchpoint *wp = dwp->wp;
 
@@ -919,7 +919,7 @@ int armv8_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp)
 		goto done;
 
 	/* check everything except our scratch register R0 */
-	for (unsigned i = 1; i < cache->num_regs; i++) {
+	for (unsigned int i = 1; i < cache->num_regs; i++) {
 		struct arm_reg *r;
 
 		/* skip non-existent */
@@ -1047,7 +1047,7 @@ static int armv8_dpm_full_context(struct target *target)
 		 * Pick some mode with unread registers and read them all.
 		 * Repeat until done.
 		 */
-		for (unsigned i = 0; i < cache->num_regs; i++) {
+		for (unsigned int i = 0; i < cache->num_regs; i++) {
 			struct arm_reg *r;
 
 			if (!cache->reg_list[i].exist || cache->reg_list[i].valid)
@@ -1175,7 +1175,7 @@ static int dpmv8_add_breakpoint(struct target *target, struct breakpoint *bp)
 	if (bp->type == BKPT_SOFT)
 		LOG_DEBUG("using HW bkpt, not SW...");
 
-	for (unsigned i = 0; i < dpm->nbp; i++) {
+	for (unsigned int i = 0; i < dpm->nbp; i++) {
 		if (!dpm->dbp[i].bp) {
 			retval = dpmv8_bpwp_setup(dpm, &dpm->dbp[i].bpwp,
 					bp->address, bp->length);
@@ -1194,7 +1194,7 @@ static int dpmv8_remove_breakpoint(struct target *target, struct breakpoint *bp)
 	struct arm_dpm *dpm = arm->dpm;
 	int retval = ERROR_COMMAND_SYNTAX_ERROR;
 
-	for (unsigned i = 0; i < dpm->nbp; i++) {
+	for (unsigned int i = 0; i < dpm->nbp; i++) {
 		if (dpm->dbp[i].bp == bp) {
 			dpm->dbp[i].bp = NULL;
 			dpm->dbp[i].bpwp.dirty = true;
@@ -1208,7 +1208,7 @@ static int dpmv8_remove_breakpoint(struct target *target, struct breakpoint *bp)
 	return retval;
 }
 
-static int dpmv8_watchpoint_setup(struct arm_dpm *dpm, unsigned index_t,
+static int dpmv8_watchpoint_setup(struct arm_dpm *dpm, unsigned int index_t,
 	struct watchpoint *wp)
 {
 	int retval;
@@ -1251,7 +1251,7 @@ static int dpmv8_add_watchpoint(struct target *target, struct watchpoint *wp)
 	int retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 
 	if (dpm->bpwp_enable) {
-		for (unsigned i = 0; i < dpm->nwp; i++) {
+		for (unsigned int i = 0; i < dpm->nwp; i++) {
 			if (!dpm->dwp[i].wp) {
 				retval = dpmv8_watchpoint_setup(dpm, i, wp);
 				break;
@@ -1268,7 +1268,7 @@ static int dpmv8_remove_watchpoint(struct target *target, struct watchpoint *wp)
 	struct arm_dpm *dpm = arm->dpm;
 	int retval = ERROR_COMMAND_SYNTAX_ERROR;
 
-	for (unsigned i = 0; i < dpm->nwp; i++) {
+	for (unsigned int i = 0; i < dpm->nwp; i++) {
 		if (dpm->dwp[i].wp == wp) {
 			dpm->dwp[i].wp = NULL;
 			dpm->dwp[i].bpwp.dirty = true;
@@ -1484,7 +1484,7 @@ int armv8_dpm_initialize(struct arm_dpm *dpm)
 {
 	/* Disable all breakpoints and watchpoints at startup. */
 	if (dpm->bpwp_disable) {
-		unsigned i;
+		unsigned int i;
 
 		for (i = 0; i < dpm->nbp; i++) {
 			dpm->dbp[i].bpwp.number = i;
diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index 498a9cd16..086aafe19 100644
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -571,7 +571,7 @@ static int cortex_a_instr_read_data_r0_r1(struct arm_dpm *dpm,
 	return retval;
 }
 
-static int cortex_a_bpwp_enable(struct arm_dpm *dpm, unsigned index_t,
+static int cortex_a_bpwp_enable(struct arm_dpm *dpm, unsigned int index_t,
 	uint32_t addr, uint32_t control)
 {
 	struct cortex_a_common *a = dpm_to_a(dpm);
@@ -606,7 +606,7 @@ static int cortex_a_bpwp_enable(struct arm_dpm *dpm, unsigned index_t,
 	return retval;
 }
 
-static int cortex_a_bpwp_disable(struct arm_dpm *dpm, unsigned index_t)
+static int cortex_a_bpwp_disable(struct arm_dpm *dpm, unsigned int index_t)
 {
 	struct cortex_a_common *a = dpm_to_a(dpm);
 	uint32_t cr;
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 698a6868c..880a83a18 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -898,7 +898,7 @@ static int cortex_m_debug_entry(struct target *target)
 		arm->core_mode = ARM_MODE_HANDLER;
 		arm->map = armv7m_msp_reg_map;
 	} else {
-		unsigned control = buf_get_u32(arm->core_cache
+		unsigned int control = buf_get_u32(arm->core_cache
 				->reg_list[ARMV7M_CONTROL].value, 0, 3);
 
 		/* is this thread privileged? */
@@ -2142,7 +2142,7 @@ int cortex_m_add_watchpoint(struct target *target, struct watchpoint *watchpoint
 	}
 
 	/* hardware allows address masks of up to 32K */
-	unsigned mask;
+	unsigned int mask;
 
 	for (mask = 0; mask < 16; mask++) {
 		if ((1u << mask) == watchpoint->length)
@@ -2378,7 +2378,7 @@ static int cortex_m_dwt_set_reg(struct reg *reg, uint8_t *buf)
 struct dwt_reg {
 	uint32_t addr;
 	const char *name;
-	unsigned size;
+	unsigned int size;
 };
 
 static const struct dwt_reg dwt_base_regs[] = {
@@ -2946,7 +2946,7 @@ COMMAND_HANDLER(handle_cortex_m_vector_catch_command)
 
 	static const struct {
 		char name[10];
-		unsigned mask;
+		unsigned int mask;
 	} vec_ids[] = {
 		{ "hard_err",   VC_HARDERR, },
 		{ "int_err",    VC_INTERR, },
@@ -2972,7 +2972,7 @@ COMMAND_HANDLER(handle_cortex_m_vector_catch_command)
 		return retval;
 
 	if (CMD_ARGC > 0) {
-		unsigned catch = 0;
+		unsigned int catch = 0;
 
 		if (CMD_ARGC == 1) {
 			if (strcmp(CMD_ARGV[0], "all") == 0) {
@@ -2984,7 +2984,7 @@ COMMAND_HANDLER(handle_cortex_m_vector_catch_command)
 				goto write;
 		}
 		while (CMD_ARGC-- > 0) {
-			unsigned i;
+			unsigned int i;
 			for (i = 0; i < ARRAY_SIZE(vec_ids); i++) {
 				if (strcmp(CMD_ARGV[CMD_ARGC], vec_ids[i].name) != 0)
 					continue;
@@ -3017,7 +3017,7 @@ write:
 		 */
 	}
 
-	for (unsigned i = 0; i < ARRAY_SIZE(vec_ids); i++) {
+	for (unsigned int i = 0; i < ARRAY_SIZE(vec_ids); i++) {
 		command_print(CMD, "%9s: %s", vec_ids[i].name,
 			(demcr & vec_ids[i].mask) ? "catch" : "ignore");
 	}
diff --git a/src/target/dsp563xx.c b/src/target/dsp563xx.c
index 687821c5d..953888de3 100644
--- a/src/target/dsp563xx.c
+++ b/src/target/dsp563xx.c
@@ -220,9 +220,9 @@ enum dsp563xx_reg_idx {
 };
 
 static const struct {
-	unsigned id;
+	unsigned int id;
 	const char *name;
-	unsigned bits;
+	unsigned int bits;
 	/* effective addressing mode encoding */
 	uint8_t eame;
 	uint32_t instr_mask;
diff --git a/src/target/dsp5680xx.c b/src/target/dsp5680xx.c
index c90bca3c1..8b3b1c49b 100644
--- a/src/target/dsp5680xx.c
+++ b/src/target/dsp5680xx.c
@@ -1172,7 +1172,7 @@ static int dsp5680xx_read(struct target *t, target_addr_t a, uint32_t size,
 	dsp5680xx_context.flush = 0;
 	int counter = FLUSH_COUNT_READ_WRITE;
 
-	for (unsigned i = 0; i < count; i++) {
+	for (unsigned int i = 0; i < count; i++) {
 		if (--counter == 0) {
 			dsp5680xx_context.flush = 1;
 			counter = FLUSH_COUNT_READ_WRITE;
diff --git a/src/target/esirisc.c b/src/target/esirisc.c
index 14d34ff04..611141439 100644
--- a/src/target/esirisc.c
+++ b/src/target/esirisc.c
@@ -283,7 +283,7 @@ static int esirisc_save_context(struct target *target)
 
 	LOG_DEBUG("-");
 
-	for (unsigned i = 0; i < esirisc->reg_cache->num_regs; ++i) {
+	for (unsigned int i = 0; i < esirisc->reg_cache->num_regs; ++i) {
 		struct reg *reg = esirisc->reg_cache->reg_list + i;
 		struct esirisc_reg *reg_info = reg->arch_info;
 
@@ -300,7 +300,7 @@ static int esirisc_restore_context(struct target *target)
 
 	LOG_DEBUG("-");
 
-	for (unsigned i = 0; i < esirisc->reg_cache->num_regs; ++i) {
+	for (unsigned int i = 0; i < esirisc->reg_cache->num_regs; ++i) {
 		struct reg *reg = esirisc->reg_cache->reg_list + i;
 		struct esirisc_reg *reg_info = reg->arch_info;
 
diff --git a/src/target/esirisc_trace.c b/src/target/esirisc_trace.c
index 376ea1db7..a70d9d74b 100644
--- a/src/target/esirisc_trace.c
+++ b/src/target/esirisc_trace.c
@@ -287,9 +287,9 @@ static int esirisc_trace_init(struct target *target)
 }
 
 static int esirisc_trace_buf_get_u32(uint8_t *buffer, uint32_t size,
-		unsigned *pos, unsigned count, uint32_t *value)
+		unsigned int *pos, unsigned int count, uint32_t *value)
 {
-	const unsigned num_bits = size * 8;
+	const unsigned int num_bits = size * 8;
 
 	if (*pos+count > num_bits)
 		return ERROR_FAIL;
@@ -301,7 +301,7 @@ static int esirisc_trace_buf_get_u32(uint8_t *buffer, uint32_t size,
 }
 
 static int esirisc_trace_buf_get_pc(struct target *target, uint8_t *buffer, uint32_t size,
-		unsigned *pos, uint32_t *value)
+		unsigned int *pos, uint32_t *value)
 {
 	struct esirisc_common *esirisc = target_to_esirisc(target);
 	struct esirisc_trace *trace_info = &esirisc->trace_info;
@@ -380,7 +380,7 @@ static int esirisc_trace_analyze_full(struct command_invocation *cmd, uint8_t *b
 	const uint32_t num_bits = size * 8;
 	int retval;
 
-	unsigned pos = 0;
+	unsigned int pos = 0;
 	while (pos < num_bits) {
 		uint32_t id;
 
@@ -484,7 +484,7 @@ static int esirisc_trace_analyze_simple(struct command_invocation *cmd, uint8_t
 	const uint32_t num_bits = size * 8;
 	int retval;
 
-	unsigned pos = 0;
+	unsigned int pos = 0;
 	while (pos < num_bits) {
 		uint32_t pc;
 
diff --git a/src/target/etb.h b/src/target/etb.h
index fa75600ad..1d0c08b2c 100644
--- a/src/target/etb.h
+++ b/src/target/etb.h
@@ -32,7 +32,7 @@ struct etb {
 	uint32_t ram_width;
 
 	/** how much trace buffer to fill after trigger */
-	unsigned trigger_percent;
+	unsigned int trigger_percent;
 };
 
 struct etb_reg {
diff --git a/src/target/etm.c b/src/target/etm.c
index d8f2a2faa..53d5cb68c 100644
--- a/src/target/etm.c
+++ b/src/target/etm.c
@@ -220,10 +220,10 @@ static const struct reg_arch_type etm_scan6_type = {
 /* Look up register by ID ... most ETM instances only
  * support a subset of the possible registers.
  */
-static struct reg *etm_reg_lookup(struct etm_context *etm_ctx, unsigned id)
+static struct reg *etm_reg_lookup(struct etm_context *etm_ctx, unsigned int id)
 {
 	struct reg_cache *cache = etm_ctx->reg_cache;
-	unsigned i;
+	unsigned int i;
 
 	for (i = 0; i < cache->num_regs; i++) {
 		struct etm_reg *reg = cache->reg_list[i].arch_info;
@@ -238,9 +238,9 @@ static struct reg *etm_reg_lookup(struct etm_context *etm_ctx, unsigned id)
 	return NULL;
 }
 
-static void etm_reg_add(unsigned bcd_vers, struct arm_jtag *jtag_info,
+static void etm_reg_add(unsigned int bcd_vers, struct arm_jtag *jtag_info,
 	struct reg_cache *cache, struct etm_reg *ereg,
-	const struct etm_reg_info *r, unsigned nreg)
+	const struct etm_reg_info *r, unsigned int nreg)
 {
 	struct reg *reg = cache->reg_list;
 
@@ -281,7 +281,7 @@ struct reg_cache *etm_build_reg_cache(struct target *target,
 	struct reg_cache *reg_cache = malloc(sizeof(struct reg_cache));
 	struct reg *reg_list = NULL;
 	struct etm_reg *arch_info = NULL;
-	unsigned bcd_vers, config;
+	unsigned int bcd_vers, config;
 
 	/* the actual registers are kept in two arrays */
 	reg_list = calloc(128, sizeof(struct reg));
@@ -1590,7 +1590,7 @@ COMMAND_HANDLER(handle_etm_status_command)
 		if (!reg)
 			return ERROR_FAIL;
 		if (etm_get_reg(reg) == ERROR_OK) {
-			unsigned s = buf_get_u32(reg->value, 0, reg->size);
+			unsigned int s = buf_get_u32(reg->value, 0, reg->size);
 
 			command_print(CMD, "etm: %s%s%s%s",
 				/* bit(1) == progbit */
diff --git a/src/target/hla_target.c b/src/target/hla_target.c
index d6f2afb4e..6b0d2e95e 100644
--- a/src/target/hla_target.c
+++ b/src/target/hla_target.c
@@ -258,7 +258,7 @@ static int adapter_debug_entry(struct target *target)
 		arm->core_mode = ARM_MODE_HANDLER;
 		arm->map = armv7m_msp_reg_map;
 	} else {
-		unsigned control = buf_get_u32(arm->core_cache
+		unsigned int control = buf_get_u32(arm->core_cache
 				->reg_list[ARMV7M_CONTROL].value, 0, 3);
 
 		/* is this thread privileged? */
diff --git a/src/target/image.c b/src/target/image.c
index 440fe17d1..e8ac066fd 100644
--- a/src/target/image.c
+++ b/src/target/image.c
@@ -195,7 +195,7 @@ static int image_ihex_buffer_complete_inner(struct image *image,
 				}
 
 				while (count-- > 0) {
-					unsigned value;
+					unsigned int value;
 					sscanf(&lpsz_line[bytes_read], "%2x", &value);
 					ihex->buffer[cooked_bytes] = (uint8_t)value;
 					cal_checksum += (uint8_t)ihex->buffer[cooked_bytes];
@@ -864,7 +864,7 @@ static int image_mot_buffer_complete_inner(struct image *image,
 				}
 
 				while (count-- > 0) {
-					unsigned value;
+					unsigned int value;
 					sscanf(&lpsz_line[bytes_read], "%2x", &value);
 					mot->buffer[cooked_bytes] = (uint8_t)value;
 					cal_checksum += (uint8_t)mot->buffer[cooked_bytes];
diff --git a/src/target/lakemont.c b/src/target/lakemont.c
index 1fcd6426a..0340d0d0b 100644
--- a/src/target/lakemont.c
+++ b/src/target/lakemont.c
@@ -67,7 +67,7 @@ static const struct {
 	const char *name;
 	uint64_t op;
 	uint8_t pm_idx;
-	unsigned bits;
+	unsigned int bits;
 	enum reg_type type;
 	const char *group;
 	const char *feature;
@@ -597,7 +597,7 @@ static int read_all_core_hw_regs(struct target *t)
 {
 	int err;
 	uint32_t regval;
-	unsigned i;
+	unsigned int i;
 	struct x86_32_common *x86_32 = target_to_x86_32(t);
 	for (i = 0; i < (x86_32->cache->num_regs); i++) {
 		if (regs[i].pm_idx == NOT_AVAIL_REG)
@@ -616,7 +616,7 @@ static int read_all_core_hw_regs(struct target *t)
 static int write_all_core_hw_regs(struct target *t)
 {
 	int err;
-	unsigned i;
+	unsigned int i;
 	struct x86_32_common *x86_32 = target_to_x86_32(t);
 	for (i = 0; i < (x86_32->cache->num_regs); i++) {
 		if (regs[i].pm_idx == NOT_AVAIL_REG)
diff --git a/src/target/mips32.c b/src/target/mips32.c
index af52ffca0..dd40558a1 100644
--- a/src/target/mips32.c
+++ b/src/target/mips32.c
@@ -34,7 +34,7 @@ static const char *mips_isa_strings[] = {
  * based on gdb-7.6.2/gdb/features/mips-{fpu,cp0,cpu,dsp}.xml
  */
 static const struct {
-	unsigned id;
+	unsigned int id;
 	const char *name;
 	enum reg_type type;
 	const char *group;
@@ -1187,7 +1187,7 @@ int mips32_read_config_regs(struct target *target)
 		mips32->isa_imp = MIPS32_MIPS16;
 		LOG_USER("ISA implemented: %s%s", "MIPS32, MIPS16", buf);
 	} else if (ejtag_info->config_regs >= 4) {	/* config3 implemented */
-		unsigned isa_imp = (ejtag_info->config[3] & MIPS32_CONFIG3_ISA_MASK) >> MIPS32_CONFIG3_ISA_SHIFT;
+		unsigned int isa_imp = (ejtag_info->config[3] & MIPS32_CONFIG3_ISA_MASK) >> MIPS32_CONFIG3_ISA_SHIFT;
 		if (isa_imp == 1) {
 			mips32->isa_imp = MMIPS32_ONLY;
 			LOG_USER("ISA implemented: %s%s", "microMIPS32", buf);
diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c
index 018d8424e..2d0bd641b 100644
--- a/src/target/mips32_pracc.c
+++ b/src/target/mips32_pracc.c
@@ -370,7 +370,7 @@ int mips32_pracc_queue_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_in
 		return ERROR_FAIL;
 	}
 
-	unsigned num_clocks =
+	unsigned int num_clocks =
 		((uint64_t)(ejtag_info->scan_delay) * adapter_get_speed_khz() + 500000) / 1000000;
 
 	uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl & ~EJTAG_CTRL_PRACC;
@@ -1362,7 +1362,7 @@ int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_are
 	pracc_swap16_array(ejtag_info, jmp_code, ARRAY_SIZE(jmp_code));
 
 	/* execute jump code, with no address check */
-	for (unsigned i = 0; i < ARRAY_SIZE(jmp_code); i++) {
+	for (unsigned int i = 0; i < ARRAY_SIZE(jmp_code); i++) {
 		int retval = wait_for_pracc_rw(ejtag_info);
 		if (retval != ERROR_OK)
 			return retval;
@@ -1397,7 +1397,7 @@ int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_are
 	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_FASTDATA);
 	mips_ejtag_fastdata_scan(ejtag_info, 1, &val);
 
-	unsigned num_clocks = 0;	/* like in legacy code */
+	unsigned int num_clocks = 0;	/* like in legacy code */
 	if (ejtag_info->mode != 0)
 		num_clocks = ((uint64_t)(ejtag_info->scan_delay) * adapter_get_speed_khz() + 500000) / 1000000;
 
diff --git a/src/target/mips32_pracc.h b/src/target/mips32_pracc.h
index f78f89153..a0244a695 100644
--- a/src/target/mips32_pracc.h
+++ b/src/target/mips32_pracc.h
@@ -45,7 +45,7 @@ struct pa_list {
 
 struct pracc_queue_info {
 	struct mips_ejtag *ejtag_info;
-	unsigned isa;
+	unsigned int isa;
 	int retval;
 	int code_count;
 	int store_count;
diff --git a/src/target/mips64.c b/src/target/mips64.c
index 48f4563dc..3d193a300 100644
--- a/src/target/mips64.c
+++ b/src/target/mips64.c
@@ -21,7 +21,7 @@
 #include "mips64.h"
 
 static const struct {
-	unsigned id;
+	unsigned int id;
 	const char *name;
 	enum reg_type type;
 	const char *group;
@@ -332,8 +332,8 @@ int mips64_save_context(struct target *target)
 	if (retval != ERROR_OK)
 		return retval;
 
-	for (unsigned i = 0; i < MIPS64_NUM_REGS; i++)
-			retval = mips64->read_core_reg(target, i);
+	for (unsigned int i = 0; i < MIPS64_NUM_REGS; i++)
+		retval = mips64->read_core_reg(target, i);
 
 	return retval;
 }
@@ -343,7 +343,7 @@ int mips64_restore_context(struct target *target)
 	struct mips64_common *mips64 = target->arch_info;
 	struct mips_ejtag *ejtag_info = &mips64->ejtag_info;
 
-	for (unsigned i = 0; i < MIPS64_NUM_REGS; i++) {
+	for (unsigned int i = 0; i < MIPS64_NUM_REGS; i++) {
 		if (mips64->core_cache->reg_list[i].dirty)
 			mips64->write_core_reg(target, i);
 	}
@@ -379,7 +379,7 @@ int mips64_build_reg_cache(struct target *target)
 	struct reg_cache **cache_p, *cache;
 	struct mips64_core_reg *arch_info = NULL;
 	struct reg *reg_list = NULL;
-	unsigned i;
+	unsigned int i;
 
 	cache = calloc(1, sizeof(*cache));
 	if (!cache) {
diff --git a/src/target/mips64_pracc.c b/src/target/mips64_pracc.c
index b083f5ce8..8cfce32e3 100644
--- a/src/target/mips64_pracc.c
+++ b/src/target/mips64_pracc.c
@@ -27,13 +27,13 @@
 
 struct mips64_pracc_context {
 	uint64_t *local_iparam;
-	unsigned num_iparam;
+	unsigned int num_iparam;
 	uint64_t *local_oparam;
-	unsigned num_oparam;
+	unsigned int num_oparam;
 	const uint32_t *code;
-	unsigned code_len;
+	unsigned int code_len;
 	uint64_t stack[STACK_DEPTH];
-	unsigned stack_offset;
+	unsigned int stack_offset;
 	struct mips_ejtag *ejtag_info;
 };
 
@@ -65,7 +65,7 @@ static int wait_for_pracc_rw(struct mips_ejtag *ejtag_info, uint32_t *ctrl)
 static int mips64_pracc_exec_read(struct mips64_pracc_context *ctx, uint64_t address)
 {
 	struct mips_ejtag *ejtag_info = ctx->ejtag_info;
-	unsigned offset;
+	unsigned int offset;
 	uint32_t ejtag_ctrl;
 	uint64_t data;
 	int rc;
@@ -154,7 +154,7 @@ static int mips64_pracc_exec_write(struct mips64_pracc_context *ctx, uint64_t ad
 {
 	uint32_t ejtag_ctrl;
 	uint64_t data;
-	unsigned offset;
+	unsigned int offset;
 	struct mips_ejtag *ejtag_info = ctx->ejtag_info;
 	int rc;
 
@@ -209,9 +209,9 @@ static int mips64_pracc_exec_write(struct mips64_pracc_context *ctx, uint64_t ad
 }
 
 int mips64_pracc_exec(struct mips_ejtag *ejtag_info,
-		      unsigned code_len, const uint32_t *code,
-		      unsigned num_param_in, uint64_t *param_in,
-		      unsigned num_param_out, uint64_t *param_out)
+		      unsigned int code_len, const uint32_t *code,
+		      unsigned int num_param_in, uint64_t *param_in,
+		      unsigned int num_param_out, uint64_t *param_out)
 {
 	uint32_t ejtag_ctrl;
 	uint64_t address = 0, address_prev = 0;
@@ -219,7 +219,7 @@ int mips64_pracc_exec(struct mips_ejtag *ejtag_info,
 	int retval;
 	int pass = 0;
 	bool first_time_call = true;
-	unsigned i;
+	unsigned int i;
 
 	for (i = 0; i < code_len; i++)
 		LOG_DEBUG("%08" PRIx32, code[i]);
@@ -354,11 +354,11 @@ static int mips64_pracc_read_u64(struct mips_ejtag *ejtag_info, uint64_t addr,
 }
 
 static int mips64_pracc_read_mem64(struct mips_ejtag *ejtag_info, uint64_t addr,
-			    unsigned count, uint64_t *buf)
+			    unsigned int count, uint64_t *buf)
 {
 	int retval = ERROR_OK;
 
-	for (unsigned i = 0; i < count; i++) {
+	for (unsigned int i = 0; i < count; i++) {
 		retval = mips64_pracc_read_u64(ejtag_info, addr + 8*i, &buf[i]);
 		if (retval != ERROR_OK)
 			return retval;
@@ -414,11 +414,11 @@ static int mips64_pracc_read_u32(struct mips_ejtag *ejtag_info, uint64_t addr,
 }
 
 static int mips64_pracc_read_mem32(struct mips_ejtag *ejtag_info, uint64_t addr,
-				   unsigned count, uint32_t *buf)
+				   unsigned int count, uint32_t *buf)
 {
 	int retval = ERROR_OK;
 
-	for (unsigned i = 0; i < count; i++) {
+	for (unsigned int i = 0; i < count; i++) {
 		retval = mips64_pracc_read_u32(ejtag_info, addr + 4 * i, &buf[i]);
 		if (retval != ERROR_OK)
 			return retval;
@@ -474,11 +474,11 @@ static int mips64_pracc_read_u16(struct mips_ejtag *ejtag_info, uint64_t addr,
 }
 
 static int mips64_pracc_read_mem16(struct mips_ejtag *ejtag_info, uint64_t addr,
-			    unsigned count, uint16_t *buf)
+			    unsigned int count, uint16_t *buf)
 {
 	int retval = ERROR_OK;
 
-	for (unsigned i = 0; i < count; i++) {
+	for (unsigned int i = 0; i < count; i++) {
 		retval = mips64_pracc_read_u16(ejtag_info, addr + 2*i, &buf[i]);
 		if (retval != ERROR_OK)
 			return retval;
@@ -534,11 +534,11 @@ static int mips64_pracc_read_u8(struct mips_ejtag *ejtag_info, uint64_t addr,
 }
 
 static int mips64_pracc_read_mem8(struct mips_ejtag *ejtag_info, uint64_t addr,
-			  unsigned count, uint8_t *buf)
+			  unsigned int count, uint8_t *buf)
 {
 	int retval = ERROR_OK;
 
-	for (unsigned i = 0; i < count; i++) {
+	for (unsigned int i = 0; i < count; i++) {
 		retval = mips64_pracc_read_u8(ejtag_info, addr + i, &buf[i]);
 		if (retval != ERROR_OK)
 			return retval;
@@ -547,7 +547,7 @@ static int mips64_pracc_read_mem8(struct mips_ejtag *ejtag_info, uint64_t addr,
 }
 
 int mips64_pracc_read_mem(struct mips_ejtag *ejtag_info, uint64_t addr,
-			  unsigned size, unsigned count, void *buf)
+			  unsigned int size, unsigned int count, void *buf)
 {
 	switch (size) {
 	case 1:
@@ -612,11 +612,11 @@ static int mips64_pracc_write_u64(struct mips_ejtag *ejtag_info, uint64_t addr,
 }
 
 static int mips64_pracc_write_mem64(struct mips_ejtag *ejtag_info,
-			     uint64_t addr, unsigned count, uint64_t *buf)
+			     uint64_t addr, unsigned int count, uint64_t *buf)
 {
 	int retval = ERROR_OK;
 
-	for (unsigned i = 0; i < count; i++) {
+	for (unsigned int i = 0; i < count; i++) {
 		retval = mips64_pracc_write_u64(ejtag_info, addr + 8 * i, &buf[i]);
 		if (retval != ERROR_OK)
 			return retval;
@@ -674,11 +674,11 @@ static int mips64_pracc_write_u32(struct mips_ejtag *ejtag_info, uint64_t addr,
 }
 
 static int mips64_pracc_write_mem32(struct mips_ejtag *ejtag_info, uint64_t addr,
-			     unsigned count, uint32_t *buf)
+			     unsigned int count, uint32_t *buf)
 {
 	int retval = ERROR_OK;
 
-	for (unsigned i = 0; i < count; i++) {
+	for (unsigned int i = 0; i < count; i++) {
 		retval = mips64_pracc_write_u32(ejtag_info, addr + 4 * i, &buf[i]);
 		if (retval != ERROR_OK)
 			return retval;
@@ -734,11 +734,11 @@ static int mips64_pracc_write_u16(struct mips_ejtag *ejtag_info, uint64_t addr,
 }
 
 static int mips64_pracc_write_mem16(struct mips_ejtag *ejtag_info,
-			     uint64_t addr, unsigned count, uint16_t *buf)
+			     uint64_t addr, unsigned int count, uint16_t *buf)
 {
 	int retval = ERROR_OK;
 
-	for (unsigned i = 0; i < count; i++) {
+	for (unsigned int i = 0; i < count; i++) {
 		retval = mips64_pracc_write_u16(ejtag_info, addr + 2 * i, &buf[i]);
 		if (retval != ERROR_OK)
 			return retval;
@@ -795,11 +795,11 @@ static int mips64_pracc_write_u8(struct mips_ejtag *ejtag_info, uint64_t addr,
 }
 
 static int mips64_pracc_write_mem8(struct mips_ejtag *ejtag_info,
-			    uint64_t addr, unsigned count, uint8_t *buf)
+			    uint64_t addr, unsigned int count, uint8_t *buf)
 {
 	int retval = ERROR_OK;
 
-	for (unsigned i = 0; i < count; i++) {
+	for (unsigned int i = 0; i < count; i++) {
 		retval = mips64_pracc_write_u8(ejtag_info, addr + i, &buf[i]);
 		if (retval != ERROR_OK)
 			return retval;
@@ -808,8 +808,8 @@ static int mips64_pracc_write_mem8(struct mips_ejtag *ejtag_info,
 }
 
 int mips64_pracc_write_mem(struct mips_ejtag *ejtag_info,
-			   uint64_t addr, unsigned size,
-			   unsigned count, void *buf)
+			   uint64_t addr, unsigned int size,
+			   unsigned int count, void *buf)
 {
 	switch (size) {
 	case 1:
@@ -1270,7 +1270,7 @@ int mips64_pracc_read_regs(struct mips_ejtag *ejtag_info, uint64_t *regs)
 int mips64_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info,
 			       struct working_area *source,
 			       bool write_t, uint64_t addr,
-			       unsigned count, uint64_t *buf)
+			       unsigned int count, uint64_t *buf)
 {
 	uint32_t handler_code[] = {
 		/* caution when editing, table is modified below */
@@ -1321,7 +1321,7 @@ int mips64_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info,
 	};
 
 	int retval;
-	unsigned i;
+	unsigned int i;
 	uint32_t ejtag_ctrl, address32;
 	uint64_t address, val;
 
@@ -1385,7 +1385,7 @@ int mips64_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info,
 	mips64_ejtag_fastdata_scan(ejtag_info, 1, &val);
 
 	/* like in legacy code */
-	unsigned num_clocks = 0;
+	unsigned int num_clocks = 0;
 	if (ejtag_info->mode != 0)
 		num_clocks = ((uint64_t)(ejtag_info->scan_delay) * adapter_get_speed_khz() + 500000) / 1000000;
 	LOG_DEBUG("num_clocks=%d", num_clocks);
diff --git a/src/target/mips64_pracc.h b/src/target/mips64_pracc.h
index 19d151946..2bdc856b9 100644
--- a/src/target/mips64_pracc.h
+++ b/src/target/mips64_pracc.h
@@ -40,20 +40,22 @@
 #define MIPS64_PRACC_ADDR_STEP 4
 #define MIPS64_PRACC_DATA_STEP 8
 
-int mips64_pracc_read_mem(struct mips_ejtag *ejtag_info, uint64_t addr, unsigned size, unsigned count, void *buf);
-int mips64_pracc_write_mem(struct mips_ejtag *ejtag_info, uint64_t addr, unsigned size, unsigned count, void *buf);
+int mips64_pracc_read_mem(struct mips_ejtag *ejtag_info, uint64_t addr, unsigned int size,
+						  unsigned int count, void *buf);
+int mips64_pracc_write_mem(struct mips_ejtag *ejtag_info, uint64_t addr, unsigned int size,
+						   unsigned int count, void *buf);
 
 int mips64_pracc_read_regs(struct mips_ejtag *ejtag_info, uint64_t *regs);
 int mips64_pracc_write_regs(struct mips_ejtag *ejtag_info, uint64_t *regs);
 
 int mips64_pracc_exec(struct mips_ejtag *ejtag_info,
-		      unsigned code_len, const uint32_t *code,
-		      unsigned num_param_in, uint64_t *param_in,
-		      unsigned num_param_out, uint64_t *param_out);
+		      unsigned int code_len, const uint32_t *code,
+		      unsigned int num_param_in, uint64_t *param_in,
+		      unsigned int num_param_out, uint64_t *param_out);
 
 int mips64_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info,
 			       struct working_area *source,
 			       bool write_t, uint64_t addr,
-			       unsigned count, uint64_t *buf);
+			       unsigned int count, uint64_t *buf);
 
 #endif /* OPENOCD_TARGET_MIPS64_PRACC_H */
diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index 389461cae..2ff4aa926 100644
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -493,7 +493,7 @@ int mips64_ejtag_config_step(struct mips_ejtag *ejtag_info, bool enable_step)
 		MIPS64_NOP,
 	};
 	const uint32_t *code = enable_step ? code_enable : code_disabl...
 
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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-740-g2ad48b78d

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revisions in full, below.

- Log -----------------------------------------------------------------
commit 2ad48b78d4a19921f57a8cb7a4994b534c047b95
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Sep 8 21:15:53 2024 +0200

    flash: convert 'unsigned' to 'unsigned int'
    
    Conversion done with
            checkpatch --fix-inplace -types UNSPECIFIED_INT
    
    Ignore the cast as they could be better addressed.
    Fix only minor additional checkpatch issue (spacing and line
    length).
    
    Change-Id: Id808747855a02052f3738e2d232bff4dd99b27f1
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8479
    Tested-by: jenkins
    Reviewed-by: zapb <de...@za...>

diff --git a/src/flash/common.c b/src/flash/common.c
index ebd9396eb..9f40a3a6f 100644
--- a/src/flash/common.c
+++ b/src/flash/common.c
@@ -11,14 +11,14 @@
 #include "common.h"
 #include <helper/log.h>
 
-unsigned get_flash_name_index(const char *name)
+unsigned int get_flash_name_index(const char *name)
 {
 	const char *name_index = strrchr(name, '.');
 	if (!name_index)
 		return 0;
 	if (name_index[1] < '0' || name_index[1] > '9')
 		return ~0U;
-	unsigned requested;
+	unsigned int requested;
 	int retval = parse_uint(name_index + 1, &requested);
 	/* detect parsing error by forcing past end of bank list */
 	return (retval == ERROR_OK) ? requested : ~0U;
@@ -26,7 +26,7 @@ unsigned get_flash_name_index(const char *name)
 
 bool flash_driver_name_matches(const char *name, const char *expected)
 {
-	unsigned blen = strlen(name);
+	unsigned int blen = strlen(name);
 	/* only match up to the length of the driver name... */
 	if (strncmp(name, expected, blen) != 0)
 		return false;
diff --git a/src/flash/common.h b/src/flash/common.h
index 15aea5b81..6ceaa8d3c 100644
--- a/src/flash/common.h
+++ b/src/flash/common.h
@@ -17,7 +17,7 @@
  * name provides a suffix but it does not parse as an unsigned integer,
  * the routine returns ~0U.  This will prevent further matching.
  */
-unsigned get_flash_name_index(const char *name);
+unsigned int get_flash_name_index(const char *name);
 /**
  * Attempt to match the @c expected name with the @c name of a driver.
  * @param name The name of the driver (from the bank's device structure).
diff --git a/src/flash/nand/arm_io.c b/src/flash/nand/arm_io.c
index 80bd0cf25..dd012e161 100644
--- a/src/flash/nand/arm_io.c
+++ b/src/flash/nand/arm_io.c
@@ -31,12 +31,12 @@
  * @return Success or failure of the operation
  */
 static int arm_code_to_working_area(struct target *target,
-	const uint32_t *code, unsigned code_size,
-	unsigned additional, struct working_area **area)
+	const uint32_t *code, unsigned int code_size,
+	unsigned int additional, struct working_area **area)
 {
 	uint8_t code_buf[code_size];
 	int retval;
-	unsigned size = code_size + additional;
+	unsigned int size = code_size + additional;
 
 	/* REVISIT this assumes size doesn't ever change.
 	 * That's usually correct; but there are boards with
diff --git a/src/flash/nand/arm_io.h b/src/flash/nand/arm_io.h
index 10f0e661c..760dc7e6f 100644
--- a/src/flash/nand/arm_io.h
+++ b/src/flash/nand/arm_io.h
@@ -27,7 +27,7 @@ struct arm_nand_data {
 	struct working_area *copy_area;
 
 	/** The chunk size is the page size or ECC chunk. */
-	unsigned chunk_size;
+	unsigned int chunk_size;
 
 	/** Where data is read from or written to. */
 	uint32_t data;
diff --git a/src/flash/nand/at91sam9.c b/src/flash/nand/at91sam9.c
index 9c8d5e2a3..41cb07bc9 100644
--- a/src/flash/nand/at91sam9.c
+++ b/src/flash/nand/at91sam9.c
@@ -532,7 +532,7 @@ COMMAND_HANDLER(handle_at91sam9_cle_command)
 {
 	struct nand_device *nand = NULL;
 	struct at91sam9_nand *info = NULL;
-	unsigned num, address_line;
+	unsigned int num, address_line;
 
 	if (CMD_ARGC != 2) {
 		command_print(CMD, "incorrect number of arguments for 'at91sam9 cle' command");
@@ -562,7 +562,7 @@ COMMAND_HANDLER(handle_at91sam9_ale_command)
 {
 	struct nand_device *nand = NULL;
 	struct at91sam9_nand *info = NULL;
-	unsigned num, address_line;
+	unsigned int num, address_line;
 
 	if (CMD_ARGC != 2)
 		return ERROR_COMMAND_SYNTAX_ERROR;
@@ -590,7 +590,7 @@ COMMAND_HANDLER(handle_at91sam9_rdy_busy_command)
 {
 	struct nand_device *nand = NULL;
 	struct at91sam9_nand *info = NULL;
-	unsigned num, base_pioc, pin_num;
+	unsigned int num, base_pioc, pin_num;
 
 	if (CMD_ARGC != 3)
 		return ERROR_COMMAND_SYNTAX_ERROR;
@@ -621,7 +621,7 @@ COMMAND_HANDLER(handle_at91sam9_ce_command)
 {
 	struct nand_device *nand = NULL;
 	struct at91sam9_nand *info = NULL;
-	unsigned num, base_pioc, pin_num;
+	unsigned int num, base_pioc, pin_num;
 
 	if (CMD_ARGC != 3)
 		return ERROR_COMMAND_SYNTAX_ERROR;
diff --git a/src/flash/nand/core.c b/src/flash/nand/core.c
index 37e1d12e0..c5430aeb0 100644
--- a/src/flash/nand/core.c
+++ b/src/flash/nand/core.c
@@ -165,8 +165,8 @@ static struct nand_ecclayout nand_oob_8 = {
  */
 static struct nand_device *get_nand_device_by_name(const char *name)
 {
-	unsigned requested = get_flash_name_index(name);
-	unsigned found = 0;
+	unsigned int requested = get_flash_name_index(name);
+	unsigned int found = 0;
 
 	struct nand_device *nand;
 	for (nand = nand_devices; nand; nand = nand->next) {
@@ -194,7 +194,7 @@ struct nand_device *get_nand_device_by_num(int num)
 	return NULL;
 }
 
-COMMAND_HELPER(nand_command_get_device, unsigned name_index,
+COMMAND_HELPER(nand_command_get_device, unsigned int name_index,
 	struct nand_device **nand)
 {
 	const char *str = CMD_ARGV[name_index];
@@ -202,7 +202,7 @@ COMMAND_HELPER(nand_command_get_device, unsigned name_index,
 	if (*nand)
 		return ERROR_OK;
 
-	unsigned num;
+	unsigned int num;
 	COMMAND_PARSE_NUMBER(uint, str, num);
 	*nand = get_nand_device_by_num(num);
 	if (!*nand) {
diff --git a/src/flash/nand/core.h b/src/flash/nand/core.h
index 137298cbc..4286e1183 100644
--- a/src/flash/nand/core.h
+++ b/src/flash/nand/core.h
@@ -209,7 +209,7 @@ int nand_correct_data(struct nand_device *nand, u_char *dat,
 int nand_register_commands(struct command_context *cmd_ctx);
 
 /** helper for parsing a nand device command argument string */
-COMMAND_HELPER(nand_command_get_device, unsigned name_index,
+COMMAND_HELPER(nand_command_get_device, unsigned int name_index,
 	struct nand_device **nand);
 
 
diff --git a/src/flash/nand/davinci.c b/src/flash/nand/davinci.c
index b7169feeb..17040fe17 100644
--- a/src/flash/nand/davinci.c
+++ b/src/flash/nand/davinci.c
@@ -379,7 +379,7 @@ static int davinci_writepage_tail(struct nand_device *nand,
 static int davinci_write_page_ecc1(struct nand_device *nand, uint32_t page,
 	uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
 {
-	unsigned oob_offset;
+	unsigned int oob_offset;
 	struct davinci_nand *info = nand->controller_priv;
 	struct target *target = nand->target;
 	const uint32_t fcr_addr = info->aemif + NANDFCR;
diff --git a/src/flash/nand/driver.c b/src/flash/nand/driver.c
index ce79e1382..5d99102c8 100644
--- a/src/flash/nand/driver.c
+++ b/src/flash/nand/driver.c
@@ -33,7 +33,7 @@ static struct nand_flash_controller *nand_flash_controllers[] = {
 
 struct nand_flash_controller *nand_driver_find_by_name(const char *name)
 {
-	for (unsigned i = 0; nand_flash_controllers[i]; i++) {
+	for (unsigned int i = 0; nand_flash_controllers[i]; i++) {
 		struct nand_flash_controller *controller = nand_flash_controllers[i];
 		if (strcmp(name, controller->name) == 0)
 			return controller;
@@ -42,7 +42,7 @@ struct nand_flash_controller *nand_driver_find_by_name(const char *name)
 }
 int nand_driver_walk(nand_driver_walker_t f, void *x)
 {
-	for (unsigned i = 0; nand_flash_controllers[i]; i++) {
+	for (unsigned int i = 0; nand_flash_controllers[i]; i++) {
 		int retval = (*f)(nand_flash_controllers[i], x);
 		if (retval != ERROR_OK)
 			return retval;
diff --git a/src/flash/nand/fileio.c b/src/flash/nand/fileio.c
index ca618b375..613ae3cb3 100644
--- a/src/flash/nand/fileio.c
+++ b/src/flash/nand/fileio.c
@@ -107,7 +107,7 @@ COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state,
 {
 	nand_fileio_init(state);
 
-	unsigned minargs = need_size ? 4 : 3;
+	unsigned int minargs = need_size ? 4 : 3;
 	if (minargs > CMD_ARGC)
 		return ERROR_COMMAND_SYNTAX_ERROR;
 
@@ -131,7 +131,7 @@ COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state,
 	}
 
 	if (minargs < CMD_ARGC) {
-		for (unsigned i = minargs; i < CMD_ARGC; i++) {
+		for (unsigned int i = minargs; i < CMD_ARGC; i++) {
 			if (!strcmp(CMD_ARGV[i], "oob_raw"))
 				state->oob_format |= NAND_OOB_RAW;
 			else if (!strcmp(CMD_ARGV[i], "oob_only"))
diff --git a/src/flash/nand/lpc3180.c b/src/flash/nand/lpc3180.c
index 8e660a068..d221c34d9 100644
--- a/src/flash/nand/lpc3180.c
+++ b/src/flash/nand/lpc3180.c
@@ -1274,7 +1274,7 @@ COMMAND_HANDLER(handle_lpc3180_select_command)
 	if ((CMD_ARGC < 1) || (CMD_ARGC > 3))
 		return ERROR_COMMAND_SYNTAX_ERROR;
 
-	unsigned num;
+	unsigned int num;
 	COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
 	struct nand_device *nand = get_nand_device_by_num(num);
 	if (!nand) {
diff --git a/src/flash/nand/lpc32xx.c b/src/flash/nand/lpc32xx.c
index 89a00a9e3..c67f2aa30 100644
--- a/src/flash/nand/lpc32xx.c
+++ b/src/flash/nand/lpc32xx.c
@@ -1742,7 +1742,7 @@ COMMAND_HANDLER(handle_lpc32xx_select_command)
 	if ((CMD_ARGC < 1) || (CMD_ARGC > 3))
 		return ERROR_COMMAND_SYNTAX_ERROR;
 
-	unsigned num;
+	unsigned int num;
 	COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
 	struct nand_device *nand = get_nand_device_by_num(num);
 	if (!nand) {
diff --git a/src/flash/nor/aducm360.c b/src/flash/nor/aducm360.c
index ce9bf2445..aa573acde 100644
--- a/src/flash/nor/aducm360.c
+++ b/src/flash/nor/aducm360.c
@@ -79,7 +79,7 @@ static int aducm360_build_sector_list(struct flash_bank *bank)
 	/* sector size is 512 */
 	bank->num_sectors = bank->size / FLASH_SECTOR_SIZE;
 	bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
-	for (unsigned i = 0; i < bank->num_sectors; ++i) {
+	for (unsigned int i = 0; i < bank->num_sectors; ++i) {
 		bank->sectors[i].offset = offset;
 		bank->sectors[i].size = FLASH_SECTOR_SIZE;
 		offset += bank->sectors[i].size;
diff --git a/src/flash/nor/at91sam3.c b/src/flash/nor/at91sam3.c
index 8e8497eb0..b86a18da7 100644
--- a/src/flash/nor/at91sam3.c
+++ b/src/flash/nor/at91sam3.c
@@ -154,15 +154,15 @@ struct sam3_bank_private {
 	struct sam3_chip *chip;
 	/* so we can find the original bank pointer */
 	struct flash_bank *bank;
-	unsigned bank_number;
+	unsigned int bank_number;
 	uint32_t controller_address;
 	uint32_t base_address;
 	uint32_t flash_wait_states;
 	bool present;
-	unsigned size_bytes;
-	unsigned nsectors;
-	unsigned sector_size;
-	unsigned page_size;
+	unsigned int size_bytes;
+	unsigned int nsectors;
+	unsigned int sector_size;
+	unsigned int page_size;
 };
 
 struct sam3_chip_details {
@@ -176,12 +176,12 @@ struct sam3_chip_details {
 	uint32_t chipid_cidr;
 	const char *name;
 
-	unsigned n_gpnvms;
+	unsigned int n_gpnvms;
 #define SAM3_N_NVM_BITS 3
-	unsigned gpnvm[SAM3_N_NVM_BITS];
-	unsigned total_flash_size;
-	unsigned total_sram_size;
-	unsigned n_banks;
+	unsigned int gpnvm[SAM3_N_NVM_BITS];
+	unsigned int total_flash_size;
+	unsigned int total_sram_size;
+	unsigned int n_banks;
 #define SAM3_MAX_FLASH_BANKS 2
 	/* these are "initialized" from the global const data */
 	struct sam3_bank_private bank[SAM3_MAX_FLASH_BANKS];
@@ -2029,7 +2029,7 @@ static int efc_get_result(struct sam3_bank_private *private, uint32_t *v)
 }
 
 static int efc_start_command(struct sam3_bank_private *private,
-	unsigned command, unsigned argument)
+	unsigned int command, unsigned int argument)
 {
 	uint32_t n, v;
 	int r;
@@ -2124,8 +2124,8 @@ do_retry:
  * @param status   - put command status bits here
  */
 static int efc_perform_command(struct sam3_bank_private *private,
-	unsigned command,
-	unsigned argument,
+	unsigned int command,
+	unsigned int argument,
 	uint32_t *status)
 {
 
@@ -2220,7 +2220,7 @@ static int flashd_erase_entire_bank(struct sam3_bank_private *private)
  * @param puthere  - result stored here.
  */
 /* ------------------------------------------------------------------------------ */
-static int flashd_get_gpnvm(struct sam3_bank_private *private, unsigned gpnvm, unsigned *puthere)
+static int flashd_get_gpnvm(struct sam3_bank_private *private, unsigned int gpnvm, unsigned int *puthere)
 {
 	uint32_t v;
 	int r;
@@ -2261,10 +2261,10 @@ static int flashd_get_gpnvm(struct sam3_bank_private *private, unsigned gpnvm, u
  * @param gpnvm GPNVM index.
  * @returns 0 if successful; otherwise returns an error code.
  */
-static int flashd_clr_gpnvm(struct sam3_bank_private *private, unsigned gpnvm)
+static int flashd_clr_gpnvm(struct sam3_bank_private *private, unsigned int gpnvm)
 {
 	int r;
-	unsigned v;
+	unsigned int v;
 
 	LOG_DEBUG("Here");
 	if (private->bank_number != 0) {
@@ -2293,10 +2293,10 @@ static int flashd_clr_gpnvm(struct sam3_bank_private *private, unsigned gpnvm)
  * @param private info about the bank
  * @param gpnvm GPNVM index.
  */
-static int flashd_set_gpnvm(struct sam3_bank_private *private, unsigned gpnvm)
+static int flashd_set_gpnvm(struct sam3_bank_private *private, unsigned int gpnvm)
 {
 	int r;
-	unsigned v;
+	unsigned int v;
 
 	if (private->bank_number != 0) {
 		LOG_ERROR("GPNVM only works with Bank0");
@@ -2346,8 +2346,8 @@ static int flashd_get_lock_bits(struct sam3_bank_private *private, uint32_t *v)
  */
 
 static int flashd_unlock(struct sam3_bank_private *private,
-	unsigned start_sector,
-	unsigned end_sector)
+	unsigned int start_sector,
+	unsigned int end_sector)
 {
 	int r;
 	uint32_t status;
@@ -2376,8 +2376,8 @@ static int flashd_unlock(struct sam3_bank_private *private,
  * @param end_sector   - last sector (inclusive) to lock
  */
 static int flashd_lock(struct sam3_bank_private *private,
-	unsigned start_sector,
-	unsigned end_sector)
+	unsigned int start_sector,
+	unsigned int end_sector)
 {
 	uint32_t status;
 	uint32_t pg;
@@ -2405,8 +2405,8 @@ static int flashd_lock(struct sam3_bank_private *private,
 static uint32_t sam3_reg_fieldname(struct sam3_chip *chip,
 	const char *regname,
 	uint32_t value,
-	unsigned shift,
-	unsigned width)
+	unsigned int shift,
+	unsigned int width)
 {
 	uint32_t v;
 	int hwidth, dwidth;
@@ -2491,7 +2491,7 @@ static const char *const sramsize[] = {
 
 };
 
-static const struct archnames { unsigned value; const char *name; } archnames[] = {
+static const struct archnames { unsigned int value; const char *name; } archnames[] = {
 	{ 0x19,  "AT91SAM9xx Series"                                            },
 	{ 0x29,  "AT91SAM9XExx Series"                                          },
 	{ 0x34,  "AT91x34 Series"                                                       },
@@ -2951,7 +2951,7 @@ static int sam3_protect_check(struct flash_bank *bank)
 {
 	int r;
 	uint32_t v = 0;
-	unsigned x;
+	unsigned int x;
 	struct sam3_bank_private *private;
 
 	LOG_DEBUG("Begin");
@@ -3071,7 +3071,7 @@ static int sam3_get_details(struct sam3_bank_private *private)
 	const struct sam3_chip_details *details;
 	struct sam3_chip *chip;
 	struct flash_bank *saved_banks[SAM3_MAX_FLASH_BANKS];
-	unsigned x;
+	unsigned int x;
 
 	LOG_DEBUG("Begin");
 	details = all_sam3_details;
@@ -3264,7 +3264,7 @@ static int sam3_protect(struct flash_bank *bank, int set, unsigned int first,
 
 }
 
-static int sam3_page_read(struct sam3_bank_private *private, unsigned pagenum, uint8_t *buf)
+static int sam3_page_read(struct sam3_bank_private *private, unsigned int pagenum, uint8_t *buf)
 {
 	uint32_t adr;
 	int r;
@@ -3283,7 +3283,7 @@ static int sam3_page_read(struct sam3_bank_private *private, unsigned pagenum, u
 	return r;
 }
 
-static int sam3_page_write(struct sam3_bank_private *private, unsigned pagenum, const uint8_t *buf)
+static int sam3_page_write(struct sam3_bank_private *private, unsigned int pagenum, const uint8_t *buf)
 {
 	uint32_t adr;
 	uint32_t status;
@@ -3347,10 +3347,10 @@ static int sam3_write(struct flash_bank *bank,
 	uint32_t count)
 {
 	int n;
-	unsigned page_cur;
-	unsigned page_end;
+	unsigned int page_cur;
+	unsigned int page_end;
 	int r;
-	unsigned page_offset;
+	unsigned int page_offset;
 	struct sam3_bank_private *private;
 	uint8_t *pagebuffer;
 
@@ -3497,7 +3497,7 @@ COMMAND_HANDLER(sam3_handle_info_command)
 	if (!chip)
 		return ERROR_OK;
 
-	unsigned x;
+	unsigned int x;
 	int r;
 
 	/* bank0 must exist before we can do anything */
@@ -3549,7 +3549,7 @@ need_define:
 
 COMMAND_HANDLER(sam3_handle_gpnvm_command)
 {
-	unsigned x, v;
+	unsigned int x, v;
 	int r, who;
 	struct sam3_chip *chip;
 
diff --git a/src/flash/nor/at91sam4.c b/src/flash/nor/at91sam4.c
index 31ae35ccd..26a803784 100644
--- a/src/flash/nor/at91sam4.c
+++ b/src/flash/nor/at91sam4.c
@@ -134,15 +134,15 @@ struct sam4_bank_private {
 	struct sam4_chip *chip;
 	/* so we can find the original bank pointer */
 	struct flash_bank *bank;
-	unsigned bank_number;
+	unsigned int bank_number;
 	uint32_t controller_address;
 	uint32_t base_address;
 	uint32_t flash_wait_states;
 	bool present;
-	unsigned size_bytes;
-	unsigned nsectors;
-	unsigned sector_size;
-	unsigned page_size;
+	unsigned int size_bytes;
+	unsigned int nsectors;
+	unsigned int sector_size;
+	unsigned int page_size;
 };
 
 struct sam4_chip_details {
@@ -156,12 +156,12 @@ struct sam4_chip_details {
 	uint32_t chipid_cidr;
 	const char *name;
 
-	unsigned n_gpnvms;
+	unsigned int n_gpnvms;
 #define SAM4_N_NVM_BITS 3
-	unsigned gpnvm[SAM4_N_NVM_BITS];
-	unsigned total_flash_size;
-	unsigned total_sram_size;
-	unsigned n_banks;
+	unsigned int gpnvm[SAM4_N_NVM_BITS];
+	unsigned int total_flash_size;
+	unsigned int total_sram_size;
+	unsigned int n_banks;
 #define SAM4_MAX_FLASH_BANKS 2
 	/* these are "initialized" from the global const data */
 	struct sam4_bank_private bank[SAM4_MAX_FLASH_BANKS];
@@ -1479,7 +1479,7 @@ static int efc_get_result(struct sam4_bank_private *private, uint32_t *v)
 }
 
 static int efc_start_command(struct sam4_bank_private *private,
-	unsigned command, unsigned argument)
+	unsigned int command, unsigned int argument)
 {
 	uint32_t n, v;
 	int r;
@@ -1574,8 +1574,8 @@ do_retry:
  * @param status   - put command status bits here
  */
 static int efc_perform_command(struct sam4_bank_private *private,
-	unsigned command,
-	unsigned argument,
+	unsigned int command,
+	unsigned int argument,
 	uint32_t *status)
 {
 
@@ -1716,7 +1716,7 @@ static int flashd_erase_pages(struct sam4_bank_private *private,
  * @param puthere  - result stored here.
  */
 /* ------------------------------------------------------------------------------ */
-static int flashd_get_gpnvm(struct sam4_bank_private *private, unsigned gpnvm, unsigned *puthere)
+static int flashd_get_gpnvm(struct sam4_bank_private *private, unsigned int gpnvm, unsigned int *puthere)
 {
 	uint32_t v;
 	int r;
@@ -1757,10 +1757,10 @@ static int flashd_get_gpnvm(struct sam4_bank_private *private, unsigned gpnvm, u
  * @param gpnvm GPNVM index.
  * @returns 0 if successful; otherwise returns an error code.
  */
-static int flashd_clr_gpnvm(struct sam4_bank_private *private, unsigned gpnvm)
+static int flashd_clr_gpnvm(struct sam4_bank_private *private, unsigned int gpnvm)
 {
 	int r;
-	unsigned v;
+	unsigned int v;
 
 	LOG_DEBUG("Here");
 	if (private->bank_number != 0) {
@@ -1789,10 +1789,10 @@ static int flashd_clr_gpnvm(struct sam4_bank_private *private, unsigned gpnvm)
  * @param private info about the bank
  * @param gpnvm GPNVM index.
  */
-static int flashd_set_gpnvm(struct sam4_bank_private *private, unsigned gpnvm)
+static int flashd_set_gpnvm(struct sam4_bank_private *private, unsigned int gpnvm)
 {
 	int r;
-	unsigned v;
+	unsigned int v;
 
 	if (private->bank_number != 0) {
 		LOG_ERROR("GPNVM only works with Bank0");
@@ -1846,8 +1846,8 @@ static int flashd_get_lock_bits(struct sam4_bank_private *private, uint32_t *v)
  */
 
 static int flashd_unlock(struct sam4_bank_private *private,
-	unsigned start_sector,
-	unsigned end_sector)
+	unsigned int start_sector,
+	unsigned int end_sector)
 {
 	int r;
 	uint32_t status;
@@ -1876,8 +1876,8 @@ static int flashd_unlock(struct sam4_bank_private *private,
  * @param end_sector   - last sector (inclusive) to lock
  */
 static int flashd_lock(struct sam4_bank_private *private,
-	unsigned start_sector,
-	unsigned end_sector)
+	unsigned int start_sector,
+	unsigned int end_sector)
 {
 	uint32_t status;
 	uint32_t pg;
@@ -1905,8 +1905,8 @@ static int flashd_lock(struct sam4_bank_private *private,
 static uint32_t sam4_reg_fieldname(struct sam4_chip *chip,
 	const char *regname,
 	uint32_t value,
-	unsigned shift,
-	unsigned width)
+	unsigned int shift,
+	unsigned int width)
 {
 	uint32_t v;
 	int hwidth, dwidth;
@@ -1991,7 +1991,7 @@ static const char *const sramsize[] = {
 
 };
 
-static const struct archnames { unsigned value; const char *name; } archnames[] = {
+static const struct archnames { unsigned int value; const char *name; } archnames[] = {
 	{ 0x19,  "AT91SAM9xx Series"                                            },
 	{ 0x29,  "AT91SAM9XExx Series"                                          },
 	{ 0x34,  "AT91x34 Series"                                                       },
@@ -2444,7 +2444,7 @@ static int sam4_protect_check(struct flash_bank *bank)
 {
 	int r;
 	uint32_t v[4] = {0};
-	unsigned x;
+	unsigned int x;
 	struct sam4_bank_private *private;
 
 	LOG_DEBUG("Begin");
@@ -2557,7 +2557,7 @@ static int sam4_get_details(struct sam4_bank_private *private)
 	const struct sam4_chip_details *details;
 	struct sam4_chip *chip;
 	struct flash_bank *saved_banks[SAM4_MAX_FLASH_BANKS];
-	unsigned x;
+	unsigned int x;
 
 	LOG_DEBUG("Begin");
 	details = all_sam4_details;
@@ -2796,7 +2796,7 @@ static int sam4_protect(struct flash_bank *bank, int set, unsigned int first,
 
 }
 
-static int sam4_page_read(struct sam4_bank_private *private, unsigned pagenum, uint8_t *buf)
+static int sam4_page_read(struct sam4_bank_private *private, unsigned int pagenum, uint8_t *buf)
 {
 	uint32_t adr;
 	int r;
@@ -2841,7 +2841,7 @@ static int sam4_set_wait(struct sam4_bank_private *private)
 	return r;
 }
 
-static int sam4_page_write(struct sam4_bank_private *private, unsigned pagenum, const uint8_t *buf)
+static int sam4_page_write(struct sam4_bank_private *private, unsigned int pagenum, const uint8_t *buf)
 {
 	uint32_t adr;
 	uint32_t status;
@@ -2891,10 +2891,10 @@ static int sam4_write(struct flash_bank *bank,
 	uint32_t count)
 {
 	int n;
-	unsigned page_cur;
-	unsigned page_end;
+	unsigned int page_cur;
+	unsigned int page_end;
 	int r;
-	unsigned page_offset;
+	unsigned int page_offset;
 	struct sam4_bank_private *private;
 	uint8_t *pagebuffer;
 
@@ -3045,7 +3045,7 @@ COMMAND_HANDLER(sam4_handle_info_command)
 	if (!chip)
 		return ERROR_OK;
 
-	unsigned x;
+	unsigned int x;
 	int r;
 
 	/* bank0 must exist before we can do anything */
@@ -3097,7 +3097,7 @@ need_define:
 
 COMMAND_HANDLER(sam4_handle_gpnvm_command)
 {
-	unsigned x, v;
+	unsigned int x, v;
 	int r, who;
 	struct sam4_chip *chip;
 
diff --git a/src/flash/nor/at91samd.c b/src/flash/nor/at91samd.c
index 36298f19d..0f7b0bb30 100644
--- a/src/flash/nor/at91samd.c
+++ b/src/flash/nor/at91samd.c
@@ -365,7 +365,7 @@ static const struct samd_family *samd_find_family(uint32_t id)
 	uint8_t family = SAMD_GET_FAMILY(id);
 	uint8_t series = SAMD_GET_SERIES(id);
 
-	for (unsigned i = 0; i < ARRAY_SIZE(samd_families); i++) {
+	for (unsigned int i = 0; i < ARRAY_SIZE(samd_families); i++) {
 		if (samd_families[i].processor == processor &&
 			samd_families[i].series == series &&
 			samd_families[i].family == family)
@@ -387,7 +387,7 @@ static const struct samd_part *samd_find_part(uint32_t id)
 	if (!family)
 		return NULL;
 
-	for (unsigned i = 0; i < family->num_parts; i++) {
+	for (unsigned int i = 0; i < family->num_parts; i++) {
 		if (family->parts[i].id == devsel)
 			return &family->parts[i];
 	}
diff --git a/src/flash/nor/ath79.c b/src/flash/nor/ath79.c
index 1d1ec02b3..7ce42b2da 100644
--- a/src/flash/nor/ath79.c
+++ b/src/flash/nor/ath79.c
@@ -513,7 +513,7 @@ static int ath79_erase(struct flash_bank *bank, unsigned int first,
 	if (ath79_info->dev->erase_cmd == 0x00)
 		return ERROR_FLASH_OPER_UNSUPPORTED;
 
-	for (unsigned sector = first; sector <= last; sector++) {
+	for (unsigned int sector = first; sector <= last; sector++) {
 		if (bank->sectors[sector].is_protected) {
 			LOG_ERROR("Flash sector %u protected", sector);
 			return ERROR_FAIL;
diff --git a/src/flash/nor/atsame5.c b/src/flash/nor/atsame5.c
index a6ac9060a..f34958fdb 100644
--- a/src/flash/nor/atsame5.c
+++ b/src/flash/nor/atsame5.c
@@ -224,7 +224,7 @@ static const struct samd_family *samd_find_family(uint32_t id)
 	uint8_t family = SAMD_GET_FAMILY(id);
 	uint8_t series = SAMD_GET_SERIES(id);
 
-	for (unsigned i = 0; i < ARRAY_SIZE(samd_families); i++) {
+	for (unsigned int i = 0; i < ARRAY_SIZE(samd_families); i++) {
 		if (samd_families[i].processor == processor &&
 			samd_families[i].series == series &&
 			samd_families[i].family == family)
@@ -246,7 +246,7 @@ static const struct samd_part *samd_find_part(uint32_t id)
 	if (!family)
 		return NULL;
 
-	for (unsigned i = 0; i < family->num_parts; i++) {
+	for (unsigned int i = 0; i < family->num_parts; i++) {
 		if (family->parts[i].id == devsel)
 			return &family->parts[i];
 	}
diff --git a/src/flash/nor/atsamv.c b/src/flash/nor/atsamv.c
index 24c432cba..d6d8938b6 100644
--- a/src/flash/nor/atsamv.c
+++ b/src/flash/nor/atsamv.c
@@ -55,8 +55,8 @@
 
 struct samv_flash_bank {
 	bool      probed;
-	unsigned size_bytes;
-	unsigned gpnvm[SAMV_NUM_GPNVM_BITS];
+	unsigned int size_bytes;
+	unsigned int gpnvm[SAMV_NUM_GPNVM_BITS];
 };
 
 /* The actual sector size of the SAMV7 flash memory is 128K bytes.
@@ -82,7 +82,7 @@ static int samv_efc_get_result(struct target *target, uint32_t *v)
 }
 
 static int samv_efc_start_command(struct target *target,
-		unsigned command, unsigned argument)
+		unsigned int command, unsigned int argument)
 {
 	uint32_t v;
 	samv_efc_get_status(target, &v);
@@ -100,7 +100,7 @@ static int samv_efc_start_command(struct target *target,
 }
 
 static int samv_efc_perform_command(struct target *target,
-		unsigned command, unsigned argument, uint32_t *status)
+		unsigned int command, unsigned int argument, uint32_t *status)
 {
 	int r;
 	uint32_t v;
@@ -166,7 +166,7 @@ static int samv_erase_pages(struct target *target,
 			first_page | erase_pages, status);
 }
 
-static int samv_get_gpnvm(struct target *target, unsigned gpnvm, unsigned *out)
+static int samv_get_gpnvm(struct target *target, unsigned int gpnvm, unsigned int *out)
 {
 	uint32_t v;
 	int r;
@@ -190,10 +190,10 @@ static int samv_get_gpnvm(struct target *target, unsigned gpnvm, unsigned *out)
 	return r;
 }
 
-static int samv_clear_gpnvm(struct target *target, unsigned gpnvm)
+static int samv_clear_gpnvm(struct target *target, unsigned int gpnvm)
 {
 	int r;
-	unsigned v;
+	unsigned int v;
 
 	if (gpnvm >= SAMV_NUM_GPNVM_BITS) {
 		LOG_ERROR("invalid gpnvm %d, max: %d", gpnvm, SAMV_NUM_GPNVM_BITS);
@@ -209,10 +209,10 @@ static int samv_clear_gpnvm(struct target *target, unsigned gpnvm)
 	return r;
 }
 
-static int samv_set_gpnvm(struct target *target, unsigned gpnvm)
+static int samv_set_gpnvm(struct target *target, unsigned int gpnvm)
 {
 	int r;
-	unsigned v;
+	unsigned int v;
 	if (gpnvm >= SAMV_NUM_GPNVM_BITS) {
 		LOG_ERROR("invalid gpnvm %d, max: %d", gpnvm, SAMV_NUM_GPNVM_BITS);
 		return ERROR_FAIL;
@@ -231,7 +231,7 @@ static int samv_set_gpnvm(struct target *target, unsigned gpnvm)
 }
 
 static int samv_flash_unlock(struct target *target,
-		unsigned start_sector, unsigned end_sector)
+		unsigned int start_sector, unsigned int end_sector)
 {
 	int r;
 	uint32_t status;
@@ -251,7 +251,7 @@ static int samv_flash_unlock(struct target *target,
 }
 
 static int samv_flash_lock(struct target *target,
-		unsigned start_sector, unsigned end_sector)
+		unsigned int start_sector, unsigned int end_sector)
 {
 	uint32_t status;
 	uint32_t pg;
@@ -419,7 +419,7 @@ static int samv_protect(struct flash_bank *bank, int set, unsigned int first,
 }
 
 static int samv_page_read(struct target *target,
-		unsigned page_num, uint8_t *buf)
+		unsigned int page_num, uint8_t *buf)
 {
 	uint32_t addr = SAMV_FLASH_BASE + page_num * SAMV_PAGE_SIZE;
 	int r = target_read_memory(target, addr, 4, SAMV_PAGE_SIZE / 4, buf);
@@ -430,7 +430,7 @@ static int samv_page_read(struct target *target,
 }
 
 static int samv_page_write(struct target *target,
-		unsigned pagenum, const uint8_t *buf)
+		unsigned int pagenum, const uint8_t *buf)
 {
 	uint32_t status;
 	const uint32_t addr = SAMV_FLASH_BASE + pagenum * SAMV_PAGE_SIZE;
@@ -618,7 +618,7 @@ COMMAND_HANDLER(samv_handle_gpnvm_command)
 			return ERROR_COMMAND_SYNTAX_ERROR;
 	}
 
-	unsigned v = 0;
+	unsigned int v = 0;
 	if (!strcmp("show", CMD_ARGV[0])) {
 		if (who == -1) {
 showall:
diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c
index 96bd7353f..2a15e4913 100644
--- a/src/flash/nor/cfi.c
+++ b/src/flash/nor/cfi.c
@@ -806,7 +806,7 @@ int cfi_flash_bank_cmd(struct flash_bank *bank, unsigned int argc, const char **
 	}
 	bank->driver_priv = cfi_info;
 
-	for (unsigned i = 6; i < argc; i++) {
+	for (unsigned int i = 6; i < argc; i++) {
 		if (strcmp(argv[i], "x16_as_x8") == 0)
 			cfi_info->x16_as_x8 = true;
 		else if (strcmp(argv[i], "data_swap") == 0)
diff --git a/src/flash/nor/cfi.h b/src/flash/nor/cfi.h
index ec7f47403..3a76d98ef 100644
--- a/src/flash/nor/cfi.h
+++ b/src/flash/nor/cfi.h
@@ -58,10 +58,10 @@ struct cfi_flash_bank {
 	void *alt_ext;
 
 	/* calculated timeouts */
-	unsigned word_write_timeout;
-	unsigned buf_write_timeout;
-	unsigned block_erase_timeout;
-	unsigned chip_erase_timeout;
+	unsigned int word_write_timeout;
+	unsigned int buf_write_timeout;
+	unsigned int block_erase_timeout;
+	unsigned int chip_erase_timeout;
 
 	/* memory accessors */
 	int (*write_mem)(struct flash_bank *bank, target_addr_t addr,
diff --git a/src/flash/nor/core.c b/src/flash/nor/core.c
index 5e6c97152..5c4f2acca 100644
--- a/src/flash/nor/core.c
+++ b/src/flash/nor/core.c
@@ -164,7 +164,7 @@ int default_flash_verify(struct flash_bank *bank,
 void flash_bank_add(struct flash_bank *bank)
 {
 	/* put flash bank in linked list */
-	unsigned bank_num = 0;
+	unsigned int bank_num = 0;
 	if (flash_banks) {
 		/* find last flash bank */
 		struct flash_bank *p = flash_banks;
@@ -242,8 +242,8 @@ void flash_free_all_banks(void)
 
 struct flash_bank *get_flash_bank_by_name_noprobe(const char *name)
 {
-	unsigned requested = get_flash_name_index(name);
-	unsigned found = 0;
+	unsigned int requested = get_flash_name_index(name);
+	unsigned int found = 0;
 
 	struct flash_bank *bank;
 	for (bank = flash_banks; bank; bank = bank->next) {
diff --git a/src/flash/nor/core.h b/src/flash/nor/core.h
index ff175a132..f8cf5e269 100644
--- a/src/flash/nor/core.h
+++ b/src/flash/nor/core.h
@@ -250,7 +250,7 @@ int get_flash_bank_by_num(unsigned int num, struct flash_bank **bank);
  * @param bank On output, contains a pointer to the bank or NULL.
  * @returns ERROR_OK on success, or an error indicating the problem.
  */
-COMMAND_HELPER(flash_command_get_bank, unsigned name_index,
+COMMAND_HELPER(flash_command_get_bank, unsigned int name_index,
 		struct flash_bank **bank);
 /**
  * Retrieves @a bank from a command argument, reporting errors parsing
diff --git a/src/flash/nor/drivers.c b/src/flash/nor/drivers.c
index 34359889a..dd9995ecb 100644
--- a/src/flash/nor/drivers.c
+++ b/src/flash/nor/drivers.c
@@ -91,7 +91,7 @@ static const struct flash_driver * const flash_drivers[] = {
 
 const struct flash_driver *flash_driver_find_by_name(const char *name)
 {
-	for (unsigned i = 0; flash_drivers[i]; i++) {
+	for (unsigned int i = 0; flash_drivers[i]; i++) {
 		if (strcmp(name, flash_drivers[i]->name) == 0)
 			return flash_drivers[i];
 	}
diff --git a/src/flash/nor/fespi.c b/src/flash/nor/fespi.c
index 9191764a9..6c4e8a928 100644
--- a/src/flash/nor/fespi.c
+++ b/src/flash/nor/fespi.c
@@ -531,7 +531,7 @@ static int fespi_write(struct flash_bank *bank, const uint8_t *buffer,
 		bin_size = sizeof(riscv64_bin);
 	}
 
-	unsigned data_wa_size = 0;
+	unsigned int data_wa_size = 0;
 	if (target_alloc_working_area(target, bin_size, &algorithm_wa) == ERROR_OK) {
 		retval = target_write_buffer(target, algorithm_wa->address,
 				bin_size, bin);
diff --git a/src/flash/nor/fm4.c b/src/flash/nor/fm4.c
index 979ae84d0..2db79ef50 100644
--- a/src/flash/nor/fm4.c
+++ b/src/flash/nor/fm4.c
@@ -107,7 +107,7 @@ static int fm4_flash_erase(struct flash_bank *bank, unsigned int first,
 	struct working_area *workarea;
 	struct reg_param reg_params[4];
 	struct armv7m_algorithm armv7m_algo;
-	unsigned i;
+	unsigned int i;
 	int retval;
 	const uint8_t erase_sector_code[] = {
 #include "../../../contrib/loaders/flash/fm4/erase.inc"
@@ -207,7 +207,7 @@ static int fm4_flash_write(struct flash_bank *bank, const uint8_t *buffer,
 	struct armv7m_algorithm armv7m_algo;
 	uint32_t halfword_count = DIV_ROUND_UP(byte_count, 2);
 	uint32_t result;
-	unsigned i;
+	unsigned int i;
 	int retval, retval2 = ERROR_OK;
 	const uint8_t write_block_code[] = {
 #include "../../../contrib/loaders/flash/fm4/write.inc"
diff --git a/src/flash/nor/kinetis.c b/src/flash/nor/kinetis.c
index 2d0a75334..2f88b9c1f 100644
--- a/src/flash/nor/kinetis.c
+++ b/src/flash/nor/kinetis.c
@@ -256,7 +256,7 @@
 struct kinetis_flash_bank {
 	struct kinetis_chip *k_chip;
 	bool probed;
-	unsigned bank_number;		/* bank number in particular chip */
+	unsigned int bank_number;	/* bank number in particular chip */
 	struct flash_bank *bank;
 
 	uint32_t sector_size;
@@ -285,9 +285,9 @@ struct kinetis_chip {
 	uint32_t fcfg2_maxaddr0_shifted;
 	uint32_t fcfg2_maxaddr1_shifted;
 
-	unsigned num_pflash_blocks, num_nvm_blocks;
-	unsigned pflash_sector_size, nvm_sector_size;
-	unsigned max_flash_prog_size;
+	unsigned int num_pflash_blocks, num_nvm_blocks;
+	unsigned int pflash_sector_size, nvm_sector_size;
+	unsigned int max_flash_prog_size;
 
 	uint32_t pflash_base;
 	uint32_t pflash_size;
@@ -337,7 +337,7 @@ struct kinetis_chip {
 
 	char name[40];
 
-	unsigned num_banks;
+	unsigned int num_banks;
 	struct kinetis_flash_bank banks[KINETIS_MAX_BANKS];
 };
 
@@ -425,7 +425,7 @@ static int kinetis_probe_chip_s32k(struct kinetis_chip *k_chip);
 static int kinetis_auto_probe(struct flash_bank *bank);
 
 
-static int kinetis_mdm_write_register(struct adiv5_dap *dap, unsigned reg, uint32_t value)
+static int kinetis_mdm_write_register(struct adiv5_dap *dap, unsigned int reg, uint32_t value)
 {
 	LOG_DEBUG("MDM_REG[0x%02x] <- %08" PRIX32, reg, value);
 
@@ -453,7 +453,7 @@ static int kinetis_mdm_write_register(struct adiv5_dap *dap, unsigned reg, uint3
 	return ERROR_OK;
 }
 
-static int kinetis_mdm_read_register(struct adiv5_dap *dap, unsigned reg, uint32_t *result)
+static int kinetis_mdm_read_register(struct adiv5_dap *dap, unsigned int reg, uint32_t *result)
 {
 	struct adiv5_ap *ap = dap_get_ap(dap, MDM_AP);
 	if (!ap) {
@@ -479,7 +479,7 @@ static int kinetis_mdm_read_register(struct adiv5_dap *dap, unsigned reg, uint32
 	return ERROR_OK;
 }
 
-static int kinetis_mdm_poll_register(struct adiv5_dap *dap, unsigned reg,
+static int kinetis_mdm_poll_register(struct adiv5_dap *dap, unsigned int reg,
 			uint32_t mask, uint32_t value, uint32_t timeout_ms)
 {
 	uint32_t val;
@@ -977,7 +977,7 @@ static void kinetis_free_driver_priv(struct flash_bank *bank)
 
 static int kinetis_create_missing_banks(struct kinetis_chip *k_chip)
 {
-	unsigned num_blocks;
+	unsigned int num_blocks;
 	struct kinetis_flash_bank *k_bank;
 	struct flash_bank *bank;
 	char base_name[69], name[87], num[11];
@@ -1463,7 +1463,7 @@ static int kinetis_fill_fcf(struct flash_bank *bank, uint8_t *fcf)
 	uint32_t fprot = 0xffffffff;
 	uint8_t fsec = 0xfe;		 /* set MCU unsecure */
 	uint8_t fdprot = 0xff;
-	unsigned num_blocks;
+	unsigned int num_blocks;
 	uint32_t pflash_bit;
 	uint8_t dflash_bit;
 	struct flash_bank *bank_iter;
@@ -2269,12 +2269,12 @@ static int kinetis_probe_chip(struct kinetis_chip *k_chip)
 	uint32_t ee_size = 0;
 	uint32_t pflash_size_k, nvm_size_k, dflash_size_k;
 	uint32_t pflash_size_m;
-	unsigned num_blocks = 0;
-	unsigned maxaddr_shift = 13;
+	unsigned int num_blocks = 0;
+	unsigned int maxaddr_shift = 13;
 	struct target *target = k_chip->target;
 
-	unsigned familyid = 0, subfamid = 0;
-	unsigned cpu_mhz = 120;
+	unsigned int familyid = 0, subfamid = 0;
+	unsigned int cpu_mhz = 120;
 	bool use_nvm_marking = false;
 	char flash_marking[12], nvm_marking[2];
 	char name[40];
@@ -2895,7 +2895,7 @@ static int kinetis_probe(struct flash_bank *bank)
 {
 	int result;
 	uint8_t fcfg2_maxaddr0, fcfg2_pflsh, fcfg2_maxaddr1;
-	unsigned num_blocks, first_nvm_bank;
+	unsigned int num_blocks, first_nvm_bank;
 	uint32_t size_k;
 	struct kinetis_flash_bank *k_bank = bank->driver_priv;
 	struct kinetis_chip *k_chip;
@@ -2940,7 +2940,7 @@ static int kinetis_probe(struct flash_bank *bank)
 
 	} else if (k_bank->bank_number < num_blocks) {
 		/* nvm, banks start at address 0x10000000 */
-		unsigned nvm_ord = k_bank->bank_number - first_nvm_bank;
+		unsigned int nvm_ord = k_bank->bank_number - first_nvm_bank;
 		uint32_t limit;
 
 		k_bank->flash_class = FC_FLEX_NVM;
@@ -3139,8 +3139,8 @@ static int kinetis_blank_check(struct flash_bank *bank)
 COMMAND_HANDLER(kinetis_nvm_partition)
 {
 	int result;
-	unsigned bank_idx;
-	unsigned num_blocks, first_nvm_bank;
+	unsigned int bank_idx;
+	unsigned int num_blocks, first_nvm_bank;
 	unsigned long par, log2 = 0, ee1 = 0, ee2 = 0;
 	enum { SHOW_INFO, DF_SIZE, EEBKP_SIZE } sz_type = SHOW_INFO;
 	bool enable;
diff --git a/src/flash/nor/kinetis_ke.c b/src/flash/nor/kinetis_ke.c
index c069f3ac8..e4dffa6d5 100644
--- a/src/flash/nor/kinetis_ke.c
+++ b/src/flash/nor/kinetis_ke.c
@@ -134,7 +134,7 @@ struct kinetis_ke_flash_bank {
 
 #define MDM_ACCESS_TIMEOUT	3000 /* iterations */
 
-static int kinetis_ke_mdm_write_register(struct adiv5_dap *dap, unsigned reg, uint32_t value)
+static int kinetis_ke_mdm_write_register(struct adiv5_dap *dap, unsigned int reg, uint32_t value)
 {
 	LOG_DEBUG("MDM_REG[0x%02x] <- %08" PRIX32, reg, value);
 
@@ -161,7 +161,7 @@ static int kinetis_ke_mdm_write_register(struct adiv5_dap *dap, unsigned reg, ui
 	return ERROR_OK;
 }
 
-static int kinetis_ke_mdm_read_register(struct adiv5_dap *dap, unsigned reg, uint32_t *result)
+static int kinetis_ke_mdm_read_register(struct adiv5_dap *dap, unsigned int reg, uint32_t *result)
 {
 	struct adiv5_ap *ap = dap_get_ap(dap, 1);
 	if (!ap) {
@@ -187,7 +187,7 @@ static int kinetis_ke_mdm_read_register(struct adiv5_dap *dap, unsigned reg, uin
 	return ERROR_OK;
 }
 
-static int kinetis_ke_mdm_poll_register(struct adiv5_dap *dap, unsigned reg, uint32_t mask, uint32_t value)
+static int kinetis_ke_mdm_poll_register(struct adiv5_dap *dap, unsigned int reg, uint32_t mask, uint32_t value)
 {
 	uint32_t val;
 	int retval;
diff --git a/src/flash/nor/max32xxx.c b/src/flash/nor/max32xxx.c
index 052a42d23..267fd4312 100644
--- a/src/flash/nor/max32xxx.c
+++ b/src/flash/nor/max32xxx.c
@@ -202,14 +202,14 @@ static int max32xxx_protect_check(struct flash_bank *bank)
 		return ERROR_FLASH_BANK_NOT_PROBED;
 
 	if (!info->max326xx) {
-		for (unsigned i = 0; i < bank->num_sectors; i++)
+		for (unsigned int i = 0; i < bank->num_sectors; i++)
 			bank->sectors[i].is_protected = -1;
 
 		return ERROR_FLASH_OPER_UNSUPPORTED;
 	}
 
 	/* Check the protection */
-	for (unsigned i = 0; i < bank->num_sectors; i++) {
+	for (unsigned int i = 0; i < bank->num_sectors; i++) {
 		if (i%32 == 0)
 			target_read_u32(target, info->flc_base + FLSH_PROT + ((i/32)*4), &temp_reg);
 
@@ -360,7 +360,7 @@ static int max32xxx_write_block(struct flash_bank *bank, const uint8_t *buffer,
 	struct armv7m_algorithm armv7m_info;
 	int retval = ERROR_OK;
 	/* power of two, and multiple of word size */
-	static const unsigned buf_min = 128;
+	static const unsigned int buf_min = 128;
 
 	/* for small buffers it's faster not to download an algorithm */
 	if (wcount * 4 < buf_min)
@@ -903,7 +903,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_check_command)
 	}
 
 	LOG_WARNING("s:<sector number> a:<address> p:<protection bit>");
-	for (unsigned i = 0; i < bank->num_sectors; i += 4) {
+	for (unsigned int i = 0; i < bank->num_sectors; i += 4) {
 		LOG_WARNING("s:%03d a:0x%06x p:%d | s:%03d a:0x%06x p:%d | s:%03d a:0x%06x p:%d | s:%03d a:0x%06x p:%d",
 		(i+0), (i+0)*info->sector_size, bank->sectors[(i+0)].is_protected,
 		(i+1), (i+1)*info->sector_size, bank->sectors[(i+1)].is_protected,
diff --git a/src/flash/nor/psoc5lp.c b/src/flash/nor/psoc5lp.c
index 407efbcab..e8c901950 100644
--- a/src/flash/nor/psoc5lp.c
+++ b/src/flash/nor/psoc5lp.c
@@ -102,10 +102,10 @@
 
 struct psoc5lp_device {
 	uint32_t id;
-	unsigned fam;
-	unsigned speed_mhz;
-	unsigned flash_kb;
-	unsigned eeprom_kb;
+	unsigned int fam;
+	unsigned int speed_mhz;
+	unsigned int flash_kb;
+	unsigned int eeprom_kb;
 };
 
 /*
@@ -245,7 +245,7 @@ static int psoc5lp_find_device(struct target *target,
 	const struct psoc5lp_device **device)
 {
 	uint32_t device_id;
-	unsigned i;
+	unsigned int i;
 	int retval;
 
 	*device = NULL;
@@ -381,9 +381,9 @@ static int psoc5lp_spc_load_byte(struct target *target,
 }
 
 static int psoc5lp_spc_load_row(struct target *target,
-	uint8_t array_id, const uint8_t *data, unsigned row_size)
+	uint8_t array_id, const uint8_t *data, unsigned int row_size)
 {
-	unsigned i;
+	unsigned int i;
 	int retval;
 
 	retval = psoc5lp_spc_write_opcode(target, SPC_LOAD_ROW);
@@ -853,7 +853,7 @@ static int psoc5lp_eeprom_write(struct flash_bank *bank,
 {
 	struct target *target = bank->target;
 	uint8_t temp[2];
-	unsigned row;
+	unsigned int row;
 	int retval;
 
 	if (offset % EEPROM_ROW_SIZE != 0) {
@@ -1124,7 +1124,7 @@ static int psoc5lp_write(struct flash_bank *bank, const uint8_t *buffer,
 	struct working_area *code_area, *even_row_area, *odd_row_area;
 	uint32_t row_size;
 	uint8_t temp[2], buf[12], ecc_bytes[ROW_ECC_SIZE];
-	unsigned array_id, row;
+	unsigned int array_id, row;
 	int i, retval;
 
 	if (offset + byte_count > bank->size) {
@@ -1183,7 +1183,7 @@ static int psoc5lp_write(struct flash_bank *bank, const uint8_t *buffer,
 		     row < ROWS_PER_BLOCK && byte_count > 0; row++) {
 			bool even_row = (row % 2 == 0);
 			struct working_area *data_area = even_row ? even_row_area : odd_row_area;
-			unsigned len = MIN(ROW_SIZE, byte_count);
+			unsigned int len = MIN(ROW_SIZE, byte_count);
 
 			LOG_DEBUG("Writing load command for array %u row %u at " TARGET_ADDR_FMT,
 				array_id, row, data_area->address);
@@ -1307,8 +1307,8 @@ static int psoc5lp_protect_check(struct flash_bank *bank)
 {
 	struct psoc5lp_flash_bank *psoc_bank = bank->driver_priv;
 	uint8_t row_data[ROW_SIZE];
-	const unsigned protection_bytes_per_sector = ROWS_PER_SECTOR * 2 / 8;
-	unsigned i, k, num_sectors;
+	const unsigned int protection_bytes_per_sector = ROWS_PER_SECTOR * 2 / 8;
+	unsigned int i, k, num_sectors;
 	int retval;
 
 	if (bank->target->state != TARGET_HALTED) {
diff --git a/src/flash/nor/sim3x.c b/src/flash/nor/sim3x.c
index 42550d06b..58d7913c2 100644
--- a/src/flash/nor/sim3x.c
+++ b/src/flash/nor/sim3x.c
@@ -859,7 +859,7 @@ static int sim3x_flash_info(struct flash_bank *bank, struct command_invocation *
  *  reg 3:2  - register
  *  reg 1:0  - no effect
  */
-static int ap_write_register(struct adiv5_dap *dap, unsigned reg, uint32_t value)
+static int ap_write_register(struct adiv5_dap *dap, unsigned int reg, uint32_t value)
 {
 	LOG_DEBUG("DAP_REG[0x%02x] <- %08" PRIX32, reg, value);
 
@@ -886,7 +886,7 @@ static int ap_write_register(struct adiv5_dap *dap, unsigned reg, uint32_t value
 	return ERROR_OK;
 }
 
-static int ap_read_register(struct adiv5_dap *dap, unsigned reg, uint32_t *result)
+static int ap_read_register(struct adiv5_dap *dap, unsigned int reg, uint32_t *result)
 {
 	struct adiv5_ap *ap = dap_get_ap(dap, SIM3X_AP);
 	if (!ap) {
@@ -912,7 +912,7 @@ static int ap_read_register(struct adiv5_dap *dap, unsigned reg, uint32_t *resul
 	return ERROR_OK;
 }
 
-static int ap_poll_register(struct adiv5_dap *dap, unsigned reg, uint32_t mask, uint32_t value, int timeout)
+static int ap_poll_register(struct adiv5_dap *dap, unsigned int reg, uint32_t mask, uint32_t value, int timeout)
 {
 	uint32_t val;
 	int retval;
diff --git a/src/flash/nor/stellaris.c b/src/flash/nor/stellaris.c
index 25bc5507a..1f53b2f35 100644
--- a/src/flash/nor/stellaris.c
+++ b/src/flash/nor/stellaris.c
@@ -530,7 +530,7 @@ static void stellaris_set_flash_timing(struct flash_bank *bank)
 	target_write_u32(target, SCB_BASE | USECRL, usecrl);
 }
 
-static const unsigned rcc_xtal[32] = {
+static const unsigned int rcc_xtal[32] = {
 	[0x00] = 1000000,		/* no pll */
 	[0x01] = 1843200,		/* no pll */
 	[0x02] = 2000000,		/* no pll */
@@ -569,7 +569,7 @@ static void stellaris_read_clock_info(struct flash_bank *bank)
 	struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
 	struct target *target = bank->target;
 	uint32_t rcc, rcc2, pllcfg, sysdiv, usesysdiv, bypass, oscsrc;
-	unsigned xtal;
+	unsigned int xtal;
 	unsigned long mainfreq;
 
 	target_read_u32(target, SCB_BASE | RCC, &rcc);
@@ -1029,7 +1029,7 @@ static int stellaris_write_block(struct flash_bank *bank,
 	int retval = ERROR_OK;
 
 	/* power of two, and multiple of word size */
-	static const unsigned buf_min = 128;
+	static const unsigned int buf_min = 128;
 
 	/* for small buffers it's faster not to download an algorithm */
 	if (wcount * 4 < buf_min)
diff --git a/src/flash/nor/tcl.c b/src/flash/nor/tcl.c
index 6ac932be7..e21620934 100644
--- a/src/flash/nor/tcl.c
+++ b/src/flash/nor/tcl.c
@@ -36,7 +36,7 @@ COMMAND_HELPER(flash_command_get_bank_probe_optional, unsigned int name_index,
 	if (*bank)
 		return ERROR_OK;
 
-	unsigned bank_num;
+	unsigned int bank_num;
 	COMMAND_PARSE_NUMBER(uint, name, bank_num);
 
 	if (do_probe) {
@@ -48,7 +48,7 @@ COMMAND_HELPER(flash_command_get_bank_probe_optional, unsigned int name_index,
 	}
 }
 
-COMMAND_HELPER(flash_command_get_bank, unsigned name_index,
+COMMAND_HELPER(flash_command_get_bank, unsigned int name_index,
 	struct flash_bank **bank)
 {
 	return CALL_COMMAND_HANDLER(flash_command_get_bank_probe_optional,
@@ -518,7 +518,7 @@ COMMAND_HANDLER(handle_flash_fill_command)
 	uint64_t pattern;
 	uint32_t count;
 	struct target *target = get_current_target(CMD_CTX);
-	unsigned i;
+	unsigned int i;
 	uint32_t wordsize;
 	int retval;
 
@@ -1316,7 +1316,7 @@ COMMAND_HANDLER(handle_flash_banks_command)
 	if (CMD_ARGC != 0)
 		return ERROR_COMMAND_SYNTAX_ERROR;
 
-	unsigned n = 0;
+	unsigned int n = 0;
 	for (struct flash_bank *p = flash_bank_list(); p; p = p->next, n++) {
 		command_print(CMD, "#%d : %s (%s) at " TARGET_ADDR_FMT ", size 0x%8.8" PRIx32 ", "
 			"buswidth %u, chipwidth %u", p->bank_number,
diff --git a/src/flash/nor/tms470.c b/src/flash/nor/tms470.c
index 6e0ea5b95..00ee77bb8 100644
--- a/src/flash/nor/tms470.c
+++ b/src/flash/nor/tms470.c
@@ -16,7 +16,7 @@
  * ---------------------------------------------------------------------- */
 
 struct tms470_flash_bank {
-	unsigned ordinal;
+	unsigned int ordinal;
 
 	/* device identification register */
 	uint32_t device_ident_reg;
@@ -391,7 +391,7 @@ static int tms470_try_flash_keys(struct target *target, const uint32_t *key_set)
 	/* only perform the key match when 3VSTAT is clear */
 	target_read_u32(target, 0xFFE8BC0C, &fmmstat);
 	if (!(fmmstat & 0x08)) {
-		unsigned i;
+		unsigned int i;
 		uint32_t fmbptr, fmbac2, orig_fmregopt;
 
 		target_write_u32(target, 0xFFE8BC04, fmmstat & ~0x07);
@@ -455,7 +455,7 @@ static int tms470_unlock_flash(struct flash_bank *bank)
 {
 	struct target *target = bank->target;
 	const uint32_t *p_key_sets[5];
-	unsigned i, key_set_count;
+	unsigned int i, key_set_count;
 
 	if (keys_set) {
 		key_set_count = 5;
diff --git a/src/flash/nor/xmc1xxx.c b/src/flash/nor/xmc1xxx.c
index 6e30fc125..4aa97a912 100644
--- a/src/flash/nor/xmc1xxx.c
+++ b/src/flash/nor/xmc1xxx.c
@@ -84,7 +84,7 @@ static int xmc1xxx_erase(struct flash_bank *bank, unsigned int first,
 	struct working_area *workarea;
 	struct reg_param reg_params[3];
 	struct armv7m_algorithm armv7m_algo;
-	unsigned i;
+	unsigned int i;
 	int retval;
 	const uint8_t erase_code[] = {
 #include "../../../contrib/loaders/flash/xmc1xxx/erase.inc"
@@ -159,7 +159,7 @@ static int xmc1xxx_erase_check(struct flash_bank *bank)
 	struct reg_param reg_params[3];
 	struct armv7m_algorithm armv7m_algo;
 	uint16_t val;
-	unsigned i;
+	unsigned int i;
 	int retval;
 	const uint8_t erase_check_code[] = {
 #include "../../../contrib/loaders/flash/xmc1xxx/erase_check.inc"
@@ -245,7 +245,7 @@ static int xmc1xxx_write(struct flash_bank *bank, const uint8_t *buffer,
 	struct reg_param reg_params[4];
 	struct armv7m_algorithm armv7m_algo;
 	uint32_t block_count = DIV_ROUND_UP(byte_count, NVM_BLOCK_SIZE);
-	unsigned i;
+	unsigned int i;
 	int retval;
 	const uint8_t write_code[] = {
 #include "../../../contrib/loaders/flash/xmc1xxx/write.inc"

-----------------------------------------------------------------------

Summary of changes:
 src/flash/common.c         |  6 ++--
 src/flash/common.h         |  2 +-
 src/flash/nand/arm_io.c    |  6 ++--
 src/flash/nand/arm_io.h    |  2 +-
 src/flash/nand/at91sam9.c  |  8 +++---
 src/flash/nand/core.c      |  8 +++---
 src/flash/nand/core.h      |  2 +-
 src/flash/nand/davinci.c   |  2 +-
 src/flash/nand/driver.c    |  4 +--
 src/flash/nand/fileio.c    |  4 +--
 src/flash/nand/lpc3180.c   |  2 +-
 src/flash/nand/lpc32xx.c   |  2 +-
 src/flash/nor/aducm360.c   |  2 +-
 src/flash/nor/at91sam3.c   | 68 +++++++++++++++++++++++-----------------------
 src/flash/nor/at91sam4.c   | 68 +++++++++++++++++++++++-----------------------
 src/flash/nor/at91samd.c   |  4 +--
 src/flash/nor/ath79.c      |  2 +-
 src/flash/nor/atsame5.c    |  4 +--
 src/flash/nor/atsamv.c     | 28 +++++++++----------
 src/flash/nor/cfi.c        |  2 +-
 src/flash/nor/cfi.h        |  8 +++---
 src/flash/nor/core.c       |  6 ++--
 src/flash/nor/core.h       |  2 +-
 src/flash/nor/drivers.c    |  2 +-
 src/flash/nor/fespi.c      |  2 +-
 src/flash/nor/fm4.c        |  4 +--
 src/flash/nor/kinetis.c    | 36 ++++++++++++------------
 src/flash/nor/kinetis_ke.c |  6 ++--
 src/flash/nor/max32xxx.c   |  8 +++---
 src/flash/nor/psoc5lp.c    | 24 ++++++++--------
 src/flash/nor/sim3x.c      |  6 ++--
 src/flash/nor/stellaris.c  |  6 ++--
 src/flash/nor/tcl.c        |  8 +++---
 src/flash/nor/tms470.c     |  6 ++--
 src/flash/nor/xmc1xxx.c    |  6 ++--
 35 files changed, 178 insertions(+), 178 deletions(-)


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- Log -----------------------------------------------------------------
commit 50586c9a063de2475ec12c4858dccfa8d5545221
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Sep 8 21:44:32 2024 +0200

    target: use 'unsigned int' for smp group
    
    Change the type to 'struct target::smp' and to the initialization
    variable 'smp_group'.
    
    Change-Id: I5f5a30a796aaf4e0014a38e81abdf4fb4afbdf48
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8478
    Reviewed-by: zapb <de...@za...>
    Tested-by: jenkins

diff --git a/src/target/target.c b/src/target/target.c
index c3a4ed6d2..281bbbd40 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -6007,7 +6007,7 @@ static int get_target_with_common_rtos_type(struct command_invocation *cmd,
 
 COMMAND_HANDLER(handle_target_smp)
 {
-	static int smp_group = 1;
+	static unsigned int smp_group = 1;
 
 	if (CMD_ARGC == 0) {
 		LOG_DEBUG("Empty SMP target");
diff --git a/src/target/target.h b/src/target/target.h
index d3077f571..ecc8a9032 100644
--- a/src/target/target.h
+++ b/src/target/target.h
@@ -184,7 +184,7 @@ struct target {
 	bool rtos_auto_detect;				/* A flag that indicates that the RTOS has been specified as "auto"
 										 * and must be detected when symbols are offered */
 	struct backoff_timer backoff;
-	int smp;							/* Unique non-zero number for each SMP group */
+	unsigned int smp;					/* Unique non-zero number for each SMP group */
 	struct list_head *smp_targets;		/* list all targets in this smp group/cluster
 										 * The head of the list is shared between the
 										 * cluster, thus here there is a pointer */

commit bf1cf4afbb22d3c617186856c6638f4bb2d2d23b
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Sep 8 23:11:45 2024 +0200

    openocd: fix conversion string for stdint values
    
    Detected while converting 'unsigned' to 'unsigned int'.
    
    Use the correct conversion string for stdint values.
    
    Change-Id: I99f3dff4c64dfd7acf2bddb130b56e9ebe1e6c60
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8477
    Tested-by: jenkins

diff --git a/src/flash/nand/at91sam9.c b/src/flash/nand/at91sam9.c
index bfbba67c4..9c8d5e2a3 100644
--- a/src/flash/nand/at91sam9.c
+++ b/src/flash/nand/at91sam9.c
@@ -389,9 +389,8 @@ static int at91sam9_read_page(struct nand_device *nand, uint32_t page,
 				uint32_t bit = parity & 0x0F;
 
 				data[word] ^= (0x1) << bit;
-				LOG_INFO("Data word %d, bit %d corrected.",
-					(unsigned) word,
-					(unsigned) bit);
+				LOG_INFO("Data word %" PRIu32 ", bit %" PRIu32 " corrected.",
+					word, bit);
 			}
 		}
 
diff --git a/src/flash/nand/lpc3180.c b/src/flash/nand/lpc3180.c
index c1af1d737..8e660a068 100644
--- a/src/flash/nand/lpc3180.c
+++ b/src/flash/nand/lpc3180.c
@@ -890,8 +890,7 @@ static int lpc3180_read_page(struct nand_device *nand,
 
 			if (mlc_isr & 0x8) {
 				if (mlc_isr & 0x40) {
-					LOG_ERROR("uncorrectable error detected: 0x%2.2x",
-						(unsigned)mlc_isr);
+					LOG_ERROR("uncorrectable error detected: 0x%2.2" PRIx32, mlc_isr);
 					free(page_buffer);
 					free(oob_buffer);
 					return ERROR_NAND_OPERATION_FAILED;
diff --git a/src/flash/nand/lpc32xx.c b/src/flash/nand/lpc32xx.c
index 1fdae9fe5..89a00a9e3 100644
--- a/src/flash/nand/lpc32xx.c
+++ b/src/flash/nand/lpc32xx.c
@@ -1386,8 +1386,7 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page,
 
 		if (mlc_isr & 0x8) {
 			if (mlc_isr & 0x40) {
-				LOG_ERROR("uncorrectable error detected: "
-					"0x%2.2x", (unsigned)mlc_isr);
+				LOG_ERROR("uncorrectable error detected: 0x%2.2" PRIx32, mlc_isr);
 				return ERROR_NAND_OPERATION_FAILED;
 			}
 
diff --git a/src/flash/nor/at91sam3.c b/src/flash/nor/at91sam3.c
index b1cb8f110..8e8497eb0 100644
--- a/src/flash/nor/at91sam3.c
+++ b/src/flash/nor/at91sam3.c
@@ -2051,7 +2051,7 @@ do_retry:
 		case AT91C_EFC_FCMD_CLB:
 			n = (private->size_bytes / private->page_size);
 			if (argument >= n)
-				LOG_ERROR("*BUG*: Embedded flash has only %u pages", (unsigned)(n));
+				LOG_ERROR("*BUG*: Embedded flash has only %" PRIu32 " pages", n);
 			break;
 
 		case AT91C_EFC_FCMD_SFB:
@@ -2867,8 +2867,8 @@ static int sam3_read_this_reg(struct sam3_chip *chip, uint32_t *goes_here)
 
 	r = target_read_u32(chip->target, reg->address, goes_here);
 	if (r != ERROR_OK) {
-		LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08x, Err: %d",
-			reg->name, (unsigned)(reg->address), r);
+		LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08" PRIx32 ", Err: %d",
+			reg->name, reg->address, r);
 	}
 	return r;
 }
@@ -2883,8 +2883,8 @@ static int sam3_read_all_regs(struct sam3_chip *chip)
 		r = sam3_read_this_reg(chip,
 				sam3_get_reg_ptr(&(chip->cfg), reg));
 		if (r != ERROR_OK) {
-			LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08x, Error: %d",
-				reg->name, ((unsigned)(reg->address)), r);
+			LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08" PRIx32 ", Error: %d",
+				reg->name, reg->address, r);
 			return r;
 		}
 		reg++;
diff --git a/src/flash/nor/at91sam4.c b/src/flash/nor/at91sam4.c
index 62127530f..31ae35ccd 100644
--- a/src/flash/nor/at91sam4.c
+++ b/src/flash/nor/at91sam4.c
@@ -1501,7 +1501,7 @@ do_retry:
 		case AT91C_EFC_FCMD_CLB:
 			n = (private->size_bytes / private->page_size);
 			if (argument >= n)
-				LOG_ERROR("*BUG*: Embedded flash has only %u pages", (unsigned)(n));
+				LOG_ERROR("*BUG*: Embedded flash has only %" PRIu32 " pages", n);
 			break;
 
 		case AT91C_EFC_FCMD_SFB:
@@ -2374,8 +2374,8 @@ static int sam4_read_this_reg(struct sam4_chip *chip, uint32_t *goes_here)
 
 	r = target_read_u32(chip->target, reg->address, goes_here);
 	if (r != ERROR_OK) {
-		LOG_ERROR("Cannot read SAM4 register: %s @ 0x%08x, Err: %d",
-			reg->name, (unsigned)(reg->address), r);
+		LOG_ERROR("Cannot read SAM4 register: %s @ 0x%08" PRIx32 ", Err: %d",
+			reg->name, reg->address, r);
 	}
 	return r;
 }
@@ -2390,8 +2390,8 @@ static int sam4_read_all_regs(struct sam4_chip *chip)
 		r = sam4_read_this_reg(chip,
 				sam4_get_reg_ptr(&(chip->cfg), reg));
 		if (r != ERROR_OK) {
-			LOG_ERROR("Cannot read SAM4 register: %s @ 0x%08x, Error: %d",
-				reg->name, ((unsigned)(reg->address)), r);
+			LOG_ERROR("Cannot read SAM4 register: %s @ 0x%08" PRIx32 ", Error: %d",
+				reg->name, reg->address, r);
 			return r;
 		}
 		reg++;
diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c
index 78bc91e7d..96bd7353f 100644
--- a/src/flash/nor/cfi.c
+++ b/src/flash/nor/cfi.c
@@ -2219,8 +2219,7 @@ static int cfi_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, u
 	uint8_t current_word[CFI_MAX_BUS_WIDTH];
 	int retval;
 
-	LOG_DEBUG("reading buffer of %i byte at 0x%8.8x",
-		(int)count, (unsigned)offset);
+	LOG_DEBUG("reading buffer of %" PRIi32 " byte at 0x%8.8" PRIx32, count, offset);
 
 	if (bank->target->state != TARGET_HALTED) {
 		LOG_ERROR("Target not halted");
diff --git a/src/flash/nor/max32xxx.c b/src/flash/nor/max32xxx.c
index 59a14af8b..052a42d23 100644
--- a/src/flash/nor/max32xxx.c
+++ b/src/flash/nor/max32xxx.c
@@ -388,8 +388,8 @@ static int max32xxx_write_block(struct flash_bank *bank, const uint8_t *buffer,
 			return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 		}
 
-		LOG_DEBUG("retry target_alloc_working_area(%s, size=%u)",
-			target_name(target), (unsigned) buffer_size);
+		LOG_DEBUG("retry target_alloc_working_area(%s, size=%" PRIu32 ")",
+			target_name(target), buffer_size);
 	}
 
 	target_write_buffer(target, write_algorithm->address, sizeof(write_code),
diff --git a/src/flash/nor/stellaris.c b/src/flash/nor/stellaris.c
index eab6244d4..25bc5507a 100644
--- a/src/flash/nor/stellaris.c
+++ b/src/flash/nor/stellaris.c
@@ -1056,8 +1056,8 @@ static int stellaris_write_block(struct flash_bank *bank,
 			target_free_working_area(target, write_algorithm);
 			return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 		}
-		LOG_DEBUG("retry target_alloc_working_area(%s, size=%u)",
-				target_name(target), (unsigned) buffer_size);
+		LOG_DEBUG("retry target_alloc_working_area(%s, size=%" PRIu32 ")",
+				target_name(target), buffer_size);
 	}
 
 	target_write_buffer(target, write_algorithm->address,
diff --git a/src/flash/nor/tms470.c b/src/flash/nor/tms470.c
index e01d2df0a..6e0ea5b95 100644
--- a/src/flash/nor/tms470.c
+++ b/src/flash/nor/tms470.c
@@ -239,8 +239,8 @@ static int tms470_read_part_info(struct flash_bank *bank)
 			break;
 
 		default:
-			LOG_WARNING("Could not identify part 0x%02x as a member of the TMS470 family.",
-					(unsigned)part_number);
+			LOG_WARNING("Could not identify part 0x%02" PRIx32 " as a member of the TMS470 family.",
+					part_number);
 			return ERROR_FLASH_OPERATION_FAILED;
 	}
 
diff --git a/src/jtag/core.c b/src/jtag/core.c
index a6f38a19d..6515d7160 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -1473,10 +1473,9 @@ void jtag_tap_init(struct jtag_tap *tap)
 	jtag_tap_add(tap);
 
 	LOG_DEBUG("Created Tap: %s @ abs position %u, "
-			"irlen %u, capture: 0x%x mask: 0x%x", tap->dotted_name,
+			"irlen %u, capture: 0x%" PRIx32 " mask: 0x%" PRIx32, tap->dotted_name,
 			tap->abs_chain_position, tap->ir_length,
-			(unsigned) tap->ir_capture_value,
-			(unsigned) tap->ir_capture_mask);
+			tap->ir_capture_value, tap->ir_capture_mask);
 }
 
 void jtag_tap_free(struct jtag_tap *tap)
diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c
index 624b4e4c2..e2b3b45a6 100644
--- a/src/jtag/tcl.c
+++ b/src/jtag/tcl.c
@@ -803,10 +803,8 @@ COMMAND_HANDLER(handle_scan_chain_command)
 	while (tap) {
 		uint32_t expected, expected_mask, ii;
 
-		snprintf(expected_id, sizeof(expected_id), "0x%08x",
-			(unsigned)((tap->expected_ids_cnt > 0)
-				   ? tap->expected_ids[0]
-				   : 0));
+		snprintf(expected_id, sizeof(expected_id), "0x%08" PRIx32,
+			(tap->expected_ids_cnt > 0) ? tap->expected_ids[0] : 0);
 		if (tap->ignore_version)
 			expected_id[2] = '*';
 
@@ -825,8 +823,7 @@ COMMAND_HANDLER(handle_scan_chain_command)
 			(unsigned int)(expected_mask));
 
 		for (ii = 1; ii < tap->expected_ids_cnt; ii++) {
-			snprintf(expected_id, sizeof(expected_id), "0x%08x",
-				(unsigned) tap->expected_ids[ii]);
+			snprintf(expected_id, sizeof(expected_id), "0x%08" PRIx32, tap->expected_ids[ii]);
 			if (tap->ignore_version)
 				expected_id[2] = '*';
 
diff --git a/src/target/arm11.c b/src/target/arm11.c
index 50aaa86f1..43790c737 100644
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -43,7 +43,7 @@ static int arm11_check_init(struct arm11_common *arm11)
 	CHECK_RETVAL(arm11_read_dscr(arm11));
 
 	if (!(arm11->dscr & DSCR_HALT_DBG_MODE)) {
-		LOG_DEBUG("DSCR %08x", (unsigned) arm11->dscr);
+		LOG_DEBUG("DSCR %08" PRIx32, arm11->dscr);
 		LOG_DEBUG("Bringing target into debug mode");
 
 		arm11->dscr |= DSCR_HALT_DBG_MODE;
@@ -241,8 +241,7 @@ static int arm11_leave_debug_state(struct arm11_common *arm11, bool bpwp)
 			registers hold data that was written by one side (CPU or JTAG) and not
 			read out by the other side.
 			*/
-			LOG_ERROR("wDTR/rDTR inconsistent (DSCR %08x)",
-				(unsigned) arm11->dscr);
+			LOG_ERROR("wDTR/rDTR inconsistent (DSCR %08" PRIx32 ")", arm11->dscr);
 			return ERROR_FAIL;
 		}
 	}
@@ -516,7 +515,7 @@ static int arm11_resume(struct target *target, int current,
 	while (1) {
 		CHECK_RETVAL(arm11_read_dscr(arm11));
 
-		LOG_DEBUG("DSCR %08x", (unsigned) arm11->dscr);
+		LOG_DEBUG("DSCR %08" PRIx32, arm11->dscr);
 
 		if (arm11->dscr & DSCR_CORE_RESTARTED)
 			break;
@@ -662,7 +661,7 @@ static int arm11_step(struct target *target, int current,
 				| DSCR_CORE_HALTED;
 
 			CHECK_RETVAL(arm11_read_dscr(arm11));
-			LOG_DEBUG("DSCR %08x e", (unsigned) arm11->dscr);
+			LOG_DEBUG("DSCR %08" PRIx32 " e", arm11->dscr);
 
 			if ((arm11->dscr & mask) == mask)
 				break;
@@ -1012,10 +1011,8 @@ static int arm11_write_memory_inner(struct target *target,
 			return retval;
 
 		if (address + size * count != r0) {
-			LOG_ERROR("Data transfer failed. Expected end "
-				"address 0x%08x, got 0x%08x",
-				(unsigned) (address + size * count),
-				(unsigned) r0);
+			LOG_ERROR("Data transfer failed. Expected end address 0x%08" PRIx32 ", got 0x%08" PRIx32,
+				address + size * count, r0);
 
 			if (burst)
 				LOG_ERROR(
diff --git a/src/target/arm11_dbgtap.c b/src/target/arm11_dbgtap.c
index b670bd7f7..b66f88618 100644
--- a/src/target/arm11_dbgtap.c
+++ b/src/target/arm11_dbgtap.c
@@ -242,7 +242,7 @@ int arm11_add_debug_scan_n(struct arm11_common *arm11,
 static void arm11_add_debug_inst(struct arm11_common *arm11,
 	uint32_t inst, uint8_t *flag, tap_state_t state)
 {
-	JTAG_DEBUG("INST <= 0x%08x", (unsigned) inst);
+	JTAG_DEBUG("INST <= 0x%08" PRIx32, inst);
 
 	struct scan_field itr[2];
 
@@ -282,9 +282,7 @@ int arm11_read_dscr(struct arm11_common *arm11)
 	CHECK_RETVAL(jtag_execute_queue());
 
 	if (arm11->dscr != dscr)
-		JTAG_DEBUG("DSCR  = %08x (OLD %08x)",
-			(unsigned) dscr,
-			(unsigned) arm11->dscr);
+		JTAG_DEBUG("DSCR  = %08" PRIx32 " (OLD %08" PRIx32 ")", dscr, arm11->dscr);
 
 	arm11->dscr = dscr;
 
@@ -317,9 +315,7 @@ int arm11_write_dscr(struct arm11_common *arm11, uint32_t dscr)
 
 	CHECK_RETVAL(jtag_execute_queue());
 
-	JTAG_DEBUG("DSCR <= %08x (OLD %08x)",
-		(unsigned) dscr,
-		(unsigned) arm11->dscr);
+	JTAG_DEBUG("DSCR <= %08" PRIx32 " (OLD %08" PRIx32 ")", dscr, arm11->dscr);
 
 	arm11->dscr = dscr;
 
@@ -509,8 +505,8 @@ int arm11_run_instr_data_to_core(struct arm11_common *arm11,
 
 		CHECK_RETVAL(jtag_execute_queue());
 
-		JTAG_DEBUG("DTR  _data %08x  ready %d  n_retry %d",
-			(unsigned) _data, ready, n_retry);
+		JTAG_DEBUG("DTR  _data %08" PRIx32 "  ready %d  n_retry %d",
+			_data, ready, n_retry);
 
 		int64_t then = 0;
 
@@ -754,8 +750,8 @@ int arm11_run_instr_data_from_core(struct arm11_common *arm11,
 
 			CHECK_RETVAL(jtag_execute_queue());
 
-			JTAG_DEBUG("DTR  _data %08x  ready %d  n_retry %d",
-				(unsigned) _data, ready, n_retry);
+			JTAG_DEBUG("DTR  _data %08" PRIx32 "  ready %d  n_retry %d",
+				_data, ready, n_retry);
 
 			int64_t then = 0;
 
@@ -878,9 +874,8 @@ int arm11_sc7_run(struct arm11_common *arm11, struct arm11_sc7_action *actions,
 		/* Timeout here so we don't get stuck. */
 		int i_n = 0;
 		while (1) {
-			JTAG_DEBUG("SC7 <= c%-3d Data %08x %s",
-				(unsigned) address_out,
-				(unsigned) data_out,
+			JTAG_DEBUG("SC7 <= c%-3" PRIu8 " Data %08" PRIx32 " %s",
+				address_out, data_out,
 				n_rw ? "write" : "read");
 
 			arm11_add_dr_scan_vc(arm11->arm.target->tap, ARRAY_SIZE(chain7_fields),
@@ -908,7 +903,7 @@ int arm11_sc7_run(struct arm11_common *arm11, struct arm11_sc7_action *actions,
 		}
 
 		if (!n_rw)
-			JTAG_DEBUG("SC7 => Data %08x", (unsigned) data_in);
+			JTAG_DEBUG("SC7 => Data %08" PRIx32, data_in);
 
 		if (i > 0) {
 			if (actions[i - 1].address != address_in)
diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c
index 749274f36..5c52ad899 100644
--- a/src/target/arm_disassembler.c
+++ b/src/target/arm_disassembler.c
@@ -266,18 +266,18 @@ static int evaluate_srs(uint32_t opcode,
 		case 0x08400000:
 			snprintf(instruction->text, 128, "0x%8.8" PRIx32
 				"\t0x%8.8" PRIx32
-				"\tSRS%s\tSP%s, #%d",
+				"\tSRS%s\tSP%s, #%" PRIu32,
 				address, opcode,
 				mode, wback,
-				(unsigned)(opcode & 0x1f));
+				opcode & 0x1f);
 			break;
 		case 0x08100000:
 			snprintf(instruction->text, 128, "0x%8.8" PRIx32
 				"\t0x%8.8" PRIx32
-				"\tRFE%s\tr%d%s",
+				"\tRFE%s\tr%" PRIu32 "%s",
 				address, opcode,
 				mode,
-				(unsigned)((opcode >> 16) & 0xf), wback);
+				(opcode >> 16) & 0xf, wback);
 			break;
 		default:
 			return evaluate_unknown(opcode, address, instruction);
@@ -842,7 +842,7 @@ static int evaluate_media(uint32_t opcode, uint32_t address,
 	/* halfword pack */
 	if ((opcode & 0x01f00020) == 0x00800000) {
 		char *type, *shift;
-		unsigned imm = (unsigned) (opcode >> 7) & 0x1f;
+		unsigned int imm = (opcode >> 7) & 0x1f;
 
 		if (opcode & (1 << 6)) {
 			type = "TB";
@@ -865,7 +865,7 @@ static int evaluate_media(uint32_t opcode, uint32_t address,
 	/* word saturate */
 	if ((opcode & 0x01a00020) == 0x00a00000) {
 		char *shift;
-		unsigned imm = (unsigned) (opcode >> 7) & 0x1f;
+		unsigned int imm = (opcode >> 7) & 0x1f;
 
 		if (opcode & (1 << 6)) {
 			shift = "ASR";
@@ -2046,8 +2046,7 @@ int arm_evaluate_opcode(uint32_t opcode, uint32_t address,
 			return evaluate_cdp_mcr_mrc(opcode, address, instruction);
 	}
 
-	LOG_ERROR("ARM: should never reach this point (opcode=%08x)",
-			(unsigned) opcode);
+	LOG_ERROR("ARM: should never reach this point (opcode=%08" PRIx32 ")", opcode);
 	return -1;
 }
 
diff --git a/src/target/arm_dpm.c b/src/target/arm_dpm.c
index 9f3a444af..94e91ad6c 100644
--- a/src/target/arm_dpm.c
+++ b/src/target/arm_dpm.c
@@ -198,8 +198,7 @@ static int dpm_read_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
 		buf_set_u32(r->value + 4, 0, 32, value_r1);
 		r->valid = true;
 		r->dirty = false;
-		LOG_DEBUG("READ: %s, %8.8x, %8.8x", r->name,
-				(unsigned) value_r0, (unsigned) value_r1);
+		LOG_DEBUG("READ: %s, %8.8" PRIx32 ", %8.8" PRIx32, r->name, value_r0, value_r1);
 	}
 
 	return retval;
@@ -266,7 +265,7 @@ int arm_dpm_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
 		buf_set_u32(r->value, 0, 32, value);
 		r->valid = true;
 		r->dirty = false;
-		LOG_DEBUG("READ: %s, %8.8x", r->name, (unsigned) value);
+		LOG_DEBUG("READ: %s, %8.8" PRIx32, r->name, value);
 	}
 
 	return retval;
@@ -302,8 +301,7 @@ static int dpm_write_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned regnum
 
 	if (retval == ERROR_OK) {
 		r->dirty = false;
-		LOG_DEBUG("WRITE: %s, %8.8x, %8.8x", r->name,
-				(unsigned) value_r0, (unsigned) value_r1);
+		LOG_DEBUG("WRITE: %s, %8.8" PRIx32 ", %8.8" PRIx32, r->name, value_r0, value_r1);
 	}
 
 	return retval;
@@ -351,7 +349,7 @@ static int dpm_write_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
 
 	if (retval == ERROR_OK) {
 		r->dirty = false;
-		LOG_DEBUG("WRITE: %s, %8.8x", r->name, (unsigned) value);
+		LOG_DEBUG("WRITE: %s, %8.8" PRIx32, r->name, value);
 	}
 
 	return retval;
diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index 1886d5e1f..ae89762e1 100644
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -482,7 +482,7 @@ void arm_set_cpsr(struct arm *arm, uint32_t cpsr)
 	}
 	arm->core_state = state;
 
-	LOG_DEBUG("set CPSR %#8.8x: %s mode, %s state", (unsigned) cpsr,
+	LOG_DEBUG("set CPSR %#8.8" PRIx32 ": %s mode, %s state", cpsr,
 		arm_mode_name(mode),
 		arm_state_strings[arm->core_state]);
 }
diff --git a/src/target/armv8.c b/src/target/armv8.c
index b54ef13d3..3e0ea0b75 100644
--- a/src/target/armv8.c
+++ b/src/target/armv8.c
@@ -961,7 +961,7 @@ void armv8_set_cpsr(struct arm *arm, uint32_t cpsr)
 	arm->core_state = state;
 	arm->core_mode = mode;
 
-	LOG_DEBUG("set CPSR %#8.8x: %s mode, %s state", (unsigned) cpsr,
+	LOG_DEBUG("set CPSR %#8.8" PRIx32 ": %s mode, %s state", cpsr,
 		armv8_mode_name(arm->core_mode),
 		armv8_state_strings[arm->core_state]);
 }
diff --git a/src/target/armv8_dpm.c b/src/target/armv8_dpm.c
index 271bd91c3..bcecedc9d 100644
--- a/src/target/armv8_dpm.c
+++ b/src/target/armv8_dpm.c
@@ -441,8 +441,7 @@ static int dpmv8_bpwp_enable(struct arm_dpm *dpm, unsigned index_t,
 	vr += 16 * index_t;
 	cr += 16 * index_t;
 
-	LOG_DEBUG("A8: bpwp enable, vr %08x cr %08x",
-		(unsigned) vr, (unsigned) cr);
+	LOG_DEBUG("A8: bpwp enable, vr %08" PRIx32 " cr %08" PRIx32, vr, cr);
 
 	retval = mem_ap_write_atomic_u32(armv8->debug_ap, vr, addr);
 	if (retval != ERROR_OK)
@@ -469,7 +468,7 @@ static int dpmv8_bpwp_disable(struct arm_dpm *dpm, unsigned index_t)
 	}
 	cr += 16 * index_t;
 
-	LOG_DEBUG("A: bpwp disable, cr %08x", (unsigned) cr);
+	LOG_DEBUG("A: bpwp disable, cr %08" PRIx32, cr);
 
 	/* clear control register */
 	return mem_ap_write_atomic_u32(armv8->debug_ap, cr, 0);
diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index 2de77c960..498a9cd16 100644
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -595,8 +595,7 @@ static int cortex_a_bpwp_enable(struct arm_dpm *dpm, unsigned index_t,
 	vr += 4 * index_t;
 	cr += 4 * index_t;
 
-	LOG_DEBUG("A: bpwp enable, vr %08x cr %08x",
-		(unsigned) vr, (unsigned) cr);
+	LOG_DEBUG("A: bpwp enable, vr %08" PRIx32 " cr %08" PRIx32, vr, cr);
 
 	retval = mem_ap_write_atomic_u32(a->armv7a_common.debug_ap,
 			vr, addr);
@@ -625,7 +624,7 @@ static int cortex_a_bpwp_disable(struct arm_dpm *dpm, unsigned index_t)
 	}
 	cr += 4 * index_t;
 
-	LOG_DEBUG("A: bpwp disable, cr %08x", (unsigned) cr);
+	LOG_DEBUG("A: bpwp disable, cr %08" PRIx32, cr);
 
 	/* clear control register */
 	return mem_ap_write_atomic_u32(a->armv7a_common.debug_ap, cr, 0);
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 3b95b648e..698a6868c 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -2081,11 +2081,9 @@ static int cortex_m_set_watchpoint(struct target *target, struct watchpoint *wat
 	target_write_u32(target, comparator->dwt_comparator_address + 8,
 		comparator->function);
 
-	LOG_TARGET_DEBUG(target, "Watchpoint (ID %d) DWT%d 0x%08x 0x%x 0x%05x",
+	LOG_TARGET_DEBUG(target, "Watchpoint (ID %d) DWT%d 0x%08" PRIx32 " 0x%" PRIx32 " 0x%05" PRIx32,
 		watchpoint->unique_id, dwt_num,
-		(unsigned) comparator->comp,
-		(unsigned) comparator->mask,
-		(unsigned) comparator->function);
+		comparator->comp, comparator->mask, comparator->function);
 	return ERROR_OK;
 }
 
@@ -2102,9 +2100,9 @@ static int cortex_m_unset_watchpoint(struct target *target, struct watchpoint *w
 
 	unsigned int dwt_num = watchpoint->number;
 
-	LOG_TARGET_DEBUG(target, "Watchpoint (ID %d) DWT%u address: 0x%08x clear",
+	LOG_TARGET_DEBUG(target, "Watchpoint (ID %d) DWT%u address: " TARGET_ADDR_FMT " clear",
 		watchpoint->unique_id, dwt_num,
-		(unsigned) watchpoint->address);
+		watchpoint->address);
 
 	if (dwt_num >= cortex_m->dwt_num_comp) {
 		LOG_TARGET_DEBUG(target, "Invalid DWT Comparator number in watchpoint");
diff --git a/src/target/dsp563xx.c b/src/target/dsp563xx.c
index 80cca1ed5..687821c5d 100644
--- a/src/target/dsp563xx.c
+++ b/src/target/dsp563xx.c
@@ -1135,7 +1135,7 @@ static int dsp563xx_resume(struct target *target,
 		current = 0;
 	}
 
-	LOG_DEBUG("%s %08X %08X", __func__, current, (unsigned) address);
+	LOG_DEBUG("%s %08X %08" TARGET_PRIXADDR, __func__, current, address);
 
 	err = dsp563xx_restore_context(target);
 	if (err != ERROR_OK)
@@ -1199,7 +1199,7 @@ static int dsp563xx_step_ex(struct target *target,
 		current = 0;
 	}
 
-	LOG_DEBUG("%s %08X %08X", __func__, current, (unsigned) address);
+	LOG_DEBUG("%s %08X %08" PRIX32, __func__, current, address);
 
 	err = dsp563xx_jtag_debug_request(target);
 	if (err != ERROR_OK)
@@ -1260,15 +1260,15 @@ static int dsp563xx_step_ex(struct target *target,
 			err = dsp563xx_once_reg_read(target->tap, 1, DSP563XX_ONCE_OPABFR, &dr_in);
 			if (err != ERROR_OK)
 				return err;
-			LOG_DEBUG("fetch: %08X", (unsigned) dr_in&0x00ffffff);
+			LOG_DEBUG("fetch: %08" PRIX32, dr_in & 0x00ffffff);
 			err = dsp563xx_once_reg_read(target->tap, 1, DSP563XX_ONCE_OPABDR, &dr_in);
 			if (err != ERROR_OK)
 				return err;
-			LOG_DEBUG("decode: %08X", (unsigned) dr_in&0x00ffffff);
+			LOG_DEBUG("decode: %08" PRIX32, dr_in & 0x00ffffff);
 			err = dsp563xx_once_reg_read(target->tap, 1, DSP563XX_ONCE_OPABEX, &dr_in);
 			if (err != ERROR_OK)
 				return err;
-			LOG_DEBUG("execute: %08X", (unsigned) dr_in&0x00ffffff);
+			LOG_DEBUG("execute: %08" PRIX32, dr_in & 0x00ffffff);
 
 			/* reset trace mode */
 			err = dsp563xx_once_reg_write(target->tap, 1, DSP563XX_ONCE_OSCR, 0x000000);
diff --git a/src/target/etm.c b/src/target/etm.c
index d083017f7..d8f2a2faa 100644
--- a/src/target/etm.c
+++ b/src/target/etm.c
@@ -320,9 +320,8 @@ struct reg_cache *etm_build_reg_cache(struct target *target,
 		etm_reg_add(0x20, jtag_info, reg_cache, arch_info,
 			etm_core + 1, 1);
 		etm_get_reg(reg_list + 1);
-		etm_ctx->id = buf_get_u32(
-				arch_info[1].value, 0, 32);
-		LOG_DEBUG("ETM ID: %08x", (unsigned) etm_ctx->id);
+		etm_ctx->id = buf_get_u32(arch_info[1].value, 0, 32);
+		LOG_DEBUG("ETM ID: %08" PRIx32, etm_ctx->id);
 		bcd_vers = 0x10 + (((etm_ctx->id) >> 4) & 0xff);
 
 	} else {
@@ -1495,7 +1494,7 @@ COMMAND_HANDLER(handle_etm_info_command)
 	etm_get_reg(etm_sys_config_reg);
 	config = buf_get_u32(etm_sys_config_reg->value, 0, 32);
 
-	LOG_DEBUG("ETM SYS CONFIG %08x", (unsigned) config);
+	LOG_DEBUG("ETM SYS CONFIG %08" PRIx32, config);
 
 	max_port_size = config & 0x7;
 	if (etm->bcd_vers >= 0x30)
diff --git a/src/target/target.c b/src/target/target.c
index 9d1d2f550..c3a4ed6d2 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -3851,11 +3851,11 @@ static COMMAND_HELPER(handle_verify_image_command_internal, enum verify_mode ver
 					for (t = 0; t < buf_cnt; t++) {
 						if (data[t] != buffer[t]) {
 							command_print(CMD,
-										  "diff %d address 0x%08x. Was 0x%02x instead of 0x%02x",
-										  diffs,
-										  (unsigned)(t + image.sections[i].base_address),
-										  data[t],
-										  buffer[t]);
+								"diff %d address " TARGET_ADDR_FMT ". Was 0x%02" PRIx8 " instead of 0x%02" PRIx8,
+								diffs,
+								t + image.sections[i].base_address,
+								data[t],
+								buffer[t]);
 							if (diffs++ >= 127) {
 								command_print(CMD, "More than 128 errors, the rest are not printed.");
 								free(data);
diff --git a/src/target/x86_32_common.c b/src/target/x86_32_common.c
index ecaf52b3a..666bb07bf 100644
--- a/src/target/x86_32_common.c
+++ b/src/target/x86_32_common.c
@@ -1360,8 +1360,8 @@ static void handle_iod_output(struct command_invocation *cmd,
 		if (i % line_modulo == 0) {
 			output_len += snprintf(output + output_len,
 					sizeof(output) - output_len,
-					"0x%8.8x: ",
-					(unsigned)(address + (i*size)));
+					"0x%8.8" PRIx32 ": ",
+					address + (i * size));
 		}
 
 		uint32_t value = 0;

-----------------------------------------------------------------------

Summary of changes:
 src/flash/nand/at91sam9.c     |  5 ++---
 src/flash/nand/lpc3180.c      |  3 +--
 src/flash/nand/lpc32xx.c      |  3 +--
 src/flash/nor/at91sam3.c      | 10 +++++-----
 src/flash/nor/at91sam4.c      | 10 +++++-----
 src/flash/nor/cfi.c           |  3 +--
 src/flash/nor/max32xxx.c      |  4 ++--
 src/flash/nor/stellaris.c     |  4 ++--
 src/flash/nor/tms470.c        |  4 ++--
 src/jtag/core.c               |  5 ++---
 src/jtag/tcl.c                |  9 +++------
 src/target/arm11.c            | 15 ++++++---------
 src/target/arm11_dbgtap.c     | 25 ++++++++++---------------
 src/target/arm_disassembler.c | 15 +++++++--------
 src/target/arm_dpm.c          | 10 ++++------
 src/target/armv4_5.c          |  2 +-
 src/target/armv8.c            |  2 +-
 src/target/armv8_dpm.c        |  5 ++---
 src/target/cortex_a.c         |  5 ++---
 src/target/cortex_m.c         | 10 ++++------
 src/target/dsp563xx.c         | 10 +++++-----
 src/target/etm.c              |  7 +++----
 src/target/target.c           | 12 ++++++------
 src/target/target.h           |  2 +-
 src/target/x86_32_common.c    |  4 ++--
 25 files changed, 80 insertions(+), 104 deletions(-)


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- Log -----------------------------------------------------------------
commit 8750beeb44fb532612ea70dfdd1e794320810a0c
Author: Antonio Borneo <bor...@gm...>
Date:   Sat Sep 21 11:11:36 2024 +0200

    tcl: update to new syntax of telnet command
    
    Commit ad216136180e ("server/telnet: Restructure commands")
    modifies the syntax.
    
            sed -i 's/telnet_port/telnet port/'
    
    Change-Id: If1ad34a1ec54824dbc124acd36a894862276a34f
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8502
    Reviewed-by: zapb <de...@za...>
    Tested-by: jenkins

diff --git a/tcl/interface/vdebug.cfg b/tcl/interface/vdebug.cfg
index 9097c33da..63a595506 100644
--- a/tcl/interface/vdebug.cfg
+++ b/tcl/interface/vdebug.cfg
@@ -23,7 +23,7 @@ vdebug server $_VDEBUGHOST:$_VDEBUGPORT
 # example config listen on all interfaces, disable tcl/telnet server
 bindto 0.0.0.0
 #gdb port 3333
-#telnet_port disabled
+#telnet port disabled
 tcl port disabled
 
 # transaction batching: 0 - no batching, 1 - (default) wr, 2 - rw
diff --git a/tcl/target/u8500.cfg b/tcl/target/u8500.cfg
index b87d2613a..1fdc11fe3 100644
--- a/tcl/target/u8500.cfg
+++ b/tcl/target/u8500.cfg
@@ -143,7 +143,7 @@ proc enable_apetap {} {
 	}
 
 tcl port 5555
-telnet_port 4444
+telnet port 4444
 gdb port 3333
 
 if { [info exists CHIPNAME] } {

-----------------------------------------------------------------------

Summary of changes:
 tcl/interface/vdebug.cfg | 2 +-
 tcl/target/u8500.cfg     | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)


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The branch, master has been updated
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- Log -----------------------------------------------------------------
commit 00ee9b09d9112a09e9780ace560bd8b353661658
Author: Walter Ji <wal...@os...>
Date:   Thu Feb 22 17:06:53 2024 +0800

    target/mips32: add dsp access support for gdb
    
    Change order of dsp register name array and removed hi0 and lo0
    to comply with gdb definition of dsp in mips-dsp.xml, the regs
    name array is now mapping corresponding dsp accumulator names
    onto `mips32_regs` and `core_regs` instead of mapping to instr
    arrays in dsp functions.
    feature now requires a place to store cached dsp registers.
    Add dsp registers to reg_list for gdb to access them.
    Add dsp module enable detection to avoid DSP Disabled exception
    while reading dsp accumulators.
    Add dsp register reading procedure in `mips32_pracc_read_regs`
    and writing procedure in `mips32_pracc_write_regs`.
    
    Change-Id: Iacc335da030ab85989922c81aac7925b3dc17459
    Signed-off-by: Walter Ji <wal...@os...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8476
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Reviewed-by: Oleksij Rempel <li...@re...>

diff --git a/src/target/mips32.c b/src/target/mips32.c
index 81faab72d..af52ffca0 100644
--- a/src/target/mips32.c
+++ b/src/target/mips32.c
@@ -31,7 +31,7 @@ static const char *mips_isa_strings[] = {
 
 /*
  * GDB registers
- * based on gdb-7.6.2/gdb/features/mips-{fpu,cp0,cpu}.xml
+ * based on gdb-7.6.2/gdb/features/mips-{fpu,cp0,cpu,dsp}.xml
  */
 static const struct {
 	unsigned id;
@@ -156,6 +156,22 @@ static const struct {
 		"org.gnu.gdb.mips.cpu", 0 },
 	{ MIPS32_REGLIST_C0_GUESTCTL1_INDEX, "guestCtl1", REG_TYPE_INT, NULL,
 		"org.gnu.gdb.mips.cp0", 0 },
+
+	{ MIPS32_REGLIST_DSP_INDEX + 0, "hi1", REG_TYPE_INT, NULL,
+		"org.gnu.gdb.mips.dsp", 0 },
+	{ MIPS32_REGLIST_DSP_INDEX + 1, "lo1", REG_TYPE_INT, NULL,
+		"org.gnu.gdb.mips.dsp", 0 },
+	{ MIPS32_REGLIST_DSP_INDEX + 2, "hi2", REG_TYPE_INT, NULL,
+		"org.gnu.gdb.mips.dsp", 0 },
+	{ MIPS32_REGLIST_DSP_INDEX + 3, "lo2", REG_TYPE_INT, NULL,
+		"org.gnu.gdb.mips.dsp", 0 },
+	{ MIPS32_REGLIST_DSP_INDEX + 4, "hi3", REG_TYPE_INT, NULL,
+		"org.gnu.gdb.mips.dsp", 0 },
+	{ MIPS32_REGLIST_DSP_INDEX + 5, "lo3", REG_TYPE_INT, NULL,
+		"org.gnu.gdb.mips.dsp", 0 },
+
+	{ MIPS32_REGLIST_DSP_DSPCTL_INDEX, "dspctl", REG_TYPE_INT, NULL,
+		"org.gnu.gdb.mips.dsp", 0 },
 };
 
 #define MIPS32_NUM_REGS ARRAY_SIZE(mips32_regs)
@@ -211,13 +227,11 @@ static const struct {
 static const struct {
 	const char *name;
 } mips32_dsp_regs[MIPS32NUMDSPREGS] = {
-	{ "hi0"},
 	{ "hi1"},
-	{ "hi2"},
-	{ "hi3"},
-	{ "lo0"},
 	{ "lo1"},
+	{ "hi2"},
 	{ "lo2"},
+	{ "hi3"},
 	{ "lo3"},
 	{ "control"},
 };
@@ -328,7 +342,12 @@ static int mips32_read_core_reg(struct target *target, unsigned int num)
 	if (num >= MIPS32_NUM_REGS)
 		return ERROR_COMMAND_SYNTAX_ERROR;
 
-	if (num >= MIPS32_REGLIST_C0_INDEX) {
+	if (num >= MIPS32_REGLIST_DSP_INDEX) {
+		/* DSP */
+		cnum = num - MIPS32_REGLIST_DSP_INDEX;
+		reg_value = mips32->core_regs.dsp[cnum];
+		buf_set_u32(mips32->core_cache->reg_list[num].value, 0, 32, reg_value);
+	} else if (num >= MIPS32_REGLIST_C0_INDEX) {
 		/* CP0 */
 		cnum = num - MIPS32_REGLIST_C0_INDEX;
 		reg_value = mips32->core_regs.cp0[cnum];
@@ -371,7 +390,12 @@ static int mips32_write_core_reg(struct target *target, unsigned int num)
 	if (num >= MIPS32_NUM_REGS)
 		return ERROR_COMMAND_SYNTAX_ERROR;
 
-	if (num >= MIPS32_REGLIST_C0_INDEX) {
+	if (num >= MIPS32_REGLIST_DSP_INDEX) {
+		/* DSP */
+		cnum = num - MIPS32_REGLIST_DSP_INDEX;
+		reg_value = buf_get_u32(mips32->core_cache->reg_list[num].value, 0, 32);
+		mips32->core_regs.dsp[cnum] = (uint32_t)reg_value;
+	} else if (num >= MIPS32_REGLIST_C0_INDEX) {
 		/* CP0 */
 		cnum = num - MIPS32_REGLIST_C0_INDEX;
 		reg_value = buf_get_u32(mips32->core_cache->reg_list[num].value, 0, 32);
@@ -1026,10 +1050,20 @@ int mips32_cpu_probe(struct target *target)
 /* reads dsp implementation info from CP0 Config3 register {DSPP, DSPREV}*/
 static void mips32_read_config_dsp(struct mips32_common *mips32, struct mips_ejtag *ejtag_info)
 {
-	uint32_t dsp_present = ((ejtag_info->config[3] & MIPS32_CONFIG3_DSPP_MASK) >> MIPS32_CONFIG3_DSPP_SHIFT);
+	uint32_t retval, status_value, dsp_present;
+	bool dsp_enabled;
+
+	retval = mips32_cp0_read(ejtag_info, &status_value, MIPS32_C0_STATUS, 0);
+	if (retval != ERROR_OK) {
+		LOG_ERROR("Failed to read cp0 status register");
+		return;
+	}
+
+	dsp_present = ((ejtag_info->config[3] & MIPS32_CONFIG3_DSPP_MASK) >> MIPS32_CONFIG3_DSPP_SHIFT);
+	dsp_enabled = (status_value & BIT(MIPS32_CP0_STATUS_MX_SHIFT)) != 0;
 	if (dsp_present) {
 		mips32->dsp_imp = ((ejtag_info->config[3] & MIPS32_CONFIG3_DSPREV_MASK) >> MIPS32_CONFIG3_DSPREV_SHIFT) + 1;
-		LOG_USER("DSP implemented: %s, rev %d", "yes", mips32->dsp_imp);
+		LOG_USER("DSP implemented: rev %d, %s", mips32->dsp_imp, dsp_enabled ? "enabled" : "disabled");
 	} else {
 		LOG_USER("DSP implemented: %s", "no");
 	}
@@ -1747,13 +1781,11 @@ static int mips32_pracc_read_dsp_reg(struct mips_ejtag *ejtag_info, uint32_t *va
 	};
 
 	uint32_t dsp_read_code[] = {
-		MIPS32_MFHI(isa, t0),		/* mfhi t0 ($ac0) - OPCODE - 0x00004010 */
 		MIPS32_DSP_MFHI(t0, 1),		/* mfhi	t0,$ac1 - OPCODE - 0x00204010 */
-		MIPS32_DSP_MFHI(t0, 2),		/* mfhi	t0,$ac2 - OPCODE - 0x00404010 */
-		MIPS32_DSP_MFHI(t0, 3),		/* mfhi	t0,$ac3 - OPCODE - 0x00604010*/
-		MIPS32_MFLO(isa, t0),		/* mflo t0 ($ac0) - OPCODE - 0x00004012 */
 		MIPS32_DSP_MFLO(t0, 1),		/* mflo	t0,$ac1 - OPCODE - 0x00204012 */
+		MIPS32_DSP_MFHI(t0, 2),		/* mfhi	t0,$ac2 - OPCODE - 0x00404010 */
 		MIPS32_DSP_MFLO(t0, 2),		/* mflo	t0,$ac2 - OPCODE - 0x00404012 */
+		MIPS32_DSP_MFHI(t0, 3),		/* mfhi	t0,$ac3 - OPCODE - 0x00604010*/
 		MIPS32_DSP_MFLO(t0, 3),		/* mflo	t0,$ac3 - OPCODE - 0x00604012 */
 		MIPS32_DSP_RDDSP(t0, 0x3F),	/* rddsp t0, 0x3f (DSPCtl) - OPCODE - 0x7c3f44b8 */
 	};
@@ -1824,13 +1856,11 @@ static int mips32_pracc_write_dsp_reg(struct mips_ejtag *ejtag_info, uint32_t va
 	};
 
 	uint32_t dsp_write_code[] = {
-		MIPS32_MTHI(isa, t0),		/* mthi t0 ($ac0) - OPCODE - 0x01000011 */
 		MIPS32_DSP_MTHI(t0, 1),		/* mthi t0, $ac1 - OPCODE - 0x01000811 */
-		MIPS32_DSP_MTHI(t0, 2),		/* mthi t0, $ac2 - OPCODE - 0x01001011 */
-		MIPS32_DSP_MTHI(t0, 3),		/* mthi t0, $ac3 - OPCODE - 0x01001811 */
-		MIPS32_MTLO(isa, t0),		/* mtlo t0 ($ac0) - OPCODE - 0x01000013 */
 		MIPS32_DSP_MTLO(t0, 1),		/* mtlo t0, $ac1 - OPCODE - 0x01000813 */
+		MIPS32_DSP_MTHI(t0, 2),		/* mthi t0, $ac2 - OPCODE - 0x01001011 */
 		MIPS32_DSP_MTLO(t0, 2),		/* mtlo t0, $ac2 - OPCODE - 0x01001013 */
+		MIPS32_DSP_MTHI(t0, 3),		/* mthi t0, $ac3 - OPCODE - 0x01001811 */
 		MIPS32_DSP_MTLO(t0, 3),		/* mtlo t0, $ac3 - OPCODE - 0x01001813 */
 		MIPS32_DSP_WRDSP(t0, 0x1F), /* wrdsp t0, 0x1f (DSPCtl) - OPCODE - 0x7d00fcf8*/
 	};
@@ -2107,15 +2137,18 @@ static int mips32_dsp_find_register_by_name(const char *reg_name)
  *
  * @return ERROR_OK on success; error code on failure.
  */
-static int mips32_dsp_get_all_regs(struct command_invocation *cmd, struct mips_ejtag *ejtag_info)
+static int mips32_dsp_get_all_regs(struct command_invocation *cmd, struct mips32_common *mips32)
 {
 	uint32_t value = 0;
+	struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 	for (int i = 0; i < MIPS32NUMDSPREGS; i++) {
 		int retval = mips32_pracc_read_dsp_reg(ejtag_info, &value, i);
 		if (retval != ERROR_OK) {
 			command_print(CMD, "couldn't access reg %s", mips32_dsp_regs[i].name);
 			return retval;
 		}
+		mips32->core_regs.dsp[i] = value;
+		mips32->core_cache->reg_list[MIPS32_REGLIST_DSP_INDEX + i].dirty = 1;
 		command_print(CMD, "%*s: 0x%8.8x", 7, mips32_dsp_regs[i].name, value);
 	}
 	return ERROR_OK;
@@ -2132,20 +2165,28 @@ static int mips32_dsp_get_all_regs(struct command_invocation *cmd, struct mips_e
  *
  * @return ERROR_OK on success; error code on failure.
  */
-static int mips32_dsp_get_register(struct command_invocation *cmd, struct mips_ejtag *ejtag_info)
+static int mips32_dsp_get_register(struct command_invocation *cmd, struct mips32_common *mips32)
 {
 	uint32_t value = 0;
 	int index = mips32_dsp_find_register_by_name(CMD_ARGV[0]);
+	struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 	if (index == MIPS32NUMDSPREGS) {
 		command_print(CMD, "ERROR: register '%s' not found", CMD_ARGV[0]);
 		return ERROR_COMMAND_SYNTAX_ERROR;
 	}
 
 	int retval = mips32_pracc_read_dsp_reg(ejtag_info, &value, index);
-	if (retval != ERROR_OK)
+	if (retval != ERROR_OK) {
 		command_print(CMD, "ERROR: Could not access dsp register %s", CMD_ARGV[0]);
-	else
-		command_print(CMD, "0x%8.8x", value);
+		return retval;
+	}
+
+	command_print(CMD, "0x%8.8x", value);
+
+	if (mips32->core_regs.dsp[index] != value) {
+		mips32->core_regs.dsp[index] = value;
+		mips32->core_cache->reg_list[MIPS32_REGLIST_DSP_INDEX + index].dirty = 1;
+	}
 
 	return retval;
 }
@@ -2162,9 +2203,10 @@ static int mips32_dsp_get_register(struct command_invocation *cmd, struct mips_e
  *
  * @return ERROR_OK on success; error code on failure.
  */
-static int mips32_dsp_set_register(struct command_invocation *cmd, struct mips_ejtag *ejtag_info)
+static int mips32_dsp_set_register(struct command_invocation *cmd, struct mips32_common *mips32)
 {
 	uint32_t value;
+	struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 	int index = mips32_dsp_find_register_by_name(CMD_ARGV[0]);
 	if (index == MIPS32NUMDSPREGS) {
 		command_print(CMD, "ERROR: register '%s' not found", CMD_ARGV[0]);
@@ -2174,8 +2216,13 @@ static int mips32_dsp_set_register(struct command_invocation *cmd, struct mips_e
 	COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value);
 
 	int retval = mips32_pracc_write_dsp_reg(ejtag_info, value, index);
-	if (retval != ERROR_OK)
+	if (retval != ERROR_OK) {
 		command_print(CMD, "Error: could not write to dsp register %s", CMD_ARGV[0]);
+		return retval;
+	}
+
+	mips32->core_regs.dsp[index] = value;
+	mips32->core_cache->reg_list[MIPS32_REGLIST_DSP_INDEX + index].dirty = 1;
 
 	return retval;
 }
@@ -2193,7 +2240,6 @@ COMMAND_HANDLER(mips32_handle_dsp_command)
 	int retval, tmp;
 	struct target *target = get_current_target(CMD_CTX);
 	struct mips32_common *mips32 = target_to_mips32(target);
-	struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 
 	retval = mips32_verify_pointer(CMD, mips32);
 	if (retval != ERROR_OK)
@@ -2217,10 +2263,10 @@ COMMAND_HANDLER(mips32_handle_dsp_command)
 
 	switch (CMD_ARGC) {
 		case 0:
-			retval = mips32_dsp_get_all_regs(CMD, ejtag_info);
+			retval = mips32_dsp_get_all_regs(CMD, mips32);
 			break;
 		case 1:
-			retval = mips32_dsp_get_register(CMD, ejtag_info);
+			retval = mips32_dsp_get_register(CMD, mips32);
 			break;
 		case 2:
 			tmp = *CMD_ARGV[0];
@@ -2228,7 +2274,7 @@ COMMAND_HANDLER(mips32_handle_dsp_command)
 				command_print(CMD, "Error: invalid dsp command format");
 				retval = ERROR_COMMAND_ARGUMENT_INVALID;
 			} else {
-				retval = mips32_dsp_set_register(CMD, ejtag_info);
+				retval = mips32_dsp_set_register(CMD, mips32);
 			}
 			break;
 		default:
diff --git a/src/target/mips32.h b/src/target/mips32.h
index a557f3117..3d919e7dd 100644
--- a/src/target/mips32.h
+++ b/src/target/mips32.h
@@ -69,7 +69,7 @@
 
 #define MIPS32_SCAN_DELAY_LEGACY_MODE 2000000
 
-#define MIPS32NUMDSPREGS		9
+#define MIPS32NUMDSPREGS		7
 
 /* Bit Mask indicating CP0 register supported by this core */
 #define	MIPS_CP0_MK4		0x0001
@@ -78,6 +78,7 @@
 #define MIPS_CP0_IAPTIV		0x0008
 
 /* CP0 Status register fields */
+#define MIPS32_CP0_STATUS_MX_SHIFT	24
 #define MIPS32_CP0_STATUS_FR_SHIFT	26
 #define MIPS32_CP0_STATUS_CU1_SHIFT	29
 
@@ -211,6 +212,7 @@ static const struct mips32_cp0 {
 enum {
 	MIPS32_PC = 37,
 	MIPS32_FIR = 71,
+	MIPS32_DSPCTL = 78,
 	MIPS32NUMCOREREGS
 };
 
@@ -220,11 +222,13 @@ enum {
 #define MIPS32_REG_FP_COUNT			32
 #define MIPS32_REG_FPC_COUNT			2
 #define MIPS32_REG_C0_COUNT			5
+#define MIPS32_REG_DSP_COUNT		7
 
 #define MIPS32_REGLIST_GP_INDEX			0
 #define MIPS32_REGLIST_FP_INDEX			(MIPS32_REGLIST_GP_INDEX + MIPS32_REG_GP_COUNT)
 #define MIPS32_REGLIST_FPC_INDEX		(MIPS32_REGLIST_FP_INDEX + MIPS32_REG_FP_COUNT)
 #define MIPS32_REGLIST_C0_INDEX			(MIPS32_REGLIST_FPC_INDEX + MIPS32_REG_FPC_COUNT)
+#define MIPS32_REGLIST_DSP_INDEX		(MIPS32_REGLIST_C0_INDEX + MIPS32_REG_C0_COUNT)
 
 #define MIPS32_REGLIST_C0_STATUS_INDEX		(MIPS32_REGLIST_C0_INDEX + 0)
 #define MIPS32_REGLIST_C0_BADVADDR_INDEX	(MIPS32_REGLIST_C0_INDEX + 1)
@@ -238,6 +242,10 @@ enum {
 #define MIPS32_REG_C0_PC_INDEX			3
 #define MIPS32_REG_C0_GUESTCTL1_INDEX		4
 
+#define MIPS32_REGLIST_DSP_DSPCTL_INDEX		(MIPS32_REGLIST_DSP_INDEX + 6)
+
+#define MIPS32_REG_DSP_DSPCTL_INDEX		6
+
 enum mips32_isa_mode {
 	MIPS32_ISA_MIPS32 = 0,
 	MIPS32_ISA_MIPS16E = 1,
@@ -377,6 +385,7 @@ struct mips32_core_regs {
 	uint64_t fpr[MIPS32_REG_FP_COUNT];
 	uint32_t fpcr[MIPS32_REG_FPC_COUNT];
 	uint32_t cp0[MIPS32_REG_C0_COUNT];
+	uint32_t dsp[MIPS32_REG_DSP_COUNT];
 };
 
 struct mips32_common {
diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c
index aaf3875fb..018d8424e 100644
--- a/src/target/mips32_pracc.c
+++ b/src/target/mips32_pracc.c
@@ -878,6 +878,7 @@ int mips32_pracc_write_regs(struct mips32_common *mips32)
 	uint32_t *c0rs = mips32->core_regs.cp0;
 	bool fpu_in_64bit = ((c0rs[0] & BIT(MIPS32_CP0_STATUS_FR_SHIFT)) != 0);
 	bool fp_enabled = ((c0rs[0] & BIT(MIPS32_CP0_STATUS_CU1_SHIFT)) != 0);
+	bool dsp_enabled = ((c0rs[0] & BIT(MIPS32_CP0_STATUS_MX_SHIFT)) != 0);
 	uint32_t rel = (ejtag_info->config[0] & MIPS32_CONFIG0_AR_MASK) >> MIPS32_CONFIG0_AR_SHIFT;
 
 	pracc_queue_init(&ctx);
@@ -943,6 +944,34 @@ int mips32_pracc_write_regs(struct mips32_common *mips32)
 			pracc_add(&ctx, 0, MIPS32_EHB(ctx.isa));
 	}
 
+	/* Store DSP Accumulators */
+	if (mips32->dsp_imp && dsp_enabled) {
+		/* Struct of mips32_dsp_regs: {ac{hi, lo}1-3, dspctl} */
+		uint32_t *dspr = mips32->core_regs.dsp;
+		size_t dsp_regs = ARRAY_SIZE(mips32->core_regs.dsp);
+
+		/* Starts from ac1, core_regs.dsp contains dspctl register, therefore - 1 */
+		for (size_t index = 0; index != ((dsp_regs - 1) / 2); index++) {
+			/* Every accumulator have 2 registers, hi and lo, and core_regs.dsp stores ac[1~3] */
+			/* reads hi[ac] from core_regs array */
+			pracc_add_li32(&ctx, 2, dspr[index * 2], 0);
+			/* reads lo[ac] from core_regs array */
+			pracc_add_li32(&ctx, 3, dspr[(index * 2) + 1], 0);
+
+			/* Write to accumulator 1~3 and index starts from 0, therefore ac = index + 1 */
+			size_t ac = index + 1;
+			pracc_add(&ctx, 0, MIPS32_DSP_MTHI(2, ac));
+			pracc_add(&ctx, 0, MIPS32_DSP_MTLO(3, ac));
+		}
+
+		/* DSPCTL is the last element of register store */
+		pracc_add_li32(&ctx, 2, dspr[6], 0);
+		pracc_add(&ctx, 0, MIPS32_DSP_WRDSP(2, 0x1F));
+
+		if (rel > MIPS32_RELEASE_1)
+			pracc_add(&ctx, 0, MIPS32_EHB(ctx.isa));
+	}
+
 	/* load registers 2 to 31 with li32, optimize */
 	for (int i = 2; i < 32; i++)
 		pracc_add_li32(&ctx, i, gprs[i], 1);
@@ -1064,14 +1093,16 @@ int mips32_pracc_read_regs(struct mips32_common *mips32)
 	unsigned int offset_cp0 = ((uint8_t *)&core_regs->cp0[0]) - (uint8_t *)core_regs;
 	unsigned int offset_fpr = ((uint8_t *)&core_regs->fpr[0]) - (uint8_t *)core_regs;
 	unsigned int offset_fpcr = ((uint8_t *)&core_regs->fpcr[0]) - (uint8_t *)core_regs;
-	bool fp_enabled;
+	unsigned int offset_dsp = ((uint8_t *)&core_regs->dsp[0]) - (uint8_t *)core_regs;
+	bool fp_enabled, dsp_enabled;
 
 	/*
-	 * This procedure has to be in 2 distinctive steps, because we can
-	 * only know whether FP is enabled after reading CP0.
+	 * This procedure has to be in 3 distinctive steps, because we can
+	 * only know whether FP and DSP are enabled after reading CP0.
 	 *
-	 * Step 1: Read everything except CP1 stuff
+	 * Step 1: Read everything except CP1 and DSP stuff
 	 * Step 2: Read CP1 stuff if FP is implemented
+	 * Step 3: Read DSP registers if dsp is implemented
 	 */
 
 	pracc_queue_init(&ctx);
@@ -1149,6 +1180,50 @@ int mips32_pracc_read_regs(struct mips32_common *mips32)
 
 		pracc_queue_free(&ctx);
 	}
+
+	dsp_enabled = (mips32->core_regs.cp0[MIPS32_REG_C0_STATUS_INDEX] & BIT(MIPS32_CP0_STATUS_MX_SHIFT)) != 0;
+	if (mips32->dsp_imp && dsp_enabled) {
+		pracc_queue_init(&ctx);
+
+		mips32_pracc_store_regs_set_base_addr(&ctx);
+
+		/* Struct of mips32_dsp_regs[7]: {ac{hi, lo}1-3, dspctl} */
+		size_t dsp_regs = ARRAY_SIZE(mips32->core_regs.dsp);
+		/* Starts from ac1, core_regs.dsp have dspctl register, therefore - 1 */
+		for (size_t index = 0; index != ((dsp_regs - 1) / 2); index++) {
+			/* Every accumulator have 2 registers, hi&lo, and core_regs.dsp stores ac[1~3] */
+			/* Reads offset of hi[ac] from core_regs array */
+			size_t offset_hi = offset_dsp + ((index * 2) * sizeof(uint32_t));
+			/* Reads offset of lo[ac] from core_regs array */
+			size_t offset_lo = offset_dsp + (((index * 2) + 1) * sizeof(uint32_t));
+
+			/* DSP Ac registers starts from 1 and index starts from 0, therefore ac = index + 1 */
+			size_t ac = index + 1;
+			pracc_add(&ctx, 0, MIPS32_DSP_MFHI(8, ac));
+			pracc_add(&ctx, MIPS32_PRACC_PARAM_OUT + offset_hi,
+					MIPS32_SW(ctx.isa, 8, PRACC_OUT_OFFSET + offset_hi, 1));
+			pracc_add(&ctx, 0, MIPS32_DSP_MFLO(8, ac));
+			pracc_add(&ctx, MIPS32_PRACC_PARAM_OUT + offset_lo,
+					MIPS32_SW(ctx.isa, 8, PRACC_OUT_OFFSET + offset_lo, 1));
+		}
+
+		/* DSPCTL is the last element of register store */
+		pracc_add(&ctx, 0, MIPS32_DSP_RDDSP(8, 0x3F));
+		pracc_add(&ctx, MIPS32_PRACC_PARAM_OUT + offset_dsp + ((dsp_regs - 1) * sizeof(uint32_t)),
+				  MIPS32_SW(ctx.isa, 8,
+							PRACC_OUT_OFFSET + offset_dsp + ((dsp_regs - 1) * sizeof(uint32_t)), 1));
+
+		mips32_pracc_store_regs_restore(&ctx);
+
+		/* jump to start */
+		pracc_add(&ctx, 0, MIPS32_B(ctx.isa, NEG16((ctx.code_count + 1) << ctx.isa)));
+		/* load $15 in DeSave */
+		pracc_add(&ctx, 0, MIPS32_MTC0(ctx.isa, 15, 31, 0));
+
+		ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, (uint32_t *)&mips32->core_regs, 1);
+
+		pracc_queue_free(&ctx);
+	}
 	return ctx.retval;
 }
 

-----------------------------------------------------------------------

Summary of changes:
 src/target/mips32.c       | 102 +++++++++++++++++++++++++++++++++-------------
 src/target/mips32.h       |  11 ++++-
 src/target/mips32_pracc.c |  83 +++++++++++++++++++++++++++++++++++--
 3 files changed, 163 insertions(+), 33 deletions(-)


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- Log -----------------------------------------------------------------
commit ab3156213108138f9130defdfde7276d1e4e6afb
Author: Antonio Borneo <bor...@gm...>
Date:   Sat Sep 21 10:07:52 2024 +0200

    jep106: update to revision JEP106BK Sep 2024
    
    Change-Id: Ica84e22b8d2da152cec39fc569c8333677c19490
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8501
    Tested-by: jenkins

diff --git a/src/helper/jep106.inc b/src/helper/jep106.inc
index b74cda85f..53d0355c1 100644
--- a/src/helper/jep106.inc
+++ b/src/helper/jep106.inc
@@ -8,7 +8,7 @@
  * identification code list, please visit the JEDEC website at www.jedec.org .
  */
 
-/* This file is aligned to revision JEP106BJ.01 July 2024. */
+/* This file is aligned to revision JEP106BK September 2024. */
 
 [0][0x01 - 1] = "AMD",
 [0][0x02 - 1] = "AMI",
@@ -177,7 +177,7 @@
 [1][0x27 - 1] = "Cabletron",
 [1][0x28 - 1] = "STEC (Silicon Tech)",
 [1][0x29 - 1] = "Vanguard",
-[1][0x2a - 1] = "Hagiwara Sys-Com",
+[1][0x2a - 1] = "Hagiwara Solutions Co Ltd",
 [1][0x2b - 1] = "Vantis",
 [1][0x2c - 1] = "Celestica",
 [1][0x2d - 1] = "Century",
@@ -1373,7 +1373,7 @@
 [10][0x65 - 1] = "Esperanto Technologies",
 [10][0x66 - 1] = "JinSheng Electronic (Shenzhen) Co Ltd",
 [10][0x67 - 1] = "Shenzhen Shi Bolunshuai Technology",
-[10][0x68 - 1] = "Shanghai Rui Zuan Information Tech",
+[10][0x68 - 1] = "Shanghai Rui Xuan Information Tech",
 [10][0x69 - 1] = "Fraunhofer IIS",
 [10][0x6a - 1] = "Kandou Bus SA",
 [10][0x6b - 1] = "Acer",
@@ -1653,9 +1653,9 @@
 [13][0x03 - 1] = "Shenzhen Feisrike Technology Co Ltd",
 [13][0x04 - 1] = "Shenzhen Sunhome Electronics Co Ltd",
 [13][0x05 - 1] = "Global Mixed-mode Technology Inc",
-[13][0x06 - 1] = "Shenzhen Weien Electronics Co. Ltd.",
+[13][0x06 - 1] = "Shenzhen Weien Electronics Co Ltd.",
 [13][0x07 - 1] = "Shenzhen Cooyes Technology Co Ltd",
-[13][0x08 - 1] = "Keymos Electronics Co., Limited",
+[13][0x08 - 1] = "ShenZhen ChaoYing ZhiNeng Technology",
 [13][0x09 - 1] = "E-Rockic Technology Company Limited",
 [13][0x0a - 1] = "Aerospace Science Memory Shenzhen",
 [13][0x0b - 1] = "Shenzhen Quanji Technology Co Ltd",
@@ -1898,7 +1898,7 @@
 [14][0x7a - 1] = "Cornelis Networks Inc",
 [14][0x7b - 1] = "WingSemi Technologies Co Ltd",
 [14][0x7c - 1] = "ForwardEdge ASIC",
-[14][0x7d - 1] = "Beijing Future Imprint Technology Co Ltd",
+[14][0x7d - 1] = "Beijing Future Signet Technology Co Ltd",
 [14][0x7e - 1] = "Fine Made Microelectronics Group Co Ltd",
 [15][0x01 - 1] = "Changxin Memory Technology (Shanghai)",
 [15][0x02 - 1] = "Synconv",
@@ -1919,7 +1919,7 @@
 [15][0x11 - 1] = "Guangzhou Beimu Technology Co., Ltd",
 [15][0x12 - 1] = "Rays Semiconductor Nanjing Co Ltd",
 [15][0x13 - 1] = "Milli-Centi Intelligence Technology Jiangsu",
-[15][0x14 - 1] = "Zilia Technologioes",
+[15][0x14 - 1] = "Zilia Technologies",
 [15][0x15 - 1] = "Incore Semiconductors",
 [15][0x16 - 1] = "Kinetic Technologies",
 [15][0x17 - 1] = "Nanjing Houmo Technology Co Ltd",
@@ -1963,4 +1963,57 @@
 [15][0x3d - 1] = "Shenzhen Titan Micro Electronics Co Ltd",
 [15][0x3e - 1] = "Shenzhen Macroflash Technology Co Ltd",
 [15][0x3f - 1] = "Advantech Group",
+[15][0x40 - 1] = "Shenzhen Xingjiachen Electronics Co Ltd",
+[15][0x41 - 1] = "CHUQI",
+[15][0x42 - 1] = "Dongguan Liesun Trading Co Ltd",
+[15][0x43 - 1] = "Shenzhen Miuman Technology Co Ltd",
+[15][0x44 - 1] = "Shenzhen Techwinsemi Technology Twsc",
+[15][0x45 - 1] = "Encharge AI Inc",
+[15][0x46 - 1] = "Shenzhen Zhenchuang Electronics Co Ltd",
+[15][0x47 - 1] = "Giant Chip Co. Ltd",
+[15][0x48 - 1] = "Shenzhen Runner Semiconductor Co Ltd",
+[15][0x49 - 1] = "Scalinx",
+[15][0x4a - 1] = "Shenzhen Lanqi Electronics Co Ltd",
+[15][0x4b - 1] = "CoreComm Technology Co Ltd",
+[15][0x4c - 1] = "DLI Memory",
+[15][0x4d - 1] = "Shenzhen Fidat Technology Co Ltd",
+[15][0x4e - 1] = "Hubei Yangtze Mason Semiconductor Tech",
+[15][0x4f - 1] = "Flastor",
+[15][0x50 - 1] = "PIRATEMAN",
+[15][0x51 - 1] = "Barrie Technologies Co Ltd",
+[15][0x52 - 1] = "Dynacard Co Ltd",
+[15][0x53 - 1] = "Rivian Automotive",
+[15][0x54 - 1] = "Shenzhen Fidat Technology Co Ltd",
+[15][0x55 - 1] = "Zhejang Weiming Semiconductor Co Ltd",
+[15][0x56 - 1] = "Shenzhen Xinhua Micro Technology Co Ltd",
+[15][0x57 - 1] = "Duvonn Electronic Technology Co Ltd",
+[15][0x58 - 1] = "Shenzhen Xinchang Technology Co Ltd",
+[15][0x59 - 1] = "Leidos",
+[15][0x5a - 1] = "Keepixo",
+[15][0x5b - 1] = "Applied Brain Research Inc",
+[15][0x5c - 1] = "Maxio Technology (Hangzhou) Co Ltd",
+[15][0x5d - 1] = "HK DCHIP Technology Limited",
+[15][0x5e - 1] = "Hitachi-LG Data Storage",
+[15][0x5f - 1] = "Shenzhen Huadian Communication Co Ltd",
+[15][0x60 - 1] = "Achieve Memory Technology (Suzhou) Co",
+[15][0x61 - 1] = "Shenzhen Think Future Semiconductor Co",
+[15][0x62 - 1] = "Innosilicon",
+[15][0x63 - 1] = "Shenzhen Weilida Technology Co Ltd",
+[15][0x64 - 1] = "Agrade Storage (Shenzhen) Co Ltd",
+[15][0x65 - 1] = "Shenzhen Worldshine Data Technology Co",
+[15][0x66 - 1] = "Mindgrove Technologies",
+[15][0x67 - 1] = "BYD Semiconductor Co Ltd",
+[15][0x68 - 1] = "Chipsine Semiconductor (Suzhou) Co Ltd",
+[15][0x69 - 1] = "Shen Zhen Shi Xun He Shi Ji Dian Zi You",
+[15][0x6a - 1] = "Shenzhen Jindacheng Computer Co Ltd",
+[15][0x6b - 1] = "Shenzhen Baina Haichuan Technology Co",
+[15][0x6c - 1] = "Shanghai Hengshi Electronic Technology",
+[15][0x6d - 1] = "Beijing Boyu Tuxian Technology Co Ltd",
+[15][0x6e - 1] = "China Chips Star Semiconductor Co Ltd",
+[15][0x6f - 1] = "Shenzhen Shenghuacan Technology Co",
+[15][0x70 - 1] = "Kinara Inc",
+[15][0x71 - 1] = "TRASNA Semiconductor",
+[15][0x72 - 1] = "KEYSOM",
+[15][0x73 - 1] = "Shenzhen YYF Info Tech Co Ltd",
+[15][0x74 - 1] = "Sharetronics Data Technology Co Ltd",
 /* EOF */

-----------------------------------------------------------------------

Summary of changes:
 src/helper/jep106.inc | 67 +++++++++++++++++++++++++++++++++++++++++++++------
 1 file changed, 60 insertions(+), 7 deletions(-)


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- Log -----------------------------------------------------------------
commit bd93b83f1b0625cc8c70aae46a1b0d13c41c53dc
Author: Parshintsev Anatoly <ana...@sy...>
Date:   Tue Sep 10 06:53:17 2024 +0300

    jtag: update constant names to follow code style guidelines
    
    Change-Id: Ib081433c67f3be0e5be0b39469680bcce079e0cc
    Signed-off-by: Parshintsev Anatoly <ana...@sy...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8485
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/jtag/drivers/cmsis_dap.c b/src/jtag/drivers/cmsis_dap.c
index a6dcfcd3d..4ba6b51be 100644
--- a/src/jtag/drivers/cmsis_dap.c
+++ b/src/jtag/drivers/cmsis_dap.c
@@ -563,7 +563,7 @@ static int cmsis_dap_cmd_dap_delay(uint16_t delay_us)
 static int cmsis_dap_metacmd_targetsel(uint32_t instance_id)
 {
 	uint8_t *command = cmsis_dap_handle->command;
-	const uint32_t SEQ_RD = 0x80, SEQ_WR = 0x00;
+	const uint32_t seq_rd = 0x80, seq_wr = 0x00;
 
 	/* SWD multi-drop requires a transfer ala CMD_DAP_TFER,
 	but with no expectation of an SWD ACK response.  In
@@ -579,14 +579,14 @@ static int cmsis_dap_metacmd_targetsel(uint32_t instance_id)
 	command[idx++] = 3;	/* sequence count */
 
 	/* sequence 0: packet request for TARGETSEL */
-	command[idx++] = SEQ_WR | 8;
+	command[idx++] = seq_wr | 8;
 	command[idx++] = SWD_CMD_START | swd_cmd(false, false, DP_TARGETSEL) | SWD_CMD_STOP | SWD_CMD_PARK;
 
 	/* sequence 1: read Trn ACK Trn, no expectation for target to ACK  */
-	command[idx++] = SEQ_RD | 5;
+	command[idx++] = seq_rd | 5;
 
 	/* sequence 2: WDATA plus parity */
-	command[idx++] = SEQ_WR | (32 + 1);
+	command[idx++] = seq_wr | (32 + 1);
 	h_u32_to_le(command + idx, instance_id);
 	idx += 4;
 	command[idx++] = parity_u32(instance_id);
diff --git a/src/jtag/drivers/jtag_vpi.c b/src/jtag/drivers/jtag_vpi.c
index a19060c2a..15b2679bb 100644
--- a/src/jtag/drivers/jtag_vpi.c
+++ b/src/jtag/drivers/jtag_vpi.c
@@ -461,14 +461,14 @@ static int jtag_vpi_stableclocks(unsigned int num_cycles)
 	unsigned int cycles_remain = num_cycles;
 	int nb_bits;
 	int retval;
-	const unsigned int CYCLES_ONE_BATCH = sizeof(tms_bits) * 8;
+	const unsigned int cycles_one_batch = sizeof(tms_bits) * 8;
 
 	/* use TMS=1 in TAP RESET state, TMS=0 in all other stable states */
 	memset(&tms_bits, (tap_get_state() == TAP_RESET) ? 0xff : 0x00, sizeof(tms_bits));
 
 	/* send the TMS bits */
 	while (cycles_remain > 0) {
-		nb_bits = (cycles_remain < CYCLES_ONE_BATCH) ? cycles_remain : CYCLES_ONE_BATCH;
+		nb_bits = (cycles_remain < cycles_one_batch) ? cycles_remain : cycles_one_batch;
 		retval = jtag_vpi_tms_seq(tms_bits, nb_bits);
 		if (retval != ERROR_OK)
 			return retval;
diff --git a/src/jtag/drivers/xds110.c b/src/jtag/drivers/xds110.c
index f25208774..6e12b9a79 100644
--- a/src/jtag/drivers/xds110.c
+++ b/src/jtag/drivers/xds110.c
@@ -1887,7 +1887,7 @@ static int xds110_speed(int speed)
 
 		} else {
 
-			const double XDS110_TCK_PULSE_INCREMENT = 66.0;
+			const double xds110_tck_pulse_increment = 66.0;
 			freq_to_use = speed * 1000; /* Hz */
 			delay_count = 0;
 
@@ -1908,7 +1908,7 @@ static int xds110_speed(int speed)
 			double current_value = max_freq_pulse_duration;
 
 			while (current_value < freq_to_pulse_width_in_ns) {
-				current_value += XDS110_TCK_PULSE_INCREMENT;
+				current_value += xds110_tck_pulse_increment;
 				++delay_count;
 			}
 
@@ -1919,9 +1919,9 @@ static int xds110_speed(int speed)
 			if (delay_count) {
 				double diff_freq_1 = freq_to_use -
 					(one_giga / (max_freq_pulse_duration +
-					(XDS110_TCK_PULSE_INCREMENT * delay_count)));
+					(xds110_tck_pulse_increment * delay_count)));
 				double diff_freq_2 = (one_giga / (max_freq_pulse_duration +
-					(XDS110_TCK_PULSE_INCREMENT * (delay_count - 1)))) -
+					(xds110_tck_pulse_increment * (delay_count - 1)))) -
 					freq_to_use;
 
 				/* One less count value yields a better match */

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/cmsis_dap.c | 8 ++++----
 src/jtag/drivers/jtag_vpi.c  | 4 ++--
 src/jtag/drivers/xds110.c    | 8 ++++----
 3 files changed, 10 insertions(+), 10 deletions(-)


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commit 017e61feb44b71ac013ae4c7f2cfa3e7ca3323ae
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Apr 2 20:47:41 2023 +0200

    HACKING: add info on ignoring check-patch checks
    
    Due to checkpatch internal state machine, the field 'Checkpatch-ignore:'
    must be in the commit message before the 'Signed-off-by:' line.
    Report it in the documentation and add that multiple 'Checkpatch-ignore:'
    lines are allowed.
    
    Change-Id: I770cdc4cb5b33bcf63c860c154ab3cbd4785ad20
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/7572
    Tested-by: jenkins

diff --git a/HACKING b/HACKING
index 74cbe02e7..9e8cd357f 100644
--- a/HACKING
+++ b/HACKING
@@ -287,6 +287,13 @@ Only for <em>exceptional cases</em>, it is allowed to submit patches
 to Gerrit with the special field 'Checkpatch-ignore:' in the commit
 message. This field will cause checkpatch to ignore the error types
 listed in the field, only for the patch itself.
+For errors in the commit message, the special field has to be put in
+the commit message before the line that produces the error.
+The special field must be added <em>before</em> the 'Signed-off-by:'
+line, otherwise it is ignored.
+To ignore multiple errors, either add multiple lines with the special
+field or add multiple error types, separated by space or commas, in a
+single line.
 The error type is printed by checkpatch on failure.
 For example the names of Windows APIs mix lower and upper case chars,
 in violation of OpenOCD coding style, triggering a 'CAMELCASE' error:

-----------------------------------------------------------------------

Summary of changes:
 HACKING | 7 +++++++
 1 file changed, 7 insertions(+)


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commit 8edfdb02ed1fd73568ef9e9522634e65791dbd69
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Sep 1 14:45:36 2024 +0200

    rtos: chibios: fix version display
    
    The field 'struct chibios_chdebug::ch_version' is 16 bits wide, so
    using le_to_h_u32() and be_to_h_u32() overflows in the following
    fields of the struct.
    
    Restrict the endianness conversion to 16 bits and use the target
    endianness dependent target_buffer_get_u16().
    Convert the 'struct chibios_chdebug::ch_version' to an array of
    uint8_t.
    
    Change-Id: Iaa80e9cb1a65c27512919398b8ffbf14e5c240cd
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8473
    Tested-by: jenkins

diff --git a/src/rtos/chibios.c b/src/rtos/chibios.c
index c1e4e8419..f4ee33a49 100644
--- a/src/rtos/chibios.c
+++ b/src/rtos/chibios.c
@@ -31,7 +31,7 @@ struct chibios_chdebug {
 	char      ch_identifier[4];       /**< @brief Always set to "main".       */
 	uint8_t   ch_zero;                /**< @brief Must be zero.               */
 	uint8_t   ch_size;                /**< @brief Size of this structure.     */
-	uint16_t  ch_version;             /**< @brief Encoded ChibiOS/RT version. */
+	uint8_t   ch_version[2];          /**< @brief Encoded ChibiOS/RT version. */
 	uint8_t   ch_ptrsize;             /**< @brief Size of a pointer.          */
 	uint8_t   ch_timesize;            /**< @brief Size of a @p systime_t.     */
 	uint8_t   ch_threadsize;          /**< @brief Size of a @p Thread struct. */
@@ -171,13 +171,7 @@ static int chibios_update_memory_signature(struct rtos *rtos)
 					" expected. Assuming compatibility...");
 	}
 
-	/* Convert endianness of version field */
-	const uint8_t *versiontarget = (const uint8_t *)
-										&signature->ch_version;
-	signature->ch_version = rtos->target->endianness == TARGET_LITTLE_ENDIAN ?
-			le_to_h_u32(versiontarget) : be_to_h_u32(versiontarget);
-
-	const uint16_t ch_version = signature->ch_version;
+	const uint16_t ch_version = target_buffer_get_u16(rtos->target, signature->ch_version);
 	LOG_INFO("Successfully loaded memory map of ChibiOS/RT target "
 			"running version %i.%i.%i", GET_CH_KERNEL_MAJOR(ch_version),
 			GET_CH_KERNEL_MINOR(ch_version), GET_CH_KERNEL_PATCH(ch_version));

-----------------------------------------------------------------------

Summary of changes:
 src/rtos/chibios.c | 10 ++--------
 1 file changed, 2 insertions(+), 8 deletions(-)


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commit 1173473f662bbdf6d1499654568256257eee6cdd
Author: Matt Trescott <mt...@me...>
Date:   Wed Jul 10 14:46:28 2024 -0400

    flash/nor/atsame5: add PIC32CX-SG device IDs
    
    These devices are essentially the same as the E54 series with the
    exception of immutable boot (SG41, SG61) and HSM (SG60, SG61), and some
    bug fixes found only in E54 revision F. When the security features are
    not enabled, they behave identically except for the different DIDs.
    
    Signed-off-by: Matt Trescott <mt...@me...>
    Change-Id: Ic93313f3e20af0ed4a5768880d17b335a7b7bb04
    Reviewed-on: https://review.openocd.org/c/openocd/+/8355
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/flash/nor/atsame5.c b/src/flash/nor/atsame5.c
index c590081fc..a6ac9060a 100644
--- a/src/flash/nor/atsame5.c
+++ b/src/flash/nor/atsame5.c
@@ -85,6 +85,9 @@
 #define SAME_SERIES_51		0x01
 #define SAME_SERIES_53		0x03
 #define SAME_SERIES_54		0x04
+#define PIC32CXSG_SERIES_41	0x07
+#define PIC32CXSG_SERIES_60	0x00
+#define PIC32CXSG_SERIES_61	0x02
 
 /* Device ID macros */
 #define SAMD_GET_PROCESSOR(id) (id >> 28)
@@ -148,6 +151,27 @@ static const struct samd_part same54_parts[] = {
 	{ 0x03, "SAME54N19A", 512, 192 },
 };
 
+/* See PIC32CX SG41/SG60/SG61 Family Silicon Errata and Datasheet Clarifications
+ * DS80000985G */
+/* Known PIC32CX-SG41 parts. */
+static const struct samd_part pic32cxsg41_parts[] = {
+	{ 0x00, "PIC32CX1025SG41128", 1024, 256 },
+	{ 0x01, "PIC32CX1025SG41100", 1024, 256 },
+	{ 0x02, "PIC32CX1025SG41064", 1024, 256 },
+};
+
+/* Known PIC32CX-SG60 parts. */
+static const struct samd_part pic32cxsg60_parts[] = {
+	{ 0x00, "PIC32CX1025SG60128", 1024, 256 },
+	{ 0x01, "PIC32CX1025SG60100", 1024, 256 },
+};
+
+/* Known PIC32CX-SG61 parts. */
+static const struct samd_part pic32cxsg61_parts[] = {
+	{ 0x00, "PIC32CX1025SG61128", 1024, 256 },
+	{ 0x01, "PIC32CX1025SG61100", 1024, 256 },
+};
+
 /* Each family of parts contains a parts table in the DEVSEL field of DID.  The
  * processor ID, family ID, and series ID are used to determine which exact
  * family this is and then we can use the corresponding table. */
@@ -169,6 +193,12 @@ static const struct samd_family samd_families[] = {
 		same53_parts, ARRAY_SIZE(same53_parts) },
 	{ SAMD_PROCESSOR_M4, SAMD_FAMILY_E, SAME_SERIES_54,
 		same54_parts, ARRAY_SIZE(same54_parts) },
+	{ SAMD_PROCESSOR_M4, SAMD_FAMILY_E, PIC32CXSG_SERIES_41,
+		pic32cxsg41_parts, ARRAY_SIZE(pic32cxsg41_parts) },
+	{ SAMD_PROCESSOR_M4, SAMD_FAMILY_E, PIC32CXSG_SERIES_60,
+		pic32cxsg60_parts, ARRAY_SIZE(pic32cxsg60_parts) },
+	{ SAMD_PROCESSOR_M4, SAMD_FAMILY_E, PIC32CXSG_SERIES_61,
+		pic32cxsg61_parts, ARRAY_SIZE(pic32cxsg61_parts) },
 };
 
 struct samd_info {

-----------------------------------------------------------------------

Summary of changes:
 src/flash/nor/atsame5.c | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)


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commit ad216136180e0cd482f414eb072c9dd25dd1c559
Author: Marc Schink <de...@za...>
Date:   Mon Jun 24 16:26:02 2024 +0200

    server/telnet: Restructure commands
    
    Use a command group 'telnet' with subcommands instead of individual
    commands with 'telnet_' prefix. Even though there is only one subcommand
    at the moment, make this change to ensure consistency with other commands.
    
    The old command is still available to ensure backwards compatibility,
    but are marked as deprecated.
    
    Change-Id: I5e88632fa0d0ce5a8129e9fcf5ae743fc5b093cb
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8378
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/doc/openocd.texi b/doc/openocd.texi
index e8a1f33b5..97396c7b7 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -2227,7 +2227,7 @@ the port @var{number} defaults to 6666.
 When specified as "disabled", this service is not activated.
 @end deffn
 
-@deffn {Config Command} {telnet_port} [number]
+@deffn {Config Command} {telnet port} [number]
 Specify or query the
 port on which to listen for incoming telnet connections.
 This port is intended for interaction with one human through TCL commands.
diff --git a/src/server/startup.tcl b/src/server/startup.tcl
index ebfb0562e..cf3eca36e 100644
--- a/src/server/startup.tcl
+++ b/src/server/startup.tcl
@@ -113,3 +113,9 @@ proc "tcl_trace" {state} {
 	echo "DEPRECATED! use 'tcl trace' not 'tcl_trace'"
 	eval tcl trace $state
 }
+
+lappend _telnet_autocomplete_skip "telnet_port"
+proc "telnet_port" {args} {
+	echo "DEPRECATED! use 'telnet port', not 'telnet_port'"
+	eval telnet port $args
+}
diff --git a/src/server/telnet_server.c b/src/server/telnet_server.c
index 02d450fbd..a596afef0 100644
--- a/src/server/telnet_server.c
+++ b/src/server/telnet_server.c
@@ -967,7 +967,6 @@ int telnet_init(char *banner)
 	return ERROR_OK;
 }
 
-/* daemon configuration command telnet_port */
 COMMAND_HANDLER(handle_telnet_port_command)
 {
 	return CALL_COMMAND_HANDLER(server_pipe_command, &telnet_port);
@@ -978,6 +977,19 @@ COMMAND_HANDLER(handle_exit_command)
 	return ERROR_COMMAND_CLOSE_CONNECTION;
 }
 
+static const struct command_registration telnet_subcommand_handlers[] = {
+	{
+		.name = "port",
+		.handler = handle_telnet_port_command,
+		.mode = COMMAND_CONFIG,
+		.help = "Specify port on which to listen "
+			"for incoming telnet connections.  "
+			"Read help on 'gdb port'.",
+		.usage = "[port_num]",
+	},
+	COMMAND_REGISTRATION_DONE
+};
+
 static const struct command_registration telnet_command_handlers[] = {
 	{
 		.name = "exit",
@@ -987,13 +999,11 @@ static const struct command_registration telnet_command_handlers[] = {
 		.help = "exit telnet session",
 	},
 	{
-		.name = "telnet_port",
-		.handler = handle_telnet_port_command,
+		.name = "telnet",
+		.chain = telnet_subcommand_handlers,
 		.mode = COMMAND_CONFIG,
-		.help = "Specify port on which to listen "
-			"for incoming telnet connections.  "
-			"Read help on 'gdb port'.",
-		.usage = "[port_num]",
+		.help = "telnet commands",
+		.usage = "",
 	},
 	COMMAND_REGISTRATION_DONE
 };

-----------------------------------------------------------------------

Summary of changes:
 doc/openocd.texi           |  2 +-
 src/server/startup.tcl     |  6 ++++++
 src/server/telnet_server.c | 24 +++++++++++++++++-------
 3 files changed, 24 insertions(+), 8 deletions(-)


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commit e6ade35305fa32674d615a26713487b5ad00b352
Author: Evgeniy Naydanov <evg...@sy...>
Date:   Thu Sep 12 15:16:45 2024 +0300

    server/gdb_server: improve error handling for `Z/z` packet
    
    * Report errors for `z` packet.
    * Report not supported types as required by GDB Remote Protocol's
      documentation:
      > Implementation notes: A remote target shall return an empty string
        for an unrecognized breakpoint or watchpoint packet type.
    
      Link: https://sourceware.org/gdb/current/onlinedocs/gdb.html/Packets.html#insert-breakpoint-or-watchpoint-packet
    
    Change-Id: I9130400aca5dbc54fefb413ed74f27d75fe50640
    Signed-off-by: Evgeniy Naydanov <evg...@sy...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8488
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c
index 2db3123a0..854c4dc65 100644
--- a/src/server/gdb_server.c
+++ b/src/server/gdb_server.c
@@ -1781,18 +1781,9 @@ static int gdb_breakpoint_watchpoint_packet(struct connection *connection,
 		case 1:
 			if (packet[0] == 'Z') {
 				retval = breakpoint_add(target, address, size, bp_type);
-				if (retval == ERROR_NOT_IMPLEMENTED) {
-					/* Send empty reply to report that breakpoints of this type are not supported */
-					gdb_put_packet(connection, "", 0);
-				} else if (retval != ERROR_OK) {
-					retval = gdb_error(connection, retval);
-					if (retval != ERROR_OK)
-						return retval;
-				} else
-					gdb_put_packet(connection, "OK", 2);
 			} else {
-				breakpoint_remove(target, address);
-				gdb_put_packet(connection, "OK", 2);
+				assert(packet[0] == 'z');
+				retval = breakpoint_remove(target, address);
 			}
 			break;
 		case 2:
@@ -1801,26 +1792,26 @@ static int gdb_breakpoint_watchpoint_packet(struct connection *connection,
 		{
 			if (packet[0] == 'Z') {
 				retval = watchpoint_add(target, address, size, wp_type, 0, WATCHPOINT_IGNORE_DATA_VALUE_MASK);
-				if (retval == ERROR_NOT_IMPLEMENTED) {
-					/* Send empty reply to report that watchpoints of this type are not supported */
-					gdb_put_packet(connection, "", 0);
-				} else if (retval != ERROR_OK) {
-					retval = gdb_error(connection, retval);
-					if (retval != ERROR_OK)
-						return retval;
-				} else
-					gdb_put_packet(connection, "OK", 2);
 			} else {
-				watchpoint_remove(target, address);
-				gdb_put_packet(connection, "OK", 2);
+				assert(packet[0] == 'z');
+				retval = watchpoint_remove(target, address);
 			}
 			break;
 		}
 		default:
+		{
+			retval = ERROR_NOT_IMPLEMENTED;
 			break;
+		}
 	}
 
-	return ERROR_OK;
+	if (retval == ERROR_NOT_IMPLEMENTED) {
+		/* Send empty reply to report that watchpoints of this type are not supported */
+		return gdb_put_packet(connection, "", 0);
+	}
+	if (retval != ERROR_OK)
+		return gdb_error(connection, retval);
+	return gdb_put_packet(connection, "OK", 2);
 }
 
 /* print out a string and allocate more space as needed,

-----------------------------------------------------------------------

Summary of changes:
 src/server/gdb_server.c | 37 ++++++++++++++-----------------------
 1 file changed, 14 insertions(+), 23 deletions(-)


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- Log -----------------------------------------------------------------
commit 1ae6b07b45198618c3f0975fd49de59cf6c04e7a
Author: Jessica Clarke <jr...@jr...>
Date:   Fri Sep 13 18:10:48 2024 +0100

    binarybuffer: Invert buf_cmp* return value and rename to buf_eq*
    
    The current semantics are a bit confusing, as the return value looks
    like memcmp (0/false being equal) but the bool return type means one
    likely expects true to mean equal. Make this clearer by switching them
    out for buf_eq* functions that do that instead.
    
    Checkpatch-ignore: UNSPECIFIED_INT
    Change-Id: Iee0c5af794316aab5327cb9c168051fabd3bc1cb
    Signed-off-by: Jessica Clarke <jr...@jr...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8490
    Tested-by: jenkins
    Reviewed-by: Evgeniy Naydanov <evg...@sy...>
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/helper/binarybuffer.c b/src/helper/binarybuffer.c
index c25383dc6..a7ca5af9d 100644
--- a/src/helper/binarybuffer.c
+++ b/src/helper/binarybuffer.c
@@ -57,49 +57,49 @@ void *buf_cpy(const void *from, void *_to, unsigned size)
 	return _to;
 }
 
-static bool buf_cmp_masked(uint8_t a, uint8_t b, uint8_t m)
+static bool buf_eq_masked(uint8_t a, uint8_t b, uint8_t m)
 {
-	return (a & m) != (b & m);
+	return (a & m) == (b & m);
 }
-static bool buf_cmp_trailing(uint8_t a, uint8_t b, uint8_t m, unsigned trailing)
+static bool buf_eq_trailing(uint8_t a, uint8_t b, uint8_t m, unsigned trailing)
 {
 	uint8_t mask = (1 << trailing) - 1;
-	return buf_cmp_masked(a, b, mask & m);
+	return buf_eq_masked(a, b, mask & m);
 }
 
-bool buf_cmp(const void *_buf1, const void *_buf2, unsigned size)
+bool buf_eq(const void *_buf1, const void *_buf2, unsigned size)
 {
 	if (!_buf1 || !_buf2)
-		return _buf1 != _buf2;
+		return _buf1 == _buf2;
 
 	unsigned last = size / 8;
 	if (memcmp(_buf1, _buf2, last) != 0)
-		return true;
+		return false;
 
 	unsigned trailing = size % 8;
 	if (!trailing)
-		return false;
+		return true;
 
 	const uint8_t *buf1 = _buf1, *buf2 = _buf2;
-	return buf_cmp_trailing(buf1[last], buf2[last], 0xff, trailing);
+	return buf_eq_trailing(buf1[last], buf2[last], 0xff, trailing);
 }
 
-bool buf_cmp_mask(const void *_buf1, const void *_buf2,
+bool buf_eq_mask(const void *_buf1, const void *_buf2,
 	const void *_mask, unsigned size)
 {
 	if (!_buf1 || !_buf2)
-		return _buf1 != _buf2 || _buf1 != _mask;
+		return _buf1 == _buf2 && _buf1 == _mask;
 
 	const uint8_t *buf1 = _buf1, *buf2 = _buf2, *mask = _mask;
 	unsigned last = size / 8;
 	for (unsigned i = 0; i < last; i++) {
-		if (buf_cmp_masked(buf1[i], buf2[i], mask[i]))
-			return true;
+		if (!buf_eq_masked(buf1[i], buf2[i], mask[i]))
+			return false;
 	}
 	unsigned trailing = size % 8;
 	if (!trailing)
-		return false;
-	return buf_cmp_trailing(buf1[last], buf2[last], mask[last], trailing);
+		return true;
+	return buf_eq_trailing(buf1[last], buf2[last], mask[last], trailing);
 }
 
 void *buf_set_ones(void *_buf, unsigned size)
diff --git a/src/helper/binarybuffer.h b/src/helper/binarybuffer.h
index df4199837..ed13b980f 100644
--- a/src/helper/binarybuffer.h
+++ b/src/helper/binarybuffer.h
@@ -172,8 +172,8 @@ static inline uint64_t buf_get_u64(const uint8_t *_buffer,
  */
 uint32_t flip_u32(uint32_t value, unsigned width);
 
-bool buf_cmp(const void *buf1, const void *buf2, unsigned size);
-bool buf_cmp_mask(const void *buf1, const void *buf2,
+bool buf_eq(const void *buf1, const void *buf2, unsigned size);
+bool buf_eq_mask(const void *buf1, const void *buf2,
 		const void *mask, unsigned size);
 
 /**
diff --git a/src/jtag/core.c b/src/jtag/core.c
index 9eae5e74b..a6f38a19d 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -881,9 +881,9 @@ static int jtag_check_value_inner(uint8_t *captured, uint8_t *in_check_value,
 	int compare_failed;
 
 	if (in_check_mask)
-		compare_failed = buf_cmp_mask(captured, in_check_value, in_check_mask, num_bits);
+		compare_failed = !buf_eq_mask(captured, in_check_value, in_check_mask, num_bits);
 	else
-		compare_failed = buf_cmp(captured, in_check_value, num_bits);
+		compare_failed = !buf_eq(captured, in_check_value, num_bits);
 
 	if (compare_failed) {
 		char *captured_str, *in_check_value_str;
diff --git a/src/svf/svf.c b/src/svf/svf.c
index dd3d5175c..470889948 100644
--- a/src/svf/svf.c
+++ b/src/svf/svf.c
@@ -932,7 +932,7 @@ static int svf_check_tdo(void)
 		index_var = svf_check_tdo_para[i].buffer_offset;
 		len = svf_check_tdo_para[i].bit_len;
 		if ((svf_check_tdo_para[i].enabled)
-				&& buf_cmp_mask(&svf_tdi_buffer[index_var], &svf_tdo_buffer[index_var],
+				&& !buf_eq_mask(&svf_tdi_buffer[index_var], &svf_tdo_buffer[index_var],
 				&svf_mask_buffer[index_var], len)) {
 			LOG_ERROR("tdo check error at line %d",
 				svf_check_tdo_para[i].line_num);

-----------------------------------------------------------------------

Summary of changes:
 src/helper/binarybuffer.c | 30 +++++++++++++++---------------
 src/helper/binarybuffer.h |  4 ++--
 src/jtag/core.c           |  4 ++--
 src/svf/svf.c             |  2 +-
 4 files changed, 20 insertions(+), 20 deletions(-)


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- Log -----------------------------------------------------------------
commit 5159c599157cc878521ae64e836675f7939c6a09
Author: daniellizewski <dan...@ge...>
Date:   Thu Mar 21 09:58:34 2024 -0400

    src/rtos/rtos_nuttx_stackings.c: Fix stack alignment for cortex-m targets
    
    Backtraces performed by GDB on any thread other than the current
    thread would fail if hardware 8 byte ISR stack alignment
    was enabled on cortex_m targets. Stack reads now adjust
    the stored SP to account for a potential offset introduced by hardware.
    Fixed incorrect register offsets for cortex_m Nuttx frames by reading
    the TCB info symbols to determine correct offsets.
    Fixed offsets can no longer be used since the offsets have changed
    multiple times for different Nuttx versions.
    Tested on nuttx-12.1.0.
    Tested using custom stm32h7 board and custom s32k148 board variants.
    Built with CONFIG_ARCH_FPU enabled and disabled to
    test FPU and non FPU frame logic.
    
    Change-Id: Ifcbeefb0ddcfbcb528daa9d1d95732ca9584c9ef
    Signed-off-by: daniellizewski <dan...@ge...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8180
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/src/rtos/nuttx.c b/src/rtos/nuttx.c
index 910014889..821e55088 100644
--- a/src/rtos/nuttx.c
+++ b/src/rtos/nuttx.c
@@ -32,7 +32,6 @@
 struct nuttx_params {
 	const char *target_name;
 	const struct rtos_register_stacking *stacking;
-	const struct rtos_register_stacking *(*select_stackinfo)(struct target *target);
 };
 
 /*
@@ -56,19 +55,12 @@ struct symbols {
 	bool optional;
 };
 
-/* Used to index the list of retrieved symbols. See nuttx_symbol_list for the order. */
-enum nuttx_symbol_vals {
-	NX_SYM_READYTORUN = 0,
-	NX_SYM_PIDHASH,
-	NX_SYM_NPIDHASH,
-	NX_SYM_TCB_INFO,
-};
-
 static const struct symbols nuttx_symbol_list[] = {
 	{ "g_readytorun", false },
 	{ "g_pidhash", false },
 	{ "g_npidhash", false },
 	{ "g_tcbinfo", false },
+	{ "g_reg_offs", false},
 	{ NULL, false }
 };
 
@@ -86,18 +78,14 @@ static char *task_state_str[] = {
 	"STOPPED",
 };
 
-static const struct rtos_register_stacking *cortexm_select_stackinfo(struct target *target);
-
 static const struct nuttx_params nuttx_params_list[] = {
 	{
 		.target_name = "cortex_m",
-		.stacking = NULL,
-		.select_stackinfo = cortexm_select_stackinfo,
+		.stacking = &nuttx_stacking_cortex_m,
 	},
 	{
 		.target_name = "hla_target",
-		.stacking = NULL,
-		.select_stackinfo = cortexm_select_stackinfo,
+		.stacking = &nuttx_stacking_cortex_m,
 	},
 	{
 		.target_name = "esp32",
@@ -117,28 +105,6 @@ static const struct nuttx_params nuttx_params_list[] = {
 	},
 };
 
-static bool cortexm_hasfpu(struct target *target)
-{
-	uint32_t cpacr;
-	struct armv7m_common *armv7m_target = target_to_armv7m(target);
-
-	if (!is_armv7m(armv7m_target) || armv7m_target->fp_feature == FP_NONE)
-		return false;
-
-	int retval = target_read_u32(target, FPU_CPACR, &cpacr);
-	if (retval != ERROR_OK) {
-		LOG_ERROR("Could not read CPACR register to check FPU state");
-		return false;
-	}
-
-	return cpacr & 0x00F00000;
-}
-
-static const struct rtos_register_stacking *cortexm_select_stackinfo(struct target *target)
-{
-	return cortexm_hasfpu(target) ? &nuttx_stacking_cortex_m_fpu : &nuttx_stacking_cortex_m;
-}
-
 static bool nuttx_detect_rtos(struct target *target)
 {
 	if (target->rtos->symbols &&
@@ -371,29 +337,25 @@ static int nuttx_getreg_current_thread(struct rtos *rtos,
 static int nuttx_getregs_fromstack(struct rtos *rtos, int64_t thread_id,
 	struct rtos_reg **reg_list, int *num_regs)
 {
-	uint16_t xcpreg_off;
+	uint16_t regs_off;
 	uint32_t regsaddr;
 	const struct nuttx_params *priv = rtos->rtos_specific_params;
 	const struct rtos_register_stacking *stacking = priv->stacking;
 
 	if (!stacking) {
-		if (priv->select_stackinfo) {
-			stacking = priv->select_stackinfo(rtos->target);
-		} else {
-			LOG_ERROR("Can't find a way to get stacking info");
-			return ERROR_FAIL;
-		}
+		LOG_ERROR("Can't find a way to get stacking info");
+		return ERROR_FAIL;
 	}
 
 	int ret = target_read_u16(rtos->target,
 		rtos->symbols[NX_SYM_TCB_INFO].address + offsetof(struct tcbinfo, regs_off),
-		&xcpreg_off);
+		&regs_off);
 	if (ret != ERROR_OK) {
 		LOG_ERROR("Failed to read registers' offset: ret = %d", ret);
 		return ERROR_FAIL;
 	}
 
-	ret = target_read_u32(rtos->target, thread_id + xcpreg_off, &regsaddr);
+	ret = target_read_u32(rtos->target, thread_id + regs_off, &regsaddr);
 	if (ret != ERROR_OK) {
 		LOG_ERROR("Failed to read registers' address: ret = %d", ret);
 		return ERROR_FAIL;
diff --git a/src/rtos/rtos_nuttx_stackings.c b/src/rtos/rtos_nuttx_stackings.c
index b70cccb33..6faa56a66 100644
--- a/src/rtos/rtos_nuttx_stackings.c
+++ b/src/rtos/rtos_nuttx_stackings.c
@@ -9,60 +9,100 @@
 #include "rtos_nuttx_stackings.h"
 #include "rtos_standard_stackings.h"
 #include <target/riscv/riscv.h>
+#include <helper/bits.h>
 
-/* see arch/arm/include/armv7-m/irq_cmnvector.h */
+/* The cortex_m target uses nuttx_tcbinfo_stack_read which uses a symbol
+ * provided by Nuttx to read the registers from memory and place them directly
+ * in the order we need. This is because the register offsets change with
+ * different versions of Nuttx, FPU vs non-FPU and ARMv7 vs ARMv8.
+ * This allows a single function to work with many versions.
+ */
 static const struct stack_register_offset nuttx_stack_offsets_cortex_m[] = {
-	{ ARMV7M_R0, 0x28, 32 },		/* r0   */
-	{ ARMV7M_R1, 0x2c, 32 },		/* r1   */
-	{ ARMV7M_R2, 0x30, 32 },		/* r2   */
-	{ ARMV7M_R3, 0x34, 32 },		/* r3   */
-	{ ARMV7M_R4, 0x08, 32 },		/* r4   */
-	{ ARMV7M_R5, 0x0c, 32 },		/* r5   */
-	{ ARMV7M_R6, 0x10, 32 },		/* r6   */
-	{ ARMV7M_R7, 0x14, 32 },		/* r7   */
-	{ ARMV7M_R8, 0x18, 32 },		/* r8   */
-	{ ARMV7M_R9, 0x1c, 32 },		/* r9   */
-	{ ARMV7M_R10, 0x20, 32 },		/* r10  */
-	{ ARMV7M_R11, 0x24, 32 },		/* r11  */
-	{ ARMV7M_R12, 0x38, 32 },		/* r12  */
-	{ ARMV7M_R13, 0, 32 },			/* sp   */
-	{ ARMV7M_R14, 0x3c, 32 },		/* lr   */
-	{ ARMV7M_PC, 0x40, 32 },		/* pc   */
-	{ ARMV7M_XPSR, 0x44, 32 },		/* xPSR */
+	{ ARMV7M_R0,    0, 32 },		/* r0   */
+	{ ARMV7M_R1,    4, 32 },		/* r1   */
+	{ ARMV7M_R2,    8, 32 },		/* r2   */
+	{ ARMV7M_R3,   12, 32 },		/* r3   */
+	{ ARMV7M_R4,   16, 32 },		/* r4   */
+	{ ARMV7M_R5,   20, 32 },		/* r5   */
+	{ ARMV7M_R6,   24, 32 },		/* r6   */
+	{ ARMV7M_R7,   28, 32 },		/* r7   */
+	{ ARMV7M_R8,   32, 32 },		/* r8   */
+	{ ARMV7M_R9,   36, 32 },		/* r9   */
+	{ ARMV7M_R10,  40, 32 },		/* r10  */
+	{ ARMV7M_R11,  44, 32 },		/* r11  */
+	{ ARMV7M_R12,  48, 32 },		/* r12  */
+	{ ARMV7M_R13,  52, 32 },		/* sp   */
+	{ ARMV7M_R14,  56, 32 },		/* lr   */
+	{ ARMV7M_PC,   60, 32 },		/* pc   */
+	{ ARMV7M_XPSR, 64, 32 },		/* xPSR */
 };
 
-const struct rtos_register_stacking nuttx_stacking_cortex_m = {
-	.stack_registers_size = 0x48,
-	.stack_growth_direction = -1,
-	.num_output_registers = 17,
-	.register_offsets = nuttx_stack_offsets_cortex_m,
-};
+/* The Nuttx stack frame for most architectures has some registers placed
+ * by hardware and some by software. The hardware register order and number does not change
+ * but the software registers may change with different versions of Nuttx.
+ * For example with ARMv7, nuttx-12.3.0 added a new register which changed all
+ * the offsets. We can either create separate offset tables for each version of Nuttx
+ * which will break again in the future, or read the offsets from the TCB info.
+ * Nuttx provides a symbol (g_reg_offs) which holds all the offsets for each stored register.
+ * This offset table is stored in GDB org.gnu.gdb.xxx feature order.
+ * The same order we need.
+ * Please refer:
+ * https://sourceware.org/gdb/current/onlinedocs/gdb/ARM-Features.html
+ * https://sourceware.org/gdb/current/onlinedocs/gdb/RISC_002dV-Features.html
+ */
+static int nuttx_cortex_m_tcbinfo_stack_read(struct target *target,
+	int64_t stack_ptr, const struct rtos_register_stacking *stacking,
+	uint8_t *stack_data)
+{
+	struct rtos *rtos = target->rtos;
+	target_addr_t xcpreg_off = rtos->symbols[NX_SYM_REG_OFFSETS].address;
 
-static const struct stack_register_offset nuttx_stack_offsets_cortex_m_fpu[] = {
-	{ ARMV7M_R0, 0x6c, 32 },		/* r0   */
-	{ ARMV7M_R1, 0x70, 32 },		/* r1   */
-	{ ARMV7M_R2, 0x74, 32 },		/* r2   */
-	{ ARMV7M_R3, 0x78, 32 },		/* r3   */
-	{ ARMV7M_R4, 0x08, 32 },		/* r4   */
-	{ ARMV7M_R5, 0x0c, 32 },		/* r5   */
-	{ ARMV7M_R6, 0x10, 32 },		/* r6   */
-	{ ARMV7M_R7, 0x14, 32 },		/* r7   */
-	{ ARMV7M_R8, 0x18, 32 },		/* r8   */
-	{ ARMV7M_R9, 0x1c, 32 },		/* r9   */
-	{ ARMV7M_R10, 0x20, 32 },		/* r10  */
-	{ ARMV7M_R11, 0x24, 32 },		/* r11  */
-	{ ARMV7M_R12, 0x7c, 32 },		/* r12  */
-	{ ARMV7M_R13, 0, 32 },			/* sp   */
-	{ ARMV7M_R14, 0x80, 32 },		/* lr   */
-	{ ARMV7M_PC, 0x84, 32 },		/* pc   */
-	{ ARMV7M_XPSR, 0x88, 32 },		/* xPSR */
-};
+	for (int i = 0; i < stacking->num_output_registers; ++i) {
+		uint16_t stack_reg_offset;
+		int ret = target_read_u16(rtos->target, xcpreg_off + 2 * i, &stack_reg_offset);
+		if (ret != ERROR_OK) {
+			LOG_ERROR("Failed to read stack_reg_offset: ret = %d", ret);
+			return ret;
+		}
+		if (stack_reg_offset != UINT16_MAX && stacking->register_offsets[i].offset >= 0) {
+			ret = target_read_buffer(target,
+				stack_ptr + stack_reg_offset,
+				stacking->register_offsets[i].width_bits / 8,
+				&stack_data[stacking->register_offsets[i].offset]);
+			if (ret != ERROR_OK) {
+				LOG_ERROR("Failed to read register: ret = %d", ret);
+				return ret;
+			}
+		}
+	}
+
+	/* Offset match nuttx_stack_offsets_cortex_m */
+	const int XPSR_OFFSET = 64;
+	const int SP_OFFSET = 52;
+	/* Nuttx stack frames (produced in exception_common) store the SP of the ISR minus
+	 * the hardware stack frame size. This SP may include an additional 4 byte alignment
+	 * depending in xPSR[9]. The Nuttx stack frame stores post alignment since the
+	 * hardware will add/remove automatically on both enter/exit.
+	 * We need to adjust the SP to get the real SP of the stack.
+	 * See Arm Reference manual "Stack alignment on exception entry"
+	 */
+	uint32_t xpsr = target_buffer_get_u32(target, &stack_data[XPSR_OFFSET]);
+	if (xpsr & BIT(9)) {
+		uint32_t sp = target_buffer_get_u32(target, &stack_data[SP_OFFSET]);
+		target_buffer_set_u32(target, &stack_data[SP_OFFSET], sp - 4 * stacking->stack_growth_direction);
+	}
 
-const struct rtos_register_stacking nuttx_stacking_cortex_m_fpu = {
-	.stack_registers_size = 0x8c,
+	return ERROR_OK;
+}
+
+const struct rtos_register_stacking nuttx_stacking_cortex_m = {
+	/* nuttx_tcbinfo_stack_read transforms the stack into just output registers */
+	.stack_registers_size = ARRAY_SIZE(nuttx_stack_offsets_cortex_m) * 4,
 	.stack_growth_direction = -1,
-	.num_output_registers = 17,
-	.register_offsets = nuttx_stack_offsets_cortex_m_fpu,
+	.num_output_registers = ARRAY_SIZE(nuttx_stack_offsets_cortex_m),
+	.read_stack = nuttx_cortex_m_tcbinfo_stack_read,
+	.calculate_process_stack = NULL, /* Stack alignment done in nuttx_cortex_m_tcbinfo_stack_read */
+	.register_offsets = nuttx_stack_offsets_cortex_m,
 };
 
 static const struct stack_register_offset nuttx_stack_offsets_riscv[] = {
diff --git a/src/rtos/rtos_nuttx_stackings.h b/src/rtos/rtos_nuttx_stackings.h
index 213a06033..5d55e7545 100644
--- a/src/rtos/rtos_nuttx_stackings.h
+++ b/src/rtos/rtos_nuttx_stackings.h
@@ -5,6 +5,15 @@
 
 #include "rtos.h"
 
+/* Used to index the list of retrieved symbols. See nuttx_symbol_list for the order. */
+enum nuttx_symbol_vals {
+	NX_SYM_READYTORUN = 0,
+	NX_SYM_PIDHASH,
+	NX_SYM_NPIDHASH,
+	NX_SYM_TCB_INFO,
+	NX_SYM_REG_OFFSETS,
+};
+
 extern const struct rtos_register_stacking nuttx_stacking_cortex_m;
 extern const struct rtos_register_stacking nuttx_stacking_cortex_m_fpu;
 extern const struct rtos_register_stacking nuttx_riscv_stacking;

-----------------------------------------------------------------------

Summary of changes:
 src/rtos/nuttx.c                |  54 +++-------------
 src/rtos/rtos_nuttx_stackings.c | 134 ++++++++++++++++++++++++++--------------
 src/rtos/rtos_nuttx_stackings.h |   9 +++
 3 files changed, 104 insertions(+), 93 deletions(-)


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- Log -----------------------------------------------------------------
commit b14f63e0045557118a5296e6049a3642011bf431
Author: Peter Collingbourne <pc...@go...>
Date:   Thu Aug 1 15:48:25 2024 -0700

    aarch64: Invalidate caches on reset
    
    When a target is reset we must invalidate register caches in order
    to avoid showing stale register values or writing them back to
    registers. Use EDPRSR.SR to detect a previous reset, and EDPRSR.R to
    detect a current reset state.
    
    Change-Id: Ia1e97d7154cf7789d392274eee475733086a835b
    Signed-off-by: Peter Collingbourne <pc...@go...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8425
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/src/target/aarch64.c b/src/target/aarch64.c
index 6a70b2ddf..f0d486f58 100644
--- a/src/target/aarch64.c
+++ b/src/target/aarch64.c
@@ -193,6 +193,20 @@ static int aarch64_mmu_modify(struct target *target, int enable)
 	return retval;
 }
 
+static int aarch64_read_prsr(struct target *target, uint32_t *prsr)
+{
+	struct armv8_common *armv8 = target_to_armv8(target);
+	int retval;
+
+	retval = mem_ap_read_atomic_u32(armv8->debug_ap,
+			armv8->debug_base + CPUV8_DBG_PRSR, prsr);
+	if (retval != ERROR_OK)
+		return retval;
+
+	armv8->sticky_reset |= *prsr & PRSR_SR;
+	return ERROR_OK;
+}
+
 /*
  * Basic debug access, very low level assumes state is saved
  */
@@ -213,8 +227,7 @@ static int aarch64_init_debug_access(struct target *target)
 
 	/* Clear Sticky Power Down status Bit in PRSR to enable access to
 	   the registers in the Core Power Domain */
-	retval = mem_ap_read_atomic_u32(armv8->debug_ap,
-			armv8->debug_base + CPUV8_DBG_PRSR, &dummy);
+	retval = aarch64_read_prsr(target, &dummy);
 	if (retval != ERROR_OK)
 		return retval;
 
@@ -281,12 +294,10 @@ static int aarch64_set_dscr_bits(struct target *target, unsigned long bit_mask,
 static int aarch64_check_state_one(struct target *target,
 		uint32_t mask, uint32_t val, int *p_result, uint32_t *p_prsr)
 {
-	struct armv8_common *armv8 = target_to_armv8(target);
 	uint32_t prsr;
 	int retval;
 
-	retval = mem_ap_read_atomic_u32(armv8->debug_ap,
-			armv8->debug_base + CPUV8_DBG_PRSR, &prsr);
+	retval = aarch64_read_prsr(target, &prsr);
 	if (retval != ERROR_OK)
 		return retval;
 
@@ -506,16 +517,28 @@ static int update_halt_gdb(struct target *target, enum target_debug_reason debug
 
 static int aarch64_poll(struct target *target)
 {
+	struct armv8_common *armv8 = target_to_armv8(target);
 	enum target_state prev_target_state;
 	int retval = ERROR_OK;
-	int halted;
+	uint32_t prsr;
 
-	retval = aarch64_check_state_one(target,
-				PRSR_HALT, PRSR_HALT, &halted, NULL);
+	retval = aarch64_read_prsr(target, &prsr);
 	if (retval != ERROR_OK)
 		return retval;
 
-	if (halted) {
+	if (armv8->sticky_reset) {
+		armv8->sticky_reset = false;
+		if (target->state != TARGET_RESET) {
+			target->state = TARGET_RESET;
+			LOG_TARGET_INFO(target, "external reset detected");
+			if (armv8->arm.core_cache) {
+				register_cache_invalidate(armv8->arm.core_cache);
+				register_cache_invalidate(armv8->arm.core_cache->next);
+			}
+		}
+	}
+
+	if (prsr & PRSR_HALT) {
 		prev_target_state = target->state;
 		if (prev_target_state != TARGET_HALTED) {
 			enum target_debug_reason debug_reason = target->debug_reason;
@@ -546,8 +569,11 @@ static int aarch64_poll(struct target *target)
 				break;
 			}
 		}
-	} else
+	} else if (prsr & PRSR_RESET) {
+		target->state = TARGET_RESET;
+	} else {
 		target->state = TARGET_RUNNING;
+	}
 
 	return retval;
 }
@@ -663,8 +689,7 @@ static int aarch64_prepare_restart_one(struct target *target)
 
 	if (retval == ERROR_OK) {
 		/* clear sticky bits in PRSR, SDR is now 0 */
-		retval = mem_ap_read_atomic_u32(armv8->debug_ap,
-				armv8->debug_base + CPUV8_DBG_PRSR, &tmp);
+		retval = aarch64_read_prsr(target, &tmp);
 	}
 
 	return retval;
diff --git a/src/target/armv8.h b/src/target/armv8.h
index f5aa21109..156b5f8bb 100644
--- a/src/target/armv8.h
+++ b/src/target/armv8.h
@@ -213,6 +213,8 @@ struct armv8_common {
 	/* True if OpenOCD provides pointer auth related info to GDB */
 	bool enable_pauth;
 
+	bool sticky_reset;
+
 	/* last run-control command issued to this target (resume, halt, step) */
 	enum run_control_op last_run_control_op;
 

-----------------------------------------------------------------------

Summary of changes:
 src/target/aarch64.c | 49 +++++++++++++++++++++++++++++++++++++------------
 src/target/armv8.h   |  2 ++
 2 files changed, 39 insertions(+), 12 deletions(-)


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[openocd-gerrit <ope...@us...>]

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The branch, master has been updated
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      from  63ca9670321c1c057ee32e9925826f9f8c836005 (commit)

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- Log -----------------------------------------------------------------
commit fd7b66c5eb038185b72953821204ec9bb8ce49d1
Author: Jessica Clarke <jr...@jr...>
Date:   Thu Sep 12 20:12:05 2024 +0100

    binarybuffer: Fix inverted return value in buf_cmp
    
    This is the fast path for when there is a mismatch in the leading whole
    bytes, which means we should return true to indicate not equal like all
    the other cases here and in the surrounding functions. Otherwise we'll
    incorrectly report _buf1 == _buf2 if and only if there are mismatches in
    the leading whole bytes.
    
    This was introduced during the refactor and optimisation referenced
    below.
    
    The only in-tree caller of this is jtag_check_value_inner, which will
    just fail to catch some errors. However, downstream in riscv-openocd it
    gets used in the riscv target to determine whether an IR scan is needed
    to select the debug module, and with an IRLEN >= 8 this breaks resetting
    if the encoding for the DMI isn't all-ones in its leading whole bytes
    (to match BYPASS), since it will believe they are the same and not do an
    IR scan, failing (with "At least one TAP shouldn't be in BYPASS mode")
    in the subsequent DR scan due to the TAP still being recorded as having
    bypass set (and really having an instruction of either BYPASS or
    IDCODE).
    
    Fixes: e4ee891759b0 ("improve buf_cmp and buf_cmp_mask helpers")
    Change-Id: Ic4f7ed094429abc4c06a775eb847a8b3ddf2e2d6
    Signed-off-by: Jessica Clarke <jr...@jr...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8489
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Reviewed-by: Evgeniy Naydanov <evg...@sy...>
    Reviewed-by: Tomas Vanek <va...@fb...>
    Tested-by: jenkins

diff --git a/src/helper/binarybuffer.c b/src/helper/binarybuffer.c
index 423739a9d..c25383dc6 100644
--- a/src/helper/binarybuffer.c
+++ b/src/helper/binarybuffer.c
@@ -74,7 +74,7 @@ bool buf_cmp(const void *_buf1, const void *_buf2, unsigned size)
 
 	unsigned last = size / 8;
 	if (memcmp(_buf1, _buf2, last) != 0)
-		return false;
+		return true;
 
 	unsigned trailing = size % 8;
 	if (!trailing)

-----------------------------------------------------------------------

Summary of changes:
 src/helper/binarybuffer.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)


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- Log -----------------------------------------------------------------
commit 63ca9670321c1c057ee32e9925826f9f8c836005
Author: Marc Schink <de...@za...>
Date:   Wed Jul 3 15:16:27 2024 +0200

    README: Use proper Markdown syntax
    
    The README file contains a mixture of Markdown and non-Markdown syntax.
    Refurbish the document and use only Markdown syntax according to the
    specification in [1].
    
    [1] https://www.markdownguide.org/
    
    Change-Id: If58f4e2971dc798a03a78841226804ab1f2d33c8
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8387
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/README b/README
index 7d3f10def..950c71f70 100644
--- a/README
+++ b/README
@@ -1,5 +1,4 @@
-Welcome to OpenOCD!
-===================
+# Welcome to OpenOCD!
 
 OpenOCD provides on-chip programming and debugging support with a
 layered architecture of JTAG interface and TAP support including:
@@ -26,33 +25,33 @@ This README file contains an overview of the following topics:
 - packaging tips.
 
 
-============================
-Quickstart for the impatient
-============================
+# Quickstart for the impatient
 
 If you have a popular board then just start OpenOCD with its config,
 e.g.:
 
-  openocd -f board/stm32f4discovery.cfg
+    openocd -f board/stm32f4discovery.cfg
 
 If you are connecting a particular adapter with some specific target,
 you need to source both the jtag interface and the target configs,
 e.g.:
 
-  openocd -f interface/ftdi/jtagkey2.cfg -c "transport select jtag" \
-          -f target/ti_calypso.cfg
+```
+openocd -f interface/ftdi/jtagkey2.cfg -c "transport select jtag" \
+        -f target/ti_calypso.cfg
+```
 
-  openocd -f interface/stlink.cfg -c "transport select hla_swd" \
-          -f target/stm32l0.cfg
+```
+openocd -f interface/stlink.cfg -c "transport select hla_swd" \
+        -f target/stm32l0.cfg
+```
 
 After OpenOCD startup, connect GDB with
 
-  (gdb) target extended-remote localhost:3333
+    (gdb) target extended-remote localhost:3333
 
 
-=====================
-OpenOCD Documentation
-=====================
+# OpenOCD Documentation
 
 In addition to the in-tree documentation, the latest manuals may be
 viewed online at the following URLs:
@@ -71,35 +70,34 @@ by subscribing to the OpenOCD developer mailing list:
 
 	ope...@li...
 
-Building the OpenOCD Documentation
-----------------------------------
+## Building the OpenOCD Documentation
 
 By default the OpenOCD build process prepares documentation in the
-"Info format" and installs it the standard way, so that "info openocd"
+"Info format" and installs it the standard way, so that `info openocd`
 can access it.
 
 Additionally, the OpenOCD User's Guide can be produced in the
 following different formats:
 
-  # If PDFVIEWER is set, this creates and views the PDF User Guide.
-  make pdf && ${PDFVIEWER} doc/openocd.pdf
+If `PDFVIEWER` is set, this creates and views the PDF User Guide.
 
-  # If HTMLVIEWER is set, this creates and views the HTML User Guide.
-  make html && ${HTMLVIEWER} doc/openocd.html/index.html
+    make pdf && ${PDFVIEWER} doc/openocd.pdf
+
+If `HTMLVIEWER` is set, this creates and views the HTML User Guide.
+
+    make html && ${HTMLVIEWER} doc/openocd.html/index.html
 
 The OpenOCD Developer Manual contains information about the internal
 architecture and other details about the code:
 
-  # NB! make sure doxygen is installed, type doxygen --version
-  make doxygen && ${HTMLVIEWER} doxygen/index.html
+Note: make sure doxygen is installed, type doxygen --version
 
+    make doxygen && ${HTMLVIEWER} doxygen/index.html
 
-==================
-Supported hardware
-==================
 
-JTAG adapters
--------------
+# Supported hardware
+
+## JTAG adapters
 
 AM335x, ARM-JTAG-EW, ARM-USB-OCD, ARM-USB-TINY, AT91RM9200, axm0432, BCM2835,
 Bus Blaster, Buspirate, Cadence DPI, Cadence vdebug, Chameleon, CMSIS-DAP,
@@ -116,8 +114,7 @@ sysfsgpio, Tigard, TI XDS110, TUMPA, Turtelizer, ULINK, USB-A9260, USB-Blaster,
 USB-JTAG, USBprog, VPACLink, VSLLink, Wiggler, XDS100v2, Xilinx XVC/PCIe,
 Xverve.
 
-Debug targets
--------------
+## Debug targets
 
 ARM: AArch64, ARM11, ARM7, ARM9, Cortex-A/R (v7-A/R), Cortex-M (ARMv{6/7/8}-M),
 FA526, Feroceon/Dragonite, XScale.
@@ -125,8 +122,7 @@ ARCv2, AVR32, DSP563xx, DSP5680xx, EnSilica eSi-RISC, EJTAG (MIPS32, MIPS64),
 ESP32, ESP32-S2, ESP32-S3, Intel Quark, LS102x-SAP, RISC-V, ST STM8,
 Xtensa.
 
-Flash drivers
--------------
+## Flash drivers
 
 ADUC702x, AT91SAM, AT91SAM9 (NAND), ATH79, ATmega128RFA1, Atmel SAM, AVR, CFI,
 DSP5680xx, EFM32, EM357, eSi-RISC, eSi-TSMC, EZR32HG, FM3, FM4, Freedom E SPI,
@@ -140,12 +136,9 @@ TI CC13xx, TI CC26xx, TI CC32xx, TI MSP432, Winner Micro w600, Xilinx XCF,
 XMC1xxx, XMC4xxx.
 
 
-==================
-Installing OpenOCD
-==================
+# Installing OpenOCD
 
-A Note to OpenOCD Users
------------------------
+## A Note to OpenOCD Users
 
 If you would rather be working "with" OpenOCD rather than "on" it, your
 operating system or JTAG interface supplier may provide binaries for
@@ -164,8 +157,7 @@ Users of these binary versions of OpenOCD must contact their Packager to
 ask for support or newer versions of the binaries; the OpenOCD
 developers do not support packages directly.
 
-A Note to OpenOCD Packagers
----------------------------
+## A Note to OpenOCD Packagers
 
 You are a PACKAGER of OpenOCD if you:
 
@@ -192,11 +184,9 @@ suggestions:
 - Use "ftdi" interface adapter driver for the FTDI-based devices.
 
 
-================
-Building OpenOCD
-================
+# Building OpenOCD
 
-The INSTALL file contains generic instructions for running 'configure'
+The INSTALL file contains generic instructions for running `configure`
 and compiling the OpenOCD source code. That file is provided by
 default for all GNU autotools packages. If you are not familiar with
 the GNU autotools, then you should read those instructions first.
@@ -204,8 +194,7 @@ the GNU autotools, then you should read those instructions first.
 The remainder of this document tries to provide some instructions for
 those looking for a quick-install.
 
-OpenOCD Dependencies
---------------------
+## OpenOCD Dependencies
 
 GCC or Clang is currently required to build OpenOCD. The developers
 have begun to enforce strict code warnings (-Wall, -Werror, -Wextra,
@@ -250,8 +239,7 @@ Optional development script checkpatch needs:
 - python
 - python-ply
 
-Permissions delegation
-----------------------
+## Permissions delegation
 
 Running OpenOCD with root/administrative permissions is strongly
 discouraged for security reasons.
@@ -268,89 +256,81 @@ For parport adapters on Windows you need to run install_giveio.bat
 (it's also possible to use "ioperm" with Cygwin instead) to give
 ordinary users permissions for accessing the "LPT" registers directly.
 
-Compiling OpenOCD
------------------
+## Compiling OpenOCD
 
 To build OpenOCD, use the following sequence of commands:
 
-  ./bootstrap (when building from the git repository)
-  ./configure [options]
-  make
-  sudo make install
+    ./bootstrap
+    ./configure [options]
+    make
+    sudo make install
 
-The 'configure' step generates the Makefiles required to build
+The `bootstrap` command is only necessary when building from the Git repository. The `configure` step generates the Makefiles required to build
 OpenOCD, usually with one or more options provided to it. The first
 'make' step will build OpenOCD and place the final executable in
-'./src/'. The final (optional) step, ``make install'', places all of
+'./src/'. The final (optional) step, `make install`, places all of
 the files in the required location.
 
-To see the list of all the supported options, run
-  ./configure --help
+To see the list of all the supported options, run `./configure --help`
 
-Cross-compiling Options
------------------------
+## Cross-compiling Options
 
 Cross-compiling is supported the standard autotools way, you just need
 to specify the cross-compiling target triplet in the --host option,
 e.g. for cross-building for Windows 32-bit with MinGW on Debian:
 
-  ./configure --host=i686-w64-mingw32 [options]
+    ./configure --host=i686-w64-mingw32 [options]
 
 To make pkg-config work nicely for cross-compiling, you might need an
 additional wrapper script as described at
 
-  https://autotools.io/pkgconfig/cross-compiling.html
+    https://autotools.io/pkgconfig/cross-compiling.html
 
 This is needed to tell pkg-config where to look for the target
 libraries that OpenOCD depends on. Alternatively, you can specify
-*_CFLAGS and *_LIBS environment variables directly, see "./configure
---help" for the details.
+`*_CFLAGS` and `*_LIBS` environment variables directly, see `./configure
+--help` for the details.
 
 For a more or less complete script that does all this for you, see
 
-  contrib/cross-build.sh
+    contrib/cross-build.sh
 
-Parallel Port Dongles
----------------------
+## Parallel Port Dongles
 
 If you want to access the parallel port using the PPDEV interface you
-have to specify both --enable-parport AND --enable-parport-ppdev, since
+have to specify both `--enable-parport` and `--enable-parport-ppdev`, since
 the later option is an option to the parport driver.
 
-The same is true for the --enable-parport-giveio option, you have to
-use both the --enable-parport AND the --enable-parport-giveio option
+The same is true for the `--enable-parport-giveio` option, you have to
+use both the `--enable-parport` and the `--enable-parport-giveio` option
 if you want to use giveio instead of ioperm parallel port access
 method.
 
 
-==========================
-Obtaining OpenOCD From GIT
-==========================
+# Obtaining OpenOCD From GIT
 
 You can download the current GIT version with a GIT client of your
 choice from the main repository:
 
-   git://git.code.sf.net/p/openocd/code
+    git://git.code.sf.net/p/openocd/code
 
 You may prefer to use a mirror:
 
-   http://repo.or.cz/r/openocd.git
-   git://repo.or.cz/openocd.git
+    http://repo.or.cz/r/openocd.git
+    git://repo.or.cz/openocd.git
 
 Using the GIT command line client, you might use the following command
 to set up a local copy of the current repository (make sure there is no
 directory called "openocd" in the current directory):
 
-   git clone git://git.code.sf.net/p/openocd/code openocd
-
-Then you can update that at your convenience using
+    git clone git://git.code.sf.net/p/openocd/code openocd
 
-   git pull
+Then you can update that at your convenience using `git pull`.
 
 There is also a gitweb interface, which you can use either to browse
 the repository or to download arbitrary snapshots using HTTP:
 
-   http://repo.or.cz/w/openocd.git
+    http://repo.or.cz/w/openocd.git
 
 Snapshots are compressed tarballs of the source tree, about 1.3 MBytes
 each at this writing.

-----------------------------------------------------------------------

Summary of changes:
 README | 140 ++++++++++++++++++++++++++++-------------------------------------
 1 file changed, 60 insertions(+), 80 deletions(-)


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