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From: BERTRAND J. <joe...@sy...> - 2022-03-15 14:58:52
|
Holger Vogt a écrit : > Probably you are driving U3 outside of allowed range. I guess the OpAmp > is not rail to rail, so an output near 0 will be wrong, or non-linear > etc. When you replace the 0 power connection of U3 by a -12V source, the > simulation outcome is totally different. > > Single supply operation of an old OpAmp is always at risk. This AOP is a rail to rail amplifier. But when I have put -12V to U3 Vss, I have found my mistake. I have swapped V1 and V2 :-( Sorry for the noise, JB |
From: Holger V. <hol...@un...> - 2022-03-15 14:45:52
|
Probably you are driving U3 outside of allowed range. I guess the OpAmp is not rail to rail, so an output near 0 will be wrong, or non-linear etc. When you replace the 0 power connection of U3 by a -12V source, the simulation outcome is totally different. Single supply operation of an old OpAmp is always at risk. |
From: BERTRAND J. <joe...@sy...> - 2022-03-15 14:02:25
|
Hello, Let consider the following circuit : https://hilbert.systella.fr/public/schema.pdf If I put a wire between pin 1 and 2 of TP6, voltage on pint 1 of TP7 is less than 3 mV. Now, if K1 connects 2.5V source, voltage on pin 1 of TP7 is around 0.805 V. I want to obtain 10V between sensors+ and sensor-. Expected voltage on pin 1, if amplifier is linear, should be 4*0.805 V. But when I measure 3.22 V on TP7, I only have 8,85 V on input. I don't understand why this circuit is not linear, thus I have tried to do an ngspice simulation : https://hilbert.systella.fr/public/sim_ampli_metrologie.pdf U1 and U2 seem to run as expected but U3 doesn't and I don't understand why. That being said, experimental results and simulations are very different. Idea will be welcome to fix my simulation (or my real circuit ;-) ). Best regards, JB |
From: Akshay K. <kul...@gm...> - 2022-03-12 18:51:20
|
Alright, got it. Thanks again for replying 😄, Akshay On Sat, 12 Mar, 2022, 7:39 pm Kevin Zheng, <kev...@gm...> wrote: > On 3/12/22 10:23 AM, Akshay Kulkarni wrote: > > Thanks a lot for replying. > > I really appreciate your time. > > > > One last question: I was then wondering if we would have phase noise > > analysis possible in ngspice in future releases? Any plans related to > that? > > I'm not very involved in ngspice development, so you probably want to > hear from someone who is. > > I'm not currently aware of plans to include phase noise analysis, which, > while certainly would be welcome, require the right combination of > simulation knowledge and knowledge about ngspice. > > Best of luck with your simulation. > > Regards, > Kevin > |
From: Kevin Z. <kev...@gm...> - 2022-03-12 18:39:30
|
On 3/12/22 10:23 AM, Akshay Kulkarni wrote: > Thanks a lot for replying. > I really appreciate your time. > > One last question: I was then wondering if we would have phase noise > analysis possible in ngspice in future releases? Any plans related to that? I'm not very involved in ngspice development, so you probably want to hear from someone who is. I'm not currently aware of plans to include phase noise analysis, which, while certainly would be welcome, require the right combination of simulation knowledge and knowledge about ngspice. Best of luck with your simulation. Regards, Kevin |
From: Akshay K. <kul...@gm...> - 2022-03-12 18:24:16
|
Hi Kevin, Thanks a lot for replying. I really appreciate your time. One last question: I was then wondering if we would have phase noise analysis possible in ngspice in future releases? Any plans related to that? Thanks a lot again, Akshay On Sat, Mar 12, 2022 at 6:54 PM Kevin Zheng <kev...@gm...> wrote: > Hi Akshay, > > On 3/10/22 12:18 PM, Akshay Kulkarni wrote: > > This is Akshay Kulkarni and I am currently working on PLL with ngspice. > > > > I was getting the phase noise at the output of PLL and I was not really > > sure if the noise analysis that is present in the ngspice can perform > that. > > > > My question is -> Does noise analysis in ngspice give out phase noise? > > No, it does not. > > 'noise' analysis in ngspice is small-signal AC noise analysis. Imagine > that ngspice computes equivalent noise sources for each component than > contributes noise (e.g. resistors, transistors) and computes how much > noise goes to the output, then sums them all up. This noise analysis is > applicable to amplifiers. > > To simulate phase noise, you would need a simulator that supports it > (spectre from Cadence, for example). In such simulators, you compute a > periodic operating point using shooting Newton ('pss') or harmonic > balance ('hb'), then compute the periodic noise ('pnoise'). > > Regards, > Kevin > |
From: Kevin Z. <kev...@gm...> - 2022-03-12 17:54:40
|
Hi Akshay, On 3/10/22 12:18 PM, Akshay Kulkarni wrote: > This is Akshay Kulkarni and I am currently working on PLL with ngspice. > > I was getting the phase noise at the output of PLL and I was not really > sure if the noise analysis that is present in the ngspice can perform that. > > My question is -> Does noise analysis in ngspice give out phase noise? No, it does not. 'noise' analysis in ngspice is small-signal AC noise analysis. Imagine that ngspice computes equivalent noise sources for each component than contributes noise (e.g. resistors, transistors) and computes how much noise goes to the output, then sums them all up. This noise analysis is applicable to amplifiers. To simulate phase noise, you would need a simulator that supports it (spectre from Cadence, for example). In such simulators, you compute a periodic operating point using shooting Newton ('pss') or harmonic balance ('hb'), then compute the periodic noise ('pnoise'). Regards, Kevin |
From: Akshay K. <kul...@gm...> - 2022-03-10 20:18:47
|
Hello, This is Akshay Kulkarni and I am currently working on PLL with ngspice. I was getting the phase noise at the output of PLL and I was not really sure if the noise analysis that is present in the ngspice can perform that. My question is -> Does noise analysis in ngspice give out phase noise? When I ran the noise analysis, I got 2 noise results: - noise2 - noise3 noise 2 was related to noise spectral density and noise3 was the total noise in design. So, are noise2 and noise3 results related to phase noise ? If not, could you please tell me what are they related to? Thanks, Akshay |
From: Thomas D. D. <to...@wa...> - 2022-03-04 17:04:10
|
On 3/2/22 3:43 AM, BERTRAND Joël wrote: > Hello, > > I'm looking for a TL5001/TL5001A model. This model seems to be > available in PSpice (but I don't have PSpice, I have tried to install > trial versio without success). Does someone confirm this model is > available in PSpice ? And if yes, is this model usable in ngspice ? TI recommends a replacement. If the outside specs are close maybe you can use this spice model? |
From: <ng...@at...> - 2022-03-04 16:43:00
|
Please ignore my question. My code was emitting an exception whenever a message passed to `printfcn` in sharedspice.h started with "stderr". This left the library in an undefined state, so of course subsequent calls lead to instability... On 03/03/2022 12:52, ng...@at... wrote: > Hi ngspice users/developers, > > I'm encountering fatal errors when using ngspice as a shared library in > certain circumstances, such as when a netlist doesn't contain an ".end" > statement. One error message is "Error: ngspice.dll cannot recover and > awaits to be detached", which is emitted by sharedspice.c. It seems that > the program becomes unrecoverable/unstable upon such an error, even > after issuing "destroy all", "reset", etc. I can work around it by > reloading the DLL at runtime, but for packaging reasons I'd prefer to > link ngspice at compile time. > > Is there a function accessible from sharedspice.h that resets everything > back to its default state that would work after such an error? > > Cheers, > > > Sean |
From: <ng...@at...> - 2022-03-03 12:12:27
|
Hi ngspice users/developers, I'm encountering fatal errors when using ngspice as a shared library in certain circumstances, such as when a netlist doesn't contain an ".end" statement. One error message is "Error: ngspice.dll cannot recover and awaits to be detached", which is emitted by sharedspice.c. It seems that the program becomes unrecoverable/unstable upon such an error, even after issuing "destroy all", "reset", etc. I can work around it by reloading the DLL at runtime, but for packaging reasons I'd prefer to link ngspice at compile time. Is there a function accessible from sharedspice.h that resets everything back to its default state that would work after such an error? Cheers, Sean |
From: <mh...@ia...> - 2022-03-03 07:03:24
|
On 2022-03-02 12:15, Roland Bruns wrote: > Hi, > obtaining S-Parameters from a simulation is well documented and works > good. > But what if I have S-Parameters for a device (in my case ad8307) and > want to use > them in an AC simulation? > > There is a paper "Create S-Parameter Subcircuits for Microwave and RF > Applications" > where a simulation model is shown for pspice. The shown solution leads > to a VCVS > with a FREQ option: > > Exxxx n1 n2 FREQ {V(x,y)}= MAG > +( 0.01gHz, 1.00, -0.2) > ..... > > As far as I know, using FREQ for a Exxxx Source is not possible in > ngspice. > Is there an other way to do use S-Parameter in ngspice AFAIR, this FREQ option for behavioral sources is the only feature of PSPICE that NGSPICE does not support. However, it is always possible to find a linear equivalent circuit that shows a given frequency response. A complication is that such circuits will have to be causal (and, I guess, passive), which is a property that an arbitrary frequency response epecification can easily violate. What happens in PSPICE if one specifies a filter with an infinitely steep cut-off? An alternative possibility, with the same restrictions as above, is using the LAPLACE option of a behavioral source. What is needed is a program (e.g. Octave) to compute the set of zeros and poles that match a desired amplitude response (the phase response can not be specified because of the causality and passivity constraints). -marcel |
From: Holger V. <hol...@un...> - 2022-03-02 22:09:44
|
Please see https://sourceforge.net/p/ngspice/discussion/127605/thread/7a2655c86f/?limit=25#a12e Alessio will start working on these issues. Currently I cannot offer any solution. |
From: BERTRAND J. <joe...@sy...> - 2022-03-02 16:24:47
|
Holger Vogt a écrit : > This attached link seems to indicate that there is no spice model > available for the TL5001: > > https://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/511621/tl5001-spice-model I know, but there is a model in Pspice... But I don't know if this model is usable in ngspice and I'm unable to install Pspice. Maybe I'll obtain a licence a license soon to check. JKB |
From: Holger V. <hol...@un...> - 2022-03-02 16:18:10
|
This attached link seems to indicate that there is no spice model available for the TL5001: https://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/511621/tl5001-spice-model |
From: BERTRAND J. <joe...@sy...> - 2022-03-02 12:03:04
|
Hello, I'm looking for a TL5001/TL5001A model. This model seems to be available in PSpice (but I don't have PSpice, I have tried to install trial versio without success). Does someone confirm this model is available in PSpice ? And if yes, is this model usable in ngspice ? Best regards, JB |
From: Roland B. <rol...@bp...> - 2022-03-02 11:29:14
|
Hi, obtaining S-Parameters from a simulation is well documented and works good. But what if I have S-Parameters for a device (in my case ad8307) and want to use them in an AC simulation? There is a paper "Create S-Parameter Subcircuits for Microwave and RF Applications" where a simulation model is shown for pspice. The shown solution leads to a VCVS with a FREQ option: Exxxx n1 n2 FREQ {V(x,y)}= MAG +( 0.01gHz, 1.00, -0.2) ..... As far as I know, using FREQ for a Exxxx Source is not possible in ngspice. Is there an other way to do use S-Parameter in ngspice Best regards Roland |
From: <ng...@at...> - 2022-02-22 21:21:45
|
Perfect, that worked, thanks! On 22/02/2022 21:41, Holger Vogt wrote: > The command is 'destroy all' > > > _______________________________________________ > Ngspice-users mailing list > Ngs...@li... > https://lists.sourceforge.net/lists/listinfo/ngspice-users |
From: Holger V. <hol...@un...> - 2022-02-22 20:41:17
|
The command is 'destroy all' |
From: <ng...@at...> - 2022-02-22 19:44:59
|
Hi ngspice users, I've been using sharedspice.h to interact with ngspice as a static library. I noticed that plots are not reset back to the default before the next simulation run. This means that if I parse a netlist with a syntax error after having already run a simulation successfully, the results returned by ngGet_Vec_Info() etc. refer to the previous successful run. I naively expected these to be null or the default listed in src/frontend/plotting/plotting.c. I looked for a command in the manual to reset the state of ngspice back to the default (where its only plot is the constants as defined in src/frontend/plotting/plotting.c), but couldn't find one. Is there such a command to reset the plot state back to the default? If there is not such a command, is there a way to reset ALL of ngspice's state back to default (short of restarting my program)? Best wishes, Sean Leavey |
From: JP C. <JP...@cy...> - 2022-02-10 01:17:46
|
Hi, thanks for the response and apologies, I didn't put in any netlist because my question pertained to the plot function so netlist was irrelevant. But below is an example that will now let you run and see what I'm seeing. I tried putting ac1 within the v() but it didn't change anything. I'm confused why it doesn't keep the frequency x-axis. Regards, JP * start of netlist * ISRC VPWR VG DC 1n AC 100p $ this current source is used to control several F devices (CCCS) VSRC VG 0 $ used to get source current FSRC1 VCOM OUT1 VSRC 1 $ current controlled current source with gain of 1, one of several FSRCs R1 GR1 OUT1 256G VR1 GR1 0 C1 OUT1 VCOM 10f R2 OUT1 0 1G vpower VPWR 0 3.3V VCOM VCOM 0 3.3V *analysis section .dc ISRC 1p 10n 1p .control ac dec 100 1 1MEG $ this acts on ISRC which then acts on all of the FSRCs run plot i(VSRC) xlog xlimit 1p 10n ylog $ this works fine plot v(dc1.OUT1) xlog xlimit 1p 10n ylimit 0 3.5 $ this works fine plot v(ac1.OUT1) xlog xlimit 1 1MEG $ this works fine, x-axis is log frequency from 1Hz to 1e6Hz plot abs(v(ac1.OUT1)) xlog xlimit 1 1MEG $ this is not working, x-axis is "i-sweep" current from 1A to 1e6A plot db(v(ac1.OUT1)) xlog xlimit 1 1MEG $ this is not working, x-axis is "i-sweep" current from 1A to 1e6A .endc .end * end of netlist * what I get from setplot and display commands: *ngspice 1 -> setplot *List of plots available: * *Current dc1 * (DC transfer characteristic) * ac1 * (AC Analysis) * const Constant values (constants) *ngspice 2 -> display *Here are the vectors currently active: * *Title: * *Name: dc1 (DC transfer characteristic) *Date: Wed Feb 9 16:32:24 2022 * * gr1 : voltage, real, 10000 long * i-sweep : current, real, 10000 long [default scale] * out1 : voltage, real, 10000 long * vcom : voltage, real, 10000 long * vcom#branch : current, real, 10000 long * vg : voltage, real, 10000 long * vpower#branch : current, real, 10000 long * vpwr : voltage, real, 10000 long * vr1#branch : current, real, 10000 long * vsrc#branch : current, real, 10000 long *ngspice 3 -> -----Original Message----- From: Holger Vogt <hol...@un...> Sent: Wednesday, February 9, 2022 8:27 AM To: ngs...@li... Subject: Re: [Ngspice-users] confusion on plotting ac analysis Unfortunately you do not provide a working netlist. So my guess on the correcct syntax is this: plot v(dc1.SRC1) xlog xlimit 1p 10n ylimit 0 3.5 plot v(dc1.OUT1) xlog xlimit 1p 10n ylimit 0 3.5 plot v(ac1.OUT1) xlog xlimit 1 1MEG plot abs(v(ac1.OUT1)) xlog xlimit 1 1MEG plot db(v(ac1.OUT1)) xlog xlimit 1 1MEG Use the 'setplot' and 'display' commands to figure out which vectors are available. _______________________________________________ Ngspice-users mailing list Ngs...@li... https://lists.sourceforge.net/lists/listinfo/ngspice-users |
From: Holger V. <hol...@un...> - 2022-02-09 16:27:31
|
Unfortunately you do not provide a working netlist. So my guess on the correcct syntax is this: plot v(dc1.SRC1) xlog xlimit 1p 10n ylimit 0 3.5 plot v(dc1.OUT1) xlog xlimit 1p 10n ylimit 0 3.5 plot v(ac1.OUT1) xlog xlimit 1 1MEG plot abs(v(ac1.OUT1)) xlog xlimit 1 1MEG plot db(v(ac1.OUT1)) xlog xlimit 1 1MEG Use the 'setplot' and 'display' commands to figure out which vectors are available. |
From: JP C. <JP...@cy...> - 2022-02-09 01:22:24
|
Hi, I've got a simulation working with dc analysis and am adding ac analysis to it now but only one of my ac plots is putting out the correct x-axis of frequency, the other plots show current on x-axis. Below is a condensed version of my circuit, see my comments on the plot statements $. Can you please explain how I can always get plots vs frequency from after using abs() or db() operators on ac results? It doesn't matter if I take off the xlimits, the last 2 plot statements still plot vs current (it autoscales current 1e-12 to 1e-8, on scale with the input source). Thanks. Regards, JP * ISRC VPWR VGND DC 1n AC 100p $ this current source is used to control several F devices (CCCS) VSRC VGND 0 $ used to get source current FSRC1 VCOM SRC1 VSRC 1 $ current controlled current source with gain of 1, one of several FSRCs *... *circuit netlist and model includes *... *analysis section .dc ISRC 1p 10n 1p .control ac dec 100 1 1MEG $ this acts on ISRC which then acts on all of the FSRCs run plot dc.v(SRC1) xlog xlimit 1p 10n ylimit 0 3.5 $ this works fine plot dc.v(OUT1) xlog xlimit 1p 10n ylimit 0 3.5 $ this works fine plot ac.v(OUT1) xlog xlimit 1 1MEG $ this works fine, x-axis is log frequency from 1Hz to 1e6Hz plot abs(ac.v(OUT1)) xlog xlimit 1 1MEG $ this is not working, x-axis is "i-sweep" current from 1A to 1e6A plot db(ac.v(OUT1)) xlog xlimit 1 1MEG $ this is not working, x-axis is "i-sweep" current from 1A to 1e6A .endc .end |
From: BERTRAND J. <joe...@sy...> - 2022-01-07 09:14:07
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Holger Vogt a écrit : > Bertrand, > > your model uses references to two subcircuits not shown in your posting: > 74HCT_IN_1 and 74HCT_OUT_1X. > The model also uses an A device A1 which is not or badly documented and > not ngspice compatible. > > You may defines your own model, using ngspice code models (XOR and A/D > and D/A interfaces), similar to: Thanks a lot, your subcircuit runs as expected. Regards, JKB |
From: Holger V. <hol...@un...> - 2022-01-06 16:43:21
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Bertrand, your model uses references to two subcircuits not shown in your posting: 74HCT_IN_1 and 74HCT_OUT_1X. The model also uses an A device A1 which is not or badly documented and not ngspice compatible. You may defines your own model, using ngspice code models (XOR and A/D and D/A interfaces), similar to: ~~~ .SUBCKT 74HCT86 A B Y * XOR a9 [dAi DBi] dYi xor3 .model xor3 d_xor(rise_delay = 0.5e-9 fall_delay = 0.3e-9 + input_load = 0.5e-12) * D/A abridge1 [dYi] [Y] dac1 .model dac1 dac_bridge(out_low = 0.0 out_high = 5.0 out_undef = 2.5 + input_load = 5.0e-12 t_rise = 50e-9 + t_fall = 20e-9) *A/D abridge2 [A] [dAi] adc_buff abridge3 [B] [dBi] adc_buff .model adc_buff adc_bridge(in_low = 0.3 in_high = 3.5) .ends ~~~ (not tested) Ris, fall and delay times have to be adapted to the LTSPICE model. We have started working on PSPICE compatible digital device models, but that may take some time. |