ngspice-users — The users mailing list for ngspice (general discussions).

Re: [Ngspice-users] Novice questions

[David <bou...@gm...>]

On Sat, 31 May 2025 at 07:54, Dave Flogeras via Ngspice-users
<ngs...@li...> wrote:

> I'm fairly new to ngspice (I used some spice variant a bit 25+ years ago
> in school, but very little since).  I am attempting to use (or abuse?) it
> as a learning tool by getting it to solve systems that are effectively
> block diagrams of Laplace transforms that describe electro/mechanical
> systems.

> I have the usual growing pains, and wondered if I could share a simple
> example or two to discuss.  I'm not sure the best way to do this.
> Ideally I'd submit a couple of pictures showing my block diagrams, and
> boiled down circuit file(s) that I've used to attempt to model the
> system.  I don't want to abuse the mailing list etiquette though so
> I thought I'd as first how best to post.  I'm sure just by using gmail
> I'm annoying people with HTML.

Hi,

Ngspice has active discussion forums on the web at:

  https://sourceforge.net/p/ngspice/discussion/

where posting image files for discussion is very common.

The developers are active there and very helpful.

Is that what you are looking for?

Also, I think there is a way to disable HTML in Gmail, I believe I have
done that, so I hope there is no html in this message :)

[Ngspice-users] Novice questions

[Dave F. <da...@re...>]

Hi list:

I'm fairly new to ngspice (I used some spice variant a bit 25+ years ago in
school, but very little since).  I am attempting to use (or abuse?) it as a
learning tool by getting it to solve systems that are effectively block
diagrams of Laplace transforms that describe electro/mechanical systems.

I have the usual growing pains, and wondered if I could share a simple
example or two to discuss.  I'm not sure the best way to do this.  Ideally
I'd submit a couple of pictures showing my block diagrams, and boiled down
circuit file(s) that I've used to attempt to model the system.  I don't
want to abuse the mailing list etiquette though so I thought I'd as first
how best to post.  I'm sure just by using gmail I'm annoying people with
HTML.

Please advise,
Thanks,
Dave

Re: [Ngspice-users] Are pointers to data structures in the SendData callback function constant?

[Holger V. <hol...@un...>]

I have had a look at the source code. The following is added to the manual:

When a new simulation (op, dc, ac, tran etc.) is started, a new 'plot' 
structure (see [sec:Plots]) with its vectors is set up. Several data 
structures, as described above, are set up as well, belonging to this 
'plot': pvecinfo with vecinfo for each vector, vecinfoall, vecvaluesall, 
pvecvalues, and vecvalues for each vector. Their pointers are kept 
constant during the current simulation, they are created anew when 
another simulation is executed.

You might find this code in sharedspice.c, lines 2241 ff., in function 
sh_vecinit().

[Ngspice-users] Are pointers to data structures in the SendData callback function constant?

[Härtel, R. <rom...@ht...>]

The use case is a transient simulation using the shared ngspice API.

The access of data values requires to search through all instances for a
desired "vecvalues" structure. The manual doesn't provide a statement
whether this instance pointer is constant in the repeatedly SendData
callbacks for each time step. As this is not explicitly specified, this
search is necessary in any SendData call to avoid accessing a wrong pointer.
At least, I think so. But I suppose this to require significant CPU
resources for the string comparison for all vectors and decreases the
simulation speed. I think about running the search process once at the
beginning, storing the pointer value and directly acess it in subsequent
calls. A test with checking the pointer address in every SendData call
indicated a constant pointer address. But how to be sure?

Are pointers to data structures in the SendData callback function constant?
Alternatively, is this condition true for a subset of data structures?

I'd recommend to add this information in the manual. To me it seems
important for an efficient use of the shared library and a fast simulation
speed.

Best Regards,

R. Härtel

Re: [Ngspice-users] ngspice fails to build with -Werror=implicit-function-declaration

[Carsten S. <c.s...@t-...>]

Hi Holger,

Am 16.03.24 um 23:15 schrieb Holger Vogt:
> The fix is probably trivial, but I currently cannot test it, as I do no
> have editline available:
> 
> 
> diff --git a/src/main.c b/src/main.c
> index 6b3f2cf36..698637cbb 100644
> --- a/src/main.c
> +++ b/src/main.c
> @@ -26,6 +26,7 @@
>       It is not vailable with older libedit versions (pre-1.42.2) , thus
> we have to set it ourselves */
>    #ifdef HAVE_BSDEDITLINE
>    #include <editline/readline.h>
> +#include "../misc/tilde.h"
>    #ifndef rl_hook_func_t
>        typedef int rl_hook_func_t(void);
>    #endif

the fix is really that simple! I can build ngspice with that small 
modification. Thank you!

Added your suggested change as a patch for your convenience.

-- 
Regards
Carsten

Re: [Ngspice-users] ngspice fails to build with -Werror=implicit-function-declaration

[Holger V. <hol...@un...>]

The fix is probably trivial, but I currently cannot test it, as I do no 
have editline available:


diff --git a/src/main.c b/src/main.c
index 6b3f2cf36..698637cbb 100644
--- a/src/main.c
+++ b/src/main.c
@@ -26,6 +26,7 @@
     It is not vailable with older libedit versions (pre-1.42.2) , thus 
we have to set it ourselves */
  #ifdef HAVE_BSDEDITLINE
  #include <editline/readline.h>
+#include "../misc/tilde.h"
  #ifndef rl_hook_func_t
      typedef int rl_hook_func_t(void);
  #endif

[Ngspice-users] ngspice fails to build with -Werror=implicit-function-declaration

[Carsten S. <c.s...@t-...>]

Hi,

Debian did recently switch the compiler flag 
-Werror=implicit-function-declaration by default to be enabled [1].

This was done because of the ongoing 64bit-time migration to avoid 
misbehaving software.

ngspice is affected by failing to build from source since that switch [2].

Knowledge on the internals of the ngsipce source code is not existing on 
my side, so I hereby would like to encourage the upstream authors to 
have a look at the current build failures and try to fix the real issue. 
A foll build log is visible at [3].

Thanks!


[1] 
https://wiki.debian.org/qa.debian.org/FTBFS#A2024-03-13_-Werror.3Dimplicit-function-declaration
[2] https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=1066482
[3] http://qa-logs.debian.net/2024/03/13/ngspice_42+ds-2_unstable.log

---
Regards
Carsten

Re: [Ngspice-users] There aren't any circuits loaded, and 'set ngdebug=true' produces no change

[Frederico C W. <fr...@gm...>]

Found my mistake .,


On invoking ngspice , mixed the output (-r  ) with the netname .,;..



Sorry about the disturbance.


Best Regards.



Em 10/02/2024 13:19, Frederico C Wilhelms escreveu:
> Hi All,
>
>
> Can't figure out why there is no circuit generation.,
>
>
> * lepton-netlist -g spice-sdb -O sort_mode -o teste324_01.net 
> teste324_01.sch
> *********************************************************
> * Spice file generated by lepton-netlist                *
> * spice-sdb by SDB                                      *
> * provides advanced spice netlisting capability.        *
> * Documentation at wiki.geda-project.org/geda:csygas    *
> *********************************************************
> *vvvvvvvv  Included SPICE model from 
> /home/fred/Downloads/Z80/ngspice/modelos_subckt/lm324.mod vvvvvvvv
> *//////////////////////////////////////////////////////////////////////
> * (C) National Semiconductor, Inc.
> * Models developed and under copyright by:
> * National Semiconductor, Inc.
>
> */////////////////////////////////////////////////////////////////////
> * Legal Notice: This material is intended for free software support.
> * The file may be copied, and distributed; however, reselling the
> *  material is illegal
>
> *////////////////////////////////////////////////////////////////////
> * For ordering or technical information on these models, contact:
> * National Semiconductor's Customer Response Center
> *                 7:00 A.M.--7:00 P.M.  U.S. Central Time
> *                                (800) 272-9959
> * For Applications support, contact the Internet address:
> *  amp...@ga...
>
> *//////////////////////////////////////////////////////////
> *LM324 Low Power Quad OPERATIONAL AMPLIFIER MACRO-MODEL
> *//////////////////////////////////////////////////////////
> *
> * connections:      non-inverting input
> *                   |   inverting input
> *                   |   |   positive power supply
> *                   |   |   |   negative power supply
> *                   |   |   |   |   output
> *                   |   |   |   |   |
> *                   |   |   |   |   |
> .SUBCKT LM324/NS    1   2  99  50  28
> *
> *Features:
> *Eliminates need for dual supplies
> *Large DC voltage gain =             100dB
> *High bandwidth =                     1MHz
> *Low input offset voltage =            2mV
> *Wide supply range =        +-1.5V to +-16V
> *
> *NOTE: Model is for single device only and simulated
> *      supply current is 1/4 of total device current.
> *      Output crossover distortion with dual supplies
> *      is not modeled.
> *
> ****************INPUT STAGE**************
> *
> IOS 2 1 5N
> *^Input offset current
> R1 1 3 500K
> R2 3 2 500K
> I1 99 4 100U
> R3 5 50 517
> R4 6 50 517
> Q1 5 2 4 QX
> Q2 6 7 4 QX
> *Fp2=1.2 MHz
> C4 5 6 128.27P
> *
> ***********COMMON MODE EFFECT***********
> *
> I2 99 50 75U
> *^Quiescent supply current
> EOS 7 1 POLY(1) 16 49 2E-3 1
> *Input offset voltage.^
> R8 99 49 60K
> R9 49 50 60K
> *
> *********OUTPUT VOLTAGE LIMITING********
> V2 99 8 1.63
> D1 9 8 DX
> D2 10 9 DX
> V3 10 50 .635
> *
> **************SECOND STAGE**************
> *
> EH 99 98 99 49 1
> G1 98 9 POLY(1) 5 6 0 9.8772E-4 0 .3459
> *Fp1=7.86 Hz
> R5 98 9 101.2433MEG
> C3 98 9 200P
> *
> ***************POLE STAGE***************
> *
> *Fp=2 MHz
> G3 98 15 9 49 1E-6
> R12 98 15 1MEG
> C5 98 15 7.9577E-14
> *
> *********COMMON-MODE ZERO STAGE*********
> *
> *Fpcm=10 KHz
> G4 98 16 3 49 5.6234E-8
> L2 98 17 15.9M
> R13 17 16 1K
> *
> **************OUTPUT STAGE**************
> *
> F6 50 99 POLY(1) V6 300U 1
> E1 99 23 99 15 1
> R16 24 23 17.5
> D5 26 24 DX
> V6 26 22 .63V
> R17 23 25 17.5
> D6 25 27 DX
> V7 22 27 .63V
> V5 22 21 0.27V
> D4 21 15 DX
> V4 20 22 0.27V
> D3 15 20 DX
> L3 22 28 500P
> RL3 22 28 100K
> *
> ***************MODELS USED**************
> *
> .MODEL DX D(IS=1E-15)
> .MODEL QX PNP(BF=1.111E3)
> *
> .ENDS
> *$
> *^^^^^^^^  End of included SPICE model from 
> /home/fred/Downloads/Z80/ngspice/modelos_subckt/lm324.mod ^^^^^^^^
> *
> *==============  Begin SPICE netlist of main design ============
> R1 +5V vIN 10k
> R2 2 vIN 10k
> R3 0 vIN 10k
> R4 1 vADJ 10k
> R5 0 1 10k
> R6 0 vADJ 300
> V1 2 0 DC 0 PULSE 0 5 0 25n 25n 500u 1000u
> V2 V30 0 DC 30
> V3 +5V 0 DC 5
> X1 vIN 1 V30 0 vADJ LM324/NS
> .INCLUDE ./ctl01T0_spice.sh
> .end
>
>
> My "ctl01T0_spice.sh":
> .print tran v(nodes)
> .tran 500n 120m 0  UIC
>
>
> And my .spiceinit
>
> set ngbehavior="ps lt ki a ll s3 eg"
> set ngdebug=true
>
>
>
> $ ngspice -b  -r teste324_01.net
> Error: there aren't any circuits loaded.
>
>
> **
>
> My environment:
>
> Debian BookWorm
>
> Linux alpha 6.1.0-16-amd64 #1 SMP PREEMPT_DYNAMIC Debian 6.1.67-1 
> (2023-12-12) x86_64 GNU/Linux
>
>
> lepton-eda:
>   Instalado: 1.9.18-1
>   Tabela de versão:
>  *** 1.9.18-1 500
>         500 http://ftp.br.debian.org/debian bookworm/main amd64 Packages
>
>
> With neither version of ngspice ;;;
>
> ngspice:
>   Instalado: 39.3+ds-1
>   Tabela de versão:
>      42+ds-2~bpo12+1 100
>         100 http://ftp.br.debian.org/debian bookworm-backports/main 
> amd64 Packages
>      41+ds-1~bpo12+1 100
>         100 http://127.0.0.1/repo/debian bookworm-backports/main amd64 
> Packages
>  *** 39.3+ds-1 500
>         500 http://ftp.br.debian.org/debian bookworm/main amd64 Packages
>
>
> ngspice:
>   Instalado: 42+ds-2~bpo12+1
>   Tabela de versão:
>  *** 42+ds-2~bpo12+1 100
>         100 http://ftp.br.debian.org/debian bookworm-backports/main 
> amd64 Packages

Re: [Ngspice-users] Verilog model effects the simulation run

[TM <nb...@t-...>]

Hello Holger,

Thank you for your feedback, too. I tested your proposal. It works but 
optimal with the "UIC" option at the "TRAN" control line.

In general, my first impression the Verilog model effects the simulation 
run was not correct. The Verilog model works well but my simulation 
parameters were chosen improper. My mistake!

Best regards,
Thomas


Am 27.01.2024 um 20:06 schrieb Holger Vogt:
>
> As ngspice complains about node 3, it might be that the node does not 
> have a dc path to ground. A (large) resistor from 3 to gnd might then 
> help.
>
>
>
> _______________________________________________
> Ngspice-users mailing list
> Ngs...@li...
> https://lists.sourceforge.net/lists/listinfo/ngspice-users

[Ngspice-users] Verilog model effects the simulation run

[Holger V. <hol...@fa...>]

As ngspice complains about node 3, it might be that the node does not 
have a dc path to ground. A (large) resistor from 3 to gnd might then help.

Re: [Ngspice-users] Verilog model effects the simulation run

[TM <hm...@t-...>]

Hi Marcel,

yes, you are right. The circuit includes an ideal voltage source with an 
ideal inductor.
I have added a small resistor at the electric circuit part but the 
warnings at the simulation come again.
Nevertheless, your tip was good. I have added the statement "UIC" at 
"TRAN" and I have defined one node at the magnetic circuit part with "0".
Now is everything fine.

Thank you for your fast and successful support!

Best regards,
Thomas

Am 27.01.2024 um 18:09 schrieb mh...@ia...:
> On 2024-01-27 12:20, TM wrote:
>
>> What are the reasons for the warnings? Can I improve something?
>
> I can't read the (binary) osdi file, but from the other files
> I suspect you placed an ideal voltage source across an ideal
> inductor, clashing with the standard MNA formulation.
>
> A (very small) series resistor can fix that.
>
> -marcel

Re: [Ngspice-users] Verilog model effects the simulation run

[<mh...@ia...>]

On 2024-01-27 12:20, TM wrote:

> What are the reasons for the warnings? Can I improve something?

I can't read the (binary) osdi file, but from the other files
I suspect you placed an ideal voltage source across an ideal
inductor, clashing with the standard MNA formulation.

A (very small) series resistor can fix that.

-marcel

[Ngspice-users] Verilog model effects the simulation run

[TM <hm...@t-...>]

Hello,

I deal with Verilog models and I am testing a winding model (ideal 
electro-magnetic coupler), currently.

The creation of the OSDI-file for this model was successful. If I use 
this model in ngspice 42 I get the following warnings but the simulation 
case generated plausible results.

What are the reasons for the warnings? Can I improve something?

Attached I send the verilog file, the osdi file as well the ngspice file.

Best regards,
Thomas

Re: [Ngspice-users] Regression between ngspice-41and current

[Holger V. <hol...@un...>]

Your input file is not ready for transient simulation, so it is 
difficult to understand or reproduce your problem.

These options
*.options method=gear reltol=1m minbreak=200ps
are somewhat strange for an opamp simulation.

The file simulates (ac simulation) without any problems with ngspice-41+ 
(Windows, MSVC).

Why do you compile with option --enable-nobypass ?

The current useful compile options are to be found in compile_linux.sh. 
Anything else is mostly not needed, sometimes critical or even detrimental.

The two consecutive lines of your input file

ac dec 1000 100 20k
run

lead to the other error message aas run wants to start some .tran or 
other, but there is no dot command to be started and run.

[Ngspice-users] Regression between ngspice-41and current

[BERTRAND J. <joe...@sy...>]

	Hello,

	I'm trying to simulate attached circuit. Simulation runs fine with -41
but not with -41+ (current updated today).

	With -41+, simulation aborts with :
...
doAnalyses: TRAN:  Timestep too small; time = 1.13676e-08, timestep =
1.25e-18: trouble with xu10:qn-instance q.xu10.q1


tran simulation(s) aborted
Warning: No job (tran, ac, op etc.) defined:
run simulation not started
binary raw file "results.raw"
ngspice-41+ done

	I have tried to change some parameters without success. ngspice was
built with the following configuration :

../ngspice/configure --without-ngshared --enable-nobypass
--enable-xspice --enable-cider --enable-pss --enable-ndev
--enable-openmp --with-x

	Regards,

	JB

[Ngspice-users] ngspice BSIM3v3 with stress and proximity effect parameters - other simulators

[Marie-Minerve L. <Mar...@li...>]

Dear all,

We are trying to simulate a circuit with MOS transistors (NMOS and 
PMOS), using a PDK which uses BSIM3v3 model (Berkeley type), and yet has 
proximity effect parameters as well as stress effect parameters (thus 
extending the BSIM3v3 list of parameters).

With ngspice, to take into account proximity effect parameters as well 
as stress effect parameters, it is required to go for a BSIM4 model, and 
some parameters are different between BSIM3v3 and BSIM4.

We are trying to compare ngspice and different commercial simulators 
(hspice here). We are wondering whether any of you faced the same 
problem and has some insight to clarify what is exactly done by the 
simulators.

*1. Proximity effect question*

Has anyone experience with hspice simulator that says in BSIM3v3 
documentation : "Stress and proximity effect are taken into account like 
BSIM4"?

Yet the parameter "wpe=1" does no seem to change anything compared to 
the case "wpe=0" in a hspice simulation using a BSIM3v3 model

No error is sent.

*2. Stress effect question*

To take into account stress using a BSIM3v3 model, the hspice simulator 
works only with "nf=1" (number of gates) and "SD=0" (inter-gate 
distance) and parameters "SA" and "SB" are taken into account.

==> Do you only use BSIM4 to take into account proximity and stress 
effects with ngspice?

==> Have you tried ngspice and BSIM3v3 (using .SUBCKT and 
pre-calculation of MOS model parameters to take into account proximity 
and stress effect parameters)?

==> have you compared ngspice simulation results with commercial 
simulators (BSIM3v3 and BSIM4 models and proximity and stress effect 
parameters)?

Any feedback will be welcome.

Best regards

Marie-Minerve Louerat

-- 
Marie-Minerve Louerat

Equipe CIAN du Laboratoire LIP6
Sorbonne Université, CNRS
Campus Pierre et Marie Curie
4 Place Jussieu, 75005 Paris, France
+33 1 44 27 71 08
mar...@li...

Re: [Ngspice-users] Shared library has undefined symbols

[Staf V. (FibraServi) <st...@fi...>]

Op 1/11/2023 om 16:39 schreef Holger Vogt:
> When adding klu, I have manually removed the releasesh folder before 
> compiling. Sometimes there remnats creating problems.
>
> fft symbols are missing. Do you have fftw installed? Maybe there is 
> some interference when not? 

I now recompiled from clean plate and it now is OK. I likely did not 
clean up properly after myself.

greets,
Staf.

-- 
Chips want to be free.

Re: [Ngspice-users] Shared library has undefined symbols

[Holger V. <hol...@un...>]

When adding klu, I have manually removed the releasesh folder before 
compiling. Sometimes there remnats creating problems.

fft symbols are missing. Do you have fftw installed? Maybe there is some 
interference when not?

Re: [Ngspice-users] Shared library has undefined symbols

[Holger V. <hol...@un...>]

I have just re-checked, compiling shared ngspice-41+ from pre-master-42 
branch, on openSUSE Tumbleweed, using the compile script 
./compile_linux_shared.sh: No problem.

Then I have added --enable-klu to the configure command in the script, 
again no problem with compiling.

adms is no longer supported, as all of the examples were buggy. We are 
now exclusively using OSDI/OpenVAF instead.

[Ngspice-users] Shared library has undefined symbols

[Staf V. (FibraServi) <st...@fi...>]

Goodday,

I'm trying to compile shared library but there seems to be unresolved 
symbols. This happens both when compiling from master (e.g. ngspice-41) 
and from latest pre-master-42.

See here output on the library:

    % ldd -r ~/software/mint20/lib/libngspice.so
         linux-vdso.so.1 (0x00007ffec89f0000)
         libm.so.6 => /lib/x86_64-linux-gnu/libm.so.6 (0x00007f0ef82b1000)
         libpthread.so.0 => /lib/x86_64-linux-gnu/libpthread.so.0
    (0x00007f0ef8f4b000)
         libstdc++.so.6 => /lib/x86_64-linux-gnu/libstdc++.so.6
    (0x00007f0ef80cf000)
         libgcc_s.so.1 => /lib/x86_64-linux-gnu/libgcc_s.so.1
    (0x00007f0ef8f30000)
         libc.so.6 => /lib/x86_64-linux-gnu/libc.so.6 (0x00007f0ef7edd000)
         /lib64/ld-linux-x86-64.so.2 (0x00007f0ef8f89000)
    undefined symbol: cvprod
    (/home/verhaegs/software/mint20/lib/libngspice.so)
    undefined symbol: fftBRInit
    (/home/verhaegs/software/mint20/lib/libngspice.so)
    undefined symbol: ft_peval
    (/home/verhaegs/software/mint20/lib/libngspice.so)
    undefined symbol: iffts1
    (/home/verhaegs/software/mint20/lib/libngspice.so)
    undefined symbol: ft_polyderiv
    (/home/verhaegs/software/mint20/lib/libngspice.so)
    undefined symbol: riffts1
    (/home/verhaegs/software/mint20/lib/libngspice.so)
    undefined symbol: fftCosInit
    (/home/verhaegs/software/mint20/lib/libngspice.so)
    undefined symbol: ffts1
    (/home/verhaegs/software/mint20/lib/libngspice.so)
    undefined symbol: rffts1
    (/home/verhaegs/software/mint20/lib/libngspice.so)

BTW, pre-master-42 also seems to fail to compile when enabling adms support.

greets,
Staf.

-- 
Chips want to be free.

Re: [Ngspice-users] .TRAN question

[Holger V. <hol...@un...>]

ngspice does select the time steps for simulation automatically, 
determined by convergence criteria. The minimum number of steps is 51. 
The exact time is cannot be set by the user.

If you want to have equidistant time steps, you may use a .control 
section with the linearize command (manual 17.5.40) and then read only 
every nth value from the resulting vector.

[Ngspice-users] .TRAN question

[Brando L <ano...@gm...>]

Dear developer, hello. I would like to ask about .TRAN. I am using .TRAN
20ps 100ps, but I read in the documentation that it is possible to use
min((stop-start)/50,20ps). What about (stop-start)/50? What is the purpose?
I see that the document does not explain the reason. If I want to force the
use of 20ps, what should I do? Looking forward to your answer, thank you
very much.

-- Brando

[Ngspice-users] BJT Model documentation

[Parameshwara B. <pe...@gm...>]

Hello All,

I want to know if there is documentation for the GP model for BJTs as 
used in ngspice, anywhere ? My interest is on the backend of BJT model 
with formulae.

I am reading 'Modeling the bipolar transistor' by Ian Getreu. The book 
lists at the end a mapping of parameters in the book and SPICE. It lists 
parameters C2 and C4. The same parameters appear in Nagel's early SPICE 
paper. But C2 and C4 are not listed in ngspice BJT parameters. NF and NR 
are on ngspice BJT list, but not Nagel's paper, nor in Getreu's book.

I request to point documentation sources.  Thanks in advance.

P Bhat
India

Re: [Ngspice-users] Voltage/Temperature equation based capacitor device doesn't work as expected.

[Staf V. (FibraServi) <st...@fi...>]

Op 24/08/2023 om 11:48 schreef Amro Tork:
> Hi Holger,
> As you know that capacitance = Q / V. Now, if we want to measure a 
> capacitance, we basically need to add a voltage supply with a 
> resistance in series and see the charging time of the capacitance and 
> based on that we could calculate the capacitance value if the 
> capacitance value is constant. But let's assume that the capacitance 
> is voltage dependent, the above won't hold as the capacitance while it 
> is charging, the capacitance itself is changing with the voltage 
> change. Accordingly, simply measurement of the charging time won't be 
> sufficient.

What I have done in the past is sweep the voltage linearly at a not to 
fast pace. dV/dT is then a constant and the current is then proportional 
to the instant capacitance.

Staf.

Re: [Ngspice-users] Voltage/Temperature equation based capacitor device doesn't work as expected.

[Amro T. <amr...@ma...>]

Hi Holger,
 
As you know that capacitance = Q / V. Now, if we want to measure a capacitance, we basically need to add a voltage supply with a resistance in series and see the charging time of the capacitance and based on that we could calculate the capacitance value if the capacitance value is constant. But let's assume that the capacitance is voltage dependent, the above won't hold as the capacitance while it is charging, the capacitance itself is changing with the voltage change. Accordingly, simply measurement of the charging time won't be sufficient.
 
We should go back to more basic equation, where we get the
 
q(t) = integration(icc(t))
 
And that would give us the q across time. And we could measure the v(t) across time. And we could calculate the cap over time accordingly. This way we could make sure that equation based capacitance is really working correctly in ngspice. I have attached here the 4 direct netlists for our tests. One with fixed capacitance to demonstrate how we measure the capacitance.
 
cap = d Q(t) / d v(t) 
 
NG-Spice doesn't support differentiation relative to another variable other than the one we are sweeping on. That's why we ended up getting the vectors and doing the differentiation in python rather than ngspice to ensure the correctness of our setup. And in the fixed capacitance, you could see that the calculated value from this methodology is exactly equal to the value we have added in the circuit. But we are struggling to get that in other examples where it's changing due to voltage.
 
To run our python notebook, you will need to install Jupyter notebooks and here is how to run it:
https://docs.jupyter.org/en/latest/running.html
 
Installation:
pip install jupyter
 
I hope that clarifies what is the issue that we are facing.
 
Regards,
Amro
 

> On 08/23/2023 10:06 PM EEST Holger Vogt <hol...@un... mailto:hol...@un...> wrote:
>  
>  
> Within your post there are two files included named cap_compare.ipynb.
>  
> I do not have a tool to process them.
>  
> What are your expectations in relation to the results you have sent?
>  
> Holger
>  
>  
> _______________________________________________
> Ngspice-users mailing list
> Ngs...@li... mailto:Ngs...@li...
> https://lists.sourceforge.net/lists/listinfo/ngspice-users
> 
 
 
Best Regards,
Amro Tork
 
Founder
 
Email: amr...@ma... mailto:amr...@ma...
Website:http://www.mabrains.com
 
 

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