First you have to assign your new model a device type.
In the case of defined model types as resitors, capacitors, transistors etc, it seems relatively straight forward to compile a new model as this is explained in detail in multiple places.
However not all models have device types. Mostly (in my experience) Verilog-A is used to model higher system blocks with infinite possibilities, so it's a little unclear how to compile such a model. For instance if I have a Verilog-A model of a simple comparator, what would the steps be to compile this into NGSPICE?
Do we simply ignore the ../src/spicelib/parser step?
--
Kind regards,
Justin Fisher.
If you would like to refer to this comment somewhere else in this project, copy and paste the following link:
For what I know, this step is required, otherwise the simulator won't be
able to identify the device when it finds an instance while parsing the
netlist. In the case of a non-device model (a bigger block like the
comparator), i don't know how could be done with ADMS.
As a workaround, you could "rent the space" in a device type which has the
same number of terminals as your comparator, otherwise, there will be a lot
of changes to do in the parser code (inp2m function has code supporting
different models and different number of terminal devices). In any case,
this is a hack, and ideally we could have a specific ADMS device parser,
but I do not know if there are prefix letters available (I recall I did not
found any letter which was not used for other devices).
I am in the process of writing my thesis and, with work, I do not have much
spare time. But I can try to help you to integrate it. Maybe someone has a
better idea on how to approach to the integration of general purpose
VerilogA blocks.
First you have to assign your new model a device type.
In the case of defined model types as resitors, capacitors, transistors
etc, it seems relatively straight forward to compile a new model as this is
explained in detail in multiple places.
However not all models have device types. Mostly (in my experience)
Verilog-A is used to model higher system blocks with infinite
possibilities, so it's a little unclear how to compile such a model. For
instance if I have a Verilog-A model of a simple comparator, what would the
steps be to compile this into NGSPICE?
Do we simply ignore the ../src/spicelib/parser step?
Hi Justin,
ADMS is just a Model Converter. It converts a Compact Model from Verilog-A to C in a format compatible with the simulator (NGSPICE in this case).
It doesn’t support all Verilog-A and more extensively Verilog-AMS constructs.
ADMS should be extended to support XSPICE, so you can simulate your comparator.
Fra
Il giorno 28/gen/2015, alle ore 17:24, fvila fvila@users.sf.net ha scritto:
For what I know, this step is required, otherwise the simulator won't be
able to identify the device when it finds an instance while parsing the
netlist. In the case of a non-device model (a bigger block like the
comparator), i don't know how could be done with ADMS.
As a workaround, you could "rent the space" in a device type which has the
same number of terminals as your comparator, otherwise, there will be a lot
of changes to do in the parser code (inp2m function has code supporting
different models and different number of terminal devices). In any case,
this is a hack, and ideally we could have a specific ADMS device parser,
but I do not know if there are prefix letters available (I recall I did not
found any letter which was not used for other devices).
I am in the process of writing my thesis and, with work, I do not have much
spare time. But I can try to help you to integrate it. Maybe someone has a
better idea on how to approach to the integration of general purpose
VerilogA blocks.
First you have to assign your new model a device type.
In the case of defined model types as resitors, capacitors, transistors
etc, it seems relatively straight forward to compile a new model as this is
explained in detail in multiple places.
However not all models have device types. Mostly (in my experience)
Verilog-A is used to model higher system blocks with infinite
possibilities, so it's a little unclear how to compile such a model. For
instance if I have a Verilog-A model of a simple comparator, what would the
steps be to compile this into NGSPICE?
Do we simply ignore the ../src/spicelib/parser step?
According to:
http://ngspice.sourceforge.net/admshowto.html
First you have to assign your new model a device type.
In the case of defined model types as resitors, capacitors, transistors etc, it seems relatively straight forward to compile a new model as this is explained in detail in multiple places.
However not all models have device types. Mostly (in my experience) Verilog-A is used to model higher system blocks with infinite possibilities, so it's a little unclear how to compile such a model. For instance if I have a Verilog-A model of a simple comparator, what would the steps be to compile this into NGSPICE?
Do we simply ignore the ../src/spicelib/parser step?
--
Kind regards,
Justin Fisher.
For what I know, this step is required, otherwise the simulator won't be
able to identify the device when it finds an instance while parsing the
netlist. In the case of a non-device model (a bigger block like the
comparator), i don't know how could be done with ADMS.
As a workaround, you could "rent the space" in a device type which has the
same number of terminals as your comparator, otherwise, there will be a lot
of changes to do in the parser code (inp2m function has code supporting
different models and different number of terminal devices). In any case,
this is a hack, and ideally we could have a specific ADMS device parser,
but I do not know if there are prefix letters available (I recall I did not
found any letter which was not used for other devices).
I am in the process of writing my thesis and, with work, I do not have much
spare time. But I can try to help you to integrate it. Maybe someone has a
better idea on how to approach to the integration of general purpose
VerilogA blocks.
Best regards,
Francesc
On Wed, Jan 28, 2015 at 3:51 PM, Justin Fisher justin0419@users.sf.net
wrote:
Hi Justin,
ADMS is just a Model Converter. It converts a Compact Model from Verilog-A to C in a format compatible with the simulator (NGSPICE in this case).
It doesn’t support all Verilog-A and more extensively Verilog-AMS constructs.
ADMS should be extended to support XSPICE, so you can simulate your comparator.
Fra