myhdl-list — Mailing list for discussions on MyHDL

Re: [myhdl-list] Global state and multiple instances

[Juan P. C. <jp...@gm...>]

now() was just an example of a globally defined function accessing global
variables, and the example is an idea of how we could potentially move all
globals inside Simulation.

I'have not looked in too much depth on how the other globals are used. The
case with now() was the one that seem most obvious and simple to me to
illustrate the case.

The problem with making now() a method of Simulation and have users use
that directly is that they would have to have a reference to the Simulation
instance. Something ugly like this:

sim = Simulation()  # Create the instance first
def logicmodule(sim):
   @always(...)
   def logic():
      print sim.now()
sim.append(logicmodule(sim))  # Then pass the instance to the module.

or ...

class MySim(Simulation):
   def logicmodule(self):  # Default method ran to obtain the logic modules
      @always(...)
      def logic():
         self.now()
      ...
      return logic, ...
s = MySim.run()

While we could still let the user write:

@always(...)
def logic():
   print now()

s = Sim(logic)

And let Sim take care of "patching" to have the call to now() point to it's
own self.now().

Thanks,
JP

On Wed, May 6, 2015 at 1:13 PM, Henry Gomersall <he...@ca...> wrote:

> On 06/05/15 18:06, Juan Pablo Caram wrote:
> > Attempting to make the global calls in user code local to the
> > Simulation instance. The example in StackOverflow shows how the calls
> > to, say, a global now(), can be replaced by a local instance,
> > self.now(). This avoids any complicated lookups that would degrade
> > performance, and maintains the syntax used by the user.
>
> Is the only issue the now() call?
>
> I think it makes much more sense to make now() a method on the
> simulation instance and changing the API. If there is no global notion
> of now(), I don't see why it makes sense to even offer that as part of
> the API...
>
> Cheers,
>
> Henry
>
>
> ------------------------------------------------------------------------------
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> Widest out-of-the-box monitoring support with 50+ applications
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>

Re: [myhdl-list] Reusability and encapsulation

[Juan P. C. <jp...@gm...>]

Ok, installed from git. Version is 0.9.dev0. And the problem persists. Here
is some more detail:

def tb():
    ...
    return ...

model_inst = traceSignals(tb)
sim = Simulation(model_inst)
sim.run(1 * us)

RESULT: <class 'myhdl._SuspendSimulation'>: Simulated 1000000000.0 timesteps

def tb():
    # Different from previous tb()
    ...
    return ...

model_inst = traceSignals(tb)
sim = Simulation(model_inst)
sim.run(3 * us)

RESULT:
---------------------------------------------------------------------------
TraceSignalsError                         Traceback (most recent call last)
<ipython-input-22-710800f935f0> in <module>()
      1 print "{:10}  {:10}  {:10}".format("Ref", "FB", "Err=Ref-FB")
----> 2 model_inst = traceSignals(tb)
      3 sim = Simulation(model_inst)
      4 sim.run(3 * us)

/usr/local/lib/python2.7/dist-packages/myhdl-0.9.dev0-py2.7.egg/myhdl/_traceSignals.pyc
in __call__(self, dut, *args, **kwargs)
     73             raise TraceSignalsError(_error.ArgType, "got %s" %
type(dut))
     74         if _simulator._tracing:
---> 75             raise TraceSignalsError(_error.MultipleTraces)
     76
     77         _tracing = 1

TraceSignalsError: Cannot trace multiple instances simultaneously


It's probably something silly I'm doing. I suspect Simulation()._finalize()
is not being called for some reason.

Thanks,

JP

On Wed, May 6, 2015 at 12:43 PM, Christopher Felton <chr...@gm...>
wrote:

> <snip>
> >
> > You can install the latest via:
> >   >> pip install https://github.com/jandecaluwe/myhdl/archive/master.zip
> > or
> >   >> pip install git+https://github.com/jandecaluwe/myhdl
> >
>
> Actually, if you want to follow the development
> and get the greatest and latest it is best to
> git clone and update as outlined here:
>
> http://dev.myhdl.org/guide/guide.html
>
> If you want to contribute you need to create a
> github fork, etc. etc.
>
> Regards,
> Chris
>
>
>
> ------------------------------------------------------------------------------
> One dashboard for servers and applications across Physical-Virtual-Cloud
> Widest out-of-the-box monitoring support with 50+ applications
> Performance metrics, stats and reports that give you Actionable Insights
> Deep dive visibility with transaction tracing using APM Insight.
> http://ad.doubleclick.net/ddm/clk/290420510;117567292;y
> _______________________________________________
> myhdl-list mailing list
> myh...@li...
> https://lists.sourceforge.net/lists/listinfo/myhdl-list
>

Re: [myhdl-list] Global state and multiple instances

[Henry G. <he...@ca...>]

On 06/05/15 18:06, Juan Pablo Caram wrote:
> Attempting to make the global calls in user code local to the 
> Simulation instance. The example in StackOverflow shows how the calls 
> to, say, a global now(), can be replaced by a local instance, 
> self.now(). This avoids any complicated lookups that would degrade 
> performance, and maintains the syntax used by the user.

Is the only issue the now() call?

I think it makes much more sense to make now() a method on the 
simulation instance and changing the API. If there is no global notion 
of now(), I don't see why it makes sense to even offer that as part of 
the API...

Cheers,

Henry

Re: [myhdl-list] Global state and multiple instances

[Juan P. C. <jp...@gm...>]

Attempting to make the global calls in user code local to the Simulation
instance. The example in StackOverflow shows how the calls to, say, a
global now(), can be replaced by a local instance, self.now(). This avoids
any complicated lookups that would degrade performance, and maintains the
syntax used by the user.

Thanks,
JP

On Wed, May 6, 2015 at 12:59 PM, Henry Gomersall <he...@ca...> wrote:

> On 06/05/15 14:34, Juan Pablo Caram wrote:
> > Is there any interest in pursuing the solution that I was proposing?
> >
> http://stackoverflow.com/questions/30061421/change-reference-to-function-in-run-time-in-python
>
> I'm not quite sure what solution you're proposing...
>
> Henry
>
>
> ------------------------------------------------------------------------------
> One dashboard for servers and applications across Physical-Virtual-Cloud
> Widest out-of-the-box monitoring support with 50+ applications
> Performance metrics, stats and reports that give you Actionable Insights
> Deep dive visibility with transaction tracing using APM Insight.
> http://ad.doubleclick.net/ddm/clk/290420510;117567292;y
> _______________________________________________
> myhdl-list mailing list
> myh...@li...
> https://lists.sourceforge.net/lists/listinfo/myhdl-list
>

Re: [myhdl-list] Global state and multiple instances

[Henry G. <he...@ca...>]

On 06/05/15 14:34, Juan Pablo Caram wrote:
> Is there any interest in pursuing the solution that I was proposing?
> http://stackoverflow.com/questions/30061421/change-reference-to-function-in-run-time-in-python

I'm not quite sure what solution you're proposing...

Henry

Re: [myhdl-list] Reusability and encapsulation

[Christopher F. <chr...@gm...>]

<snip>
>
> You can install the latest via:
>   >> pip install https://github.com/jandecaluwe/myhdl/archive/master.zip
> or
>   >> pip install git+https://github.com/jandecaluwe/myhdl
>

Actually, if you want to follow the development
and get the greatest and latest it is best to
git clone and update as outlined here:

http://dev.myhdl.org/guide/guide.html

If you want to contribute you need to create a
github fork, etc. etc.

Regards,
Chris

Re: [myhdl-list] Reusability and encapsulation

[Christopher F. <chr...@gm...>]

On 5/6/2015 11:32 AM, Juan Pablo Caram wrote:
> Oh, I thought you were referring to which version of MyHDL I have.
>
> My IPython is 2.4.1
> And Python 2.7.3
>
> I believe I installed MyHDL via pip. So I don't know how old the code is...

The pip version of MyHDL is 0.8 and is fairly
old.

You can get the MyHDL version via

     import myhdl
     print(myhdl.__version__)

The `master` branch is stable but is still the
development branch, nothing is merged that breaks
the test suite, any existing code should be fine.

You can install the latest via:
 >> pip install https://github.com/jandecaluwe/myhdl/archive/master.zip
or
 >> pip install git+https://github.com/jandecaluwe/myhdl

Regards,
Chris

Re: [myhdl-list] Reusability and encapsulation

[Juan P. C. <jp...@gm...>]

Oh, I thought you were referring to which version of MyHDL I have.

My IPython is 2.4.1
And Python 2.7.3

I believe I installed MyHDL via pip. So I don't know how old the code is...

I can try the latest source. What would be the fastest way to do that
without uninstalling my current MyHDL version? Or perhaps I should just go
ahead and install the latest code. Is it stable?

Thanks,

JP

On Wed, May 6, 2015 at 12:15 PM, Christopher Felton <chr...@gm...>
wrote:

> On 5/5/2015 8:31 AM, Juan Pablo Caram wrote:
> > I think I installed it from the Ubuntu 12.04 repository. Is there a
> > variable containing the version number or should I look in the code?
> >
>
> Looks like there is:
> https://github.com/ipython/ipython/issues/3025
>
> In [5]: import IPython
>          print(IPython.__version__)
>          !ipython --version
> 3.0.0
> 3.0.0
>
> I am using Chrome.  I think, I installed with pip?
>
> Regards,
> Chris
>
>
>
>
>
>
> ------------------------------------------------------------------------------
> One dashboard for servers and applications across Physical-Virtual-Cloud
> Widest out-of-the-box monitoring support with 50+ applications
> Performance metrics, stats and reports that give you Actionable Insights
> Deep dive visibility with transaction tracing using APM Insight.
> http://ad.doubleclick.net/ddm/clk/290420510;117567292;y
> _______________________________________________
> myhdl-list mailing list
> myh...@li...
> https://lists.sourceforge.net/lists/listinfo/myhdl-list
>

Re: [myhdl-list] Reusability and encapsulation

[Christopher F. <chr...@gm...>]

On 5/5/2015 8:31 AM, Juan Pablo Caram wrote:
> I think I installed it from the Ubuntu 12.04 repository. Is there a
> variable containing the version number or should I look in the code?
>

Looks like there is:
https://github.com/ipython/ipython/issues/3025

In [5]: import IPython
         print(IPython.__version__)
         !ipython --version
3.0.0
3.0.0

I am using Chrome.  I think, I installed with pip?

Regards,
Chris

Re: [myhdl-list] Interfaces in Interfaces

[Christopher F. <chr...@gm...>]

On 5/5/2015 2:11 PM, Ben Reynwar wrote:
> Don't bother checking that first attempt.  It's totally broken.  I'll try
> and sort it out properly and do a pull request and try to refrain the
> spamming the list too much more.
>

I can create tests you can work against if you like?

Regards,
Chris

Re: [myhdl-list] Mixing MyHDL-generated source with other code

[Christopher F. <chr...@gm...>]

On 5/5/2015 3:23 PM, Ben Reynwar wrote:
> Hi again,
>
> One of the things I'm trying to work out as I get acquainted with MyHDL is
> how best to mix MyHDL-generated code with existing code.  This can be
> reduced to two basic problems:
>
> 1) Be able to generate VHDL/verilog with a predictable interface so it can
> used by a non-MyHDL module.
> 2) Be able to generate VHDL/verilog containing an instantiation of a module
> that is not specified by MyHDL.

Yes, if I understand your 1 and 2, I would refer
to it as:

   1. Verilog/VHDL top-levels, including MyHDL
      generated IP.

   2. MyHDL top-level, including Verilog/VHDL
      modules in the converted MyHDL design.

The first, is simply creating blocks in MyHDL and
converting them individually and including them
in an existing flow.  This method seems preferred
for those that use a lot of vendor IP and for
early adoption.  You can still use MyHDL for all
verification.

The second, if you are verifying the MyHDL before
conversion (highly recommended) you have to create
functional models to represent the behavior, then
you can use verilog_code and vhdl_code to instantiate
the V* module/component.  The process should be
seamless :)

>
> For (1) it seems to mostly work out of the box.  Sometimes I find that the
> `_name` property on the signal has not been forced to match the function
> argument name on the top module.  But I'm not sure if that's a bug I've
> introduced myself in my local copy.

You might be venturing into areas that haven't been
explored a whole lot.

If you have a module with ports:

    def my_module(a, b, c d):

and you convert the module using Signals, the names of
the ports will be: a, b, c, d.

If you are using interfaces (and multiple levels of
interfaces) that might not hold.  I think this is
what you might be eluding to?  This might be worth
discussion but is somewhat independent of this thread.

>
> For (2) I can get close using the `vhdl_instance` property but that seems
> like it's more for generating separate VHDL files from MyHDL rather than
> for interfacing with non-MyHDL modules.  The things that make this
> difficult to use are that it assumes an architecture named 'MyHDL' and that
> it does not allow for generic parameters.  The simplest way to get round
> this would be to default to not specifying the architecture and interpret a
> parameter called 'architecture' to be specifying that.  In a similar manner
> a parameter called 'parameters' could be used as the generic parameters.
> This would be a small, local change but would add a lot of flexibility.

The vhdl_code and vhdl_instance are what you would want
to use to have your code instantiate VHDL components.
Note, vhdl_instance is beta and not documented, it is
incomplete at this time (e.g. can't define the architecture,
it defaults to "MyHDL").

I believe others posted some examples, here is another:

https://gist.github.com/cfelton/0b12dd0725eb2decbd2a
https://gist.github.com/cfelton/0792c5823d418afee604

And here are the docs on vhdl_code and verilog_code:
http://docs.myhdl.org/en/latest/manual/conversion.html#user-defined-code

>
> Based on the fact that it's not trival to do this, I'm assuming that most
> people aren't mixing MyHDL with hand-coded Verilog and VHDL much.  Is there
> a reason for this?

Many (most when they start) are mixing.

Regards,
Chris

Re: [myhdl-list] Global state and multiple instances

[Juan P. C. <jp...@gm...>]

Henry,
Is there any interest in pursuing the solution that I was proposing?
http://stackoverflow.com/questions/30061421/change-reference-to-function-in-run-time-in-python
JP

On Wed, May 6, 2015 at 4:18 AM, Henry Gomersall <he...@ca...> wrote:

> To continue the github issue...
>
> Jose, I think the conclusion from lots of back and forth was that a real
> implementation is needed.
>
> Jan, I think Jose doesn't want to implement to much without some
> expectation that it will be accepted.
>
> In light of a PR I submitted last week, I have an idea to try... I'll
> try to get some code later on...
>
> Cheers,
>
> Henry
>
>
> ------------------------------------------------------------------------------
> One dashboard for servers and applications across Physical-Virtual-Cloud
> Widest out-of-the-box monitoring support with 50+ applications
> Performance metrics, stats and reports that give you Actionable Insights
> Deep dive visibility with transaction tracing using APM Insight.
> http://ad.doubleclick.net/ddm/clk/290420510;117567292;y
> _______________________________________________
> myhdl-list mailing list
> myh...@li...
> https://lists.sourceforge.net/lists/listinfo/myhdl-list
>

[myhdl-list] Global state and multiple instances

[Henry G. <he...@ca...>]

To continue the github issue...

Jose, I think the conclusion from lots of back and forth was that a real 
implementation is needed.

Jan, I think Jose doesn't want to implement to much without some 
expectation that it will be accepted.

In light of a PR I submitted last week, I have an idea to try... I'll 
try to get some code later on...

Cheers,

Henry

Re: [myhdl-list] Mixing MyHDL-generated source with other code

[Henry G. <he...@ca...>]

On 06/05/15 00:10, Ben Reynwar wrote:
> Thanks for that example.
> If I understand correctly this is a MyHDL implementation of a Xilinx 
> DSP slice.  When you run a MyHDL cosimulation the tests all use the 
> logic defined in that module.  When you run those same tests with a 
> Vivado cosimulation, presumably the Xilinx primitive will be used instead.
>

Yes exactly, but the specific module I linked to references a wrapper 
around the primitive, not the primitive itself:
https://github.com/hgomersall/Veriutils/blob/master/vivado/IP/xbip_dsp48_macro_0/dsp48_wrapper.vhd

(not that you should have trivially inferred that).

> I don't quite understand how you're using the vhdl_code property.  I 
> thought that the contents of this were placed into the module that was 
> being defined, whereas when I look at the VHDL code generated by your 
> Vivado cosimulation it looks as if the module has been replaced by 
> that code.
>
Are you referring to the wrapper? That is a separate piece of code that 
is referenced through the The VHDL code is inserted into the Vivado 
project (in work). The vhdl_code is put into the generated output.

> I also enjoyed looking through veriutils.  You're doing a lot of very 
> similar stuff to what I've been doing in pyvivado 
> <https://www.github.com/benreynwar/pyvivado>.

We should probably combine our efforts! What are your goals? So far, the 
intention has to be quite limited in scope, simply allow a back 
verification from Vivado, with the motivation driven by the need to 
allow encrypted IP blocks.

Cheers,

Henry

Re: [myhdl-list] Mixing MyHDL-generated source with other code

[Jan <jen...@mu...>]

On Tue, 5 May 2015 13:23:25 -0700
Ben Reynwar <be...@re...> wrote:

> Hi again,
> 
> One of the things I'm trying to work out as I
> get acquainted with MyHDL is how best to mix
> MyHDL-generated code with existing code.  This
> can be reduced to two basic problems:

[...]

> For (2) I can get close using the
> `vhdl_instance` property but that seems like
> it's more for generating separate VHDL files
> from MyHDL rather than for interfacing with
> non-MyHDL modules.  The things that make this
> difficult to use are that it assumes an
> architecture named 'MyHDL' and that it does not
> allow for generic parameters.  [...]

The following appears to work for RAM
initialisation in verilog, as it is accepted by
the synth tools, the VHDL is obviously broken,
but the technique should work:

def SB_RAM1024x4_cfg(RDATA,RADDR,RCLK,RCLKE,RE,\
  WADDR,WCLK,WCLKE,WDATA,WE, ConfigBits): 
''' sim & synth version of iCE40 block RAM in \
  1024x4 format ''' GSW = 4  #len(WDATA) 
  
  mem=[]
    [... code to build list for simulation]

  @always_comb 
  def ReadLogic(): [...]
  
  @always(WCLK.posedge)
  def WriteLogic(): [...]
  
  # config strings need simple variables #
  CB0x0 = ConfigBits[0x0]
  CB0x1 = ConfigBits[0x1]
    [...]
  CB0xF = ConfigBits[0xF]

__verilog__ = \
"""
SB_RAM1024x4 ram1024x4_01 (
  .RDATA(%(RDATA)s), 
  .RADDR(%(RADDR)s), 
    [...]
  .WE(%(WE)s) 
);   
  
defparam ram1024x4_01.INIT_0 =\
  256'h%(CB0x0)064x; 
defparam ram1024x4_01.INIT_1 =\
  256'h%(CB0x1)064x; 
      [...]
defparam ram1024x4_01.INIT_F =\ 
  256'h%(CB0xF)064x; """

__VHDL__ = \
"""
RAM1024X4: SB_RAM1024x4
generic map(  
  INIT_0 => X"%(CB0x0)064x",
  INIT_1 => X"%(CB0x1)064x",
    [...]
  INIT_F => X"%(CB0xF)064x"   ) 
  
port map (
  RDATA => (%(RDATA)s),
  (%(RADDR)s) => RADDR,
    [...]
  WE => (%(WE)s)  );
"""
    
(I'm about six weeks away from using this in a
design)

Jan Coombs. 
-- 

Re: [myhdl-list] Mixing MyHDL-generated source with other code

[Ben R. <be...@re...>]

Thanks for that example.
If I understand correctly this is a MyHDL implementation of a Xilinx DSP
slice.  When you run a MyHDL cosimulation the tests all use the logic
defined in that module.  When you run those same tests with a Vivado
cosimulation, presumably the Xilinx primitive will be used instead.

I don't quite understand how you're using the vhdl_code property.  I
thought that the contents of this were placed into the module that was
being defined, whereas when I look at the VHDL code generated by your
Vivado cosimulation it looks as if the module has been replaced by that
code.

I also enjoyed looking through veriutils.  You're doing a lot of very
similar stuff to what I've been doing in pyvivado
<https://www.github.com/benreynwar/pyvivado>.

On Tue, May 5, 2015 at 2:14 PM, Henry Gomersall <he...@ca...> wrote:

> On 05/05/15 21:23, Ben Reynwar wrote:
> > Based on the fact that it's not trival to do this, I'm assuming that
> > most people aren't mixing MyHDL with hand-coded Verilog and VHDL
> > much.  Is there a reason for this?
> >
>
> No, I do it quite a bit. The problem is more that the RTL needs to be
> implemented in MyHDL in order to be useful in that context.
>
> See this:
>
> https://github.com/hgomersall/Veriutils/blob/master/examples/dsp48e1/dsp48e1.py
>
> For an example.
>
> Cheers,
>
> Henry
>
>
> ------------------------------------------------------------------------------
> One dashboard for servers and applications across Physical-Virtual-Cloud
> Widest out-of-the-box monitoring support with 50+ applications
> Performance metrics, stats and reports that give you Actionable Insights
> Deep dive visibility with transaction tracing using APM Insight.
> http://ad.doubleclick.net/ddm/clk/290420510;117567292;y
> _______________________________________________
> myhdl-list mailing list
> myh...@li...
> https://lists.sourceforge.net/lists/listinfo/myhdl-list
>

Re: [myhdl-list] Mixing MyHDL-generated source with other code

[Henry G. <he...@ca...>]

On 05/05/15 21:23, Ben Reynwar wrote:
> Based on the fact that it's not trival to do this, I'm assuming that 
> most people aren't mixing MyHDL with hand-coded Verilog and VHDL 
> much.  Is there a reason for this?
>

No, I do it quite a bit. The problem is more that the RTL needs to be 
implemented in MyHDL in order to be useful in that context.

See this:
https://github.com/hgomersall/Veriutils/blob/master/examples/dsp48e1/dsp48e1.py

For an example.

Cheers,

Henry

[myhdl-list] Mixing MyHDL-generated source with other code

[Ben R. <be...@re...>]

Hi again,

One of the things I'm trying to work out as I get acquainted with MyHDL is
how best to mix MyHDL-generated code with existing code.  This can be
reduced to two basic problems:

1) Be able to generate VHDL/verilog with a predictable interface so it can
used by a non-MyHDL module.
2) Be able to generate VHDL/verilog containing an instantiation of a module
that is not specified by MyHDL.

For (1) it seems to mostly work out of the box.  Sometimes I find that the
`_name` property on the signal has not been forced to match the function
argument name on the top module.  But I'm not sure if that's a bug I've
introduced myself in my local copy.

For (2) I can get close using the `vhdl_instance` property but that seems
like it's more for generating separate VHDL files from MyHDL rather than
for interfacing with non-MyHDL modules.  The things that make this
difficult to use are that it assumes an architecture named 'MyHDL' and that
it does not allow for generic parameters.  The simplest way to get round
this would be to default to not specifying the architecture and interpret a
parameter called 'architecture' to be specifying that.  In a similar manner
a parameter called 'parameters' could be used as the generic parameters.
This would be a small, local change but would add a lot of flexibility.

Based on the fact that it's not trival to do this, I'm assuming that most
people aren't mixing MyHDL with hand-coded Verilog and VHDL much.  Is there
a reason for this?

Cheers,
Ben

Re: [myhdl-list] Interfaces in Interfaces

[Ben R. <be...@re...>]

Don't bother checking that first attempt.  It's totally broken.  I'll try
and sort it out properly and do a pull request and try to refrain the
spamming the list too much more.

On Tue, May 5, 2015 at 11:43 AM, Ben Reynwar <be...@re...> wrote:

> Here's a first attempt:
>
>
> https://github.com/benreynwar/myhdl/commit/ae6e5cb8faddd7119cfaf8ed457d4edfc088c623
>
> I wasn't sure how to test it since I really wanted to convert the DUT to
> VHDL and then a testbench to VHDL and then run a simulation on the combined
> product.  For now I just put a test in to make sure it doesn't hit any
> exceptions when converting but since there's no testbench it not a very
> good one.
>
> On Tue, May 5, 2015 at 11:35 AM, Christopher Felton <
> chr...@gm...> wrote:
>
>>
>>
>> On Tuesday, May 5, 2015, Ben Reynwar <be...@re...> wrote:
>>
>>> So it looks like it's possible in internal interfaces but you can't
>>> currently use them in the top interface.
>>>
>>>
>>> https://github.com/jandecaluwe/myhdl/blob/08519b452f153885d3cc43038111b7779e2bb2f1/myhdl/conversion/_analyze.py#L1255
>>>
>>> Is there any deep reason that this hasn't been done?  Or should I just
>>> go ahead and fix this?
>>>
>>>
>> No I don't believe there is a reason.  Extending to nested interfaces
>> should be feasible.
>>
>> Regard,
>> Chris
>>
>>
>>
>>> On Tue, May 5, 2015 at 9:35 AM, Ben Reynwar <be...@re...> wrote:
>>>
>>>> Problem was I was wrapping the interface with Signal.
>>>>
>>>> i.e.
>>>> self.data = Signal(Complex(width=width))
>>>> should have been
>>>> self.data = Complex(width=width)
>>>>
>>>> On Tue, May 5, 2015 at 8:49 AM, Ben Reynwar <be...@re...> wrote:
>>>>
>>>>> Great, thank you.  I must have been doing something else wrong.  And
>>>>> thanks for the upper bound tip!
>>>>>
>>>>> On Tue, May 5, 2015 at 6:39 AM, Christopher Felton <
>>>>> chr...@gm...> wrote:
>>>>>
>>>>>> On 5/4/15 11:01 PM, Ben Reynwar wrote:
>>>>>> > Hi all,
>>>>>> >
>>>>>> > Is it possible to use interface definitions in interfaces?  For
>>>>>> example
>>>>>> > I might have an interface for a complex number, and then an
>>>>>> interface
>>>>>> > for a back-pressured stream of complex numbers that uses the complex
>>>>>> > number interface as a component.
>>>>>>
>>>>>> Yes, it is possible.  A basic test case exists in
>>>>>> the test suite:
>>>>>>
>>>>>>
>>>>>> https://github.com/jandecaluwe/myhdl/blob/master/myhdl/test/conversion/general/test_interfaces3.py#L28
>>>>>>
>>>>>> Regards,
>>>>>> Chris
>>>>>>
>>>>>>
>>>>>>
>>>>>> >
>>>>>> > e.g.
>>>>>> >
>>>>>> > class Complex(object):
>>>>>> >
>>>>>> >      def __init__(self, width):
>>>>>> >          maxval = pow(2, width-1)-1
>>>>>>
>>>>>> Note, Python is exclusive on the upper bounds, MyHDL
>>>>>> follows this concept.  The max bound is one more than
>>>>>> the max value.
>>>>>>
>>>>>> (python exclusive upper bound)
>>>>>> http://stackoverflow.com/a/11364711/760977
>>>>>>
>>>>>> Regards,
>>>>>> Chris
>>>>>>
>>>>>>
>>>>>>
>>>>>> ------------------------------------------------------------------------------
>>>>>> One dashboard for servers and applications across
>>>>>> Physical-Virtual-Cloud
>>>>>> Widest out-of-the-box monitoring support with 50+ applications
>>>>>> Performance metrics, stats and reports that give you Actionable
>>>>>> Insights
>>>>>> Deep dive visibility with transaction tracing using APM Insight.
>>>>>> http://ad.doubleclick.net/ddm/clk/290420510;117567292;y
>>>>>> _______________________________________________
>>>>>> myhdl-list mailing list
>>>>>> myh...@li...
>>>>>> https://lists.sourceforge.net/lists/listinfo/myhdl-list
>>>>>>
>>>>>
>>>>>
>>>>
>>>
>>
>>
>> --
>> Sent from Gmail Mobile
>>
>>
>> ------------------------------------------------------------------------------
>> One dashboard for servers and applications across Physical-Virtual-Cloud
>> Widest out-of-the-box monitoring support with 50+ applications
>> Performance metrics, stats and reports that give you Actionable Insights
>> Deep dive visibility with transaction tracing using APM Insight.
>> http://ad.doubleclick.net/ddm/clk/290420510;117567292;y
>> _______________________________________________
>> myhdl-list mailing list
>> myh...@li...
>> https://lists.sourceforge.net/lists/listinfo/myhdl-list
>>
>>
>

Re: [myhdl-list] Interfaces in Interfaces

[Ben R. <be...@re...>]

Here's a first attempt:

https://github.com/benreynwar/myhdl/commit/ae6e5cb8faddd7119cfaf8ed457d4edfc088c623

I wasn't sure how to test it since I really wanted to convert the DUT to
VHDL and then a testbench to VHDL and then run a simulation on the combined
product.  For now I just put a test in to make sure it doesn't hit any
exceptions when converting but since there's no testbench it not a very
good one.

On Tue, May 5, 2015 at 11:35 AM, Christopher Felton <chr...@gm...>
wrote:

>
>
> On Tuesday, May 5, 2015, Ben Reynwar <be...@re...> wrote:
>
>> So it looks like it's possible in internal interfaces but you can't
>> currently use them in the top interface.
>>
>>
>> https://github.com/jandecaluwe/myhdl/blob/08519b452f153885d3cc43038111b7779e2bb2f1/myhdl/conversion/_analyze.py#L1255
>>
>> Is there any deep reason that this hasn't been done?  Or should I just go
>> ahead and fix this?
>>
>>
> No I don't believe there is a reason.  Extending to nested interfaces
> should be feasible.
>
> Regard,
> Chris
>
>
>
>> On Tue, May 5, 2015 at 9:35 AM, Ben Reynwar <be...@re...> wrote:
>>
>>> Problem was I was wrapping the interface with Signal.
>>>
>>> i.e.
>>> self.data = Signal(Complex(width=width))
>>> should have been
>>> self.data = Complex(width=width)
>>>
>>> On Tue, May 5, 2015 at 8:49 AM, Ben Reynwar <be...@re...> wrote:
>>>
>>>> Great, thank you.  I must have been doing something else wrong.  And
>>>> thanks for the upper bound tip!
>>>>
>>>> On Tue, May 5, 2015 at 6:39 AM, Christopher Felton <
>>>> chr...@gm...> wrote:
>>>>
>>>>> On 5/4/15 11:01 PM, Ben Reynwar wrote:
>>>>> > Hi all,
>>>>> >
>>>>> > Is it possible to use interface definitions in interfaces?  For
>>>>> example
>>>>> > I might have an interface for a complex number, and then an interface
>>>>> > for a back-pressured stream of complex numbers that uses the complex
>>>>> > number interface as a component.
>>>>>
>>>>> Yes, it is possible.  A basic test case exists in
>>>>> the test suite:
>>>>>
>>>>>
>>>>> https://github.com/jandecaluwe/myhdl/blob/master/myhdl/test/conversion/general/test_interfaces3.py#L28
>>>>>
>>>>> Regards,
>>>>> Chris
>>>>>
>>>>>
>>>>>
>>>>> >
>>>>> > e.g.
>>>>> >
>>>>> > class Complex(object):
>>>>> >
>>>>> >      def __init__(self, width):
>>>>> >          maxval = pow(2, width-1)-1
>>>>>
>>>>> Note, Python is exclusive on the upper bounds, MyHDL
>>>>> follows this concept.  The max bound is one more than
>>>>> the max value.
>>>>>
>>>>> (python exclusive upper bound)
>>>>> http://stackoverflow.com/a/11364711/760977
>>>>>
>>>>> Regards,
>>>>> Chris
>>>>>
>>>>>
>>>>>
>>>>> ------------------------------------------------------------------------------
>>>>> One dashboard for servers and applications across
>>>>> Physical-Virtual-Cloud
>>>>> Widest out-of-the-box monitoring support with 50+ applications
>>>>> Performance metrics, stats and reports that give you Actionable
>>>>> Insights
>>>>> Deep dive visibility with transaction tracing using APM Insight.
>>>>> http://ad.doubleclick.net/ddm/clk/290420510;117567292;y
>>>>> _______________________________________________
>>>>> myhdl-list mailing list
>>>>> myh...@li...
>>>>> https://lists.sourceforge.net/lists/listinfo/myhdl-list
>>>>>
>>>>
>>>>
>>>
>>
>
>
> --
> Sent from Gmail Mobile
>
>
> ------------------------------------------------------------------------------
> One dashboard for servers and applications across Physical-Virtual-Cloud
> Widest out-of-the-box monitoring support with 50+ applications
> Performance metrics, stats and reports that give you Actionable Insights
> Deep dive visibility with transaction tracing using APM Insight.
> http://ad.doubleclick.net/ddm/clk/290420510;117567292;y
> _______________________________________________
> myhdl-list mailing list
> myh...@li...
> https://lists.sourceforge.net/lists/listinfo/myhdl-list
>
>

Re: [myhdl-list] Interfaces in Interfaces

[Christopher F. <chr...@gm...>]

On Tuesday, May 5, 2015, Ben Reynwar <be...@re...> wrote:

> So it looks like it's possible in internal interfaces but you can't
> currently use them in the top interface.
>
>
> https://github.com/jandecaluwe/myhdl/blob/08519b452f153885d3cc43038111b7779e2bb2f1/myhdl/conversion/_analyze.py#L1255
>
> Is there any deep reason that this hasn't been done?  Or should I just go
> ahead and fix this?
>
>
No I don't believe there is a reason.  Extending to nested interfaces
should be feasible.

Regard,
Chris



> On Tue, May 5, 2015 at 9:35 AM, Ben Reynwar <be...@re...
> <javascript:_e(%7B%7D,'cvml','be...@re...');>> wrote:
>
>> Problem was I was wrapping the interface with Signal.
>>
>> i.e.
>> self.data = Signal(Complex(width=width))
>> should have been
>> self.data = Complex(width=width)
>>
>> On Tue, May 5, 2015 at 8:49 AM, Ben Reynwar <be...@re...
>> <javascript:_e(%7B%7D,'cvml','be...@re...');>> wrote:
>>
>>> Great, thank you.  I must have been doing something else wrong.  And
>>> thanks for the upper bound tip!
>>>
>>> On Tue, May 5, 2015 at 6:39 AM, Christopher Felton <
>>> chr...@gm...
>>> <javascript:_e(%7B%7D,'cvml','chr...@gm...');>> wrote:
>>>
>>>> On 5/4/15 11:01 PM, Ben Reynwar wrote:
>>>> > Hi all,
>>>> >
>>>> > Is it possible to use interface definitions in interfaces?  For
>>>> example
>>>> > I might have an interface for a complex number, and then an interface
>>>> > for a back-pressured stream of complex numbers that uses the complex
>>>> > number interface as a component.
>>>>
>>>> Yes, it is possible.  A basic test case exists in
>>>> the test suite:
>>>>
>>>>
>>>> https://github.com/jandecaluwe/myhdl/blob/master/myhdl/test/conversion/general/test_interfaces3.py#L28
>>>>
>>>> Regards,
>>>> Chris
>>>>
>>>>
>>>>
>>>> >
>>>> > e.g.
>>>> >
>>>> > class Complex(object):
>>>> >
>>>> >      def __init__(self, width):
>>>> >          maxval = pow(2, width-1)-1
>>>>
>>>> Note, Python is exclusive on the upper bounds, MyHDL
>>>> follows this concept.  The max bound is one more than
>>>> the max value.
>>>>
>>>> (python exclusive upper bound)
>>>> http://stackoverflow.com/a/11364711/760977
>>>>
>>>> Regards,
>>>> Chris
>>>>
>>>>
>>>>
>>>> ------------------------------------------------------------------------------
>>>> One dashboard for servers and applications across Physical-Virtual-Cloud
>>>> Widest out-of-the-box monitoring support with 50+ applications
>>>> Performance metrics, stats and reports that give you Actionable Insights
>>>> Deep dive visibility with transaction tracing using APM Insight.
>>>> http://ad.doubleclick.net/ddm/clk/290420510;117567292;y
>>>> _______________________________________________
>>>> myhdl-list mailing list
>>>> myh...@li...
>>>> <javascript:_e(%7B%7D,'cvml','myh...@li...');>
>>>> https://lists.sourceforge.net/lists/listinfo/myhdl-list
>>>>
>>>
>>>
>>
>


-- 
Sent from Gmail Mobile

Re: [myhdl-list] Interfaces in Interfaces

[Ben R. <be...@re...>]

So it looks like it's possible in internal interfaces but you can't
currently use them in the top interface.

https://github.com/jandecaluwe/myhdl/blob/08519b452f153885d3cc43038111b7779e2bb2f1/myhdl/conversion/_analyze.py#L1255

Is there any deep reason that this hasn't been done?  Or should I just go
ahead and fix this?

On Tue, May 5, 2015 at 9:35 AM, Ben Reynwar <be...@re...> wrote:

> Problem was I was wrapping the interface with Signal.
>
> i.e.
> self.data = Signal(Complex(width=width))
> should have been
> self.data = Complex(width=width)
>
> On Tue, May 5, 2015 at 8:49 AM, Ben Reynwar <be...@re...> wrote:
>
>> Great, thank you.  I must have been doing something else wrong.  And
>> thanks for the upper bound tip!
>>
>> On Tue, May 5, 2015 at 6:39 AM, Christopher Felton <
>> chr...@gm...> wrote:
>>
>>> On 5/4/15 11:01 PM, Ben Reynwar wrote:
>>> > Hi all,
>>> >
>>> > Is it possible to use interface definitions in interfaces?  For example
>>> > I might have an interface for a complex number, and then an interface
>>> > for a back-pressured stream of complex numbers that uses the complex
>>> > number interface as a component.
>>>
>>> Yes, it is possible.  A basic test case exists in
>>> the test suite:
>>>
>>>
>>> https://github.com/jandecaluwe/myhdl/blob/master/myhdl/test/conversion/general/test_interfaces3.py#L28
>>>
>>> Regards,
>>> Chris
>>>
>>>
>>>
>>> >
>>> > e.g.
>>> >
>>> > class Complex(object):
>>> >
>>> >      def __init__(self, width):
>>> >          maxval = pow(2, width-1)-1
>>>
>>> Note, Python is exclusive on the upper bounds, MyHDL
>>> follows this concept.  The max bound is one more than
>>> the max value.
>>>
>>> (python exclusive upper bound)
>>> http://stackoverflow.com/a/11364711/760977
>>>
>>> Regards,
>>> Chris
>>>
>>>
>>>
>>> ------------------------------------------------------------------------------
>>> One dashboard for servers and applications across Physical-Virtual-Cloud
>>> Widest out-of-the-box monitoring support with 50+ applications
>>> Performance metrics, stats and reports that give you Actionable Insights
>>> Deep dive visibility with transaction tracing using APM Insight.
>>> http://ad.doubleclick.net/ddm/clk/290420510;117567292;y
>>> _______________________________________________
>>> myhdl-list mailing list
>>> myh...@li...
>>> https://lists.sourceforge.net/lists/listinfo/myhdl-list
>>>
>>
>>
>

Re: [myhdl-list] Interfaces in Interfaces

[Ben R. <be...@re...>]

Problem was I was wrapping the interface with Signal.

i.e.
self.data = Signal(Complex(width=width))
should have been
self.data = Complex(width=width)

On Tue, May 5, 2015 at 8:49 AM, Ben Reynwar <be...@re...> wrote:

> Great, thank you.  I must have been doing something else wrong.  And
> thanks for the upper bound tip!
>
> On Tue, May 5, 2015 at 6:39 AM, Christopher Felton <chr...@gm...
> > wrote:
>
>> On 5/4/15 11:01 PM, Ben Reynwar wrote:
>> > Hi all,
>> >
>> > Is it possible to use interface definitions in interfaces?  For example
>> > I might have an interface for a complex number, and then an interface
>> > for a back-pressured stream of complex numbers that uses the complex
>> > number interface as a component.
>>
>> Yes, it is possible.  A basic test case exists in
>> the test suite:
>>
>>
>> https://github.com/jandecaluwe/myhdl/blob/master/myhdl/test/conversion/general/test_interfaces3.py#L28
>>
>> Regards,
>> Chris
>>
>>
>>
>> >
>> > e.g.
>> >
>> > class Complex(object):
>> >
>> >      def __init__(self, width):
>> >          maxval = pow(2, width-1)-1
>>
>> Note, Python is exclusive on the upper bounds, MyHDL
>> follows this concept.  The max bound is one more than
>> the max value.
>>
>> (python exclusive upper bound)
>> http://stackoverflow.com/a/11364711/760977
>>
>> Regards,
>> Chris
>>
>>
>>
>> ------------------------------------------------------------------------------
>> One dashboard for servers and applications across Physical-Virtual-Cloud
>> Widest out-of-the-box monitoring support with 50+ applications
>> Performance metrics, stats and reports that give you Actionable Insights
>> Deep dive visibility with transaction tracing using APM Insight.
>> http://ad.doubleclick.net/ddm/clk/290420510;117567292;y
>> _______________________________________________
>> myhdl-list mailing list
>> myh...@li...
>> https://lists.sourceforge.net/lists/listinfo/myhdl-list
>>
>
>

Re: [myhdl-list] Interfaces in Interfaces

[Ben R. <be...@re...>]

Great, thank you.  I must have been doing something else wrong.  And thanks
for the upper bound tip!

On Tue, May 5, 2015 at 6:39 AM, Christopher Felton <chr...@gm...>
wrote:

> On 5/4/15 11:01 PM, Ben Reynwar wrote:
> > Hi all,
> >
> > Is it possible to use interface definitions in interfaces?  For example
> > I might have an interface for a complex number, and then an interface
> > for a back-pressured stream of complex numbers that uses the complex
> > number interface as a component.
>
> Yes, it is possible.  A basic test case exists in
> the test suite:
>
>
> https://github.com/jandecaluwe/myhdl/blob/master/myhdl/test/conversion/general/test_interfaces3.py#L28
>
> Regards,
> Chris
>
>
>
> >
> > e.g.
> >
> > class Complex(object):
> >
> >      def __init__(self, width):
> >          maxval = pow(2, width-1)-1
>
> Note, Python is exclusive on the upper bounds, MyHDL
> follows this concept.  The max bound is one more than
> the max value.
>
> (python exclusive upper bound)
> http://stackoverflow.com/a/11364711/760977
>
> Regards,
> Chris
>
>
>
> ------------------------------------------------------------------------------
> One dashboard for servers and applications across Physical-Virtual-Cloud
> Widest out-of-the-box monitoring support with 50+ applications
> Performance metrics, stats and reports that give you Actionable Insights
> Deep dive visibility with transaction tracing using APM Insight.
> http://ad.doubleclick.net/ddm/clk/290420510;117567292;y
> _______________________________________________
> myhdl-list mailing list
> myh...@li...
> https://lists.sourceforge.net/lists/listinfo/myhdl-list
>

Re: [myhdl-list] Interfaces in Interfaces

[Christopher F. <chr...@gm...>]

On 5/4/15 11:01 PM, Ben Reynwar wrote:
> Hi all,
>
> Is it possible to use interface definitions in interfaces?  For example
> I might have an interface for a complex number, and then an interface
> for a back-pressured stream of complex numbers that uses the complex
> number interface as a component.

Yes, it is possible.  A basic test case exists in
the test suite:

https://github.com/jandecaluwe/myhdl/blob/master/myhdl/test/conversion/general/test_interfaces3.py#L28

Regards,
Chris



>
> e.g.
>
> class Complex(object):
>
>      def __init__(self, width):
>          maxval = pow(2, width-1)-1

Note, Python is exclusive on the upper bounds, MyHDL
follows this concept.  The max bound is one more than
the max value.

(python exclusive upper bound)
http://stackoverflow.com/a/11364711/760977

Regards,
Chris