linux-mips-commits — CVS Commit Patches

[Linux-mips-commits]CVS: linux/arch/mips/au1000/common time.c,1.7,1.8

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips/au1000/common
In directory usw-pr-cvs1:/tmp/cvs-serv22616

Modified Files:
	time.c 
Log Message:
Nuke more  clobbers.

Index: time.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/common/time.c,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- time.c	2001/09/12 21:31:06	1.7
+++ time.c	2001/10/05 16:52:35	1.8
@@ -324,7 +324,8 @@
 		"mfhi\t%0"
 		:"=r" (res)
 		:"r" (count),
-		 "r" (quotient));
+		 "r" (quotient)
+		 :"$1");
 
 	/*
  	 * Due to possible jiffies inconsistencies, we need to check 

[Linux-mips-commits]CVS: linux/arch/mips/sgi/kernel indy_sc.c,1.1.1.1,1.2

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips/sgi/kernel
In directory usw-pr-cvs1:/tmp/cvs-serv20926

Modified Files:
	indy_sc.c 
Log Message:
Nuke  clobbers.

Index: indy_sc.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/sgi/kernel/indy_sc.c,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -u -d -r1.1.1.1 -r1.2
--- indy_sc.c	2001/06/22 02:29:31	1.1.1.1
+++ indy_sc.c	2001/10/05 16:48:37	1.2
@@ -55,8 +55,7 @@
 	".set\tmips0\n\t"
 	".set\treorder"
 	: "=r" (first), "=r" (last), "=&r" (tmp)
-	: "0" (first), "1" (last)
-	: "$1");
+	: "0" (first), "1" (last));
 }
 
 static void indy_sc_wback_invalidate(unsigned long addr, unsigned long size)

[Linux-mips-commits]CVS: linux/arch/mips/kernel unaligned.c,1.4,1.5

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips/kernel
In directory usw-pr-cvs1:/tmp/cvs-serv20394

Modified Files:
	unaligned.c 
Log Message:
Nuke  clobbers also.

Index: unaligned.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/unaligned.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- unaligned.c	2001/08/25 02:19:27	1.4
+++ unaligned.c	2001/10/05 16:47:12	1.5
@@ -163,8 +163,7 @@
 			STR(PTR)"\t2b,%2\n\t"
 			".previous"
 			:"=&r" (value)
-			:"r" (addr), "i" (&&fault)
-			:"$1");
+			:"r" (addr), "i" (&&fault));
 		regs->regs[insn.i_format.rt] = value;
 		return;
 
@@ -208,8 +207,7 @@
 			STR(PTR)"\t2b,%2\n\t"
 			".previous"
 			:"=&r" (value)
-			:"r" (addr), "i" (&&fault)
-			:"$1");
+			:"r" (addr), "i" (&&fault));
 		regs->regs[insn.i_format.rt] = value;
 		return;
 
@@ -279,8 +277,7 @@
 			STR(PTR)"\t2b,%2\n\t"
 			".previous"
 			: /* no outputs */
-			:"r" (value), "r" (addr), "i" (&&fault)
-			:"$1");
+			:"r" (value), "r" (addr), "i" (&&fault));
 		return;
 
 	case sw_op:

[Linux-mips-commits]CVS: linux/arch/mips64/mm r4xx0.c,1.3,1.4

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips64/mm
In directory usw-pr-cvs1:/tmp/cvs-serv15314

Modified Files:
	r4xx0.c 
Log Message:
Remove  clobbers.

Index: r4xx0.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/mm/r4xx0.c,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- r4xx0.c	2001/07/23 23:49:44	1.3
+++ r4xx0.c	2001/10/05 16:36:38	1.4
@@ -95,9 +95,9 @@
 		"sd\t$0,-8(%0)\n\t"
 		".set\tat\n\t"
 		".set\treorder"
-		:"=r" (page)
-		:"0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_D)
-		:"$1", "memory");
+		: "=r" (page)
+		: "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_D)
+		: "memory");
 }
 
 static void r4k_clear_page_d32(void * page)
@@ -120,9 +120,9 @@
 		"sd\t$0,-8(%0)\n\t"
 		".set\tat\n\t"
 		".set\treorder"
-		:"=r" (page)
-		:"0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_D)
-		:"$1", "memory");
+		: "=r" (page)
+		: "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_D)
+		: "memory");
 }
 
 
@@ -180,11 +180,9 @@
 		"sd\t$0,-8(%0)\n\t"
 		".set\tat\n\t"
 		".set\treorder"
-		:"=r" (page)
-		:"0" (page),
-		 "I" (PAGE_SIZE),
-		 "i" (Create_Dirty_Excl_D)
-		:"$1", "memory");
+		: "=r" (page)
+		: "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_D)
+		: "memory");
 }
 
 /*
@@ -214,9 +212,9 @@
 		"sd\t$0,-8(%0)\n\t"
 		".set\tat\n\t"
 		".set\treorder"
-		:"=r" (page)
-		:"0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_D)
-		:"$1", "memory");
+		: "=r" (page)
+		: "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_D)
+		: "memory");
 	__restore_flags(flags);
 }
 
@@ -251,9 +249,9 @@
 		"sd\t$0,-8(%0)\n\t"
 		".set\tat\n\t"
 		".set\treorder"
-		:"=r" (page)
-		:"0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_SD)
-		:"$1","memory");
+		: "=r" (page)
+		: "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_SD)
+		: "memory");
 }
 
 static void r4k_clear_page_s32(void * page)
@@ -276,9 +274,9 @@
 		"sd\t$0,-8(%0)\n\t"
 		".set\tat\n\t"
 		".set\treorder"
-		:"=r" (page)
-		:"0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_SD)
-		:"$1","memory");
+		: "=r" (page)
+		: "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_SD)
+		: "memory");
 }
 
 static void r4k_clear_page_s64(void * page)
@@ -300,11 +298,9 @@
 		"sd\t$0,-8(%0)\n\t"
 		".set\tat\n\t"
 		".set\treorder"
-		:"=r" (page)
-		:"0" (page),
-		 "I" (PAGE_SIZE),
-		 "i" (Create_Dirty_Excl_SD)
-		:"$1","memory");
+		: "=r" (page)
+		: "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_SD)
+		: "memory");
 }
 
 static void r4k_clear_page_s128(void * page)
@@ -334,11 +330,9 @@
 		"sd\t$0,-8(%0)\n\t"
 		".set\tat\n\t"
 		".set\treorder"
-		:"=r" (page)
-		:"0" (page),
-		 "I" (PAGE_SIZE),
-		 "i" (Create_Dirty_Excl_SD)
-		:"$1", "memory");
+		: (page)
+		: "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_SD)
+		: "memory");
 }
 
 

[Linux-mips-commits]CVS: linux/arch/mips64/mm andes.c,1.2,1.3

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips64/mm
In directory usw-pr-cvs1:/tmp/cvs-serv14848

Modified Files:
	andes.c 
Log Message:
Remove  clobber.

Index: andes.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/mm/andes.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- andes.c	2001/07/23 23:49:44	1.2
+++ andes.c	2001/10/05 16:35:35	1.3
@@ -43,9 +43,9 @@
 		"sd\t$0,-8(%0)\n\t"
 		".set\tat\n\t"
 		".set\treorder"
-		:"=r" (page)
-		:"0" (page), "I" (PAGE_SIZE)
-		:"$1", "memory");
+		: "=r" (page)
+		: "0" (page), "I" (PAGE_SIZE)
+		: "memory");
 }
 
 /* R10000 has no Create_Dirty type cacheops.  */

[Linux-mips-commits]CVS: linux/arch/mips/galileo-boards/ev96100 time.c,1.4,1.5

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips/galileo-boards/ev96100
In directory usw-pr-cvs1:/tmp/cvs-serv14023

Modified Files:
	time.c 
Log Message:
Remove  clobber.

Index: time.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/galileo-boards/ev96100/time.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- time.c	2001/08/25 02:19:27	1.4
+++ time.c	2001/10/05 16:33:42	1.5
@@ -171,8 +171,7 @@
 			:"r" (timerhi),
 			 "m" (timerlo),
 			 "r" (tmp),
-			 "r" (USECS_PER_JIFFY)
-			:"$1");
+			 "r" (USECS_PER_JIFFY));
 		cached_quotient = quotient;
 	}
 

[Linux-mips-commits]CVS: linux/arch/mips/baget balo.c,NONE,1.1

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips/baget
In directory usw-pr-cvs1:/tmp/cvs-serv13236

Added Files:
	balo.c 
Log Message:
More inline assembler fixes.

--- NEW FILE: balo.c ---
/*
 * balo.c: BAget LOader
 *
 * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
 */
#include <linux/kernel.h>
#include <asm/system.h>
#include <asm/ptrace.h>
#include <asm/addrspace.h>

#include <asm/baget/baget.h>

#include "balo.h"  /* Includes some kernel symbol values */

static char *banner = "\nBaget Linux Loader v0.2\n";

static void mem_move (long *to, long *from, long size)
{
	while (size > 0) { 
		*to++ = *from++;
		size -= sizeof(long);
	}
}

static volatile int *mem_limit     = (volatile int*)KSEG1;
static volatile int *mem_limit_dbe = (volatile int*)KSEG1;

static int can_write (volatile int* p) {
        return p <  (int*)(KSEG1+BALO_OFFSET) ||
               p >= (int*)(KSEG1+BALO_OFFSET+BALO_SIZE);
}

static volatile enum balo_state_enum {
	BALO_INIT,
	MEM_INIT,
	MEM_PROBE,
	START_KERNEL
} balo_state = BALO_INIT;


static __inline__ void reset_and_jump(int start, int mem_upper)
{
	unsigned long tmp;

	__asm__ __volatile__(
                ".set\tnoreorder\n\t"
                ".set\tnoat\n\t"
                "mfc0\t$1, $12\n\t"
                "nop\n\t"
                "nop\n\t"
                "nop\n\t"
                "ori\t$1, $1, 0xff00\n\t"
                "xori\t$1, $1, 0xff00\n\t"
                "mtc0\t$1, $12\n\t"
                "nop\n\t"
                "nop\n\t"
                "nop\n\t"
		"move\t%0, %2\n\t"
		"jr\t%1\n\t"
		"nop\n\t"
                ".set\tat\n\t"
                ".set\treorder"           
                : "=&r" (tmp)
                : "Ir" (start), "Ir" (mem_upper)
                : "memory");
}

static void start_kernel(void)
{
	extern char _vmlinux_start, _vmlinux_end;
	extern char _ramdisk_start, _ramdisk_end;

        outs( "Relocating Linux... " );
	mem_move((long*)KSEG0, (long*)&_vmlinux_start, 
                 &_vmlinux_end-&_vmlinux_start);
	outs("done.\n");

	if (&_ramdisk_start != &_ramdisk_end) {
		outs("Setting up RAMDISK... ");
		if (*(unsigned long*)RAMDISK_BASE != 0xBA) {
			outs("Bad RAMDISK_BASE signature in system image.\n");
                        balo_hungup();
		}
		*(unsigned long*)RAMDISK_BASE = (unsigned long)&_ramdisk_start;
		*(unsigned long*)RAMDISK_SIZE = &_ramdisk_end -&_ramdisk_start;
		outs("done.\n");
	}

	{ 
		extern void flush_cache_low(int isize, int dsize);
		flush_cache_low(256*1024,256*1024);
	}

        balo_printf( "Kernel entry: %x\n\n", START);
	balo_state = START_KERNEL;
	reset_and_jump(START, (int)mem_limit-KSEG1+KSEG0);
}


static void mem_probe(void)
{
	balo_state = MEM_PROBE;
	outs("RAM: <");
	while(mem_limit < mem_limit_dbe) {
                if (can_write(mem_limit) && *mem_limit != 0) 
                        break; /* cycle found */
		outc('.');
		if (can_write(mem_limit)) 
                        *mem_limit = -1; /* mark */
                mem_limit += 0x40000;
	}
	outs(">\n");
	start_kernel();
}

volatile unsigned int int_cause;
volatile unsigned int epc;
volatile unsigned int badvaddr;

static void print_regs(void)
{
        balo_printf("CAUSE=%x EPC=%x BADVADDR=%x\n",
                    int_cause, epc, badvaddr);
}

void int_handler(struct pt_regs *regs)
{ 
        switch (balo_state) {
	case BALO_INIT:
                balo_printf("\nBALO: trap in balo itself.\n");
		print_regs();
                balo_hungup();
		break;
	case MEM_INIT:
                if ((int_cause & CAUSE_MASK) != CAUSE_DBE) {
                        balo_printf("\nBALO: unexpected trap during memory init.\n");
			print_regs();
                        balo_hungup();
		} else {
			mem_probe();
		}
		break;
	case MEM_PROBE:
                balo_printf("\nBALO: unexpected trap during memory probe.\n");
		print_regs();
                balo_hungup();
		break;
	case START_KERNEL:
                balo_printf("\nBALO: unexpected kernel trap.\n");
		print_regs();
                balo_hungup();
		break;
	}
        balo_printf("\nBALO: unexpected return from handler.\n");
	print_regs();
        balo_hungup();
}

static void mem_init(void)
{
	balo_state = MEM_INIT;

	while(1) {
		*mem_limit_dbe;
		if (can_write(mem_limit_dbe)) 
			*mem_limit_dbe = 0;

		mem_limit_dbe += 0x40000; /* +1M */
	}
        /*  no return: must go to int_handler */
}

void balo_entry(void)
{
        extern void except_vec3_generic(void);

	cli(); 
	outs(banner);
        memcpy((void *)(KSEG0 + 0x80), &except_vec3_generic, 0x80);
	mem_init();
}

/* Needed for linking */

int vsprintf(char *buf, const char *fmt, va_list arg)
{
	outs("BALO: vsprintf called.\n");
	balo_hungup();
	return 0;
}

[Linux-mips-commits]CVS: linux/drivers/media/video vino.c,NONE,1.1

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/drivers/media/video
In directory usw-pr-cvs1:/tmp/cvs-serv12619

Added Files:
	vino.c 
Log Message:
Inline assembler fixes.

--- NEW FILE: vino.c ---
/*
 * (incomplete) Driver for the Vino Video input system found in SGI Indys.
 *
 * Copyright (C) 1999 Ulf Carlsson (ul...@bu...)
 *
 * This isn't complete yet, please don't expect any video until I've written
 * some more code.
 */

#include <linux/module.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/mm.h>
#include <linux/errno.h>
#include <linux/videodev.h>

#include <asm/addrspace.h>
#include <asm/system.h>

#include "vino.h"

struct vino_device {
	struct video_device vdev;

	unsigned long chan;
#define VINO_CHAN_A		0
#define VINO_CHAN_B		1

	unsigned long flags;
#define VINO_DMA_ACTIVE		(1<<0)
};

/* We can actually receive TV and IndyCam input at the same time. Believe it or
 * not..
 */
static struct vino_device vino[2];

/* Those registers have to be accessed by either *one* 64 bit write or *one* 64
 * bit read. We need some asm to fix this. We can't use mips3 as standard
 * because we just save 32 bits at context switch.
 */

static __inline__ unsigned long long vino_reg_read(unsigned long addr)
{
	unsigned long long ret __attribute__ ((aligned (64)));
	unsigned long virt_addr = KSEG1ADDR(addr + VINO_BASE);
	unsigned long flags;

	save_and_cli(flags);
	__asm__ __volatile__(
		".set\tmips3\n\t"
		".set\tnoat\n\t"
		"ld\t$1,(%0)\n\t"
		"sd\t$1,(%1)\n\t"
		".set\tat\n\t"
		".set\tmips0"
		:
		:"r" (virt_addr), "r" (&ret));
	restore_flags(flags);

	return ret;
}

static __inline__ void vino_reg_write(unsigned long long value,
				      unsigned long addr)
{
	unsigned long virt_addr = KSEG1ADDR(addr + VINO_BASE);
	unsigned long flags;

	/* we might lose the upper parts of the registers which are not saved
	 * if there comes an interrupt in our way, play safe */

	save_and_cli(flags);
	__asm__ __volatile__(
		".set\tmips3\n\t"
		".set\tnoat\n\t"
		"ld\t$1,(%0)\n\t"
		"sd\t$1,(%1)\n\t"
		".set\tat\n\t"
		".set\tmips0"
		:
		:"r" (&value), "r" (virt_addr));
	restore_flags(flags);
}

static __inline__ void vino_reg_and(unsigned long long value,
				    unsigned long addr)
{
	unsigned long virt_addr = KSEG1ADDR(addr + VINO_BASE);
	unsigned long tmp, flags;

	__save_and_cli(flags);
	__asm__ __volatile__(
		".set\tmips3\t\t\t# vino_reg_and\n\t"
		".set\tnoat\n\t"
		"ld\t$1, (%1)\n\t"
		"ld\t%0, (%2)\n\t"
		"and\t$1, $1, %0\n\t"
		"sd\t$1, (%1)\n\t"
		".set\tat\n\t"
		".set\tmips0"
		: "=&r" (tmp)
		: "r" (virt_addr), "r" (&value));
	__restore_flags(flags);
}

static __inline__ void vino_reg_or(unsigned long long value,
				   unsigned long addr)
{
	unsigned long virt_addr = KSEG1ADDR(addr + VINO_BASE);
	unsigned long tmp, flags;

	save_and_cli(flags);
	__asm__ __volatile__(
		".set\tmips3\n\t"
		".set\tnoat\n\t"
		"ld\t$1, (%1)\n\t"
		"ld\t%0, (%2)\n\t"
		"or\t$1, $1, %0\n\t"
		"sd\t$1, (%1)\n\t"
		".set\tat\n\t"
		".set\tmips0"
		: "=&r" (tmp)
		: "r" (virt_addr), "r" (&value));
	restore_flags(flags);
}

static int vino_dma_setup(void)
{
	return 0;
}

static void vino_dma_stop(void)
{

}

static int vino_init(void)
{
	unsigned long ret;
	unsigned short rev, id;
	unsigned long long foo;
	unsigned long *bar;

	bar = (unsigned long *) &foo;

	ret = vino_reg_read(VINO_REVID);

	rev = (ret & VINO_REVID_REV_MASK);
	id = (ret & VINO_REVID_ID_MASK) >> 4;

	printk("Vino: ID:%02hx Rev:%02hx\n", id, rev);

	foo = vino_reg_read(VINO_A_DESC_DATA0);
	printk("0x%lx", bar[0]);
	printk("%lx ", bar[1]);
	foo = vino_reg_read(VINO_A_DESC_DATA1);
	printk("0x%lx", bar[0]);
	printk("%lx ", bar[1]);
	foo = vino_reg_read(VINO_A_DESC_DATA2);
	printk("0x%lx", bar[0]);
	printk("%lx ", bar[1]);
	foo = vino_reg_read(VINO_A_DESC_DATA3);
	printk("0x%lx", bar[0]);
	printk("%lx\n", bar[1]);
	foo = vino_reg_read(VINO_B_DESC_DATA0);
	printk("0x%lx", bar[0]);
	printk("%lx ", bar[1]);
	foo = vino_reg_read(VINO_B_DESC_DATA1);
	printk("0x%lx", bar[0]);
	printk("%lx ", bar[1]);
	foo = vino_reg_read(VINO_B_DESC_DATA2);
	printk("0x%lx", bar[0]);
	printk("%lx ", bar[1]);
	foo = vino_reg_read(VINO_B_DESC_DATA3);
	printk("0x%lx", bar[0]);
	printk("%lx\n", bar[1]);

	return 0;
}

static void vino_dma_go(struct vino_device *v)
{
	
}

/* Reset the vino back to default state */

static void vino_setup(struct vino_device *v)
{
	
}

static int vino_open(struct video_device *dev, int flags)
{
	return 0;
}

static void vino_close(struct video_device *dev)
{
}

static int vino_ioctl(struct video_device *dev, unsigned int cmd, void *arg)
{
	return 0;
}

static int vino_mmap(struct video_device *dev, const char *adr,
		     unsigned long size)
{
	return 0;
}

static struct video_device vino_dev = {
	owner:		THIS_MODULE,
	name:		"Vino IndyCam/TV",
	type:		VID_TYPE_CAPTURE,
	hardware:	VID_HARDWARE_VINO,
	open:		vino_open,
	close:		vino_close,
	ioctl:		vino_ioctl,
	mmap:		vino_mmap,
};

int __init init_vino(struct video_device *dev)
{
	int err;

	err = vino_init();
	if (err)
		return err;

#if 0
	if (video_register_device(&vinodev, VFL_TYPE_GRABBER) == -1) {
		return -ENODEV;
	}
#endif

	return 0;
}

#ifdef MODULE
int init_module(void)
{
	int err;

	err = vino_init();
	if (err)
		return err;

	return 0;
}

void cleanup_module(void)
{
}
#endif

[Linux-mips-commits]CVS: linux/include/asm-mips64 uaccess.h,1.4,1.5

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/include/asm-mips64
In directory usw-pr-cvs1:/tmp/cvs-serv6492

Modified Files:
	uaccess.h 
Log Message:
Fix the case of function calls in copy_*_user arguments garbling arguments.

Index: uaccess.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips64/uaccess.h,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- uaccess.h	2001/09/26 16:53:59	1.4
+++ uaccess.h	2001/10/05 16:17:11	1.5
@@ -219,92 +219,103 @@
 
 extern size_t __copy_user(void *__to, const void *__from, size_t __n);
 
-#define __copy_to_user(to,from,n)				\
-({								\
-	register void *__cu_to __asm__ ("$4");			\
-	register const void *__cu_from __asm__ ("$5");		\
-	register long __cu_len __asm__ ("$6");			\
-								\
-	__cu_to = (to);						\
-	__cu_from = (from);					\
-	__cu_len = (n);						\
-	__asm__ __volatile__(					\
-	__MODULE_JAL(__copy_user)				\
-	: "+r" (__cu_to), "+r" (__cu_from), "+r" (__cu_len)	\
-	:							\
-	: "$8", "$9", "$10", "$11", "$12", "$15", "$24", "$31",	\
-	  "memory");						\
-	__cu_len;						\
+#define __invoke_copy_to_user(to,from,n)				\
+({									\
+	register void *__cu_to_r __asm__ ("$4");			\
+	register const void *__cu_from_r __asm__ ("$5");		\
+	register long __cu_len_r __asm__ ("$6");			\
+									\
+	__cu_to_r = (to);						\
+	__cu_from_r = (from);						\
+	__cu_len_r = (n);						\
+	__asm__ __volatile__(						\
+	__MODULE_JAL(__copy_user)					\
+	: "+r" (__cu_to_r), "+r" (__cu_from_r), "+r" (__cu_len_r)	\
+	:								\
+	: "$8", "$9", "$10", "$11", "$12", "$15", "$24", "$31",		\
+	  "memory");							\
+	__cu_len_r;							\
 })
 
-#define __copy_from_user(to,from,n)				\
-({								\
-	register void *__cu_to __asm__ ("$4");			\
-	register const void *__cu_from __asm__ ("$5");		\
-	register long __cu_len __asm__ ("$6");			\
-								\
-	__cu_to = (to);						\
-	__cu_from = (from);					\
-	__cu_len = (n);						\
-	__asm__ __volatile__(					\
-	".set\tnoreorder\n\t"					\
-	__MODULE_JAL(__copy_user)				\
-	".set\tnoat\n\t"					\
-	"daddu\t$1, %1, %2\n\t"					\
-	".set\tat\n\t"						\
-	".set\treorder\n\t"					\
-	"move\t%0, $6"						\
-	: "+r" (__cu_to), "+r" (__cu_from), "+r" (__cu_len)	\
-	:							\
-	: "$8", "$9", "$10", "$11", "$12", "$15", "$24", "$31",	\
-	  "memory");						\
-	__cu_len;						\
+#define __copy_to_user(to,from,n)					\
+({									\
+	void *__cu_to;							\
+	const void *__cu_from;						\
+	long __cu_len;							\
+									\
+	__cu_to = (to);							\
+	__cu_from = (from);						\
+	__cu_len = (n);							\
+	__cu_len = __invoke_copy_to_user(__cu_to, __cu_from, __cu_len);	\
+	__cu_len;							\
 })
 
-#define copy_to_user(to,from,n)					\
-({								\
-	register void *__cu_to __asm__ ("$4");			\
-	register const void *__cu_from __asm__ ("$5");		\
-	register long __cu_len __asm__ ("$6");			\
-								\
-	__cu_to = (to);						\
-	__cu_from = (from);					\
-	__cu_len = (n);						\
-	if (access_ok(VERIFY_WRITE, __cu_to, __cu_len))		\
-		__asm__ __volatile__(				\
-		__MODULE_JAL(__copy_user)			\
-		: "+r" (__cu_to), "+r" (__cu_from),		\
-		  "+r" (__cu_len)				\
-		:						\
-		: "$8", "$9", "$10", "$11", "$12", "$15",	\
-		  "$24", "$31","memory");			\
-	__cu_len;						\
+#define copy_to_user(to,from,n)						\
+({									\
+	void *__cu_to;							\
+	const void *__cu_from;						\
+	long __cu_len;							\
+									\
+	__cu_to = (to);							\
+	__cu_from = (from);						\
+	__cu_len = (n);							\
+	if (access_ok(VERIFY_WRITE, __cu_to, __cu_len))			\
+		__cu_len = __invoke_copy_to_user(__cu_to, __cu_from,	\
+		                                __cu_len);		\
+	__cu_len;							\
 })
 
-#define copy_from_user(to,from,n)				\
-({								\
-	register void *__cu_to __asm__ ("$4");			\
-	register const void *__cu_from __asm__ ("$5");		\
-	register long __cu_len __asm__ ("$6");			\
-								\
-	__cu_to = (to);						\
-	__cu_from = (from);					\
-	__cu_len = (n);						\
-	if (access_ok(VERIFY_READ, __cu_from, __cu_len))	\
-		__asm__ __volatile__(				\
-		".set\tnoreorder\n\t"				\
-		__MODULE_JAL(__copy_user)			\
-		".set\tnoat\n\t"				\
-		"daddu\t$1, %1, %2\n\t"				\
-		".set\tat\n\t"					\
-		".set\treorder\n\t"				\
-		"move\t%0, $6"					\
-		: "+r" (__cu_to), "+r" (__cu_from),		\
-		  "+r" (__cu_len)				\
-		:						\
-		: "$8", "$9", "$10", "$11", "$12", "$15",	\
-		  "$24", "$31","memory");			\
-	__cu_len;						\
+#define __invoke_copy_from_user(to,from,n)				\
+({									\
+	register void *__cu_to_r __asm__ ("$4");			\
+	register const void *__cu_from_r __asm__ ("$5");		\
+	register long __cu_len_r __asm__ ("$6");			\
+									\
+	__cu_to_r = (to);						\
+	__cu_from_r = (from);						\
+	__cu_len_r = (n);						\
+	__asm__ __volatile__(						\
+	".set\tnoreorder\n\t"						\
+	__MODULE_JAL(__copy_user)					\
+	".set\tnoat\n\t"						\
+	"daddu\t$1, %1, %2\n\t"						\
+	".set\tat\n\t"							\
+	".set\treorder\n\t"						\
+	"move\t%0, $6"							\
+	: "+r" (__cu_to_r), "+r" (__cu_from_r), "+r" (__cu_len_r)	\
+	:								\
+	: "$8", "$9", "$10", "$11", "$12", "$15", "$24", "$31",		\
+	  "memory");							\
+	__cu_len_r;							\
+})
+
+#define __copy_from_user(to,from,n)					\
+({									\
+	void *__cu_to;							\
+	const void *__cu_from;						\
+	long __cu_len;							\
+									\
+	__cu_to = (to);							\
+	__cu_from = (from);						\
+	__cu_len = (n);							\
+	__cu_len = __invoke_copy_from_user(__cu_to, __cu_from,		\
+	                                   __cu_len);			\
+	__cu_len;							\
+})
+
+#define copy_from_user(to,from,n)					\
+({									\
+	void *__cu_to;							\
+	const void *__cu_from;						\
+	long __cu_len;							\
+									\
+	__cu_to = (to);							\
+	__cu_from = (from);						\
+	__cu_len = (n);							\
+	if (access_ok(VERIFY_READ, __cu_from, __cu_len))		\
+		__cu_len = __invoke_copy_from_user(__cu_to, __cu_from,	\
+		                                   __cu_len);		\
+	__cu_len;							\
 })
 
 static inline __kernel_size_t

[Linux-mips-commits]CVS: linux/include/asm-mips uaccess.h,1.4,1.5

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/include/asm-mips
In directory usw-pr-cvs1:/tmp/cvs-serv6205

Modified Files:
	uaccess.h 
Log Message:
Fix the case of function calls in copy_*_user arguments garbling arguments.

Index: uaccess.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips/uaccess.h,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- uaccess.h	2001/09/26 16:53:12	1.4
+++ uaccess.h	2001/10/05 16:16:30	1.5
@@ -269,82 +269,96 @@
 
 extern size_t __copy_user(void *__to, const void *__from, size_t __n);
 
-#define __copy_to_user(to,from,n) ({ \
-	register void *__cu_to __asm__ ("$4"); \
-	register const void *__cu_from __asm__ ("$5"); \
-	register long __cu_len __asm__ ("$6"); \
-	\
-	__cu_to = (to); \
-	__cu_from = (from); \
-	__cu_len = (n); \
-	__asm__ __volatile__( \
-		__MODULE_JAL(__copy_user) \
-	: "+r" (__cu_to), "+r" (__cu_from), "+r" (__cu_len) \
-	: \
-	: "$8", "$9", "$10", "$11", "$12", "$15", "$24", "$31","memory"); \
-	__cu_len; \
+#define __invoke_copy_to_user(to,from,n) ({				\
+	register void *__cu_to_r __asm__ ("$4");			\
+	register const void *__cu_from_r __asm__ ("$5");		\
+	register long __cu_len_r __asm__ ("$6");			\
+									\
+	__cu_to_r = (to);						\
+	__cu_from_r = (from);						\
+	__cu_len_r = (n);						\
+	__asm__ __volatile__(						\
+		__MODULE_JAL(__copy_user)				\
+	: "+r" (__cu_to_r), "+r" (__cu_from_r), "+r" (__cu_len_r)	\
+	:								\
+	: "$8", "$9", "$10", "$11", "$12", "$15", "$24", "$31",		\
+	  "memory");							\
+	__cu_len_r;							\
 })
 
-#define __copy_from_user(to,from,n) ({ \
-	register void *__cu_to __asm__ ("$4"); \
-	register const void *__cu_from __asm__ ("$5"); \
-	register long __cu_len __asm__ ("$6"); \
-	\
-	__cu_to = (to); \
-	__cu_from = (from); \
-	__cu_len = (n); \
-	__asm__ __volatile__( \
-		".set\tnoreorder\n\t" \
-		__MODULE_JAL(__copy_user) \
-		".set\tnoat\n\t" \
-		"addu\t$1, %1, %2\n\t" \
-		".set\tat\n\t" \
-		".set\treorder\n\t" \
-	: "+r" (__cu_to), "+r" (__cu_from), "+r" (__cu_len) \
-	: \
-	: "$8", "$9", "$10", "$11", "$12", "$15", "$24", "$31","memory"); \
-	__cu_len; \
+#define __copy_to_user(to,from,n) ({					\
+	void *__cu_to;							\
+	const void *__cu_from;						\
+	long __cu_len;							\
+									\
+	__cu_to = (to);							\
+	__cu_from = (from);						\
+	__cu_len = (n);							\
+	__cu_len = __invoke_copy_to_user(__cu_to, __cu_from, __cu_len);	\
+	__cu_len;							\
 })
 
-#define copy_to_user(to,from,n) ({ \
-	register void *__cu_to __asm__ ("$4"); \
-	register const void *__cu_from __asm__ ("$5"); \
-	register long __cu_len __asm__ ("$6"); \
-	\
-	__cu_to = (to); \
-	__cu_from = (from); \
-	__cu_len = (n); \
-	if (access_ok(VERIFY_WRITE, __cu_to, __cu_len)) \
-		__asm__ __volatile__( \
-			__MODULE_JAL(__copy_user) \
-		: "+r" (__cu_to), "+r" (__cu_from), "+r" (__cu_len) \
-		: \
-		: "$8", "$9", "$10", "$11", "$12", "$15", "$24", "$31", \
-		  "memory"); \
-	__cu_len; \
+#define copy_to_user(to,from,n) ({					\
+	void *__cu_to;							\
+	const void *__cu_from;						\
+	long __cu_len;							\
+									\
+	__cu_to = (to);							\
+	__cu_from = (from);						\
+	__cu_len = (n);							\
+	if (access_ok(VERIFY_WRITE, __cu_to, __cu_len))			\
+		__cu_len = __invoke_copy_to_user(__cu_to, __cu_from,	\
+		                                 __cu_len);		\
+	__cu_len;							\
 })
 
-#define copy_from_user(to,from,n) ({ \
-	register void *__cu_to __asm__ ("$4"); \
-	register const void *__cu_from __asm__ ("$5"); \
-	register long __cu_len __asm__ ("$6"); \
-	\
-	__cu_to = (to); \
-	__cu_from = (from); \
-	__cu_len = (n); \
-	if (access_ok(VERIFY_READ, __cu_from, __cu_len)) \
-		__asm__ __volatile__( \
-			".set\tnoreorder\n\t" \
-			__MODULE_JAL(__copy_user) \
-			".set\tnoat\n\t" \
-			"addu\t$1, %1, %2\n\t" \
-			".set\tat\n\t" \
-			".set\treorder\n\t" \
-		: "+r" (__cu_to), "+r" (__cu_from), "+r" (__cu_len) \
-		: \
-		: "$8", "$9", "$10", "$11", "$12", "$15", "$24", "$31", \
-		  "memory"); \
-	__cu_len; \
+#define __invoke_copy_from_user(to,from,n) ({				\
+	register void *__cu_to_r __asm__ ("$4");			\
+	register const void *__cu_from_r __asm__ ("$5");		\
+	register long __cu_len_r __asm__ ("$6");			\
+									\
+	__cu_to_r = (to);						\
+	__cu_from_r = (from);						\
+	__cu_len_r = (n);						\
+	__asm__ __volatile__(						\
+		".set\tnoreorder\n\t"					\
+		__MODULE_JAL(__copy_user)				\
+		".set\tnoat\n\t"					\
+		"addu\t$1, %1, %2\n\t"					\
+		".set\tat\n\t"						\
+		".set\treorder\n\t"					\
+	: "+r" (__cu_to_r), "+r" (__cu_from_r), "+r" (__cu_len_r)	\
+	:								\
+	: "$8", "$9", "$10", "$11", "$12", "$15", "$24", "$31",		\
+	  "memory");							\
+	__cu_len_r;							\
+})
+
+#define __copy_from_user(to,from,n) ({					\
+	void *__cu_to;							\
+	const void *__cu_from;						\
+	long __cu_len;							\
+									\
+	__cu_to = (to);							\
+	__cu_from = (from);						\
+	__cu_len = (n);							\
+	__cu_len = __invoke_copy_from_user(__cu_to, __cu_from,		\
+	                                   __cu_len);			\
+	__cu_len;							\
+})
+
+#define copy_from_user(to,from,n) ({					\
+	void *__cu_to;							\
+	const void *__cu_from;						\
+	long __cu_len;							\
+									\
+	__cu_to = (to);							\
+	__cu_from = (from);						\
+	__cu_len = (n);							\
+	if (access_ok(VERIFY_READ, __cu_from, __cu_len))		\
+		__cu_len = __invoke_copy_from_user(__cu_to, __cu_from,	\
+		                                   __cu_len);		\
+	__cu_len;							\
 })
 
 static inline __kernel_size_t

[Linux-mips-commits]CVS: linux/drivers/pcmcia au1000_pb1000.c,1.2,1.3

[Pete P. <pp...@us...>]

Update of /cvsroot/linux-mips/linux/drivers/pcmcia
In directory usw-pr-cvs1:/tmp/cvs-serv3483/drivers/pcmcia

Modified Files:
	au1000_pb1000.c 
Log Message:
Fixed a 3.3/5V voltage sense bug.


Index: au1000_pb1000.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/pcmcia/au1000_pb1000.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- au1000_pb1000.c	2001/10/03 22:49:23	1.2
+++ au1000_pb1000.c	2001/10/04 21:16:48	1.3
@@ -118,16 +118,7 @@
 			switch (vs) {
 				case 0:
 				case 1:
-					DEBUG("%d: vs_3v\n", sock);
-					state->vs_3v=1;
-					break;
 				case 2:
-					/* 
-					 * This should be Xv voltage.
-					 * Don't know why with some cards the 
-					 * register is reporting Xv voltage. 
-					 * For now assume case 2 is really 3V.
-					 */
 					state->vs_3v=1;
 					break;
 				case 3:
@@ -143,16 +134,7 @@
 			switch (vs) {
 				case 0:
 				case 1:
-					state->vs_3v=1;
-					DEBUG(1, "%d: vs_3v\n", sock);
-					break;
 				case 2:
-					/* 
-					 * This should be Xv voltage.
-					 * Don't know why with some cards the 
-					 * register is reporting Xv voltage. 
-					 * For now assume case 2 is really 3V.
-					 */
 					state->vs_3v=1;
 					break;
 				case 3:

[Linux-mips-commits]CVS: linux/include/asm-mips64 checksum.h,1.2,1.3 bitops.h,1.3,1.4 system.h,1.2,1.3

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/include/asm-mips64
In directory usw-pr-cvs1:/tmp/cvs-serv25260

Modified Files:
	bitops.h system.h 
Added Files:
	checksum.h 
Log Message:
Remove all  clobbers, they're useless.


Index: bitops.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips64/bitops.h,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- bitops.h	2001/09/04 16:15:28	1.3
+++ bitops.h	2001/10/04 16:26:39	1.4
@@ -338,8 +338,7 @@
 		"2:"
 		: "=r" (res), "=r" (dummy), "=r" (addr)
 		: "0" ((signed int) 0), "1" ((unsigned int) 0xffffffff),
-		  "2" (addr), "r" (size)
-		: "$1");
+		  "2" (addr), "r" (size));
 
 	return res;
 }
@@ -371,8 +370,7 @@
 			".set\treorder\n"
 			"1:"
 			: "=r" (set), "=r" (dummy)
-			: "0" (0), "1" (1 << bit), "r" (*p)
-			: "$1");
+			: "0" (0), "1" (1 << bit), "r" (*p));
 		if (set < (32 - bit))
 			return set + offset;
 		set = 32 - bit;

Index: system.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips64/system.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- system.h	2001/09/04 16:17:11	1.2
+++ system.h	2001/10/04 16:26:39	1.3
@@ -30,7 +30,7 @@
 		".set\treorder"
 		: /* no outputs */
 		: /* no inputs */
-		: "$1", "memory");
+		: "memory");
 }
 
 /*
@@ -56,7 +56,7 @@
 		".set\treorder"
 		: /* no outputs */
 		: /* no inputs */
-		: "$1", "memory");
+		: "memory");
 }
 
 #define __save_flags(x)							\
@@ -81,7 +81,7 @@
 	".set\treorder"							\
 	: "=r" (x)							\
 	: /* no inputs */						\
-	: "$1", "memory")
+	: "memory")
 
 #define __restore_flags(flags)						\
 do {									\
@@ -103,7 +103,7 @@
 		".set\treorder"						\
 		: "=r" (__tmp1)						\
 		: "0" (flags)						\
-		: "$1", "memory");					\
+		: "memory");						\
 } while(0)
 
 #ifdef CONFIG_SMP

[Linux-mips-commits]CVS: linux/arch/mips/math-emu dp_add.c,NONE,1.1 dp_cmp.c,NONE,1.1 dp_div.c,NONE,1.1 dp_fsp.c,NONE,1.1 dp_mul.c,NONE,1.1 dp_simple.c,NONE,1.1 dp_sqrt.c,NONE,1.1 dp_sub.c,1.2,1.3 ieee754.c,NONE,1.1 ieee754.h,NONE,1.1 ieee754dp.c,NONE,1.1 ieee754int.h,NONE,1.1 ieee754sp.c,NONE,1.1 kernel_linkage.c,NONE,1.1 sp_add.c,NONE,1.1 sp_cmp.c,NONE,1.1 sp_div.c,NONE,1.1 sp_fdp.c,NONE,1.1 sp_mul.c,NONE,1.1 sp_simple.c,NONE,1.1 sp_sqrt.c,NONE,1.1 sp_sub.c,NONE,1.1 cp1emu.c,1.6,1.7

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips/math-emu
In directory usw-pr-cvs1:/tmp/cvs-serv23991

Modified Files:
	cp1emu.c 
Added Files:
	dp_add.c dp_cmp.c dp_div.c dp_fsp.c dp_mul.c dp_simple.c 
	dp_sqrt.c dp_sub.c ieee754.c ieee754.h ieee754dp.c 
	ieee754int.h ieee754sp.c kernel_linkage.c sp_add.c sp_cmp.c 
	sp_div.c sp_fdp.c sp_mul.c sp_simple.c sp_sqrt.c sp_sub.c 
Log Message:
Lots of FPU bug fixes from Kjeld Borch Egevang.

--- NEW FILE: dp_add.c ---
/* IEEE754 floating point arithmetic
 * double precision: common utilities
 */
/*
 * MIPS floating point support
 * Copyright (C) 1994-2000 Algorithmics Ltd.  All rights reserved.
 * http://www.algor.co.uk
 *
 * ########################################################################
 *
 *  This program is free software; you can distribute it and/or modify it
 *  under the terms of the GNU General Public License (Version 2) as
 *  published by the Free Software Foundation.
 *
 *  This program is distributed in the hope it will be useful, but WITHOUT
 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 *  for more details.
 *
 *  You should have received a copy of the GNU General Public License along
 *  with this program; if not, write to the Free Software Foundation, Inc.,
 *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
 *
 * ########################################################################
 *
 */


#include "ieee754dp.h"

ieee754dp ieee754dp_add(ieee754dp x, ieee754dp y)
{
	COMPXDP;
	COMPYDP;

	EXPLODEXDP;
	EXPLODEYDP;

	CLEARCX;

	FLUSHXDP;
	FLUSHYDP;

	switch (CLPAIR(xc, yc)) {
	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
		SETCX(IEEE754_INVALID_OPERATION);
		return ieee754dp_nanxcpt(ieee754dp_indef(), "add", x, y);

	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN):
	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
		return y;

	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_INF):
		return x;


		/* Inifity handeling 
		 */

	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF):
		if (xs == ys)
			return x;
		SETCX(IEEE754_INVALID_OPERATION);
		return ieee754dp_xcpt(ieee754dp_indef(), "add", x, y);

	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_INF):
	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF):
	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_INF):
		return y;

	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO):
	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_NORM):
	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM):
		return x;

		/* Zero handeling 
		 */

	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO):
		if (xs == ys)
			return x;
		else
			return ieee754dp_zero(ieee754_csr.rm ==
					      IEEE754_RD);

	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
		return x;

	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_NORM):
	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_DNORM):
		return y;

	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
		DPDNORMX;

		/* FALL THROUGH */

	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
		DPDNORMY;
		break;

	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_NORM):
		DPDNORMX;
		break;

	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_NORM):
		break;
	}
	assert(xm & DP_HIDDEN_BIT);
	assert(ym & DP_HIDDEN_BIT);

	/* provide guard,round and stick bit space */
	xm <<= 3;
	ym <<= 3;

	if (xe > ye) {
		/* have to shift y fraction right to align
		 */
		int s = xe - ye;
		ym = XDPSRS(ym, s);
		ye += s;
	} else if (ye > xe) {
		/* have to shift x fraction right to align
		 */
		int s = ye - xe;
		xm = XDPSRS(xm, s);
		xe += s;
	}
	assert(xe == ye);
	assert(xe <= DP_EMAX);

	if (xs == ys) {
		/* generate 28 bit result of adding two 27 bit numbers
		 * leaving result in xm,xs,xe
		 */
		xm = xm + ym;
		xe = xe;
		xs = xs;

		if (xm >> (DP_MBITS + 1 + 3)) {	/* carry out */
			xm = XDPSRS1(xm);
			xe++;
		}
	} else {
		if (xm >= ym) {
			xm = xm - ym;
			xe = xe;
			xs = xs;
		} else {
			xm = ym - xm;
			xe = xe;
			xs = ys;
		}
		if (xm == 0)
			return ieee754dp_zero(ieee754_csr.rm ==
					      IEEE754_RD);

		/* normalize to rounding precision */
		while ((xm >> (DP_MBITS + 3)) == 0) {
			xm <<= 1;
			xe--;
		}

	}
	DPNORMRET2(xs, xe, xm, "add", x, y);
}

--- NEW FILE: dp_cmp.c ---
/* IEEE754 floating point arithmetic
 * double precision: common utilities
 */
/*
 * MIPS floating point support
 * Copyright (C) 1994-2000 Algorithmics Ltd.  All rights reserved.
 * http://www.algor.co.uk
 *
 * ########################################################################
 *
 *  This program is free software; you can distribute it and/or modify it
 *  under the terms of the GNU General Public License (Version 2) as
 *  published by the Free Software Foundation.
 *
 *  This program is distributed in the hope it will be useful, but WITHOUT
 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 *  for more details.
 *
 *  You should have received a copy of the GNU General Public License along
 *  with this program; if not, write to the Free Software Foundation, Inc.,
 *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
 *
 * ########################################################################
 */


#include "ieee754dp.h"

int ieee754dp_cmp(ieee754dp x, ieee754dp y, int cmp)
{
	COMPXDP;
	COMPYDP;

	EXPLODEXDP;
	EXPLODEYDP;
	FLUSHXDP;
	FLUSHYDP;
	CLEARCX;	/* Even clear inexact flag here */

	if (ieee754dp_isnan(x) || ieee754dp_isnan(y)) {
		if (xc == IEEE754_CLASS_SNAN || yc == IEEE754_CLASS_SNAN)
			SETCX(IEEE754_INVALID_OPERATION);
		if (cmp & IEEE754_CUN)
			return 1;
		if (cmp & (IEEE754_CLT | IEEE754_CGT)) {
			if (SETCX(IEEE754_INVALID_OPERATION))
				return ieee754si_xcpt(0, "fcmpf", x);
		}
		return 0;
	} else {
		long long int vx = x.bits;
		long long int vy = y.bits;

		if (vx < 0)
			vx = -vx ^ DP_SIGN_BIT;
		if (vy < 0)
			vy = -vy ^ DP_SIGN_BIT;

		if (vx < vy)
			return (cmp & IEEE754_CLT) != 0;
		else if (vx == vy)
			return (cmp & IEEE754_CEQ) != 0;
		else
			return (cmp & IEEE754_CGT) != 0;
	}
}

--- NEW FILE: dp_div.c ---
/* IEEE754 floating point arithmetic
 * double precision: common utilities
 */
/*
 * MIPS floating point support
 * Copyright (C) 1994-2000 Algorithmics Ltd.  All rights reserved.
 * http://www.algor.co.uk
 *
 * ########################################################################
 *
 *  This program is free software; you can distribute it and/or modify it
 *  under the terms of the GNU General Public License (Version 2) as
 *  published by the Free Software Foundation.
 *
 *  This program is distributed in the hope it will be useful, but WITHOUT
 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 *  for more details.
 *
 *  You should have received a copy of the GNU General Public License along
 *  with this program; if not, write to the Free Software Foundation, Inc.,
 *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
 *
 * ########################################################################
 */


#include "ieee754dp.h"

ieee754dp ieee754dp_div(ieee754dp x, ieee754dp y)
{
	COMPXDP;
	COMPYDP;

	EXPLODEXDP;
	EXPLODEYDP;

	CLEARCX;

	FLUSHXDP;
	FLUSHYDP;

	switch (CLPAIR(xc, yc)) {
	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
		SETCX(IEEE754_INVALID_OPERATION);
		return ieee754dp_nanxcpt(ieee754dp_indef(), "div", x, y);

	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN):
	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
		return y;

	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_INF):
		return x;


		/* Infinity handeling 
		 */

	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF):
		SETCX(IEEE754_INVALID_OPERATION);
		return ieee754dp_xcpt(ieee754dp_indef(), "div", x, y);

	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_INF):
	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF):
	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_INF):
		return ieee754dp_zero(xs ^ ys);

	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO):
	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_NORM):
	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM):
		return ieee754dp_inf(xs ^ ys);

		/* Zero handeling 
		 */

	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO):
		SETCX(IEEE754_INVALID_OPERATION);
		return ieee754dp_xcpt(ieee754dp_indef(), "div", x, y);

	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
		SETCX(IEEE754_ZERO_DIVIDE);
		return ieee754dp_xcpt(ieee754dp_inf(xs ^ ys), "div", x, y);

	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_NORM):
	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_DNORM):
		return ieee754dp_zero(xs == ys ? 0 : 1);

	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
		DPDNORMX;

	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
		DPDNORMY;
		break;

	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_NORM):
		DPDNORMX;
		break;

	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_NORM):
		break;
	}
	assert(xm & DP_HIDDEN_BIT);
	assert(ym & DP_HIDDEN_BIT);

	/* provide rounding space */
	xm <<= 3;
	ym <<= 3;

	{
		/* now the dirty work */

		unsigned long long rm = 0;
		int re = xe - ye;
		unsigned long long bm;

		for (bm = DP_MBIT(DP_MBITS + 2); bm; bm >>= 1) {
			if (xm >= ym) {
				xm -= ym;
				rm |= bm;
				if (xm == 0)
					break;
			}
			xm <<= 1;
		}
		rm <<= 1;
		if (xm)
			rm |= 1;	/* have remainder, set sticky */

		assert(rm);

		/* normalise rm to rounding precision ?
		 */
		while ((rm >> (DP_MBITS + 3)) == 0) {
			rm <<= 1;
			re--;
		}

		DPNORMRET2(xs == ys ? 0 : 1, re, rm, "div", x, y);
	}
}

--- NEW FILE: dp_fsp.c ---
/* IEEE754 floating point arithmetic
 * double precision: common utilities
 */
/*
 * MIPS floating point support
 * Copyright (C) 1994-2000 Algorithmics Ltd.  All rights reserved.
 * http://www.algor.co.uk
 *
 * ########################################################################
 *
 *  This program is free software; you can distribute it and/or modify it
 *  under the terms of the GNU General Public License (Version 2) as
 *  published by the Free Software Foundation.
 *
 *  This program is distributed in the hope it will be useful, but WITHOUT
 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 *  for more details.
 *
 *  You should have received a copy of the GNU General Public License along
 *  with this program; if not, write to the Free Software Foundation, Inc.,
 *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
 *
 * ########################################################################
 */


#include "ieee754dp.h"

ieee754dp ieee754dp_fsp(ieee754sp x)
{
	COMPXSP;

	EXPLODEXSP;

	CLEARCX;

	FLUSHXSP;

	switch (xc) {
	case IEEE754_CLASS_SNAN:
		SETCX(IEEE754_INVALID_OPERATION);
		return ieee754dp_nanxcpt(ieee754dp_indef(), "fsp");
	case IEEE754_CLASS_QNAN:
		return ieee754dp_nanxcpt(builddp(xs,
						 DP_EMAX + 1 + DP_EBIAS,
						 ((unsigned long long) xm
						  << (DP_MBITS -
						      SP_MBITS))), "fsp",
					 x);
	case IEEE754_CLASS_INF:
		return ieee754dp_inf(xs);
	case IEEE754_CLASS_ZERO:
		return ieee754dp_zero(xs);
	case IEEE754_CLASS_DNORM:
		/* normalize */
		while ((xm >> SP_MBITS) == 0) {
			xm <<= 1;
			xe--;
		}
		break;
	case IEEE754_CLASS_NORM:
		break;
	}

	/* CANT possibly overflow,underflow, or need rounding
	 */

	/* drop the hidden bit */
	xm &= ~SP_HIDDEN_BIT;

	return builddp(xs, xe + DP_EBIAS,
		       (unsigned long long) xm << (DP_MBITS - SP_MBITS));
}

--- NEW FILE: dp_mul.c ---
/* IEEE754 floating point arithmetic
 * double precision: common utilities
 */
/*
 * MIPS floating point support
 * Copyright (C) 1994-2000 Algorithmics Ltd.  All rights reserved.
 * http://www.algor.co.uk
 *
 * ########################################################################
 *
 *  This program is free software; you can distribute it and/or modify it
 *  under the terms of the GNU General Public License (Version 2) as
 *  published by the Free Software Foundation.
 *
 *  This program is distributed in the hope it will be useful, but WITHOUT
 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 *  for more details.
 *
 *  You should have received a copy of the GNU General Public License along
 *  with this program; if not, write to the Free Software Foundation, Inc.,
 *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
 *
 * ########################################################################
 */


#include "ieee754dp.h"

ieee754dp ieee754dp_mul(ieee754dp x, ieee754dp y)
{
	COMPXDP;
	COMPYDP;

	EXPLODEXDP;
	EXPLODEYDP;

	CLEARCX;

	FLUSHXDP;
	FLUSHYDP;

	switch (CLPAIR(xc, yc)) {
	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
		SETCX(IEEE754_INVALID_OPERATION);
		return ieee754dp_nanxcpt(ieee754dp_indef(), "mul", x, y);

	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN):
	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
		return y;

	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_INF):
		return x;


		/* Infinity handeling */

	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO):
	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF):
		SETCX(IEEE754_INVALID_OPERATION);
		return ieee754dp_xcpt(ieee754dp_indef(), "mul", x, y);

	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_INF):
	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_INF):
	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_NORM):
	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM):
	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF):
		return ieee754dp_inf(xs ^ ys);

	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO):
	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_NORM):
	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_DNORM):
	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
		return ieee754dp_zero(xs ^ ys);


	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
		DPDNORMX;

	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
		DPDNORMY;
		break;

	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_NORM):
		DPDNORMX;
		break;

	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_NORM):
		break;
	}
	/* rm = xm * ym, re = xe+ye basicly */
	assert(xm & DP_HIDDEN_BIT);
	assert(ym & DP_HIDDEN_BIT);
	{
		int re = xe + ye;
		int rs = xs ^ ys;
		unsigned long long rm;

		/* shunt to top of word */
		xm <<= 64 - (DP_MBITS + 1);
		ym <<= 64 - (DP_MBITS + 1);

		/* multiply 32bits xm,ym to give high 32bits rm with stickness
		 */

		/* 32 * 32 => 64 */
#define DPXMULT(x,y)	((unsigned long long)(x) * (unsigned long long)y)

		{
			unsigned lxm = xm;
			unsigned hxm = xm >> 32;
			unsigned lym = ym;
			unsigned hym = ym >> 32;
			unsigned long long lrm;
			unsigned long long hrm;

			lrm = DPXMULT(lxm, lym);
			hrm = DPXMULT(hxm, hym);

			{
				unsigned long long t = DPXMULT(lxm, hym);
				{
					unsigned long long at =
					    lrm + (t << 32);
					hrm += at < lrm;
					lrm = at;
				}
				hrm = hrm + (t >> 32);
			}

			{
				unsigned long long t = DPXMULT(hxm, lym);
				{
					unsigned long long at =
					    lrm + (t << 32);
					hrm += at < lrm;
					lrm = at;
				}
				hrm = hrm + (t >> 32);
			}
			rm = hrm | (lrm != 0);
		}

		/*
		 * sticky shift down to normal rounding precision
		 */
		if ((signed long long) rm < 0) {
			rm =
			    (rm >> (64 - (DP_MBITS + 1 + 3))) |
			    ((rm << (DP_MBITS + 1 + 3)) != 0);
			re++;
		} else {
			rm =
			    (rm >> (64 - (DP_MBITS + 1 + 3 + 1))) |
			    ((rm << (DP_MBITS + 1 + 3 + 1)) != 0);
		}
		assert(rm & (DP_HIDDEN_BIT << 3));
		DPNORMRET2(rs, re, rm, "mul", x, y);
	}
}

--- NEW FILE: dp_simple.c ---
/* IEEE754 floating point arithmetic
 * double precision: common utilities
 */
/*
 * MIPS floating point support
 * Copyright (C) 1994-2000 Algorithmics Ltd.  All rights reserved.
 * http://www.algor.co.uk
 *
 * ########################################################################
 *
 *  This program is free software; you can distribute it and/or modify it
 *  under the terms of the GNU General Public License (Version 2) as
 *  published by the Free Software Foundation.
 *
 *  This program is distributed in the hope it will be useful, but WITHOUT
 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 *  for more details.
 *
 *  You should have received a copy of the GNU General Public License along
 *  with this program; if not, write to the Free Software Foundation, Inc.,
 *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
 *
 * ########################################################################
 */


#include "ieee754dp.h"

int ieee754dp_finite(ieee754dp x)
{
	return DPBEXP(x) != DP_EMAX + 1 + DP_EBIAS;
}

ieee754dp ieee754dp_copysign(ieee754dp x, ieee754dp y)
{
	CLEARCX;
	DPSIGN(x) = DPSIGN(y);
	return x;
}


ieee754dp ieee754dp_neg(ieee754dp x)
{
	COMPXDP;

	EXPLODEXDP;
	CLEARCX;
	FLUSHXDP;

	if (xc == IEEE754_CLASS_SNAN) {
		SETCX(IEEE754_INVALID_OPERATION);
		return ieee754dp_nanxcpt(ieee754dp_indef(), "neg");
	}

	if (ieee754dp_isnan(x))	/* but not infinity */
		return ieee754dp_nanxcpt(x, "neg", x);

	/* quick fix up */
	DPSIGN(x) ^= 1;
	return x;
}


ieee754dp ieee754dp_abs(ieee754dp x)
{
	COMPXDP;

	EXPLODEXDP;
	CLEARCX;
	FLUSHXDP;

	if (xc == IEEE754_CLASS_SNAN) {
		SETCX(IEEE754_INVALID_OPERATION);
		return ieee754dp_nanxcpt(ieee754dp_indef(), "neg");
	}

	if (ieee754dp_isnan(x))	/* but not infinity */
		return ieee754dp_nanxcpt(x, "abs", x);

	/* quick fix up */
	DPSIGN(x) = 0;
	return x;
}

--- NEW FILE: dp_sqrt.c ---
/* IEEE754 floating point arithmetic
 * double precision square root
 */
/*
 * MIPS floating point support
 * Copyright (C) 1994-2000 Algorithmics Ltd.  All rights reserved.
 * http://www.algor.co.uk
 *
 * ########################################################################
 *
 *  This program is free software; you can distribute it and/or modify it
 *  under the terms of the GNU General Public License (Version 2) as
 *  published by the Free Software Foundation.
 *
 *  This program is distributed in the hope it will be useful, but WITHOUT
 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 *  for more details.
 *
 *  You should have received a copy of the GNU General Public License along
 *  with this program; if not, write to the Free Software Foundation, Inc.,
 *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
 *
 * ########################################################################
 */


#include "ieee754dp.h"

static const unsigned table[] = {
	0, 1204, 3062, 5746, 9193, 13348, 18162, 23592,
	29598, 36145, 43202, 50740, 58733, 67158, 75992,
	85215, 83599, 71378, 60428, 50647, 41945, 34246,
	27478, 21581, 16499, 12183, 8588, 5674, 3403,
	1742, 661, 130
};

ieee754dp ieee754dp_sqrt(ieee754dp x)
{
	struct ieee754_csr oldcsr;
	ieee754dp y, z, t;
	unsigned scalx, yh;
	COMPXDP;

	EXPLODEXDP;
	CLEARCX;
	FLUSHXDP;

	/* x == INF or NAN? */
	switch (xc) {
	case IEEE754_CLASS_QNAN:
		/* sqrt(Nan) = Nan */
		return ieee754dp_nanxcpt(x, "sqrt");
	case IEEE754_CLASS_SNAN:
		SETCX(IEEE754_INVALID_OPERATION);
		return ieee754dp_nanxcpt(ieee754dp_indef(), "sqrt");
	case IEEE754_CLASS_ZERO:
		/* sqrt(0) = 0 */
		return x;
	case IEEE754_CLASS_INF:
		if (xs) {
			/* sqrt(-Inf) = Nan */
			SETCX(IEEE754_INVALID_OPERATION);
			return ieee754dp_nanxcpt(ieee754dp_indef(), "sqrt");
		}
		/* sqrt(+Inf) = Inf */
		return x;
	case IEEE754_CLASS_DNORM:
		DPDNORMX;
		/* fall through */
	case IEEE754_CLASS_NORM:
		if (xs) {
			/* sqrt(-x) = Nan */
			SETCX(IEEE754_INVALID_OPERATION);
			return ieee754dp_nanxcpt(ieee754dp_indef(), "sqrt");
		}
		break;
	}

	/* save old csr; switch off INX enable & flag; set RN rounding */
	oldcsr = ieee754_csr;
	ieee754_csr.mx &= ~IEEE754_INEXACT;
	ieee754_csr.sx &= ~IEEE754_INEXACT;
	ieee754_csr.rm = IEEE754_RN;

	/* adjust exponent to prevent overflow */
	scalx = 0;
	if (xe > 512) {		/* x > 2**-512? */
		xe -= 512;	/* x = x / 2**512 */
		scalx += 256;
	} else if (xe < -512) {	/* x < 2**-512? */
		xe += 512;	/* x = x * 2**512 */
		scalx -= 256;
	}

	y = x = builddp(0, xe + DP_EBIAS, xm & ~DP_HIDDEN_BIT);

	/* magic initial approximation to almost 8 sig. bits */
	yh = y.bits >> 32;
	yh = (yh >> 1) + 0x1ff80000;
	yh = yh - table[(yh >> 15) & 31];
	y.bits = ((unsigned long long) yh << 32) | (y.bits & 0xffffffff);

	/* Heron's rule once with correction to improve to ~18 sig. bits */
	/* t=x/y; y=y+t; py[n0]=py[n0]-0x00100006; py[n1]=0; */
	t = ieee754dp_div(x, y);
	y = ieee754dp_add(y, t);
	y.bits -= 0x0010000600000000LL;
	y.bits &= 0xffffffff00000000LL;

	/* triple to almost 56 sig. bits: y ~= sqrt(x) to within 1 ulp */
	/* t=y*y; z=t;  pt[n0]+=0x00100000; t+=z; z=(x-z)*y; */
	z = t = ieee754dp_mul(y, y);
	t.parts.bexp += 0x001;
	t = ieee754dp_add(t, z);
	z = ieee754dp_mul(ieee754dp_sub(x, z), y);

	/* t=z/(t+x) ;  pt[n0]+=0x00100000; y+=t; */
	t = ieee754dp_div(z, ieee754dp_add(t, x));
	t.parts.bexp += 0x001;
	y = ieee754dp_add(y, t);

	/* twiddle last bit to force y correctly rounded */

	/* set RZ, clear INEX flag */
	ieee754_csr.rm = IEEE754_RZ;
	ieee754_csr.sx &= ~IEEE754_INEXACT;

	/* t=x/y; ...chopped quotient, possibly inexact */
	t = ieee754dp_div(x, y);

	if (ieee754_csr.sx & IEEE754_INEXACT || t.bits != y.bits) {

		if (!(ieee754_csr.sx & IEEE754_INEXACT))
			/* t = t-ulp */
			t.bits -= 1;

		/* add inexact to result status */
		oldcsr.cx |= IEEE754_INEXACT;
		oldcsr.sx |= IEEE754_INEXACT;

		switch (oldcsr.rm) {
		case IEEE754_RP:
			y.bits += 1;
			/* drop through */
		case IEEE754_RN:
			t.bits += 1;
			break;
		}

		/* y=y+t; ...chopped sum */
		y = ieee754dp_add(y, t);

		/* adjust scalx for correctly rounded sqrt(x) */
		scalx -= 1;
	}

	/* py[n0]=py[n0]+scalx; ...scale back y */
	y.parts.bexp += scalx;

	/* restore rounding mode, possibly set inexact */
	ieee754_csr = oldcsr;

	return y;
}


--- NEW FILE: ieee754.c ---
/* ieee754 floating point arithmetic
 * single and double precision
 *
 * BUGS
 * not much dp done
 * doesnt generate IEEE754_INEXACT
 *
 */
/*
 * MIPS floating point support
 * Copyright (C) 1994-2000 Algorithmics Ltd.  All rights reserved.
 * http://www.algor.co.uk
 *
 * ########################################################################
 *
 *  This program is free software; you can distribute it and/or modify it
 *  under the terms of the GNU General Public License (Version 2) as
 *  published by the Free Software Foundation.
 *
 *  This program is distributed in the hope it will be useful, but WITHOUT
 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 *  for more details.
 *
 *  You should have received a copy of the GNU General Public License along
 *  with this program; if not, write to the Free Software Foundation, Inc.,
 *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
 *
 * ########################################################################
 */


#include "ieee754int.h"

#define DP_EBIAS	1023
#define DP_EMIN		(-1022)
#define DP_EMAX		1023

#define SP_EBIAS	127
#define SP_EMIN		(-126)
#define SP_EMAX		127

/* indexed by class */
const char *const ieee754_cname[] = {
	"Normal",
	"Zero",
	"Denormal",
	"Infinity",
	"QNaN",
	"SNaN",
};

/* the control status register 
*/
struct ieee754_csr ieee754_csr;

/* special constants
*/


#if (defined(BYTE_ORDER) && BYTE_ORDER == LITTLE_ENDIAN) || defined(__MIPSEL__)
#define SPSTR(s,b,m) {m,b,s}
#define DPSTR(s,b,mh,ml) {ml,mh,b,s}
#endif

#ifdef __MIPSEB__
#define SPSTR(s,b,m) {s,b,m}
#define DPSTR(s,b,mh,ml) {s,b,mh,ml}
#endif

const struct ieee754dp_konst __ieee754dp_spcvals[] = {
	DPSTR(0, DP_EMIN - 1 + DP_EBIAS, 0, 0),	/* + zero   */
	DPSTR(1, DP_EMIN - 1 + DP_EBIAS, 0, 0),	/* - zero   */
	DPSTR(0, DP_EBIAS, 0, 0),	/* + 1.0   */
	DPSTR(1, DP_EBIAS, 0, 0),	/* - 1.0   */
	DPSTR(0, 3 + DP_EBIAS, 0x40000, 0),	/* + 10.0   */
	DPSTR(1, 3 + DP_EBIAS, 0x40000, 0),	/* - 10.0   */
	DPSTR(0, DP_EMAX + 1 + DP_EBIAS, 0, 0),	/* + infinity */
	DPSTR(1, DP_EMAX + 1 + DP_EBIAS, 0, 0),	/* - infinity */
	DPSTR(0,DP_EMAX+1+DP_EBIAS,0x7FFFF,0xFFFFFFFF), /* + indef quiet Nan */
	DPSTR(0, DP_EMAX + DP_EBIAS, 0xFFFFF, 0xFFFFFFFF),	/* + max */
	DPSTR(1, DP_EMAX + DP_EBIAS, 0xFFFFF, 0xFFFFFFFF),	/* - max */
	DPSTR(0, DP_EMIN + DP_EBIAS, 0, 0),	/* + min normal */
	DPSTR(1, DP_EMIN + DP_EBIAS, 0, 0),	/* - min normal */
	DPSTR(0, DP_EMIN - 1 + DP_EBIAS, 0, 1),	/* + min denormal */
	DPSTR(1, DP_EMIN - 1 + DP_EBIAS, 0, 1),	/* - min denormal */
	DPSTR(0, 31 + DP_EBIAS, 0, 0),	/* + 1.0e31 */
	DPSTR(0, 63 + DP_EBIAS, 0, 0),	/* + 1.0e63 */
};

const struct ieee754sp_konst __ieee754sp_spcvals[] = {
	SPSTR(0, SP_EMIN - 1 + SP_EBIAS, 0),	/* + zero   */
	SPSTR(1, SP_EMIN - 1 + SP_EBIAS, 0),	/* - zero   */
	SPSTR(0, SP_EBIAS, 0),	/* + 1.0   */
	SPSTR(1, SP_EBIAS, 0),	/* - 1.0   */
	SPSTR(0, 3 + SP_EBIAS, 0x200000),	/* + 10.0   */
	SPSTR(1, 3 + SP_EBIAS, 0x200000),	/* - 10.0   */
	SPSTR(0, SP_EMAX + 1 + SP_EBIAS, 0),	/* + infinity */
	SPSTR(1, SP_EMAX + 1 + SP_EBIAS, 0),	/* - infinity */
	SPSTR(0,SP_EMAX+1+SP_EBIAS,0x3FFFFF),     /* + indef quiet Nan  */
	SPSTR(0, SP_EMAX + SP_EBIAS, 0x7FFFFF),	/* + max normal */
	SPSTR(1, SP_EMAX + SP_EBIAS, 0x7FFFFF),	/* - max normal */
	SPSTR(0, SP_EMIN + SP_EBIAS, 0),	/* + min normal */
	SPSTR(1, SP_EMIN + SP_EBIAS, 0),	/* - min normal */
	SPSTR(0, SP_EMIN - 1 + SP_EBIAS, 1),	/* + min denormal */
	SPSTR(1, SP_EMIN - 1 + SP_EBIAS, 1),	/* - min denormal */
	SPSTR(0, 31 + SP_EBIAS, 0),	/* + 1.0e31 */
	SPSTR(0, 63 + SP_EBIAS, 0),	/* + 1.0e63 */
};


int ieee754si_xcpt(int r, const char *op, ...)
{
	struct ieee754xctx ax;

	if (!TSTX())
		return r;
	ax.op = op;
	ax.rt = IEEE754_RT_SI;
	ax.rv.si = r;
	va_start(ax.ap, op);
	ieee754_xcpt(&ax);
	return ax.rv.si;
}

long long ieee754di_xcpt(long long r, const char *op, ...)
{
	struct ieee754xctx ax;

	if (!TSTX())
		return r;
	ax.op = op;
	ax.rt = IEEE754_RT_DI;
	ax.rv.di = r;
	va_start(ax.ap, op);
	ieee754_xcpt(&ax);
	return ax.rv.di;
}

--- NEW FILE: ieee754.h ---
/* single and double precision fp ops
 * missing extended precision.
*/
/*
 * MIPS floating point support
 * Copyright (C) 1994-2000 Algorithmics Ltd.  All rights reserved.
 * http://www.algor.co.uk
 *
 * ########################################################################
 *
 *  This program is free software; you can distribute it and/or modify it
 *  under the terms of the GNU General Public License (Version 2) as
 *  published by the Free Software Foundation.
 *
 *  This program is distributed in the hope it will be useful, but WITHOUT
 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 *  for more details.
 *
 *  You should have received a copy of the GNU General Public License along
 *  with this program; if not, write to the Free Software Foundation, Inc.,
 *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
 *
 * ########################################################################
 */

/**************************************************************************
 *  Nov 7, 2000
 *  Modification to allow integration with Linux kernel 
 *
 *  Kevin D. Kissell, ke...@mi... and Carsten Langgard, car...@mi...
 *  Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
 *************************************************************************/

#ifdef __KERNEL__
/* Going from Algorithmics to Linux native environment, add this */
#include <linux/types.h>

/* 
 * Not very pretty, but the Linux kernel's normal va_list definition 
 * does not allow it to be used as a structure element, as it is here.
 */
#ifndef _STDARG_H
#include <stdarg.h>
#endif

#else

/* Note that __KERNEL__ is taken to mean Linux kernel */

#if #system(OpenBSD)
#include <machine/types.h>
#endif
#include <machine/endian.h>

#endif				/* __KERNEL__ */

#if (defined(BYTE_ORDER) && BYTE_ORDER == LITTLE_ENDIAN) || defined(__MIPSEL__)
struct ieee754dp_konst {
	unsigned mantlo:32;
	unsigned manthi:20;
	unsigned bexp:11;
	unsigned sign:1;
};
struct ieee754sp_konst {
	unsigned mant:23;
	unsigned bexp:8;
	unsigned sign:1;
};

typedef union _ieee754dp {
	struct ieee754dp_konst oparts;
	struct {
		unsigned long long mant:52;
		unsigned int bexp:11;
		unsigned int sign:1;
	} parts;
	unsigned long long bits;
	double d;
} ieee754dp;

typedef union _ieee754sp {
	struct ieee754sp_konst parts;
	float f;
	unsigned long bits;
} ieee754sp;
#endif

#if (defined(BYTE_ORDER) && BYTE_ORDER == BIG_ENDIAN) || defined(__MIPSEB__)
struct ieee754dp_konst {
	unsigned sign:1;
	unsigned bexp:11;
	unsigned manthi:20;
	unsigned mantlo:32;
};
typedef union _ieee754dp {
	struct ieee754dp_konst oparts;
	struct {
		unsigned int sign:1;
		unsigned int bexp:11;
		unsigned long long mant:52;
	} parts;
	double d;
	unsigned long long bits;
} ieee754dp;

struct ieee754sp_konst {
	unsigned sign:1;
	unsigned bexp:8;
	unsigned mant:23;
};

typedef union _ieee754sp {
	struct ieee754sp_konst parts;
	float f;
	unsigned long bits;
} ieee754sp;
#endif

/*
 * single precision (often aka float)
*/
int ieee754sp_finite(ieee754sp x);
int ieee754sp_class(ieee754sp x);

ieee754sp ieee754sp_abs(ieee754sp x);
ieee754sp ieee754sp_neg(ieee754sp x);
ieee754sp ieee754sp_scalb(ieee754sp x, int);
ieee754sp ieee754sp_logb(ieee754sp x);

/* x with sign of y */
ieee754sp ieee754sp_copysign(ieee754sp x, ieee754sp y);

ieee754sp ieee754sp_add(ieee754sp x, ieee754sp y);
ieee754sp ieee754sp_sub(ieee754sp x, ieee754sp y);
ieee754sp ieee754sp_mul(ieee754sp x, ieee754sp y);
ieee754sp ieee754sp_div(ieee754sp x, ieee754sp y);

ieee754sp ieee754sp_fint(int x);
ieee754sp ieee754sp_funs(unsigned x);
ieee754sp ieee754sp_flong(long long x);
ieee754sp ieee754sp_fulong(unsigned long long x);
ieee754sp ieee754sp_fdp(ieee754dp x);

int ieee754sp_tint(ieee754sp x);
unsigned int ieee754sp_tuns(ieee754sp x);
long long ieee754sp_tlong(ieee754sp x);
unsigned long long ieee754sp_tulong(ieee754sp x);

int ieee754sp_cmp(ieee754sp x, ieee754sp y, int cop);
/*
 * basic sp math
 */
ieee754sp ieee754sp_modf(ieee754sp x, ieee754sp * ip);
ieee754sp ieee754sp_frexp(ieee754sp x, int *exp);
ieee754sp ieee754sp_ldexp(ieee754sp x, int exp);

ieee754sp ieee754sp_ceil(ieee754sp x);
ieee754sp ieee754sp_floor(ieee754sp x);
ieee754sp ieee754sp_trunc(ieee754sp x);

ieee754sp ieee754sp_sqrt(ieee754sp x);

/*
 * double precision (often aka double)
*/
int ieee754dp_finite(ieee754dp x);
int ieee754dp_class(ieee754dp x);

/* x with sign of y */
ieee754dp ieee754dp_copysign(ieee754dp x, ieee754dp y);

ieee754dp ieee754dp_add(ieee754dp x, ieee754dp y);
ieee754dp ieee754dp_sub(ieee754dp x, ieee754dp y);
ieee754dp ieee754dp_mul(ieee754dp x, ieee754dp y);
ieee754dp ieee754dp_div(ieee754dp x, ieee754dp y);

ieee754dp ieee754dp_abs(ieee754dp x);
ieee754dp ieee754dp_neg(ieee754dp x);
ieee754dp ieee754dp_scalb(ieee754dp x, int);

/* return exponent as integer in floating point format 
 */
ieee754dp ieee754dp_logb(ieee754dp x);

ieee754dp ieee754dp_fint(int x);
ieee754dp ieee754dp_funs(unsigned x);
ieee754dp ieee754dp_flong(long long x);
ieee754dp ieee754dp_fulong(unsigned long long x);
ieee754dp ieee754dp_fsp(ieee754sp x);

ieee754dp ieee754dp_ceil(ieee754dp x);
ieee754dp ieee754dp_floor(ieee754dp x);
ieee754dp ieee754dp_trunc(ieee754dp x);

int ieee754dp_tint(ieee754dp x);
unsigned int ieee754dp_tuns(ieee754dp x);
long long ieee754dp_tlong(ieee754dp x);
unsigned long long ieee754dp_tulong(ieee754dp x);

int ieee754dp_cmp(ieee754dp x, ieee754dp y, int cop);
/*
 * basic sp math
 */
ieee754dp ieee754dp_modf(ieee754dp x, ieee754dp * ip);
ieee754dp ieee754dp_frexp(ieee754dp x, int *exp);
ieee754dp ieee754dp_ldexp(ieee754dp x, int exp);

ieee754dp ieee754dp_ceil(ieee754dp x);
ieee754dp ieee754dp_floor(ieee754dp x);
ieee754dp ieee754dp_trunc(ieee754dp x);

ieee754dp ieee754dp_sqrt(ieee754dp x);



/* 5 types of floating point number 
*/
#define IEEE754_CLASS_NORM	0x00
#define IEEE754_CLASS_ZERO	0x01
#define IEEE754_CLASS_DNORM	0x02
#define IEEE754_CLASS_INF	0x03
#define IEEE754_CLASS_SNAN	0x04
#define IEEE754_CLASS_QNAN	0x05
extern const char *const ieee754_cname[];

/* exception numbers */
#define IEEE754_INEXACT			0x01
#define IEEE754_UNDERFLOW		0x02
#define IEEE754_OVERFLOW		0x04
#define IEEE754_ZERO_DIVIDE		0x08
#define IEEE754_INVALID_OPERATION	0x10

/* cmp operators
*/
#define IEEE754_CLT	0x01
#define IEEE754_CEQ	0x02
#define IEEE754_CGT	0x04
#define IEEE754_CUN	0x08

/* rounding mode 
*/
#define IEEE754_RN	0	/* round to nearest */
#define IEEE754_RZ	1	/* round toward zero  */
#define IEEE754_RD	2	/* round toward -Infinity */
#define IEEE754_RU	3	/* round toward +Infinity */

/* other naming */
#define IEEE754_RM	IEEE754_RD
#define IEEE754_RP	IEEE754_RU

/* "normal" comparisons
*/
static __inline int ieee754sp_eq(ieee754sp x, ieee754sp y)
{
	return ieee754sp_cmp(x, y, IEEE754_CEQ);
}

static __inline int ieee754sp_ne(ieee754sp x, ieee754sp y)
{
	return ieee754sp_cmp(x, y,
			     IEEE754_CLT | IEEE754_CGT | IEEE754_CUN);
}

static __inline int ieee754sp_lt(ieee754sp x, ieee754sp y)
{
	return ieee754sp_cmp(x, y, IEEE754_CLT);
}

static __inline int ieee754sp_le(ieee754sp x, ieee754sp y)
{
	return ieee754sp_cmp(x, y, IEEE754_CLT | IEEE754_CEQ);
}

static __inline int ieee754sp_gt(ieee754sp x, ieee754sp y)
{
	return ieee754sp_cmp(x, y, IEEE754_CGT);
}


static __inline int ieee754sp_ge(ieee754sp x, ieee754sp y)
{
	return ieee754sp_cmp(x, y, IEEE754_CGT | IEEE754_CEQ);
}

static __inline int ieee754dp_eq(ieee754dp x, ieee754dp y)
{
	return ieee754dp_cmp(x, y, IEEE754_CEQ);
}

static __inline int ieee754dp_ne(ieee754dp x, ieee754dp y)
{
	return ieee754dp_cmp(x, y,
			     IEEE754_CLT | IEEE754_CGT | IEEE754_CUN);
}

static __inline int ieee754dp_lt(ieee754dp x, ieee754dp y)
{
	return ieee754dp_cmp(x, y, IEEE754_CLT);
}

static __inline int ieee754dp_le(ieee754dp x, ieee754dp y)
{
	return ieee754dp_cmp(x, y, IEEE754_CLT | IEEE754_CEQ);
}

static __inline int ieee754dp_gt(ieee754dp x, ieee754dp y)
{
	return ieee754dp_cmp(x, y, IEEE754_CGT);
}

static __inline int ieee754dp_ge(ieee754dp x, ieee754dp y)
{
	return ieee754dp_cmp(x, y, IEEE754_CGT | IEEE754_CEQ);
}


/* like strtod
*/
ieee754dp ieee754dp_fstr(const char *s, char **endp);
char *ieee754dp_tstr(ieee754dp x, int prec, int fmt, int af);


/* the control status register 
*/
struct ieee754_csr {
	unsigned pad:13;
	unsigned nod:1;		/* set 1 for no denormalised numbers */
	unsigned cx:5;		/* exceptions this operation */
	unsigned mx:5;		/* exception enable  mask */
	unsigned sx:5;		/* exceptions total */
	unsigned rm:2;		/* current rounding mode */
};
extern struct ieee754_csr ieee754_csr;

static __inline unsigned ieee754_getrm(void)
{
	return (ieee754_csr.rm);
}
static __inline unsigned ieee754_setrm(unsigned rm)
{
	return (ieee754_csr.rm = rm);
}

/*
 * get current exceptions
 */
static __inline unsigned ieee754_getcx(void)
{
	return (ieee754_csr.cx);
}

/* test for current exception condition 
 */
static __inline int ieee754_cxtest(unsigned n)
{
	return (ieee754_csr.cx & n);
}

/*
 * get sticky exceptions
 */
static __inline unsigned ieee754_getsx(void)
{
	return (ieee754_csr.sx);
}

/* clear sticky conditions
*/
static __inline unsigned ieee754_clrsx(void)
{
	return (ieee754_csr.sx = 0);
}

/* test for sticky exception condition 
 */
static __inline int ieee754_sxtest(unsigned n)
{
	return (ieee754_csr.sx & n);
}

/* debugging */
ieee754sp ieee754sp_dump(char *s, ieee754sp x);
ieee754dp ieee754dp_dump(char *s, ieee754dp x);

#define IEEE754_SPCVAL_PZERO	0
#define IEEE754_SPCVAL_NZERO	1
#define IEEE754_SPCVAL_PONE	2
#define IEEE754_SPCVAL_NONE	3
#define IEEE754_SPCVAL_PTEN	4
#define IEEE754_SPCVAL_NTEN	5
#define IEEE754_SPCVAL_PINFINITY	6
#define IEEE754_SPCVAL_NINFINITY	7
#define IEEE754_SPCVAL_INDEF	8
#define IEEE754_SPCVAL_PMAX	9	/* +max norm */
#define IEEE754_SPCVAL_NMAX	10	/* -max norm */
#define IEEE754_SPCVAL_PMIN	11	/* +min norm */
#define IEEE754_SPCVAL_NMIN	12	/* +min norm */
#define IEEE754_SPCVAL_PMIND	13	/* +min denorm */
#define IEEE754_SPCVAL_NMIND	14	/* +min denorm */
#define IEEE754_SPCVAL_P1E31	15	/* + 1.0e31 */
#define IEEE754_SPCVAL_P1E63	16	/* + 1.0e63 */

extern const struct ieee754dp_konst __ieee754dp_spcvals[];
extern const struct ieee754sp_konst __ieee754sp_spcvals[];
#define ieee754dp_spcvals ((const ieee754dp *)__ieee754dp_spcvals)
#define ieee754sp_spcvals ((const ieee754sp *)__ieee754sp_spcvals)

/* return infinity with given sign
*/
#define ieee754dp_inf(sn)	\
  (ieee754dp_spcvals[IEEE754_SPCVAL_PINFINITY+(sn)])
#define ieee754dp_zero(sn) \
  (ieee754dp_spcvals[IEEE754_SPCVAL_PZERO+(sn)])
#define ieee754dp_one(sn) \
  (ieee754dp_spcvals[IEEE754_SPCVAL_PONE+(sn)])
#define ieee754dp_ten(sn) \
  (ieee754dp_spcvals[IEEE754_SPCVAL_PTEN+(sn)])
#define ieee754dp_indef() \
  (ieee754dp_spcvals[IEEE754_SPCVAL_INDEF])
#define ieee754dp_max(sn) \
  (ieee754dp_spcvals[IEEE754_SPCVAL_PMAX+(sn)])
#define ieee754dp_min(sn) \
  (ieee754dp_spcvals[IEEE754_SPCVAL_PMIN+(sn)])
#define ieee754dp_mind(sn) \
  (ieee754dp_spcvals[IEEE754_SPCVAL_PMIND+(sn)])
#define ieee754dp_1e31() \
  (ieee754dp_spcvals[IEEE754_SPCVAL_P1E31])
#define ieee754dp_1e63() \
  (ieee754dp_spcvals[IEEE754_SPCVAL_P1E63])

#define ieee754sp_inf(sn) \
  (ieee754sp_spcvals[IEEE754_SPCVAL_PINFINITY+(sn)])
#define ieee754sp_zero(sn) \
  (ieee754sp_spcvals[IEEE754_SPCVAL_PZERO+(sn)])
#define ieee754sp_one(sn) \
  (ieee754sp_spcvals[IEEE754_SPCVAL_PONE+(sn)])
#define ieee754sp_ten(sn) \
  (ieee754sp_spcvals[IEEE754_SPCVAL_PTEN+(sn)])
#define ieee754sp_indef() \
  (ieee754sp_spcvals[IEEE754_SPCVAL_INDEF])
#define ieee754sp_max(sn) \
  (ieee754sp_spcvals[IEEE754_SPCVAL_PMAX+(sn)])
#define ieee754sp_min(sn) \
  (ieee754sp_spcvals[IEEE754_SPCVAL_PMIN+(sn)])
#define ieee754sp_mind(sn) \
  (ieee754sp_spcvals[IEEE754_SPCVAL_PMIND+(sn)])
#define ieee754sp_1e31() \
  (ieee754sp_spcvals[IEEE754_SPCVAL_P1E31])
#define ieee754sp_1e63() \
  (ieee754sp_spcvals[IEEE754_SPCVAL_P1E63])

/* indefinite integer value 
*/
#define ieee754si_indef()	INT_MAX
#ifdef LONG_LONG_MAX
#define ieee754di_indef()	LONG_LONG_MAX
#else
#define ieee754di_indef()	((long long)(~0ULL>>1))
#endif

/* IEEE exception context, passed to handler */
struct ieee754xctx {
	const char *op;		/* operation name */
	int rt;			/* result type */
	union {
		ieee754sp sp;	/* single precision */
		ieee754dp dp;	/* double precision */
#ifdef IEEE854_XP
		ieee754xp xp;	/* extended precision */
#endif
		int si;		/* standard signed integer (32bits) */
		long long di;	/* extended signed integer (64bits) */
	} rv;			/* default result format implied by op */
	va_list ap;
};

/* result types for xctx.rt */
#define IEEE754_RT_SP	0
#define IEEE754_RT_DP	1
#define IEEE754_RT_XP	2
#define IEEE754_RT_SI	3
#define IEEE754_RT_DI	4

extern void ieee754_xcpt(struct ieee754xctx *xcp);

/* compat */
#define ieee754dp_fix(x)	ieee754dp_tint(x)
#define ieee754sp_fix(x)	ieee754sp_tint(x)

--- NEW FILE: ieee754dp.c ---
/* IEEE754 floating point arithmetic
 * double precision: common utilities
 */
/*
 * MIPS floating point support
 * Copyright (C) 1994-2000 Algorithmics Ltd.  All rights reserved.
 * http://www.algor.co.uk
 *
 * ########################################################################
 *
 *  This program is free software; you can distribute it and/or modify it
 *  under the terms of the GNU General Public License (Version 2) as
 *  published by the Free Software Foundation.
 *
 *  This program is distributed in the hope it will be useful, but WITHOUT
 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 *  for more details.
 *
 *  You should have received a copy of the GNU General Public License along
 *  with this program; if not, write to the Free Software Foundation, Inc.,
 *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
 *
 * ########################################################################
 */


#include "ieee754dp.h"

int ieee754dp_class(ieee754dp x)
{
	COMPXDP;
	EXPLODEXDP;
	return xc;
}

int ieee754dp_isnan(ieee754dp x)
{
	return ieee754dp_class(x) >= IEEE754_CLASS_SNAN;
}

int ieee754dp_issnan(ieee754dp x)
{
	assert(ieee754dp_isnan(x));
	return ((DPMANT(x) & DP_MBIT(DP_MBITS-1)) == DP_MBIT(DP_MBITS-1));
}


ieee754dp ieee754dp_xcpt(ieee754dp r, const char *op, ...)
{
	struct ieee754xctx ax;
	if (!TSTX())
		return r;

	ax.op = op;
	ax.rt = IEEE754_RT_DP;
	ax.rv.dp = r;
	va_start(ax.ap, op);
	ieee754_xcpt(&ax);
	return ax.rv.dp;
}

ieee754dp ieee754dp_nanxcpt(ieee754dp r, const char *op, ...)
{
	struct ieee754xctx ax;

	assert(ieee754dp_isnan(r));

	if (!ieee754dp_issnan(r))	/* QNAN does not cause invalid op !! */
		return r;

	if (!SETCX(IEEE754_INVALID_OPERATION)) {
		/* not enabled convert to a quiet NaN */
		DPMANT(r) &= (~DP_MBIT(DP_MBITS-1));
		if (ieee754dp_isnan(r))
			return r;
		else
			return ieee754dp_indef();
	}

	ax.op = op;
	ax.rt = 0;
	ax.rv.dp = r;
	va_start(ax.ap, op);
	ieee754_xcpt(&ax);
	return ax.rv.dp;
}

ieee754dp ieee754dp_bestnan(ieee754dp x, ieee754dp y)
{
	assert(ieee754dp_isnan(x));
	assert(ieee754dp_isnan(y));

	if (DPMANT(x) > DPMANT(y))
		return x;
	else
		return y;
}


/* generate a normal/denormal number with over,under handeling
 * sn is sign
 * xe is an unbiased exponent
 * xm is 3bit extended precision value.
 */
ieee754dp ieee754dp_format(int sn, int xe, unsigned long long xm)
{
	assert(xm);		/* we dont gen exact zeros (probably should) */

	assert((xm >> (DP_MBITS + 1 + 3)) == 0);	/* no execess */
	assert(xm & (DP_HIDDEN_BIT << 3));

	if (xe < DP_EMIN) {
		/* strip lower bits */
		int es = DP_EMIN - xe;

		if (ieee754_csr.nod) {
			SETCX(IEEE754_UNDERFLOW);
			SETCX(IEEE754_INEXACT);

			switch(ieee754_csr.rm) {
			case IEEE754_RN:
				return ieee754dp_zero(sn);
			case IEEE754_RZ:
				return ieee754dp_zero(sn);
			case IEEE754_RU:    /* toward +Infinity */
				if(sn == 0)
					return ieee754dp_min(0);
				else
					return ieee754dp_zero(1);
			case IEEE754_RD:    /* toward -Infinity */
				if(sn == 0)
					return ieee754dp_zero(0);
				else
					return ieee754dp_min(1);
			}
		}

		/* sticky right shift es bits 
		 */
		xm = XDPSRS(xm, es);
		xe += es;

		assert((xm & (DP_HIDDEN_BIT << 3)) == 0);
		assert(xe == DP_EMIN);
	}
	if (xm & (DP_MBIT(3) - 1)) {
		SETCX(IEEE754_INEXACT);
		/* inexact must round of 3 bits 
		 */
		switch (ieee754_csr.rm) {
		case IEEE754_RZ:
			break;
		case IEEE754_RN:
			xm += 0x3 + ((xm >> 3) & 1);
			/* xm += (xm&0x8)?0x4:0x3 */
			break;
		case IEEE754_RU:	/* toward +Infinity */
			if (!sn)	/* ?? */
				xm += 0x8;
			break;
		case IEEE754_RD:	/* toward -Infinity */
			if (sn)	/* ?? */
				xm += 0x8;
			break;
		}
		/* adjust exponent for rounding add overflowing 
		 */
		if (xm >> (DP_MBITS + 3 + 1)) {	/* add causes mantissa overflow */
			xm >>= 1;
			xe++;
		}
	}
	/* strip grs bits */
	xm >>= 3;

	assert((xm >> (DP_MBITS + 1)) == 0);	/* no execess */
	assert(xe >= DP_EMIN);

	if (xe > DP_EMAX) {
		SETCX(IEEE754_OVERFLOW);
		SETCX(IEEE754_INEXACT);
		/* -O can be table indexed by (rm,sn) */
		switch (ieee754_csr.rm) {
		case IEEE754_RN:
			return ieee754dp_inf(sn);
		case IEEE754_RZ:
			return ieee754dp_max(sn);
		case IEEE754_RU:	/* toward +Infinity */
			if (sn == 0)
				return ieee754dp_inf(0);
			else
				return ieee754dp_max(1);
		case IEEE754_RD:	/* toward -Infinity */
			if (sn == 0)
				return ieee754dp_max(0);
			else
				return ieee754dp_inf(1);
		}
	}
	/* gen norm/denorm/zero */

	if ((xm & DP_HIDDEN_BIT) == 0) {
		/* we underflow (tiny/zero) */
		assert(xe == DP_EMIN);
		SETCX(IEEE754_UNDERFLOW);
		return builddp(sn, DP_EMIN - 1 + DP_EBIAS, xm);
	} else {
		assert((xm >> (DP_MBITS + 1)) == 0);	/* no execess */
		assert(xm & DP_HIDDEN_BIT);

		return builddp(sn, xe + DP_EBIAS, xm & ~DP_HIDDEN_BIT);
	}
}

--- NEW FILE: ieee754int.h ---
/* 
 * IEEE754 floating point
 * common internal header file
 */
/*
 * MIPS floating point support
 * Copyright (C) 1994-2000 Algorithmics Ltd.  All rights reserved.
 * http://www.algor.co.uk
 *
 * ########################################################################
 *
 *  This program is free software; you can distribute it and/or modify it
 *  under the terms of the GNU General Public License (Version 2) as
 *  published by the Free Software Foundation.
 *
 *  This program is distributed in the hope it will be useful, but WITHOUT
 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 *  for more details.
 *
 *  You should have received a copy of the GNU General Public License along
 *  with this program; if not, write to the Free Software Foundation, Inc.,
 *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
 *
 * ########################################################################
 */


#include "ieee754.h"

#define DP_EBIAS	1023
#define DP_EMIN		(-1022)
#define DP_EMAX		1023
#define DP_MBITS	52

#define SP_EBIAS	127
#define SP_EMIN		(-126)
#define SP_EMAX		127
#define SP_MBITS	23

#define DP_MBIT(x)	((unsigned long long)1 << (x))
#define DP_HIDDEN_BIT	DP_MBIT(DP_MBITS)
#define DP_SIGN_BIT	DP_MBIT(63)

#define SP_MBIT(x)	((unsigned long)1 << (x))
#define SP_HIDDEN_BIT	SP_MBIT(SP_MBITS)
#define SP_SIGN_BIT	SP_MBIT(31)


#define SPSIGN(sp)	(sp.parts.sign)
#define SPBEXP(sp)	(sp.parts.bexp)
#define SPMANT(sp)	(sp.parts.mant)

#define DPSIGN(dp)	(dp.parts.sign)
#define DPBEXP(dp)	(dp.parts.bexp)
#define DPMANT(dp)	(dp.parts.mant)

#define CLPAIR(x,y)	((x)*6+(y))

#define CLEARCX	\
  (ieee754_csr.cx = 0)

#define SETCX(x) \
  (ieee754_csr.cx |= (x),ieee754_csr.sx |= (x),ieee754_csr.mx & (x))

#define TSTX()	\
	(ieee754_csr.cx & ieee754_csr.mx)


#define COMPXSP \
  unsigned xm; int xe; int xs; int xc

#define COMPYSP \
  unsigned ym; int ye; int ys; int yc

#define EXPLODESP(v,vc,vs,ve,vm) \
{\
    vs = SPSIGN(v);\
    ve = SPBEXP(v);\
    vm = SPMANT(v);\
    if(ve == SP_EMAX+1+SP_EBIAS){\
	if(vm == 0)\
	  vc = IEEE754_CLASS_INF;\
	else if(vm & SP_MBIT(SP_MBITS-1)) \
	  vc = IEEE754_CLASS_SNAN;\
	else \
	  vc = IEEE754_CLASS_QNAN;\
    } else if(ve == SP_EMIN-1+SP_EBIAS) {\
	if(vm) {\
	    ve = SP_EMIN;\
	    vc = IEEE754_CLASS_DNORM;\
	} else\
	  vc = IEEE754_CLASS_ZERO;\
    } else {\
	ve -= SP_EBIAS;\
	vm |= SP_HIDDEN_BIT;\
	vc = IEEE754_CLASS_NORM;\
    }\
}
#define EXPLODEXSP EXPLODESP(x,xc,xs,xe,xm)
#define EXPLODEYSP EXPLODESP(y,yc,ys,ye,ym)


#define COMPXDP \
unsigned long long xm; int xe; int xs; int xc

#define COMPYDP \
unsigned long long ym; int ye; int ys; int yc

#define EXPLODEDP(v,vc,vs,ve,vm) \
{\
    vm = DPMANT(v);\
    vs = DPSIGN(v);\
    ve = DPBEXP(v);\
    if(ve == DP_EMAX+1+DP_EBIAS){\
	if(vm == 0)\
	  vc = IEEE754_CLASS_INF;\
	else if(vm & DP_MBIT(DP_MBITS-1)) \
	  vc = IEEE754_CLASS_SNAN;\
	else \
	  vc = IEEE754_CLASS_QNAN;\
    } else if(ve == DP_EMIN-1+DP_EBIAS) {\
	if(vm) {\
	    ve = DP_EMIN;\
	    vc = IEEE754_CLASS_DNORM;\
	} else\
	  vc = IEEE754_CLASS_ZERO;\
    } else {\
	ve -= DP_EBIAS;\
	vm |= DP_HIDDEN_BIT;\
	vc = IEEE754_CLASS_NORM;\
    }\
}
#define EXPLODEXDP EXPLODEDP(x,xc,xs,xe,xm)
#define EXPLODEYDP EXPLODEDP(y,yc,ys,ye,ym)

#define FLUSHDP(v,vc,vs,ve,vm) \
	if(vc==IEEE754_CLASS_DNORM) {\
	    if(ieee754_csr.nod) {\
		SETCX(IEEE754_INEXACT);\
		vc = IEEE754_CLASS_ZERO;\
		ve = DP_EMIN-1+DP_EBIAS;\
		vm = 0;\
		v = ieee754dp_zero(vs);\
	    }\
	}

#define FLUSHSP(v,vc,vs,ve,vm) \
	if(vc==IEEE754_CLASS_DNORM) {\
	    if(ieee754_csr.nod) {\
		SETCX(IEEE754_INEXACT);\
		vc = IEEE754_CLASS_ZERO;\
		ve = SP_EMIN-1+SP_EBIAS;\
		vm = 0;\
		v = ieee754sp_zero(vs);\
	    }\
	}

#define FLUSHXDP FLUSHDP(x,xc,xs,xe,xm)
#define FLUSHYDP FLUSHDP(y,yc,ys,ye,ym)
#define FLUSHXSP FLUSHSP(x,xc,xs,xe,xm)
#define FLUSHYSP FLUSHSP(y,yc,ys,ye,ym)

--- NEW FILE: ieee754sp.c ---
/* IEEE754 floating point arithmetic
 * single precision
 */
/*
 * MIPS floating point support
 * Copyright (C) 1994-2000 Algorithmics Ltd.  All rights reserved.
 * http://www.algor.co.uk
 *
 * ########################################################################
 *
 *  This program is free software; you can distribute it and/or modify it
 *  under the terms of the GNU General Public License (Version 2) as
 *  published by the Free Software Foundation.
 *
 *  This program is distributed in the hope it will be useful, but WITHOUT
 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 *  for more details.
 *
 *  You should have received a copy of the GNU General Public License along
 *  with this program; if not, write to the Free Software Foundation, Inc.,
 *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
 *
 * ########################################################################
 */


#include "ieee754sp.h"

int ieee754sp_class(ieee754sp x)
{
	COMPXSP;
	EXPLODEXSP;
	return xc;
}

int ieee754sp_isnan(ieee754sp x)
{
	return ieee754sp_class(x) >= IEEE754_CLASS_SNAN;
}

int ieee754sp_issnan(ieee754sp x)
{
	assert(ieee754sp_isnan(x));
	return (SPMANT(x) & SP_MBIT(SP_MBITS-1));
}


ieee754sp ieee754sp_xcpt(ieee754sp r, const char *op, ...)
{
	struct ieee754xctx ax;

	if (!TSTX())
		return r;

	ax.op = op;
	ax.rt = IEEE754_RT_SP;
	ax.rv.sp = r;
	va_start(ax.ap, op);
	ieee754_xcpt(&ax);
	return ax.rv.sp;
}

ieee754sp ieee754sp_nanxcpt(ieee754sp r, const char *op, ...)
{
	struct ieee754xctx ax;

	assert(ieee754sp_isnan(r));

	if (!ieee754sp_issnan(r))	/* QNAN does not cause invalid op !! */
		return r;

	if (!SETCX(IEEE754_INVALID_OPERATION)) {
		/* not enabled convert to a quiet NaN */
		SPMANT(r) &= (~SP_MBIT(SP_MBITS-1));
		if (ieee754sp_isnan(r))
			return r;
		else
			return ieee754sp_indef();
	}

	ax.op = op;
	ax.rt = 0;
	ax.rv.sp = r;
	va_start(ax.ap, op);
	ieee754_xcpt(&ax);
	return ax.rv.sp;
}

ieee754sp ieee754sp_bestnan(ieee754sp x, ieee754sp y)
{
	assert(ieee754sp_isnan(x));
	assert(ieee754sp_isnan(y));

	if (SPMANT(x) > SPMANT(y))
		return x;
	else
		return y;
}


/* generate a normal/denormal number with over,under handeling
 * sn is sign
 * xe is an unbiased exponent
 * xm is 3bit extended precision value.
 */
ieee754sp ieee754sp_format(int sn, int xe, unsigned xm)
{
	assert(xm);		/* we dont gen exact zeros (probably should) */

	assert((xm >> (SP_MBITS + 1 + 3)) == 0);	/* no execess */
	assert(xm & (SP_HIDDEN_BIT << 3));

	if (xe < SP_EMIN) {
		/* strip lower bits */
		int es = SP_EMIN - xe;

		if (ieee754_csr.nod) {
		    SETCX(IEEE754_UNDERFLOW);
		    SETCX(IEEE754_INEXACT);

		    switch(ieee754_csr.rm) {
			case IEEE754_RN:
			    return ieee754sp_zero(sn);
			case IEEE754_RZ:
			    return ieee754sp_zero(sn);
			case IEEE754_RU:      /* toward +Infinity */
			    if(sn == 0)
				return ieee754sp_min(0);
			    else
				return ieee754sp_zero(1);
			case IEEE754_RD:      /* toward -Infinity */
			    if(sn == 0)
				return ieee754sp_zero(0);
			    else
				return ieee754sp_min(1);
		    }
		}

		/* sticky right shift es bits 
		 */
		SPXSRSXn(es);

		assert((xm & (SP_HIDDEN_BIT << 3)) == 0);
		assert(xe == SP_EMIN);
	}
	if (xm & (SP_MBIT(3) - 1)) {
		SETCX(IEEE754_INEXACT);
		/* inexact must round of 3 bits 
		 */
		switch (ieee754_csr.rm) {
		case IEEE754_RZ:
			break;
		case IEEE754_RN:
			xm += 0x3 + ((xm >> 3) & 1);
			/* xm += (xm&0x8)?0x4:0x3 */
			break;
		case IEEE754_RU:	/* toward +Infinity */
			if (!sn)	/* ?? */
				xm += 0x8;
			break;
		case IEEE754_RD:	/* toward -Infinity */
			if (sn)	/* ?? */
				xm += 0x8;
			break;
		}
		/* adjust exponent for rounding add overflowing 
		 */
		if (xm >> (SP_MBITS + 1 + 3)) {	/* add causes mantissa overflow */
			xm >>= 1;
			xe++;
		}
	}
	/* strip grs bits */
	xm >>= 3;

	assert((xm >> (SP_MBITS + 1)) == 0);	/* no execess */
	assert(xe >= SP_EMIN);

	if (xe > SP_EMAX) {
		SETCX(IEEE754_OVERFLOW);
		SETCX(IEEE754_INEXACT);
		/* -O can be table indexed by (rm,sn) */
		switch (ieee754_csr.rm) {
		case IEEE754_RN:
			return ieee754sp_inf(sn);
		case IEEE754_RZ:
			return ieee754sp_max(sn);
		case IEEE754_RU:	/* toward +Infinity */
			if (sn == 0)
				return ieee754sp_inf(0);
			else
				return ieee754sp_max(1);
		case IEEE754_RD:	/* toward -Infinity */
			if (sn == 0)
				return ieee754sp_max(0);
			else
				return ieee754sp_inf(1);
		}
	}
	/* gen norm/denorm/zero */

	if ((xm & SP_HIDDEN_BIT) == 0) {
		/* we underflow (tiny/zero) */
		assert(xe == SP_EMIN);
		SETCX(IEEE754_UNDERFLOW);
		return buildsp(sn, SP_EMIN - 1 + SP_EBIAS, xm);
	} else {
		assert((xm >> (SP_MBITS + 1)) == 0);	/* no execess */
		assert(xm & SP_HIDDEN_BIT);

		return buildsp(sn, xe + SP_EBIAS, xm & ~SP_HIDDEN_BIT);
	}
}

--- NEW FILE: kernel_linkage.c ---
/**************************************************************************
 *
 *  arch/mips/math_emu/kernel_linkage.c
 *
 *  Kevin D. Kissell, kevink@mips and Carsten Langgaard, car...@mi...
 *  Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
 *
 * ########################################################################
 *
 *  This program is free software; you can distribute it and/or modify it
 *  under the terms of the GNU General Public License (Version 2) as
 *  published by the Free Software Foundation.
 *
 *  This program is distributed in the hope it will be useful, but WITHOUT
 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 *  for more details.
 *
 *  You should have received a copy of the GNU General Public License along
 *  with this program; if not, write to the Free Software Foundation, Inc.,
 *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
 *
 *************************************************************************/
/*
 * Routines corresponding to Linux kernel FP context
 * manipulation primitives for the Algorithmics MIPS
 * FPU Emulator
 */

#include <linux/sched.h>
#include <asm/processor.h>
#include <asm/signal.h>
#include <asm/uaccess.h>

#include <asm/fpu_emulator.h>

extern struct mips_fpu_emulator_private fpuemuprivate;

#define SIGNALLING_NAN 0x7ff800007ff80000LL

void fpu_emulator_init_fpu(void)
{
	static int first = 1;
	int i;
 
	if (first) {
		first = 0;
		printk("Algorithmics/MIPS FPU Emulator v1.5\n");
	}

	current->thread.fpu.soft.sr = 0;
	for (i = 0; i < 32; i++) {
		current->thread.fpu.soft.regs[i] = SIGNALLING_NAN;
	}
}


/*
 * Emulator context save/restore to/from a signal context
 * presumed to be on the user stack, and therefore accessed
 * with appropriate macros from uaccess.h
 */

int fpu_emulator_save_context(struct sigcontext *sc)
{
	int i;
	int err = 0;

	for (i = 0; i < 32; i++) {
		err |=
		    __put_user(current->thread.fpu.soft.regs[i],
			       &sc->sc_fpregs[i]);
	}
	err |= __put_user(current->thread.fpu.soft.sr, &sc->sc_fpc_csr);
	err |= __put_user(fpuemuprivate.eir, &sc->sc_fpc_eir);

	return err;
}

int fpu_emulator_restore_context(struct sigcontext *sc)
{
	int i;
	int err = 0;

	for (i = 0; i < 32; i++) {
		err |=
		    __get_user(current->thread.fpu.soft.regs[i],
			       &sc->sc_fpregs[i]);
	}
	err |= __get_user(current->thread.fpu.soft.sr, &sc->sc_fpc_csr);
	err |= __get_user(fpuemuprivate.eir, &sc->sc_fpc_eir);

	return err;
}


--- NEW FILE: sp_add.c ---
/* IEEE754 floating point arithmetic
 * single precision
 */
/*
 * MIPS floating point support
 * Copyright (C) 1994-2000 Algorithmics Ltd.  All rights reserved.
 * http://www.algor.co.uk
 *
 * ########################################################################
 *
 *  This program is free software; you can distribute it and/or modify it
 *  under the terms of the GNU General Public License (Version 2) as
 *  published by the Free Software Foundation.
 *
 *  This program is distributed in the hope it will be useful, but WITHOUT
 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 *  for more details.
 *
 *  You should have received a copy of the GNU General Public License along
 *  with this program; if not, write to the Free Software Foundation, Inc.,
 *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
 *
 * ########################################################################
 */


#include "ieee754sp.h"

ieee754sp ieee754sp_add(ieee754sp x, ieee754sp y)
{
	COMPXSP;
	COMPYSP;

	EXPLODEXSP;
	EXPLODEYSP;

	CLEARCX;

	FLUSHXSP;
	FLUSHYSP;

	switch (CLPAIR(xc, yc)) {
	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
		SETCX(IEEE754_INVALID_OPERATION);
		return ieee754sp_nanxcpt(ieee754sp_indef(), "add", x, y);

	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN):
	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
		return y;

	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
	c...
 
[truncated message content]

[Linux-mips-commits]CVS: linux/include/asm-mips div64.h,1.2,1.3

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/include/asm-mips
In directory usw-pr-cvs1:/tmp/cvs-serv13217

Modified Files:
	div64.h 
Log Message:
Remove 64-bit variants of the code which are not safe on the 32-bit kernel.

Index: div64.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips/div64.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- div64.h	2001/07/09 19:28:47	1.2
+++ div64.h	2001/10/04 15:53:28	1.3
@@ -1,6 +1,4 @@
 /*
- * include/asm-mips/div64.h
- * 
  * Copyright (C) 2000  Maciej W. Rozycki
  *
  * This file is subject to the terms and conditions of the GNU General Public
@@ -16,9 +14,6 @@
  * No traps on overflows for any of these...
  */
 
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1 ) || (_MIPS_ISA == _MIPS_ISA_MIPS2) || \
-    (_MIPS_ISA == _MIPS_ISA_MIPS32)
-
 #define do_div64_32(res, high, low, base) ({ \
 	unsigned long __quot, __mod; \
 	unsigned long __cf, __tmp, __i; \
@@ -75,40 +70,5 @@
 	__quot = __quot << 32 | __low; \
 	(n) = __quot; \
 	__mod; })
-
-#else
-
-#define do_div64_32(res, high, low, base) ({ \
-	unsigned long __quot, __mod, __r0; \
-	\
-	__asm__("dsll32	%2,%z3,0\n\t" \
-		"or	%2,%2,%z4\n\t" \
-		"ddivu	$0,%2,%z5" \
-		: "=h" (__mod), "=l" (__quot), "=&r" (__r0) \
-		: "Jr" (high), "Jr" (low), "Jr" (base)); \
-	\
-	(res) = __quot; \
-	__mod; })
-
-#define do_div(n, base) ({ \
-	unsigned long long __quot; \
-	unsigned long __mod, __r0; \
-	\
-	__quot = (n); \
-	\
-	__asm__("dsll32	%2,%M3,0\n\t" \
-		"or	%2,%2,%L3\n\t" \
-		"ddivu	$0,%2,%z4\n\t" \
-		"mflo	%L1\n\t" \
-		"dsra32	%M1,%L1,0\n\t" \
-		"dsll32	%L1,%L1,0\n\t" \
-		"dsra32	%L1,%L1,0" \
-		: "=h" (__mod), "=r" (__quot), "=&r" (__r0) \
-		: "r" (n), "Jr" (base)); \
-	\
-	(n) = __quot; \
-	__mod; })
-
-#endif
 
 #endif /* _ASM_DIV64_H */

[Linux-mips-commits]CVS: linux/arch/mips64/kernel smp.c,1.2,1.3

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips64/kernel
In directory usw-pr-cvs1:/tmp/cvs-serv12107

Added Files:
	smp.c 
Log Message:
Add copyright notice.

[Linux-mips-commits]CVS: linux/arch/mips/au1000/pb1000 setup.c,1.9,1.10

[Pete P. <pp...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips/au1000/pb1000
In directory usw-pr-cvs1:/tmp/cvs-serv785/arch/mips/au1000/pb1000

Modified Files:
	setup.c 
Log Message:
Write back pin_func after changing it.


Index: setup.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/pb1000/setup.c,v
retrieving revision 1.9
retrieving revision 1.10
diff -u -d -r1.9 -r1.10
--- setup.c	2001/10/03 22:49:23	1.9
+++ setup.c	2001/10/03 23:04:23	1.10
@@ -162,6 +162,7 @@
 
 	/* make gpio 15 an input (interrupt line) */
 	pin_func = inl(PIN_FUNCTION) & (u32)(~0x100);
+	outl(pin_func, PIN_FUNCTION);
 	outl(0x8000, TSTATE_STATE_SET);
 	
 #ifdef CONFIG_FB

[Linux-mips-commits]CVS: linux/arch/mips/au1000/common irq.c,1.7,1.8 prom.c,1.4,1.5

[Pete P. <pp...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips/au1000/common
In directory usw-pr-cvs1:/tmp/cvs-serv25362/arch/mips/au1000/common

Modified Files:
	irq.c prom.c 
Log Message:
* Added pcmcia ide support.
* fixed interrupt handler to work with new pb1000 
pcmcia cpld
* modified pcmcia driver to reflect cpld changes
* hardcoded pcmcia driver to apply 3.3V if XV
is detected, which seems to be a socket/hardware problem.



Index: irq.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/common/irq.c,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- irq.c	2001/09/25 03:36:35	1.7
+++ irq.c	2001/10/03 22:49:23	1.8
@@ -99,44 +99,44 @@
 	if (irq_nr > AU1000_LAST_INTC0_INT) {
 		switch (type) {
 			case INTC_INT_RISE_EDGE: /* 0:0:1 */
-				outl(1<<irq_nr,INTC1_CONFIG2_CLEAR);
-				outl(1<<irq_nr, INTC1_CONFIG1_CLEAR);
-				outl(1<<irq_nr, INTC1_CONFIG0_SET);
+				outl(1<<(irq_nr-32),INTC1_CONFIG2_CLEAR);
+				outl(1<<(irq_nr-32), INTC1_CONFIG1_CLEAR);
+				outl(1<<(irq_nr-32), INTC1_CONFIG0_SET);
 				break;
 			case INTC_INT_FALL_EDGE: /* 0:1:0 */
-				outl(1<<irq_nr, INTC1_CONFIG2_CLEAR);
-				outl(1<<irq_nr, INTC1_CONFIG1_SET);
-				outl(1<<irq_nr, INTC1_CONFIG0_CLEAR);
+				outl(1<<(irq_nr-32), INTC1_CONFIG2_CLEAR);
+				outl(1<<(irq_nr-32), INTC1_CONFIG1_SET);
+				outl(1<<(irq_nr-32), INTC1_CONFIG0_CLEAR);
 				break;
 			case INTC_INT_HIGH_LEVEL: /* 1:0:1 */
-				outl(1<<irq_nr, INTC1_CONFIG2_SET);
-				outl(1<<irq_nr, INTC1_CONFIG1_CLEAR);
-				outl(1<<irq_nr, INTC1_CONFIG0_SET);
+				outl(1<<(irq_nr-32), INTC1_CONFIG2_SET);
+				outl(1<<(irq_nr-32), INTC1_CONFIG1_CLEAR);
+				outl(1<<(irq_nr-32), INTC1_CONFIG0_SET);
 				break;
 			case INTC_INT_LOW_LEVEL: /* 1:1:0 */
-				outl(1<<irq_nr, INTC1_CONFIG2_SET);
-				outl(1<<irq_nr, INTC1_CONFIG1_SET);
-				outl(1<<irq_nr, INTC1_CONFIG0_CLEAR);
+				outl(1<<(irq_nr-32), INTC1_CONFIG2_SET);
+				outl(1<<(irq_nr-32), INTC1_CONFIG1_SET);
+				outl(1<<(irq_nr-32), INTC1_CONFIG0_CLEAR);
 				break;
 			case INTC_INT_DISABLED: /* 0:0:0 */
-				outl(1<<irq_nr, INTC1_CONFIG0_CLEAR);
-				outl(1<<irq_nr, INTC1_CONFIG1_CLEAR);
-				outl(1<<irq_nr, INTC1_CONFIG2_CLEAR);
+				outl(1<<(irq_nr-32), INTC1_CONFIG0_CLEAR);
+				outl(1<<(irq_nr-32), INTC1_CONFIG1_CLEAR);
+				outl(1<<(irq_nr-32), INTC1_CONFIG2_CLEAR);
 				break;
 			default: /* disable the interrupt */
 				printk("unexpected int type %d (irq %d)\n", type, irq_nr);
-				outl(1<<irq_nr, INTC1_CONFIG0_CLEAR);
-				outl(1<<irq_nr, INTC1_CONFIG1_CLEAR);
-				outl(1<<irq_nr, INTC1_CONFIG2_CLEAR);
+				outl(1<<(irq_nr-32), INTC1_CONFIG0_CLEAR);
+				outl(1<<(irq_nr-32), INTC1_CONFIG1_CLEAR);
+				outl(1<<(irq_nr-32), INTC1_CONFIG2_CLEAR);
 				return;
 		}
 		if (int_req) /* assign to interrupt request 1 */
-			outl(1<<irq_nr, INTC1_ASSIGN_REQ_CLEAR);
+			outl(1<<(irq_nr-32), INTC1_ASSIGN_REQ_CLEAR);
 		else	     /* assign to interrupt request 0 */
-			outl(1<<irq_nr, INTC1_ASSIGN_REQ_SET);
-		outl(1<<irq_nr, INTC1_SOURCE_SET);
-		outl(1<<irq_nr, INTC1_MASK_CLEAR);
-		outl(1<<irq_nr, INTC1_WAKEUP_CLEAR);
+			outl(1<<(irq_nr-32), INTC1_ASSIGN_REQ_SET);
+		outl(1<<(irq_nr-32), INTC1_SOURCE_SET);
+		outl(1<<(irq_nr-32), INTC1_MASK_CLEAR);
+		outl(1<<(irq_nr-32), INTC1_WAKEUP_CLEAR);
 	}
 	else {
 		switch (type) {
@@ -194,14 +194,15 @@
 static void shutdown_irq(unsigned int irq_nr)
 {
 	local_disable_irq(irq_nr);
+	return;
 }
 
 
 inline void local_enable_irq(unsigned int irq_nr)
 {
 	if (irq_nr > AU1000_LAST_INTC0_INT) {
-		outl(1<<irq_nr, INTC1_MASK_SET);
-		outl(1<<irq_nr, INTC1_WAKEUP_SET);
+		outl(1<<(irq_nr-32), INTC1_MASK_SET);
+		outl(1<<(irq_nr-32), INTC1_WAKEUP_SET);
 	}
 	else {
 		outl(1<<irq_nr, INTC0_MASK_SET);
@@ -214,8 +215,8 @@
 inline void local_disable_irq(unsigned int irq_nr)
 {
 	if (irq_nr > AU1000_LAST_INTC0_INT) {
-		outl(1<<irq_nr, INTC1_MASK_CLEAR);
-		outl(1<<irq_nr, INTC1_WAKEUP_CLEAR);
+		outl(1<<(irq_nr-32), INTC1_MASK_CLEAR);
+		outl(1<<(irq_nr-32), INTC1_WAKEUP_CLEAR);
 	}
 	else {
 		outl(1<<irq_nr, INTC0_MASK_CLEAR);
@@ -228,8 +229,8 @@
 static inline void mask_and_ack_rise_edge_irq(unsigned int irq_nr)
 {
 	if (irq_nr > AU1000_LAST_INTC0_INT) {
-		outl(1<<irq_nr, INTC1_R_EDGE_DETECT_CLEAR);
-		outl(1<<irq_nr, INTC1_MASK_CLEAR);
+		outl(1<<(irq_nr-32), INTC1_R_EDGE_DETECT_CLEAR);
+		outl(1<<(irq_nr-32), INTC1_MASK_CLEAR);
 	}
 	else {
 		outl(1<<irq_nr, INTC0_R_EDGE_DETECT_CLEAR);
@@ -242,8 +243,8 @@
 static inline void mask_and_ack_fall_edge_irq(unsigned int irq_nr)
 {
 	if (irq_nr > AU1000_LAST_INTC0_INT) {
-		outl(1<<irq_nr, INTC1_F_EDGE_DETECT_CLEAR);
-		outl(1<<irq_nr, INTC1_MASK_CLEAR);
+		outl(1<<(irq_nr-32), INTC1_F_EDGE_DETECT_CLEAR);
+		outl(1<<(irq_nr-32), INTC1_MASK_CLEAR);
 	}
 	else {
 		outl(1<<irq_nr, INTC0_F_EDGE_DETECT_CLEAR);
@@ -255,38 +256,30 @@
 
 static inline void mask_and_ack_level_irq(unsigned int irq_nr)
 {
-#ifdef CONFIG_MIPS_PB1000
-	if (irq_nr == AU1000_GPIO_15) { /* shared pin */
-		writel(0x8000, AU1000_MDR); /* clear pcmcia interrupt */
-		au_sync();
-		udelay(1);
-		writel(0x4000, AU1000_MDR); /* re-enable pcmcia interrupt */
-		au_sync();
-		udelay(1);
-	}
-#endif
+
 	local_disable_irq(irq_nr);
 	au_sync();
+	if (irq_nr == AU1000_GPIO_15) {
+		writew(0x8000, AU1000_MDR); /* ack int */
+		au_sync();
+	}
+	return;
 }
 
 
 static void end_irq(unsigned int irq_nr)
 {
-#ifdef CONFIG_MIPS_PB1000
-	if (irq_nr == AU1000_GPIO_15) { /* shared pin */
-		writel(0x8000, AU1000_MDR); /* clear pcmcia interrupt */
-		au_sync();
-		udelay(1);
-		writel(0x4000, AU1000_MDR); /* re-enable pcmcia interrupt */
-		au_sync();
-		udelay(1);
-	}
-#endif
-	if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+	if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
 		local_enable_irq(irq_nr);
-	else
+	}
+	else {
 		printk("warning: end_irq %d did not enable (%x)\n", 
 				irq_nr, irq_desc[irq_nr].status);
+	}
+	if (irq_nr == AU1000_GPIO_15) {
+		writew(0x4000, AU1000_MDR); /* enable int */
+		au_sync();
+	}
 }
 
 unsigned long save_local_and_disable(int controller)
@@ -297,13 +290,13 @@
 
 	if (controller) {
 		mask = readl(INTC1_MASK_SET);
-		for (i=0; i<32; i++) {
+		for (i=32; i<64; i++) {
 			local_disable_irq(i);
 		}
 	}
 	else {
 		mask = readl(INTC0_MASK_SET);
-		for (i=32; i<64; i++) {
+		for (i=0; i<32; i++) {
 			local_disable_irq(i);
 		}
 	}
@@ -470,7 +463,7 @@
 		if ((intc0_req0 & (1<<i))) {
 			intc0_req0 &= ~(1<<i);
 			do_IRQ(irq, regs);
-			return;
+			break;
 		}
 		irq++;
 	}
@@ -500,7 +493,7 @@
 			{
 				do_IRQ(irq, regs);
 			}
-			return;
+			break;
 		}
 		irq++;
 	}
@@ -515,19 +508,25 @@
 {
 	int irq = 0, i;
 	static unsigned long intc1_req0 = 0;
+	volatile unsigned short levels, mdr;
+	unsigned char ide_status;
 
 	intc1_req0 |= inl(INTC1_REQ0_INT);
 
 	if (!intc1_req0) return;
 
+	writew(1, CPLD_AUX0); /* debug led 0 */
 	for (i=0; i<32; i++) {
 		if ((intc1_req0 & (1<<i))) {
 			intc1_req0 &= ~(1<<i);
+			writew(2, CPLD_AUX0); /* turn on debug led 1  */
 			do_IRQ(irq+32, regs);
-			return;
+			writew(0, CPLD_AUX0); /* turn off debug led 1 */
+			break;
 		}
 		irq++;
 	}
+	writew(0, CPLD_AUX0);
 }
 
 
@@ -544,7 +543,7 @@
 		if ((intc1_req1 & (1<<i))) {
 			intc1_req1 &= ~(1<<i);
 			do_IRQ(irq+32, regs);
-			return;
+			break;
 		}
 		irq++;
 	}

Index: prom.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/common/prom.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- prom.c	2001/08/28 07:23:54	1.4
+++ prom.c	2001/10/03 22:49:23	1.5
@@ -4,7 +4,7 @@
  *    PROM library initialisation code, assuming a version of
  *    pmon is the boot code.
  *
- * Copyright 2000 MontaVista Software Inc.
+ * Copyright 2000,2001 MontaVista Software Inc.
  * Author: MontaVista Software, Inc.
  *         	pp...@mv... or so...@mv...
  *
@@ -35,7 +35,7 @@
  *  675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
-#include <linux/config.h>
+#include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/string.h>
@@ -55,12 +55,12 @@
 }t_env_var;
 
 
-char * __init prom_getcmdline(void)
+char * prom_getcmdline(void)
 {
 	return &(arcs_cmdline[0]);
 }
 
-void  __init prom_init_cmdline(void)
+void  prom_init_cmdline(void)
 {
 	char *cp;
 	int actr;
@@ -149,3 +149,5 @@
 }
 
 void prom_free_prom_memory (void) {}
+EXPORT_SYMBOL(prom_getcmdline);
+EXPORT_SYMBOL(get_ethernet_addr);

[Linux-mips-commits]CVS: linux/arch/mips/au1000/pb1000 setup.c,1.8,1.9

[Pete P. <pp...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips/au1000/pb1000
In directory usw-pr-cvs1:/tmp/cvs-serv25362/arch/mips/au1000/pb1000

Modified Files:
	setup.c 
Log Message:
* Added pcmcia ide support.
* fixed interrupt handler to work with new pb1000 
pcmcia cpld
* modified pcmcia driver to reflect cpld changes
* hardcoded pcmcia driver to apply 3.3V if XV
is detected, which seems to be a socket/hardware problem.



Index: setup.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/pb1000/setup.c,v
retrieving revision 1.8
retrieving revision 1.9
diff -u -d -r1.8 -r1.9
--- setup.c	2001/09/10 18:07:33	1.8
+++ setup.c	2001/10/03 22:49:23	1.9
@@ -56,6 +56,11 @@
 extern void * __rd_start, * __rd_end;
 #endif
 
+#ifdef CONFIG_BLK_DEV_IDE
+extern struct ide_ops std_ide_ops;
+extern struct ide_ops *ide_ops;
+#endif
+
 void (*__wbflush) (void);
 extern struct rtc_ops no_rtc_ops;
 extern char * __init prom_getcmdline(void);
@@ -87,9 +92,9 @@
 
 	rtc_ops = &no_rtc_ops;
         __wbflush = au1000_wbflush;
-	//_machine_restart = au1000_restart;
-	//_machine_halt = au1000_halt;
-	//_machine_power_off = au1000_power_off;
+	_machine_restart = au1000_restart;
+	_machine_halt = au1000_halt;
+	_machine_power_off = au1000_power_off;
 
 	/*
 	 * IO/MEM resources. 
@@ -108,6 +113,7 @@
 
 	// set AUX clock to 12MHz * 8 = 96 MHz
 	outl(8, AUX_PLL_CNTRL);
+	outl(0, PIN_STATE);
 	udelay(1000);
 
 #if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1000_USB_DEVICE)
@@ -115,6 +121,7 @@
 	if ((argptr = strstr(argptr, "usb_ohci=")) == NULL) {
 	        char usb_args[80];
 		argptr = prom_getcmdline();
+		memset(usb_args, 0, sizeof(usb_args));
 		sprintf(usb_args, " usb_ohci=base:0x%x,len:0x%x,irq:%d",
 			USB_OHCI_BASE, USB_OHCI_LEN, AU1000_USB_HOST_INT);
 		strcat(argptr, usb_args);
@@ -128,7 +135,6 @@
 #ifdef CONFIG_USB_OHCI
 	usb_clocks |= 0x00004000; // CLK2 = FREQ2
 #endif
-
 	outl(usb_clocks, CLOCK_SOURCE_CNTRL);
 	udelay(1000);
 
@@ -142,11 +148,9 @@
 	    ;
 #endif
 	
-	// Eric D. says we need to do this.
-	outl(0, PIN_STATE);
-
 	// configure pins GPIO[14:9] as GPIO
 	pin_func = inl(PIN_FUNCTION) & (u32)(~0x8080);
+
 #ifndef CONFIG_AU1000_USB_DEVICE
 	// 2nd USB port is USB host
 	pin_func |= 0x8000;
@@ -179,11 +183,10 @@
 
 	if ((argptr = strstr(argptr, "video=")) == NULL) {
 		argptr = prom_getcmdline();
-		strcat(argptr, " video=e1356fb:system:pb1000");
+		strcat(argptr, " video=e1356fb:system:pb1000,mmunalign:1");
 	}
 #endif // CONFIG_FB_E1356
 
-
 #ifdef CONFIG_PCI
 	outl(0x11803e40, STATIC_ADDRESS_1);  // expand CE0 to cover PCI
 	outl(inl(STATIC_CONFIG_0) | 0x1000, STATIC_CONFIG_0);  // burst visibility on 
@@ -203,6 +206,14 @@
 	outl(0, UART1_ADDR + UART_CLK);
 	outl(0, UART2_ADDR + UART_CLK);
 	outl(0, UART3_ADDR + UART_CLK);
+
+#ifdef CONFIG_BLK_DEV_IDE
+	{
+		argptr = prom_getcmdline();
+		strcat(argptr, " ide0=noprobe");
+	}
+	ide_ops = &std_ide_ops;
+#endif
 
 	while (inl(PC_COUNTER_CNTRL) & PC_CNTRL_E0S);
 	outl(PC_CNTRL_E0 | PC_CNTRL_EN0, PC_COUNTER_CNTRL);

[Linux-mips-commits]CVS: linux/include/asm-mips au1000_pcmcia.h,1.2,1.3 pb1000.h,1.3,1.4

[Pete P. <pp...@us...>]

Update of /cvsroot/linux-mips/linux/include/asm-mips
In directory usw-pr-cvs1:/tmp/cvs-serv25362/include/asm-mips

Modified Files:
	au1000_pcmcia.h pb1000.h 
Log Message:
* Added pcmcia ide support.
* fixed interrupt handler to work with new pb1000 
pcmcia cpld
* modified pcmcia driver to reflect cpld changes
* hardcoded pcmcia driver to apply 3.3V if XV
is detected, which seems to be a socket/hardware problem.



Index: au1000_pcmcia.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips/au1000_pcmcia.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- au1000_pcmcia.h	2001/09/25 03:36:35	1.2
+++ au1000_pcmcia.h	2001/10/03 22:49:23	1.3
@@ -1,4 +1,5 @@
 /*
+ *
  * Alchemy Semi Au1000 pcmcia driver include file
  *
  * Copyright 2001 MontaVista Software Inc.
@@ -24,11 +25,12 @@
  *
  * 
  */
+
 #ifndef __ASM_AU1000_PCMCIA_H
 #define __ASM_AU1000_PCMCIA_H
 
 
-#define AU1000_PCMCIA_POLL_PERIOD    (4*HZ)
+#define AU1000_PCMCIA_POLL_PERIOD    (2*HZ)
 #define AU1000_PCMCIA_IO_SPEED       (255)
 #define AU1000_PCMCIA_MEM_SPEED      (300)
 

Index: pb1000.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips/pb1000.h,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- pb1000.h	2001/09/25 03:36:36	1.3
+++ pb1000.h	2001/10/03 22:49:23	1.4
@@ -1,4 +1,5 @@
 /*
+ *
  * Alchemy Semi PB1000 Referrence Board
  *
  * Copyright 2001 MontaVista Software Inc.
@@ -24,9 +25,11 @@
  *
  * 
  */
+
 #ifndef __ASM_PB1000_H
 #define __ASM_PB1000_H
 
+
 /* PCMCIA PB1000 specific defines */
 #define PCMCIA_MAX_SOCK 0 /* the second socket, 1, is not supported at this time */
 
@@ -73,6 +76,7 @@
 /* VPPEN1 - VPPEN0 */
 #define VPP_GND ((0<<1) | (0<<0))
 #define VPP_5V  ((1<<1) | (0<<0))
+#define VPP_3V  ((0<<1) | (1<<0))
 #define VPP_12V ((0<<1) | (1<<0))
 #define VPP_HIZ ((1<<1) | (1<<0))
 

[Linux-mips-commits]CVS: linux/drivers/pcmcia au1000_generic.c,1.3,1.4 au1000_pb1000.c,1.1,1.2

[Pete P. <pp...@us...>]

Update of /cvsroot/linux-mips/linux/drivers/pcmcia
In directory usw-pr-cvs1:/tmp/cvs-serv25362/drivers/pcmcia

Modified Files:
	au1000_generic.c au1000_pb1000.c 
Log Message:
* Added pcmcia ide support.
* fixed interrupt handler to work with new pb1000 
pcmcia cpld
* modified pcmcia driver to reflect cpld changes
* hardcoded pcmcia driver to apply 3.3V if XV
is detected, which seems to be a socket/hardware problem.



Index: au1000_generic.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/pcmcia/au1000_generic.c,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- au1000_generic.c	2001/09/25 03:36:35	1.3
+++ au1000_generic.c	2001/10/03 22:49:23	1.4
@@ -1,4 +1,5 @@
 /*
+ *
  * Alchemy Semi Au1000 pcmcia driver
  *
  * Copyright 2001 MontaVista Software Inc.
@@ -80,18 +81,16 @@
 
 /* Prototypes for routines which are used internally: */
 
-static int au1000_pcmcia_driver_init(void);
+static int  au1000_pcmcia_driver_init(void);
 static void au1000_pcmcia_driver_shutdown(void);
 static void au1000_pcmcia_task_handler(void *data);
-static void au1000_pcmcia_poll_event(unsigned long data);
-static void au1000_pcmcia_interrupt(int irq, void *dev,
-				    struct pt_regs *regs);
+static void au1000_pcmcia_poll_event(u32 data);
+static void au1000_pcmcia_interrupt(int irq, void *dev, struct pt_regs *regs);
 static struct tq_struct au1000_pcmcia_task;
 
 #ifdef CONFIG_PROC_FS
-static int au1000_pcmcia_proc_status(char *buf, char **start,
-				     off_t pos, int count, int *eof,
-				     void *data);
+static int au1000_pcmcia_proc_status(char *buf, char **start, 
+		off_t pos, int count, int *eof, void *data);
 #endif
 
 
@@ -99,30 +98,20 @@
  * new-and-impr^H^H^H^H^H^H^H^H^H^H in-kernel PCMCIA core:
  */
 
-static int au1000_pcmcia_init(unsigned int sock);
-static int au1000_pcmcia_suspend(unsigned int sock);
-static int au1000_pcmcia_register_callback(unsigned int sock,
-					   void (*handler) (void *,
-							    unsigned int),
-					   void *info);
-static int au1000_pcmcia_inquire_socket(unsigned int sock,
-					socket_cap_t * cap);
-static int au1000_pcmcia_get_status(unsigned int sock, u_int * value);
-static int au1000_pcmcia_get_socket(unsigned int sock,
-				    socket_state_t * state);
-static int au1000_pcmcia_set_socket(unsigned int sock,
-				    socket_state_t * state);
-static int au1000_pcmcia_get_io_map(unsigned int sock,
-				    struct pccard_io_map *io);
-static int au1000_pcmcia_set_io_map(unsigned int sock,
-				    struct pccard_io_map *io);
-static int au1000_pcmcia_get_mem_map(unsigned int sock,
-				     struct pccard_mem_map *mem);
-static int au1000_pcmcia_set_mem_map(unsigned int sock,
-				     struct pccard_mem_map *mem);
+static int au1000_pcmcia_init(u32 sock);
+static int au1000_pcmcia_suspend(u32 sock);
+static int au1000_pcmcia_register_callback(u32 sock, 
+		void (*handler)(void *, u32), void *info);
+static int au1000_pcmcia_inquire_socket(u32 sock, socket_cap_t *cap);
+static int au1000_pcmcia_get_status(u32 sock, u_int *value);
+static int au1000_pcmcia_get_socket(u32 sock, socket_state_t *state);
+static int au1000_pcmcia_set_socket(u32 sock, socket_state_t *state);
+static int au1000_pcmcia_get_io_map(u32 sock, struct pccard_io_map *io);
+static int au1000_pcmcia_set_io_map(u32 sock, struct pccard_io_map *io);
+static int au1000_pcmcia_get_mem_map(u32 sock, struct pccard_mem_map *mem);
+static int au1000_pcmcia_set_mem_map(u32 sock, struct pccard_mem_map *mem);
 #ifdef CONFIG_PROC_FS
-static void au1000_pcmcia_proc_setup(unsigned int sock,
-				     struct proc_dir_entry *base);
+static void au1000_pcmcia_proc_setup(u32 sock, struct proc_dir_entry *base);
 #endif
 
 static struct pccard_operations au1000_pcmcia_operations = {
@@ -154,76 +143,76 @@
 
 	CardServices(GetCardServicesInfo, &info);
 
-	if (info.Revision != CS_RELEASE_CODE) {
-		printk(KERN_ERR
-		       "Card Services release codes do not match\n");
+	if(info.Revision!=CS_RELEASE_CODE){
+		printk(KERN_ERR "Card Services release codes do not match\n");
 		return -1;
 	}
+
 #ifdef CONFIG_MIPS_PB1000
-	pcmcia_low_level = &pb1000_pcmcia_ops;
+	pcmcia_low_level=&pb1000_pcmcia_ops;
 #else
 #error Unsupported AU1000 board.
 #endif
 
-	pcmcia_init.handler = au1000_pcmcia_interrupt;
-	if ((socket_count = pcmcia_low_level->init(&pcmcia_init)) < 0) {
-		printk(KERN_ERR
-		       "Unable to initialize kernel PCMCIA service.\n");
+	pcmcia_init.handler=au1000_pcmcia_interrupt;
+	if((socket_count=pcmcia_low_level->init(&pcmcia_init))<0) {
+		printk(KERN_ERR "Unable to initialize PCMCIA service.\n");
 		return -EIO;
 	}
 
 	/* setup the static bus controller */
 	timing3 = 0x100e3a07;
-	writel(0x00000002, STATIC_CONFIG_3);	/* type = PCMCIA */
-	writel(timing3, STATIC_TIMING_3);
-	writel(0x10000000, STATIC_ADDRESS_3);	/* any PCMCIA select */
+	writel(0x00000002, STATIC_CONFIG_3);  /* type = PCMCIA */
+	writel(timing3, STATIC_TIMING_3); 
+	writel(0x10000000, STATIC_ADDRESS_3); /* any PCMCIA select */
+	au_sync_delay(1);
 
-	pcmcia_socket =
-	    kmalloc(sizeof(struct au1000_pcmcia_socket) * socket_count,
-		    GFP_KERNEL);
-	memset(pcmcia_socket, 0,
-	       sizeof(struct au1000_pcmcia_socket) * socket_count);
+	pcmcia_socket = 
+		kmalloc(sizeof(struct au1000_pcmcia_socket) * socket_count, 
+				GFP_KERNEL);
+	memset(pcmcia_socket, 0, 
+			sizeof(struct au1000_pcmcia_socket) * socket_count);
 	if (!pcmcia_socket) {
 		printk(KERN_ERR "Card Services can't get memory \n");
 		return -1;
 	}
-
-	for (i = 0; i < socket_count; i++) {
+			
+	for(i=0; i < socket_count; i++) {
 
-		if (pcmcia_low_level->socket_state(i, &state) < 0) {
-			printk(KERN_ERR
-			       "Unable to get PCMCIA status from kernel.\n");
+		if(pcmcia_low_level->socket_state(i, &state)<0){
+			printk(KERN_ERR "Unable to get PCMCIA status\n");
 			return -EIO;
 		}
-		pcmcia_socket[i].k_state = state;
-		pcmcia_socket[i].cs_state.csc_mask = SS_DETECT;
-
+		pcmcia_socket[i].k_state=state;
+		pcmcia_socket[i].cs_state.csc_mask=SS_DETECT;
+		
 		if (i == 0) {
-			pcmcia_socket[i].virt_io =
-			    (u32) ioremap(0xC0000000, 0x1000);
+			pcmcia_socket[i].virt_io = 
+				(u32)ioremap(0xC0000000, 0x1000);
 			pcmcia_socket[i].phys_attr = 0xC4000000;
 			pcmcia_socket[i].phys_mem = 0xC8000000;
-		} else {
-			printk(KERN_ERR
-			       "au1000: pcmcia socket 1 not supported\n");
+		}
+		else  {
+			printk(KERN_ERR "au1000: socket 1 not supported\n");
 			return 1;
 		}
 	}
 
 	/* Only advertise as many sockets as we can detect: */
-	if (register_ss_entry(socket_count, &au1000_pcmcia_operations) < 0) {
-		printk(KERN_ERR
-		       "Unable to register socket service routine\n");
+	if(register_ss_entry(socket_count, &au1000_pcmcia_operations)<0){
+		printk(KERN_ERR "Unable to register socket service routine\n");
 		return -ENXIO;
 	}
 
-	/* Start the event poll timer.  It will reschedule by itself afterwards. */
+	/* Start the event poll timer.  
+	 * It will reschedule by itself afterwards. 
+	 */
 	au1000_pcmcia_poll_event(0);
 
 	DEBUG(1, "au1000: initialization complete\n");
 	return 0;
 
-}				/* au1000_pcmcia_driver_init() */
+}  /* au1000_pcmcia_driver_init() */
 
 module_init(au1000_pcmcia_driver_init);
 
@@ -235,19 +224,16 @@
 	unregister_ss_entry(&au1000_pcmcia_operations);
 	pcmcia_low_level->shutdown();
 	flush_scheduled_tasks();
-	for (i = 0; i < socket_count; i++) {
-		if (pcmcia_socket[i].virt_io)
-			iounmap((void *) pcmcia_socket[i].virt_io);
+	for(i=0; i < socket_count; i++) {
+		if (pcmcia_socket[i].virt_io) 
+			iounmap((void *)pcmcia_socket[i].virt_io);
 	}
 	DEBUG(1, "au1000: shutdown complete\n");
 }
 
 module_exit(au1000_pcmcia_driver_shutdown);
 
-static int au1000_pcmcia_init(unsigned int sock)
-{
-	return 0;
-}
+static int au1000_pcmcia_init(unsigned int sock) { return 0; }
 
 static int au1000_pcmcia_suspend(unsigned int sock)
 {
@@ -255,85 +241,68 @@
 }
 
 
-static inline unsigned au1000_pcmcia_events(struct pcmcia_state *state, struct pcmcia_state
-					    *prev_state, unsigned int mask,
-					    unsigned int flags)
+static inline unsigned 
+au1000_pcmcia_events(struct pcmcia_state *state, 
+		struct pcmcia_state *prev_state, 
+		unsigned int mask, unsigned int flags)
 {
-	unsigned int events = 0;
+	unsigned int events=0;
 
-	if (state->detect != prev_state->detect) {
-		DEBUG(2, "%s(): card detect value %u\n", __FUNCTION__,
-		      state->detect);
-		events |= mask & SS_DETECT;
+	if(state->detect!=prev_state->detect){
+		DEBUG(2, "%s(): card detect value %u\n", 
+				__FUNCTION__, state->detect);
+		events |= mask&SS_DETECT;
 	}
 
-	if (state->ready != prev_state->ready) {
-		DEBUG(2, "%s(): card ready value %u\n", __FUNCTION__,
-		      state->ready);
-		events |= mask & ((flags & SS_IOCARD) ? 0 : SS_READY);
-	}
 
-	if (state->bvd1 != prev_state->bvd1) {
-		DEBUG(2, "%s(): card BVD1 value %u\n", __FUNCTION__,
-		      state->bvd1);
-		events |=
-		    mask & (flags & SS_IOCARD) ? SS_STSCHG : SS_BATDEAD;
-	}
-
-	if (state->bvd2 != prev_state->bvd2) {
-		DEBUG(2, "%s(): card BVD2 value %u\n", __FUNCTION__,
-		      state->bvd2);
-		events |= mask & (flags & SS_IOCARD) ? 0 : SS_BATWARN;
+	if(state->ready!=prev_state->ready){
+		DEBUG(2, "%s(): card ready value %u\n", 
+				__FUNCTION__, state->ready);
+		events |= mask&((flags&SS_IOCARD)?0:SS_READY);
 	}
 
-	*prev_state = *state;
+	*prev_state=*state;
 	return events;
 
-}				/* au1000_pcmcia_events() */
+}  /* au1000_pcmcia_events() */
 
 
 /* 
  * Au1000_pcmcia_task_handler()
  * Processes socket events.
  */
-static void au1000_pcmcia_task_handler(void *data)
+static void au1000_pcmcia_task_handler(void *data) 
 {
 	struct pcmcia_state state;
 	int i, events, irq_status;
 
-	for (i = 0; i < socket_count; i++) {
-		if (
-		    (irq_status =
-		     pcmcia_low_level->socket_state(i, &state)) < 0)
-			printk(KERN_ERR
-			       "Error in kernel low-level PCMCIA service.\n");
+	for(i=0; i<socket_count; i++)  {
+		if((irq_status = pcmcia_low_level->socket_state(i, &state))<0)
+			printk(KERN_ERR "low-level PCMCIA error\n");
 
-		events = au1000_pcmcia_events(&state,
-					      &pcmcia_socket[i].k_state,
-					      pcmcia_socket[i].
-					      cs_state.csc_mask,
-					      pcmcia_socket[i].
-					      cs_state.flags);
-		if (pcmcia_socket[i].handler != NULL) {
-			pcmcia_socket[i].
-			    handler(pcmcia_socket[i].handler_info, events);
+		events = au1000_pcmcia_events(&state, 
+				&pcmcia_socket[i].k_state, 
+				pcmcia_socket[i].cs_state.csc_mask, 
+				pcmcia_socket[i].cs_state.flags);
+		if(pcmcia_socket[i].handler!=NULL) {
+			pcmcia_socket[i].handler(pcmcia_socket[i].handler_info,
+					events);
 		}
 	}
 
-}				/* au1000_pcmcia_task_handler() */
+}  /* au1000_pcmcia_task_handler() */
 
 static struct tq_struct au1000_pcmcia_task = {
-	routine:au1000_pcmcia_task_handler
+	routine: au1000_pcmcia_task_handler
 };
 
 
-static void au1000_pcmcia_poll_event(unsigned long dummy)
+static void au1000_pcmcia_poll_event(u32 dummy)
 {
 	poll_timer.function = au1000_pcmcia_poll_event;
 	poll_timer.expires = jiffies + AU1000_PCMCIA_POLL_PERIOD;
 	add_timer(&poll_timer);
 	schedule_task(&au1000_pcmcia_task);
-	//au1000_pcmcia_task_handler(0);
 }
 
 
@@ -343,25 +312,24 @@
  * because the Card Services event handling code performs scheduling 
  * operations which cannot be executed from within an interrupt context.
  */
-static void au1000_pcmcia_interrupt(int irq, void *dev,
-				    struct pt_regs *regs)
+static void 
+au1000_pcmcia_interrupt(int irq, void *dev, struct pt_regs *regs)
 {
 	schedule_task(&au1000_pcmcia_task);
 }
 
 
-static int
-au1000_pcmcia_register_callback(unsigned int sock,
-				void (*handler) (void *, unsigned int),
-				void *info)
+static int 
+au1000_pcmcia_register_callback(unsigned int sock, 
+		void (*handler)(void *, unsigned int), void *info)
 {
-	if (handler == NULL) {
-		pcmcia_socket[sock].handler = NULL;
+	if(handler==NULL){
+		pcmcia_socket[sock].handler=NULL;
 		MOD_DEC_USE_COUNT;
 	} else {
 		MOD_INC_USE_COUNT;
-		pcmcia_socket[sock].handler = handler;
-		pcmcia_socket[sock].handler_info = info;
+		pcmcia_socket[sock].handler=handler;
+		pcmcia_socket[sock].handler_info=info;
 	}
 	return 0;
 }
@@ -385,140 +353,134 @@
  *
  * Returns: 0 on success, -1 if no pin has been configured for `sock'
  */
-static int au1000_pcmcia_inquire_socket(unsigned int sock,
-					socket_cap_t * cap)
+static int au1000_pcmcia_inquire_socket(unsigned int sock, socket_cap_t *cap)
 {
 	struct pcmcia_irq_info irq_info;
 
-	if (sock > socket_count) {
-		printk(KERN_ERR "au1000: socket %u not configured\n",
-		       sock);
+	if(sock > socket_count){
+		printk(KERN_ERR "au1000: socket %u not configured\n", sock);
 		return -1;
 	}
 
 	/* from the sa1100_generic driver: */
 
 	/* SS_CAP_PAGE_REGS: used by setup_cis_mem() in cistpl.c to set the
-	   *   force_low argument to validate_mem() in rsrc_mgr.c -- since in
-	   *   general, the mapped * addresses of the PCMCIA memory regions
-	   *   will not be within 0xffff, setting force_low would be
-	   *   undesirable.
-	   *
-	   * SS_CAP_STATIC_MAP: don't bother with the (user-configured) memory
-	   *   resource database; we instead pass up physical address ranges
-	   *   and allow other parts of Card Services to deal with remapping.
-	   *
-	   * SS_CAP_PCCARD: we can deal with 16-bit PCMCIA & CF cards, but
-	   *   not 32-bit CardBus devices.
-	 */
-	cap->features =
-	    (SS_CAP_PAGE_REGS | SS_CAP_STATIC_MAP | SS_CAP_PCCARD);
+	*   force_low argument to validate_mem() in rsrc_mgr.c -- since in
+	*   general, the mapped * addresses of the PCMCIA memory regions
+	*   will not be within 0xffff, setting force_low would be
+	*   undesirable.
+	*
+	* SS_CAP_STATIC_MAP: don't bother with the (user-configured) memory
+	*   resource database; we instead pass up physical address ranges
+	*   and allow other parts of Card Services to deal with remapping.
+	*
+	* SS_CAP_PCCARD: we can deal with 16-bit PCMCIA & CF cards, but
+	*   not 32-bit CardBus devices.
+	*/
+	cap->features=(SS_CAP_PAGE_REGS  | SS_CAP_STATIC_MAP | SS_CAP_PCCARD);
 
-	irq_info.sock = sock;
-	irq_info.irq = -1;
+	irq_info.sock=sock;
+	irq_info.irq=-1;
 
-	if (pcmcia_low_level->get_irq_info(&irq_info) < 0) {
-		printk(KERN_ERR
-		       "Error obtaining IRQ info from kernel for socket %u\n",
-		       sock);
+	if(pcmcia_low_level->get_irq_info(&irq_info)<0){
+		printk(KERN_ERR "Error obtaining IRQ info socket %u\n", sock);
 		return -1;
 	}
 
-	cap->irq_mask = 0;
-	cap->map_size = MAP_SIZE;
-	cap->pci_irq = irq_info.irq;
-	cap->io_offset = pcmcia_socket[sock].virt_io;
+	cap->irq_mask=0;
+	cap->map_size=MAP_SIZE;
+	cap->pci_irq=irq_info.irq;
+	cap->io_offset=pcmcia_socket[sock].virt_io;
 
 	return 0;
 
-}				/* au1000_pcmcia_inquire_socket() */
+}  /* au1000_pcmcia_inquire_socket() */
 
 
-static int
+static int 
 au1000_pcmcia_get_status(unsigned int sock, unsigned int *status)
 {
 	struct pcmcia_state state;
 
 
-	if ((pcmcia_low_level->socket_state(sock, &state)) < 0) {
-		printk(KERN_ERR
-		       "Unable to get PCMCIA status from kernel.\n");
+	if((pcmcia_low_level->socket_state(sock, &state))<0){
+		printk(KERN_ERR "Unable to get PCMCIA status from kernel.\n");
 		return -1;
 	}
 
 	pcmcia_socket[sock].k_state = state;
 
-	*status = state.detect ? SS_DETECT : 0;
+	*status = state.detect?SS_DETECT:0;
 
-	*status |= state.ready ? SS_READY : 0;
+	*status |= state.ready?SS_READY:0;
 
-	*status |= pcmcia_socket[sock].cs_state.Vcc ? SS_POWERON : 0;
+	*status |= pcmcia_socket[sock].cs_state.Vcc?SS_POWERON:0;
 
-	if (pcmcia_socket[sock].cs_state.flags & SS_IOCARD)
-		*status |= state.bvd1 ? SS_STSCHG : 0;
+	if(pcmcia_socket[sock].cs_state.flags&SS_IOCARD)
+		*status |= state.bvd1?SS_STSCHG:0;
 	else {
-		if (state.bvd1 == 0)
+		if(state.bvd1==0)
 			*status |= SS_BATDEAD;
-		else if (state.bvd2 == 0)
+		else if(state.bvd2 == 0)
 			*status |= SS_BATWARN;
 	}
 
-	*status |= state.vs_3v ? SS_3VCARD : 0;
+	*status|=state.vs_3v?SS_3VCARD:0;
 
-	*status |= state.vs_Xv ? SS_XVCARD : 0;
+	*status|=state.vs_Xv?SS_XVCARD:0;
 
 	DEBUG(2, "\tstatus: %s%s%s%s%s%s%s%s\n",
-	      (*status & SS_DETECT) ? "DETECT " : "",
-	      (*status & SS_READY) ? "READY " : "",
-	      (*status & SS_BATDEAD) ? "BATDEAD " : "",
-	      (*status & SS_BATWARN) ? "BATWARN " : "",
-	      (*status & SS_POWERON) ? "POWERON " : "",
-	      (*status & SS_STSCHG) ? "STSCHG " : "",
-	      (*status & SS_3VCARD) ? "3VCARD " : "",
-	      (*status & SS_XVCARD) ? "XVCARD " : "");
+	(*status&SS_DETECT)?"DETECT ":"",
+	(*status&SS_READY)?"READY ":"", 
+	(*status&SS_BATDEAD)?"BATDEAD ":"",
+	(*status&SS_BATWARN)?"BATWARN ":"",
+	(*status&SS_POWERON)?"POWERON ":"",
+	(*status&SS_STSCHG)?"STSCHG ":"",
+	(*status&SS_3VCARD)?"3VCARD ":"",
+	(*status&SS_XVCARD)?"XVCARD ":"");
 
 	return 0;
 
-}				/* au1000_pcmcia_get_status() */
+}  /* au1000_pcmcia_get_status() */
 
 
-static int
-au1000_pcmcia_get_socket(unsigned int sock, socket_state_t * state)
+static int 
+au1000_pcmcia_get_socket(unsigned int sock, socket_state_t *state)
 {
 	*state = pcmcia_socket[sock].cs_state;
 	return 0;
 }
 
 
-static int
-au1000_pcmcia_set_socket(unsigned int sock, socket_state_t * state)
+static int 
+au1000_pcmcia_set_socket(unsigned int sock, socket_state_t *state)
 {
 	struct pcmcia_configure configure;
 
 	DEBUG(2, "\tmask:  %s%s%s%s%s%s\n\tflags: %s%s%s%s%s%s\n"
-	      "\tVcc %d  Vpp %d  irq %d\n",
-	      (state->csc_mask == 0) ? "<NONE>" : "",
-	      (state->csc_mask & SS_DETECT) ? "DETECT " : "",
-	      (state->csc_mask & SS_READY) ? "READY " : "",
-	      (state->csc_mask & SS_BATDEAD) ? "BATDEAD " : "",
-	      (state->csc_mask & SS_BATWARN) ? "BATWARN " : "",
-	      (state->csc_mask & SS_STSCHG) ? "STSCHG " : "",
-	      (state->flags == 0) ? "<NONE>" : "",
-	      (state->flags & SS_PWR_AUTO) ? "PWR_AUTO " : "",
-	      (state->flags & SS_IOCARD) ? "IOCARD " : "",
-	      (state->flags & SS_RESET) ? "RESET " : "",
-	      (state->flags & SS_SPKR_ENA) ? "SPKR_ENA " : "",
-	      (state->flags & SS_OUTPUT_ENA) ? "OUTPUT_ENA " : "",
-	      state->Vcc, state->Vpp, state->io_irq);
+	"\tVcc %d  Vpp %d  irq %d\n",
+	(state->csc_mask==0)?"<NONE>":"",
+	(state->csc_mask&SS_DETECT)?"DETECT ":"",
+	(state->csc_mask&SS_READY)?"READY ":"",
+	(state->csc_mask&SS_BATDEAD)?"BATDEAD ":"",
+	(state->csc_mask&SS_BATWARN)?"BATWARN ":"",
+	(state->csc_mask&SS_STSCHG)?"STSCHG ":"",
+	(state->flags==0)?"<NONE>":"",
+	(state->flags&SS_PWR_AUTO)?"PWR_AUTO ":"",
+	(state->flags&SS_IOCARD)?"IOCARD ":"",
+	(state->flags&SS_RESET)?"RESET ":"",
+	(state->flags&SS_SPKR_ENA)?"SPKR_ENA ":"",
+	(state->flags&SS_OUTPUT_ENA)?"OUTPUT_ENA ":"",
+	state->Vcc, state->Vpp, state->io_irq);
 
-	configure.sock = sock;
-	configure.vcc = state->Vcc;
-	configure.vpp = state->Vpp;
-	configure.output = (state->flags & SS_OUTPUT_ENA) ? 1 : 0;
-	configure.speaker = (state->flags & SS_SPKR_ENA) ? 1 : 0;
-	configure.reset = (state->flags & SS_RESET) ? 1 : 0;
+	configure.sock=sock;
+	configure.vcc=state->Vcc;
+	configure.vpp=state->Vpp;
+	configure.output=(state->flags&SS_OUTPUT_ENA)?1:0;
+	configure.speaker=(state->flags&SS_SPKR_ENA)?1:0;
+	configure.reset=(state->flags&SS_RESET)?1:0;
 
-	if (pcmcia_low_level->configure_socket(&configure) < 0) {
+	if(pcmcia_low_level->configure_socket(&configure)<0){
 		printk(KERN_ERR "Unable to configure socket %u\n", sock);
 		return -1;
 	}
@@ -526,136 +488,136 @@
 	pcmcia_socket[sock].cs_state = *state;
 	return 0;
 
-}				/* au1000_pcmcia_set_socket() */
+}  /* au1000_pcmcia_set_socket() */
 
 
-static int
+static int 
 au1000_pcmcia_get_io_map(unsigned int sock, struct pccard_io_map *map)
 {
 	DEBUG(1, "au1000_pcmcia_get_io_map: sock %d\n", sock);
-	if (map->map >= MAX_IO_WIN) {
-		printk(KERN_ERR "%s(): map (%d) out of range\n",
-		       __FUNCTION__, map->map);
+	if(map->map>=MAX_IO_WIN){
+		printk(KERN_ERR "%s(): map (%d) out of range\n", 
+				__FUNCTION__, map->map);
 		return -1;
 	}
-	*map = pcmcia_socket[sock].io_map[map->map];
+	*map=pcmcia_socket[sock].io_map[map->map];
 	return 0;
 }
 
 
-int au1000_pcmcia_set_io_map(unsigned int sock, struct pccard_io_map *map)
+int 
+au1000_pcmcia_set_io_map(unsigned int sock, struct pccard_io_map *map)
 {
 	unsigned int speed;
 	unsigned long start;
 
-	if (map->map >= MAX_IO_WIN) {
-		printk(KERN_ERR "%s(): map (%d) out of range\n",
-		       __FUNCTION__, map->map);
+	if(map->map>=MAX_IO_WIN){
+		printk(KERN_ERR "%s(): map (%d) out of range\n", 
+				__FUNCTION__, map->map);
 		return -1;
 	}
 
-	if (map->flags & MAP_ACTIVE) {
-		speed =
-		    (map->speed > 0) ? map->speed : AU1000_PCMCIA_IO_SPEED;
-		pcmcia_socket[sock].speed_io = speed;
+	if(map->flags&MAP_ACTIVE){
+		speed=(map->speed>0)?map->speed:AU1000_PCMCIA_IO_SPEED;
+		pcmcia_socket[sock].speed_io=speed;
 	}
 
-	start = map->start;
+	start=map->start;
 
-	if (map->stop == 1) {
-		map->stop = PAGE_SIZE - 1;
+	if(map->stop==1) {
+		map->stop=PAGE_SIZE-1;
 	}
 
-	map->start = pcmcia_socket[sock].virt_io;
-	map->stop = map->start + (map->stop - start);
-	pcmcia_socket[sock].io_map[map->map] = *map;
-	DEBUG(3, "set_io_map %d start %x stop %x\n", map->map, map->start,
-	      map->stop);
+	map->start=pcmcia_socket[sock].virt_io;
+	map->stop=map->start+(map->stop-start);
+	pcmcia_socket[sock].io_map[map->map]=*map;
+	DEBUG(3, "set_io_map %d start %x stop %x\n", 
+			map->map, map->start, map->stop);
 	return 0;
 
-}
+}  /* au1000_pcmcia_set_io_map() */
 
 
-static int
+static int 
 au1000_pcmcia_get_mem_map(unsigned int sock, struct pccard_mem_map *map)
 {
 
-	if (map->map >= MAX_WIN) {
-		printk(KERN_ERR "%s(): map (%d) out of range\n",
-		       __FUNCTION__, map->map);
+	if(map->map>=MAX_WIN) {
+		printk(KERN_ERR "%s(): map (%d) out of range\n", 
+				__FUNCTION__, map->map);
 		return -1;
 	}
-	*map = pcmcia_socket[sock].mem_map[map->map];
+	*map=pcmcia_socket[sock].mem_map[map->map];
 	return 0;
 }
 
 
-static int
+static int 
 au1000_pcmcia_set_mem_map(unsigned int sock, struct pccard_mem_map *map)
 {
 	unsigned int speed;
 	unsigned long start;
 	u_long flags;
 
-	if (map->map >= MAX_WIN) {
-		printk(KERN_ERR "%s(): map (%d) out of range\n",
-		       __FUNCTION__, map->map);
+	if(map->map>=MAX_WIN){
+		printk(KERN_ERR "%s(): map (%d) out of range\n", 
+				__FUNCTION__, map->map);
 		return -1;
 	}
 
-	if (map->flags & MAP_ACTIVE) {
-		speed =
-		    (map->speed >
-		     0) ? map->speed : AU1000_PCMCIA_MEM_SPEED;
+	if(map->flags&MAP_ACTIVE){
+		speed=(map->speed>0)?map->speed:AU1000_PCMCIA_MEM_SPEED;
 
 		/* TBD */
-		if (map->flags & MAP_ATTRIB) {
-			pcmcia_socket[sock].speed_attr = speed;
-		} else {
-			pcmcia_socket[sock].speed_mem = speed;
+		if(map->flags&MAP_ATTRIB){
+			pcmcia_socket[sock].speed_attr=speed;
+		} 
+		else {
+			pcmcia_socket[sock].speed_mem=speed;
 		}
 	}
 
 	save_flags(flags);
 	cli();
-	start = map->sys_start;
+	start=map->sys_start;
 
-	if (map->sys_stop == 0)
-		map->sys_stop = MAP_SIZE - 1;
+	if(map->sys_stop==0)
+		map->sys_stop=MAP_SIZE-1;
 
 	if (map->flags & MAP_ATTRIB) {
-		map->sys_start =
-		    pcmcia_socket[sock].phys_attr + map->card_start;
-	} else {
-		map->sys_start =
-		    pcmcia_socket[sock].phys_mem + map->card_start;
+		map->sys_start = pcmcia_socket[sock].phys_attr + 
+			map->card_start;
+	}
+	else {
+		map->sys_start = pcmcia_socket[sock].phys_mem + 
+			map->card_start;
 	}
 
-	map->sys_stop = map->sys_start + (map->sys_stop - start);
-	pcmcia_socket[sock].mem_map[map->map] = *map;
+	map->sys_stop=map->sys_start+(map->sys_stop-start);
+	pcmcia_socket[sock].mem_map[map->map]=*map;
 	restore_flags(flags);
-	DEBUG(3, "set_mem_map %d start %x stop %x card_start %x\n",
-	      map->map, map->sys_start, map->sys_stop, map->card_start);
+	DEBUG(3, "set_mem_map %d start %x stop %x card_start %x\n", 
+			map->map, map->sys_start, map->sys_stop, 
+			map->card_start);
 	return 0;
 
-}
+}  /* au1000_pcmcia_set_mem_map() */
 
 
 #if defined(CONFIG_PROC_FS)
 
-static void
+static void 
 au1000_pcmcia_proc_setup(unsigned int sock, struct proc_dir_entry *base)
 {
 	struct proc_dir_entry *entry;
 
-	if ((entry = create_proc_entry("status", 0, base)) == NULL) {
-		printk(KERN_ERR
-		       "Unable to install \"status\" procfs entry\n");
+	if((entry=create_proc_entry("status", 0, base))==NULL){
+		printk(KERN_ERR "Unable to install \"status\" procfs entry\n");
 		return;
 	}
 
-	entry->read_proc = au1000_pcmcia_proc_status;
-	entry->data = (void *) sock;
+	entry->read_proc=au1000_pcmcia_proc_status;
+	entry->data=(void *)sock;
 }
 
 
@@ -664,86 +626,69 @@
  *
  * Returns: the number of characters added to the buffer
  */
-static int
-au1000_pcmcia_proc_status(char *buf, char **start, off_t pos,
-			  int count, int *eof, void *data)
+static int 
+au1000_pcmcia_proc_status(char *buf, char **start, off_t pos, 
+		int count, int *eof, void *data)
 {
-	char *p = buf;
-	unsigned int sock = (unsigned int) data;
-
-	p += sprintf(p, "k_flags  : %s%s%s%s%s%s%s\n",
-		     pcmcia_socket[sock].k_state.detect ? "detect " : "",
-		     pcmcia_socket[sock].k_state.ready ? "ready " : "",
-		     pcmcia_socket[sock].k_state.bvd1 ? "bvd1 " : "",
-		     pcmcia_socket[sock].k_state.bvd2 ? "bvd2 " : "",
-		     pcmcia_socket[sock].k_state.wrprot ? "wrprot " : "",
-		     pcmcia_socket[sock].k_state.vs_3v ? "vs_3v " : "",
-		     pcmcia_socket[sock].k_state.vs_Xv ? "vs_Xv " : "");
-
-	p += sprintf(p, "status   : %s%s%s%s%s%s%s%s%s\n",
-		     pcmcia_socket[sock].
-		     k_state.detect ? "SS_DETECT " : "",
-		     pcmcia_socket[sock].k_state.ready ? "SS_READY " : "",
-		     pcmcia_socket[sock].cs_state.Vcc ? "SS_POWERON " : "",
-		     pcmcia_socket[sock].
-		     cs_state.flags & SS_IOCARD ? \"SS_IOCARD " : "",
-		     (pcmcia_socket[sock].cs_state.flags & SS_IOCARD
-		      && pcmcia_socket[sock].
-		      k_state.bvd1) ? "SS_STSCHG " : "",
-		     ((pcmcia_socket[sock].cs_state.flags & SS_IOCARD) == 0
-		      && (pcmcia_socket[sock].k_state.bvd1 ==
-			  0)) ? "SS_BATDEAD " : "",
-		     ((pcmcia_socket[sock].cs_state.flags & SS_IOCARD) == 0
-		      && (pcmcia_socket[sock].k_state.bvd2 ==
-			  0)) ? "SS_BATWARN " : "",
-		     pcmcia_socket[sock].k_state.vs_3v ? "SS_3VCARD " : "",
-		     pcmcia_socket[sock].
-		     k_state.vs_Xv ? "SS_XVCARD " : "");
-
-	p += sprintf(p, "mask     : %s%s%s%s%s\n",
-		     pcmcia_socket[sock].
-		     cs_state.csc_mask & SS_DETECT ? \"SS_DETECT " : "",
-		     pcmcia_socket[sock].
-		     cs_state.csc_mask & SS_READY ? \"SS_READY " : "",
-		     pcmcia_socket[sock].
-		     cs_state.csc_mask & SS_BATDEAD ? \"SS_BATDEAD " : "",
-		     pcmcia_socket[sock].
-		     cs_state.csc_mask & SS_BATWARN ? \"SS_BATWARN " : "",
-		     pcmcia_socket[sock].
-		     cs_state.csc_mask & SS_STSCHG ? \"SS_STSCHG " : "");
-
-	p += sprintf(p, "cs_flags : %s%s%s%s%s\n",
-		     pcmcia_socket[sock].
-		     cs_state.flags & SS_PWR_AUTO ? \"SS_PWR_AUTO " : "",
-		     pcmcia_socket[sock].
-		     cs_state.flags & SS_IOCARD ? \"SS_IOCARD " : "",
-		     pcmcia_socket[sock].
-		     cs_state.flags & SS_RESET ? \"SS_RESET " : "",
-		     pcmcia_socket[sock].
-		     cs_state.flags & SS_SPKR_ENA ? \"SS_SPKR_ENA " : "",
-		     pcmcia_socket[sock].
-		     cs_state.flags & SS_OUTPUT_ENA ? \"SS_OUTPUT_ENA " :
-		     "");
-
-	p +=
-	    sprintf(p, "Vcc      : %d\n",
-			pcmcia_socket[sock].cs_state.Vcc);
-
-	p +=
-	    sprintf(p, "Vpp      : %d\n",
-			pcmcia_socket[sock].cs_state.Vpp);
+	char *p=buf;
+	unsigned int sock=(unsigned int)data;
 
-	p +=
-	    sprintf(p, "irq      : %d\n",
-			pcmcia_socket[sock].cs_state.io_irq);
+	p+=sprintf(p, "k_flags  : %s%s%s%s%s%s%s\n", 
+	     pcmcia_socket[sock].k_state.detect?"detect ":"",
+	     pcmcia_socket[sock].k_state.ready?"ready ":"",
+	     pcmcia_socket[sock].k_state.bvd1?"bvd1 ":"",
+	     pcmcia_socket[sock].k_state.bvd2?"bvd2 ":"",
+	     pcmcia_socket[sock].k_state.wrprot?"wrprot ":"",
+	     pcmcia_socket[sock].k_state.vs_3v?"vs_3v ":"",
+	     pcmcia_socket[sock].k_state.vs_Xv?"vs_Xv ":"");
 
-	p += sprintf(p, "I/O      : %u\n", pcmcia_socket[sock].speed_io);
+	p+=sprintf(p, "status   : %s%s%s%s%s%s%s%s%s\n",
+	     pcmcia_socket[sock].k_state.detect?"SS_DETECT ":"",
+	     pcmcia_socket[sock].k_state.ready?"SS_READY ":"",
+	     pcmcia_socket[sock].cs_state.Vcc?"SS_POWERON ":"",
+	     pcmcia_socket[sock].cs_state.flags&SS_IOCARD?\
+	     "SS_IOCARD ":"",
+	     (pcmcia_socket[sock].cs_state.flags&SS_IOCARD &&
+	      pcmcia_socket[sock].k_state.bvd1)?"SS_STSCHG ":"",
+	     ((pcmcia_socket[sock].cs_state.flags&SS_IOCARD)==0 &&
+	      (pcmcia_socket[sock].k_state.bvd1==0))?"SS_BATDEAD ":"",
+	     ((pcmcia_socket[sock].cs_state.flags&SS_IOCARD)==0 &&
+	      (pcmcia_socket[sock].k_state.bvd2==0))?"SS_BATWARN ":"",
+	     pcmcia_socket[sock].k_state.vs_3v?"SS_3VCARD ":"",
+	     pcmcia_socket[sock].k_state.vs_Xv?"SS_XVCARD ":"");
 
-	p += sprintf(p, "attribute: %u\n", pcmcia_socket[sock].speed_attr);
+	p+=sprintf(p, "mask     : %s%s%s%s%s\n",
+	     pcmcia_socket[sock].cs_state.csc_mask&SS_DETECT?\
+	     "SS_DETECT ":"",
+	     pcmcia_socket[sock].cs_state.csc_mask&SS_READY?\
+	     "SS_READY ":"",
+	     pcmcia_socket[sock].cs_state.csc_mask&SS_BATDEAD?\
+	     "SS_BATDEAD ":"",
+	     pcmcia_socket[sock].cs_state.csc_mask&SS_BATWARN?\
+	     "SS_BATWARN ":"",
+	     pcmcia_socket[sock].cs_state.csc_mask&SS_STSCHG?\
+	     "SS_STSCHG ":"");
 
-	p += sprintf(p, "common   : %u\n", pcmcia_socket[sock].speed_mem);
+	p+=sprintf(p, "cs_flags : %s%s%s%s%s\n",
+	     pcmcia_socket[sock].cs_state.flags&SS_PWR_AUTO?\
+	     "SS_PWR_AUTO ":"",
+	     pcmcia_socket[sock].cs_state.flags&SS_IOCARD?\
+	     "SS_IOCARD ":"",
+	     pcmcia_socket[sock].cs_state.flags&SS_RESET?\
+	     "SS_RESET ":"",
+	     pcmcia_socket[sock].cs_state.flags&SS_SPKR_ENA?\
+	     "SS_SPKR_ENA ":"",
+	     pcmcia_socket[sock].cs_state.flags&SS_OUTPUT_ENA?\
+	     "SS_OUTPUT_ENA ":"");
 
-	return p - buf;
+	p+=sprintf(p, "Vcc      : %d\n", pcmcia_socket[sock].cs_state.Vcc);
+	p+=sprintf(p, "Vpp      : %d\n", pcmcia_socket[sock].cs_state.Vpp);
+	p+=sprintf(p, "irq      : %d\n", pcmcia_socket[sock].cs_state.io_irq);
+	p+=sprintf(p, "I/O      : %u\n", pcmcia_socket[sock].speed_io);
+	p+=sprintf(p, "attribute: %u\n", pcmcia_socket[sock].speed_attr);
+	p+=sprintf(p, "common   : %u\n", pcmcia_socket[sock].speed_mem);
+	return p-buf;
 }
 
-#endif /* defined(CONFIG_PROC_FS) */
+
+#endif  /* defined(CONFIG_PROC_FS) */

Index: au1000_pb1000.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/pcmcia/au1000_pb1000.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- au1000_pb1000.c	2001/09/05 18:30:03	1.1
+++ au1000_pb1000.c	2001/10/03 22:49:23	1.2
@@ -1,4 +1,5 @@
 /*
+ *
  * Alchemy Semi PB1000 board specific pcmcia routines.
  *
  * Copyright 2001 MontaVista Software Inc.
@@ -61,15 +62,17 @@
 {
 	u32 pcr;
 	pcr = PCR_SLOT_0_RST | PCR_SLOT_1_RST;
-	//writel(readl(PIN_FUNCTION) & ~(1<<8), PIN_FUNCTION); /* pin15 is gpio */
-	writel(0, PIN_FUNCTION);	/* pin15 is gpio */
-	writel(readl(TSTATE_STATE_SET) | (1 << 15), TSTATE_STATE_SET);	/* tristate gpio15 */
-	au_sync();
 
-	writel(0x8000, AU1000_MDR);	/* clear pcmcia interrupt */
-	writel(0x4000, AU1000_MDR);	/* enable pcmcia interrupt */
+	writel(0x8000, AU1000_MDR); /* clear pcmcia interrupt */
+	au_sync_delay(100);
+	writel(0x4000, AU1000_MDR); /* enable pcmcia interrupt */
 	au_sync();
 
+	pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,0);
+	pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,1);
+	writew(pcr, AU1000_PCR);
+	au_sync_delay(20);
+	  
 	/* There's two sockets, but only the first one, 0, is used and tested */
 	return 1;
 }
@@ -77,13 +80,15 @@
 static int pb1000_pcmcia_shutdown(void)
 {
 	u16 pcr;
-	pcr = 0;
+	pcr = PCR_SLOT_0_RST | PCR_SLOT_1_RST;
+	pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,0);
+	pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,1);
 	writew(pcr, AU1000_PCR);
-	mdelay(20);
+	au_sync_delay(20);
 	return 0;
 }
 
-static int
+static int 
 pb1000_pcmcia_socket_state(unsigned sock, struct pcmcia_state *state)
 {
 	u16 levels, pcr;
@@ -98,57 +103,74 @@
 	state->detect = 0;
 
 	/* 
+	 * This is tricky. The READY pin is also the #IRQ pin.  We'll treat
+	 * READY as #IRQ and set state->ready to 1 whenever state->detect 
+	 * is true.
+	 */
+
+	/* 
 	 * CD1/2 are active low; so are the VSS pins; Ready is active high
 	 */
 	if (sock == 0) {
-		if ((levels & ACR1_SLOT_0_READY))
-			state->ready = 1;
 		if (!(levels & (ACR1_SLOT_0_CD1 | ACR1_SLOT_0_CD2))) {
 			state->detect = 1;
-			vs = (levels >> 4) & 0x3;
+			vs =  (levels >> 4) & 0x3;
 			switch (vs) {
-			case 0:
-			case 1:
-				DEBUG(1, "%d: vs_3v\n", sock);
-				state->vs_3v = 1;
-				break;
-			case 2:
-				state->vs_Xv = 1;
-				DEBUG(1, "%d: vs_Xv\n", sock);
-				break;
-			case 3:
-			default:
-				break;
+				case 0:
+				case 1:
+					DEBUG("%d: vs_3v\n", sock);
+					state->vs_3v=1;
+					break;
+				case 2:
+					/* 
+					 * This should be Xv voltage.
+					 * Don't know why with some cards the 
+					 * register is reporting Xv voltage. 
+					 * For now assume case 2 is really 3V.
+					 */
+					state->vs_3v=1;
+					break;
+				case 3:
+				default:
+					break;
 			}
 		}
-	} else if (sock == 1) {
-		if ((levels & ACR1_SLOT_1_READY))
-			state->ready = 1;
+	}
+	else if (sock == 1) {
 		if (!(levels & (ACR1_SLOT_1_CD1 | ACR1_SLOT_1_CD2))) {
 			state->detect = 1;
-			vs = (levels >> 12) & 0x3;
+			vs =  (levels >> 12) & 0x3;
 			switch (vs) {
-			case 0:
-			case 1:
-				state->vs_3v = 1;
-				DEBUG(1, "%d: vs_3v\n", sock);
-				break;
-			case 2:
-				state->vs_Xv = 1;
-				DEBUG(1, "%d: vs_Xv\n", sock);
-				break;
-			case 3:
-			default:
-				break;
+				case 0:
+				case 1:
+					state->vs_3v=1;
+					DEBUG(1, "%d: vs_3v\n", sock);
+					break;
+				case 2:
+					/* 
+					 * This should be Xv voltage.
+					 * Don't know why with some cards the 
+					 * register is reporting Xv voltage. 
+					 * For now assume case 2 is really 3V.
+					 */
+					state->vs_3v=1;
+					break;
+				case 3:
+				default:
+					break;
 			}
 		}
-	} else {
+	}
+	else  {
 		printk(KERN_ERR "pb1000 socket_state bad sock %d\n", sock);
 	}
 
-	state->bvd1 = 1;
-	state->bvd2 = 1;
-	state->wrprot = 0;
+	if (state->detect)
+		state->ready = 1;
+
+	state->bvd1=1;
+	state->bvd2=1;
+	state->wrprot=0; 
 	return 1;
 }
 
@@ -156,142 +178,153 @@
 static int pb1000_pcmcia_get_irq_info(struct pcmcia_irq_info *info)
 {
 
-	if (info->sock > PCMCIA_MAX_SOCK)
-		return -1;
+	if(info->sock > PCMCIA_MAX_SOCK) return -1;
 
-	if (info->sock == 0)
+	if(info->sock == 0)
 		info->irq = AU1000_GPIO_15;
-	else
+	else 
 		info->irq = -1;
 
 	return 0;
 }
 
 
-static int
+static int 
 pb1000_pcmcia_configure_socket(const struct pcmcia_configure *configure)
 {
 	u16 pcr;
 
-	if (configure->sock > PCMCIA_MAX_SOCK)
-		return -1;
+	if(configure->sock > PCMCIA_MAX_SOCK) return -1;
 
 	pcr = readw(AU1000_PCR);
 
-	if (configure->sock == 0)
-		pcr &= ~(PCR_SLOT_0_VCC0 | PCR_SLOT_0_VCC1);
-	else
-		pcr &= ~(PCR_SLOT_1_VCC0 | PCR_SLOT_1_VCC1);
+	if (configure->sock == 0) {
+		pcr &= ~(PCR_SLOT_0_VCC0 | PCR_SLOT_0_VCC1 | 
+				PCR_SLOT_0_VPP0 | PCR_SLOT_0_VPP1);
+	}
+	else  {
+		pcr &= ~(PCR_SLOT_1_VCC0 | PCR_SLOT_1_VCC1 | 
+				PCR_SLOT_1_VPP0 | PCR_SLOT_1_VPP1);
+	}
 
 	pcr &= ~PCR_SLOT_0_RST;
 	writew(pcr, AU1000_PCR);
-	mdelay(20);
+	au_sync_delay(200);
 
-	switch (configure->vcc) {
-	case 0:		/* Vcc 0 */
-		switch (configure->vpp) {
-		case 0:
-			pcr |=
-			    SET_VCC_VPP(VCC_HIZ, VPP_GND, configure->sock);
-			DEBUG(3, "Vcc 0V Vpp 0V, pcr %x\n", pcr);
-			break;
-		case 12:
-			pcr |=
-			    SET_VCC_VPP(VCC_HIZ, VPP_12V, configure->sock);
-			DEBUG(3, "Vcc 0V Vpp 12V, pcr %x\n", pcr);
-			break;
-		case 50:
-			pcr |=
-			    SET_VCC_VPP(VCC_HIZ, VPP_5V, configure->sock);
-			DEBUG(3, "Vcc 0V Vpp 5V, pcr %x\n", pcr);
-			break;
-		case 33:
-		default:
-			pcr |=
-			    SET_VCC_VPP(VCC_HIZ, VPP_HIZ, configure->sock);
-			printk(KERN_ERR "%s: bad Vcc/Vpp combo (%d:%d)\n",
-			       __FUNCTION__, configure->vcc,
-			       configure->vpp);
-			break;
-		}
-		break;
-	case 50:		/* Vcc 5V */
-		switch (configure->vpp) {
-		case 0:
-			pcr |=
-			    SET_VCC_VPP(VCC_5V, VPP_GND, configure->sock);
-			DEBUG(3, "Vcc 5V Vpp 0V, pcr %x\n", pcr);
-			break;
-		case 50:
-			pcr |=
-			    SET_VCC_VPP(VCC_5V, VPP_5V, configure->sock);
-			DEBUG(3, "Vcc 5V Vpp 5V, pcr %x\n", pcr);
-			break;
-		case 12:
-			pcr |=
-			    SET_VCC_VPP(VCC_5V, VPP_12V, configure->sock);
-			DEBUG(3, "Vcc 5V Vpp 12V, pcr %x\n", pcr);
-			break;
-		case 33:
-		default:
-			pcr |=
-			    SET_VCC_VPP(VCC_HIZ, VPP_HIZ, configure->sock);
-			printk(KERN_ERR "%s: bad Vcc/Vpp combo (%d:%d)\n",
-			       __FUNCTION__, configure->vcc,
-			       configure->vpp);
-			break;
-		}
-		break;
-	case 33:		/* Vcc 3.3V */
-		switch (configure->vpp) {
-		case 0:
-			pcr |=
-			    SET_VCC_VPP(VCC_3V, VPP_GND, configure->sock);
-			DEBUG(3, "Vcc 3V Vpp 0V, pcr %x\n", pcr);
+	DEBUG(KERN_INFO "Vcc %dV Vpp %dV, pcr %x\n", 
+			configure->vcc, configure->vpp, pcr);
+	switch(configure->vcc){
+		case 0:  /* Vcc 0 */
+			switch(configure->vpp) {
+				case 0:
+					pcr |= SET_VCC_VPP(VCC_HIZ,VPP_GND,
+							configure->sock);
+					break;
+				case 12:
+					pcr |= SET_VCC_VPP(VCC_HIZ,VPP_12V,
+							configure->sock);
+					break;
+				case 50:
+					pcr |= SET_VCC_VPP(VCC_HIZ,VPP_5V,
+							configure->sock);
+					break;
+				case 33:
+					pcr |= SET_VCC_VPP(VCC_HIZ,VPP_3V,
+							configure->sock);
+					break;
+				default:
+					pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,
+							configure->sock);
+					printk("%s: bad Vcc/Vpp (%d:%d)\n", 
+							__FUNCTION__, 
+							configure->vcc, 
+							configure->vpp);
+					break;
+			}
 			break;
-		case 50:
-			pcr |=
-			    SET_VCC_VPP(VCC_3V, VPP_5V, configure->sock);
-			DEBUG(3, "Vcc 3V Vpp 5V, pcr %x\n", pcr);
+		case 50: /* Vcc 5V */
+			switch(configure->vpp) {
+				case 0:
+					pcr |= SET_VCC_VPP(VCC_5V,VPP_GND,
+							configure->sock);
+					break;
+				case 50:
+					pcr |= SET_VCC_VPP(VCC_5V,VPP_5V,
+							configure->sock);
+					break;
+				case 12:
+					pcr |= SET_VCC_VPP(VCC_5V,VPP_12V,
+							configure->sock);
+					break;
+				case 33:
+					pcr |= SET_VCC_VPP(VCC_5V,VPP_3V,
+							configure->sock);
+					break;
+				default:
+					pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,
+							configure->sock);
+					printk("%s: bad Vcc/Vpp (%d:%d)\n", 
+							__FUNCTION__, 
+							configure->vcc, 
+							configure->vpp);
+					break;
+			}
 			break;
-		case 12:
-			pcr |=
-			    SET_VCC_VPP(VCC_3V, VPP_12V, configure->sock);
-			DEBUG(3, "Vcc 3V Vpp 12V, pcr %x\n", pcr);
+		case 33: /* Vcc 3.3V */
+			switch(configure->vpp) {
+				case 0:
+					pcr |= SET_VCC_VPP(VCC_3V,VPP_GND,
+							configure->sock);
+					break;
+				case 50:
+					pcr |= SET_VCC_VPP(VCC_3V,VPP_5V,
+							configure->sock);
+					break;
+				case 12:
+					pcr |= SET_VCC_VPP(VCC_3V,VPP_12V,
+							configure->sock);
+					break;
+				case 33:
+					pcr |= SET_VCC_VPP(VCC_3V,VPP_3V,
+							configure->sock);
+					break;
+				default:
+					pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,
+							configure->sock);
+					printk("%s: bad Vcc/Vpp (%d:%d)\n", 
+							__FUNCTION__, 
+							configure->vcc, 
+							configure->vpp);
+					break;
+			}
 			break;
-		case 33:
-		default:
-			pcr |=
-			    SET_VCC_VPP(VCC_HIZ, VPP_HIZ, configure->sock);
-			printk(KERN_ERR "%s: bad Vcc/Vpp combo (%d:%d)\n",
-			       __FUNCTION__, configure->vcc,
-			       configure->vpp);
+		default: /* what's this ? */
+			pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,configure->sock);
+			printk(KERN_ERR "%s: bad Vcc %d\n", 
+					__FUNCTION__, configure->vcc);
 			break;
-		}
-		break;
-	default:		/* what's this ? */
-		pcr |= SET_VCC_VPP(VCC_HIZ, VPP_HIZ, configure->sock);
-		printk(KERN_ERR "%s: bad Vcc %d\n", __FUNCTION__,
-		       configure->vcc);
-		break;
 	}
 
 	writew(pcr, AU1000_PCR);
-	mdelay(400);
+	au_sync_delay(300);
 
-	pcr &= ~PCR_SLOT_0_RST;
+	writew(pcr | PCR_SLOT_0_RST, AU1000_PCR);
+	au_sync_delay(100);
+	
+	pcr &= ~(PCR_SLOT_0_RST);
 	if (configure->reset) {
 		pcr |= PCR_SLOT_0_RST;
 	}
 	writew(pcr, AU1000_PCR);
-	mdelay(200);
+	au_sync_delay(100);
 	return 0;
 }
 
-struct pcmcia_low_level pb1000_pcmcia_ops = {
+struct pcmcia_low_level pb1000_pcmcia_ops = { 
 	pb1000_pcmcia_init,
 	pb1000_pcmcia_shutdown,
 	pb1000_pcmcia_socket_state,
 	pb1000_pcmcia_get_irq_info,
 	pb1000_pcmcia_configure_socket
 };
+

[Linux-mips-commits]CVS: linux/arch/mips64/kernel r4k_genex.S,NONE,1.1 r4k_tlb_glue.S,1.1,1.2

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips64/kernel
In directory usw-pr-cvs1:/tmp/cvs-serv26595

Modified Files:
	r4k_tlb_glue.S 
Added Files:
	r4k_genex.S 
Log Message:
Remove debug code.

--- NEW FILE: r4k_genex.S ---
/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1994 - 1999 by Ralf Baechle
 * Copyright (C) 1999 Silicon Graphics
 *
 * Low level exception handling
 */
#define __ASSEMBLY__
#include <linux/init.h>
#include <asm/asm.h>
#include <asm/regdef.h>
#include <asm/fpregdef.h>
#include <asm/mipsregs.h>
#include <asm/stackframe.h>
#include <asm/r4kcacheops.h>

	.macro	__build_clear_none
	.endm

	.macro	__build_clear_sti
	STI
	.endm

	.macro	__build_clear_cli
	CLI
	.endm

	.macro	__build_clear_fpe
	cfc1	a1, fcr31
	li	a2, ~(0x3f << 13)
	and	a2, a1
	ctc1	a2, fcr31
	STI
	.endm

	.macro	__build_clear_ade
	dmfc0	t0, CP0_BADVADDR
	sd	t0, PT_BVADDR(sp)
	KMODE
	.endm

	.macro	__BUILD_silent exception
	.endm

	/* Gas tries to parse the PRINT argument as a string containing
	   string escapes and emits bogus warnings if it believes to
	   recognize an unknown escape code.  So make the arguments
	   start with an n and gas will believe \n is ok ...  */
	.macro	__BUILD_verbose	nexception
	ld	a1, PT_EPC(sp)
	PRINT("Got \nexception at %016lx\012")
	.endm

	.macro	__BUILD_count exception
	.set	reorder
	ld	t0,exception_count_\exception
	daddiu	t0, 1
	sd	t0,exception_count_\exception
	.set	noreorder
	.comm	exception_count\exception, 8, 8
	.endm

	.macro	BUILD_HANDLER exception handler clear verbose
	.align	5
	NESTED(handle_\exception, PT_SIZE, sp)
	.set	noat
	SAVE_ALL
	__BUILD_clear_\clear
	.set	at
	__BUILD_\verbose \exception
	move	a0, sp
	jal	do_\handler
	j	ret_from_sys_call
	 nop
	END(handle_\exception)
	.endm

	BUILD_HANDLER adel ade ade silent		/* #4  */
	BUILD_HANDLER ades ade ade silent		/* #5  */
	BUILD_HANDLER ibe ibe cli silent		/* #6  */
	BUILD_HANDLER dbe dbe cli silent		/* #7  */
	BUILD_HANDLER bp bp sti silent			/* #9  */
	BUILD_HANDLER ri ri sti silent			/* #10 */
	BUILD_HANDLER cpu cpu sti silent		/* #11 */
	BUILD_HANDLER ov ov sti silent			/* #12 */
	BUILD_HANDLER tr tr sti silent			/* #13 */
	BUILD_HANDLER fpe fpe fpe silent		/* #15 */
	BUILD_HANDLER watch watch sti verbose		/* #23 */
	BUILD_HANDLER reserved reserved sti verbose	/* others */

	__INIT

/* General exception handler for CPUs with virtual coherency exception.
 *
 * Be careful when changing this, it has to be at most 128 bytes to fit
 * into space reserved for the exception handler.
 */
	NESTED(except_vec3_r4000, 0, sp)
	.set	noat
	mfc0	k1, CP0_CAUSE
	andi	k1, k1, 0x7c
	li	k0, 31<<2
	beq	k1, k0, handle_vced
	 li	k0, 14<<2
	beq	k1, k0, handle_vcei
	 dsll	k1, k1, 1
	ld	k0, exception_handlers(k1)
	jr	k0

/*
 * Big shit, we now may have two dirty primary cache lines for the same
 * physical address.  We can savely invalidate the line pointed to by
 * c0_badvaddr because after return from this exception handler the load /
 * store will be re-executed.
 */
handle_vced:
	mfc0	k0, CP0_BADVADDR
	li	k1, -4					# Is this ...
	and	k0, k1					# ... really needed?
	mtc0	zero, CP0_TAGLO
	cache	Index_Store_Tag_D,(k0)
	cache	Hit_Writeback_Inv_SD,(k0)
	lui	k0, %hi(vced_count)
	lw	k1, %lo(vced_count)(k0)
	addiu	k1, 1
	sw	k1, %lo(vced_count)(k0)
	eret

handle_vcei:
	mfc0	k0, CP0_BADVADDR
	cache	Hit_Writeback_Inv_SD,(k0)		# also cleans pi
	lui	k0, %hi(vcei_count)
	lw	k1, %lo(vcei_count)(k0)
	addiu	k1, 1
	sw	k1, %lo(vcei_count)(k0)
	eret

	END(except_vec3_r4000)
	.set	at

	/* General exception vector for all other CPUs. */
	NESTED(except_vec3_generic, 0, sp)
	.set	noat
	mfc0	k1, CP0_CAUSE
	andi	k1, k1, 0x7c
	dsll	k1, k1, 1
	ld	k0, exception_handlers(k1)
	jr	k0
	 nop
	END(except_vec3_generic)
	.set	at

/*
 * Special interrupt vector for embedded MIPS.  This is a dedicated interrupt
 * vector which reduces interrupt processing overhead.  The jump instruction
 * will be inserted here at initialization time.  This handler may only be 8
 * bytes in size!
 */
NESTED(except_vec4, 0, sp)
1:	j	1b			/* Dummy, will be replaced */
	 nop
	END(except_vec4)

	__FINIT

Index: r4k_tlb_glue.S
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/kernel/r4k_tlb_glue.S,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- r4k_tlb_glue.S	2001/09/06 16:14:36	1.1
+++ r4k_tlb_glue.S	2001/10/03 21:53:33	1.2
@@ -23,14 +23,6 @@
 	.macro	tlb_handler name interruptible writebit
 	NESTED(__\name, PT_SIZE, sp)
 	SAVE_ALL
-#if DEBUG_MIPS64
-jal dodebug2
-ld $4, PT_R4(sp)
-ld $5, PT_R5(sp)
-ld $6, PT_R6(sp)
-ld $7, PT_R7(sp)
-ld $2, PT_R2(sp)
-#endif
 	dmfc0	a2, CP0_BADVADDR
 	__BUILD_\interruptible
 	li	a1, \writebit

[Linux-mips-commits]CVS: linux/arch/mips/configs defconfig-osprey,1.3,1.4

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips/configs
In directory usw-pr-cvs1:/tmp/cvs-serv23960

Modified Files:
	defconfig-osprey 
Log Message:
Small changes for osprey support.

Index: defconfig-osprey
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-osprey,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- defconfig-osprey	2001/09/29 00:42:25	1.3
+++ defconfig-osprey	2001/10/02 18:40:35	1.4
@@ -18,7 +18,6 @@
 # CONFIG_COBALT_MICRO_SERVER is not set
 # CONFIG_DECSTATION is not set
 # CONFIG_DDB5074 is not set
-CONFIG_NEC_OSPREY=y
 # CONFIG_NEC_EAGLE is not set
 # CONFIG_NEC_KORVA is not set
 # CONFIG_MIPS_EV96100 is not set
@@ -31,6 +30,7 @@
 # CONFIG_MOMENCO_OCELOT is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
+CONFIG_NEC_OSPREY=y
 # CONFIG_OLIVETTI_M700 is not set
 # CONFIG_SGI_IP22 is not set
 # CONFIG_SNI_RM200_PCI is not set
@@ -47,6 +47,7 @@
 CONFIG_SERIAL_MANY_PORTS=y
 CONFIG_NEW_IRQ=y
 CONFIG_IRQ_CPU=y
+CONFIG_NEW_TIME_C=y
 CONFIG_DUMMY_KEYB=y
 # CONFIG_SCSI is not set
 # CONFIG_ISA is not set

[Linux-mips-commits]CVS: linux/arch/mips/configs defconfig-atlas,1.5,1.6 defconfig-ddb5476,1.7,1.8 defconfig-ddb5477,1.7,1.8 defconfig-decstation,1.6,1.7 defconfig-ev64120,1.5,1.6 defconfig-ev96100,1.6,1.7 defconfig-ip22,1.6,1.7 defconfig-it8172,1.7,1.8 defconfig-malta,1.5,1.6 defconfig-nino,1.6,1.7 defconfig-ocelot,1.5,1.6 defconfig-pb1000,1.7,1.8

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips/configs
In directory usw-pr-cvs1:/tmp/cvs-serv22595/arch/mips/configs

Modified Files:
	defconfig-atlas defconfig-ddb5476 defconfig-ddb5477 
	defconfig-decstation defconfig-ev64120 defconfig-ev96100 
	defconfig-ip22 defconfig-it8172 defconfig-malta defconfig-nino 
	defconfig-ocelot defconfig-pb1000 
Log Message:
Synced to Ralph's tree for Osprey support.

Index: defconfig-atlas
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-atlas,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -d -r1.5 -r1.6
--- defconfig-atlas	2001/09/15 17:06:10	1.5
+++ defconfig-atlas	2001/10/02 18:35:48	1.6
@@ -18,7 +18,6 @@
 # CONFIG_COBALT_MICRO_SERVER is not set
 # CONFIG_DECSTATION is not set
 # CONFIG_DDB5074 is not set
-# CONFIG_NEC_OSPREY is not set
 # CONFIG_NEC_EAGLE is not set
 # CONFIG_NEC_KORVA is not set
 # CONFIG_MIPS_EV96100 is not set
@@ -31,6 +30,7 @@
 # CONFIG_MOMENCO_OCELOT is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
 # CONFIG_OLIVETTI_M700 is not set
 # CONFIG_SGI_IP22 is not set
 # CONFIG_SNI_RM200_PCI is not set

Index: defconfig-ddb5476
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-ddb5476,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- defconfig-ddb5476	2001/09/15 17:06:10	1.7
+++ defconfig-ddb5476	2001/10/02 18:35:48	1.8
@@ -18,7 +18,6 @@
 # CONFIG_COBALT_MICRO_SERVER is not set
 # CONFIG_DECSTATION is not set
 # CONFIG_DDB5074 is not set
-# CONFIG_NEC_OSPREY is not set
 # CONFIG_NEC_EAGLE is not set
 # CONFIG_NEC_KORVA is not set
 # CONFIG_MIPS_EV96100 is not set
@@ -31,6 +30,7 @@
 # CONFIG_MOMENCO_OCELOT is not set
 CONFIG_DDB5476=y
 # CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
 # CONFIG_OLIVETTI_M700 is not set
 # CONFIG_SGI_IP22 is not set
 # CONFIG_SNI_RM200_PCI is not set
@@ -229,6 +229,7 @@
 CONFIG_BLK_DEV_IDEPCI=y
 # CONFIG_IDEPCI_SHARE_IRQ is not set
 # CONFIG_BLK_DEV_IDEDMA_PCI is not set
+# CONFIG_BLK_DEV_ADMA is not set
 # CONFIG_BLK_DEV_OFFBOARD is not set
 # CONFIG_IDEDMA_PCI_AUTO is not set
 # CONFIG_BLK_DEV_IDEDMA is not set
@@ -238,8 +239,8 @@
 # CONFIG_AEC62XX_TUNING is not set
 # CONFIG_BLK_DEV_ALI15X3 is not set
 # CONFIG_WDC_ALI15X3 is not set
-# CONFIG_BLK_DEV_AMD7409 is not set
-# CONFIG_AMD7409_OVERRIDE is not set
+# CONFIG_BLK_DEV_AMD74XX is not set
+# CONFIG_AMD74XX_OVERRIDE is not set
 # CONFIG_BLK_DEV_CMD64X is not set
 # CONFIG_BLK_DEV_CY82C693 is not set
 # CONFIG_BLK_DEV_CS5530 is not set
@@ -250,6 +251,8 @@
 # CONFIG_BLK_DEV_OPTI621 is not set
 # CONFIG_BLK_DEV_PDC202XX is not set
 # CONFIG_PDC202XX_BURST is not set
+# CONFIG_PDC202XX_FORCE is not set
+# CONFIG_BLK_DEV_SVWKS is not set
 # CONFIG_BLK_DEV_OSB4 is not set
 # CONFIG_BLK_DEV_SIS5513 is not set
 # CONFIG_BLK_DEV_SLC90E66 is not set
@@ -544,16 +547,16 @@
 # CONFIG_FB_CLGEN is not set
 # CONFIG_FB_PM2 is not set
 # CONFIG_FB_CYBER2000 is not set
-# CONFIG_FB_E1355 is not set
 # CONFIG_FB_PVR2 is not set
 # CONFIG_FB_PVR2_DEBUG is not set
+# CONFIG_FB_E1355 is not set
+# CONFIG_FB_E1356 is not set
 # CONFIG_FB_MQ200 is not set
 # CONFIG_FB_MATROX is not set
 # CONFIG_FB_ATY is not set
 # CONFIG_FB_ATY128 is not set
 CONFIG_FB_3DFX=y
 # CONFIG_FB_SIS is not set
-# CONFIG_FB_E1356 is not set
 # CONFIG_FB_VIRTUAL is not set
 # CONFIG_FBCON_ADVANCED is not set
 CONFIG_FBCON_CFB8=y

Index: defconfig-ddb5477
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-ddb5477,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- defconfig-ddb5477	2001/09/26 23:15:06	1.7
+++ defconfig-ddb5477	2001/10/02 18:35:48	1.8
@@ -18,7 +18,6 @@
 # CONFIG_COBALT_MICRO_SERVER is not set
 # CONFIG_DECSTATION is not set
 # CONFIG_DDB5074 is not set
-# CONFIG_NEC_OSPREY is not set
 # CONFIG_NEC_EAGLE is not set
 # CONFIG_NEC_KORVA is not set
 # CONFIG_MIPS_EV96100 is not set
@@ -31,6 +30,7 @@
 # CONFIG_MOMENCO_OCELOT is not set
 # CONFIG_DDB5476 is not set
 CONFIG_DDB5477=y
+# CONFIG_NEC_OSPREY is not set
 # CONFIG_OLIVETTI_M700 is not set
 # CONFIG_SGI_IP22 is not set
 # CONFIG_SNI_RM200_PCI is not set

Index: defconfig-decstation
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-decstation,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -d -r1.6 -r1.7
--- defconfig-decstation	2001/09/15 17:06:10	1.6
+++ defconfig-decstation	2001/10/02 18:35:48	1.7
@@ -18,7 +18,6 @@
 # CONFIG_COBALT_MICRO_SERVER is not set
 CONFIG_DECSTATION=y
 # CONFIG_DDB5074 is not set
-# CONFIG_NEC_OSPREY is not set
 # CONFIG_NEC_EAGLE is not set
 # CONFIG_NEC_KORVA is not set
 # CONFIG_MIPS_EV96100 is not set
@@ -31,6 +30,7 @@
 # CONFIG_MOMENCO_OCELOT is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
 # CONFIG_OLIVETTI_M700 is not set
 # CONFIG_SGI_IP22 is not set
 # CONFIG_SNI_RM200_PCI is not set

Index: defconfig-ev64120
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-ev64120,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -d -r1.5 -r1.6
--- defconfig-ev64120	2001/09/15 17:06:10	1.5
+++ defconfig-ev64120	2001/10/02 18:35:48	1.6
@@ -18,7 +18,6 @@
 # CONFIG_COBALT_MICRO_SERVER is not set
 # CONFIG_DECSTATION is not set
 # CONFIG_DDB5074 is not set
-# CONFIG_NEC_OSPREY is not set
 # CONFIG_NEC_EAGLE is not set
 # CONFIG_NEC_KORVA is not set
 # CONFIG_MIPS_EV96100 is not set
@@ -35,6 +34,7 @@
 # CONFIG_MOMENCO_OCELOT is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
 # CONFIG_OLIVETTI_M700 is not set
 # CONFIG_SGI_IP22 is not set
 # CONFIG_SNI_RM200_PCI is not set

Index: defconfig-ev96100
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-ev96100,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -d -r1.6 -r1.7
--- defconfig-ev96100	2001/09/15 17:06:10	1.6
+++ defconfig-ev96100	2001/10/02 18:35:48	1.7
@@ -18,7 +18,6 @@
 # CONFIG_COBALT_MICRO_SERVER is not set
 # CONFIG_DECSTATION is not set
 # CONFIG_DDB5074 is not set
-# CONFIG_NEC_OSPREY is not set
 # CONFIG_NEC_EAGLE is not set
 # CONFIG_NEC_KORVA is not set
 CONFIG_MIPS_EV96100=y
@@ -31,6 +30,7 @@
 # CONFIG_MOMENCO_OCELOT is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
 # CONFIG_OLIVETTI_M700 is not set
 # CONFIG_SGI_IP22 is not set
 # CONFIG_SNI_RM200_PCI is not set

Index: defconfig-ip22
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-ip22,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -d -r1.6 -r1.7
--- defconfig-ip22	2001/09/15 17:06:10	1.6
+++ defconfig-ip22	2001/10/02 18:35:48	1.7
@@ -18,7 +18,6 @@
 # CONFIG_COBALT_MICRO_SERVER is not set
 # CONFIG_DECSTATION is not set
 # CONFIG_DDB5074 is not set
-# CONFIG_NEC_OSPREY is not set
 # CONFIG_NEC_EAGLE is not set
 # CONFIG_NEC_KORVA is not set
 # CONFIG_MIPS_EV96100 is not set
@@ -31,6 +30,7 @@
 # CONFIG_MOMENCO_OCELOT is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
 # CONFIG_OLIVETTI_M700 is not set
 CONFIG_SGI_IP22=y
 # CONFIG_SNI_RM200_PCI is not set

Index: defconfig-it8172
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-it8172,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- defconfig-it8172	2001/09/15 17:06:10	1.7
+++ defconfig-it8172	2001/10/02 18:35:48	1.8
@@ -18,7 +18,6 @@
 # CONFIG_COBALT_MICRO_SERVER is not set
 # CONFIG_DECSTATION is not set
 # CONFIG_DDB5074 is not set
-# CONFIG_NEC_OSPREY is not set
 # CONFIG_NEC_EAGLE is not set
 # CONFIG_NEC_KORVA is not set
 # CONFIG_MIPS_EV96100 is not set
@@ -31,6 +30,7 @@
 # CONFIG_MOMENCO_OCELOT is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
 # CONFIG_OLIVETTI_M700 is not set
 # CONFIG_SGI_IP22 is not set
 # CONFIG_SNI_RM200_PCI is not set
@@ -300,6 +300,7 @@
 CONFIG_BLK_DEV_IDEPCI=y
 CONFIG_IDEPCI_SHARE_IRQ=y
 CONFIG_BLK_DEV_IDEDMA_PCI=y
+CONFIG_BLK_DEV_ADMA=y
 # CONFIG_BLK_DEV_OFFBOARD is not set
 CONFIG_IDEDMA_PCI_AUTO=y
 CONFIG_BLK_DEV_IDEDMA=y
@@ -309,8 +310,8 @@
 # CONFIG_AEC62XX_TUNING is not set
 # CONFIG_BLK_DEV_ALI15X3 is not set
 # CONFIG_WDC_ALI15X3 is not set
-# CONFIG_BLK_DEV_AMD7409 is not set
-# CONFIG_AMD7409_OVERRIDE is not set
+# CONFIG_BLK_DEV_AMD74XX is not set
+# CONFIG_AMD74XX_OVERRIDE is not set
 # CONFIG_BLK_DEV_CMD64X is not set
 # CONFIG_BLK_DEV_CY82C693 is not set
 # CONFIG_BLK_DEV_CS5530 is not set
@@ -323,6 +324,8 @@
 # CONFIG_BLK_DEV_OPTI621 is not set
 # CONFIG_BLK_DEV_PDC202XX is not set
 # CONFIG_PDC202XX_BURST is not set
+# CONFIG_PDC202XX_FORCE is not set
+# CONFIG_BLK_DEV_SVWKS is not set
 # CONFIG_BLK_DEV_OSB4 is not set
 # CONFIG_BLK_DEV_SIS5513 is not set
 # CONFIG_BLK_DEV_SLC90E66 is not set

Index: defconfig-malta
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-malta,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -d -r1.5 -r1.6
--- defconfig-malta	2001/09/15 17:06:10	1.5
+++ defconfig-malta	2001/10/02 18:35:48	1.6
@@ -18,7 +18,6 @@
 # CONFIG_COBALT_MICRO_SERVER is not set
 # CONFIG_DECSTATION is not set
 # CONFIG_DDB5074 is not set
-# CONFIG_NEC_OSPREY is not set
 # CONFIG_NEC_EAGLE is not set
 # CONFIG_NEC_KORVA is not set
 # CONFIG_MIPS_EV96100 is not set
@@ -31,6 +30,7 @@
 # CONFIG_MOMENCO_OCELOT is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
 # CONFIG_OLIVETTI_M700 is not set
 # CONFIG_SGI_IP22 is not set
 # CONFIG_SNI_RM200_PCI is not set

Index: defconfig-nino
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-nino,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -d -r1.6 -r1.7
--- defconfig-nino	2001/09/15 20:19:08	1.6
+++ defconfig-nino	2001/10/02 18:35:48	1.7
@@ -18,7 +18,6 @@
 # CONFIG_COBALT_MICRO_SERVER is not set
 # CONFIG_DECSTATION is not set
 # CONFIG_DDB5074 is not set
-# CONFIG_NEC_OSPREY is not set
 # CONFIG_NEC_EAGLE is not set
 # CONFIG_NEC_KORVA is not set
 # CONFIG_MIPS_EV96100 is not set
@@ -34,6 +33,7 @@
 # CONFIG_MOMENCO_OCELOT is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
 # CONFIG_OLIVETTI_M700 is not set
 # CONFIG_SGI_IP22 is not set
 # CONFIG_SNI_RM200_PCI is not set
@@ -118,7 +118,7 @@
 # CONFIG_BLK_DEV_NBD is not set
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=2048
-# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_BLK_DEV_INITRD=y
 
 #
 # Multi-device support (RAID and LVM)

Index: defconfig-ocelot
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-ocelot,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -d -r1.5 -r1.6
--- defconfig-ocelot	2001/09/15 17:06:10	1.5
+++ defconfig-ocelot	2001/10/02 18:35:48	1.6
@@ -18,7 +18,6 @@
 # CONFIG_COBALT_MICRO_SERVER is not set
 # CONFIG_DECSTATION is not set
 # CONFIG_DDB5074 is not set
-# CONFIG_NEC_OSPREY is not set
 # CONFIG_NEC_EAGLE is not set
 # CONFIG_NEC_KORVA is not set
 # CONFIG_MIPS_EV96100 is not set
@@ -31,6 +30,7 @@
 CONFIG_MOMENCO_OCELOT=y
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
 # CONFIG_OLIVETTI_M700 is not set
 # CONFIG_SGI_IP22 is not set
 # CONFIG_SNI_RM200_PCI is not set

Index: defconfig-pb1000
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-pb1000,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- defconfig-pb1000	2001/09/24 18:52:33	1.7
+++ defconfig-pb1000	2001/10/02 18:35:48	1.8
@@ -18,7 +18,6 @@
 # CONFIG_COBALT_MICRO_SERVER is not set
 # CONFIG_DECSTATION is not set
 # CONFIG_DDB5074 is not set
-# CONFIG_NEC_OSPREY is not set
 # CONFIG_NEC_EAGLE is not set
 # CONFIG_NEC_KORVA is not set
 # CONFIG_MIPS_EV96100 is not set
@@ -31,6 +30,7 @@
 # CONFIG_MOMENCO_OCELOT is not set
 # CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
 # CONFIG_OLIVETTI_M700 is not set
 # CONFIG_SGI_IP22 is not set
 # CONFIG_SNI_RM200_PCI is not set
@@ -514,8 +514,10 @@
 # Sound
 #
 CONFIG_SOUND=y
+# CONFIG_SOUND_BT878 is not set
 # CONFIG_SOUND_CMPCI is not set
 # CONFIG_SOUND_EMU10K1 is not set
+# CONFIG_MIDI_EMU10K1 is not set
 # CONFIG_SOUND_FUSION is not set
 # CONFIG_SOUND_CS4281 is not set
 # CONFIG_SOUND_ES1370 is not set
@@ -524,6 +526,7 @@
 # CONFIG_SOUND_MAESTRO is not set
 # CONFIG_SOUND_MAESTRO3 is not set
 # CONFIG_SOUND_ICH is not set
+# CONFIG_SOUND_RME96XX is not set
 # CONFIG_SOUND_SONICVIBES is not set
 CONFIG_SOUND_AU1000=y
 # CONFIG_SOUND_TRIDENT is not set

[Linux-mips-commits]CVS: linux/arch/mips/kernel setup.c,1.16,1.17

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips/kernel
In directory usw-pr-cvs1:/tmp/cvs-serv22595/arch/mips/kernel

Modified Files:
	setup.c 
Log Message:
Synced to Ralph's tree for Osprey support.

Index: setup.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/setup.c,v
retrieving revision 1.16
retrieving revision 1.17
diff -u -d -r1.16 -r1.17
--- setup.c	2001/09/17 16:45:46	1.16
+++ setup.c	2001/10/02 18:35:48	1.17
@@ -526,7 +526,7 @@
 	void atlas_setup(void);
 	void baget_setup(void);
 	void ddb_setup(void);
-	void cobalt_setup(void);
+	void cobalt_setup(void);	
 	void decstation_setup(void);
 	void deskstation_setup(void);
 	void jazz_setup(void);

[Linux-mips-commits]CVS: linux/drivers/net Config.in,1.10,1.11

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/drivers/net
In directory usw-pr-cvs1:/tmp/cvs-serv22595/drivers/net

Modified Files:
	Config.in 
Log Message:
Synced to Ralph's tree for Osprey support.

Index: Config.in
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/net/Config.in,v
retrieving revision 1.10
retrieving revision 1.11
diff -u -d -r1.10 -r1.11
--- Config.in	2001/09/29 00:42:25	1.10
+++ Config.in	2001/10/02 18:35:48	1.11
@@ -202,15 +202,15 @@
    fi
    if [ "$CONFIG_DECSTATION" = "y" ]; then
       bool '  DEC LANCE ethernet controller support' CONFIG_DECLANCE
-   fi 
+   fi
+   if [ "$CONFIG_BAGET_MIPS" = "y" ]; then
+      tristate '  Baget AMD LANCE support' CONFIG_BAGETLANCE
+   fi
    if [ "$CONFIG_NEC_OSPREY" = "y" ]; then
       bool '  Memory-mapped onboard NE2000-compatible ethernet' CONFIG_NE2000
-   fi	
+   fi
    if [ "$CONFIG_NEC_KORVA" = "y" ]; then
       bool '  NEC Memory-mapped onboard (Candy) Ethernet' CONFIG_NEC_CANDY
-   fi	
-   if [ "$CONFIG_BAGET_MIPS" = "y" ]; then
-      tristate '  Baget AMD LANCE support' CONFIG_BAGETLANCE
    fi
 fi