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From: James S. <jsi...@us...> - 2002-02-19 17:25:27
|
Update of /cvsroot/linux-mips/linux/include/asm-mips
In directory usw-pr-cvs1:/tmp/cvs-serv29634/asm-mips
Modified Files:
mipsregs.h
Log Message:
Add pagemask and shift values for 64mb and 256mb pages. For mips64 implement get_xcontext() and set_xcontext() to access c0_xcontext. For mips32 remove pointless comment.
Index: mipsregs.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips/mipsregs.h,v
retrieving revision 1.17
retrieving revision 1.18
diff -u -d -r1.17 -r1.18
--- mipsregs.h 12 Feb 2002 18:02:20 -0000 1.17
+++ mipsregs.h 19 Feb 2002 17:25:24 -0000 1.18
@@ -149,34 +149,40 @@
#include <linux/config.h>
#ifdef CONFIG_CPU_VR41XX
-#define PM_1K 0x00000000
-#define PM_4K 0x00001800
-#define PM_16K 0x00007800
-#define PM_64K 0x0001f800
-#define PM_256K 0x0007f800
+/* Why doesn't stupidity hurt ... */
+
+#define PM_1K 0x00000000
+#define PM_4K 0x00001800
+#define PM_16K 0x00007800
+#define PM_64K 0x0001f800
+#define PM_256K 0x0007f800
#else
-#define PM_4K 0x00000000
-#define PM_16K 0x00006000
-#define PM_64K 0x0001e000
-#define PM_256K 0x0007e000
-#define PM_1M 0x001fe000
-#define PM_4M 0x007fe000
-#define PM_16M 0x01ffe000
+#define PM_4K 0x00000000
+#define PM_16K 0x00006000
+#define PM_64K 0x0001e000
+#define PM_256K 0x0007e000
+#define PM_1M 0x001fe000
+#define PM_4M 0x007fe000
+#define PM_16M 0x01ffe000
+#define PM_64M 0x07ffe000
+#define PM_256M 0x1fffe000
#endif
/*
* Values used for computation of new tlb entries
*/
-#define PL_4K 12
-#define PL_16K 14
-#define PL_64K 16
-#define PL_256K 18
-#define PL_1M 20
-#define PL_4M 22
-#define PL_16M 24
+#define PL_4K 12
+#define PL_16K 14
+#define PL_64K 16
+#define PL_256K 18
+#define PL_1M 20
+#define PL_4M 22
+#define PL_16M 24
+#define PL_64M 26
+#define PL_256M 28
/*
* R4x00 interrupt enable / cause bits
@@ -870,7 +876,6 @@
: : "Jr" (val));
}
-/* CP0_CONTEXT register */
static inline unsigned long get_context(void)
{
unsigned long val;
|
|
From: James S. <jsi...@us...> - 2002-02-19 17:19:41
|
Update of /cvsroot/linux-mips/linux/drivers/sound
In directory usw-pr-cvs1:/tmp/cvs-serv26596
Modified Files:
hal2.c hal2.h
Log Message:
HAL2 driver FIFO fixes.
Index: hal2.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/sound/hal2.c,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- hal2.c 14 Feb 2002 20:36:20 -0000 1.3
+++ hal2.c 19 Feb 2002 17:19:38 -0000 1.4
@@ -413,10 +413,10 @@
sample_size = 2 * hal2->adc.voices;
- highwater = (sample_size * 2) >> 1; /* halfwords */
- fifobeg = (4 * 4) >> 3; /* record is second */
- fifoend = (sample_size * 4) >> 3; /* doublewords */
- pbus->ctrl = HPC3_PDMACTRL_RT | HPC3_PDMACTRL_RCV | HPC3_PDMACTRL_LD |
+ highwater = (sample_size * 2) >> 1; /* halfwords */
+ fifobeg = (4 * 4) >> 3; /* record is second */
+ fifoend = (4 * 4 + sample_size * 4) >> 3; /* doublewords */
+ pbus->ctrl = HPC3_PDMACTRL_RT | HPC3_PDMACTRL_RCV | HPC3_PDMACTRL_LD |
(highwater << 8) | (fifobeg << 16) | (fifoend << 24);
pbus->pbus->pbdma_ctrl = HPC3_PDMACTRL_LD;
hal2_i_clearbit16(hal2, H2I_DMA_PORT_EN, H2I_DMA_PORT_EN_CODECR);
@@ -427,7 +427,6 @@
hal2_i_write16(hal2, H2I_ADC_C1, (pbus->pbusnr << H2I_C1_DMA_SHIFT)
| (2 << H2I_C1_CLKID_SHIFT)
| (hal2->adc.voices << H2I_C1_DATAT_SHIFT));
-
}
static void hal2_start_dac(hal2_card_t *hal2)
@@ -489,16 +488,18 @@
#define hal2_alloc_adc_dmabuf(hal2) hal2_alloc_dmabuf(hal2, 0)
static int hal2_alloc_dmabuf(hal2_card_t *hal2, int is_dac)
{
- int buffers;
+ int buffers, cntinfo;
hal2_buf_t *buf, *prev;
hal2_codec_t *codec;
if (is_dac) {
codec = &hal2->dac;
buffers = obuffers;
+ cntinfo = HPCDMA_XIE | HPCDMA_EOX;
} else {
codec = &hal2->adc;
buffers = ibuffers;
+ cntinfo = HPCDMA_XIE | H2_BUFFER_SIZE;
}
DEBUG("allocating %d DMA buffers.\n", buffers);
@@ -511,8 +512,7 @@
while (--buffers) {
buf->info.desc.pbuf = PHYSADDR(&buf->data);
- buf->info.desc.cntinfo = HPCDMA_XIE | (is_dac) ?
- HPCDMA_EOX : H2_BUFFER_SIZE;
+ buf->info.desc.cntinfo = cntinfo;
buf->info.cnt = 0;
prev = buf;
buf = (hal2_buf_t*) get_zeroed_page(GFP_KERNEL);
@@ -534,8 +534,7 @@
dma_cache_wback_inv((unsigned long) prev, PAGE_SIZE);
}
buf->info.desc.pbuf = PHYSADDR(&buf->data);
- buf->info.desc.cntinfo = HPCDMA_XIE | (is_dac) ?
- HPCDMA_EOX : H2_BUFFER_SIZE;
+ buf->info.desc.cntinfo = cntinfo;
buf->info.cnt = 0;
buf->info.next = codec->head;
buf->info.desc.pnext = PHYSADDR(codec->head);
Index: hal2.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/sound/hal2.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- hal2.h 14 Feb 2002 20:36:20 -0000 1.2
+++ hal2.h 19 Feb 2002 17:19:38 -0000 1.3
@@ -178,47 +178,25 @@
#define H2I_SYNTH_MAP_C 0x1104 /* synth dma handshake ctrl */
-/* Clock generator 1 CTL 1, 16 bit */
-
-#define H2I_BRES1_C1 0x2104
-#define H2I_BRES1_C1_SHIFT 0 /* 0=48.0 1=44.1 2=aes_rx */
-#define H2I_BRES1_C1_M 0x03
-
-/* Clock generator 1 CTL 2, 32 bit */
-
-#define H2I_BRES1_C2 0x2108
-#define H2I_BRES1_C2_INC_SHIFT 0 /* increment value */
-#define H2I_BRES1_C2_INC_M 0xffff
-#define H2I_BRES1_C2_MOD_SHIFT 16 /* modcontrol value */
-#define H2I_BRES1_C2_MOD_M 0xffff0000 /* modctrl=0xffff&(modinc-1) */
+/* Clock generator CTL 1, 16 bit */
-/* Clock generator 2 CTL 1, 16 bit */
+#define H2I_BRES1_C1 0x2104
+#define H2I_BRES2_C1 0x2204
+#define H2I_BRES3_C1 0x2304
-#define H2I_BRES2_C1 0x2204
-#define H2I_BRES2_C1_SHIFT 0 /* 0=48.0 1=44.1 2=aes_rx */
-#define H2I_BRES2_C1_M 0x03
+#define H2I_BRES_C1_SHIFT 0 /* 0=48.0 1=44.1 2=aes_rx */
+#define H2I_BRES_C1_M 0x03
-/* Clock generator 2 CTL 2, 32 bit */
+/* Clock generator CTL 2, 32 bit */
+#define H2I_BRES1_C2 0x2108
#define H2I_BRES2_C2 0x2208
-#define H2I_BRES2_C2_INC_SHIFT 0 /* increment value */
-#define H2I_BRES2_C2_INC_M 0xffff
-#define H2I_BRES2_C2_MOD_SHIFT 16 /* modcontrol value */
-#define H2I_BRES2_C2_MOD_M 0xffff0000 /* modctrl=0xffff&(modinc-1) */
-
-/* Clock generator 3 CTL 1, 16 bit */
-
-#define H2I_BRES3_C1 0x2304
-#define H2I_BRES3_C1_SHIFT 0 /* 0=48.0 1=44.1 2=aes_rx */
-#define H2I_BRES3_C1_M 0x03
-
-/* Clock generator 3 CTL 2, 32 bit */
-
#define H2I_BRES3_C2 0x2308
-#define H2I_BRES3_C2_INC_SHIFT 0 /* increment value */
-#define H2I_BRES3_C2_INC_M 0xffff
-#define H2I_BRES3_C2_MOD_SHIFT 16 /* modcontrol value */
-#define H2I_BRES3_C2_MOD_M 0xffff0000 /* modctrl=0xffff&(modinc-1) */
+
+#define H2I_BRES_C2_INC_SHIFT 0 /* increment value */
+#define H2I_BRES_C2_INC_M 0xffff
+#define H2I_BRES_C2_MOD_SHIFT 16 /* modcontrol value */
+#define H2I_BRES_C2_MOD_M 0xffff0000 /* modctrl=0xffff&(modinc-1) */
/* Unix timer, 64 bit */
|
|
From: James S. <jsi...@us...> - 2002-02-19 17:17:56
|
Update of /cvsroot/linux-mips/linux/include/asm-mips64 In directory usw-pr-cvs1:/tmp/cvs-serv25806/asm-mips64 Modified Files: bootinfo.h Log Message: Raise CL_SIZE from 80 to 256. Index: bootinfo.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips64/bootinfo.h,v retrieving revision 1.9 retrieving revision 1.10 diff -u -d -r1.9 -r1.10 --- bootinfo.h 12 Feb 2002 18:15:32 -0000 1.9 +++ bootinfo.h 19 Feb 2002 17:17:53 -0000 1.10 @@ -162,7 +162,7 @@ */ #define MACH_NEC_OSPREY 0 /* Osprey eval board */ -#define CL_SIZE 80 +#define CL_SIZE (256) const char *get_system_type(void); |
|
From: James S. <jsi...@us...> - 2002-02-19 17:17:56
|
Update of /cvsroot/linux-mips/linux/include/asm-mips In directory usw-pr-cvs1:/tmp/cvs-serv25806/asm-mips Modified Files: bootinfo.h Log Message: Raise CL_SIZE from 80 to 256. Index: bootinfo.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips/bootinfo.h,v retrieving revision 1.27 retrieving revision 1.28 diff -u -d -r1.27 -r1.28 --- bootinfo.h 15 Feb 2002 19:47:28 -0000 1.27 +++ bootinfo.h 19 Feb 2002 17:17:53 -0000 1.28 @@ -35,7 +35,7 @@ #define MACH_GROUP_ALCHEMY 18 /* Alchemy Semi Eval Boards*/ #define MACH_GROUP_NEC_VR41XX 19 /* NEC Vr41xx based boards/gadgets */ #define MACH_GROUP_HP_LJ 20 /* Hewlett Packard LaserJet */ -#define MACH_GROUP_IDT 21 /* IDT Eval Boards */ +#define MACH_GROUP_IDT 21 /* IDT Eval Boards */ /* * Valid machtype values for group unknown (low order halfword of mips_machtype) @@ -158,25 +158,25 @@ */ #define MACH_PB1000 0 /* Au1000-based eval board */ #define MACH_PB1500 1 /* Au1500-based eval board */ - + /* * Valid machtype for group IDT */ -#define MACH_IDT79S334 0 -#define MACH_IDT79EB355 1 - +#define MACH_IDT79S334 0 +#define MACH_IDT79EB355 1 + /* * Valid machtype for group NEC_VR41XX */ -#define MACH_NEC_OSPREY 0 /* Osprey eval board */ -#define MACH_NEC_EAGLE 1 /* NEC Eagle board */ -#define MACH_NEC_KORVA 2 /* NEC korva board */ -#define MACH_VADEM_CLIO_1000 3 /* Vadem Clio 1000 */ -#define MACH_NEC_MOBILEPRO_780 4 /* NEC MobilePro 780 PDA */ -#define MACH_CASIO_E15 5 /* Casio Cassiopeia E15 */ -#define MACH_CASIO_BE300 6 /* Casio Cassiopeia BE-300 */ +#define MACH_NEC_OSPREY 0 /* Osprey eval board */ +#define MACH_NEC_EAGLE 1 /* NEC Eagle board */ +#define MACH_NEC_KORVA 2 /* NEC korva board */ +#define MACH_VADEM_CLIO_1000 3 /* Vadem Clio 1000 */ +#define MACH_NEC_MOBILEPRO_780 4 /* NEC MobilePro 780 PDA */ +#define MACH_CASIO_E15 5 /* Casio Cassiopeia E15 */ +#define MACH_CASIO_BE300 6 /* Casio Cassiopeia BE-300 */ -#define CL_SIZE 80 +#define CL_SIZE (256) const char *get_system_type(void); |
|
From: Pete P. <pp...@us...> - 2002-02-16 16:55:49
|
Update of /cvsroot/linux-mips/linux/arch/mips/zboot/pb1000 In directory usw-pr-cvs1:/tmp/cvs-serv27309/arch/mips/zboot/pb1000 Modified Files: Makefile Log Message: Added zImage support for the Pb1500. Index: Makefile =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/zboot/pb1000/Makefile,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- Makefile 10 Oct 2001 17:46:56 -0000 1.1 +++ Makefile 16 Feb 2002 16:55:45 -0000 1.2 @@ -60,7 +60,7 @@ all: zImage clean: - rm -rf *.o vmlinux* + rm -rf *.o vmlinux* zvmlinux.* head.o: head.S $(TOPDIR)/vmlinux $(CC) -DFLASH_LOAD_ADDR=$(FLASH_LOAD_ADDR) $(AFLAGS) \ |
|
From: Pete P. <pp...@us...> - 2002-02-16 16:55:49
|
Update of /cvsroot/linux-mips/linux/arch/mips/zboot/lib In directory usw-pr-cvs1:/tmp/cvs-serv27309/arch/mips/zboot/lib Modified Files: zlib.c Log Message: Added zImage support for the Pb1500. Index: zlib.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/zboot/lib/zlib.c,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 |
|
From: Pete P. <pp...@us...> - 2002-02-16 16:55:48
|
Update of /cvsroot/linux-mips/linux/arch/mips/zboot/include In directory usw-pr-cvs1:/tmp/cvs-serv27309/arch/mips/zboot/include Modified Files: ns16550.h zlib.h Log Message: Added zImage support for the Pb1500. Index: ns16550.h =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/zboot/include/ns16550.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- ns16550.h 10 Oct 2001 17:46:56 -0000 1.1 +++ ns16550.h 16 Feb 2002 16:55:45 -0000 1.2 @@ -5,7 +5,7 @@ /* * Figure out which file will have the definitons of COMx */ -#if defined(CONFIG_MIPS_PB1000) +#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1500) #else #error no serial.h #endif Index: zlib.h =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/zboot/include/zlib.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 |
|
From: Pete P. <pp...@us...> - 2002-02-16 16:55:48
|
Update of /cvsroot/linux-mips/linux/arch/mips/zboot In directory usw-pr-cvs1:/tmp/cvs-serv27309/arch/mips/zboot Modified Files: Makefile Log Message: Added zImage support for the Pb1500. Index: Makefile =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/zboot/Makefile,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- Makefile 10 Oct 2001 17:46:56 -0000 1.1 +++ Makefile 16 Feb 2002 16:55:45 -0000 1.2 @@ -42,13 +42,15 @@ ifdef CONFIG_MIPS_PB1000 $(MAKE) -C pb1000 endif +ifdef CONFIG_MIPS_PB1500 + $(MAKE) -C pb1500 +endif # Do the dirs clean: $(MAKE) -C common clean $(MAKE) -C images clean -ifdef CONFIG_MIPS_PB1000 $(MAKE) -C pb1000 clean -endif + $(MAKE) -C pb1500 clean include $(TOPDIR)/Rules.make |
Update of /cvsroot/linux-mips/linux/arch/mips/au1000/common
In directory usw-pr-cvs1:/tmp/cvs-serv7382/arch/mips/au1000/common
Modified Files:
Makefile clocks.c dbg_io.c dma.c irq.c power.c reset.c
serial.c time.c usbdev.c
Added Files:
rtc.c
Log Message:
* removed runtime copyright prints
* Added Pb1500 support (only pcmcia not working at this time) and
modified all drivers as necessary
* renamed most Au1000 registers to match latest databook
* better Au1000 usb hardware fixes for early silicon
* updated mtd driver to support Pb1500 partitioning
--- NEW FILE: rtc.c ---
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* RTC routines for PC style attached Dallas chip.
*
* Copyright (C) 1998, 2001 by Ralf Baechle
*/
#include <linux/mc146818rtc.h>
#include <asm/io.h>
#define PB1500_RTC_ADDR 0xAC000000
static unsigned char std_rtc_read_data(unsigned long addr)
{
addr <<= 2;
return readb(addr + PB1500_RTC_ADDR);
}
static void std_rtc_write_data(unsigned char data, unsigned long addr)
{
addr <<= 2;
writeb(data, addr + PB1500_RTC_ADDR);
}
static int std_rtc_bcd_mode(void)
{
return 1;
}
struct rtc_ops pb1500_rtc_ops = {
&std_rtc_read_data,
&std_rtc_write_data,
&std_rtc_bcd_mode
};
Index: Makefile
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/common/Makefile,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- Makefile 6 Nov 2001 00:43:16 -0000 1.7
+++ Makefile 15 Feb 2002 19:47:24 -0000 1.8
@@ -19,12 +19,13 @@
O_TARGET := au1000.o
-export-objs = prom.o serial.o
+export-objs = prom.o serial.o clocks.o
obj-y := prom.o int-handler.o dma.o irq.o puts.o time.o reset.o power.o clocks.o
obj-$(CONFIG_AU1000_UART) += serial.o
obj-$(CONFIG_AU1000_USB_DEVICE) += usbdev.o
obj-$(CONFIG_REMOTE_DEBUG) += dbg_io.o
+obj-$(CONFIG_RTC) += rtc.o
include $(TOPDIR)/Rules.make
Index: clocks.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/common/clocks.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- clocks.c 30 Aug 2001 21:52:39 -0000 1.2
+++ clocks.c 15 Feb 2002 19:47:24 -0000 1.3
@@ -27,6 +27,7 @@
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
+#include <linux/module.h>
#include <asm/au1000.h>
static unsigned int au1000_clock; // Hz
@@ -74,27 +75,24 @@
unsigned int static_cfg0;
unsigned int sys_busclk =
(get_au1000_speed()/1000) /
- ((int)(inl(PM_POWERUP_CONTROL)&0x03) + 2);
+ ((int)(inl(SYS_POWERCTRL)&0x03) + 2);
- static_cfg0 = inl(STATIC_CONFIG_0);
- if (sys_busclk/4 > 40000) {
- static_cfg0 |= (1<<11);
- outl(static_cfg0, STATIC_CONFIG_0);
- lcd_clock = sys_busclk / 5;
- if (lcd_clock > 40000)
+ static_cfg0 = inl(MEM_STCFG0);
+
+ if (static_cfg0 & (1<<11))
+ lcd_clock = sys_busclk / 5; /* note: BCLK switching fails with D5 */
+ else
+ lcd_clock = sys_busclk / 4;
+
+ if (lcd_clock > 50000) /* Epson MAX */
printk(__FUNCTION__
": warning: LCD clock too high (%d KHz)\n",
lcd_clock);
- } else {
- static_cfg0 &= ~(1<<11);
- outl(static_cfg0, STATIC_CONFIG_0);
- lcd_clock = sys_busclk / 4;
- }
- // some time to allow LCD clock to settle
- udelay(100);
}
unsigned int get_au1000_lcd_clock(void)
{
- return lcd_clock;
+ return lcd_clock;
}
+
+EXPORT_SYMBOL(get_au1000_lcd_clock);
Index: dbg_io.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/common/dbg_io.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- dbg_io.c 13 Sep 2001 17:29:36 -0000 1.4
+++ dbg_io.c 15 Feb 2002 19:47:24 -0000 1.5
@@ -53,8 +53,8 @@
#define UART_MOD_CNTRL 0x100 /* Module Control */
/* memory-mapped read/write of the port */
-#define UART16550_READ(y) (inl(DEBUG_BASE + y) & 0xff)
-#define UART16550_WRITE(y,z) (outl(z&0xff, DEBUG_BASE + y))
+#define UART16550_READ(y) (readl(DEBUG_BASE + y) & 0xff)
+#define UART16550_WRITE(y,z) (writel(z&0xff, DEBUG_BASE + y))
extern unsigned long get_au1000_uart_baud_base(void);
extern unsigned long cal_r4koff(void);
Index: dma.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/common/dma.c,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -d -r1.5 -r1.6
--- dma.c 6 Nov 2001 20:23:53 -0000 1.5
+++ dma.c 15 Feb 2002 19:47:24 -0000 1.6
@@ -32,6 +32,7 @@
#include <linux/kernel.h>
#include <linux/errno.h>
+#include <linux/sched.h>
#include <linux/spinlock.h>
#include <linux/string.h>
#include <linux/delay.h>
@@ -85,12 +86,12 @@
AC97C_DATA, DMA_DR | DMA_DW16 | DMA_NC}, {
UART3_ADDR + UART_TX, DMA_DW8 | DMA_NC}, {
UART3_ADDR + UART_RX, DMA_DR | DMA_DW8 | DMA_NC}, {
- USB_DEV_EP0_READ_FIFO, DMA_DR | DMA_DW8 | DMA_NC}, {
- USB_DEV_EP0_WRITE_FIFO, DMA_DW8 | DMA_NC}, {
- USB_DEV_EP2_WRITE_FIFO, DMA_DW8 | DMA_NC}, {
- USB_DEV_EP3_WRITE_FIFO, DMA_DW8 | DMA_NC}, {
- USB_DEV_EP4_READ_FIFO, DMA_DR | DMA_DW8 | DMA_NC}, {
- USB_DEV_EP5_READ_FIFO, DMA_DR | DMA_DW8 | DMA_NC}, {
+ USBD_EP0RD, DMA_DR | DMA_DW8 | DMA_NC}, {
+ USBD_EP0WR, DMA_DW8 | DMA_NC}, {
+ USBD_EP2WR, DMA_DW8 | DMA_NC}, {
+ USBD_EP3WR, DMA_DW8 | DMA_NC}, {
+ USBD_EP4RD, DMA_DR | DMA_DW8 | DMA_NC}, {
+ USBD_EP5RD, DMA_DR | DMA_DW8 | DMA_NC}, {
I2S_DATA, DMA_DW32 | DMA_NC}, {
I2S_DATA, DMA_DR | DMA_DW32 | DMA_NC}
};
Index: irq.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/common/irq.c,v
retrieving revision 1.13
retrieving revision 1.14
diff -u -d -r1.13 -r1.14
--- irq.c 2 Jan 2002 18:19:35 -0000 1.13
+++ irq.c 15 Feb 2002 19:47:24 -0000 1.14
@@ -89,6 +89,7 @@
inline void local_disable_irq(unsigned int irq_nr);
extern unsigned int do_IRQ(int irq, struct pt_regs *regs);
+extern void __init init_generic_irq(void);
#ifdef CONFIG_PM
extern void counter0_irq(int irq, void *dev_id, struct pt_regs *regs);
@@ -102,86 +103,86 @@
if (irq_nr > AU1000_LAST_INTC0_INT) {
switch (type) {
case INTC_INT_RISE_EDGE: /* 0:0:1 */
- outl(1<<(irq_nr-32),INTC1_CONFIG2_CLEAR);
- outl(1<<(irq_nr-32), INTC1_CONFIG1_CLEAR);
- outl(1<<(irq_nr-32), INTC1_CONFIG0_SET);
+ outl(1<<(irq_nr-32), IC1_CFG2CLR);
+ outl(1<<(irq_nr-32), IC1_CFG1CLR);
+ outl(1<<(irq_nr-32), IC1_CFG0SET);
break;
case INTC_INT_FALL_EDGE: /* 0:1:0 */
- outl(1<<(irq_nr-32), INTC1_CONFIG2_CLEAR);
- outl(1<<(irq_nr-32), INTC1_CONFIG1_SET);
- outl(1<<(irq_nr-32), INTC1_CONFIG0_CLEAR);
+ outl(1<<(irq_nr-32), IC1_CFG2CLR);
+ outl(1<<(irq_nr-32), IC1_CFG1SET);
+ outl(1<<(irq_nr-32), IC1_CFG0CLR);
break;
case INTC_INT_HIGH_LEVEL: /* 1:0:1 */
- outl(1<<(irq_nr-32), INTC1_CONFIG2_SET);
- outl(1<<(irq_nr-32), INTC1_CONFIG1_CLEAR);
- outl(1<<(irq_nr-32), INTC1_CONFIG0_SET);
+ outl(1<<(irq_nr-32), IC1_CFG2SET);
+ outl(1<<(irq_nr-32), IC1_CFG1CLR);
+ outl(1<<(irq_nr-32), IC1_CFG0SET);
break;
case INTC_INT_LOW_LEVEL: /* 1:1:0 */
- outl(1<<(irq_nr-32), INTC1_CONFIG2_SET);
- outl(1<<(irq_nr-32), INTC1_CONFIG1_SET);
- outl(1<<(irq_nr-32), INTC1_CONFIG0_CLEAR);
+ outl(1<<(irq_nr-32), IC1_CFG2SET);
+ outl(1<<(irq_nr-32), IC1_CFG1SET);
+ outl(1<<(irq_nr-32), IC1_CFG0CLR);
break;
case INTC_INT_DISABLED: /* 0:0:0 */
- outl(1<<(irq_nr-32), INTC1_CONFIG0_CLEAR);
- outl(1<<(irq_nr-32), INTC1_CONFIG1_CLEAR);
- outl(1<<(irq_nr-32), INTC1_CONFIG2_CLEAR);
+ outl(1<<(irq_nr-32), IC1_CFG0CLR);
+ outl(1<<(irq_nr-32), IC1_CFG1CLR);
+ outl(1<<(irq_nr-32), IC1_CFG2CLR);
break;
default: /* disable the interrupt */
printk("unexpected int type %d (irq %d)\n", type, irq_nr);
- outl(1<<(irq_nr-32), INTC1_CONFIG0_CLEAR);
- outl(1<<(irq_nr-32), INTC1_CONFIG1_CLEAR);
- outl(1<<(irq_nr-32), INTC1_CONFIG2_CLEAR);
+ outl(1<<(irq_nr-32), IC1_CFG0CLR);
+ outl(1<<(irq_nr-32), IC1_CFG1CLR);
+ outl(1<<(irq_nr-32), IC1_CFG2CLR);
return;
}
if (int_req) /* assign to interrupt request 1 */
- outl(1<<(irq_nr-32), INTC1_ASSIGN_REQ_CLEAR);
+ outl(1<<(irq_nr-32), IC1_ASSIGNCLR);
else /* assign to interrupt request 0 */
- outl(1<<(irq_nr-32), INTC1_ASSIGN_REQ_SET);
- outl(1<<(irq_nr-32), INTC1_SOURCE_SET);
- outl(1<<(irq_nr-32), INTC1_MASK_CLEAR);
- outl(1<<(irq_nr-32), INTC1_WAKEUP_CLEAR);
+ outl(1<<(irq_nr-32), IC1_ASSIGNSET);
+ outl(1<<(irq_nr-32), IC1_SRCSET);
+ outl(1<<(irq_nr-32), IC1_MASKCLR);
+ outl(1<<(irq_nr-32), IC1_WAKECLR);
}
else {
switch (type) {
case INTC_INT_RISE_EDGE: /* 0:0:1 */
- outl(1<<irq_nr,INTC0_CONFIG2_CLEAR);
- outl(1<<irq_nr, INTC0_CONFIG1_CLEAR);
- outl(1<<irq_nr, INTC0_CONFIG0_SET);
+ outl(1<<irq_nr, IC0_CFG2CLR);
+ outl(1<<irq_nr, IC0_CFG1CLR);
+ outl(1<<irq_nr, IC0_CFG0SET);
break;
case INTC_INT_FALL_EDGE: /* 0:1:0 */
- outl(1<<irq_nr, INTC0_CONFIG2_CLEAR);
- outl(1<<irq_nr, INTC0_CONFIG1_SET);
- outl(1<<irq_nr, INTC0_CONFIG0_CLEAR);
+ outl(1<<irq_nr, IC0_CFG2CLR);
+ outl(1<<irq_nr, IC0_CFG1SET);
+ outl(1<<irq_nr, IC0_CFG0CLR);
break;
case INTC_INT_HIGH_LEVEL: /* 1:0:1 */
- outl(1<<irq_nr, INTC0_CONFIG2_SET);
- outl(1<<irq_nr, INTC0_CONFIG1_CLEAR);
- outl(1<<irq_nr, INTC0_CONFIG0_SET);
+ outl(1<<irq_nr, IC0_CFG2SET);
+ outl(1<<irq_nr, IC0_CFG1CLR);
+ outl(1<<irq_nr, IC0_CFG0SET);
break;
case INTC_INT_LOW_LEVEL: /* 1:1:0 */
- outl(1<<irq_nr, INTC0_CONFIG2_SET);
- outl(1<<irq_nr, INTC0_CONFIG1_SET);
- outl(1<<irq_nr, INTC0_CONFIG0_CLEAR);
+ outl(1<<irq_nr, IC0_CFG2SET);
+ outl(1<<irq_nr, IC0_CFG1SET);
+ outl(1<<irq_nr, IC0_CFG0CLR);
break;
case INTC_INT_DISABLED: /* 0:0:0 */
- outl(1<<irq_nr, INTC0_CONFIG0_CLEAR);
- outl(1<<irq_nr, INTC0_CONFIG1_CLEAR);
- outl(1<<irq_nr, INTC0_CONFIG2_CLEAR);
+ outl(1<<irq_nr, IC0_CFG0CLR);
+ outl(1<<irq_nr, IC0_CFG1CLR);
+ outl(1<<irq_nr, IC0_CFG2CLR);
break;
default: /* disable the interrupt */
printk("unexpected int type %d (irq %d)\n", type, irq_nr);
- outl(1<<irq_nr, INTC0_CONFIG0_CLEAR);
- outl(1<<irq_nr, INTC0_CONFIG1_CLEAR);
- outl(1<<irq_nr, INTC0_CONFIG2_CLEAR);
+ outl(1<<irq_nr, IC0_CFG0CLR);
+ outl(1<<irq_nr, IC0_CFG1CLR);
+ outl(1<<irq_nr, IC0_CFG2CLR);
return;
}
if (int_req) /* assign to interrupt request 1 */
- outl(1<<irq_nr, INTC0_ASSIGN_REQ_CLEAR);
+ outl(1<<irq_nr, IC0_ASSIGNCLR);
else /* assign to interrupt request 0 */
- outl(1<<irq_nr, INTC0_ASSIGN_REQ_SET);
- outl(1<<irq_nr, INTC0_SOURCE_SET);
- outl(1<<irq_nr, INTC0_MASK_CLEAR);
- outl(1<<irq_nr, INTC0_WAKEUP_CLEAR);
+ outl(1<<irq_nr, IC0_ASSIGNSET);
+ outl(1<<irq_nr, IC0_SRCSET);
+ outl(1<<irq_nr, IC0_MASKCLR);
+ outl(1<<irq_nr, IC0_WAKECLR);
}
au_sync();
}
@@ -204,12 +205,12 @@
inline void local_enable_irq(unsigned int irq_nr)
{
if (irq_nr > AU1000_LAST_INTC0_INT) {
- outl(1<<(irq_nr-32), INTC1_MASK_SET);
- outl(1<<(irq_nr-32), INTC1_WAKEUP_SET);
+ outl(1<<(irq_nr-32), IC1_MASKSET);
+ outl(1<<(irq_nr-32), IC1_WAKESET);
}
else {
- outl(1<<irq_nr, INTC0_MASK_SET);
- outl(1<<irq_nr, INTC0_WAKEUP_SET);
+ outl(1<<irq_nr, IC0_MASKSET);
+ outl(1<<irq_nr, IC0_WAKESET);
}
au_sync();
}
@@ -218,12 +219,12 @@
inline void local_disable_irq(unsigned int irq_nr)
{
if (irq_nr > AU1000_LAST_INTC0_INT) {
- outl(1<<(irq_nr-32), INTC1_MASK_CLEAR);
- outl(1<<(irq_nr-32), INTC1_WAKEUP_CLEAR);
+ outl(1<<(irq_nr-32), IC1_MASKCLR);
+ outl(1<<(irq_nr-32), IC1_WAKECLR);
}
else {
- outl(1<<irq_nr, INTC0_MASK_CLEAR);
- outl(1<<irq_nr, INTC0_WAKEUP_CLEAR);
+ outl(1<<irq_nr, IC0_MASKCLR);
+ outl(1<<irq_nr, IC0_WAKECLR);
}
au_sync();
}
@@ -232,12 +233,12 @@
static inline void mask_and_ack_rise_edge_irq(unsigned int irq_nr)
{
if (irq_nr > AU1000_LAST_INTC0_INT) {
- outl(1<<(irq_nr-32), INTC1_R_EDGE_DETECT_CLEAR);
- outl(1<<(irq_nr-32), INTC1_MASK_CLEAR);
+ outl(1<<(irq_nr-32), IC1_RISINGCLR);
+ outl(1<<(irq_nr-32), IC1_MASKCLR);
}
else {
- outl(1<<irq_nr, INTC0_R_EDGE_DETECT_CLEAR);
- outl(1<<irq_nr, INTC0_MASK_CLEAR);
+ outl(1<<irq_nr, IC0_RISINGCLR);
+ outl(1<<irq_nr, IC0_MASKCLR);
}
au_sync();
}
@@ -246,12 +247,12 @@
static inline void mask_and_ack_fall_edge_irq(unsigned int irq_nr)
{
if (irq_nr > AU1000_LAST_INTC0_INT) {
- outl(1<<(irq_nr-32), INTC1_F_EDGE_DETECT_CLEAR);
- outl(1<<(irq_nr-32), INTC1_MASK_CLEAR);
+ outl(1<<(irq_nr-32), IC1_FALLINGCLR);
+ outl(1<<(irq_nr-32), IC1_MASKCLR);
}
else {
- outl(1<<irq_nr, INTC0_F_EDGE_DETECT_CLEAR);
- outl(1<<irq_nr, INTC0_MASK_CLEAR);
+ outl(1<<irq_nr, IC0_FALLINGCLR);
+ outl(1<<irq_nr, IC0_MASKCLR);
}
au_sync();
}
@@ -264,7 +265,7 @@
au_sync();
#if defined(CONFIG_MIPS_PB1000)
if (irq_nr == AU1000_GPIO_15) {
- writew(0x8000, AU1000_MDR); /* ack int */
+ writew(0x8000, PB1000_MDR); /* ack int */
au_sync();
}
#endif
@@ -283,7 +284,7 @@
}
#if defined(CONFIG_MIPS_PB1000)
if (irq_nr == AU1000_GPIO_15) {
- writew(0x4000, AU1000_MDR); /* enable int */
+ writew(0x4000, PB1000_MDR); /* enable int */
au_sync();
}
#endif
@@ -296,13 +297,13 @@
save_and_cli(flags);
if (controller) {
- mask = readl(INTC1_MASK_SET);
+ mask = readl(IC1_MASKSET);
for (i=32; i<64; i++) {
local_disable_irq(i);
}
}
else {
- mask = readl(INTC0_MASK_SET);
+ mask = readl(IC0_MASKSET);
for (i=0; i<32; i++) {
local_disable_irq(i);
}
@@ -326,9 +327,9 @@
}
}
if (controller)
- new_mask = readl(INTC1_MASK_SET);
+ new_mask = readl(IC1_MASKSET);
else
- new_mask = readl(INTC0_MASK_SET);
+ new_mask = readl(IC0_MASKSET);
restore_flags(flags);
}
@@ -372,7 +373,7 @@
#ifdef CONFIG_PM
void startup_match20_interrupt(void)
{
- local_enable_irq(AU1000_PC0_MATCH2_INT);
+ local_enable_irq(AU1000_TOY_MATCH2_INT);
}
#endif
@@ -396,12 +397,14 @@
for (i = 0; i <= AU1000_MAX_INTR; i++) {
switch (i) {
case AU1000_UART0_INT:
+ case AU1000_UART3_INT:
+#ifdef CONFIG_MIPS_PB1000
case AU1000_UART1_INT:
case AU1000_UART2_INT:
- case AU1000_UART3_INT:
case AU1000_SSI0_INT:
case AU1000_SSI1_INT:
+#endif
case AU1000_DMA_INT_BASE:
case AU1000_DMA_INT_BASE+1:
@@ -417,12 +420,27 @@
case AU1000_MAC0_DMA_INT:
case AU1000_MAC1_DMA_INT:
+
+ case AU1500_GPIO_204:
setup_local_irq(i, INTC_INT_HIGH_LEVEL, 0);
irq_desc[i].handler = &level_irq_type;
break;
+#ifdef CONFIG_MIPS_PB1000
case AU1000_GPIO_15:
+#endif
case AU1000_USB_HOST_INT:
+#ifdef CONFIG_MIPS_PB1500
+ case AU1000_PCI_INTA:
+ case AU1000_PCI_INTB:
+ case AU1000_PCI_INTC:
+ case AU1000_PCI_INTD:
+ case AU1500_GPIO_201:
+ case AU1500_GPIO_202:
+ case AU1500_GPIO_203:
+ case AU1500_GPIO_205:
+ case AU1500_GPIO_207:
+#endif
setup_local_irq(i, INTC_INT_LOW_LEVEL, 0);
irq_desc[i].handler = &level_irq_type;
break;
@@ -430,13 +448,13 @@
case AU1000_AC97C_INT:
case AU1000_USB_DEV_REQ_INT:
case AU1000_USB_DEV_SUS_INT:
- case AU1000_PC0_INT:
- case AU1000_PC0_MATCH0_INT:
- case AU1000_PC0_MATCH1_INT:
- case AU1000_PC1_INT:
- case AU1000_PC1_MATCH0_INT:
- case AU1000_PC1_MATCH1_INT:
- case AU1000_PC1_MATCH2_INT:
+ case AU1000_TOY_INT:
+ case AU1000_TOY_MATCH0_INT:
+ case AU1000_TOY_MATCH1_INT:
+ case AU1000_RTC_INT:
+ case AU1000_RTC_MATCH0_INT:
+ case AU1000_RTC_MATCH1_INT:
+ case AU1000_RTC_MATCH2_INT:
setup_local_irq(i, INTC_INT_RISE_EDGE, 0);
irq_desc[i].handler = &rise_edge_irq_type;
break;
@@ -444,7 +462,7 @@
// Careful if you change match 2 request!
// The interrupt handler is called directly
// from the low level dispatch code.
- case AU1000_PC0_MATCH2_INT:
+ case AU1000_TOY_MATCH2_INT:
setup_local_irq(i, INTC_INT_RISE_EDGE, 1);
irq_desc[i].handler = &rise_edge_irq_type;
break;
@@ -476,7 +494,7 @@
int irq = 0, i;
static unsigned long intc0_req0 = 0;
- intc0_req0 |= inl(INTC0_REQ0_INT);
+ intc0_req0 |= inl(IC0_REQ0INT);
if (!intc0_req0) return;
@@ -496,7 +514,7 @@
int irq = 0, i;
static unsigned long intc0_req1 = 0;
- intc0_req1 = inl(INTC0_REQ1_INT);
+ intc0_req1 = inl(IC0_REQ1INT);
if (!intc0_req1) return;
@@ -504,7 +522,7 @@
if ((intc0_req1 & (1<<i))) {
intc0_req1 &= ~(1<<i);
#ifdef CONFIG_PM
- if (i == AU1000_PC0_MATCH2_INT) {
+ if (i == AU1000_TOY_MATCH2_INT) {
mask_and_ack_rise_edge_irq(irq);
counter0_irq(irq, NULL, regs);
local_enable_irq(irq);
@@ -532,7 +550,7 @@
volatile unsigned short levels, mdr;
unsigned char ide_status;
- intc1_req0 |= inl(INTC1_REQ0_INT);
+ intc1_req0 |= inl(IC1_REQ0INT);
if (!intc1_req0) return;
@@ -564,7 +582,7 @@
int irq = 0, i;
static unsigned long intc1_req1 = 0;
- intc1_req1 |= inl(INTC1_REQ1_INT);
+ intc1_req1 |= inl(IC1_REQ1INT);
if (!intc1_req1) return;
Index: power.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/common/power.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- power.c 2 Dec 2001 19:05:29 -0000 1.4
+++ power.c 15 Feb 2002 19:47:24 -0000 1.5
@@ -60,6 +60,11 @@
extern void restore_local_and_enable(int controller, unsigned long mask);
extern void local_enable_irq(unsigned int irq_nr);
+/* Quick acpi hack. This will have to change! */
+#define CTL_ACPI 9999
+#define ACPI_S1_SLP_TYP 19
+#define ACPI_SLEEP 21
+
#ifdef CONFIG_PM
unsigned long suspend_mode;
@@ -76,16 +81,16 @@
flush_cache_all();
/* pin 6 is gpio */
- writel(readl(PIN_STATE) & ~(1 << 11), PIN_STATE);
+ writel(readl(SYS_PINSTATERD) & ~(1 << 11), SYS_PINSTATERD);
/* gpio 6 can cause a wake up event */
- wakeup = readl(PM_WAKEUP_SOURCE_MASK);
+ wakeup = readl(SYS_WAKEMSK);
wakeup &= ~(1 << 8); /* turn off match20 wakeup */
wakeup |= 1 << 6; /* turn on gpio 6 wakeup */
- writel(wakeup, PM_WAKEUP_SOURCE_MASK);
+ writel(wakeup, SYS_WAKEMSK);
- writel(1, PM_WAKEUP_CAUSE); /* clear cause */
- writel(1, PM_SLEEP_POWER); /* prepare to sleep */
+ writel(1, SYS_WAKESRC); /* clear cause */
+ writel(1, SYS_SLPPWR); /* prepare to sleep */
__asm__("la $4, 1f\n\t"
"lui $5, 0xb190\n\t"
@@ -189,14 +194,14 @@
set_au1000_speed(new_cpu_freq);
set_au1000_uart_baud_base(new_baud_base);
- old_refresh = readl(REFRESH_CONFIG) & 0x1ffffff;
+ old_refresh = readl(MEM_SDREFCFG) & 0x1ffffff;
new_refresh =
((old_refresh * new_cpu_freq) /
- old_cpu_freq) | (readl(REFRESH_CONFIG) & ~0x1ffffff);
+ old_cpu_freq) | (readl(MEM_SDREFCFG) & ~0x1ffffff);
- writel(pll, CPU_PLL_CNTRL);
+ writel(pll, SYS_CPUPLL);
au_sync_delay(1);
- writel(new_refresh, REFRESH_CONFIG);
+ writel(new_refresh, MEM_SDREFCFG);
au_sync_delay(1);
for (i = 0; i < 4; i++) {
@@ -241,7 +246,7 @@
*/
intc0_mask = save_local_and_disable(0);
intc1_mask = save_local_and_disable(1);
- local_enable_irq(AU1000_PC0_MATCH2_INT);
+ local_enable_irq(AU1000_TOY_MATCH2_INT);
restore_flags(flags);
calibrate_delay();
restore_local_and_enable(0, intc0_mask);
Index: reset.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/common/reset.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- reset.c 28 Aug 2001 07:23:54 -0000 1.2
+++ reset.c 15 Feb 2002 19:47:24 -0000 1.3
@@ -40,6 +40,52 @@
void au1000_restart(char *command)
{
+ /* Set all integrated peripherals to disabled states */
+ u32 prid = read_32bit_cp0_register(CP0_PRID);
+
+ printk(KERN_NOTICE "\n** Resetting Integrated Peripherals\n");
+ switch (prid & 0xFF000000)
+ {
+ case 0x00000000: /* Au1000 */
+ outl(0x02, 0xb0000010); /* ac97_enable */
+ outl(0x08, 0xb017fffc); /* usbh_enable - early errata */
+ asm("sync");
+ outl(0x00, 0xb017fffc); /* usbh_enable */
+ outl(0x00, 0xb0200058); /* usbd_enable */
+ outl(0x00, 0xb0300040); /* ir_enable */
+ outl(0x00, 0xb0520000); /* macen0 */
+ outl(0x00, 0xb0520004); /* macen1 */
+ outl(0x00, 0xb1000008); /* i2s_enable */
+ outl(0x00, 0xb1100100); /* uart0_enable */
+ outl(0x00, 0xb1200100); /* uart1_enable */
+ outl(0x00, 0xb1300100); /* uart2_enable */
+ outl(0x00, 0xb1400100); /* uart3_enable */
+ outl(0x02, 0xb1600100); /* ssi0_enable */
+ outl(0x02, 0xb1680100); /* ssi1_enable */
+ outl(0x00, 0xb1900020); /* sys_freqctrl0 */
+ outl(0x00, 0xb1900024); /* sys_freqctrl1 */
+ outl(0x00, 0xb1900028); /* sys_clksrc */
+ outl(0x00, 0xb1900100); /* sys_pininputen */
+ break;
+ case 0x01000000: /* Au1500 */
+ outl(0x02, 0xb0000010); /* ac97_enable */
+ outl(0x08, 0xb017fffc); /* usbh_enable - early errata */
+ asm("sync");
+ outl(0x00, 0xb017fffc); /* usbh_enable */
+ outl(0x00, 0xb0200058); /* usbd_enable */
+ outl(0x00, 0xb1520000); /* macen0 */
+ outl(0x00, 0xb1520004); /* macen1 */
+ outl(0x00, 0xb1100100); /* uart0_enable */
+ outl(0x00, 0xb1400100); /* uart3_enable */
+ outl(0x00, 0xb1900020); /* sys_freqctrl0 */
+ outl(0x00, 0xb1900024); /* sys_freqctrl1 */
+ outl(0x00, 0xb1900028); /* sys_clksrc */
+ outl(0x00, 0xb1900100); /* sys_pininputen */
+
+ default:
+ break;
+ }
+
set_cp0_status((ST0_BEV | ST0_ERL));
set_cp0_config(CONF_CM_UNCACHED);
flush_cache_all();
Index: serial.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/common/serial.c,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -d -r1.6 -r1.7
--- serial.c 2 Dec 2001 19:05:29 -0000 1.6
+++ serial.c 15 Feb 2002 19:47:24 -0000 1.7
@@ -987,8 +987,10 @@
set_bit(TTY_IO_ERROR, &info->tty->flags);
info->flags &= ~ASYNC_INITIALIZED;
+#ifndef CONFIG_REMOTE_DEBUG
outl(0, UART_MOD_CNTRL + state->port);
au_sync_delay(10);
+#endif
restore_flags(flags);
}
@@ -2547,9 +2549,10 @@
(void)serial_in(info, UART_RX);
serial_outp(info, UART_IER, 0);
+#ifndef CONFIG_REMOTE_DEBUG
outl(0, UART_MOD_CNTRL + state->port);
au_sync_delay(10);
-
+#endif
restore_flags(flags);
}
Index: time.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/common/time.c,v
retrieving revision 1.9
retrieving revision 1.10
diff -u -d -r1.9 -r1.10
--- time.c 15 Oct 2001 22:57:28 -0000 1.9
+++ time.c 15 Feb 2002 19:47:24 -0000 1.10
@@ -36,6 +36,8 @@
#include <asm/mipsregs.h>
#include <asm/ptrace.h>
+#include <asm/time.h>
+#include <asm/hardirq.h>
#include <asm/div64.h>
#include <asm/au1000.h>
@@ -50,6 +52,7 @@
static unsigned long r4k_offset; /* Amount to increment compare reg each time */
static unsigned long r4k_cur; /* What counter should be at next timer irq */
extern rwlock_t xtime_lock;
+unsigned int mips_counter_frequency = 0;
/* Cycle counter value at the previous timer interrupt.. */
static unsigned int timerhi = 0, timerlo = 0;
@@ -75,6 +78,10 @@
{
int irq = 63;
unsigned long count;
+ int cpu = smp_processor_id();
+
+ irq_enter(cpu, irq);
+ kstat.irqs[cpu][irq]++;
#ifdef CONFIG_PM
printk(KERN_ERR "Unexpected CP0 interrupt\n");
@@ -98,6 +105,10 @@
} while (((unsigned long)read_32bit_cp0_register(CP0_COUNT)
- r4k_cur) < 0x7fffffff);
+ irq_exit(cpu, irq);
+
+ if (softirq_pending(cpu))
+ do_softirq();
return;
null:
@@ -112,13 +123,13 @@
static int jiffie_drift = 0;
kstat.irqs[0][irq]++;
- if (readl(PC_COUNTER_CNTRL) & PC_CNTRL_M20) {
+ if (readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20) {
/* should never happen! */
printk(KERN_WARNING "counter 0 w status eror\n");
return;
}
- pc0 = inl(PC0_COUNTER_READ);
+ pc0 = inl(SYS_TOYREAD);
if (pc0 < last_match20) {
/* counter overflowed */
time_elapsed = (0xffffffff - last_match20) + pc0;
@@ -135,7 +146,7 @@
}
last_pc0 = pc0;
- outl(last_match20 + MATCH20_INC, PC0_MATCH2);
+ outl(last_match20 + MATCH20_INC, SYS_TOYMATCH2);
au_sync();
/* our counter ticks at 10.009765625 ms/tick, we we're running
@@ -165,30 +176,31 @@
save_and_cli(flags);
- counter = inl(PC_COUNTER_CNTRL);
- outl(counter | PC_CNTRL_EN1, PC_COUNTER_CNTRL);
+ counter = inl(SYS_COUNTER_CNTRL);
+ outl(counter | SYS_CNTRL_EN1, SYS_COUNTER_CNTRL);
- while (inl(PC_COUNTER_CNTRL) & PC_CNTRL_T1S);
- outl(trim_divide-1, PC1_TRIM); /* RTC now ticks at 32.768/16 kHz */
- while (inl(PC_COUNTER_CNTRL) & PC_CNTRL_T1S);
+ while (inl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T1S);
+ outl(trim_divide-1, SYS_RTCTRIM); /* RTC now ticks at 32.768/16 kHz */
+ while (inl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T1S);
- while (inl(PC_COUNTER_CNTRL) & PC_CNTRL_C1S);
- outl (0, PC1_COUNTER_WRITE);
- while (inl(PC_COUNTER_CNTRL) & PC_CNTRL_C1S);
+ while (inl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S);
+ outl (0, SYS_TOYWRITE);
+ while (inl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S);
- start = inl(PC1_COUNTER_READ);
+ start = inl(SYS_RTCREAD);
start += 2;
/* wait for the beginning of a new tick */
- while (inl(PC1_COUNTER_READ) < start);
+ while (inl(SYS_RTCREAD) < start);
/* Start r4k counter. */
write_32bit_cp0_register(CP0_COUNT, 0);
end = start + (32768 / trim_divide)/2; /* wait 0.5 seconds */
- while (end > inl(PC1_COUNTER_READ));
+ while (end > inl(SYS_RTCREAD));
count = read_32bit_cp0_register(CP0_COUNT);
cpu_speed = count * 2;
+ mips_counter_frequency = count;
set_au1000_uart_baud_base(((cpu_speed) / 4) / 16);
restore_flags(flags);
return (cpu_speed / HZ);
@@ -210,9 +222,7 @@
printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
(est_freq%1000000)*100/1000000);
set_au1000_speed(est_freq);
-#ifdef CONFIG_FB_E1356
set_au1000_lcd_clock(); // program the LCD clock
-#endif
r4k_cur = (read_32bit_cp0_register(CP0_COUNT) + r4k_offset);
write_32bit_cp0_register(CP0_COMPARE, r4k_cur);
@@ -231,20 +241,20 @@
* counter 0 interrupt as a special irq and it doesn't show
* up under /proc/interrupts.
*/
- while (readl(PC_COUNTER_CNTRL) & PC_CNTRL_C0S);
- writel(0, PC0_COUNTER_WRITE);
- while (readl(PC_COUNTER_CNTRL) & PC_CNTRL_C0S);
+ while (readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S);
+ writel(0, SYS_TOYWRITE);
+ while (readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S);
- writel(readl(PM_WAKEUP_SOURCE_MASK) | (1<<8), PM_WAKEUP_SOURCE_MASK);
- writel(~0, PM_WAKEUP_CAUSE);
+ writel(readl(SYS_WAKEMSK) | (1<<8), SYS_WAKEMSK);
+ writel(~0, SYS_WAKESRC);
au_sync();
- while (readl(PC_COUNTER_CNTRL) & PC_CNTRL_M20);
+ while (readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20);
/* setup match20 to interrupt once every 10ms */
- last_pc0 = last_match20 = readl(PC0_COUNTER_READ);
- writel(last_match20 + MATCH20_INC, PC0_MATCH2);
+ last_pc0 = last_match20 = readl(SYS_TOYREAD);
+ writel(last_match20 + MATCH20_INC, SYS_TOYMATCH2);
au_sync();
- while (readl(PC_COUNTER_CNTRL) & PC_CNTRL_M20);
+ while (readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20);
startup_match20_interrupt();
#endif
@@ -254,7 +264,7 @@
/* This is for machines which generate the exact clock. */
#define USECS_PER_JIFFY (1000000/HZ)
-#define USECS_PER_JIFFY_FRAC ((u32)((1000000ULL << 32) / HZ))
+#define USECS_PER_JIFFY_FRAC (0x100000000*1000000/HZ&0xffffffff)
static unsigned long
@@ -272,7 +282,7 @@
unsigned long pc0;
unsigned long offset;
- pc0 = readl(PC0_COUNTER_READ);
+ pc0 = readl(SYS_TOYREAD);
if (pc0 < last_pc0) {
offset = 0xffffffff - last_pc0 + pc0;
printk("offset over: %x\n", (unsigned)offset);
@@ -325,8 +335,7 @@
"mfhi\t%0"
:"=r" (res)
:"r" (count),
- "r" (quotient)
- :"$1");
+ "r" (quotient));
/*
* Due to possible jiffies inconsistencies, we need to check
Index: usbdev.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/common/usbdev.c,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- usbdev.c 16 Jan 2002 23:54:18 -0000 1.7
+++ usbdev.c 15 Feb 2002 19:47:24 -0000 1.8
@@ -279,20 +279,15 @@
static endpoint_reg_t ep_reg[] = {
// FIFO's 0 and 1 are EP0 default control
- {USB_DEV_EP0_READ_FIFO, USB_DEV_EP0_WRITE_FIFO,
- USB_DEV_EP0_CS, USB_DEV_FIFO0_STATUS, USB_DEV_FIFO1_STATUS},
+ {USBD_EP0RD, USBD_EP0WR, USBD_EP0CS, USBD_EP0RDSTAT, USBD_EP0WRSTAT},
// FIFO 2 is EP2, Port 0, bulk IN
- { -1, USB_DEV_EP2_WRITE_FIFO, USB_DEV_EP2_CS,
- -1, USB_DEV_FIFO2_STATUS },
+ { -1, USBD_EP2WR, USBD_EP2CS, -1, USBD_EP2WRSTAT },
// FIFO 4 is EP4, Port 0, bulk OUT
- {USB_DEV_EP4_READ_FIFO, -1, USB_DEV_EP4_CS,
- USB_DEV_FIFO4_STATUS, -1},
+ {USBD_EP4RD, -1, USBD_EP4CS, USBD_EP3WR, -1},
// FIFO 3 is EP3, Port 1, bulk IN
- { -1, USB_DEV_EP3_WRITE_FIFO, USB_DEV_EP3_CS,
- -1, USB_DEV_FIFO3_STATUS },
+ { -1, USBD_EP3WRSTAT, USBD_EP3CS, -1, USBD_EP3WRSTAT },
// FIFO 5 is EP5, Port 1, bulk OUT
- {USB_DEV_EP5_READ_FIFO, -1, USB_DEV_EP5_CS,
- USB_DEV_FIFO5_STATUS, -1}
+ {USBD_EP5RD, -1, USBD_EP5CS, USBD_EP5RDSTAT, -1}
};
static struct {
|
|
From: Pete P. <pp...@us...> - 2002-02-15 19:47:33
|
Update of /cvsroot/linux-mips/linux/include/asm-mips In directory usw-pr-cvs1:/tmp/cvs-serv7382/include/asm-mips Modified Files: au1000.h au1000_pcmcia.h bootinfo.h pb1000.h pb1500.h Log Message: * removed runtime copyright prints * Added Pb1500 support (only pcmcia not working at this time) and modified all drivers as necessary * renamed most Au1000 registers to match latest databook * better Au1000 usb hardware fixes for early silicon * updated mtd driver to support Pb1500 partitioning Index: au1000.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips/au1000.h,v retrieving revision 1.12 retrieving revision 1.13 diff -u -d -r1.12 -r1.13 --- au1000.h 4 Dec 2001 03:05:58 -0000 1.12 +++ au1000.h 15 Feb 2002 19:47:28 -0000 1.13 @@ -86,115 +86,117 @@ #endif /* SDRAM Controller */ -#define CS_MODE_0 0xB4000000 -#define CS_MODE_1 0xB4000004 -#define CS_MODE_2 0xB4000008 +#define MEM_SDMODE0 0xB4000000 +#define MEM_SDMODE1 0xB4000004 +#define MEM_SDMODE2 0xB4000008 -#define CS_CONFIG_0 0xB400000C -#define CS_CONFIG_1 0xB4000010 -#define CS_CONFIG_2 0xB4000014 +#define MEM_SDADDR0 0xB400000C +#define MEM_SDADDR1 0xB4000010 +#define MEM_SDADDR2 0xB4000014 -#define REFRESH_CONFIG 0xB4000018 -#define PRECHARGE_CMD 0xB400001C -#define AUTO_REFRESH_CMD 0xB4000020 +#define MEM_SDREFCFG 0xB4000018 +#define MEM_SDPRECMD 0xB400001C +#define MEM_SDAUTOREF 0xB4000020 -#define WRITE_EXTERN_0 0xB4000024 -#define WRITE_EXTERN_1 0xB4000028 -#define WRITE_EXTERN_2 0xB400002C +#define MEM_SDWRMD0 0xB4000024 +#define MEM_SDWRMD1 0xB4000028 +#define MEM_SDWRMD2 0xB400002C -#define SDRAM_SLEEP 0xB4000030 -#define TOGGLE_CKE 0xB4000034 +#define MEM_SDSLEEP 0xB4000030 +#define MEM_SDSMCKE 0xB4000034 /* Static Bus Controller */ -#define STATIC_CONFIG_0 0xB4001000 -#define STATIC_TIMING_0 0xB4001004 -#define STATIC_ADDRESS_0 0xB4001008 +#define MEM_STCFG0 0xB4001000 +#define MEM_STTIME0 0xB4001004 +#define MEM_STADDR0 0xB4001008 -#define STATIC_CONFIG_1 0xB4001010 -#define STATIC_TIMING_1 0xB4001014 -#define STATIC_ADDRESS_1 0xB4001018 +#define MEM_STCFG1 0xB4001010 +#define MEM_STTIME1 0xB4001014 +#define MEM_STADDR1 0xB4001018 -#define STATIC_CONFIG_2 0xB4001020 -#define STATIC_TIMING_2 0xB4001024 -#define STATIC_ADDRESS_2 0xB4001028 +#define MEM_STCFG2 0xB4001020 +#define MEM_STTIME2 0xB4001024 +#define MEM_STADDR2 0xB4001028 -#define STATIC_CONFIG_3 0xB4001030 -#define STATIC_TIMING_3 0xB4001034 -#define STATIC_ADDRESS_3 0xB4001038 +#define MEM_STCFG3 0xB4001030 +#define MEM_STTIME3 0xB4001034 +#define MEM_STADDR3 0xB4001038 /* Interrupt Controller 0 */ -#define INTC0_CONFIG0_READ 0xB0400040 -#define INTC0_CONFIG0_SET 0xB0400040 -#define INTC0_CONFIG0_CLEAR 0xB0400044 +#define IC0_CFG0RD 0xB0400040 +#define IC0_CFG0SET 0xB0400040 +#define IC0_CFG0CLR 0xB0400044 -#define INTC0_CONFIG1_READ 0xB0400048 -#define INTC0_CONFIG1_SET 0xB0400048 -#define INTC0_CONFIG1_CLEAR 0xB040004C +#define IC0_CFG1RD 0xB0400048 +#define IC0_CFG1SET 0xB0400048 +#define IC0_CFG1CLR 0xB040004C -#define INTC0_CONFIG2_READ 0xB0400050 -#define INTC0_CONFIG2_SET 0xB0400050 -#define INTC0_CONFIG2_CLEAR 0xB0400054 +#define IC0_CFG2RD 0xB0400050 +#define IC0_CFG2SET 0xB0400050 +#define IC0_CFG2CLR 0xB0400054 -#define INTC0_REQ0_INT 0xB0400054 -#define INTC0_SOURCE_READ 0xB0400058 -#define INTC0_SOURCE_SET 0xB0400058 -#define INTC0_SOURCE_CLEAR 0xB040005C -#define INTC0_REQ1_INT 0xB040005C +#define IC0_REQ0INT 0xB0400054 +#define IC0_SRCRD 0xB0400058 +#define IC0_SRCSET 0xB0400058 +#define IC0_SRCCLR 0xB040005C +#define IC0_REQ1INT 0xB040005C -#define INTC0_ASSIGN_REQ_READ 0xB0400060 -#define INTC0_ASSIGN_REQ_SET 0xB0400060 -#define INTC0_ASSIGN_REQ_CLEAR 0xB0400064 +#define IC0_ASSIGNRD 0xB0400060 +#define IC0_ASSIGNSET 0xB0400060 +#define IC0_ASSIGNCLR 0xB0400064 -#define INTC0_WAKEUP_READ 0xB0400068 -#define INTC0_WAKEUP_SET 0xB0400068 -#define INTC0_WAKEUP_CLEAR 0xB040006C +#define IC0_WAKERD 0xB0400068 +#define IC0_WAKESET 0xB0400068 +#define IC0_WAKECLR 0xB040006C -#define INTC0_MASK_READ 0xB0400070 -#define INTC0_MASK_SET 0xB0400070 -#define INTC0_MASK_CLEAR 0xB0400074 +#define IC0_MASKRD 0xB0400070 +#define IC0_MASKSET 0xB0400070 +#define IC0_MASKCLR 0xB0400074 -#define INTC0_R_EDGE_DETECT 0xB0400078 -#define INTC0_R_EDGE_DETECT_CLEAR 0xB0400078 -#define INTC0_F_EDGE_DETECT_CLEAR 0xB040007C +#define IC0_RISINGRD 0xB0400078 +#define IC0_RISINGCLR 0xB0400078 +#define IC0_FALLINGRD 0xB040007C +#define IC0_FALLINGCLR 0xB040007C -#define INTC0_TEST_BIT 0xB0400080 +#define IC0_TESTBIT 0xB0400080 /* Interrupt Controller 1 */ -#define INTC1_CONFIG0_READ 0xB1800040 -#define INTC1_CONFIG0_SET 0xB1800040 -#define INTC1_CONFIG0_CLEAR 0xB1800044 +#define IC1_CFG0RD 0xB1800040 +#define IC1_CFG0SET 0xB1800040 +#define IC1_CFG0CLR 0xB1800044 -#define INTC1_CONFIG1_READ 0xB1800048 -#define INTC1_CONFIG1_SET 0xB1800048 -#define INTC1_CONFIG1_CLEAR 0xB180004C +#define IC1_CFG1RD 0xB1800048 +#define IC1_CFG1SET 0xB1800048 +#define IC1_CFG1CLR 0xB180004C -#define INTC1_CONFIG2_READ 0xB1800050 -#define INTC1_CONFIG2_SET 0xB1800050 -#define INTC1_CONFIG2_CLEAR 0xB1800054 +#define IC1_CFG2RD 0xB1800050 +#define IC1_CFG2SET 0xB1800050 +#define IC1_CFG2CLR 0xB1800054 -#define INTC1_REQ0_INT 0xB1800054 -#define INTC1_SOURCE_READ 0xB1800058 -#define INTC1_SOURCE_SET 0xB1800058 -#define INTC1_SOURCE_CLEAR 0xB180005C -#define INTC1_REQ1_INT 0xB180005C +#define IC1_REQ0INT 0xB1800054 +#define IC1_SRCRD 0xB1800058 +#define IC1_SRCSET 0xB1800058 +#define IC1_SRCCLR 0xB180005C +#define IC1_REQ1INT 0xB180005C -#define INTC1_ASSIGN_REQ_READ 0xB1800060 -#define INTC1_ASSIGN_REQ_SET 0xB1800060 -#define INTC1_ASSIGN_REQ_CLEAR 0xB1800064 +#define IC1_ASSIGNRD 0xB1800060 +#define IC1_ASSIGNSET 0xB1800060 +#define IC1_ASSIGNCLR 0xB1800064 -#define INTC1_WAKEUP_READ 0xB1800068 -#define INTC1_WAKEUP_SET 0xB1800068 -#define INTC1_WAKEUP_CLEAR 0xB180006C +#define IC1_WAKERD 0xB1800068 +#define IC1_WAKESET 0xB1800068 +#define IC1_WAKECLR 0xB180006C -#define INTC1_MASK_READ 0xB1800070 -#define INTC1_MASK_SET 0xB1800070 -#define INTC1_MASK_CLEAR 0xB1800074 +#define IC1_MASKRD 0xB1800070 +#define IC1_MASKSET 0xB1800070 +#define IC1_MASKCLR 0xB1800074 -#define INTC1_R_EDGE_DETECT 0xB1800078 -#define INTC1_R_EDGE_DETECT_CLEAR 0xB1800078 -#define INTC1_F_EDGE_DETECT_CLEAR 0xB180007C +#define IC1_RISINGRD 0xB1800078 +#define IC1_RISINGCLR 0xB1800078 +#define IC1_FALLINGRD 0xB180007C +#define IC1_FALLINGCLR 0xB180007C -#define INTC1_TEST_BIT 0xB1800080 +#define IC1_TESTBIT 0xB1800080 /* Interrupt Configuration Modes */ #define INTC_INT_DISABLED 0 @@ -207,22 +209,31 @@ /* Interrupt Numbers */ #define AU1000_UART0_INT 0 -#define AU1000_UART1_INT 1 -#define AU1000_UART2_INT 2 +#define AU1000_UART1_INT 1 /* au1000 */ +#define AU1000_UART2_INT 2 /* au1000 */ + +#define AU1000_PCI_INTA 1 /* au1500 */ +#define AU1000_PCI_INTB 2 /* au1500 */ + #define AU1000_UART3_INT 3 -#define AU1000_SSI0_INT 4 -#define AU1000_SSI1_INT 5 + +#define AU1000_SSI0_INT 4 /* au1000 */ +#define AU1000_SSI1_INT 5 /* au1000 */ + +#define AU1000_PCI_INTC 4 /* au1500 */ +#define AU1000_PCI_INTD 5 /* au1500 */ + #define AU1000_DMA_INT_BASE 6 -#define AU1000_PC0_INT 14 -#define AU1000_PC0_MATCH0_INT 15 -#define AU1000_PC0_MATCH1_INT 16 -#define AU1000_PC0_MATCH2_INT 17 -#define AU1000_PC1_INT 18 -#define AU1000_PC1_MATCH0_INT 19 -#define AU1000_PC1_MATCH1_INT 20 -#define AU1000_PC1_MATCH2_INT 21 -#define AU1000_IRDA_TX_INT 22 -#define AU1000_IRDA_RX_INT 23 +#define AU1000_TOY_INT 14 +#define AU1000_TOY_MATCH0_INT 15 +#define AU1000_TOY_MATCH1_INT 16 +#define AU1000_TOY_MATCH2_INT 17 +#define AU1000_RTC_INT 18 +#define AU1000_RTC_MATCH0_INT 19 +#define AU1000_RTC_MATCH1_INT 20 +#define AU1000_RTC_MATCH2_INT 21 +#define AU1000_IRDA_TX_INT 22 /* au1000 */ +#define AU1000_IRDA_RX_INT 23 /* au1000 */ #define AU1000_USB_DEV_REQ_INT 24 #define AU1000_USB_DEV_SUS_INT 25 #define AU1000_USB_HOST_INT 26 @@ -231,7 +242,7 @@ #define AU1000_MAC1_DMA_INT 29 #define AU1000_ETH0_IRQ AU1000_MAC0_DMA_INT #define AU1000_ETH1_IRQ AU1000_MAC1_DMA_INT -#define AU1000_I2S_UO_INT 30 +#define AU1000_I2S_UO_INT 30 /* au1000 */ #define AU1000_AC97C_INT 31 #define AU1000_LAST_INTC0_INT AU1000_AC97C_INT #define AU1000_GPIO_0 32 @@ -250,6 +261,8 @@ #define AU1000_GPIO_13 45 #define AU1000_GPIO_14 46 #define AU1000_GPIO_15 47 + +/* Au1000 only */ #define AU1000_GPIO_16 48 #define AU1000_GPIO_17 49 #define AU1000_GPIO_18 50 @@ -266,52 +279,71 @@ #define AU1000_GPIO_29 61 #define AU1000_GPIO_30 62 #define AU1000_GPIO_31 63 + +/* Au1500 only */ +#define AU1500_GPIO_200 48 +#define AU1500_GPIO_201 49 +#define AU1500_GPIO_202 50 +#define AU1500_GPIO_203 51 +#define AU1500_GPIO_20 52 +#define AU1500_GPIO_204 53 +#define AU1500_GPIO_205 54 +#define AU1500_GPIO_23 55 +#define AU1500_GPIO_24 56 +#define AU1500_GPIO_25 57 +#define AU1500_GPIO_26 58 +#define AU1500_GPIO_27 59 +#define AU1500_GPIO_28 60 +#define AU1500_GPIO_206 61 +#define AU1500_GPIO_207 62 +#define AU1500_GPIO_208_215 63 + #define AU1000_MAX_INTR 63 /* Programmable Counters 0 and 1 */ -#define PC_BASE 0xB1900000 -#define PC_COUNTER_CNTRL (PC_BASE + 0x14) - #define PC_CNTRL_E1S (1<<23) - #define PC_CNTRL_T1S (1<<20) - #define PC_CNTRL_M21 (1<<19) - #define PC_CNTRL_M11 (1<<18) - #define PC_CNTRL_M01 (1<<17) - #define PC_CNTRL_C1S (1<<16) - #define PC_CNTRL_BP (1<<14) - #define PC_CNTRL_EN1 (1<<13) - #define PC_CNTRL_BT1 (1<<12) - #define PC_CNTRL_EN0 (1<<11) - #define PC_CNTRL_BT0 (1<<10) - #define PC_CNTRL_E0 (1<<8) - #define PC_CNTRL_E0S (1<<7) - #define PC_CNTRL_32S (1<<5) - #define PC_CNTRL_T0S (1<<4) - #define PC_CNTRL_M20 (1<<3) - #define PC_CNTRL_M10 (1<<2) - #define PC_CNTRL_M00 (1<<1) - #define PC_CNTRL_C0S (1<<0) +#define SYS_BASE 0xB1900000 +#define SYS_COUNTER_CNTRL (SYS_BASE + 0x14) + #define SYS_CNTRL_E1S (1<<23) + #define SYS_CNTRL_T1S (1<<20) + #define SYS_CNTRL_M21 (1<<19) + #define SYS_CNTRL_M11 (1<<18) + #define SYS_CNTRL_M01 (1<<17) + #define SYS_CNTRL_C1S (1<<16) + #define SYS_CNTRL_BP (1<<14) + #define SYS_CNTRL_EN1 (1<<13) + #define SYS_CNTRL_BT1 (1<<12) + #define SYS_CNTRL_EN0 (1<<11) + #define SYS_CNTRL_BT0 (1<<10) + #define SYS_CNTRL_E0 (1<<8) + #define SYS_CNTRL_E0S (1<<7) + #define SYS_CNTRL_32S (1<<5) + #define SYS_CNTRL_T0S (1<<4) + #define SYS_CNTRL_M20 (1<<3) + #define SYS_CNTRL_M10 (1<<2) + #define SYS_CNTRL_M00 (1<<1) + #define SYS_CNTRL_C0S (1<<0) /* Programmable Counter 0 Registers */ -#define PC0_TRIM (PC_BASE + 0) -#define PC0_COUNTER_WRITE (PC_BASE + 4) -#define PC0_MATCH0 (PC_BASE + 8) -#define PC0_MATCH1 (PC_BASE + 0xC) -#define PC0_MATCH2 (PC_BASE + 0x10) -#define PC0_COUNTER_READ (PC_BASE + 0x40) +#define SYS_TOYTRIM (SYS_BASE + 0) +#define SYS_TOYWRITE (SYS_BASE + 4) +#define SYS_TOYMATCH0 (SYS_BASE + 8) +#define SYS_TOYMATCH1 (SYS_BASE + 0xC) +#define SYS_TOYMATCH2 (SYS_BASE + 0x10) +#define SYS_TOYREAD (SYS_BASE + 0x40) /* Programmable Counter 1 Registers */ -#define PC1_TRIM (PC_BASE + 0x44) -#define PC1_COUNTER_WRITE (PC_BASE + 0x48) -#define PC1_MATCH0 (PC_BASE + 0x4C) -#define PC1_MATCH1 (PC_BASE + 0x50) -#define PC1_MATCH2 (PC_BASE + 0x54) -#define PC1_COUNTER_READ (PC_BASE + 0x58) +#define SYS_RTCTRIM (SYS_BASE + 0x44) +#define SYS_RTCWRITE (SYS_BASE + 0x48) +#define SYS_RTCMATCH0 (SYS_BASE + 0x4C) +#define SYS_RTCMATCH1 (SYS_BASE + 0x50) +#define SYS_RTCMATCH2 (SYS_BASE + 0x54) +#define SYS_RTCREAD (SYS_BASE + 0x58) /* I2S Controller */ -#define I2S_DATA 0xB1000000 -#define I2S_CONFIG_STATUS 0xB1000001 -#define I2S_CONTROL 0xB1000002 +#define I2S_DATA 0xB1000000 +#define I2S_CONFIG 0xB1000001 +#define I2S_ENABLE 0xB1000002 /* USB Host Controller */ // We pass USB_OHCI_BASE to ioremap, so it needs to be a physical address @@ -320,25 +352,25 @@ #define USB_HOST_CONFIG 0xB017fffc /* USB Device Controller */ -#define USB_DEV_EP0_READ_FIFO 0xB0200000 -#define USB_DEV_EP0_WRITE_FIFO 0xB0200004 -#define USB_DEV_EP2_WRITE_FIFO 0xB0200008 -#define USB_DEV_EP3_WRITE_FIFO 0xB020000C -#define USB_DEV_EP4_READ_FIFO 0xB0200010 -#define USB_DEV_EP5_READ_FIFO 0xB0200014 -#define USB_DEV_INT_ENABLE 0xB0200018 -#define USB_DEV_INT_STATUS 0xB020001C +#define USBD_EP0RD 0xB0200000 +#define USBD_EP0WR 0xB0200004 +#define USBD_EP2WR 0xB0200008 +#define USBD_EP3WR 0xB020000C +#define USBD_EP4RD 0xB0200010 +#define USBD_EP5RD 0xB0200014 +#define USBD_INTEN 0xB0200018 +#define USBD_INTSTAT 0xB020001C #define USBDEV_INT_SOF (1<<12) #define USBDEV_INT_HF_BIT 6 #define USBDEV_INT_HF_MASK (0x3f << USBDEV_INT_HF_BIT) #define USBDEV_INT_CMPLT_BIT 0 #define USBDEV_INT_CMPLT_MASK (0x3f << USBDEV_INT_CMPLT_BIT) -#define USB_DEV_CONFIG 0xB0200020 -#define USB_DEV_EP0_CS 0xB0200024 -#define USB_DEV_EP2_CS 0xB0200028 -#define USB_DEV_EP3_CS 0xB020002C -#define USB_DEV_EP4_CS 0xB0200030 -#define USB_DEV_EP5_CS 0xB0200034 +#define USBD_CONFIG 0xB0200020 +#define USBD_EP0CS 0xB0200024 +#define USBD_EP2CS 0xB0200028 +#define USBD_EP3CS 0xB020002C +#define USBD_EP4CS 0xB0200030 +#define USBD_EP5CS 0xB0200034 #define USBDEV_CS_SU (1<<14) #define USBDEV_CS_NAK (1<<13) #define USBDEV_CS_ACK (1<<12) @@ -346,18 +378,18 @@ #define USBDEV_CS_TSIZE_BIT 1 #define USBDEV_CS_TSIZE_MASK (0x3ff << USBDEV_CS_TSIZE_BIT) #define USBDEV_CS_STALL (1<<0) -#define USB_DEV_FIFO0_STATUS 0xB0200040 -#define USB_DEV_FIFO1_STATUS 0xB0200044 -#define USB_DEV_FIFO2_STATUS 0xB0200048 -#define USB_DEV_FIFO3_STATUS 0xB020004C -#define USB_DEV_FIFO4_STATUS 0xB0200050 -#define USB_DEV_FIFO5_STATUS 0xB0200054 +#define USBD_EP0RDSTAT 0xB0200040 +#define USBD_EP0WRSTAT 0xB0200044 +#define USBD_EP2WRSTAT 0xB0200048 +#define USBD_EP3WRSTAT 0xB020004C +#define USBD_EP4RDSTAT 0xB0200050 +#define USBD_EP5RDSTAT 0xB0200054 #define USBDEV_FSTAT_FLUSH (1<<6) #define USBDEV_FSTAT_UF (1<<5) #define USBDEV_FSTAT_OF (1<<4) #define USBDEV_FSTAT_FCNT_BIT 0 #define USBDEV_FSTAT_FCNT_MASK (0x0f << USBDEV_FSTAT_FCNT_BIT) -#define USB_DEV_ENABLE 0xB0200058 +#define USBD_ENABLE 0xB0200058 #define USBDEV_ENABLE (1<<1) #define USBDEV_CE (1<<0) @@ -652,30 +684,38 @@ #define IR_INTERFACE_CONFIG (IRDA_BASE+0x40) /* GPIO */ -#define PIN_FUNCTION 0xB190002C -#define TSTATE_STATE_READ 0xB1900100 -#define TSTATE_STATE_SET 0xB1900100 -#define OUTPUT_STATE_READ 0xB1900108 -#define OUTPUT_STATE_SET 0xB1900108 -#define OUTPUT_STATE_CLEAR 0xB190010C -#define PIN_STATE 0xB1900110 +#define SYS_PINFUNC 0xB190002C +#define SYS_TRIOUTRD 0xB1900100 +#define SYS_TRIOUTCLR 0xB1900100 +#define SYS_OUTPUTRD 0xB1900108 +#define SYS_OUTPUTSET 0xB1900108 +#define SYS_OUTPUTCLR 0xB190010C +#define SYS_PINSTATERD 0xB1900110 + +/* GPIO2, Au1500 only */ +#define GPIO2_BASE 0xB1700000 +#define GPIO2_DIR (GPIO2_BASE + 0) +#define GPIO2_DATA_EN (GPIO2_BASE + 8) +#define GPIO2_PIN_STATE (GPIO2_BASE + 0xC) +#define GPIO2_INT_MASK (GPIO2_BASE + 0x10) +#define GPIO2_CONTROL (GPIO2_BASE + 0x14) /* Power Management */ -#define PM_SCRATCH_0 0xB1900018 -#define PM_SCRATCH_1 0xB190001C -#define PM_WAKEUP_SOURCE_MASK 0xB1900034 -#define PM_ENDIANESS 0xB1900038 -#define PM_POWERUP_CONTROL 0xB190003C -#define PM_WAKEUP_CAUSE 0xB190005C -#define PM_SLEEP_POWER 0xB1900078 -#define PM_SLEEP 0xB190007C +#define SYS_SCRATCH0 0xB1900018 +#define SYS_SCRATCH1 0xB190001C +#define SYS_WAKEMSK 0xB1900034 +#define SYS_ENDIAN 0xB1900038 +#define SYS_POWERCTRL 0xB190003C +#define SYS_WAKESRC 0xB190005C +#define SYS_SLPPWR 0xB1900078 +#define SYS_SLEEP 0xB190007C /* Clock Controller */ -#define FQ_CNTRL_1 0xB1900020 -#define FQ_CNTRL_2 0xB1900024 -#define CLOCK_SOURCE_CNTRL 0xB1900028 -#define CPU_PLL_CNTRL 0xB1900060 -#define AUX_PLL_CNTRL 0xB1900064 +#define SYS_FREQCTRL0 0xB1900020 +#define SYS_FREQCTRL1 0xB1900024 +#define SYS_CLKSRC 0xB1900028 +#define SYS_CPUPLL 0xB1900060 +#define SYS_AUXPLL 0xB1900064 /* AC97 Controller */ #define AC97C_CONFIG 0xB0000000 @@ -707,5 +747,32 @@ #define AC97C_CNTRL 0xB0000010 #define AC97C_RS (1<<1) #define AC97C_CE (1<<0) + +/* Au1500 PCI Controller */ +#define Au1500_CFG_BASE 0xB4005000 // virtual, kseg0 addr +#define Au1500_PCI_CMEM (Au1500_CFG_BASE + 0) +#define Au1500_PCI_CFG (Au1500_CFG_BASE + 4) + #define PCI_ERROR ((1<<22) | (1<<23) | (1<<24) | (1<<25) | (1<<26) | (1<<27)) +#define Au1500_PCI_B2BMASK_CCH (Au1500_CFG_BASE + 8) +#define Au1500_PCI_B2B0_VID (Au1500_CFG_BASE + 0xC) +#define Au1500_PCI_B2B1_ID (Au1500_CFG_BASE + 0x10) +#define Au1500_PCI_MWMASK_DEV (Au1500_CFG_BASE + 0x14) +#define Au1500_PCI_MWBASE_REV_CCL (Au1500_CFG_BASE + 0x18) +#define Au1500_PCI_ERR_ADDR (Au1500_CFG_BASE + 0x1C) +#define Au1500_PCI_SPEC_INTACK (Au1500_CFG_BASE + 0x20) +#define Au1500_PCI_ID (Au1500_CFG_BASE + 0x100) +#define Au1500_PCI_STATCMD (Au1500_CFG_BASE + 0x104) +#define Au1500_PCI_CLASSREV (Au1500_CFG_BASE + 0x108) +#define Au1500_PCI_HDRTYPE (Au1500_CFG_BASE + 0x10C) +#define Au1500_PCI_MBAR (Au1500_CFG_BASE + 0x110) + +#define Au1500_PCI_HDR 0xB4005100 // virtual, kseg0 addr + + /* these are all pseudo physical addresses */ +#define Au1500_EXT_CFG 0x20000000 +#define Au1500_PCI_IO_START 0x70000000 +#define Au1500_PCI_IO_END 0x700FFFFF +#define Au1500_PCI_MEM_START 0x80000000 +#define Au1500_PCI_MEM_END 0x83FFFFFF #endif Index: au1000_pcmcia.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips/au1000_pcmcia.h,v retrieving revision 1.3 retrieving revision 1.4 diff -u -d -r1.3 -r1.4 --- au1000_pcmcia.h 3 Oct 2001 22:49:23 -0000 1.3 +++ au1000_pcmcia.h 15 Feb 2002 19:47:28 -0000 1.4 @@ -84,6 +84,10 @@ int (*configure_socket)(const struct pcmcia_configure *); }; +#ifdef CONFIG_MIPS_PB1000 extern struct pcmcia_low_level pb1000_pcmcia_ops; +#elif defined (CONFIG_MIPS_PB1500) +extern struct pcmcia_low_level pb1500_pcmcia_ops; +#endif #endif /* __ASM_AU1000_PCMCIA_H */ Index: bootinfo.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips/bootinfo.h,v retrieving revision 1.26 retrieving revision 1.27 diff -u -d -r1.26 -r1.27 --- bootinfo.h 12 Feb 2002 18:14:19 -0000 1.26 +++ bootinfo.h 15 Feb 2002 19:47:28 -0000 1.27 @@ -157,6 +157,7 @@ * Valid machtype for group Alchemy */ #define MACH_PB1000 0 /* Au1000-based eval board */ +#define MACH_PB1500 1 /* Au1500-based eval board */ /* * Valid machtype for group IDT Index: pb1000.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips/pb1000.h,v retrieving revision 1.6 retrieving revision 1.7 diff -u -d -r1.6 -r1.7 --- pb1000.h 31 Oct 2001 06:16:24 -0000 1.6 +++ pb1000.h 15 Feb 2002 19:47:28 -0000 1.7 @@ -30,7 +30,7 @@ /* PCMCIA PB1000 specific defines */ #define PCMCIA_MAX_SOCK 0 /* the second socket, 1, is not supported at this time */ -#define AU1000_PCR 0xBE000000 +#define PB1000_PCR 0xBE000000 #define PCR_SLOT_0_VPP0 (1<<0) #define PCR_SLOT_0_VPP1 (1<<1) #define PCR_SLOT_0_VCC0 (1<<2) @@ -43,12 +43,12 @@ #define PCR_SLOT_1_VCC1 (1<<11) #define PCR_SLOT_1_RST (1<<12) -#define AU1000_MDR 0xBE000004 +#define PB1000_MDR 0xBE000004 #define MDR_PI (1<<5) /* pcmcia int latch */ #define MDR_EPI (1<<14) /* enable pcmcia int */ #define MDR_CPI (1<<15) /* clear pcmcia int */ -#define AU1000_ACR1 0xBE000008 +#define PB1000_ACR1 0xBE000008 #define ACR1_SLOT_0_CD1 (1<<0) /* card detect 1 */ #define ACR1_SLOT_0_CD2 (1<<1) /* card detect 2 */ #define ACR1_SLOT_0_READY (1<<2) /* ready */ Index: pb1500.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips/pb1500.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- pb1500.h 4 Dec 2001 03:36:10 -0000 1.1 +++ pb1500.h 15 Feb 2002 19:47:28 -0000 1.2 @@ -27,25 +27,22 @@ #ifndef __ASM_PB1500_H #define __ASM_PB1500_H -/* PCMCIA PB1000 specific defines */ -#define PCMCIA_MAX_SOCK 0 - -/* Voltage levels */ +#define PB1500_IDENT 0xAE000000 +#define PB1500_BOARD_STATUS 0xAE000004 +#define PB1500_PCI_PCMCIA 0xAE000010 + #define PC_DEASSERT_RST 0x80 + #define PC_DRV_EN 0x10 +#define PB1500_G_CONTROL 0xAE000014 +#define PB1500_RST_VDDI 0xAE00001C +#define PB1500_LEDS 0xAE000018 -/* VPPEN1 - VPPEN0 */ -#define VPP_GND ((0<<1) | (0<<0)) -#define VPP_5V ((1<<1) | (0<<0)) -#define VPP_3V ((0<<1) | (1<<0)) -#define VPP_12V ((0<<1) | (1<<0)) -#define VPP_HIZ ((1<<1) | (1<<0)) +#define PB1500_HEX_LED 0xAF000004 +#define PB1500_HEX_LED_BLANK 0xAF000008 -/* VCCEN1 - VCCEN0 */ -#define VCC_3V ((0<<1) | (1<<0)) -#define VCC_5V ((1<<1) | (0<<0)) -#define VCC_HIZ ((0<<1) | (0<<0)) +/* PCMCIA PB1500 specific defines */ +#define PCMCIA_MAX_SOCK 0 /* VPP/VCC */ -#define SET_VCC_VPP(VCC, VPP, SLOT)\ - ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8)) +#define SET_VCC_VPP(VCC, VPP) (((VCC)<<2) | ((VPP)<<0)) #endif /* __ASM_PB1500_H */ |
|
From: Pete P. <pp...@us...> - 2002-02-15 19:47:33
|
Update of /cvsroot/linux-mips/linux/drivers/sound In directory usw-pr-cvs1:/tmp/cvs-serv7382/drivers/sound Modified Files: au1000.c Log Message: * removed runtime copyright prints * Added Pb1500 support (only pcmcia not working at this time) and modified all drivers as necessary * renamed most Au1000 registers to match latest databook * better Au1000 usb hardware fixes for early silicon * updated mtd driver to support Pb1500 partitioning Index: au1000.c =================================================================== RCS file: /cvsroot/linux-mips/linux/drivers/sound/au1000.c,v retrieving revision 1.8 retrieving revision 1.9 diff -u -d -r1.8 -r1.9 --- au1000.c 2 Jan 2002 17:09:47 -0000 1.8 +++ au1000.c 15 Feb 2002 19:47:28 -0000 1.9 @@ -2007,7 +2007,7 @@ #endif /* AU1000_DEBUG */ // configure pins for AC'97 - outl(inl(PIN_FUNCTION) & ~0x02, PIN_FUNCTION); + outl(inl(SYS_PINFUNC) & ~0x02, SYS_PINFUNC); // Assert reset for 10msec to the AC'97 controller, and enable clock outl(AC97C_RS | AC97C_CE, AC97C_CNTRL); |
|
From: Pete P. <pp...@us...> - 2002-02-15 19:47:32
|
Update of /cvsroot/linux-mips/linux/drivers/pcmcia
In directory usw-pr-cvs1:/tmp/cvs-serv7382/drivers/pcmcia
Modified Files:
au1000_generic.c au1000_pb1000.c cs.c
Log Message:
* removed runtime copyright prints
* Added Pb1500 support (only pcmcia not working at this time) and
modified all drivers as necessary
* renamed most Au1000 registers to match latest databook
* better Au1000 usb hardware fixes for early silicon
* updated mtd driver to support Pb1500 partitioning
Index: au1000_generic.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/pcmcia/au1000_generic.c,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -d -r1.5 -r1.6
--- au1000_generic.c 19 Nov 2001 15:48:59 -0000 1.5
+++ au1000_generic.c 15 Feb 2002 19:47:27 -0000 1.6
@@ -60,7 +60,7 @@
#endif
MODULE_AUTHOR("Pete Popov, MontaVista Software <pp...@mv...>");
-MODULE_DESCRIPTION("Linux PCMCIA Card Services: Au1000 Socket Controller");
+MODULE_DESCRIPTION("Linux PCMCIA Card Services: Au1x00 Socket Controller");
#define MAP_SIZE 0x1000000
@@ -139,7 +139,7 @@
unsigned int i;
unsigned long timing3;
- printk("\nAU1000 PCMCIA (CS release %s)\n", CS_RELEASE);
+ printk("\nAu1x00 PCMCIA (CS release %s)\n", CS_RELEASE);
CardServices(GetCardServicesInfo, &info);
@@ -150,6 +150,8 @@
#ifdef CONFIG_MIPS_PB1000
pcmcia_low_level=&pb1000_pcmcia_ops;
+#elif defined(CONFIG_MIPS_PB1500)
+ pcmcia_low_level=&pb1500_pcmcia_ops;
#else
#error Unsupported AU1000 board.
#endif
@@ -162,9 +164,9 @@
/* setup the static bus controller */
timing3 = 0x100e3a07;
- writel(0x00000002, STATIC_CONFIG_3); /* type = PCMCIA */
- writel(timing3, STATIC_TIMING_3);
- writel(0x10000000, STATIC_ADDRESS_3); /* any PCMCIA select */
+ writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */
+ writel(timing3, MEM_STTIME3);
+ writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */
au_sync_delay(1);
pcmcia_socket =
Index: au1000_pb1000.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/pcmcia/au1000_pb1000.c,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- au1000_pb1000.c 4 Oct 2001 21:16:48 -0000 1.3
+++ au1000_pb1000.c 15 Feb 2002 19:47:27 -0000 1.4
@@ -63,14 +63,14 @@
u32 pcr;
pcr = PCR_SLOT_0_RST | PCR_SLOT_1_RST;
- writel(0x8000, AU1000_MDR); /* clear pcmcia interrupt */
+ writel(0x8000, PB1000_MDR); /* clear pcmcia interrupt */
au_sync_delay(100);
- writel(0x4000, AU1000_MDR); /* enable pcmcia interrupt */
+ writel(0x4000, PB1000_MDR); /* enable pcmcia interrupt */
au_sync();
pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,0);
pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,1);
- writew(pcr, AU1000_PCR);
+ writew(pcr, PB1000_PCR);
au_sync_delay(20);
/* There's two sockets, but only the first one, 0, is used and tested */
@@ -83,7 +83,7 @@
pcr = PCR_SLOT_0_RST | PCR_SLOT_1_RST;
pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,0);
pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,1);
- writew(pcr, AU1000_PCR);
+ writew(pcr, PB1000_PCR);
au_sync_delay(20);
return 0;
}
@@ -94,8 +94,8 @@
u16 levels, pcr;
unsigned char vs;
- levels = readw(AU1000_ACR1);
- pcr = readw(AU1000_PCR);
+ levels = readw(PB1000_ACR1);
+ pcr = readw(PB1000_PCR);
state->ready = 0;
state->vs_Xv = 0;
@@ -178,7 +178,7 @@
if(configure->sock > PCMCIA_MAX_SOCK) return -1;
- pcr = readw(AU1000_PCR);
+ pcr = readw(PB1000_PCR);
if (configure->sock == 0) {
pcr &= ~(PCR_SLOT_0_VCC0 | PCR_SLOT_0_VCC1 |
@@ -190,9 +190,10 @@
}
pcr &= ~PCR_SLOT_0_RST;
- writew(pcr, AU1000_PCR);
+ /*
+ writew(pcr, PB1000_PCR);
au_sync_delay(200);
-
+ */
DEBUG(KERN_INFO "Vcc %dV Vpp %dV, pcr %x\n",
configure->vcc, configure->vpp, pcr);
switch(configure->vcc){
@@ -287,17 +288,17 @@
break;
}
- writew(pcr, AU1000_PCR);
+ writew(pcr, PB1000_PCR);
au_sync_delay(300);
- writew(pcr | PCR_SLOT_0_RST, AU1000_PCR);
+ writew(pcr | PCR_SLOT_0_RST, PB1000_PCR);
au_sync_delay(100);
pcr &= ~(PCR_SLOT_0_RST);
if (configure->reset) {
pcr |= PCR_SLOT_0_RST;
}
- writew(pcr, AU1000_PCR);
+ writew(pcr, PB1000_PCR);
au_sync_delay(100);
return 0;
}
Index: cs.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/pcmcia/cs.c,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- cs.c 18 Dec 2001 04:14:21 -0000 1.7
+++ cs.c 15 Feb 2002 19:47:27 -0000 1.8
@@ -821,7 +821,7 @@
return 1;
for (i = 0; i < MAX_IO_WIN; i++) {
if (s->io[i].NumPorts == 0) {
- if (find_io_region(base, num, align, name) == 0) {
+ if (find_io_region(base, num, align, name, s) == 0) {
s->io[i].Attributes = attr;
s->io[i].BasePort = *base;
s->io[i].NumPorts = s->io[i].InUse = num;
@@ -833,7 +833,7 @@
/* Try to extend top of window */
try = s->io[i].BasePort + s->io[i].NumPorts;
if ((*base == 0) || (*base == try))
- if (find_io_region(&try, num, 0, name) == 0) {
+ if (find_io_region(&try, num, 0, name, s) == 0) {
*base = try;
s->io[i].NumPorts += num;
s->io[i].InUse += num;
@@ -842,7 +842,7 @@
/* Try to extend bottom of window */
try = s->io[i].BasePort - num;
if ((*base == 0) || (*base == try))
- if (find_io_region(&try, num, 0, name) == 0) {
+ if (find_io_region(&try, num, 0, name, s) == 0) {
s->io[i].BasePort = *base = try;
s->io[i].NumPorts += num;
s->io[i].InUse += num;
@@ -2012,7 +2012,7 @@
find_mem_region(&win->base, win->size, align,
(req->Attributes & WIN_MAP_BELOW_1MB) ||
!(s->cap.features & SS_CAP_PAGE_REGS),
- (*handle)->dev_info))
+ (*handle)->dev_info, s))
return CS_IN_USE;
(*handle)->state |= CLIENT_WIN_REQ(w);
|
|
From: Pete P. <pp...@us...> - 2002-02-15 19:47:32
|
Update of /cvsroot/linux-mips/linux/drivers/net
In directory usw-pr-cvs1:/tmp/cvs-serv7382/drivers/net
Modified Files:
au1000_eth.c
Log Message:
* removed runtime copyright prints
* Added Pb1500 support (only pcmcia not working at this time) and
modified all drivers as necessary
* renamed most Au1000 registers to match latest databook
* better Au1000 usb hardware fixes for early silicon
* updated mtd driver to support Pb1500 partitioning
Index: au1000_eth.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/net/au1000_eth.c,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- au1000_eth.c 4 Dec 2001 03:05:58 -0000 1.7
+++ au1000_eth.c 15 Feb 2002 19:47:27 -0000 1.8
@@ -242,24 +242,11 @@
int lsi_80227_init(struct net_device *dev, int phy_addr)
{
- s16 mii_status = 0x0, timeout;
-
if (au1000_debug > 4)
printk("lsi_80227_init\n");
/* restart auto-negotiation */
mdio_write(dev, phy_addr, 0, 0x3200);
- /* wait for auto-negotiation ack */
- for (timeout = 4000; timeout > 0; --timeout) {
- mii_status = mdio_read(dev, phy_addr, MII_STATUS);
- if (mii_status & MII_STAT_AUTO_DONE)
- break;
- mdelay(1);
- }
- if (!(mii_status & MII_STAT_AUTO_DONE)) {
- printk(KERN_ERR "%s PHY auto-negotiation timeout !\n",
- dev->name);
- }
/* set up LEDs to correct display */
mdio_write(dev, phy_addr, 17, 0xffc0);
@@ -765,7 +752,7 @@
* will hang */
*aup->enable = MAC_EN_CLOCK_ENABLE;
au_sync_delay(2);
- *aup->enable |= MAC_EN_RESET0 | MAC_EN_RESET1 |
+ *aup->enable = MAC_EN_RESET0 | MAC_EN_RESET1 |
MAC_EN_RESET2 | MAC_EN_CLOCK_ENABLE;
au_sync_delay(2);
|
|
From: Pete P. <pp...@us...> - 2002-02-15 19:47:32
|
Update of /cvsroot/linux-mips/linux/drivers/char
In directory usw-pr-cvs1:/tmp/cvs-serv7382/drivers/char
Modified Files:
au1000_gpio.c
Log Message:
* removed runtime copyright prints
* Added Pb1500 support (only pcmcia not working at this time) and
modified all drivers as necessary
* renamed most Au1000 registers to match latest databook
* better Au1000 usb hardware fixes for early silicon
* updated mtd driver to support Pb1500 partitioning
Index: au1000_gpio.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/char/au1000_gpio.c,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -d -r1.6 -r1.7
--- au1000_gpio.c 20 Nov 2001 01:52:22 -0000 1.6
+++ au1000_gpio.c 15 Feb 2002 19:47:27 -0000 1.7
@@ -68,7 +68,7 @@
u32 get_au1000_avail_gpio_mask(void)
{
int i;
- u32 pinfunc = inl(PIN_FUNCTION);
+ u32 pinfunc = inl(SYS_PINFUNC);
u32 avail_mask = 0; // start with no gpio available
// first, check for GPIO's reprogrammed as peripheral pins
@@ -81,8 +81,8 @@
}
// check for GPIO's used as interrupt sources
- avail_mask &= ~(inl(INTC1_MASK_READ) &
- (inl(INTC1_CONFIG0_READ) | inl(INTC1_CONFIG1_READ)));
+ avail_mask &= ~(inl(IC1_MASKRD) &
+ (inl(IC1_CFG0RD) | inl(IC1_CFG1RD)));
#ifdef CONFIG_USB_OHCI
avail_mask &= ~((1<<4) | (1<<11));
@@ -104,7 +104,7 @@
data &= get_au1000_avail_gpio_mask();
if (data)
- outl(data, TSTATE_STATE_SET);
+ outl(data, SYS_TRIOUTCLR);
return 0;
}
@@ -117,7 +117,7 @@
*/
int au1000gpio_in(u32 *data)
{
- *data = inl(PIN_STATE);
+ *data = inl(SYS_PINSTATERD);
return 0;
}
@@ -130,7 +130,7 @@
data &= get_au1000_avail_gpio_mask();
if (data)
- outl(data, OUTPUT_STATE_SET);
+ outl(data, SYS_OUTPUTSET);
return 0;
}
@@ -139,7 +139,7 @@
data &= get_au1000_avail_gpio_mask();
if (data)
- outl(data, OUTPUT_STATE_CLEAR);
+ outl(data, SYS_OUTPUTCLR);
return 0;
}
|
|
From: Pete P. <pp...@us...> - 2002-02-15 19:47:32
|
Update of /cvsroot/linux-mips/linux/arch/mips/mm In directory usw-pr-cvs1:/tmp/cvs-serv7382/arch/mips/mm Modified Files: tlbex-r4k.S Log Message: * removed runtime copyright prints * Added Pb1500 support (only pcmcia not working at this time) and modified all drivers as necessary * renamed most Au1000 registers to match latest databook * better Au1000 usb hardware fixes for early silicon * updated mtd driver to support Pb1500 partitioning Index: tlbex-r4k.S =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/tlbex-r4k.S,v retrieving revision 1.5 retrieving revision 1.6 diff -u -d -r1.5 -r1.6 --- tlbex-r4k.S 12 Feb 2002 18:14:19 -0000 1.5 +++ tlbex-r4k.S 15 Feb 2002 19:47:27 -0000 1.6 @@ -527,6 +527,15 @@ END(handle_mod) #ifdef CONFIG_MIPS_AU1000 + +#ifdef CONFIG_MIPS_PB1500 +#define PSEUDO_ADDR_BASE 0x20000000 +#endif + +#ifdef CONFIG_MIPS_PB1000 +#define PSEUDO_ADDR_BASE 0xC0000000 +#endif + /* * On entry k0 contains the pte with the pseudo address. * On exit, k0 contains the "real" address, which is a @@ -539,6 +548,7 @@ */ LEAF(get_real_pte) .set mips3 + .set at li k1, 0xe0000000 # check lcd bltu k0, k1, check_pcmcia_socket_1 @@ -546,6 +556,10 @@ # lcd pseudo access li k1, 0x0fffffff and k0, k0, k1 # get offset +#ifdef CONFIG_MIPS_PB1500 + lui k1, 0x1b00 + addu k0, k0, k1 +#endif srl k0, k0, 6 lui k1, 0xe000>>2 or k0, k0, k1 @@ -590,6 +604,10 @@ j ra # done nop io_access: +#ifdef CONFIG_MIPS_PB1500 + li k1, 0xC0000000 + bltu k0, k1, pci_access +#endif # handle pseudo io access li k1, 0x00ffffff and k0, k0, k1 # get access offset @@ -599,6 +617,36 @@ or k0, k0, k1 j ra # done nop +#ifdef CONFIG_MIPS_PB1500 +pci_access: + li k1, 0x80000000 + bltu k0, k1, pci_io_access + lui k1, 0x4000>>2 + # handle pseudo pci mem access + srl k0, k0, 6 + or k0, k0, k1 + j ra # done + nop +pci_io_access: + li k1, 0x70000000 + bltu k0, k1, pci_cfg_access + lui k1, 0x5000>>2 + # handle pseudo pci io access + srl k0, k0, 6 + or k0, k0, k1 + j ra # done + nop +pci_cfg_access: + # handle pseudo pci ext cfg access + li k1, 0x0fffffff + and k0, k0, k1 # get access offset + srl k0, k0, 6 + lui k1, 0x6000>>2 + or k0, k0, k1 + j ra # done + nop +#endif + .set noat END(get_real_pte) /* @@ -607,12 +655,14 @@ LEAF(translate_pte) .set mips3 lui k0, %hi(__saved_at) + .set noat sw $at, %lo(__saved_at)(k0) # save at + .set at sw k1, %lo(__saved_pte)(k0) # save pte pointer sw ra, %lo(__saved_ra)(k0) # save ra lw k0, 0(k1) # get even pte - li k1, 0xC0000000 # check pseudo addr + li k1, PSEUDO_ADDR_BASE # check pseudo addr bltu k0, k1, 1f nop bal get_real_pte @@ -622,13 +672,13 @@ 1: srl k0, k0, 6 2: - P_MTC0 k0, CP0_ENTRYLO0 # load it + mtc0 k0, CP0_ENTRYLO0 # load it lui k1, %hi(__saved_pte) lw k1, %lo(__saved_pte)(k1) # recover pte pointer lw k0, 4(k1) # get odd pte - li k1, 0xC0000000 # check pseudo addr + li k1, PSEUDO_ADDR_BASE # check pseudo addr bltu k0, k1, 1f nop bal get_real_pte @@ -639,15 +689,18 @@ 1: srl k0, k0, 6 # convert to entrylo0 2: - P_MTC0 k0, CP0_ENTRYLO1 # load it + mtc0 k0, CP0_ENTRYLO1 # load it nop b 1f tlbwr # write random tlb entry 1: lui k0, %hi(__saved_at) + .set noat lw $at, %lo(__saved_at)(k0) # restore at + .set at lw ra, %lo(__saved_ra)(k0) # restore ra eret # return from trap + .set noat END(translate_pte) __saved_at: PTR 0 |
|
From: Pete P. <pp...@us...> - 2002-02-15 19:47:32
|
Update of /cvsroot/linux-mips/linux/drivers/mtd/maps
In directory usw-pr-cvs1:/tmp/cvs-serv7382/drivers/mtd/maps
Modified Files:
Config.in Makefile pb1xxx-flash.c
Log Message:
* removed runtime copyright prints
* Added Pb1500 support (only pcmcia not working at this time) and
modified all drivers as necessary
* renamed most Au1000 registers to match latest databook
* better Au1000 usb hardware fixes for early silicon
* updated mtd driver to support Pb1500 partitioning
Index: Config.in
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/mtd/maps/Config.in,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- Config.in 28 Nov 2001 22:50:42 -0000 1.1
+++ Config.in 15 Feb 2002 19:47:27 -0000 1.2
@@ -37,7 +37,12 @@
fi
if [ "$CONFIG_MIPS" = "y" ]; then
- dep_tristate ' Alchemy Pb1000 boot flash device' CONFIG_MTD_PB1000 $CONFIG_MIPS_PB1000
+ dep_tristate ' Pb1000 boot flash device' CONFIG_MTD_PB1000 $CONFIG_MIPS_PB1000
+ dep_tristate ' Pb1500 MTD support' CONFIG_MTD_PB1500 $CONFIG_MIPS_PB1500
+ if [ "$CONFIG_MTD_PB1500" = "y" -o "$CONFIG_MTD_PB1500" = "m" ]; then
+ bool ' Pb1500 boot flash device' CONFIG_MTD_PB1500_BOOT
+ bool ' Pb1500 user flash device (2nd 32MB bank)' CONFIG_MTD_PB1500_USER
+ fi
dep_tristate ' Flash chip mapping on ITE QED-4N-S01B, Globespan IVR or custom board' CONFIG_MTD_CSTM_MIPS_IXX $CONFIG_MTD_CFI $CONFIG_MTD_JEDEC $CONFIG_MTD_PARTITIONS
if [ "$CONFIG_MTD_CSTM_MIPS_IXX" = "y" -o "$CONFIG_MTD_CSTM_MIPS_IXX" = "m" ]; then
hex ' Physical start address of flash mapping' CONFIG_MTD_CSTM_MIPS_IXX_START 0x8000000
Index: Makefile
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/mtd/maps/Makefile,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- Makefile 28 Nov 2001 22:50:42 -0000 1.1
+++ Makefile 15 Feb 2002 19:47:27 -0000 1.2
@@ -30,5 +30,6 @@
obj-$(CONFIG_MTD_OCELOT) += ocelot.o
obj-$(CONFIG_MTD_SOLUTIONENGINE)+= solutionengine.o
obj-$(CONFIG_MTD_PB1000) += pb1xxx-flash.o
+obj-$(CONFIG_MTD_PB1500) += pb1xxx-flash.o
include $(TOPDIR)/Rules.make
Index: pb1xxx-flash.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/mtd/maps/pb1xxx-flash.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- pb1xxx-flash.c 28 Nov 2001 22:50:42 -0000 1.1
+++ pb1xxx-flash.c 15 Feb 2002 19:47:27 -0000 1.2
@@ -3,6 +3,7 @@
*
* (C) 2001 Pete Popov <pp...@mv...>
*
+ * $Id$
*/
#include <linux/config.h>
@@ -15,50 +16,73 @@
#include <linux/mtd/partitions.h>
#include <asm/io.h>
+#include <asm/au1000.h>
+
+#ifdef DEBUG_RW
+#define DBG(x...) printk(x)
+#else
+#define DBG(x...)
+#endif
+#ifdef CONFIG_MIPS_PB1000
#define WINDOW_ADDR 0x1F800000
#define WINDOW_SIZE 0x800000
+#endif
__u8 physmap_read8(struct map_info *map, unsigned long ofs)
{
- return __raw_readb(map->map_priv_1 + ofs);
+ __u8 ret;
+ ret = __raw_readb(map->map_priv_1 + ofs);
+ DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
+ return ret;
}
__u16 physmap_read16(struct map_info *map, unsigned long ofs)
{
- return __raw_readw(map->map_priv_1 + ofs);
+ __u16 ret;
+ ret = __raw_readw(map->map_priv_1 + ofs);
+ DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
+ return ret;
}
__u32 physmap_read32(struct map_info *map, unsigned long ofs)
{
- return __raw_readl(map->map_priv_1 + ofs);
+ __u32 ret;
+ ret = __raw_readl(map->map_priv_1 + ofs);
+ DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
+ return ret;
}
void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
{
+ DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
memcpy_fromio(to, map->map_priv_1 + from, len);
}
void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
{
+ DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
__raw_writeb(d, map->map_priv_1 + adr);
mb();
}
void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
{
+ DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
__raw_writew(d, map->map_priv_1 + adr);
mb();
}
void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
{
+ DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
__raw_writel(d, map->map_priv_1 + adr);
mb();
}
void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
{
+ DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
memcpy_toio(map->map_priv_1 + to, from, len);
}
@@ -66,8 +90,6 @@
static struct map_info pb1xxx_map = {
name: "Pb1xxx flash",
- size: 0x800000,
- buswidth: 4,
read8: physmap_read8,
read16: physmap_read16,
read32: physmap_read32,
@@ -81,15 +103,16 @@
#ifdef CONFIG_MIPS_PB1000
-static unsigned long pb1000_max_flash_size = 0x00800000;
-static struct mtd_partition pb1000_partitions[] = {
+static unsigned long flash_size = 0x00800000;
+static unsigned char flash_buswidth = 4;
+static struct mtd_partition pb1xxx_partitions[] = {
{
name: "yamon env",
size: 0x00020000,
offset: 0,
mask_flags: MTD_WRITEABLE
},{
- name: "jffs/2",
+ name: "User FS",
size: 0x003e0000,
offset: 0x20000,
},{
@@ -103,6 +126,72 @@
offset: 0x500000
}
};
+
+#elif defined(CONFIG_MIPS_PB1500)
+
+static unsigned char flash_buswidth = 4;
+#if defined(CONFIG_MTD_PB1500_BOOT) && defined(CONFIG_MTD_PB1500_USER)
+/* both 32MB banks will be used. Combine the first 32MB bank and the
+ * first 28MB of the second bank together into a single jffs/jffs2
+ * partition.
+ */
+static unsigned long flash_size = 0x04000000;
+#define WINDOW_ADDR 0x1C000000
+#define WINDOW_SIZE 0x4000000
+static struct mtd_partition pb1xxx_partitions[] = {
+ {
+ name: "User FS",
+ size: 0x3c00000,
+ offset: 0x0000000
+ },{
+ name: "yamon",
+ size: 0x0100000,
+ offset: 0x3c00000,
+ mask_flags: MTD_WRITEABLE
+ },{
+ name: "raw kernel",
+ size: 0x02c0000,
+ offset: 0x3d00000
+ }
+};
+#elif defined(CONFIG_MTD_PB1500_BOOT) && !defined(CONFIG_MTD_PB1500_USER)
+static unsigned long flash_size = 0x02000000;
+#define WINDOW_ADDR 0x1E000000
+#define WINDOW_SIZE 0x2000000
+static struct mtd_partition pb1xxx_partitions[] = {
+ {
+ name: "User FS",
+ size: 0x1c00000,
+ offset: 0x0000000
+ },{
+ name: "yamon",
+ size: 0x0100000,
+ offset: 0x1c00000,
+ mask_flags: MTD_WRITEABLE
+ },{
+ name: "raw kernel",
+ size: 0x02c0000,
+ offset: 0x1d00000
+ }
+};
+#elif !defined(CONFIG_MTD_PB1500_BOOT) && defined(CONFIG_MTD_PB1500_USER)
+static unsigned long flash_size = 0x02000000;
+#define WINDOW_ADDR 0x1C000000
+#define WINDOW_SIZE 0x2000000
+static struct mtd_partition pb1xxx_partitions[] = {
+ {
+ name: "User FS",
+ size: 0x1e00000,
+ offset: 0x0000000
+ },{
+ name: "raw kernel",
+ size: 0x0200000,
+ offset: 0x1e00000,
+ }
+};
+#else
+#error MTD_PB1500 define combo error /* should never happen */
+#endif
#else
#error Unsupported board
#endif
@@ -117,21 +206,18 @@
{
struct mtd_partition *parts;
int nb_parts = 0;
- int parsed_nr_parts = 0;
char *part_type;
/* Default flash buswidth */
- pb1xxx_map.buswidth = 4;
+ pb1xxx_map.buswidth = flash_buswidth;
/*
* Static partition definition selection
*/
part_type = "static";
-#ifdef CONFIG_MIPS_PB1000
- parts = pb1000_partitions;
- nb_parts = NB_OF(pb1000_partitions);
-#endif
- pb1xxx_map.size = 4;
+ parts = pb1xxx_partitions;
+ nb_parts = NB_OF(pb1xxx_partitions);
+ pb1xxx_map.size = flash_size;
/*
* Now let's probe for the actual flash. Do it here since
@@ -142,8 +228,7 @@
pb1xxx_map.map_priv_1 =
(unsigned long)ioremap(WINDOW_ADDR, WINDOW_SIZE);
mymtd = do_map_probe("cfi_probe", &pb1xxx_map);
- if (!mymtd)
- return -ENXIO;
+ if (!mymtd) return -ENXIO;
mymtd->module = THIS_MODULE;
add_mtd_partitions(mymtd, parts, nb_parts);
|
|
From: Pete P. <pp...@us...> - 2002-02-15 19:47:31
|
Update of /cvsroot/linux-mips/linux/arch/mips/kernel In directory usw-pr-cvs1:/tmp/cvs-serv7382/arch/mips/kernel Modified Files: proc.c Log Message: * removed runtime copyright prints * Added Pb1500 support (only pcmcia not working at this time) and modified all drivers as necessary * renamed most Au1000 registers to match latest databook * better Au1000 usb hardware fixes for early silicon * updated mtd driver to support Pb1500 partitioning Index: proc.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/proc.c,v retrieving revision 1.13 retrieving revision 1.14 diff -u -d -r1.13 -r1.14 --- proc.c 4 Jan 2002 18:04:53 -0000 1.13 +++ proc.c 15 Feb 2002 19:47:27 -0000 1.14 @@ -86,8 +86,11 @@ /* * For the first processor also print the system type */ +#if 0 if (n == 0) seq_printf(m, "system type\t\t: %s\n", get_system_type()); +#endif + seq_printf(m, "processor\t\t: %ld\n", n); sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n", |
|
From: Pete P. <pp...@us...> - 2002-02-15 19:47:31
|
Update of /cvsroot/linux-mips/linux/arch/mips/au1000/pb1500
In directory usw-pr-cvs1:/tmp/cvs-serv7382/arch/mips/au1000/pb1500
Modified Files:
init.c pci_fixup.c pci_ops.c setup.c
Log Message:
* removed runtime copyright prints
* Added Pb1500 support (only pcmcia not working at this time) and
modified all drivers as necessary
* renamed most Au1000 registers to match latest databook
* better Au1000 usb hardware fixes for early silicon
* updated mtd driver to support Pb1500 partitioning
Index: init.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/pb1500/init.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- init.c 4 Dec 2001 03:17:17 -0000 1.1
+++ init.c 15 Feb 2002 19:47:26 -0000 1.2
@@ -44,6 +44,11 @@
extern void __init prom_init_cmdline(void);
extern char *prom_getenv(char *envname);
+const char *get_system_type(void)
+{
+ return "Alchemy Pb1500";
+}
+
int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
{
unsigned char *memsize_str;
@@ -54,7 +59,7 @@
prom_envp = envp;
mips_machgroup = MACH_GROUP_ALCHEMY;
- mips_machtype = MACH_PB1000;
+ mips_machtype = MACH_PB1500;
prom_init_cmdline();
memsize_str = prom_getenv("memsize");
Index: pci_fixup.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/pb1500/pci_fixup.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- pci_fixup.c 4 Dec 2001 03:17:17 -0000 1.1
+++ pci_fixup.c 15 Feb 2002 19:47:26 -0000 1.2
@@ -2,7 +2,7 @@
* BRIEF MODULE DESCRIPTION
* Board specific pci fixups.
*
- * Copyright 2001 MontaVista Software Inc.
+ * Copyright 2001,2002 MontaVista Software Inc.
* Author: MontaVista Software, Inc.
* pp...@mv... or so...@mv...
*
@@ -45,6 +45,9 @@
#define DBG(x...)
#endif
+static void fixup_resource(int r_num, struct pci_dev *dev) ;
+static unsigned long virt_io_addr;
+
void __init pcibios_fixup_resources(struct pci_dev *dev)
{
/* will need to fixup IO resources */
@@ -52,6 +55,24 @@
void __init pcibios_fixup(void)
{
+ int i;
+ struct pci_dev *dev;
+
+ virt_io_addr = (unsigned long)ioremap(Au1500_PCI_IO_START,
+ Au1500_PCI_IO_END - Au1500_PCI_IO_START + 1);
+
+ if (!virt_io_addr) {
+ printk(KERN_ERR "Unable to ioremap pci space\n");
+ return;
+ }
+
+ pci_for_each_dev(dev) {
+ for (i=0; i < DEVICE_COUNT_RESOURCE; i++) {
+ if (dev->resource[i].start) {
+ fixup_resource(i, dev);
+ }
+ }
+ }
}
void __init pcibios_fixup_irqs(void)
@@ -61,10 +82,38 @@
struct pci_dev *dev;
pci_for_each_dev(dev) {
+ if (dev->bus->number != 0)
+ return;
+
+ dev->irq = 0xff;
+ slot = PCI_SLOT(dev->devfn);
+ switch (slot) {
+ case 12:
+ case 13:
+ dev->irq = AU1000_PCI_INTA;
+ break;
+
+ }
+ pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
+ DBG("slot %d irq %d\n", slot, dev->irq);
}
}
unsigned int pcibios_assign_all_busses(void)
{
return 0;
}
+
+static void fixup_resource(int r_num, struct pci_dev *dev)
+{
+ unsigned long start, size, new_start;
+
+ if (dev->resource[r_num].flags & IORESOURCE_IO) {
+ start = dev->resource[r_num].start;
+ size = dev->resource[r_num].end - start;
+ new_start = virt_io_addr + (start - Au1500_PCI_IO_START);
+ dev->resource[r_num].start = new_start;
+ dev->resource[r_num].end = new_start + size;
+ }
+}
+
#endif
Index: pci_ops.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/pb1500/pci_ops.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- pci_ops.c 4 Dec 2001 03:17:17 -0000 1.1
+++ pci_ops.c 15 Feb 2002 19:47:26 -0000 1.2
@@ -2,7 +2,7 @@
* BRIEF MODULE DESCRIPTION
* Pb1500 specific pci support.
*
- * Copyright 2001 MontaVista Software Inc.
+ * Copyright 2001,2002 MontaVista Software Inc.
* Author: MontaVista Software, Inc.
* pp...@mv... or so...@mv...
*
@@ -52,40 +52,101 @@
/* TBD */
static struct resource pci_io_resource = {
"pci IO space",
- 0,
- 0,
+ Au1500_PCI_IO_START,
+ Au1500_PCI_IO_END,
IORESOURCE_IO
};
static struct resource pci_mem_resource = {
"pci memory space",
- 0,
- 0,
+ Au1500_PCI_MEM_START,
+ Au1500_PCI_MEM_END,
IORESOURCE_MEM
};
extern struct pci_ops pb1500_pci_ops;
struct pci_channel mips_pci_channels[] = {
- {&pb1500_pci_ops, &pci_io_resource, &pci_mem_resource, 0, 1},
+ {&pb1500_pci_ops, &pci_io_resource, &pci_mem_resource, (10<<3),(16<<3)},
{(struct pci_ops *) NULL, (struct resource *) NULL,
(struct resource *) NULL, (int) NULL, (int) NULL}
};
-
-/*
- * "Bus 2" is really the first and only external slot on the pb1000.
- * We'll call that bus 0, and limit the accesses to that single
- * external slot only. The SDRAM is already initialized in setup.c.
- */
+static unsigned long cfg_addr;
static int config_access(unsigned char access_type, struct pci_dev *dev,
unsigned char where, u32 * data)
{
unsigned char bus = dev->bus->number;
- unsigned char dev_fn = dev->devfn;
- unsigned long config;
+ unsigned int dev_fn = dev->devfn;
+ unsigned int device, function;
+ unsigned long config, status;
+ static int first = 1;
- /* TBD */
+ /*
+ * 7:3 = slot
+ * 2:0 = function
+ */
+
+ if (bus != 0) {
+ *data = 0xffffffff;
+ return -1;
+ }
+
+ if (first) {
+ first = 0;
+ cfg_addr = ioremap(Au1500_EXT_CFG, 0x10000000);
+ if (!cfg_addr)
+ printk (KERN_ERR "PCI unable to ioremap cfg space\n");
+ }
+
+ device = (dev_fn >> 3) & 0x1f;
+ function = dev_fn & 0x7;
+
+#if 1
+ //if (!cfg_addr || (device < 10) || (device > 16)) {
+ if (!cfg_addr || (device > 16)) {
+ *data = 0xffffffff;
+ return -1;
+ }
+#endif
+
+ writel(((0x2000 << 16) | (readl(Au1500_PCI_STATCMD) & 0xffff)),
+ Au1500_PCI_STATCMD);
+ //writel(readl(Au1500_PCI_CFG) & ~PCI_ERROR, Au1500_PCI_CFG);
+ au_sync_udelay(1);
+
+ /* setup the lower 31 bits of the 36 bit address */
+ config = cfg_addr |
+ ((1<<device)<<11) | (function << 8) | (where & ~0x3);
+
+#if 0
+ printk("cfg access: config %x, dev_fn %x, device %x function %x\n",
+ config, dev_fn, device, function);
+#endif
+
+ if (access_type == PCI_ACCESS_WRITE) {
+ writel(*data, config);
+ } else {
+ *data = readl(config);
+ }
+ au_sync_udelay(1);
+
+ DBG("config_access: %d bus %d device %d at %x *data %x, conf %x\n",
+ access_type, bus, device, where, *data, config);
+
+ /* check master abort */
+ status = readl(Au1500_PCI_STATCMD);
+ if (status & (1<<29)) {
+ *data = 0xffffffff;
+ return -1;
+ } else if ((status >> 28) & 0xf) {
+ DBG("PCI ERR detected: status %x\n", status);
+ *data = 0xffffffff;
+ return -1;
+ }
+ else {
+ return PCIBIOS_SUCCESSFUL;
+ }
}
@@ -95,7 +156,9 @@
int ret;
ret = config_access(PCI_ACCESS_READ, dev, where, &data);
- *val = data & 0xff;
+ if (where & 1) data >>= 8;
+ if (where & 2) data >>= 16;
+ *val = data & 0xff;
return ret;
}
@@ -106,7 +169,8 @@
int ret;
ret = config_access(PCI_ACCESS_READ, dev, where, &data);
- *val = data & 0xffff;
+ if (where & 2) data >>= 16;
+ *val = data & 0xffff;
return ret;
}
Index: setup.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/pb1500/setup.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- setup.c 4 Dec 2001 03:17:17 -0000 1.1
+++ setup.c 15 Feb 2002 19:47:26 -0000 1.2
@@ -67,8 +67,11 @@
extern struct ide_ops *ide_ops;
#endif
+#ifdef CONFIG_RTC
+extern struct rtc_ops pb1500_rtc_ops;
+#endif
+
void (*__wbflush) (void);
-extern struct rtc_ops no_rtc_ops;
extern char * __init prom_getcmdline(void);
extern void au1000_restart(char *);
extern void au1000_halt(void);
@@ -90,6 +93,11 @@
argptr = prom_getcmdline();
+ /* NOTE: The memory map is established by YAMON 2.08+ */
+
+ /* Various early Au1500 Errata corrected by this */
+ set_cp0_config(1<<19); /* Config[OD] */
+
#ifdef CONFIG_AU1000_SERIAL_CONSOLE
if ((argptr = strstr(argptr, "console=")) == NULL) {
argptr = prom_getcmdline();
@@ -97,7 +105,11 @@
}
#endif
- rtc_ops = &no_rtc_ops;
+#ifdef CONFIG_SOUND_AU1000
+ strcat(argptr, " au1000_audio=vra");
+ argptr = prom_getcmdline();
+#endif
+
__wbflush = au1500_wbflush;
_machine_restart = au1000_restart;
_machine_halt = au1000_halt;
@@ -105,9 +117,9 @@
// IO/MEM resources.
set_io_port_base(0);
- ioport_resource.start = 0;
+ ioport_resource.start = 0x10000000;
ioport_resource.end = 0xffffffff;
- iomem_resource.start = 0;
+ iomem_resource.start = 0x10000000;
iomem_resource.end = 0xffffffff;
#ifdef CONFIG_BLK_DEV_INITRD
@@ -117,8 +129,8 @@
#endif
// set AUX clock to 12MHz * 8 = 96 MHz
- outl(8, AUX_PLL_CNTRL);
- outl(0, PIN_STATE);
+ writel(8, SYS_AUXPLL);
+ outl(0, SYS_PINSTATERD);
udelay(100);
#if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1000_USB_DEVICE)
@@ -134,44 +146,24 @@
#endif
/* zero and disable FREQ2 */
- sys_freqctrl = inl(FQ_CNTRL_1);
+ sys_freqctrl = readl(SYS_FREQCTRL0);
sys_freqctrl &= ~0xFFF00000;
- outl(sys_freqctrl, FQ_CNTRL_1);
+ writel(sys_freqctrl, SYS_FREQCTRL0);
/* zero and disable USBH/USBD clocks */
- sys_clksrc = inl(CLOCK_SOURCE_CNTRL);
+ sys_clksrc = readl(SYS_CLKSRC);
sys_clksrc &= ~0x00007FE0;
- outl(sys_clksrc, CLOCK_SOURCE_CNTRL);
+ writel(sys_clksrc, SYS_CLKSRC);
- sys_freqctrl = inl(FQ_CNTRL_1);
+ sys_freqctrl = readl(SYS_FREQCTRL0);
sys_freqctrl &= ~0xFFF00000;
- sys_clksrc = inl(CLOCK_SOURCE_CNTRL);
+ sys_clksrc = readl(SYS_CLKSRC);
sys_clksrc &= ~0x00007FE0;
-#ifdef CONFIG_AU1000_OHCI_FIX
- /* CPU core freq to 48MHz to slow it way down... */
- outl(4, CPU_PLL_CNTRL);
-
- /*
- * Setup 48MHz FREQ2 from CPUPLL for USB Host
- */
- /* FRDIV2=3 -> div by 8 of 384MHz -> 48MHz */
- sys_freqctrl |= ((3<<22) | (1<<21) | (0<<20));
- outl(sys_freqctrl, FQ_CNTRL_1);
-
- /* CPU core freq to 384MHz */
- outl(0x20, CPU_PLL_CNTRL);
-
- printk("Au1000: 48MHz OHCI workaround enabled\n");
-
-#else // CONFIG_AU1000_OHCI_FIX
-
// FREQ2 = aux/2 = 48 MHz
sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
- outl(sys_freqctrl, FQ_CNTRL_1);
-
-#endif // CONFIG_AU1000_OHCI_FIX
+ writel(sys_freqctrl, SYS_FREQCTRL0);
/*
* Route 48MHz FREQ2 into USB Host and/or Device
@@ -182,65 +174,34 @@
#ifdef CONFIG_AU1000_USB_DEVICE
sys_clksrc |= ((4<<7) | (0<<6) | (0<<5));
#endif
- outl(sys_clksrc, CLOCK_SOURCE_CNTRL);
+ writel(sys_clksrc, SYS_CLKSRC);
-#ifdef CONFIG_USB_OHCI
- // enable host controller and wait for reset done
- outl(0x08, USB_HOST_CONFIG);
- udelay(1000);
- outl(0x0c, USB_HOST_CONFIG);
- udelay(1000);
- while (!(inl(USB_HOST_CONFIG) & 0x10))
- ;
-#endif
-
- // configure pins GPIO[14:9] as GPIO
- pin_func = inl(PIN_FUNCTION) & (u32)(~0x8080);
+ pin_func = readl(SYS_PINFUNC) & (u32)(~0x8000);
#ifndef CONFIG_AU1000_USB_DEVICE
// 2nd USB port is USB host
pin_func |= 0x8000;
#endif
- outl(pin_func, PIN_FUNCTION);
- outl(0x2800, TSTATE_STATE_SET);
- outl(0x0030, OUTPUT_STATE_CLEAR);
+ writel(pin_func, SYS_PINFUNC);
#endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1000_USB_DEVICE)
- // make gpio 15 an input (for interrupt line)
- pin_func = inl(PIN_FUNCTION) & (u32)(~0x100);
- // we don't need I2S, so make it available for GPIO[31:29]
- pin_func |= (1<<5);
- outl(pin_func, PIN_FUNCTION);
- outl(0x8000, TSTATE_STATE_SET);
+#ifdef CONFIG_USB_OHCI
+ // enable host controller and wait for reset done
+ writel(0x08, USB_HOST_CONFIG);
+ udelay(1000);
+ writel(0x0c, USB_HOST_CONFIG);
+ udelay(1000);
+ readl(USB_HOST_CONFIG);
+ while (!(readl(USB_HOST_CONFIG) & 0x10))
+ ;
+ readl(USB_HOST_CONFIG);
+#endif
#ifdef CONFIG_FB
conswitchp = &dummy_con;
#endif
- static_cfg0 = inl(STATIC_CONFIG_0) & (u32)(~0xc00);
- outl(static_cfg0, STATIC_CONFIG_0);
-
- // configure RCE2* for LCD
- outl(0x00000004, STATIC_CONFIG_2);
-
- // STATIC_TIMING_2
- //outl(0x08061908, STATIC_TIMING_2);
- outl(0x09000000, STATIC_TIMING_2);
-
- // Set 32-bit base address decoding for RCE2*
- outl(0x10003ff0, STATIC_ADDRESS_2);
-
- // PCI CPLD setup
- // expand CE0 to cover PCI
- outl(0x11803e40, STATIC_ADDRESS_1);
-
- // burst visibility on
- outl(inl(STATIC_CONFIG_0) | 0x1000, STATIC_CONFIG_0);
-
- outl(0x83, STATIC_CONFIG_1); // ewait enabled, flash timing
- outl(0x33030a10, STATIC_TIMING_1); // slower timing for FPGA
-
#ifdef CONFIG_FB_E1356
if ((argptr = strstr(argptr, "video=")) == NULL) {
argptr = prom_getcmdline();
@@ -248,35 +209,48 @@
}
#endif // CONFIG_FB_E1356
-
#ifndef CONFIG_SERIAL_NONSTANDARD
/* don't touch the default serial console */
- outl(0, UART0_ADDR + UART_CLK);
+ writel(0, UART0_ADDR + UART_CLK);
#endif
- outl(0, UART1_ADDR + UART_CLK);
- outl(0, UART2_ADDR + UART_CLK);
- outl(0, UART3_ADDR + UART_CLK);
+ writel(0, UART3_ADDR + UART_CLK);
#ifdef CONFIG_BLK_DEV_IDE
- {
- argptr = prom_getcmdline();
- strcat(argptr, " ide0=noprobe");
- }
ide_ops = &std_ide_ops;
#endif
- // setup irda clocks
- // aux clock, divide by 2, clock from 2/4 divider
- writel(readl(CLOCK_SOURCE_CNTRL) | 0x7, CLOCK_SOURCE_CNTRL);
- pin_func = inl(PIN_FUNCTION) & (u32)(~(1<<2)); // clear IRTXD
- outl(pin_func, PIN_FUNCTION);
+#ifdef CONFIG_PCI
+ // Setup PCI bus controller
+ writel(0, Au1500_PCI_CMEM);
+ writel(0x00003fff, Au1500_CFG_BASE);
+ writel(0xf, Au1500_PCI_CFG);
+ writel(0xf0000000, Au1500_PCI_MWMASK_DEV);
+ writel(0, Au1500_PCI_MWBASE_REV_CCL);
+ writel(0x02a00356, Au1500_PCI_STATCMD);
+ writel(0x00003c04, Au1500_PCI_HDRTYPE);
+ writel(0x00000008, Au1500_PCI_MBAR);
+ au_sync();
+#endif
- while (inl(PC_COUNTER_CNTRL) & PC_CNTRL_E0S);
- outl(PC_CNTRL_E0 | PC_CNTRL_EN0, PC_COUNTER_CNTRL);
+ while (readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_E0S);
+ writel(SYS_CNTRL_E0 | SYS_CNTRL_EN0, SYS_COUNTER_CNTRL);
au_sync();
- while (inl(PC_COUNTER_CNTRL) & PC_CNTRL_T0S);
- outl(0, PC0_TRIM);
+ while (readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T0S);
+ outl(0, SYS_TOYTRIM);
- printk("Alchemy Semi Pb1500 Board\n");
- printk("Au1500/Pb1500 port (C) 2001 MontaVista Software, Inc. (so...@mv...)\n");
+ /* Enable BCLK switching */
+ writel(0x00000060, 0xb190003c);
+
+#ifdef CONFIG_RTC
+ rtc_ops = &pb1500_rtc_ops;
+ // Enable the RTC if not already enabled
+ if (!(readb(0xac000028) & 0x20)) {
+ writeb(readb(0xac000028) | 0x20, 0xac000028);
+ }
+ // Put the clock in BCD mode
+ if (readb(0xac00002C) & 0x4) { /* reg B */
+ writeb(readb(0xac00002c) & ~0x4, 0xac00002c);
+ au_sync();
+ }
+#endif
}
|
|
From: Pete P. <pp...@us...> - 2002-02-15 19:47:31
|
Update of /cvsroot/linux-mips/linux/arch/mips/configs In directory usw-pr-cvs1:/tmp/cvs-serv7382/arch/mips/configs Modified Files: defconfig-pb1000 defconfig-pb1500 Log Message: * removed runtime copyright prints * Added Pb1500 support (only pcmcia not working at this time) and modified all drivers as necessary * renamed most Au1000 registers to match latest databook * better Au1000 usb hardware fixes for early silicon * updated mtd driver to support Pb1500 partitioning Index: defconfig-pb1000 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-pb1000,v retrieving revision 1.18 retrieving revision 1.19 diff -u -d -r1.18 -r1.19 --- defconfig-pb1000 12 Feb 2002 18:21:25 -0000 1.18 +++ defconfig-pb1000 15 Feb 2002 19:47:26 -0000 1.19 @@ -108,7 +108,7 @@ # CONFIG_BINFMT_AOUT is not set CONFIG_BINFMT_ELF=y # CONFIG_BINFMT_MISC is not set -CONFIG_PM=y +# CONFIG_PM is not set # CONFIG_CPU_FREQ is not set CONFIG_NET=y CONFIG_PCI_NAMES=y @@ -173,6 +173,7 @@ # # CONFIG_MTD_PHYSMAP is not set CONFIG_MTD_PB1000=y +# CONFIG_MTD_PB1500 is not set # CONFIG_MTD_CSTM_MIPS_IXX is not set # CONFIG_MTD_OCELOT is not set Index: defconfig-pb1500 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/configs/defconfig-pb1500,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- defconfig-pb1500 12 Feb 2002 18:21:25 -0000 1.2 +++ defconfig-pb1500 15 Feb 2002 19:47:26 -0000 1.3 @@ -64,7 +64,9 @@ # # Loadable module support # -# CONFIG_MODULES is not set +CONFIG_MODULES=y +# CONFIG_MODVERSIONS is not set +CONFIG_KMOD=y # # CPU selection @@ -108,10 +110,26 @@ # CONFIG_PM is not set # CONFIG_CPU_FREQ is not set CONFIG_NET=y -# CONFIG_PCI_NAMES is not set -# CONFIG_HOTPLUG is not set -# CONFIG_PCMCIA is not set +CONFIG_PCI_NAMES=y +CONFIG_HOTPLUG=y + +# +# PCMCIA/CardBus support +# +CONFIG_PCMCIA=m +# CONFIG_CARDBUS is not set +# CONFIG_I82092 is not set +# CONFIG_I82365 is not set +# CONFIG_PCMCIA_IRQ_REMAP is not set +# CONFIG_TCIC is not set +# CONFIG_PCMCIA_AU1000 is not set + +# +# PCI Hotplug Support +# # CONFIG_HOTPLUG_PCI is not set +# CONFIG_HOTPLUG_PCI_COMPAQ is not set +# CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set CONFIG_SYSVIPC=y # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y @@ -119,7 +137,67 @@ # # Memory Technology Devices (MTD) # -# CONFIG_MTD is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_CFI_INTELEXT=y +# CONFIG_MTD_CFI_AMDSTD is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_OBSOLETE_CHIPS is not set +# CONFIG_MTD_AMDSTD is not set +# CONFIG_MTD_SHARP is not set +# CONFIG_MTD_JEDEC is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_PB1000 is not set +CONFIG_MTD_PB1500=y +CONFIG_MTD_PB1500_BOOT=y +# CONFIG_MTD_PB1500_USER is not set +# CONFIG_MTD_CSTM_MIPS_IXX is not set +# CONFIG_MTD_OCELOT is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLKMTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC1000 is not set +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOCPROBE is not set + +# +# NAND Flash Device Drivers +# +# CONFIG_MTD_NAND is not set # # Parallel port support @@ -135,7 +213,7 @@ # CONFIG_BLK_CPQ_DA is not set # CONFIG_BLK_CPQ_CISS_DA is not set # CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_LOOP is not set +CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set # CONFIG_BLK_DEV_INITRD is not set @@ -158,11 +236,12 @@ CONFIG_PACKET=y # CONFIG_PACKET_MMAP is not set # CONFIG_NETLINK_DEV is not set -# CONFIG_NETFILTER is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set # CONFIG_FILTER is not set CONFIG_UNIX=y CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set +CONFIG_IP_MULTICAST=y # CONFIG_IP_ADVANCED_ROUTER is not set CONFIG_IP_PNP=y # CONFIG_IP_PNP_DHCP is not set @@ -170,9 +249,19 @@ # CONFIG_IP_PNP_RARP is not set # CONFIG_NET_IPIP is not set # CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set # CONFIG_ARPD is not set # CONFIG_INET_ECN is not set # CONFIG_SYN_COOKIES is not set + +# +# IP: Netfilter Configuration +# +# CONFIG_IP_NF_CONNTRACK is not set +# CONFIG_IP_NF_QUEUE is not set +# CONFIG_IP_NF_IPTABLES is not set +# CONFIG_IP_NF_COMPAT_IPCHAINS is not set +# CONFIG_IP_NF_COMPAT_IPFWADM is not set # CONFIG_IPV6 is not set # CONFIG_KHTTPD is not set # CONFIG_ATM is not set @@ -209,9 +298,81 @@ # # ATA/IDE/MFM/RLL support # -# CONFIG_IDE is not set -# CONFIG_BLK_DEV_IDE_MODES is not set +CONFIG_IDE=y + +# +# IDE, ATA and ATAPI Block devices +# +CONFIG_BLK_DEV_IDE=y + +# +# Please see Documentation/ide.txt for help/info on IDE drives +# +# CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set +CONFIG_BLK_DEV_IDEDISK=y +CONFIG_IDEDISK_MULTI_MODE=y +# CONFIG_BLK_DEV_IDEDISK_VENDOR is not set +# CONFIG_BLK_DEV_IDEDISK_FUJITSU is not set +# CONFIG_BLK_DEV_IDEDISK_IBM is not set +# CONFIG_BLK_DEV_IDEDISK_MAXTOR is not set +# CONFIG_BLK_DEV_IDEDISK_QUANTUM is not set +# CONFIG_BLK_DEV_IDEDISK_SEAGATE is not set +# CONFIG_BLK_DEV_IDEDISK_WD is not set +# CONFIG_BLK_DEV_COMMERIAL is not set +# CONFIG_BLK_DEV_TIVO is not set +CONFIG_BLK_DEV_IDECS=m +# CONFIG_BLK_DEV_IDECD is not set +# CONFIG_BLK_DEV_IDETAPE is not set +# CONFIG_BLK_DEV_IDEFLOPPY is not set +# CONFIG_BLK_DEV_IDESCSI is not set + +# +# IDE chipset support/bugfixes +# +# CONFIG_BLK_DEV_CMD640 is not set +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set +# CONFIG_BLK_DEV_ISAPNP is not set +# CONFIG_BLK_DEV_RZ1000 is not set +CONFIG_BLK_DEV_IDEPCI=y +# CONFIG_IDEPCI_SHARE_IRQ is not set +CONFIG_BLK_DEV_IDEDMA_PCI=y +CONFIG_BLK_DEV_ADMA=y +CONFIG_BLK_DEV_OFFBOARD=y +CONFIG_IDEDMA_PCI_AUTO=y +CONFIG_BLK_DEV_IDEDMA=y +# CONFIG_IDEDMA_PCI_WIP is not set +# CONFIG_IDEDMA_NEW_DRIVE_LISTINGS is not set +# CONFIG_BLK_DEV_AEC62XX is not set +# CONFIG_AEC62XX_TUNING is not set +# CONFIG_BLK_DEV_ALI15X3 is not set +# CONFIG_WDC_ALI15X3 is not set +# CONFIG_BLK_DEV_AMD74XX is not set +# CONFIG_AMD74XX_OVERRIDE is not set +# CONFIG_BLK_DEV_CMD64X is not set +# CONFIG_BLK_DEV_CY82C693 is not set +# CONFIG_BLK_DEV_CS5530 is not set +# CONFIG_BLK_DEV_HPT34X is not set +# CONFIG_HPT34X_AUTODMA is not set +CONFIG_BLK_DEV_HPT366=y +# CONFIG_BLK_DEV_NS87415 is not set +# CONFIG_BLK_DEV_OPTI621 is not set +# CONFIG_BLK_DEV_PDC202XX is not set +# CONFIG_PDC202XX_BURST is not set +# CONFIG_PDC202XX_FORCE is not set +# CONFIG_BLK_DEV_SVWKS is not set +# CONFIG_BLK_DEV_SIS5513 is not set +# CONFIG_BLK_DEV_SLC90E66 is not set +# CONFIG_BLK_DEV_TRM290 is not set +# CONFIG_BLK_DEV_VIA82CXXX is not set +# CONFIG_IDE_CHIPSETS is not set +CONFIG_IDEDMA_AUTO=y +# CONFIG_IDEDMA_IVB is not set +# CONFIG_DMA_NONPCI is not set +CONFIG_BLK_DEV_IDE_MODES=y +# CONFIG_BLK_DEV_ATARAID is not set +# CONFIG_BLK_DEV_ATARAID_PDC is not set +# CONFIG_BLK_DEV_ATARAID_HPT is not set # # SCSI support @@ -259,7 +420,36 @@ # CONFIG_NET_VENDOR_RACAL is not set # CONFIG_HP100 is not set # CONFIG_NET_ISA is not set -# CONFIG_NET_PCI is not set +CONFIG_NET_PCI=y +# CONFIG_PCNET32 is not set +# CONFIG_ADAPTEC_STARFIRE is not set +# CONFIG_APRICOT is not set +# CONFIG_CS89x0 is not set +# CONFIG_TULIP is not set +# CONFIG_DE4X5 is not set +# CONFIG_DGRS is not set +# CONFIG_TC35815 is not set +# CONFIG_DM9102 is not set +# CONFIG_EEPRO100 is not set +# CONFIG_LNE390 is not set +# CONFIG_FEALNX is not set +# CONFIG_NATSEMI is not set +# CONFIG_NE2K_PCI is not set +# CONFIG_NE3210 is not set +# CONFIG_ES3210 is not set +# CONFIG_8139CP is not set +CONFIG_8139TOO=y +CONFIG_8139TOO_PIO=y +# CONFIG_8139TOO_TUNE_TWISTER is not set +# CONFIG_8139TOO_8129 is not set +# CONFIG_SIS900 is not set +# CONFIG_EPIC100 is not set +# CONFIG_SUNDANCE is not set +# CONFIG_TLAN is not set +# CONFIG_VIA_RHINE is not set +# CONFIG_VIA_RHINE_MMIO is not set +# CONFIG_WINBOND_840 is not set +# CONFIG_LAN_SAA9730 is not set # CONFIG_NET_POCKET is not set # @@ -275,7 +465,14 @@ # CONFIG_FDDI is not set # CONFIG_HIPPI is not set # CONFIG_PLIP is not set -# CONFIG_PPP is not set +CONFIG_PPP=m +CONFIG_PPP_MULTILINK=y +# CONFIG_PPP_FILTER is not set +CONFIG_PPP_ASYNC=m +# CONFIG_PPP_SYNC_TTY is not set +CONFIG_PPP_DEFLATE=m +# CONFIG_PPP_BSDCOMP is not set +CONFIG_PPPOE=m # CONFIG_SLIP is not set # @@ -297,6 +494,22 @@ # CONFIG_WAN is not set # +# PCMCIA network device support +# +CONFIG_NET_PCMCIA=y +CONFIG_PCMCIA_3C589=m +# CONFIG_PCMCIA_3C574 is not set +# CONFIG_PCMCIA_FMVJ18X is not set +# CONFIG_PCMCIA_PCNET is not set +# CONFIG_PCMCIA_AXNET is not set +# CONFIG_PCMCIA_NMCLAN is not set +# CONFIG_PCMCIA_SMC91C92 is not set +# CONFIG_PCMCIA_XIRC2PS is not set +# CONFIG_ARCNET_COM20020_CS is not set +# CONFIG_PCMCIA_IBMTR is not set +# CONFIG_NET_PCMCIA_RADIO is not set + +# # Amateur Radio support # # CONFIG_HAMRADIO is not set @@ -319,7 +532,8 @@ # # Character devices # -# CONFIG_VT is not set +CONFIG_VT=y +CONFIG_VT_CONSOLE=y # CONFIG_SERIAL is not set # CONFIG_SERIAL_EXTENDED is not set CONFIG_SERIAL_NONSTANDARD=y @@ -331,6 +545,7 @@ # CONFIG_ESPSERIAL is not set # CONFIG_MOXA_INTELLIO is not set # CONFIG_MOXA_SMARTIO is not set +# CONFIG_ISI is not set # CONFIG_SYNCLINK is not set # CONFIG_N_HDLC is not set # CONFIG_RISCOM8 is not set @@ -361,14 +576,36 @@ # Joysticks # # CONFIG_INPUT_GAMEPORT is not set +# CONFIG_INPUT_NS558 is not set +# CONFIG_INPUT_LIGHTNING is not set +# CONFIG_INPUT_PCIGAME is not set +# CONFIG_INPUT_CS461X is not set +# CONFIG_INPUT_EMU10K1 is not set +# CONFIG_INPUT_SERIO is not set +# CONFIG_INPUT_SERPORT is not set # -# Input core support is needed for gameports -# - -# -# Input core support is needed for joysticks +# Joysticks # +# CONFIG_INPUT_ANALOG is not set +# CONFIG_INPUT_A3D is not set +# CONFIG_INPUT_ADI is not set +# CONFIG_INPUT_COBRA is not set +# CONFIG_INPUT_GF2K is not set +# CONFIG_INPUT_GRIP is not set +# CONFIG_INPUT_INTERACT is not set +# CONFIG_INPUT_TMDC is not set +# CONFIG_INPUT_SIDEWINDER is not set +# CONFIG_INPUT_IFORCE_USB is not set +# CONFIG_INPUT_IFORCE_232 is not set +# CONFIG_INPUT_WARRIOR is not set +# CONFIG_INPUT_MAGELLAN is not set +# CONFIG_INPUT_SPACEORB is not set +# CONFIG_INPUT_SPACEBALL is not set +# CONFIG_INPUT_STINGER is not set +# CONFIG_INPUT_DB9 is not set +# CONFIG_INPUT_GAMECON is not set +# CONFIG_INPUT_TURBOGRAFX is not set # CONFIG_QIC02_TAPE is not set # @@ -377,7 +614,7 @@ # CONFIG_WATCHDOG is not set # CONFIG_INTEL_RNG is not set # CONFIG_NVRAM is not set -# CONFIG_RTC is not set +CONFIG_RTC=y # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -388,6 +625,11 @@ # CONFIG_FTAPE is not set # CONFIG_AGP is not set # CONFIG_DRM is not set + +# +# PCMCIA character devices +# +# CONFIG_PCMCIA_SERIAL_CS is not set # CONFIG_AU1000_GPIO is not set # CONFIG_TS_AU1000_ADS7846 is not set @@ -400,9 +642,9 @@ # File systems # # CONFIG_QUOTA is not set -CONFIG_AUTOFS_FS=y -CONFIG_AUTOFS4_FS=y -# CONFIG_REISERFS_FS is not set +CONFIG_AUTOFS_FS=m +CONFIG_AUTOFS4_FS=m +CONFIG_REISERFS_FS=m # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set # CONFIG_ADFS_FS is not set @@ -410,20 +652,23 @@ # CONFIG_AFFS_FS is not set # CONFIG_HFS_FS is not set # CONFIG_BFS_FS is not set -# CONFIG_EXT3_FS is not set -# CONFIG_JBD is not set +CONFIG_EXT3_FS=y +CONFIG_JBD=y # CONFIG_JBD_DEBUG is not set # CONFIG_FAT_FS is not set # CONFIG_MSDOS_FS is not set # CONFIG_UMSDOS_FS is not set # CONFIG_VFAT_FS is not set # CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_TMPFS is not set -# CONFIG_RAMFS is not set -CONFIG_ISO9660_FS=y +CONFIG_JFFS_FS=m +CONFIG_JFFS_FS_VERBOSE=0 +CONFIG_JFFS_PROC_FS=y +CONFIG_JFFS2_FS=m +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_CRAMFS=m +CONFIG_TMPFS=y +CONFIG_RAMFS=m +# CONFIG_ISO9660_FS is not set # CONFIG_JOLIET is not set # CONFIG_ZISOFS is not set # CONFIG_MINIX_FS is not set @@ -435,7 +680,7 @@ # CONFIG_DEVFS_FS is not set # CONFIG_DEVFS_MOUNT is not set # CONFIG_DEVFS_DEBUG is not set -# CONFIG_DEVPTS_FS is not set +CONFIG_DEVPTS_FS=y # CONFIG_QNX4FS_FS is not set # CONFIG_QNX4FS_RW is not set # CONFIG_ROMFS_FS is not set @@ -454,11 +699,12 @@ CONFIG_NFS_FS=y # CONFIG_NFS_V3 is not set CONFIG_ROOT_NFS=y -# CONFIG_NFSD is not set +CONFIG_NFSD=m # CONFIG_NFSD_V3 is not set CONFIG_SUNRPC=y CONFIG_LOCKD=y -# CONFIG_SMB_FS is not set +CONFIG_SMB_FS=m +# CONFIG_SMB_NLS_DEFAULT is not set # CONFIG_NCP_FS is not set # CONFIG_NCPFS_PACKET_SIGNING is not set # CONFIG_NCPFS_IOCTL_LOCKING is not set @@ -469,45 +715,154 @@ # CONFIG_NCPFS_NLS is not set # CONFIG_NCPFS_EXTRAS is not set # CONFIG_ZISOFS_FS is not set -# CONFIG_ZLIB_FS_INFLATE is not set +CONFIG_ZLIB_FS_INFLATE=m # # Partition Types # -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set +# CONFIG_PARTITION_ADVANCED is not set CONFIG_MSDOS_PARTITION=y -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_LDM_PARTITION is not set -CONFIG_SGI_PARTITION=y -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_SMB_NLS is not set -# CONFIG_NLS is not set +CONFIG_SMB_NLS=y +CONFIG_NLS=y + +# +# Native Language Support +# +CONFIG_NLS_DEFAULT="iso8859-1" +# CONFIG_NLS_CODEPAGE_437 is not set +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ISO8859_1 is not set +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Console drivers +# +# CONFIG_VGA_CONSOLE is not set +# CONFIG_MDA_CONSOLE is not set + +# +# Frame-buffer support +# +CONFIG_FB=y +CONFIG_DUMMY_CONSOLE=y +# CONFIG_FB_RIVA is not set +# CONFIG_FB_CLGEN is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_E1355 is not set +# CONFIG_FB_MQ200 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_E1356 is not set +# CONFIG_FB_IT8181 is not set +# CONFIG_FB_SIMPLE is not set +# CONFIG_FB_VIRTUAL is not set +CONFIG_FBCON_ADVANCED=y +# CONFIG_FBCON_MFB is not set +# CONFIG_FBCON_CFB2 is not set +# CONFIG_FBCON_CFB4 is not set +CONFIG_FBCON_CFB8=y +CONFIG_FBCON_CFB16=y +# CONFIG_FBCON_CFB24 is not set +# CONFIG_FBCON_CFB32 is not set +# CONFIG_FBCON_AFB is not set +# CONFIG_FBCON_ILBM is not set +# CONFIG_FBCON_IPLAN2P2 is not set +# CONFIG_FBCON_IPLAN2P4 is not set +# CONFIG_FBCON_IPLAN2P8 is not set +# CONFIG_FBCON_MAC is not set +# CONFIG_FBCON_VGA_PLANES is not set +# CONFIG_FBCON_VGA is not set +# CONFIG_FBCON_HGA is not set +# CONFIG_FBCON_FONTWIDTH8_ONLY is not set +# CONFIG_FBCON_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y # # Sound # -# CONFIG_SOUND is not set +CONFIG_SOUND=y +# CONFIG_SOUND_BT878 is not set +# CONFIG_SOUND_CMPCI is not set +# CONFIG_SOUND_EMU10K1 is not set +# CONFIG_MIDI_EMU10K1 is not set +# CONFIG_SOUND_FUSION is not set +# CONFIG_SOUND_CS4281 is not set +# CONFIG_SOUND_ES1370 is not set +# CONFIG_SOUND_ES1371 is not set +# CONFIG_SOUND_ESSSOLO1 is not set +# CONFIG_SOUND_MAESTRO is not set +# CONFIG_SOUND_MAESTRO3 is not set +# CONFIG_SOUND_ICH is not set +# CONFIG_SOUND_RME96XX is not set +# CONFIG_SOUND_SONICVIBES is not set +# CONFIG_SOUND_HAL2 is not set +CONFIG_SOUND_AU1000=y +# CONFIG_SOUND_TRIDENT is not set +# CONFIG_SOUND_MSNDCLAS is not set +# CONFIG_SOUND_MSNDPIN is not set +# CONFIG_SOUND_VIA82CXXX is not set +# CONFIG_MIDI_VIA82CXXX is not set +# CONFIG_SOUND_OSS is not set +# CONFIG_SOUND_TVMIXER is not set # # USB support # -# CONFIG_USB is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEVICEFS is not set +# CONFIG_USB_BANDWIDTH is not set +# CONFIG_USB_LONG_TIMEOUT is not set # # USB Controllers # # CONFIG_USB_UHCI is not set # CONFIG_USB_UHCI_ALT is not set -# CONFIG_USB_OHCI is not set +CONFIG_USB_OHCI=y # # USB Device Class drivers @@ -529,10 +884,9 @@ # # USB Human Interface Devices (HID) # - -# -# Input core support is needed for USB HID -# +CONFIG_USB_HID=y +# CONFIG_USB_HIDDEV is not set +# CONFIG_USB_WACOM is not set # # USB Imaging devices @@ -602,11 +956,13 @@ # # Input core support # -# CONFIG_INPUT is not set -# CONFIG_INPUT_KEYBDEV is not set -# CONFIG_INPUT_MOUSEDEV is not set +CONFIG_INPUT=y +CONFIG_INPUT_KEYBDEV=y +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 # CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_EVDEV is not set +CONFIG_INPUT_EVDEV=y # # Kernel hacking |
|
From: Pete P. <pp...@us...> - 2002-02-15 19:47:30
|
Update of /cvsroot/linux-mips/linux/arch/mips/au1000/pb1000
In directory usw-pr-cvs1:/tmp/cvs-serv7382/arch/mips/au1000/pb1000
Modified Files:
setup.c
Log Message:
* removed runtime copyright prints
* Added Pb1500 support (only pcmcia not working at this time) and
modified all drivers as necessary
* renamed most Au1000 registers to match latest databook
* better Au1000 usb hardware fixes for early silicon
* updated mtd driver to support Pb1500 partitioning
Index: setup.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/pb1000/setup.c,v
retrieving revision 1.17
retrieving revision 1.18
diff -u -d -r1.17 -r1.18
--- setup.c 2 Jan 2002 19:12:16 -0000 1.17
+++ setup.c 15 Feb 2002 19:47:25 -0000 1.18
@@ -82,18 +82,18 @@
__asm__ volatile ("sync");
}
-void __init bus_error_init(void)
-{
-}
-
void __init au1000_setup(void)
{
char *argptr;
u32 pin_func, static_cfg0;
u32 sys_freqctrl, sys_clksrc;
+ u32 prid = read_32bit_cp0_register(CP0_PRID);
argptr = prom_getcmdline();
+ /* Various early Au1000 Errata corrected by this */
+ set_cp0_config(1<<19); /* Config[OD] */
+
#ifdef CONFIG_AU1000_SERIAL_CONSOLE
if ((argptr = strstr(argptr, "console=")) == NULL) {
argptr = prom_getcmdline();
@@ -109,9 +109,9 @@
// IO/MEM resources.
set_io_port_base(0);
- ioport_resource.start = 0;
+ ioport_resource.start = 0x10000000;
ioport_resource.end = 0xffffffff;
- iomem_resource.start = 0;
+ iomem_resource.start = 0x10000000;
iomem_resource.end = 0xffffffff;
#ifdef CONFIG_BLK_DEV_INITRD
@@ -121,8 +121,8 @@
#endif
// set AUX clock to 12MHz * 8 = 96 MHz
- outl(8, AUX_PLL_CNTRL);
- outl(0, PIN_STATE);
+ outl(8, SYS_AUXPLL);
+ outl(0, SYS_PINSTATERD);
udelay(100);
#if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1000_USB_DEVICE)
@@ -138,44 +138,48 @@
#endif
/* zero and disable FREQ2 */
- sys_freqctrl = inl(FQ_CNTRL_1);
+ sys_freqctrl = inl(SYS_FREQCTRL0);
sys_freqctrl &= ~0xFFF00000;
- outl(sys_freqctrl, FQ_CNTRL_1);
+ outl(sys_freqctrl, SYS_FREQCTRL0);
/* zero and disable USBH/USBD clocks */
- sys_clksrc = inl(CLOCK_SOURCE_CNTRL);
+ sys_clksrc = inl(SYS_CLKSRC);
sys_clksrc &= ~0x00007FE0;
- outl(sys_clksrc, CLOCK_SOURCE_CNTRL);
+ outl(sys_clksrc, SYS_CLKSRC);
- sys_freqctrl = inl(FQ_CNTRL_1);
+ sys_freqctrl = inl(SYS_FREQCTRL0);
sys_freqctrl &= ~0xFFF00000;
- sys_clksrc = inl(CLOCK_SOURCE_CNTRL);
+ sys_clksrc = inl(SYS_CLKSRC);
sys_clksrc &= ~0x00007FE0;
-#ifdef CONFIG_AU1000_OHCI_FIX
+ switch (prid & 0x000000FF)
+ {
+ case 0x00: /* DA */
+ case 0x01: /* HA */
+ case 0x02: /* HB */
/* CPU core freq to 48MHz to slow it way down... */
- outl(4, CPU_PLL_CNTRL);
+ outl(4, SYS_CPUPLL);
/*
* Setup 48MHz FREQ2 from CPUPLL for USB Host
*/
/* FRDIV2=3 -> div by 8 of 384MHz -> 48MHz */
sys_freqctrl |= ((3<<22) | (1<<21) | (0<<20));
- outl(sys_freqctrl, FQ_CNTRL_1);
+ outl(sys_freqctrl, SYS_FREQCTRL0);
/* CPU core freq to 384MHz */
- outl(0x20, CPU_PLL_CNTRL);
+ outl(0x20, SYS_CPUPLL);
printk("Au1000: 48MHz OHCI workaround enabled\n");
+ break;
-#else // CONFIG_AU1000_OHCI_FIX
-
+ default: /* HC and newer */
// FREQ2 = aux/2 = 48 MHz
sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
- outl(sys_freqctrl, FQ_CNTRL_1);
-
-#endif // CONFIG_AU1000_OHCI_FIX
+ outl(sys_freqctrl, SYS_FREQCTRL0);
+ break;
+ }
/*
* Route 48MHz FREQ2 into USB Host and/or Device
@@ -186,64 +190,64 @@
#ifdef CONFIG_AU1000_USB_DEVICE
sys_clksrc |= ((4<<7) | (0<<6) | (0<<5));
#endif
- outl(sys_clksrc, CLOCK_SOURCE_CNTRL);
+ outl(sys_clksrc, SYS_CLKSRC);
#ifdef CONFIG_USB_OHCI
// enable host controller and wait for reset done
outl(0x08, USB_HOST_CONFIG);
udelay(1000);
- outl(0x0c, USB_HOST_CONFIG);
+ outl(0x0E, USB_HOST_CONFIG);
udelay(1000);
+ inl(USB_HOST_CONFIG); // throw away first read
while (!(inl(USB_HOST_CONFIG) & 0x10))
- ;
+ inl(USB_HOST_CONFIG);
#endif
// configure pins GPIO[14:9] as GPIO
- pin_func = inl(PIN_FUNCTION) & (u32)(~0x8080);
+ pin_func = inl(SYS_PINFUNC) & (u32)(~0x8080);
#ifndef CONFIG_AU1000_USB_DEVICE
// 2nd USB port is USB host
pin_func |= 0x8000;
#endif
- outl(pin_func, PIN_FUNCTION);
- outl(0x2800, TSTATE_STATE_SET);
- outl(0x0030, OUTPUT_STATE_CLEAR);
+ outl(pin_func, SYS_PINFUNC);
+ outl(0x2800, SYS_TRIOUTCLR);
+ outl(0x0030, SYS_OUTPUTCLR);
#endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1000_USB_DEVICE)
// make gpio 15 an input (for interrupt line)
- pin_func = inl(PIN_FUNCTION) & (u32)(~0x100);
+ pin_func = inl(SYS_PINFUNC) & (u32)(~0x100);
// we don't need I2S, so make it available for GPIO[31:29]
pin_func |= (1<<5);
- outl(pin_func, PIN_FUNCTION);
+ outl(pin_func, SYS_PINFUNC);
- outl(0x8000, TSTATE_STATE_SET);
+ outl(0x8000, SYS_TRIOUTCLR);
#ifdef CONFIG_FB
conswitchp = &dummy_con;
#endif
- static_cfg0 = inl(STATIC_CONFIG_0) & (u32)(~0xc00);
- outl(static_cfg0, STATIC_CONFIG_0);
+ static_cfg0 = inl(MEM_STCFG0) & (u32)(~0xc00);
+ outl(static_cfg0, MEM_STCFG0);
// configure RCE2* for LCD
- outl(0x00000004, STATIC_CONFIG_2);
+ outl(0x00000004, MEM_STCFG2);
- // STATIC_TIMING_2
- //outl(0x08061908, STATIC_TIMING_2);
- outl(0x09000000, STATIC_TIMING_2);
+ // MEM_STTIME2
+ outl(0x09000000, MEM_STTIME2);
// Set 32-bit base address decoding for RCE2*
- outl(0x10003ff0, STATIC_ADDRESS_2);
+ outl(0x10003ff0, MEM_STADDR2);
// PCI CPLD setup
// expand CE0 to cover PCI
- outl(0x11803e40, STATIC_ADDRESS_1);
+ outl(0x11803e40, MEM_STADDR1);
// burst visibility on
- outl(inl(STATIC_CONFIG_0) | 0x1000, STATIC_CONFIG_0);
+ outl(inl(MEM_STCFG0) | 0x1000, MEM_STCFG0);
- outl(0x83, STATIC_CONFIG_1); // ewait enabled, flash timing
- outl(0x33030a10, STATIC_TIMING_1); // slower timing for FPGA
+ outl(0x83, MEM_STCFG1); // ewait enabled, flash timing
+ outl(0x33030a10, MEM_STTIME1); // slower timing for FPGA
#ifdef CONFIG_FB_E1356
if ((argptr = strstr(argptr, "video=")) == NULL) {
@@ -278,16 +282,26 @@
// setup irda clocks
// aux clock, divide by 2, clock from 2/4 divider
- writel(readl(CLOCK_SOURCE_CNTRL) | 0x7, CLOCK_SOURCE_CNTRL);
- pin_func = inl(PIN_FUNCTION) & (u32)(~(1<<2)); // clear IRTXD
- outl(pin_func, PIN_FUNCTION);
+ writel(readl(SYS_CLKSRC) | 0x7, SYS_CLKSRC);
+ pin_func = inl(SYS_PINFUNC) & (u32)(~(1<<2)); // clear IRTXD
+ outl(pin_func, SYS_PINFUNC);
- while (inl(PC_COUNTER_CNTRL) & PC_CNTRL_E0S);
- outl(PC_CNTRL_E0 | PC_CNTRL_EN0, PC_COUNTER_CNTRL);
+ while (inl(SYS_COUNTER_CNTRL) & SYS_CNTRL_E0S);
+ outl(SYS_CNTRL_E0 | SYS_CNTRL_EN0, SYS_COUNTER_CNTRL);
au_sync();
- while (inl(PC_COUNTER_CNTRL) & PC_CNTRL_T0S);
- outl(0, PC0_TRIM);
+ while (inl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T0S);
+ outl(0, SYS_TOYTRIM);
- printk("Alchemy Semi Pb1000 Board\n");
- printk("Au1000/Pb1000 port (C) 2001 MontaVista Software, Inc. (so...@mv...)\n");
+ /* Enable Au1000 BCLK switching - note: sed1356 must not use
+ * its BCLK (Au1000 LCLK) for any timings */
+ switch (prid & 0x000000FF)
+ {
+ case 0x00: /* DA */
+ case 0x01: /* HA */
+ case 0x02: /* HB */
+ break;
+ default: /* HC and newer */
+ outl(0x00000060, 0xb190003c);
+ break;
+ }
}
|
|
From: James S. <jsi...@us...> - 2002-02-14 20:49:01
|
Update of /cvsroot/linux-mips/linux/arch/mips64/mm
In directory usw-pr-cvs1:/tmp/cvs-serv18695
Modified Files:
loadmmu.c
Log Message:
Call SB1 TLB initialization code.
Index: loadmmu.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/mm/loadmmu.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- loadmmu.c 28 Jan 2002 20:31:57 -0000 1.4
+++ loadmmu.c 14 Feb 2002 20:48:54 -0000 1.5
@@ -55,6 +55,7 @@
extern void ld_mmu_r4xx0(void);
extern void ld_mmu_andes(void);
extern void ld_mmu_sb1(void);
+extern void sb1_tlb_init(void);
void __init load_mmu(void)
{
@@ -92,6 +93,7 @@
case CPU_SB1:
printk("Loading SB1 MMU routines.\n");
ld_mmu_sb1();
+ sb1_tlb_init();
break;
#endif
|
|
From: James S. <jsi...@us...> - 2002-02-14 20:48:31
|
Update of /cvsroot/linux-mips/linux/arch/mips64/mm
In directory usw-pr-cvs1:/tmp/cvs-serv18527
Modified Files:
c-sb1.c
Log Message:
Replace a few 32-bit add instructions with 64-bit dadd equivalents.
Index: c-sb1.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/mm/c-sb1.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- c-sb1.c 5 Feb 2002 17:03:53 -0000 1.2
+++ c-sb1.c 14 Feb 2002 20:48:25 -0000 1.3
@@ -25,16 +25,16 @@
#include <asm/cpu.h>
/* These are probed at ld_mmu time */
-static unsigned int icache_size;
-static unsigned int dcache_size;
+static unsigned long icache_size;
+static unsigned long dcache_size;
-static unsigned int icache_line_size;
-static unsigned int dcache_line_size;
+static unsigned long icache_line_size;
+static unsigned long dcache_line_size;
static unsigned int icache_index_mask;
-static unsigned int icache_assoc;
-static unsigned int dcache_assoc;
+static unsigned long icache_assoc;
+static unsigned long dcache_assoc;
static unsigned int icache_sets;
static unsigned int dcache_sets;
@@ -75,7 +75,7 @@
"1: cache %3, 0($1) \n" /* WB/Invalidate this index */
" daddiu %1, %1, -1 \n" /* Decrement loop count */
" bnez %1, 1b \n" /* loop test */
- " addu $1, $1, %0 \n" /* Next address */
+ " daddu $1, $1, %0 \n" /* Next address */
".set pop \n"
:
: "r" (dcache_line_size), "r" (dcache_sets * dcache_assoc),
@@ -100,7 +100,7 @@
"1: cache %3, 0($1) \n" /* Invalidate this index */
" daddiu %1, %1, -1 \n" /* Decrement loop count */
" bnez %1, 1b \n" /* loop test */
- " addu $1, $1, %0 \n" /* Next address */
+ " daddu $1, $1, %0 \n" /* Next address */
".set pop \n"
:
: "r" (icache_line_size), "r" (icache_sets * icache_assoc),
@@ -130,7 +130,8 @@
* The start/end arguments are expected to be Kseg addresses.
*/
-static void local_sb1_flush_icache_range(unsigned long start, unsigned long end)
+static void local_sb1_flush_icache_range(unsigned long start,
+ unsigned long end)
{
#ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
unsigned long flags;
@@ -151,11 +152,11 @@
#endif
" cache %3, 0($1) \n" /* Hit-WB{,-inval} this address */
" bne $1, %1, 1b \n" /* loop test */
- " addu $1, $1, %2 \n" /* next line */
+ " daddu $1, $1, %2 \n" /* next line */
".set pop \n"
:
- : "r" (start & ~(dcache_line_size - 1)),
- "r" ((end - 1) & ~(dcache_line_size - 1)),
+ : "r" ((start + dcache_line_size - 1) & ~(dcache_line_size - 1)),
+ "r" ((end + dcache_line_size - 1) & ~(dcache_line_size - 1)),
"r" (dcache_line_size),
#ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
"i" (Hit_Writeback_Inv_D)
@@ -188,7 +189,7 @@
" cache %3, (2<<13)($1) \n" /* Index-inval this address */
" cache %3, (3<<13)($1) \n" /* Index-inval this address */
" bne $1, %1, 1b \n" /* loop test */
- " addu $1, $1, %2 \n" /* next line */
+ " daddu $1, $1, %2 \n" /* next line */
".set pop \n"
:
: "r" (start & ~(icache_line_size - 1)),
@@ -355,7 +356,7 @@
"1: cache %3, 0($1) \n" /* Invalidate this index */
" daddiu %1, %1, -1 \n" /* Decrement loop count */
" bnez %1, 1b \n" /* loop test */
- " addu $1, $1, %0 \n" /* Next address */
+ " daddu $1, $1, %0 \n" /* Next address */
".set pop \n"
:
: "r" (icache_line_size), "r" (icache_sets * icache_assoc),
|
|
From: James S. <jsi...@us...> - 2002-02-14 20:47:19
|
Update of /cvsroot/linux-mips/linux/arch/mips/math-emu
In directory usw-pr-cvs1:/tmp/cvs-serv18180
Modified Files:
sp_fdp.c
Log Message:
FPU emulation fixes:
o Converting a denormalized number now raises Inexact exception.
o If rounding mode is "up", a positive denormalized double precision
number should be converted to minimal (denormalized) single
precision number.
Index: sp_fdp.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/math-emu/sp_fdp.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- sp_fdp.c 11 Oct 2001 21:57:54 -0000 1.2
+++ sp_fdp.c 14 Feb 2002 20:47:12 -0000 1.3
@@ -55,6 +55,10 @@
case IEEE754_CLASS_DNORM:
/* cant possibly be sp representable */
SETCX(IEEE754_UNDERFLOW);
+ SETCX(IEEE754_INEXACT);
+ if ((ieee754_csr.rm == IEEE754_RU && !xs) ||
+ (ieee754_csr.rm == IEEE754_RD && xs))
+ return ieee754sp_xcpt(ieee754sp_mind(xs), "fdp", x);
return ieee754sp_xcpt(ieee754sp_zero(xs), "fdp", x);
case IEEE754_CLASS_NORM:
break;
|
|
From: James S. <jsi...@us...> - 2002-02-14 20:45:31
|
Update of /cvsroot/linux-mips/linux/arch/mips/dec
In directory usw-pr-cvs1:/tmp/cvs-serv17741
Modified Files:
irq.c
Log Message:
Change type of irq_err_count to atomic_t.
Index: irq.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/dec/irq.c,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -d -r1.5 -r1.6
--- irq.c 2 Dec 2001 19:05:29 -0000 1.5
+++ irq.c 14 Feb 2002 20:45:26 -0000 1.6
@@ -19,7 +19,6 @@
#include <asm/bitops.h>
#include <asm/bootinfo.h>
#include <asm/io.h>
-#include <asm/irq.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
@@ -34,7 +33,7 @@
extern asmlinkage void decstation_handle_int(void);
-volatile unsigned long irq_err_count;
+atomic_t irq_err_count;
static inline void mask_irq(unsigned int irq_nr)
{
@@ -266,6 +265,11 @@
{
/* TODO */
return 0;
+}
+
+void init_irq_proc(void)
+{
+ /* Nothing, for now. */
}
void __init init_IRQ(void)
|
|
From: James S. <jsi...@us...> - 2002-02-14 20:44:04
|
Update of /cvsroot/linux-mips/linux/arch/mips64/configs In directory usw-pr-cvs1:/tmp/cvs-serv17359 Modified Files: defconfig-atlas defconfig-ip22 defconfig-ip27 defconfig-ip32 defconfig-malta defconfig-sb1250-swarm Log Message: Cleanup Sibyte config.in fragment. Remove duplicate CONFIG_SMP statement for Sibyte. Sibyte uses 32-bit ELF for booting. Index: defconfig-atlas =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips64/configs/defconfig-atlas,v retrieving revision 1.3 retrieving revision 1.4 diff -u -d -r1.3 -r1.4 --- defconfig-atlas 12 Feb 2002 18:22:34 -0000 1.3 +++ defconfig-atlas 14 Feb 2002 20:43:58 -0000 1.4 @@ -2,6 +2,7 @@ # Automatically generated make config: don't edit # CONFIG_MIPS=y +CONFIG_MIPS64=y # # Code maturity level options @@ -11,100 +12,42 @@ # # Machine selection # -# CONFIG_ACER_PICA_61 is not set -# CONFIG_ALGOR_P4032 is not set -# CONFIG_BAGET_MIPS is not set -# CONFIG_MIPS_COBALT is not set -# CONFIG_DECSTATION is not set -# CONFIG_DDB5074 is not set -# CONFIG_NEC_EAGLE is not set -# CONFIG_NEC_KORVA is not set -# CONFIG_MIPS_EV96100 is not set -# CONFIG_MIPS_EV64120 is not set CONFIG_MIPS_ATLAS=y # CONFIG_MIPS_MALTA is not set -# CONFIG_NINO is not set -# CONFIG_SIBYTE_SB1250 is not set -# CONFIG_PS2 is not set -# CONFIG_CASIO_BE300 is not set -# CONFIG_CASIO_E15 is not set -# CONFIG_VADEM_CLIO_1000 is not set -# CONFIG_NEC_MOBILEPRO is not set -# CONFIG_IDT_79S334 is not set -# CONFIG_IDT_79EB355 is not set -# CONFIG_MIPS_MAGNUM_4000 is not set -# CONFIG_MOMENCO_OCELOT is not set -# CONFIG_DDB5476 is not set -# CONFIG_DDB5477 is not set -# CONFIG_NEC_OSPREY is not set -# CONFIG_OLIVETTI_M700 is not set +# CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP22 is not set -# CONFIG_SNI_RM200_PCI is not set -# CONFIG_MIPS_ITE8172 is not set -# CONFIG_MIPS_IVR is not set -# CONFIG_MIPS_PB1000 is not set -# CONFIG_MIPS_PB1500 is not set -# CONFIG_TOSHIBA_JMR3927 is not set -# CONFIG_HP_LASERJET is not set -# CONFIG_HIGHMEM is not set +# CONFIG_SGI_IP32 is not set +# CONFIG_SIBYTE_SB1250 is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -# CONFIG_MCA is not set -# CONFIG_SBUS is not set -CONFIG_NEW_TIME_C=y -CONFIG_NEW_IRQ=y +CONFIG_BOOT_ELF32=y +CONFIG_L1_CACHE_SHIFT=5 CONFIG_NONCOHERENT_IO=y CONFIG_PCI=y CONFIG_SWAP_IO_SPACE=y # CONFIG_ISA is not set # CONFIG_EISA is not set - -# -# Loadable module support -# -# CONFIG_MODULES is not set +# CONFIG_MCA is not set +# CONFIG_SBUS is not set # # CPU selection # -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_VR41XX is not set # CONFIG_CPU_R4300 is not set # CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_TX49XX is not set CONFIG_CPU_R5000=y -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R5900 is not set -# CONFIG_CPU_RM7000 is not set -# CONFIG_CPU_SR7100 is not set # CONFIG_CPU_NEVADA is not set +# CONFIG_CPU_R8000 is not set # CONFIG_CPU_R10000 is not set # CONFIG_CPU_SB1 is not set -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set -# CONFIG_CPU_RC32300 is not set -# CONFIG_64BIT_PHYS_ADDR is not set -# CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y CONFIG_CPU_HAS_LLDSCD=y -# CONFIG_CPU_HAS_WB is not set # # General setup # # CONFIG_CPU_LITTLE_ENDIAN is not set -# CONFIG_CPU_R5900_CONTEXT is not set -# CONFIG_VR4131_CACHE_FIX is not set -CONFIG_KCORE_ELF=y -CONFIG_ELF_KERNEL=y -# CONFIG_BINFMT_IRIX is not set -# CONFIG_FORWARD_KEYBOARD is not set -# CONFIG_BINFMT_AOUT is not set -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -# CONFIG_CPU_FREQ is not set +# CONFIG_MIPS_FPU_EMULATOR is not set CONFIG_NET=y # CONFIG_PCI_NAMES is not set # CONFIG_HOTPLUG is not set @@ -113,6 +56,15 @@ CONFIG_SYSVIPC=y # CONFIG_BSD_PROCESS_ACCT is not set # CONFIG_SYSCTL is not set +CONFIG_BINFMT_ELF=y +# CONFIG_MIPS32_COMPAT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Loadable module support +# +# CONFIG_MODULES is not set +# CONFIG_PCI_NAMES is not set # # Memory Technology Devices (MTD) @@ -284,16 +236,6 @@ # CONFIG_SCSI_DEBUG is not set # -# I2O device support -# -# CONFIG_I2O is not set -# CONFIG_I2O_PCI is not set -# CONFIG_I2O_BLOCK is not set -# CONFIG_I2O_LAN is not set -# CONFIG_I2O_SCSI is not set -# CONFIG_I2O_PROC is not set - -# # Network device support # CONFIG_NETDEVICES=y @@ -522,6 +464,7 @@ CONFIG_MSDOS_PARTITION=y # CONFIG_SMB_NLS is not set # CONFIG_NLS is not set +CONFIG_KCORE_ELF=y # # Sound @@ -644,7 +587,5 @@ # CONFIG_CROSSCOMPILE=y # CONFIG_REMOTE_DEBUG is not set -# CONFIG_GDB_CONSOLE is not set -# CONFIG_DEBUG is not set # CONFIG_MAGIC_SYSRQ is not set # CONFIG_MIPS_UNCACHED is not set Index: defconfig-ip22 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips64/configs/defconfig-ip22,v retrieving revision 1.8 retrieving revision 1.9 diff -u -d -r1.8 -r1.9 --- defconfig-ip22 12 Feb 2002 18:22:34 -0000 1.8 +++ defconfig-ip22 14 Feb 2002 20:43:58 -0000 1.9 @@ -2,6 +2,7 @@ # Automatically generated make config: don't edit # CONFIG_MIPS=y +CONFIG_MIPS64=y # # Code maturity level options @@ -11,106 +12,48 @@ # # Machine selection # -# CONFIG_ACER_PICA_61 is not set -# CONFIG_ALGOR_P4032 is not set -# CONFIG_BAGET_MIPS is not set -# CONFIG_MIPS_COBALT is not set -# CONFIG_DECSTATION is not set -# CONFIG_DDB5074 is not set -# CONFIG_NEC_EAGLE is not set -# CONFIG_NEC_KORVA is not set -# CONFIG_MIPS_EV96100 is not set -# CONFIG_MIPS_EV64120 is not set # CONFIG_MIPS_ATLAS is not set # CONFIG_MIPS_MALTA is not set -# CONFIG_NINO is not set -# CONFIG_SIBYTE_SB1250 is not set -# CONFIG_PS2 is not set -# CONFIG_CASIO_BE300 is not set -# CONFIG_CASIO_E15 is not set -# CONFIG_VADEM_CLIO_1000 is not set -# CONFIG_NEC_MOBILEPRO is not set -# CONFIG_IDT_79S334 is not set -# CONFIG_IDT_79EB355 is not set -# CONFIG_MIPS_MAGNUM_4000 is not set -# CONFIG_MOMENCO_OCELOT is not set -# CONFIG_DDB5476 is not set -# CONFIG_DDB5477 is not set -# CONFIG_NEC_OSPREY is not set -# CONFIG_OLIVETTI_M700 is not set +# CONFIG_SGI_IP27 is not set CONFIG_SGI_IP22=y -# CONFIG_SNI_RM200_PCI is not set -# CONFIG_MIPS_ITE8172 is not set -# CONFIG_MIPS_IVR is not set -# CONFIG_MIPS_PB1000 is not set -# CONFIG_MIPS_PB1500 is not set -# CONFIG_TOSHIBA_JMR3927 is not set -# CONFIG_HP_LASERJET is not set -# CONFIG_HIGHMEM is not set +# CONFIG_SGI_IP32 is not set +# CONFIG_SIBYTE_SB1250 is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -# CONFIG_MCA is not set -# CONFIG_SBUS is not set CONFIG_ARC32=y +CONFIG_ARC_CONSOLE=y +CONFIG_ARC_MEMORY=y CONFIG_BOARD_SCACHE=y CONFIG_IRQ_CPU=y CONFIG_PC_KEYB=y -CONFIG_SGI=y -CONFIG_NEW_IRQ=y -CONFIG_NEW_TIME_C=y +CONFIG_BOOT_ELF32=y CONFIG_NONCOHERENT_IO=y +CONFIG_SGI=y +CONFIG_L1_CACHE_SHIFT=5 # CONFIG_ISA is not set # CONFIG_EISA is not set - -# -# Loadable module support -# -CONFIG_MODULES=y -# CONFIG_MODVERSIONS is not set -CONFIG_KMOD=y +# CONFIG_PCI is not set +# CONFIG_MCA is not set +# CONFIG_SBUS is not set # # CPU selection # -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_VR41XX is not set # CONFIG_CPU_R4300 is not set # CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_TX49XX is not set CONFIG_CPU_R5000=y -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R5900 is not set -# CONFIG_CPU_RM7000 is not set -# CONFIG_CPU_SR7100 is not set # CONFIG_CPU_NEVADA is not set +# CONFIG_CPU_R8000 is not set # CONFIG_CPU_R10000 is not set # CONFIG_CPU_SB1 is not set -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set -# CONFIG_CPU_RC32300 is not set -# CONFIG_64BIT_PHYS_ADDR is not set -# CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y CONFIG_CPU_HAS_LLDSCD=y -# CONFIG_CPU_HAS_WB is not set # # General setup # # CONFIG_CPU_LITTLE_ENDIAN is not set -# CONFIG_CPU_R5900_CONTEXT is not set -# CONFIG_VR4131_CACHE_FIX is not set -CONFIG_KCORE_ELF=y -CONFIG_ELF_KERNEL=y -# CONFIG_BINFMT_IRIX is not set -# CONFIG_FORWARD_KEYBOARD is not set -CONFIG_ARC_CONSOLE=y -# CONFIG_BINFMT_AOUT is not set -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -# CONFIG_CPU_FREQ is not set +# CONFIG_MIPS_FPU_EMULATOR is not set CONFIG_NET=y # CONFIG_HOTPLUG is not set # CONFIG_PCMCIA is not set @@ -118,6 +61,17 @@ CONFIG_SYSVIPC=y # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y +CONFIG_ARC_CONSOLE=y +CONFIG_BINFMT_ELF=y +# CONFIG_MIPS32_COMPAT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Loadable module support +# +CONFIG_MODULES=y +# CONFIG_MODVERSIONS is not set +CONFIG_KMOD=y # # Memory Technology Devices (MTD) @@ -211,6 +165,13 @@ # CONFIG_PHONE_IXJ_PCMCIA is not set # +# ATA/IDE/MFM/RLL support +# +# CONFIG_IDE is not set +# CONFIG_BLK_DEV_IDE_MODES is not set +# CONFIG_BLK_DEV_HD is not set + +# # SCSI support # CONFIG_SCSI=y @@ -289,7 +250,6 @@ # CONFIG_BONDING is not set # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set -# CONFIG_ETHERTAP is not set # # Ethernet (10 or 100Mbit) @@ -424,12 +384,6 @@ # CONFIG_VIDEO_DEV is not set # -# SGI Character devices -# -CONFIG_SGI_NEWPORT_CONSOLE=y -CONFIG_FONT_8x16=y - -# # File systems # # CONFIG_QUOTA is not set @@ -528,13 +482,14 @@ # # Console drivers # -# CONFIG_VGA_CONSOLE is not set -# CONFIG_MDA_CONSOLE is not set # # Frame-buffer support # # CONFIG_FB is not set +CONFIG_SGI_NEWPORT_CONSOLE=y +CONFIG_FONT_8x16=y +CONFIG_KCORE_ELF=y # # Sound @@ -664,8 +619,7 @@ # Kernel hacking # CONFIG_CROSSCOMPILE=y +# CONFIG_MIPS_FPE_MODULE is not set # CONFIG_REMOTE_DEBUG is not set -# CONFIG_GDB_CONSOLE is not set -# CONFIG_DEBUG is not set # CONFIG_MAGIC_SYSRQ is not set # CONFIG_MIPS_UNCACHED is not set Index: defconfig-ip27 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips64/configs/defconfig-ip27,v retrieving revision 1.8 retrieving revision 1.9 diff -u -d -r1.8 -r1.9 --- defconfig-ip27 12 Feb 2002 18:22:34 -0000 1.8 +++ defconfig-ip27 14 Feb 2002 20:43:59 -0000 1.9 @@ -2,6 +2,7 @@ # Automatically generated make config: don't edit # CONFIG_MIPS=y +CONFIG_MIPS64=y # # Code maturity level options @@ -11,81 +12,49 @@ # # Machine selection # -# CONFIG_MIPS_MAGNUM_4000 is not set -# CONFIG_MOMENCO_OCELOT is not set -# CONFIG_DDB5476 is not set -# CONFIG_DDB5477 is not set -# CONFIG_NEC_OSPREY is not set -# CONFIG_OLIVETTI_M700 is not set -# CONFIG_SGI_IP22 is not set -# CONFIG_SNI_RM200_PCI is not set -# CONFIG_MIPS_ITE8172 is not set -# CONFIG_MIPS_IVR is not set -# CONFIG_MIPS_PB1000 is not set -# CONFIG_MIPS_PB1500 is not set -# CONFIG_TOSHIBA_JMR3927 is not set -# CONFIG_HP_LASERJET is not set +# CONFIG_SGI_IP27 is not set +# CONFIG_SIBYTE_SB1250 is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -# CONFIG_MCA is not set -# CONFIG_SBUS is not set # CONFIG_ISA is not set # CONFIG_EISA is not set - -# -# Loadable module support -# -# CONFIG_MODULES is not set +# CONFIG_PCI is not set +# CONFIG_MCA is not set +# CONFIG_SBUS is not set # # CPU selection # -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_VR41XX is not set # CONFIG_CPU_R4300 is not set # CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_TX49XX is not set # CONFIG_CPU_R5000 is not set -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R5900 is not set -# CONFIG_CPU_RM7000 is not set -# CONFIG_CPU_SR7100 is not set # CONFIG_CPU_NEVADA is not set +# CONFIG_CPU_R8000 is not set CONFIG_CPU_R10000=y # CONFIG_CPU_SB1 is not set -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set -# CONFIG_CPU_RC32300 is not set -# CONFIG_64BIT_PHYS_ADDR is not set -# CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y CONFIG_CPU_HAS_LLDSCD=y -# CONFIG_CPU_HAS_WB is not set # # General setup # +# CONFIG_MIPS_INSANE_LARGE is not set # CONFIG_CPU_LITTLE_ENDIAN is not set -# CONFIG_CPU_R5900_CONTEXT is not set -# CONFIG_VR4131_CACHE_FIX is not set -CONFIG_KCORE_ELF=y -CONFIG_ELF_KERNEL=y -# CONFIG_BINFMT_IRIX is not set -# CONFIG_FORWARD_KEYBOARD is not set -# CONFIG_BINFMT_AOUT is not set -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -# CONFIG_CPU_FREQ is not set CONFIG_NET=y -CONFIG_PCI_NAMES=y # CONFIG_HOTPLUG is not set # CONFIG_PCMCIA is not set # CONFIG_HOTPLUG_PCI is not set CONFIG_SYSVIPC=y # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y +CONFIG_BINFMT_ELF=y +# CONFIG_MIPS32_COMPAT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Loadable module support +# +# CONFIG_MODULES is not set # # Memory Technology Devices (MTD) @@ -198,7 +167,6 @@ # # SCSI low-level drivers # -# CONFIG_BLK_DEV_3W_XXXX_RAID is not set # CONFIG_SCSI_7000FASST is not set # CONFIG_SCSI_ACARD is not set # CONFIG_SCSI_AHA152X is not set @@ -212,7 +180,6 @@ # CONFIG_SCSI_AM53C974 is not set # CONFIG_SCSI_MEGARAID is not set # CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_CPQFCTS is not set # CONFIG_SCSI_DMX3191D is not set # CONFIG_SCSI_DTC3280 is not set # CONFIG_SCSI_EATA is not set @@ -225,34 +192,17 @@ # CONFIG_SCSI_INIA100 is not set # CONFIG_SCSI_NCR53C406A is not set # CONFIG_SCSI_NCR53C7xx is not set -# CONFIG_SCSI_SYM53C8XX_2 is not set -# CONFIG_SCSI_NCR53C8XX is not set -# CONFIG_SCSI_SYM53C8XX is not set # CONFIG_SCSI_PAS16 is not set # CONFIG_SCSI_PCI2000 is not set # CONFIG_SCSI_PCI2220I is not set # CONFIG_SCSI_PSI240I is not set # CONFIG_SCSI_QLOGIC_FAS is not set -CONFIG_SCSI_QLOGIC_ISP=y -# CONFIG_SCSI_QLOGIC_FC is not set -# CONFIG_SCSI_QLOGIC_1280 is not set # CONFIG_SCSI_SIM710 is not set # CONFIG_SCSI_SYM53C416 is not set -# CONFIG_SCSI_DC390T is not set # CONFIG_SCSI_T128 is not set # CONFIG_SCSI_U14_34F is not set # -# I2O device support -# -# CONFIG_I2O is not set -# CONFIG_I2O_PCI is not set -# CONFIG_I2O_BLOCK is not set -# CONFIG_I2O_LAN is not set -# CONFIG_I2O_SCSI is not set -# CONFIG_I2O_PROC is not set - -# # Network device support # CONFIG_NETDEVICES=y @@ -270,9 +220,7 @@ # Ethernet (10 or 100Mbit) # CONFIG_NET_ETHERNET=y -CONFIG_SGI_IOC3_ETH=y # CONFIG_SUNLANCE is not set -# CONFIG_HAPPYMEAL is not set # CONFIG_SUNBMAC is not set # CONFIG_SUNQE is not set # CONFIG_SUNLANCE is not set @@ -281,7 +229,6 @@ # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set -# CONFIG_HP100 is not set # CONFIG_NET_ISA is not set # CONFIG_NET_PCI is not set # CONFIG_NET_POCKET is not set @@ -492,6 +439,7 @@ # CONFIG_SUN_PARTITION is not set # CONFIG_SMB_NLS is not set # CONFIG_NLS is not set +CONFIG_KCORE_ELF=y # # Sound @@ -614,6 +562,5 @@ # CONFIG_CROSSCOMPILE=y # CONFIG_REMOTE_DEBUG is not set -# CONFIG_GDB_CONSOLE is not set -# CONFIG_DEBUG is not set # CONFIG_MAGIC_SYSRQ is not set +# CONFIG_MIPS_UNCACHED is not set Index: defconfig-ip32 =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips64/configs/defconfig-ip32,v retrieving revision 1.8 retrieving revision 1.9 diff -u -d -r1.8 -r1.9 --- defconfig-ip32 12 Feb 2002 18:22:34 -0000 1.8 +++ defconfig-ip32 14 Feb 2002 20:43:59 -0000 1.9 @@ -2,6 +2,7 @@ # Automatically generated make config: don't edit # CONFIG_MIPS=y +CONFIG_MIPS64=y # # Code maturity level options @@ -11,104 +12,53 @@ # # Machine selection # -# CONFIG_ACER_PICA_61 is not set -# CONFIG_ALGOR_P4032 is not set -# CONFIG_BAGET_MIPS is not set -# CONFIG_MIPS_COBALT is not set -# CONFIG_DECSTATION is not set -# CONFIG_DDB5074 is not set -# CONFIG_NEC_EAGLE is not set -# CONFIG_NEC_KORVA is not set -# CONFIG_MIPS_EV96100 is not set -# CONFIG_MIPS_EV64120 is not set # CONFIG_MIPS_ATLAS is not set # CONFIG_MIPS_MALTA is not set -# CONFIG_NINO is not set -# CONFIG_SIBYTE_SB1250 is not set -# CONFIG_PS2 is not set -# CONFIG_CASIO_BE300 is not set -# CONFIG_CASIO_E15 is not set -# CONFIG_VADEM_CLIO_1000 is not set -# CONFIG_NEC_MOBILEPRO is not set -# CONFIG_IDT_79S334 is not set -# CONFIG_IDT_79EB355 is not set -# CONFIG_MIPS_MAGNUM_4000 is not set -# CONFIG_MOMENCO_OCELOT is not set -# CONFIG_DDB5476 is not set -# CONFIG_DDB5477 is not set -# CONFIG_NEC_OSPREY is not set -# CONFIG_OLIVETTI_M700 is not set +# CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP22 is not set -# CONFIG_SNI_RM200_PCI is not set -# CONFIG_MIPS_ITE8172 is not set -# CONFIG_MIPS_IVR is not set -# CONFIG_MIPS_PB1000 is not set -# CONFIG_MIPS_PB1500 is not set -# CONFIG_TOSHIBA_JMR3927 is not set -# CONFIG_HP_LASERJET is not set -# CONFIG_HIGHMEM is not set +# CONFIG_SGI_IP32 is not set +# CONFIG_SIBYTE_SB1250 is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -# CONFIG_MCA is not set -# CONFIG_SBUS is not set # CONFIG_ISA is not set # CONFIG_EISA is not set - -# -# Loadable module support -# -# CONFIG_MODULES is not set +# CONFIG_PCI is not set +# CONFIG_MCA is not set +# CONFIG_SBUS is not set # # CPU selection # -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_VR41XX is not set # CONFIG_CPU_R4300 is not set # CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_TX49XX is not set CONFIG_CPU_R5000=y -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R5900 is not set -# CONFIG_CPU_RM7000 is not set -# CONFIG_CPU_SR7100 is not set # CONFIG_CPU_NEVADA is not set +# CONFIG_CPU_R8000 is not set # CONFIG_CPU_R10000 is not set # CONFIG_CPU_SB1 is not set -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set -# CONFIG_CPU_RC32300 is not set -# CONFIG_64BIT_PHYS_ADDR is not set -# CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y CONFIG_CPU_HAS_LLDSCD=y -# CONFIG_CPU_HAS_WB is not set # # General setup # # CONFIG_CPU_LITTLE_ENDIAN is not set -# CONFIG_CPU_R5900_CONTEXT is not set -# CONFIG_VR4131_CACHE_FIX is not set -CONFIG_KCORE_ELF=y -CONFIG_ELF_KERNEL=y -# CONFIG_BINFMT_IRIX is not set -# CONFIG_FORWARD_KEYBOARD is not set -CONFIG_ARC_CONSOLE=y -# CONFIG_BINFMT_AOUT is not set -CONFIG_BINFMT_ELF=y -CONFIG_BINFMT_MISC=y -# CONFIG_CPU_FREQ is not set +# CONFIG_MIPS_FPU_EMULATOR is not set CONFIG_NET=y -CONFIG_PCI_NAMES=y # CONFIG_HOTPLUG is not set # CONFIG_PCMCIA is not set # CONFIG_HOTPLUG_PCI is not set CONFIG_SYSVIPC=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_SYSCTL=y +CONFIG_BINFMT_ELF=y +# CONFIG_MIPS32_COMPAT is not set +CONFIG_BINFMT_MISC=y + +# +# Loadable module support +# +# CONFIG_MODULES is not set # # Memory Technology Devices (MTD) @@ -235,7 +185,6 @@ # # SCSI low-level drivers # -# CONFIG_BLK_DEV_3W_XXXX_RAID is not set # CONFIG_SCSI_7000FASST is not set # CONFIG_SCSI_ACARD is not set # CONFIG_SCSI_AHA152X is not set @@ -252,7 +201,6 @@ # CONFIG_SCSI_AM53C974 is not set # CONFIG_SCSI_MEGARAID is not set # CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_CPQFCTS is not set # CONFIG_SCSI_DMX3191D is not set # CONFIG_SCSI_DTC3280 is not set # CONFIG_SCSI_EATA is not set @@ -265,35 +213,18 @@ # CONFIG_SCSI_INIA100 is not set # CONFIG_SCSI_NCR53C406A is not set # CONFIG_SCSI_NCR53C7xx is not set -# CONFIG_SCSI_SYM53C8XX_2 is not set -# CONFIG_SCSI_NCR53C8XX is not set -# CONFIG_SCSI_SYM53C8XX is not set # CONFIG_SCSI_PAS16 is not set # CONFIG_SCSI_PCI2000 is not set # CONFIG_SCSI_PCI2220I is not set # CONFIG_SCSI_PSI240I is not set # CONFIG_SCSI_QLOGIC_FAS is not set -# CONFIG_SCSI_QLOGIC_ISP is not set -# CONFIG_SCSI_QLOGIC_FC is not set -# CONFIG_SCSI_QLOGIC_1280 is not set # CONFIG_SCSI_SIM710 is not set # CONFIG_SCSI_SYM53C416 is not set -# CONFIG_SCSI_DC390T is not set # CONFIG_SCSI_T128 is not set # CONFIG_SCSI_U14_34F is not set # CONFIG_SCSI_DEBUG is not set # -# I2O device support -# -# CONFIG_I2O is not set -# CONFIG_I2O_PCI is not set -# CONFIG_I2O_BLOCK is not set -# CONFIG_I2O_LAN is not set -# CONFIG_I2O_SCSI is not set -# CONFIG_I2O_PROC is not set - -# # Network device support # CONFIG_NETDEVICES=y @@ -311,9 +242,7 @@ # Ethernet (10 or 100Mbit) # CONFIG_NET_ETHERNET=y -CONFIG_SGI_O2MACE_ETH=y # CONFIG_SUNLANCE is not set -# CONFIG_HAPPYMEAL is not set # CONFIG_SUNBMAC is not set # CONFIG_SUNQE is not set # CONFIG_SUNLANCE is not set @@ -322,7 +251,6 @@ # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set -# CONFIG_HP100 is not set # CONFIG_NET_ISA is not set # CONFIG_NET_PCI is not set # CONFIG_NET_POCKET is not set @@ -535,6 +463,7 @@ # CONFIG_SUN_PARTITION is not set # CONFIG_SMB_NLS is not set # CONFIG_NLS is not set +CONFIG_KCORE_ELF=y # # Sound @@ -657,7 +586,5 @@ # CONFIG_CROSSCOMPILE=y # CONFIG_REMOTE_DEBUG is not set -# CONFIG_GDB_CONSOLE is not set -# CONFIG_DEBUG is not set CONFIG_MAGIC_SYSRQ=y CONFIG_MIPS_UNCACHED=y Index: defconfig-malta =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips64/configs/defconfig-malta,v retrieving revision 1.3 retrieving revision 1.4 diff -u -d -r1.3 -r1.4 --- defconfig-malta 12 Feb 2002 18:22:34 -0000 1.3 +++ defconfig-malta 14 Feb 2002 20:43:59 -0000 1.4 @@ -2,6 +2,7 @@ # Automatically generated make config: don't edit # CONFIG_MIPS=y +CONFIG_MIPS64=y # # Code maturity level options @@ -11,100 +12,43 @@ # # Machine selection # -# CONFIG_ACER_PICA_61 is not set -# CONFIG_ALGOR_P4032 is not set -# CONFIG_BAGET_MIPS is not set -# CONFIG_MIPS_COBALT is not set -# CONFIG_DECSTATION is not set -# CONFIG_DDB5074 is not set -# CONFIG_NEC_EAGLE is not set -# CONFIG_NEC_KORVA is not set -# CONFIG_MIPS_EV96100 is not set -# CONFIG_MIPS_EV64120 is not set # CONFIG_MIPS_ATLAS is not set CONFIG_MIPS_MALTA=y -# CONFIG_NINO is not set -# CONFIG_SIBYTE_SB1250 is not set -# CONFIG_PS2 is not set -# CONFIG_CASIO_BE300 is not set -# CONFIG_CASIO_E15 is not set -# CONFIG_VADEM_CLIO_1000 is not set -# CONFIG_NEC_MOBILEPRO is not set -# CONFIG_IDT_79S334 is not set -# CONFIG_IDT_79EB355 is not set -# CONFIG_MIPS_MAGNUM_4000 is not set -# CONFIG_MOMENCO_OCELOT is not set -# CONFIG_DDB5476 is not set -# CONFIG_DDB5477 is not set -# CONFIG_NEC_OSPREY is not set -# CONFIG_OLIVETTI_M700 is not set +# CONFIG_SGI_IP27 is not set # CONFIG_SGI_IP22 is not set -# CONFIG_SNI_RM200_PCI is not set -# CONFIG_MIPS_ITE8172 is not set -# CONFIG_MIPS_IVR is not set -# CONFIG_MIPS_PB1000 is not set -# CONFIG_MIPS_PB1500 is not set -# CONFIG_TOSHIBA_JMR3927 is not set -# CONFIG_HP_LASERJET is not set -# CONFIG_HIGHMEM is not set +# CONFIG_SGI_IP32 is not set +# CONFIG_SIBYTE_SB1250 is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -# CONFIG_MCA is not set -# CONFIG_SBUS is not set +CONFIG_BOOT_ELF32=y CONFIG_I8259=y -CONFIG_PCI=y -CONFIG_HAVE_STD_PC_SERIAL_PORT=y -CONFIG_NEW_IRQ=y -CONFIG_NEW_TIME_C=y +CONFIG_L1_CACHE_SHIFT=5 CONFIG_NONCOHERENT_IO=y +CONFIG_PCI=y CONFIG_SWAP_IO_SPACE=y # CONFIG_ISA is not set # CONFIG_EISA is not set - -# -# Loadable module support -# -# CONFIG_MODULES is not set +# CONFIG_MCA is not set +# CONFIG_SBUS is not set # # CPU selection # -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_VR41XX is not set # CONFIG_CPU_R4300 is not set CONFIG_CPU_R4X00=y -# CONFIG_CPU_TX49XX is not set # CONFIG_CPU_R5000 is not set -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R5900 is not set -# CONFIG_CPU_RM7000 is not set -# CONFIG_CPU_SR7100 is not set # CONFIG_CPU_NEVADA is not set +# CONFIG_CPU_R8000 is not set # CONFIG_CPU_R10000 is not set # CONFIG_CPU_SB1 is not set -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set -# CONFIG_CPU_RC32300 is not set -# CONFIG_64BIT_PHYS_ADDR is not set -# CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y CONFIG_CPU_HAS_LLDSCD=y -# CONFIG_CPU_HAS_WB is not set # # General setup # CONFIG_CPU_LITTLE_ENDIAN=y -# CONFIG_CPU_R5900_CONTEXT is not set -# CONFIG_VR4131_CACHE_FIX is not set -CONFIG_KCORE_ELF=y -CONFIG_ELF_KERNEL=y -# CONFIG_BINFMT_AOUT is not set -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -# CONFIG_CPU_FREQ is not set +# CONFIG_MIPS_FPU_EMULATOR is not set CONFIG_NET=y # CONFIG_PCI_NAMES is not set # CONFIG_HOTPLUG is not set @@ -113,6 +57,15 @@ CONFIG_SYSVIPC=y # CONFIG_BSD_PROCESS_ACCT is not set # CONFIG_SYSCTL is not set +CONFIG_BINFMT_ELF=y +# CONFIG_MIPS32_COMPAT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Loadable module support +# +# CONFIG_MODULES is not set +# CONFIG_PCI_NAMES is not set # # Memory Technology Devices (MTD) @@ -284,16 +237,6 @@ # CONFIG_SCSI_DEBUG is not set # -# I2O device support -# -# CONFIG_I2O is not set -# CONFIG_I2O_PCI is not set -# CONFIG_I2O_BLOCK is not set -# CONFIG_I2O_LAN is not set -# CONFIG_I2O_SCSI is not set -# CONFIG_I2O_PROC is not set - -# # Network device support # CONFIG_NETDEVICES=y @@ -522,6 +465,7 @@ CONFIG_MSDOS_PARTITION=y # CONFIG_SMB_NLS is not set # CONFIG_NLS is not set +CONFIG_KCORE_ELF=y # # Sound @@ -644,7 +588,5 @@ # CONFIG_CROSSCOMPILE=y # CONFIG_REMOTE_DEBUG is not set -# CONFIG_GDB_CONSOLE is not set -# CONFIG_DEBUG is not set # CONFIG_MAGIC_SYSRQ is not set # CONFIG_MIPS_UNCACHED is not set Index: defconfig-sb1250-swarm =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips64/configs/defconfig-sb1250-swarm,v retrieving revision 1.4 retrieving revision 1.5 diff -u -d -r1.4 -r1.5 --- defconfig-sb1250-swarm 12 Feb 2002 18:22:34 -0000 1.4 +++ defconfig-sb1250-swarm 14 Feb 2002 20:43:59 -0000 1.5 @@ -2,6 +2,7 @@ # Automatically generated make config: don't edit # CONFIG_MIPS=y +CONFIG_MIPS64=y # # Code maturity level options @@ -11,80 +12,36 @@ # # Machine selection # -# CONFIG_MIPS_MAGNUM_4000 is not set -# CONFIG_MOMENCO_OCELOT is not set -# CONFIG_DDB5476 is not set -# CONFIG_DDB5477 is not set -# CONFIG_NEC_OSPREY is not set -# CONFIG_OLIVETTI_M700 is not set -# CONFIG_SGI_IP22 is not set -# CONFIG_SNI_RM200_PCI is not set -# CONFIG_MIPS_ITE8172 is not set -# CONFIG_MIPS_IVR is not set -# CONFIG_MIPS_PB1000 is not set -# CONFIG_MIPS_PB1500 is not set -# CONFIG_TOSHIBA_JMR3927 is not set -# CONFIG_HP_LASERJET is not set +# CONFIG_SGI_IP27 is not set +# CONFIG_SIBYTE_SB1250 is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -# CONFIG_MCA is not set -# CONFIG_SBUS is not set -CONFIG_NEW_IRQ=y -CONFIG_SWAP_IO_SPACE=y -CONFIG_NEW_TIME_C=y # CONFIG_ISA is not set # CONFIG_EISA is not set - -# -# Loadable module support -# -# CONFIG_MODULES is not set +# CONFIG_PCI is not set +# CONFIG_MCA is not set +# CONFIG_SBUS is not set # # CPU selection # -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_VR41XX is not set # CONFIG_CPU_R4300 is not set # CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_TX49XX is not set # CONFIG_CPU_R5000 is not set -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R5900 is not set -# CONFIG_CPU_RM7000 is not set -# CONFIG_CPU_SR7100 is not set # CONFIG_CPU_NEVADA is not set +# CONFIG_CPU_R8000 is not set # CONFIG_CPU_R10000 is not set CONFIG_CPU_SB1=y -# CONFIG_CPU_MIPS32 is not set -# CONFIG_CPU_MIPS64 is not set -# CONFIG_CPU_RC32300 is not set # CONFIG_SB1_PASS_1_WORKAROUNDS is not set # CONFIG_SB1_CACHE_ERROR is not set CONFIG_VTAG_ICACHE=y -CONFIG_CPU_HAS_PREFETCH=y -# CONFIG_64BIT_PHYS_ADDR is not set -# CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y CONFIG_CPU_HAS_LLDSCD=y -# CONFIG_CPU_HAS_WB is not set # # General setup # # CONFIG_CPU_LITTLE_ENDIAN is not set -# CONFIG_CPU_R5900_CONTEXT is not set -# CONFIG_VR4131_CACHE_FIX is not set -CONFIG_KCORE_ELF=y -CONFIG_ELF_KERNEL=y -# CONFIG_BINFMT_IRIX is not set -# CONFIG_FORWARD_KEYBOARD is not set -# CONFIG_BINFMT_AOUT is not set -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -# CONFIG_CPU_FREQ is not set CONFIG_NET=y # CONFIG_HOTPLUG is not set # CONFIG_PCMCIA is not set @@ -92,6 +49,14 @@ # CONFIG_SYSVIPC is not set # CONFIG_BSD_PROCESS_ACCT is not set # CONFIG_SYSCTL is not set +CONFIG_BINFMT_ELF=y +# CONFIG_MIPS32_COMPAT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Loadable module support +# +# CONFIG_MODULES is not set # # Memory Technology Devices (MTD) @@ -117,7 +82,6 @@ CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_SIZE=4096 CONFIG_BLK_DEV_INITRD=y -# CONFIG_EMBEDDED_RAMDISK is not set # # Multi-device support (RAID and LVM) @@ -181,15 +145,6 @@ # CONFIG_SCSI is not set # -# I2O device support -# -# CONFIG_I2O is not set -# CONFIG_I2O_BLOCK is not set -# CONFIG_I2O_LAN is not set -# CONFIG_I2O_SCSI is not set -# CONFIG_I2O_PROC is not set - -# # Network device support # CONFIG_NETDEVICES=y @@ -207,7 +162,6 @@ # Ethernet (10 or 100Mbit) # CONFIG_NET_ETHERNET=y -CONFIG_NET_SB1250_MAC=y # CONFIG_SUNLANCE is not set # CONFIG_SUNBMAC is not set # CONFIG_SUNQE is not set @@ -298,11 +252,6 @@ # CONFIG_SERIAL_TX3912_CONSOLE is not set # CONFIG_AU1000_UART is not set # CONFIG_TXX927_SERIAL is not set -CONFIG_SIBYTE_SB1250_DUART=y -CONFIG_SIBYTE_SB1250_DUART_CONSOLE=y -CONFIG_SERIAL_CONSOLE=y -CONFIG_SB1250_DUART_OUTPUT_BUF_SIZE=1024 -# CONFIG_SIBYTE_SB1250_DUART_NO_PORT_1 is not set # CONFIG_UNIX98_PTYS is not set # @@ -450,6 +399,7 @@ # CONFIG_SUN_PARTITION is not set # CONFIG_SMB_NLS is not set # CONFIG_NLS is not set +CONFIG_KCORE_ELF=y # # Sound @@ -572,6 +522,5 @@ # CONFIG_CROSSCOMPILE=y # CONFIG_REMOTE_DEBUG is not set -# CONFIG_GDB_CONSOLE is not set -# CONFIG_DEBUG is not set # CONFIG_MAGIC_SYSRQ is not set +# CONFIG_MIPS_UNCACHED is not set |
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