To be frank, I do not have any experience with SystemC. I have started working on libLCS mainly because I have felt that C++, with its templates and operator overloading features, can itself be used as an HDL successfully. The templates and operator overloading features facilitate an intuitive way to build and simulate digital systems. From what I have gathered from others, SystemC isnt as intuitive as Verilog or other HDLs.
It would be great if someone with experience in SystemC can make a comparison and post it out here. I will add it under a FAQ section on the libLCS website with due acknowledgements.
Cheers,
Siva Chandra
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A someone who has used both SystemC and libLCS made this observation: "SystemC is for users who migrate from a Verilog background to hardware description using C++, while libLCS is for C++ programmers who want dive into the world of hardware description."
My take is that SystemC has a steep learning curve for people with Verilog experience but new to C++, while libLCS is suited for C++ programmers who are new to hardware description.
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Hey!
I would advise you to put few words about how your software compares to SystemC.. That's the obvious question there.
Cheers,
Gil
Hello Gil,
To be frank, I do not have any experience with SystemC. I have started working on libLCS mainly because I have felt that C++, with its templates and operator overloading features, can itself be used as an HDL successfully. The templates and operator overloading features facilitate an intuitive way to build and simulate digital systems. From what I have gathered from others, SystemC isnt as intuitive as Verilog or other HDLs.
It would be great if someone with experience in SystemC can make a comparison and post it out here. I will add it under a FAQ section on the libLCS website with due acknowledgements.
Cheers,
Siva Chandra
A someone who has used both SystemC and libLCS made this observation: "SystemC is for users who migrate from a Verilog background to hardware description using C++, while libLCS is for C++ programmers who want dive into the world of hardware description."
My take is that SystemC has a steep learning curve for people with Verilog experience but new to C++, while libLCS is suited for C++ programmers who are new to hardware description.