libLCS is a hardware description library in C++ aiming to be as powerfull and easy as the Verilog HDL. It currently supports logic gates, flipflops, clock, and facilitates delays, continuous assignments and variable value dumping into VCD files.

Project Activity

See All Activity >

License

GNU General Public License version 2.0 (GPLv2), GNU Library or Lesser General Public License version 2.0 (LGPLv2)

Follow Logic Circuit Simulation in C++

Logic Circuit Simulation in C++ Web Site

Other Useful Business Software
$300 Free Credits to Build on Google Cloud Icon
$300 Free Credits to Build on Google Cloud

New customers can spin up VMs, build with AI, and query data at no cost.

Put your $300 in credit toward real workloads, then keep building with free monthly usage for 20+ products. No commitment and no charge until you upgrade.
Start Free
Rate This Project
Login To Rate This Project

User Reviews

Be the first to post a review of Logic Circuit Simulation in C++!

Additional Project Details

Languages

English

Intended Audience

Education, Science/Research, Telecommunications Industry

Programming Language

C++

Related Categories

C++ Simulation Software, C++ Electronic Design Automation (EDA) Software, C++ Computer Aided Instruction (CAI) Software

Registered

2006-09-18