Re: Ramdac and VGA

[Steffen S. <se...@ph...>]

Rodolphe Ortalo wrote:
> 
> I'm still browsing the 3Dlabs PERMEDIA2 driver source code for
> inspiration... ;-)
> 
> Steffen, why didn't you provide specialized _functions_ for setting the
> DAC or CLK registers in VGA mode (as you did for SEQ, CRT, GRC, etc.) ?

Because this implies there is a VGA core present.

> Instead, the "generic" pgc_chipset_{dac,clk}_{out,in}{,s}8() procedures
> explicitly do a check for PGC_VGA_DAC (ie: pgc_io->flags &
> PGC_IF_VGA_DAC).

Yes, because it depends on the chipset state how to access the DAC, not on the
DAC.

> Is it possible to supply two different (sets of) procedures: one for the
> VGA case and one for the normal (MMIO) case ? (For example:
> pgc_chipset_dac_in8() and pgc_chipset_vga_dac_in8()). Don't you think it
> would be preferable (unless there's something I did not see which requires
> a self-checking procedure) ?

It shouldn't. All the chipset has to provide is __access__ to the other
cores it is connected to. Think of the chipset as a kind of bus bridge.
The chipset driver has only to provide means to access what's on the
other side of the bridge, but not make any assumptions what's there.

That there is an address space to access the DAC and there is an address space
to access the Clock chip is enough the chipset driver needs to know how to do
and the ramdac/clock driver needs to know it exists.

			Steffen

_______________________________________________________________________________
Steffen Seeger                              mailto:se...@ph...
TU-Chemnitz                                      http://www.tu-chemnitz.de/~sse