Buffer looks like it is working, but for some reason the instMiss signal oscillates up and down after the first instMiss, probably is something wrong with something I changed.
Also, cache doesn't appear to be taking in the values correctly. The burst is entering cache correctly, cache miss goes false, but the instruction read from cache isn't correct.
Will do more after I go eat.
If you would like to refer to this comment somewhere else in this project, copy and paste the following link:
We now get past boot0.
Buffer looks like it is working, but for some reason the instMiss signal oscillates up and down after the first instMiss, probably is something wrong with something I changed.
Also, cache doesn't appear to be taking in the values correctly. The burst is entering cache correctly, cache miss goes false, but the instruction read from cache isn't correct.
Will do more after I go eat.