Mike,
I've been staring at the code we have you submit and I can't figure out why the fuck it doesn't work.
You need to start from the workingVanilla copy, and then connect stuff together, ensure the datapath works, and THEN commit.
I don't see how its remotely fair to expect me to debug your changes that starts from an undetermined version of workingVanilla that isn't guaranteed to work.
Minor bugs I can fix. Rewriting your part for you because you're unwilling to learn how to simulate and test your own changes to the code tree I think is asking a bit too much.
As of now, I'm trying to figure out what changes you made from whatever version of workingVanilla you started with. The bug right now is it's not reading the correct value from dataMem's sram. This means we can't even get past boot0.
If you would like to refer to this comment somewhere else in this project, copy and paste the following link:
Fuck it,
I took the working dataMem.v from workingVanilla and plugged in the newModules. If logic relating to the cache breaks fuck it.
At least I have an idea that the datapath is working.
If you would like to refer to this comment somewhere else in this project, copy and paste the following link:
I don't know what you are talking about, please be more specific. I used the lastest version of dataMem from workingVanilla to make the change. The code is untested because the stupid modelSim will not simulate and all the computers in 119 were occupied. Do whatever you want.
>>
You need to start from the workingVanilla copy, and then connect stuff together, ensure the datapath works, and THEN commit.
BTW, the stuff is in my folder, and I didn't commit because I didn't tested them. It's not my fault that you guys didn't have a working simulation model that I can simulate on any computer. I know how to simulate if your shit is working.
If you would like to refer to this comment somewhere else in this project, copy and paste the following link:
The only things that dont' simulate in 150 lab are any board rams.
The solution to that is the ifdef. It's commented out in most builds, but if you go to the ifdef, you'll notice we use different ram in simulation then on the board.
Make sure you're using the ram that works in simulation, test, then commit.
If you would like to refer to this comment somewhere else in this project, copy and paste the following link:
Mike,
I've been staring at the code we have you submit and I can't figure out why the fuck it doesn't work.
You need to start from the workingVanilla copy, and then connect stuff together, ensure the datapath works, and THEN commit.
I don't see how its remotely fair to expect me to debug your changes that starts from an undetermined version of workingVanilla that isn't guaranteed to work.
Minor bugs I can fix. Rewriting your part for you because you're unwilling to learn how to simulate and test your own changes to the code tree I think is asking a bit too much.
As of now, I'm trying to figure out what changes you made from whatever version of workingVanilla you started with. The bug right now is it's not reading the correct value from dataMem's sram. This means we can't even get past boot0.
Fuck it,
I took the working dataMem.v from workingVanilla and plugged in the newModules. If logic relating to the cache breaks fuck it.
At least I have an idea that the datapath is working.
I don't know what you are talking about, please be more specific. I used the lastest version of dataMem from workingVanilla to make the change. The code is untested because the stupid modelSim will not simulate and all the computers in 119 were occupied. Do whatever you want.
>>
You need to start from the workingVanilla copy, and then connect stuff together, ensure the datapath works, and THEN commit.
BTW, the stuff is in my folder, and I didn't commit because I didn't tested them. It's not my fault that you guys didn't have a working simulation model that I can simulate on any computer. I know how to simulate if your shit is working.
The only things that dont' simulate in 150 lab are any board rams.
The solution to that is the ifdef. It's commented out in most builds, but if you go to the ifdef, you'll notice we use different ram in simulation then on the board.
Make sure you're using the ram that works in simulation, test, then commit.