Many of the modified files were modified only so that they would cooperate with the schematic program.
incrementer.v and instMem.v were necessary files that hadn't been created yet.
regDstMux.v and regIdEx.v are the registers between the pipline stages. - their specifications follow exactly like regIfId.v, so just modify the DesignDoc similarly for them as you did for that.
ground.v is just to make the PC able to go from 30 to 32 bits. It's specification is simple - just open the file and you'll be able to write something for the design doc, if you so choose.
I decided not to add the project files because there are a lot of them.
If you want to see the schematic, get in contact with me personally. I will probably end up making a jpegs until the schematic is completely done, at which point I'll decide how to get the schematic into the project folder for submission.
The schematic is not done, but it's getting close and I have other things to do, so I'll finish it up either tomorrow around noon or tomorrow evening (likely I'll be working on it both time periods, but I don't guarentee). If anyone has any issues with this decision, let me know.
If you would like to refer to this comment somewhere else in this project, copy and paste the following link:
I guess you didn't read my previous message, don't make a new module if we don't have to. Each new module need to be tested, and we have to show the test cases and transcripts. Just use register.v, a variable length register with reset and enable.
Mike
If you would like to refer to this comment somewhere else in this project, copy and paste the following link:
Many of the modified files were modified only so that they would cooperate with the schematic program.
incrementer.v and instMem.v were necessary files that hadn't been created yet.
regDstMux.v and regIdEx.v are the registers between the pipline stages. - their specifications follow exactly like regIfId.v, so just modify the DesignDoc similarly for them as you did for that.
ground.v is just to make the PC able to go from 30 to 32 bits. It's specification is simple - just open the file and you'll be able to write something for the design doc, if you so choose.
I decided not to add the project files because there are a lot of them.
If you want to see the schematic, get in contact with me personally. I will probably end up making a jpegs until the schematic is completely done, at which point I'll decide how to get the schematic into the project folder for submission.
The schematic is not done, but it's getting close and I have other things to do, so I'll finish it up either tomorrow around noon or tomorrow evening (likely I'll be working on it both time periods, but I don't guarentee). If anyone has any issues with this decision, let me know.
I guess you didn't read my previous message, don't make a new module if we don't have to. Each new module need to be tested, and we have to show the test cases and transcripts. Just use register.v, a variable length register with reset and enable.
Mike