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[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-382-g5d4ac17

From: Nicolas <th...@us...> - 2012-06-15 12:45:03

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".

The branch, master has been updated
       via  5d4ac172d0c0bf27a555b0b43fbd8e89fe551628 (commit)
      from  bc5d8d8b4e90095efdba17a72c5f52d8bcf39e93 (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit 5d4ac172d0c0bf27a555b0b43fbd8e89fe551628
Author: nicolas <nicolas@nicolas-Studio-1558.(none)>
Date:   Fri Jun 15 14:44:45 2012 +0200

    [BUILDROOT] add pps51 libertas firmware

-----------------------------------------------------------------------

Summary of changes:
 buildroot/configs/pps51_defconfig |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/buildroot/configs/pps51_defconfig b/buildroot/configs/pps51_defconfig
index 2e8e522..388c0bb 100644
--- a/buildroot/configs/pps51_defconfig
+++ b/buildroot/configs/pps51_defconfig
@@ -52,9 +52,9 @@ BR2_PACKAGE_STRACE=y
 BR2_PACKAGE_FBTEST=y
 BR2_PACKAGE_FBV=y
 BR2_PACKAGE_DBUS=y
-BR2_PACKAGE_FIRMWARE=y
-BR2_PACKAGE_FIRMWARE_88W8686=y
 BR2_PACKAGE_I2C_TOOLS=y
+BR2_PACKAGE_LINUX_FIRMWARE=y
+BR2_PACKAGE_LINUX_FIRMWARE_88W8686=y
 BR2_PACKAGE_MTD=y
 BR2_PACKAGE_MTD_JFFS2DUMP=y
 BR2_PACKAGE_MTD_MKFSJFFS2=y


hooks/post-receive
-- 
armadeus

[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-381-gbc5d8d8

From: jscheer <js...@us...> - 2012-06-14 13:16:51

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".

The branch, master has been updated
       via  bc5d8d8b4e90095efdba17a72c5f52d8bcf39e93 (commit)
      from  bca6bda9f2a410cea4f4aad94c51025ec7137525 (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit bc5d8d8b4e90095efdba17a72c5f52d8bcf39e93
Author: Jeremie Scheer <jer...@ar...>
Date:   Thu Jun 14 15:16:19 2012 +0200

    [BUILDROOT] Add package Marble to BR 2012.02 in patch 188.

-----------------------------------------------------------------------

Summary of changes:
 .../buildroot/2012.02/188-marble-add_package.patch |   88 ++++++++++++++++++++
 patches/buildroot/2012.02/cleanup_buildroot.sh     |    1 +
 2 files changed, 89 insertions(+), 0 deletions(-)
 create mode 100644 patches/buildroot/2012.02/188-marble-add_package.patch

diff --git a/patches/buildroot/2012.02/188-marble-add_package.patch b/patches/buildroot/2012.02/188-marble-add_package.patch
new file mode 100644
index 0000000..e56b29c
--- /dev/null
+++ b/patches/buildroot/2012.02/188-marble-add_package.patch
@@ -0,0 +1,88 @@
+Add package Marble to Buildroot.
+
+Signed-off-by: JÃ©rÃ©mie Scheer <jer...@ar...>
+
+Index: buildroot/package/Config.in
+===================================================================
+--- buildroot.orig/package/Config.in	2012-06-14 15:06:47.000000000 +0200
++++ buildroot/package/Config.in	2012-06-14 15:07:36.000000000 +0200
+@@ -141,6 +141,7 @@
+ source "package/efl/Config.in"
+ source "package/qt/Config.in"
+ source "package/qwt/Config.in"
++source "package/marble/Config.in"
+ source "package/x11r7/Config.in"
+ 
+ comment "X libraries and helper libraries"
+Index: buildroot/package/marble/Config.in
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ buildroot/package/marble/Config.in	2012-06-14 15:09:45.000000000 +0200
+@@ -0,0 +1,11 @@
++config BR2_PACKAGE_MARBLE
++	bool "KDE Marble"
++	select BR2_PACKAGE_QT
++	select BR2_PACKAGE_QT_SCRIPT
++	select BR2_PACKAGE_QT_SVG
++	select BR2_PACKAGE_QT_WEBKIT
++	select BR2_PACKAGE_QT_XML
++	help
++	  Compile & install KDE Marble for
++	  geolocalization applications.
++
+Index: buildroot/package/marble/marble.mk
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ buildroot/package/marble/marble.mk	2012-06-14 15:09:31.000000000 +0200
+@@ -0,0 +1,51 @@
++#############################################################
++#
++# KDE Marble
++#
++#############################################################
++MARBLE_VERSION = 0299004157ce00cf901b6113c4ac14fa0c323c00
++MARBLE_SOURCE = marble-$(MARBLE_VERSION)-source.tar.gz
++MARBLE_SITE = git://anongit.kde.org/marble.git
++MARBLE_SITE_METHOD = git
++
++MARBLE_DEPENDENCIES = qt
++
++MARBLE_CONF_OPT += -DQTONLY=ON
++MARBLE_CONF_OPT += -DTILES_AT_COMPILETIME=OFF
++
++define MARBLE_CONFIGURE_CMDS
++	(cd $(@D) && \
++	rm -f CMakeCache.txt && \
++	$(HOST_DIR)/usr/bin/cmake $(@D) \
++		-DCMAKE_TOOLCHAIN_FILE="$(BASE_DIR)/toolchainfile.cmake" \
++		$(MARBLE_CONF_OPT) \
++	)
++endef
++
++define MARBLE_BUILD_CMDS
++	$(MAKE) -C $(@D)
++endef
++
++MARBLE_INSTALL_STAGING = YES
++
++define MARBLE_CLEAN_TARGET_INSTALL
++	rm -rf $(TARGET_DIR)/usr/local/share/marble/*
++	rm -rf $(TARGET_DIR)/usr/local/include/marble
++	rm -rf $(TARGET_DIR)/usr/local/bin/marble
++endef
++
++define MARBLE_PUT_NECESSARY_DATA_IN_TARGET
++	mkdir -p $(TARGET_DIR)/usr/local/share/marble/data/svg
++	mkdir -p $(TARGET_DIR)/usr/local/share/marble/data/maps/earth
++	cp -rf $(STAGING_DIR)/usr/local/share/marble/cmake $(TARGET_DIR)/usr/local/share/marble
++	cp -rf $(STAGING_DIR)/usr/local/share/marble/data/svg/lunarmap.svg $(TARGET_DIR)/usr/local/share/marble/data/svg
++	cp -rf $(STAGING_DIR)/usr/local/share/marble/data/svg/worldmap.svg $(TARGET_DIR)/usr/local/share/marble/data/svg
++	cp -rf $(STAGING_DIR)/usr/local/share/marble/data/svg/track_turtle.svg $(TARGET_DIR)/usr/local/share/marble/data/svg
++	cp -rf $(STAGING_DIR)/usr/local/share/marble/data/maps/earth/hillshading $(TARGET_DIR)/usr/local/share/marble/data/maps/earth
++	cp -rf $(STAGING_DIR)/usr/local/share/marble/data/maps/earth/openstreetmap $(TARGET_DIR)/usr/local/share/marble/data/maps/earth
++endef
++
++MARBLE_POST_INSTALL_TARGET_HOOKS += MARBLE_CLEAN_TARGET_INSTALL
++MARBLE_POST_INSTALL_TARGET_HOOKS += MARBLE_PUT_NECESSARY_DATA_IN_TARGET
++
++$(eval $(call CMAKETARGETS))
diff --git a/patches/buildroot/2012.02/cleanup_buildroot.sh b/patches/buildroot/2012.02/cleanup_buildroot.sh
index ccd10cf..7949a19 100755
--- a/patches/buildroot/2012.02/cleanup_buildroot.sh
+++ b/patches/buildroot/2012.02/cleanup_buildroot.sh
@@ -73,3 +73,4 @@ rm -rf buildroot/package/multimedia/fsl-mm-codeclib/
 rm -rf buildroot/package/linux-firmware/
 rm -rf buildroot/package/uboot-tools/
 rm -rf buildroot/package/qtcreator/
+rm -rf buildroot/package/marble/


hooks/post-receive
-- 
armadeus

[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-380-gbca6bda

From: Julien B a. A. <ar...@us...> - 2012-06-14 09:51:51

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".

The branch, master has been updated
       via  bca6bda9f2a410cea4f4aad94c51025ec7137525 (commit)
       via  c8c9ef281369f0a4ceb421c4b1f00d21443e77f8 (commit)
      from  6a94351baab3869bd983400ae740e10342b25640 (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit bca6bda9f2a410cea4f4aad94c51025ec7137525
Merge: c8c9ef2 6a94351
Author: Julien Boibessot <jul...@ar...>
Date:   Thu Jun 14 11:48:54 2012 +0200

    Merge branch 'master' of ssh://armadeus.git.sourceforge.net/gitroot/armadeus/armadeus

commit c8c9ef281369f0a4ceb421c4b1f00d21443e77f8
Author: Julien Boibessot <jul...@ar...>
Date:   Thu Jun 14 11:48:17 2012 +0200

    [LINUX] Move APF28 experimental mainline support to 3.4.2

-----------------------------------------------------------------------

Summary of changes:
 .../device/armadeus/apf28/apf28-linux-3.3.5.config |    1 -
 .../device/armadeus/apf28/apf28-linux-3.4.2.config |    1 +
 ...f28-linux-3.3.config => apf28-linux-3.4.config} |   12 ++-------
 patches/linux/3.3.5                                |    1 -
 patches/linux/3.4.2                                |    1 +
 .../450-armadeus-add_apf28_module_support.patch    |   24 --------------------
 ...1-armadeus-add_apf28dev_baseboard_support.patch |    0
 7 files changed, 5 insertions(+), 35 deletions(-)
 delete mode 120000 buildroot/target/device/armadeus/apf28/apf28-linux-3.3.5.config
 create mode 120000 buildroot/target/device/armadeus/apf28/apf28-linux-3.4.2.config
 rename buildroot/target/device/armadeus/apf28/{apf28-linux-3.3.config => apf28-linux-3.4.config} (96%)
 delete mode 120000 patches/linux/3.3.5
 create mode 120000 patches/linux/3.4.2
 rename patches/linux/{3.3 => 3.4}/450-armadeus-add_apf28_module_support.patch (81%)
 rename patches/linux/{3.3 => 3.4}/451-armadeus-add_apf28dev_baseboard_support.patch (100%)

diff --git a/buildroot/target/device/armadeus/apf28/apf28-linux-3.3.5.config b/buildroot/target/device/armadeus/apf28/apf28-linux-3.3.5.config
deleted file mode 120000
index e18fadf..0000000
--- a/buildroot/target/device/armadeus/apf28/apf28-linux-3.3.5.config
+++ /dev/null
@@ -1 +0,0 @@
-apf28-linux-3.3.config
\ No newline at end of file
diff --git a/buildroot/target/device/armadeus/apf28/apf28-linux-3.4.2.config b/buildroot/target/device/armadeus/apf28/apf28-linux-3.4.2.config
new file mode 120000
index 0000000..ba0c3a3
--- /dev/null
+++ b/buildroot/target/device/armadeus/apf28/apf28-linux-3.4.2.config
@@ -0,0 +1 @@
+apf28-linux-3.4.config
\ No newline at end of file
diff --git a/buildroot/target/device/armadeus/apf28/apf28-linux-3.3.config b/buildroot/target/device/armadeus/apf28/apf28-linux-3.4.config
similarity index 96%
rename from buildroot/target/device/armadeus/apf28/apf28-linux-3.3.config
rename to buildroot/target/device/armadeus/apf28/apf28-linux-3.4.config
index 460fc5e..3ac10f1 100644
--- a/buildroot/target/device/armadeus/apf28/apf28-linux-3.3.config
+++ b/buildroot/target/device/armadeus/apf28/apf28-linux-3.4.config
@@ -12,6 +12,8 @@ CONFIG_OPROFILE=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_BSD_DISKLABEL=y
 # CONFIG_IOSCHED_CFQ is not set
 CONFIG_ARCH_MXS=y
 CONFIG_MACH_MX28EVK=y
@@ -44,8 +46,6 @@ CONFIG_CAN_BCM=m
 CONFIG_CAN_VCAN=m
 CONFIG_CAN_FLEXCAN=m
 CONFIG_BT=m
-CONFIG_BT_L2CAP=y
-CONFIG_BT_SCO=y
 CONFIG_BT_RFCOMM=m
 CONFIG_BT_RFCOMM_TTY=y
 CONFIG_BT_BNEP=m
@@ -67,7 +67,6 @@ CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
 CONFIG_MTD_NAND=y
 CONFIG_MTD_UBI=y
-CONFIG_MISC_DEVICES=y
 CONFIG_EEPROM_AT24=y
 CONFIG_EEPROM_AT25=y
 CONFIG_SCSI=y
@@ -80,9 +79,6 @@ CONFIG_SCSI_MULTI_LUN=y
 CONFIG_SCSI_LOGGING=y
 CONFIG_SCSI_SCAN_ASYNC=y
 CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
 CONFIG_RTL8187=m
 CONFIG_RT2X00=m
 CONFIG_RT73USB=m
@@ -155,7 +151,7 @@ CONFIG_USB_WDM=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DEBUG_FILES=y
-CONFIG_USB_ETH=y
+CONFIG_USB_ETH=m
 CONFIG_USB_ULPI=y
 CONFIG_MMC=y
 CONFIG_MMC_MXS=y
@@ -187,8 +183,6 @@ CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
 CONFIG_NFS_V4=y
 CONFIG_ROOT_NFS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_BSD_DISKLABEL=y
 CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_CODEPAGE_850=y
 CONFIG_NLS_ISO8859_1=y
diff --git a/patches/linux/3.3.5 b/patches/linux/3.3.5
deleted file mode 120000
index f30101c..0000000
--- a/patches/linux/3.3.5
+++ /dev/null
@@ -1 +0,0 @@
-3.3
\ No newline at end of file
diff --git a/patches/linux/3.4.2 b/patches/linux/3.4.2
new file mode 120000
index 0000000..af1817b
--- /dev/null
+++ b/patches/linux/3.4.2
@@ -0,0 +1 @@
+3.4
\ No newline at end of file
diff --git a/patches/linux/3.3/450-armadeus-add_apf28_module_support.patch b/patches/linux/3.4/450-armadeus-add_apf28_module_support.patch
similarity index 81%
rename from patches/linux/3.3/450-armadeus-add_apf28_module_support.patch
rename to patches/linux/3.4/450-armadeus-add_apf28_module_support.patch
index 5c50cfb..42e147c 100644
--- a/patches/linux/3.3/450-armadeus-add_apf28_module_support.patch
+++ b/patches/linux/3.4/450-armadeus-add_apf28_module_support.patch
@@ -142,27 +142,3 @@ Index: linux-3.3.5/arch/arm/mach-mxs/mach-apf28.c
 +	.init_machine	= apf28_init,
 +	.timer		= &apf28_timer,
 +MACHINE_END
-Index: linux-3.3.5/arch/arm/mach-mxs/include/mach/mxs.h
-===================================================================
---- linux-3.3.5.orig/arch/arm/mach-mxs/include/mach/mxs.h	2012-05-08 14:59:50.000000000 +0200
-+++ linux-3.3.5/arch/arm/mach-mxs/include/mach/mxs.h	2012-05-08 15:00:14.000000000 +0200
-@@ -36,6 +36,7 @@
- 		machine_is_mx28evk() ||					\
- 		machine_is_m28evk() ||					\
- 		machine_is_tx28() ||					\
-+		machine_is_apf28() ||					\
- 		0)
- 
- /*
-Index: linux-3.3.5/arch/arm/mach-mxs/include/mach/uncompress.h
-===================================================================
---- linux-3.3.5.orig/arch/arm/mach-mxs/include/mach/uncompress.h	2012-05-08 15:00:38.000000000 +0200
-+++ linux-3.3.5/arch/arm/mach-mxs/include/mach/uncompress.h	2012-05-08 15:01:01.000000000 +0200
-@@ -65,6 +65,7 @@
- 	case MACH_TYPE_MX28EVK:
- 	case MACH_TYPE_M28EVK:
- 	case MACH_TYPE_TX28:
-+	case MACH_TYPE_APF28:
- 		mxs_duart_base = MX28_DUART_BASE_ADDR;
- 		break;
- 	default:
diff --git a/patches/linux/3.3/451-armadeus-add_apf28dev_baseboard_support.patch b/patches/linux/3.4/451-armadeus-add_apf28dev_baseboard_support.patch
similarity index 100%
rename from patches/linux/3.3/451-armadeus-add_apf28dev_baseboard_support.patch
rename to patches/linux/3.4/451-armadeus-add_apf28dev_baseboard_support.patch


hooks/post-receive
-- 
armadeus

[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-378-g6a94351

From: jorasse <jo...@us...> - 2012-06-13 22:13:31

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".

The branch, master has been updated
       via  6a94351baab3869bd983400ae740e10342b25640 (commit)
      from  c77a44a704164c941f8ab6aada66b2f72339b1f9 (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit 6a94351baab3869bd983400ae740e10342b25640
Author: Eric Jarrige <eri...@ar...>
Date:   Thu Jun 14 00:15:24 2012 +0200

    [UBOOT] apf9328: update code to support U-Boot data cache

-----------------------------------------------------------------------

Summary of changes:
 .../armadeus/apf9328/apf9328-u-boot-2012.04.h      |    3 ++-
 patches/u-boot/2012.04/103-apf9328.patch           |    6 +++---
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/buildroot/target/device/armadeus/apf9328/apf9328-u-boot-2012.04.h b/buildroot/target/device/armadeus/apf9328/apf9328-u-boot-2012.04.h
index 12ab4bd..e85d1f0 100644
--- a/buildroot/target/device/armadeus/apf9328/apf9328-u-boot-2012.04.h
+++ b/buildroot/target/device/armadeus/apf9328/apf9328-u-boot-2012.04.h
@@ -24,7 +24,7 @@
 
 #define CONFIG_VERSION_VARIABLE
 #define CONFIG_ENV_VERSION 	"5.1"
-#define CONFIG_IDENT_STRING	" apf9328 patch 5.3"
+#define CONFIG_IDENT_STRING	" apf9328 patch 5.4"
 #define CONFIG_BOARD_NAME	apf9328
 
 /*
@@ -37,6 +37,7 @@
 /*
  * Enable the call to miscellaneous platform dependent initialization.
  */
+#define CONFIG_SYS_DCACHE_OFF
 #define CONFIG_MISC_INIT_R
 
 /*
diff --git a/patches/u-boot/2012.04/103-apf9328.patch b/patches/u-boot/2012.04/103-apf9328.patch
index 6897dab..edd07ea 100644
--- a/patches/u-boot/2012.04/103-apf9328.patch
+++ b/patches/u-boot/2012.04/103-apf9328.patch
@@ -137,13 +137,13 @@ index 0000000..b72491d
 +	return 0;
 +}
 +
-+#ifndef CONFIG_SYS_DCACHE_OFF
 +void enable_caches(void)
 +{
++#ifndef CONFIG_SYS_DCACHE_OFF
 +	/* Enable D-cache. I-cache is already enabled in start.S */
-+	/*dcache_enable();  fix kernel 2.6.29 boot crash first*/
-+}
++	dcache_enable();
 +#endif
++}
 +
 +/*
 + * Miscellaneous intialization


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armadeus

[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-377-gc77a44a

From: jorasse <jo...@us...> - 2012-06-13 22:00:28

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".

The branch, master has been updated
       via  c77a44a704164c941f8ab6aada66b2f72339b1f9 (commit)
       via  44316373768bcd54d1945f1e5a1428d69e3238d7 (commit)
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- Log -----------------------------------------------------------------
commit c77a44a704164c941f8ab6aada66b2f72339b1f9
Merge: 4431637 f6d3307
Author: Eric Jarrige <eri...@ar...>
Date:   Thu Jun 14 00:02:28 2012 +0200

    Merge branch 'master' of ssh://armadeus.git.sourceforge.net/gitroot/armadeus/armadeus

commit 44316373768bcd54d1945f1e5a1428d69e3238d7
Author: Eric Jarrige <eri...@ar...>
Date:   Thu Jun 14 00:02:11 2012 +0200

    [UBOOT] apf51: Fix dcache message on boot

-----------------------------------------------------------------------

Summary of changes:
 patches/u-boot/2012.04/401-apf51.patch |    9 ++++-----
 1 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/patches/u-boot/2012.04/401-apf51.patch b/patches/u-boot/2012.04/401-apf51.patch
index 6b38aeb..043867e 100644
--- a/patches/u-boot/2012.04/401-apf51.patch
+++ b/patches/u-boot/2012.04/401-apf51.patch
@@ -67,7 +67,7 @@ new file mode 100644
 index 0000000..e09b561
 --- /dev/null
 +++ b/board/armadeus/apf51/apf51.c
-@@ -0,0 +1,1221 @@
+@@ -0,0 +1,1220 @@
 +/*
 + * (C) Copyright 2010-2012 Eric Jarrige, Armadeus Project
 + *
@@ -1058,14 +1058,13 @@ index 0000000..e09b561
 +	return 0;
 +}
 +
-+#ifndef CONFIG_SYS_DCACHE_OFF
 +void enable_caches(void)
 +{
++#ifndef CONFIG_SYS_DCACHE_OFF
 +	/* Enable D-cache. I-cache is already enabled in start.S */
-+	//dcache_enable();
-+}
-+
++	dcache_enable();
 +#endif
++}
 +
 +#ifndef CONFIG_L2_OFF
 +void v7_outer_cache_enable(void)


hooks/post-receive
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armadeus

[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-375-gf6d3307

From: jorasse <jo...@us...> - 2012-06-13 21:55:03

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
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The branch, master has been updated
       via  f6d3307b11ce28e7e315e4953f76f92cb29a97be (commit)
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- Log -----------------------------------------------------------------
commit f6d3307b11ce28e7e315e4953f76f92cb29a97be
Author: Eric Jarrige <eri...@ar...>
Date:   Wed Jun 13 23:57:04 2012 +0200

    [UBOOT] apf27: update code to support U-Boot data cache

-----------------------------------------------------------------------

Summary of changes:
 .../device/armadeus/apf27/apf27-u-boot-2012.04.h   |    3 ++-
 .../device/armadeus/pps/pps-u-boot-2012.04.h       |    3 ++-
 ...-Add-support-for-the-armadeus-apf27-board.patch |    6 +++---
 3 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/buildroot/target/device/armadeus/apf27/apf27-u-boot-2012.04.h b/buildroot/target/device/armadeus/apf27/apf27-u-boot-2012.04.h
index d422159..4ee2da3 100644
--- a/buildroot/target/device/armadeus/apf27/apf27-u-boot-2012.04.h
+++ b/buildroot/target/device/armadeus/apf27/apf27-u-boot-2012.04.h
@@ -25,7 +25,7 @@
 
 #define CONFIG_VERSION_VARIABLE
 #define CONFIG_ENV_VERSION 	"3.0"
-#define CONFIG_IDENT_STRING	" apf27 patch 3.3"
+#define CONFIG_IDENT_STRING	" apf27 patch 3.4"
 #define CONFIG_BOARD_NAME	apf27
 
 /*
@@ -39,6 +39,7 @@
  * Enable the call to miscellaneous platform dependent initialization.
  */
 #define CONFIG_SYS_NO_FLASH	/* to be define before <config_cmd_default.h> */
+#define CONFIG_SYS_DCACHE_OFF
 #define CONFIG_MISC_INIT_R
 
 /*
diff --git a/buildroot/target/device/armadeus/pps/pps-u-boot-2012.04.h b/buildroot/target/device/armadeus/pps/pps-u-boot-2012.04.h
index 6a1f199..e3875ce 100644
--- a/buildroot/target/device/armadeus/pps/pps-u-boot-2012.04.h
+++ b/buildroot/target/device/armadeus/pps/pps-u-boot-2012.04.h
@@ -25,7 +25,7 @@
 
 #define CONFIG_VERSION_VARIABLE
 #define CONFIG_ENV_VERSION 	"3.0"
-#define CONFIG_IDENT_STRING	" pps patch 3.3"
+#define CONFIG_IDENT_STRING	" pps patch 3.4"
 #define CONFIG_BOARD_NAME	pps
 
 /*
@@ -39,6 +39,7 @@
  * Enable the call to miscellaneous platform dependent initialization.
  */
 #define CONFIG_SYS_NO_FLASH	/* to be define before <config_cmd_default.h> */
+#define CONFIG_SYS_DCACHE_OFF
 #define CONFIG_MISC_INIT_R
 
 /*
diff --git a/patches/u-boot/2012.04/302-Add-support-for-the-armadeus-apf27-board.patch b/patches/u-boot/2012.04/302-Add-support-for-the-armadeus-apf27-board.patch
index acc36d1..9fb4010 100644
--- a/patches/u-boot/2012.04/302-Add-support-for-the-armadeus-apf27-board.patch
+++ b/patches/u-boot/2012.04/302-Add-support-for-the-armadeus-apf27-board.patch
@@ -381,14 +381,14 @@ index 0000000..c55da1a
 +	return rc;
 +}
 +
-+#ifndef CONFIG_SYS_DCACHE_OFF
 +void enable_caches(void)
 +{
++#ifndef CONFIG_SYS_DCACHE_OFF
 +	/* Enable D-cache. I-cache is already enabled in start.S */
-+	/* dcache_enable(); */
++	dcache_enable();
++#endif
 +}
 +
-+#endif
 diff --git a/board/armadeus/apf27/config.mk b/board/armadeus/apf27/config.mk
 new file mode 100644
 index 0000000..9713e69


hooks/post-receive
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armadeus

[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-374-g0f26d38

From: jorasse <jo...@us...> - 2012-06-13 18:34:05

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".

The branch, master has been updated
       via  0f26d38497107e4a9c4d1667fdb8b4942f2aee74 (commit)
       via  711506a8205252ffa5335f95a0d345994d362557 (commit)
      from  54a066de3d43584057cbfed47eb8f0fa4223f48c (commit)

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- Log -----------------------------------------------------------------
commit 0f26d38497107e4a9c4d1667fdb8b4942f2aee74
Merge: 711506a 54a066d
Author: Eric Jarrige <eri...@ar...>
Date:   Wed Jun 13 20:35:55 2012 +0200

    Merge branch 'master' of ssh://armadeus.git.sourceforge.net/gitroot/armadeus/armadeus

commit 711506a8205252ffa5335f95a0d345994d362557
Author: Eric Jarrige <eri...@ar...>
Date:   Wed Jun 13 20:35:15 2012 +0200

    [UBOOT] apf51: be ready enable U-Boot data cache

-----------------------------------------------------------------------

Summary of changes:
 .../device/armadeus/apf51/apf51-u-boot-2012.04.h   |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/buildroot/target/device/armadeus/apf51/apf51-u-boot-2012.04.h b/buildroot/target/device/armadeus/apf51/apf51-u-boot-2012.04.h
index 1a04540..3580798 100644
--- a/buildroot/target/device/armadeus/apf51/apf51-u-boot-2012.04.h
+++ b/buildroot/target/device/armadeus/apf51/apf51-u-boot-2012.04.h
@@ -25,7 +25,7 @@
 
 #define CONFIG_VERSION_VARIABLE
 #define CONFIG_ENV_VERSION 	"1.0"
-#define CONFIG_IDENT_STRING	" apf51 patch 1.3"
+#define CONFIG_IDENT_STRING	" apf51 patch 1.4"
 #define CONFIG_BOARD_NAME	apf51
 
 /*
@@ -39,6 +39,7 @@
  * Enable the call to miscellaneous platform dependent initialization.
  */
 #define CONFIG_SYS_NO_FLASH	/* to be define before <config_cmd_default.h> */
+#define CONFIG_SYS_DCACHE_OFF
 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_MISC_INIT_R
 #define CONFIG_BOARD_LATE_INIT


hooks/post-receive
-- 
armadeus

[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-372-g54a066d

From: jorasse <jo...@us...> - 2012-06-13 11:50:02

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".

The branch, master has been updated
       via  54a066de3d43584057cbfed47eb8f0fa4223f48c (commit)
      from  6508d381edeee6cc407c9db8e37404e0635dfe80 (commit)

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- Log -----------------------------------------------------------------
commit 54a066de3d43584057cbfed47eb8f0fa4223f48c
Author: Eric Jarrige <eri...@ar...>
Date:   Wed Jun 13 13:52:02 2012 +0200

    [LINUX]Â 2.6.29/apf27:Â EnableÂ GPIOÂ LEDÂ andÂ LEDÂ triggersÂ -Â ThisÂ activatesÂ theÂ boardÂ LEDÂ andÂ HeartbeatÂ triggerÂ byÂ default

-----------------------------------------------------------------------

Summary of changes:
 .../armadeus/apf27/apf27-linux-2.6.29.config       |   22 ++++++++++++++++++-
 1 files changed, 20 insertions(+), 2 deletions(-)

diff --git a/buildroot/target/device/armadeus/apf27/apf27-linux-2.6.29.config b/buildroot/target/device/armadeus/apf27/apf27-linux-2.6.29.config
index 80fff22..0394033 100644
--- a/buildroot/target/device/armadeus/apf27/apf27-linux-2.6.29.config
+++ b/buildroot/target/device/armadeus/apf27/apf27-linux-2.6.29.config
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
 # Linux kernel version: 2.6.29.6
-# Tue Mar  6 10:20:55 2012
+# Wed Jun 13 13:46:15 2012
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -686,6 +686,7 @@ CONFIG_RT2X00_LIB_USB=m
 CONFIG_RT2X00_LIB=m
 CONFIG_RT2X00_LIB_FIRMWARE=y
 CONFIG_RT2X00_LIB_CRYPTO=y
+CONFIG_RT2X00_LIB_LEDS=y
 # CONFIG_RT2X00_DEBUG is not set
 
 #
@@ -1496,7 +1497,24 @@ CONFIG_MMC_MXC=y
 # CONFIG_MMC_SPI is not set
 # CONFIG_MEMSTICK is not set
 # CONFIG_ACCESSIBILITY is not set
-# CONFIG_NEW_LEDS is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+# CONFIG_LEDS_PCA9532 is not set
+CONFIG_LEDS_GPIO=y
+# CONFIG_LEDS_PCA955X is not set
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
 CONFIG_RTC_LIB=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_HCTOSYS=y


hooks/post-receive
-- 
armadeus

[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-371-g6508d38

From: jorasse <jo...@us...> - 2012-06-13 11:40:28

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".

The branch, master has been updated
       via  6508d381edeee6cc407c9db8e37404e0635dfe80 (commit)
      from  b7bb527547413f9178ef8296e0021ab9f125cc42 (commit)

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- Log -----------------------------------------------------------------
commit 6508d381edeee6cc407c9db8e37404e0635dfe80
Author: Eric Jarrige <eri...@ar...>
Date:   Wed Jun 13 13:42:20 2012 +0200

    [LINUX]Â 2.6.38/apf51:Â EnableÂ GPIOÂ LEDÂ andÂ LEDÂ triggersÂ -Â ThisÂ activatesÂ theÂ boardÂ LEDÂ andÂ HeartbeatÂ triggerÂ byÂ default

-----------------------------------------------------------------------

Summary of changes:
 .../armadeus/apf51/apf51-linux-2.6.38.config       |    8 +++++++-
 1 files changed, 7 insertions(+), 1 deletions(-)

diff --git a/buildroot/target/device/armadeus/apf51/apf51-linux-2.6.38.config b/buildroot/target/device/armadeus/apf51/apf51-linux-2.6.38.config
index 71fbd68..bb22dc4 100644
--- a/buildroot/target/device/armadeus/apf51/apf51-linux-2.6.38.config
+++ b/buildroot/target/device/armadeus/apf51/apf51-linux-2.6.38.config
@@ -240,8 +240,14 @@ CONFIG_MMC_SDHCI_ESDHC_IMX=y
 CONFIG_MMC_SPI=m
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=m
+CONFIG_LEDS_GPIO=y
 CONFIG_LEDS_WM831X_STATUS=m
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+CONFIG_LEDS_TRIGGER_GPIO=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_MXC=y
 CONFIG_RTC_DRV_WM831X=y


hooks/post-receive
-- 
armadeus

[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-370-gb7bb527

From: jorasse <jo...@us...> - 2012-06-12 22:41:56

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".

The branch, master has been updated
       via  b7bb527547413f9178ef8296e0021ab9f125cc42 (commit)
      from  0d65f75f65ee4f404c5579f1422d09eb77b1bfae (commit)

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- Log -----------------------------------------------------------------
commit b7bb527547413f9178ef8296e0021ab9f125cc42
Author: Eric Jarrige <eri...@ar...>
Date:   Wed Jun 13 00:43:37 2012 +0200

    [LINUX] apf28: add usbfs and USB mon to kernel default config

-----------------------------------------------------------------------

Summary of changes:
 .../armadeus/apf28/apf28-linux-2.6.35.config       |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/buildroot/target/device/armadeus/apf28/apf28-linux-2.6.35.config b/buildroot/target/device/armadeus/apf28/apf28-linux-2.6.35.config
index fc9bb0b..7206406 100644
--- a/buildroot/target/device/armadeus/apf28/apf28-linux-2.6.35.config
+++ b/buildroot/target/device/armadeus/apf28/apf28-linux-2.6.35.config
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
 # Linux kernel version: 2.6.35.3
-# Fri May 25 16:25:50 2012
+# Wed Jun 13 00:36:04 2012
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -1525,14 +1525,14 @@ CONFIG_USB=y
 #
 # Miscellaneous USB options
 #
-# CONFIG_USB_DEVICEFS is not set
+CONFIG_USB_DEVICEFS=y
 # CONFIG_USB_DEVICE_CLASS is not set
 # CONFIG_USB_DYNAMIC_MINORS is not set
 CONFIG_USB_SUSPEND=y
 CONFIG_USB_OTG=y
 # CONFIG_USB_OTG_WHITELIST is not set
 # CONFIG_USB_OTG_BLACKLIST_HUB is not set
-# CONFIG_USB_MON is not set
+CONFIG_USB_MON=y
 # CONFIG_USB_WUSB is not set
 # CONFIG_USB_WUSB_CBAF is not set
 


hooks/post-receive
-- 
armadeus

[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-369-g0d65f75

From: jorasse <jo...@us...> - 2012-06-12 22:25:24

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
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The branch, master has been updated
       via  0d65f75f65ee4f404c5579f1422d09eb77b1bfae (commit)
      from  59d31f68eb5b90507f8e67a62e134cbf6506c996 (commit)

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- Log -----------------------------------------------------------------
commit 0d65f75f65ee4f404c5579f1422d09eb77b1bfae
Author: Samuel Martin <s.m...@gm...>
Date:   Tue Jun 12 20:49:11 2012 +0200

    fix 165-Add-Freescale-elftosb-host-package.patch
    
    Add elftosb10.12.01-force_cxx_compiler.patch, that force to build
    elftosb using C++ compiler.
    
    Signed-off-by: Samuel Martin <s.m...@gm...>

-----------------------------------------------------------------------

Summary of changes:
 .../165-Add-Freescale-elftosb-host-package.patch   |   92 ++++++++++++++++++-
 1 files changed, 87 insertions(+), 5 deletions(-)

diff --git a/patches/buildroot/2012.02/165-Add-Freescale-elftosb-host-package.patch b/patches/buildroot/2012.02/165-Add-Freescale-elftosb-host-package.patch
index 8fe5346..4f76ab3 100644
--- a/patches/buildroot/2012.02/165-Add-Freescale-elftosb-host-package.patch
+++ b/patches/buildroot/2012.02/165-Add-Freescale-elftosb-host-package.patch
@@ -8,8 +8,9 @@ to be used with CPUs imx23, imx28, stp37xx
 
 Signed-off-by: Eric Jarrige <eri...@ar...>
 ---
- package/elftosb/elftosb.mk                         |   28 ++++++++++++++++++++
+ package/elftosb/elftosb.mk                         |   27 ++++++++++++++++++++
  .../elftosb/elftosb10.12.01-fixes_includes.patch   |   19 +++++++++++++
+ .../0001-host-elftosb-force-c++-compiler.patch     |   79 +++++++++++++++++++++
  2 files changed, 47 insertions(+), 0 deletions(-)
  create mode 100644 package/elftosb/elftosb.mk
  create mode 100644 package/elftosb/elftosb10.12.01-fixes_includes.patch
@@ -19,7 +20,7 @@ new file mode 100644
 index 0000000..75b95a5
 --- /dev/null
 +++ b/package/elftosb/elftosb.mk
-@@ -0,0 +1,28 @@
+@@ -0,0 +1,27 @@
 +#############################################################
 +#
 +# elftosb
@@ -30,7 +31,7 @@ index 0000000..75b95a5
 +ELFTOSB_SITE = http://repository.timesys.com/buildsources/e/elftosb/elftosb-$(ELFTOSB_VERSION)
 +
 +define HOST_ELFTOSB_BUILD_CMDS
-+	$(HOST_MAKE_ENV) $(MAKE) -C $(@D) all
++	$(HOST_MAKE_ENV) $(MAKE) CXX="$(HOSTCXX)" -C $(@D) all
 +endef
 +
 +define HOST_ELFTOSB_INSTALL_CMDS
@@ -47,7 +48,6 @@ index 0000000..75b95a5
 +endef
 +
 +$(eval $(call GENTARGETS,host))
-+
 diff --git a/package/elftosb/elftosb10.12.01-fixes_includes.patch b/package/elftosb/elftosb10.12.01-fixes_includes.patch
 new file mode 100644
 index 0000000..eaf8eba
@@ -73,6 +73,88 @@ index 0000000..eaf8eba
 + #include <stdint.h>
 + //typedef unsigned long uint32_t;
 + //typedef unsigned short uint16_t;
--- 
+--- /dev/null
++++ b/package/elftosb/elftosb10.12.01-force_cxx_compiler.patch
+@@ -0,0 +1,79 @@
++Subject: [PATCH 1/1] elftosb: force host C++ compiler
++
++Because Freescale provides *.cpp sources and elftosb links again libstdc++,
++force to use the host c++ compiler.
++
++Signed-off-by: Samuel Martin <s.m...@gm...>
++
++---
++Index: host-elftosb-10.12.01/makefile.rules
++===================================================================
++--- host-elftosb-10.12.01.orig/makefile.rules	2012-06-09 21:12:23.557526100 +0200
+++++ host-elftosb-10.12.01/makefile.rules	2012-06-09 21:15:21.659894571 +0200
++@@ -15,6 +15,8 @@
++ # UNAMES is going to be set to either "Linux" or "CYGWIN_NT-5.1"
++ UNAMES = $(shell uname -s)
++
+++CXX ?= g++
+++
++ #*******************************************************************************
++ #                               Directories
++
++@@ -37,9 +39,9 @@
++ #*******************************************************************************
++ #                               Build flags
++-# gcc Compiler flags
+++# Compiler flags
++ #    -g						: Produce debugging information.
++
++-CFLAGS	    = -g $(INC_PATH) -D${UNAMES}
+++CXXFLAGS	= -g $(INC_PATH) -D${UNAMES}
++
++ #*******************************************************************************
++ #                               File lists
++@@ -137,13 +139,13 @@ clean:
++ 		${EXEC_FILE_ELFTOSB2} ${EXEC_FILE_SBTOOL} ${EXEC_FILE_KEYGEN}
++
++ elftosb: ${OBJ_FILES_ELFTOSB2}
++-	gcc ${OBJ_FILES_ELFTOSB2} ${LIBS} -o ${EXEC_FILE_ELFTOSB2}
+++	$(CXX) ${OBJ_FILES_ELFTOSB2} ${LIBS} -o ${EXEC_FILE_ELFTOSB2}
++
++ sbtool: ${OBJ_FILES_SBTOOL}
++-	gcc ${OBJ_FILES_SBTOOL} ${LIBS} -o ${EXEC_FILE_SBTOOL}
+++	$(CXX) ${OBJ_FILES_SBTOOL} ${LIBS} -o ${EXEC_FILE_SBTOOL}
++
++ keygen: ${OBJ_FILES_KEYGEN}
++-	gcc ${OBJ_FILES_KEYGEN} ${LIBS} -o ${EXEC_FILE_KEYGEN}
+++	$(CXX) ${OBJ_FILES_KEYGEN} ${LIBS} -o ${EXEC_FILE_KEYGEN}
++
++
++ #ifeq ("${UNAMES}", "Linux")
++@@ -153,10 +155,10 @@ keygen: ${OBJ_FILES_KEYGEN}
++ .SUFFIXES : .c .cpp
++
++ .c.o :
++-	gcc ${CFLAGS} -c $<
+++	$(CXX) ${CXXFLAGS} -c $<
++
++ .cpp.o :
++-	gcc ${CFLAGS} -c $<
+++	$(CXX) ${CXXFLAGS} -c $<
++
++ #endif
++
++@@ -165,13 +167,13 @@ keygen: ${OBJ_FILES_KEYGEN}
++
++ %.d: %.c
++ 	@set -e; \
++-	$(CC) -MM $(CFLAGS) $< | \
+++	$(CXX) -MM $(CXXFLAGS) $< | \
++ 	sed 's/\($*\)\.o[ :]*/\1.o $@ : /g' > $@; \
++ 	[ -s $@ ]  || rm -f $@
++
++ %.d: %.cpp
++ 	@set -e; \
++-	$(CC) -MM $(CFLAGS) $< | \
+++	$(CXX) -MM $(CXXFLAGS) $< | \
++ 	sed 's/\($*\)\.o[ :]*/\1.o $@ : /g' > $@; \
++ 	[ -s $@ ]  || rm -f $@
++
+--
 1.7.2.5
 


hooks/post-receive
-- 
armadeus

[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-368-g59d31f6

From: jorasse <jo...@us...> - 2012-06-12 21:18:56

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".

The branch, master has been updated
       via  59d31f68eb5b90507f8e67a62e134cbf6506c996 (commit)
      from  f0e1f04330b22dc4abbdbfb806c499213f88176e (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit 59d31f68eb5b90507f8e67a62e134cbf6506c996
Author: Eric Jarrige <eri...@ar...>
Date:   Tue Jun 12 23:20:29 2012 +0200

    [UBOOT] apf9328: bump to U-Boot 2012.04.01

-----------------------------------------------------------------------

Summary of changes:
 buildroot/configs/apf9328_defconfig     |    6 +++---
 buildroot/configs/apf9328test_defconfig |    6 +++---
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/buildroot/configs/apf9328_defconfig b/buildroot/configs/apf9328_defconfig
index a7c50e0..f650af3 100644
--- a/buildroot/configs/apf9328_defconfig
+++ b/buildroot/configs/apf9328_defconfig
@@ -56,10 +56,10 @@ BR2_TARGET_ROOTFS_JFFS2=y
 BR2_TARGET_ROOTFS_JFFS2_PAD=y
 BR2_TARGET_UBOOT=y
 BR2_TARGET_UBOOT_BOARDNAME="$(BR2_BOARD_NAME)"
-BR2_TARGET_UBOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2011.12.h"
+BR2_TARGET_UBOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2012.04.h"
 BR2_TARGET_UBOOT_CUSTOM_TARBALL=y
-BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2011.12.tar.bz2"
-BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2011.12"
+BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2012.04.01.tar.bz2"
+BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2012.04"
 BR2_TARGET_UBOOT_NETWORK=y
 BR2_TARGET_UBOOT_SERVERIP="192.168.0.2"
 BR2_TARGET_UBOOT_IPADDR="192.168.0.10"
diff --git a/buildroot/configs/apf9328test_defconfig b/buildroot/configs/apf9328test_defconfig
index c7c44ce..f520956 100644
--- a/buildroot/configs/apf9328test_defconfig
+++ b/buildroot/configs/apf9328test_defconfig
@@ -99,10 +99,10 @@ BR2_TARGET_ROOTFS_JFFS2=y
 BR2_TARGET_ROOTFS_JFFS2_PAD=y
 BR2_TARGET_UBOOT=y
 BR2_TARGET_UBOOT_BOARDNAME="$(BR2_BOARD_NAME)"
-BR2_TARGET_UBOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2011.12.h"
+BR2_TARGET_UBOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2012.04.h"
 BR2_TARGET_UBOOT_CUSTOM_TARBALL=y
-BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2011.12.tar.bz2"
-BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2011.12"
+BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2012.04.01.tar.bz2"
+BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2012.04"
 BR2_TARGET_UBOOT_NETWORK=y
 BR2_TARGET_UBOOT_SERVERIP="192.168.0.2"
 BR2_TARGET_UBOOT_IPADDR="192.168.0.10"


hooks/post-receive
-- 
armadeus

[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-367-gf0e1f04

From: jorasse <jo...@us...> - 2012-06-12 19:41:01

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".

The branch, master has been updated
       via  f0e1f04330b22dc4abbdbfb806c499213f88176e (commit)
      from  066e9440b6c59014ad3989a6a71df9ef620f3b52 (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit f0e1f04330b22dc4abbdbfb806c499213f88176e
Author: Eric Jarrige <eri...@ar...>
Date:   Tue Jun 12 21:42:41 2012 +0200

    [UBOOT] pps27: bump to U-Boot 2012.04.01

-----------------------------------------------------------------------

Summary of changes:
 buildroot/configs/pps_defconfig                    |    6 +++---
 .../{pps-u-boot-2011.12.h => pps-u-boot-2012.04.h} |    4 ++--
 2 files changed, 5 insertions(+), 5 deletions(-)
 copy buildroot/target/device/armadeus/pps/{pps-u-boot-2011.12.h => pps-u-boot-2012.04.h} (99%)

diff --git a/buildroot/configs/pps_defconfig b/buildroot/configs/pps_defconfig
index 756dfb2..3e4c7f5 100644
--- a/buildroot/configs/pps_defconfig
+++ b/buildroot/configs/pps_defconfig
@@ -72,10 +72,10 @@ BR2_TARGET_ROOTFS_UBIFS_MAXLEBCNT=2047
 BR2_TARGET_ROOTFS_UBI=y
 BR2_TARGET_UBOOT=y
 BR2_TARGET_UBOOT_BOARDNAME="apf27"
-BR2_TARGET_UBOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2011.12.h"
+BR2_TARGET_UBOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2012.04.h"
 BR2_TARGET_UBOOT_CUSTOM_TARBALL=y
-BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2011.12.tar.bz2"
-BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2011.12"
+BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2012.04.01.tar.bz2"
+BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2012.04"
 BR2_TARGET_UBOOT_FORMAT_NAND_BIN=y
 BR2_TARGET_UBOOT_NETWORK=y
 BR2_TARGET_UBOOT_SERVERIP="192.168.0.2"
diff --git a/buildroot/target/device/armadeus/pps/pps-u-boot-2011.12.h b/buildroot/target/device/armadeus/pps/pps-u-boot-2012.04.h
similarity index 99%
copy from buildroot/target/device/armadeus/pps/pps-u-boot-2011.12.h
copy to buildroot/target/device/armadeus/pps/pps-u-boot-2012.04.h
index a5f399e..6a1f199 100644
--- a/buildroot/target/device/armadeus/pps/pps-u-boot-2011.12.h
+++ b/buildroot/target/device/armadeus/pps/pps-u-boot-2012.04.h
@@ -25,7 +25,7 @@
 
 #define CONFIG_VERSION_VARIABLE
 #define CONFIG_ENV_VERSION 	"3.0"
-#define CONFIG_IDENT_STRING	" pps patch 3.1"
+#define CONFIG_IDENT_STRING	" pps patch 3.3"
 #define CONFIG_BOARD_NAME	pps
 
 /*
@@ -100,7 +100,7 @@
  * Memory configurations
  */
 #define CONFIG_NR_DRAM_POPULATED	1
-#define CONFIG_NR_DRAM_BANKS	CONFIG_NR_DRAM_POPULATED
+#define CONFIG_NR_DRAM_BANKS	2
 
 #define CONFIG_SYS_SDRAM_MBYTE_SYZE 64
 


hooks/post-receive
-- 
armadeus

[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-366-g066e944

From: jorasse <jo...@us...> - 2012-06-12 17:12:20

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".

The branch, master has been updated
       via  066e9440b6c59014ad3989a6a71df9ef620f3b52 (commit)
      from  0cd0aabdba6f88881f3df1ebd88b32196a32e5a4 (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit 066e9440b6c59014ad3989a6a71df9ef620f3b52
Author: Eric Jarrige <eri...@ar...>
Date:   Tue Jun 12 19:12:00 2012 +0200

    [BUILDROOT] apf51: bump to U-Boot 2012.04.01

-----------------------------------------------------------------------

Summary of changes:
 buildroot/configs/apf51_defconfig                  |    6 +++---
 buildroot/configs/apf51test_defconfig              |    6 +++---
 ...f51-u-boot-2011.12.h => apf51-u-boot-2012.04.h} |    2 +-
 3 files changed, 7 insertions(+), 7 deletions(-)
 copy buildroot/target/device/armadeus/apf51/{apf51-u-boot-2011.12.h => apf51-u-boot-2012.04.h} (99%)

diff --git a/buildroot/configs/apf51_defconfig b/buildroot/configs/apf51_defconfig
index a214580..e4d5fac 100644
--- a/buildroot/configs/apf51_defconfig
+++ b/buildroot/configs/apf51_defconfig
@@ -72,10 +72,10 @@ BR2_TARGET_ROOTFS_UBIFS_MAXLEBCNT=135301
 BR2_TARGET_ROOTFS_UBI=y
 BR2_TARGET_UBOOT=y
 BR2_TARGET_UBOOT_BOARDNAME="$(BR2_BOARD_NAME)"
-BR2_TARGET_UBOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2011.12.h"
+BR2_TARGET_UBOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2012.04.h"
 BR2_TARGET_UBOOT_CUSTOM_TARBALL=y
-BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2011.12.tar.bz2"
-BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2011.12"
+BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2012.04.01.tar.bz2"
+BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2012.04"
 BR2_TARGET_UBOOT_FORMAT_NAND_BIN=y
 BR2_TARGET_UBOOT_NETWORK=y
 BR2_TARGET_UBOOT_SERVERIP="192.168.0.2"
diff --git a/buildroot/configs/apf51test_defconfig b/buildroot/configs/apf51test_defconfig
index 1c19f89..5a318c2 100644
--- a/buildroot/configs/apf51test_defconfig
+++ b/buildroot/configs/apf51test_defconfig
@@ -144,10 +144,10 @@ BR2_TARGET_ROOTFS_UBIFS_MAXLEBCNT=135301
 BR2_TARGET_ROOTFS_UBI=y
 BR2_TARGET_UBOOT=y
 BR2_TARGET_UBOOT_BOARDNAME="$(BR2_BOARD_NAME)"
-BR2_TARGET_UBOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2011.12.h"
+BR2_TARGET_UBOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2012.04.h"
 BR2_TARGET_UBOOT_CUSTOM_TARBALL=y
-BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2011.12.tar.bz2"
-BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2011.12"
+BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2012.04.01.tar.bz2"
+BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2012.04"
 BR2_TARGET_UBOOT_FORMAT_NAND_BIN=y
 BR2_TARGET_UBOOT_NETWORK=y
 BR2_TARGET_UBOOT_SERVERIP="192.168.0.2"
diff --git a/buildroot/target/device/armadeus/apf51/apf51-u-boot-2011.12.h b/buildroot/target/device/armadeus/apf51/apf51-u-boot-2012.04.h
similarity index 99%
copy from buildroot/target/device/armadeus/apf51/apf51-u-boot-2011.12.h
copy to buildroot/target/device/armadeus/apf51/apf51-u-boot-2012.04.h
index 4202689..1a04540 100644
--- a/buildroot/target/device/armadeus/apf51/apf51-u-boot-2011.12.h
+++ b/buildroot/target/device/armadeus/apf51/apf51-u-boot-2012.04.h
@@ -25,7 +25,7 @@
 
 #define CONFIG_VERSION_VARIABLE
 #define CONFIG_ENV_VERSION 	"1.0"
-#define CONFIG_IDENT_STRING	" apf51 patch 1.2"
+#define CONFIG_IDENT_STRING	" apf51 patch 1.3"
 #define CONFIG_BOARD_NAME	apf51
 
 /*


hooks/post-receive
-- 
armadeus

[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-365-g0cd0aab

From: jorasse <jo...@us...> - 2012-06-12 16:49:27

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".

The branch, master has been updated
       via  0cd0aabdba6f88881f3df1ebd88b32196a32e5a4 (commit)
      from  c1d67f2134c01703573b8cb018a9eb8131d683b5 (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit 0cd0aabdba6f88881f3df1ebd88b32196a32e5a4
Author: Eric Jarrige <eri...@ar...>
Date:   Tue Jun 12 18:50:15 2012 +0200

    [BUILDROOT] apf27: bump to U-Boot 2012.04.01

-----------------------------------------------------------------------

Summary of changes:
 buildroot/configs/apf27_defconfig     |    6 +++---
 buildroot/configs/apf27test_defconfig |    6 +++---
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/buildroot/configs/apf27_defconfig b/buildroot/configs/apf27_defconfig
index 01e7c0d..9bcb9ba 100644
--- a/buildroot/configs/apf27_defconfig
+++ b/buildroot/configs/apf27_defconfig
@@ -65,10 +65,10 @@ BR2_TARGET_ROOTFS_UBIFS_MAXLEBCNT=2047
 BR2_TARGET_ROOTFS_UBI=y
 BR2_TARGET_UBOOT=y
 BR2_TARGET_UBOOT_BOARDNAME="$(BR2_BOARD_NAME)"
-BR2_TARGET_UBOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2011.12.h"
+BR2_TARGET_UBOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2012.04.h"
 BR2_TARGET_UBOOT_CUSTOM_TARBALL=y
-BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2011.12.tar.bz2"
-BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2011.12"
+BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2012.04.01.tar.bz2"
+BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2012.04"
 BR2_TARGET_UBOOT_FORMAT_NAND_BIN=y
 BR2_TARGET_UBOOT_NETWORK=y
 BR2_TARGET_UBOOT_SERVERIP="192.168.0.2"
diff --git a/buildroot/configs/apf27test_defconfig b/buildroot/configs/apf27test_defconfig
index e89448b..b65623f 100644
--- a/buildroot/configs/apf27test_defconfig
+++ b/buildroot/configs/apf27test_defconfig
@@ -126,10 +126,10 @@ BR2_TARGET_ROOTFS_UBIFS_MAXLEBCNT=2047
 BR2_TARGET_ROOTFS_UBI=y
 BR2_TARGET_UBOOT=y
 BR2_TARGET_UBOOT_BOARDNAME="$(BR2_BOARD_NAME)"
-BR2_TARGET_UBOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2011.12.h"
+BR2_TARGET_UBOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2012.04.h"
 BR2_TARGET_UBOOT_CUSTOM_TARBALL=y
-BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2011.12.tar.bz2"
-BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2011.12"
+BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2012.04.01.tar.bz2"
+BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2012.04"
 BR2_TARGET_UBOOT_FORMAT_NAND_BIN=y
 BR2_TARGET_UBOOT_NETWORK=y
 BR2_TARGET_UBOOT_SERVERIP="192.168.0.2"


hooks/post-receive
-- 
armadeus

[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-364-gc1d67f2

From: jorasse <jo...@us...> - 2012-06-12 15:55:49

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".

The branch, master has been updated
       via  c1d67f2134c01703573b8cb018a9eb8131d683b5 (commit)
      from  1fef426e339d611a55af2c240800b3d091098fdd (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit c1d67f2134c01703573b8cb018a9eb8131d683b5
Author: Eric Jarrige <eri...@ar...>
Date:   Tue Jun 12 17:57:16 2012 +0200

    [UBOOT] apf51: disable i2c driver - for the time being mx51 i2c is buggy and not needed anyway

-----------------------------------------------------------------------

Summary of changes:
 .../device/armadeus/apf51/apf51-u-boot-2011.12.h   |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/buildroot/target/device/armadeus/apf51/apf51-u-boot-2011.12.h b/buildroot/target/device/armadeus/apf51/apf51-u-boot-2011.12.h
index 270b910..4202689 100644
--- a/buildroot/target/device/armadeus/apf51/apf51-u-boot-2011.12.h
+++ b/buildroot/target/device/armadeus/apf51/apf51-u-boot-2011.12.h
@@ -25,7 +25,7 @@
 
 #define CONFIG_VERSION_VARIABLE
 #define CONFIG_ENV_VERSION 	"1.0"
-#define CONFIG_IDENT_STRING	" apf51 patch 1.1"
+#define CONFIG_IDENT_STRING	" apf51 patch 1.2"
 #define CONFIG_BOARD_NAME	apf51
 
 /*
@@ -90,7 +90,7 @@
 #define CONFIG_CMD_CACHE	/* icache, dcache               */
 #define CONFIG_CMD_DHCP		/* DHCP Support                 */
 /*#define CONFIG_CMD_DNS*/
-#define CONFIG_CMD_I2C		/* I2C serial bus support       */
+/*#define CONFIG_CMD_I2C*/	/* I2C serial bus support       */
 #define CONFIG_CMD_IIM		/* imx iim fuse                 */
 #define CONFIG_CMD_MTDPARTS	/* MTD partition support        */
 #define CONFIG_CMD_NAND		/* NAND support                 */
@@ -370,12 +370,14 @@
 /*
  * I2C
  */
+#ifdef	CONFIG_CMD_I2C
 #define	CONFIG_HARD_I2C			/* I2C with hardware support    */
 #define CONFIG_I2C_MXC			1
 #define CONFIG_SYS_I2C_PORT		I2C2_BASE_ADDR
 #define CONFIG_SYS_I2C_MX51_PORT2
 #define CONFIG_SYS_I2C_SPEED		400000
 #define CONFIG_SYS_I2C_SLAVE		0xfe
+#endif /* CONFIG_CMD_I2C */
 
 /*
  * SPI


hooks/post-receive
-- 
armadeus

[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-363-g1fef426

From: jorasse <jo...@us...> - 2012-06-12 15:08:46

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".

The branch, master has been updated
       via  1fef426e339d611a55af2c240800b3d091098fdd (commit)
      from  75ea404046b43a99632421ddd02ed1ce232b8c18 (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit 1fef426e339d611a55af2c240800b3d091098fdd
Author: Eric Jarrige <eri...@ar...>
Date:   Tue Jun 12 17:10:32 2012 +0200

    [UBOOT] apf51: restore (fix) clock tree frequencies after FPGA firmware upload

-----------------------------------------------------------------------

Summary of changes:
 patches/u-boot/2011.12/401-apf51.patch |    2 +-
 patches/u-boot/2012.04/401-apf51.patch |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/patches/u-boot/2011.12/401-apf51.patch b/patches/u-boot/2011.12/401-apf51.patch
index b752760..98aaf79 100644
--- a/patches/u-boot/2011.12/401-apf51.patch
+++ b/patches/u-boot/2011.12/401-apf51.patch
@@ -1563,7 +1563,7 @@ Index: u-boot-2011.12/board/armadeus/apf51/fpga.c
 +	struct weim *weim = (struct weim *)WEIM_BASE_ADDR;
 +	PRINTF("%s:%d: FPGA POST \n", __FUNCTION__, __LINE__);
 +	/* restore emi_clk_sel */
-+	writel(temp_clk | EMI_CLK_SEL, &mxc_ccm->cbcdr);
++	writel(temp_clk, &mxc_ccm->cbcdr);
 +	udelay(10);		/* wait a few us after emi_clk_sel change */
 +	writel(temp_rcr1, &weim->cs1rcr1);
 +	writel(temp_wcr1, &weim->cs1wcr1);
diff --git a/patches/u-boot/2012.04/401-apf51.patch b/patches/u-boot/2012.04/401-apf51.patch
index 1f63d9d..6b38aeb 100644
--- a/patches/u-boot/2012.04/401-apf51.patch
+++ b/patches/u-boot/2012.04/401-apf51.patch
@@ -1526,7 +1526,7 @@ index 0000000..52f1869
 +	struct weim *weim = (struct weim *)WEIM_BASE_ADDR;
 +	PRINTF("%s:%d: FPGA POST \n", __FUNCTION__, __LINE__);
 +	/* restore emi_clk_sel */
-+	writel(temp_clk | EMI_CLK_SEL, &mxc_ccm->cbcdr);
++	writel(temp_clk, &mxc_ccm->cbcdr);
 +	udelay(10);		/* wait a few us after emi_clk_sel change */
 +	writel(temp_rcr1, &weim->cs1rcr1);
 +	writel(temp_wcr1, &weim->cs1wcr1);


hooks/post-receive
-- 
armadeus

[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-362-g75ea404

From: jorasse <jo...@us...> - 2012-06-11 19:11:37

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".

The branch, master has been updated
       via  75ea404046b43a99632421ddd02ed1ce232b8c18 (commit)
      from  9f7dc4ae66b9db2601bfb53190a2bd7b4a911489 (commit)

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- Log -----------------------------------------------------------------
commit 75ea404046b43a99632421ddd02ed1ce232b8c18
Author: Philippe Reynes <tr...@ya...>
Date:   Mon Jun 11 21:12:24 2012 +0200

    [UBOOT] 2012.04: refactor apf27 patchwork - Thx Trem

-----------------------------------------------------------------------

Summary of changes:
 ...dule-and-I-O-Multiplexer-constant-for-mx2.patch |  110 +-
 ...-Add-support-for-the-armadeus-apf27-board.patch | 1383 +++-----------------
 .../303-Add-nand-spl-support-on-apf27.patch        |  753 +++++++++++
 .../2012.04/304-Add-FPGA-support-apf27.patch       |  386 ++++++
 .../u-boot/2012.04/311-imx-nand-lock-unlock.patch  |    2 +
 patches/u-boot/2012.04/320-spartan.patch           |    2 +
 patches/u-boot/2012.04/321-add_spartan6.patch      |    2 +
 patches/u-boot/2012.04/330-arm926-relocation.patch |    1 -
 .../u-boot/2012.04/340-apf27-misc-commands.patch   |    6 +-
 .../2012.04/350-nand_large_file_download.patch     |    2 +
 10 files changed, 1379 insertions(+), 1268 deletions(-)
 create mode 100644 patches/u-boot/2012.04/303-Add-nand-spl-support-on-apf27.patch
 create mode 100644 patches/u-boot/2012.04/304-Add-FPGA-support-apf27.patch

diff --git a/patches/u-boot/2012.04/301-Add-GPIO-Module-and-I-O-Multiplexer-constant-for-mx2.patch b/patches/u-boot/2012.04/301-Add-GPIO-Module-and-I-O-Multiplexer-constant-for-mx2.patch
index c05dfce..39fe89f 100644
--- a/patches/u-boot/2012.04/301-Add-GPIO-Module-and-I-O-Multiplexer-constant-for-mx2.patch
+++ b/patches/u-boot/2012.04/301-Add-GPIO-Module-and-I-O-Multiplexer-constant-for-mx2.patch
@@ -1,16 +1,16 @@
-Add WEIM, NFC SYSTEM_CTLconstants to the mx27 CPU
+Add WEIM, NFC SYSTEM_CTL constants to the mx27 CPU
 
 Signed-off-by: Philippe Reynes <tr...@ya...>
 Signed-off-by: Eric Jarrige <eri...@ar...>
 ---
- arch/arm/cpu/arm926ejs/mx27/asm-offsets.c |   28 +++++++++++
- arch/arm/include/asm/arch-mx27/imx-regs.h |    9 ++++
- arch/arm/include/asm/arch-mx27/mxc_nand.h |   73 +++++++++++++++++++++++++++++
- 3 files changed, 110 insertions(+), 0 deletions(-)
+ arch/arm/cpu/arm926ejs/mx27/asm-offsets.c |   34 ++++++++++++
+ arch/arm/include/asm/arch-mx27/imx-regs.h |   11 ++++-
+ arch/arm/include/asm/arch-mx27/mxc_nand.h |   83 +++++++++++++++++++++++++++++
+ 3 files changed, 127 insertions(+), 1 deletions(-)
  create mode 100644 arch/arm/include/asm/arch-mx27/mxc_nand.h
 
 diff --git a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
-index f3a8d7b..7dad00f 100644
+index f3a8d7b..b95c58c 100644
 --- a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
 +++ b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
 @@ -34,6 +34,7 @@ int main(void)
@@ -21,16 +21,22 @@ index f3a8d7b..7dad00f 100644
  
  	DEFINE(ESDCTL0_ROF, offsetof(struct esdramc_regs, esdctl0));
  	DEFINE(ESDCFG0_ROF, offsetof(struct esdramc_regs, esdcfg0));
-@@ -41,5 +42,32 @@ int main(void)
+@@ -41,5 +42,38 @@ int main(void)
  	DEFINE(ESDCFG1_ROF, offsetof(struct esdramc_regs, esdcfg1));
  	DEFINE(ESDMISC_ROF, offsetof(struct esdramc_regs, esdmisc));
  
-+	DEFINE(GPCR, IMX_SYSTEM_CTL_BASE + offsetof(struct system_control_regs, gpcr));
-+	DEFINE(FMCR, IMX_SYSTEM_CTL_BASE + offsetof(struct system_control_regs, fmcr));
-+	DEFINE(DSCR2, IMX_SYSTEM_CTL_BASE + offsetof(struct system_control_regs, dscr2));
-+	DEFINE(DSCR3, IMX_SYSTEM_CTL_BASE + offsetof(struct system_control_regs, dscr3));
-+	DEFINE(DSCR7, IMX_SYSTEM_CTL_BASE + offsetof(struct system_control_regs, dscr7));
-+	DEFINE(DSCR10, IMX_SYSTEM_CTL_BASE + offsetof(struct system_control_regs, dscr10));
++	DEFINE(GPCR, IMX_SYSTEM_CTL_BASE +
++	       offsetof(struct system_control_regs, gpcr));
++	DEFINE(FMCR, IMX_SYSTEM_CTL_BASE +
++	       offsetof(struct system_control_regs, fmcr));
++	DEFINE(DSCR2, IMX_SYSTEM_CTL_BASE +
++	       offsetof(struct system_control_regs, dscr2));
++	DEFINE(DSCR3, IMX_SYSTEM_CTL_BASE +
++	       offsetof(struct system_control_regs, dscr3));
++	DEFINE(DSCR7, IMX_SYSTEM_CTL_BASE +
++	       offsetof(struct system_control_regs, dscr7));
++	DEFINE(DSCR10, IMX_SYSTEM_CTL_BASE +
++	       offsetof(struct system_control_regs, dscr10));
 +
 +	DEFINE(CS0U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs0u));
 +	DEFINE(CS0L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs0l));
@@ -55,7 +61,7 @@ index f3a8d7b..7dad00f 100644
  	return 0;
  }
 diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h b/arch/arm/include/asm/arch-mx27/imx-regs.h
-index ced5b2a..4df67d6 100644
+index ced5b2a..fe2861e 100644
 --- a/arch/arm/include/asm/arch-mx27/imx-regs.h
 +++ b/arch/arm/include/asm/arch-mx27/imx-regs.h
 @@ -206,7 +206,7 @@ struct iim_regs {
@@ -83,10 +89,10 @@ index ced5b2a..4df67d6 100644
  #endif				/* _IMX_REGS_H */
 diff --git a/arch/arm/include/asm/arch-mx27/mxc_nand.h b/arch/arm/include/asm/arch-mx27/mxc_nand.h
 new file mode 100644
-index 0000000..99af18b
+index 0000000..3429601
 --- /dev/null
 +++ b/arch/arm/include/asm/arch-mx27/mxc_nand.h
-@@ -0,0 +1,73 @@
+@@ -0,0 +1,83 @@
 +/*
 + * (c) 2012 Philippe Reynes <tr...@ya...>
 + *
@@ -116,48 +122,58 @@ index 0000000..99af18b
 + * NFC registers address offest
 + */
 +#define NFC_OFFSET_BUFSIZE             (0x00) /* Internal SRAM Size */
-+#define NFC_OFFSET_BLCK_ADD_LOCK       (0x02) /* NAND Flash Block Address for Lock Check */
-+#define NFC_OFFSET_BUF_ADDR            (0x04) /* Buffer Number for Page Data Transfer To/
-+                                                 From Flash Memory */
++#define NFC_OFFSET_BLCK_ADD_LOCK       (0x02) /* NAND Flash Block Address for
++						 Lock Check */
++#define NFC_OFFSET_BUF_ADDR            (0x04) /* Buffer Number for Page Data
++						 Transfer To/From Flash Mem */
 +#define NFC_OFFSET_FLASH_ADDR          (0x06) /* NAND Flash Address */
 +#define NFC_OFFSET_FLASH_CMD           (0x08) /* NAND Flash Command */
-+#define NFC_OFFSET_CONFIG              (0x0A) /* NFC Internal Buffer Lock Control */
-+#define NFC_OFFSET_ECC_STATUS_RESULT   (0x0C) /* Controller Status/Result of Flash Operation */
-+#define NFC_OFFSET_ECC_RSLT_MAIN_AREA  (0x0E) /* ECC Error Position of Main Area Data Error */
-+#define NFC_OFFSET_ECC_RSLT_SPARE_AREA (0x10) /* ECC Error Position of Spare Area Data Error */
++#define NFC_OFFSET_CONFIG              (0x0A) /* NFC Internal Buffer Lock
++						 Control */
++#define NFC_OFFSET_ECC_STATUS_RESULT   (0x0C) /* Controller Status/Result of
++						 Flash Operation */
++#define NFC_OFFSET_ECC_RSLT_MAIN_AREA  (0x0E) /* ECC Error Position of Main
++						 Area Data Error */
++#define NFC_OFFSET_ECC_RSLT_SPARE_AREA (0x10) /* ECC Error Position of Spare
++						 Area Data Error */
 +#define NFC_OFFSET_WRPROT              (0x12) /* Nand Flash Write Protection */
-+#define NFC_OFFSET_UNLOCKSTART_BLKADDR (0x14) /* Start Address for Write Protection Unlock */
-+#define NFC_OFFSET_UNLOCKEND_BLKADDR   (0x16) /* End Address for Write Protection Unlock */
-+#define NFC_OFFSET_WRPR_STAT           (0x18) /* Current Nand Flash Write Protection Status */
-+#define NFC_OFFSET_CONFIG1             (0x1A) /* Nand Flash Operation Configuration 1 */
-+#define NFC_OFFSET_CONFIG2             (0x1C) /* Nand Flash Operation Configuration 2 */
++#define NFC_OFFSET_UNLOCKSTART_BLKADDR (0x14) /* Start Address for Write
++						 Protection Unlock */
++#define NFC_OFFSET_UNLOCKEND_BLKADDR   (0x16) /* End Address for Write
++						 Protection Unlock */
++#define NFC_OFFSET_WRPR_STAT           (0x18) /* Current Nand Flash Write
++						 Protection Status */
++#define NFC_OFFSET_CONFIG1             (0x1A) /* Nand Flash Operation
++						 Configuration 1 */
++#define NFC_OFFSET_CONFIG2             (0x1C) /* Nand Flash Operation
++						 Configuration 2 */
 +
 +/* NFC_ECC_STATUS_RESULT Status Register Bit Fields */
-+#define NFC_ECC_STAT_ERM_SHFT  (2)                 /* ERM shift */
-+#define NFC_ECC_STAT_ERS_MASK  (0x03)          /* ERS mask  */
-+#define NFC_ECC_STAT_ERROR1    (1<<0)          /* correctable error */
-+#define NFC_ECC_STAT_ERROR2    (1<<1)          /* non correctable error */
++#define NFC_ECC_STAT_ERM_SHFT   (2)      /* ERM shift */
++#define NFC_ECC_STAT_ERS_MASK   (0x03)   /* ERS mask  */
++#define NFC_ECC_STAT_ERROR1     (1<<0)   /* correctable error */
++#define NFC_ECC_STAT_ERROR2     (1<<1)   /* non correctable error */
 +
 +/* NFC_CONFIG Control Register Bit Fields */
-+#define NFC_CONFIG_UNLOCKED     (1<<1)         /* unlocked */
-+#define NFC_CONFIG_LOCKED       (1<<0)         /* locked */
++#define NFC_CONFIG_UNLOCKED     (1<<1)   /* unlocked */
++#define NFC_CONFIG_LOCKED       (1<<0)   /* locked */
 +
 +/* NFC_CONFIG1 Control Register Bit Fields */
-+#define NFC_CONFIG1_CEn            (1<<7)              /* Flash force CE */
-+#define NFC_CONFIG1_RST            (1<<6)              /* Reset */
-+#define NFC_CONFIG1_BIG            (1<<5)              /* Big Endian Mode */
-+#define NFC_CONFIG1_INT_MSK     (1<<4)         /* Mask Interrupt Bit   */
-+#define NFC_CONFIG1_ECC_EN         (1<<3)              /* ECC operation enable */
-+#define NFC_CONFIG1_SP_EN          (1<<2)              /* Flash spare enable */
++#define NFC_CONFIG1_CEn         (1<<7)   /* Flash force CE */
++#define NFC_CONFIG1_RST         (1<<6)   /* Reset */
++#define NFC_CONFIG1_BIG         (1<<5)   /* Big Endian Mode */
++#define NFC_CONFIG1_INT_MSK     (1<<4)   /* Mask Interrupt Bit   */
++#define NFC_CONFIG1_ECC_EN      (1<<3)   /* ECC operation enable */
++#define NFC_CONFIG1_SP_EN       (1<<2)   /* Flash spare enable */
 +
 +/* NFC_CONFIG2 Control Register Bit Fields */
-+#define NFC_CONFIG2_INT                (1<<15)         /* Interrupt */
-+#define NFC_CONFIG2_FDO_STATUS (4<<3)          /* Flash status output */
-+#define NFC_CONFIG2_FDO_ID         (2<<3)              /* Flash ID output */
-+#define NFC_CONFIG2_FDO_PAGE    (1<<3)         /* Flash data output */
-+#define NFC_CONFIG2_FDI         (1<<2)         /* Flash data input     */
-+#define NFC_CONFIG2_FADD           (1<<1)              /* Flash address input */
-+#define NFC_CONFIG2_FCMD           (1<<0)              /* Flash command input */
++#define NFC_CONFIG2_INT         (1<<15)  /* Interrupt */
++#define NFC_CONFIG2_FDO_STATUS  (4<<3)   /* Flash status output */
++#define NFC_CONFIG2_FDO_ID      (2<<3)   /* Flash ID output */
++#define NFC_CONFIG2_FDO_PAGE    (1<<3)   /* Flash data output */
++#define NFC_CONFIG2_FDI         (1<<2)   /* Flash data input */
++#define NFC_CONFIG2_FADD        (1<<1)   /* Flash address input */
++#define NFC_CONFIG2_FCMD        (1<<0)   /* Flash command input */
 +
 +#endif
 -- 
diff --git a/patches/u-boot/2012.04/302-Add-support-for-the-armadeus-apf27-board.patch b/patches/u-boot/2012.04/302-Add-support-for-the-armadeus-apf27-board.patch
index 76ed5d0..acc36d1 100644
--- a/patches/u-boot/2012.04/302-Add-support-for-the-armadeus-apf27-board.patch
+++ b/patches/u-boot/2012.04/302-Add-support-for-the-armadeus-apf27-board.patch
@@ -4,38 +4,28 @@ Signed-off-by: Philippe Reynes <tr...@ya...>
 Signed-off-by: Eric Jarrige <eri...@ar...>
 Signed-off-by: Nicolas Colombain <nic...@ar...>
 ---
- board/armadeus/apf27/Makefile            |   50 +++
- board/armadeus/apf27/apf27.c             |  305 +++++++++++++++++
- board/armadeus/apf27/config.mk           |   13 +
- board/armadeus/apf27/fpga.c              |  269 +++++++++++++++
- board/armadeus/apf27/fpga.h              |   39 +++
- board/armadeus/apf27/lowlevel_init.S     |  277 +++++++++++++++
- boards.cfg                               |    1 +
- nand_spl/board/armadeus/apf27/Makefile   |   77 +++++
- nand_spl/board/armadeus/apf27/config.mk  |   43 +++
- nand_spl/board/armadeus/apf27/start.S    |  552 ++++++++++++++++++++++++++++++
- nand_spl/board/armadeus/apf27/u-boot.lds |   37 ++
- 11 files changed, 1663 insertions(+), 0 deletions(-)
+ board/armadeus/apf27/Makefile        |   52 ++++++
+ board/armadeus/apf27/apf27.c         |  310 ++++++++++++++++++++++++++++++++++
+ board/armadeus/apf27/config.mk       |   38 ++++
+ board/armadeus/apf27/lowlevel_init.S |  275 ++++++++++++++++++++++++++++++
+ boards.cfg                           |    1 +
+ 5 files changed, 676 insertions(+), 0 deletions(-)
  create mode 100644 board/armadeus/apf27/Makefile
  create mode 100644 board/armadeus/apf27/apf27.c
  create mode 100644 board/armadeus/apf27/config.mk
- create mode 100644 board/armadeus/apf27/fpga.c
- create mode 100644 board/armadeus/apf27/fpga.h
  create mode 100644 board/armadeus/apf27/lowlevel_init.S
- create mode 100644 nand_spl/board/armadeus/apf27/Makefile
- create mode 100644 nand_spl/board/armadeus/apf27/config.mk
- create mode 100644 nand_spl/board/armadeus/apf27/start.S
- create mode 100644 nand_spl/board/armadeus/apf27/u-boot.lds
 
 diff --git a/board/armadeus/apf27/Makefile b/board/armadeus/apf27/Makefile
 new file mode 100644
-index 0000000..b67334c
+index 0000000..fe6ba5c
 --- /dev/null
 +++ b/board/armadeus/apf27/Makefile
-@@ -0,0 +1,50 @@
+@@ -0,0 +1,52 @@
 +#
 +# (C) Copyright 2000-2004
 +# Wolfgang Denk, DENX Software Engineering, wd...@de....
++# (C) Copyright 2012
++# Eric Jarrige <eri...@ar...>
 +#
 +# See file CREDITS for list of people who contributed to this
 +# project.
@@ -60,7 +50,7 @@ index 0000000..b67334c
 +
 +LIB	= $(obj)lib$(BOARD).o
 +
-+COBJS	:= apf27.o fpga.o
++COBJS	:= apf27.o
 +SOBJS	:= lowlevel_init.o
 +
 +SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
@@ -85,13 +75,13 @@ index 0000000..b67334c
 +#########################################################################
 diff --git a/board/armadeus/apf27/apf27.c b/board/armadeus/apf27/apf27.c
 new file mode 100644
-index 0000000..1f1bd42
+index 0000000..c55da1a
 --- /dev/null
 +++ b/board/armadeus/apf27/apf27.c
-@@ -0,0 +1,325 @@
+@@ -0,0 +1,310 @@
 +/*
 + * Copyright (C) 2007 Sascha Hauer, Pengutronix
-+ * Copyright (C) 2008,2009 Eric Jarrige <jo...@us...>
++ * Copyright (C) 2008-2012 Eric Jarrige <eri...@ar...>
 + *
 + * This program is free software; you can redistribute it and/or
 + * modify it under the terms of the GNU General Public License as
@@ -112,7 +102,6 @@ index 0000000..1f1bd42
 +
 +#include <common.h>
 +#include "crc.h"
-+#include "fpga.h"
 +#include <jffs2/jffs2.h>
 +#include <nand.h>
 +#include <netdev.h>
@@ -144,103 +133,103 @@ index 0000000..1f1bd42
 +
 +static void apf27_gpio_init(void)
 +{
-+  	struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE;
-+
-+    /* PORT A */
-+    writel(CONFIG_SYS_DR_A_VAL,    &regs->port[PORTA].dr);
-+    writel(CONFIG_SYS_OCR1_A_VAL,  &regs->port[PORTA].ocr1);
-+    writel(CONFIG_SYS_OCR2_A_VAL,  &regs->port[PORTA].ocr2);
-+    writel(CONFIG_SYS_ICFA1_A_VAL, &regs->port[PORTA].iconfa1);
-+    writel(CONFIG_SYS_ICFA2_A_VAL, &regs->port[PORTA].iconfa2);
-+    writel(CONFIG_SYS_ICFB1_A_VAL, &regs->port[PORTA].iconfb1);
-+    writel(CONFIG_SYS_ICFB2_A_VAL, &regs->port[PORTA].iconfb2);
-+    writel(CONFIG_SYS_ICR1_A_VAL,  &regs->port[PORTA].icr1);
-+    writel(CONFIG_SYS_ICR2_A_VAL,  &regs->port[PORTA].icr2);
-+    writel(CONFIG_SYS_IMR_A_VAL,   &regs->port[PORTA].imr);
-+    writel(CONFIG_SYS_DDIR_A_VAL,  &regs->port[PORTA].ddir);
-+    writel(CONFIG_SYS_GPR_A_VAL,   &regs->port[PORTA].gpr);
-+    writel(CONFIG_SYS_PUEN_A_VAL,  &regs->port[PORTA].puen);
-+    writel(CONFIG_SYS_GIUS_A_VAL,  &regs->port[PORTA].gius);
-+
-+    /* PORT B */
-+    writel(CONFIG_SYS_DR_B_VAL,    &regs->port[PORTB].dr);
-+    writel(CONFIG_SYS_OCR1_B_VAL,  &regs->port[PORTB].ocr1);
-+    writel(CONFIG_SYS_OCR2_B_VAL,  &regs->port[PORTB].ocr2);
-+    writel(CONFIG_SYS_ICFA1_B_VAL, &regs->port[PORTB].iconfa1);
-+    writel(CONFIG_SYS_ICFA2_B_VAL, &regs->port[PORTB].iconfa2);
-+    writel(CONFIG_SYS_ICFB1_B_VAL, &regs->port[PORTB].iconfb1);
-+    writel(CONFIG_SYS_ICFB2_B_VAL, &regs->port[PORTB].iconfb2);
-+    writel(CONFIG_SYS_ICR1_B_VAL,  &regs->port[PORTB].icr1);
-+    writel(CONFIG_SYS_ICR2_B_VAL,  &regs->port[PORTB].icr2);
-+    writel(CONFIG_SYS_IMR_B_VAL,   &regs->port[PORTB].imr);
-+    writel(CONFIG_SYS_DDIR_B_VAL,  &regs->port[PORTB].ddir);
-+    writel(CONFIG_SYS_GPR_B_VAL,   &regs->port[PORTB].gpr);
-+    writel(CONFIG_SYS_PUEN_B_VAL,  &regs->port[PORTB].puen);
-+    writel(CONFIG_SYS_GIUS_B_VAL,  &regs->port[PORTB].gius);
-+
-+    /* PORT C */
-+    writel(CONFIG_SYS_DR_C_VAL,    &regs->port[PORTC].dr);
-+    writel(CONFIG_SYS_OCR1_C_VAL,  &regs->port[PORTC].ocr1);
-+    writel(CONFIG_SYS_OCR2_C_VAL,  &regs->port[PORTC].ocr2);
-+    writel(CONFIG_SYS_ICFA1_C_VAL, &regs->port[PORTC].iconfa1);
-+    writel(CONFIG_SYS_ICFA2_C_VAL, &regs->port[PORTC].iconfa2);
-+    writel(CONFIG_SYS_ICFB1_C_VAL, &regs->port[PORTC].iconfb1);
-+    writel(CONFIG_SYS_ICFB2_C_VAL, &regs->port[PORTC].iconfb2);
-+    writel(CONFIG_SYS_ICR1_C_VAL,  &regs->port[PORTC].icr1);
-+    writel(CONFIG_SYS_ICR2_C_VAL,  &regs->port[PORTC].icr2);
-+    writel(CONFIG_SYS_IMR_C_VAL,   &regs->port[PORTC].imr);
-+    writel(CONFIG_SYS_DDIR_C_VAL,  &regs->port[PORTC].ddir);
-+    writel(CONFIG_SYS_GPR_C_VAL,   &regs->port[PORTC].gpr);
-+    writel(CONFIG_SYS_PUEN_C_VAL,  &regs->port[PORTC].puen);
-+    writel(CONFIG_SYS_GIUS_C_VAL,  &regs->port[PORTC].gius);
-+
-+    /* PORT D */
-+    writel(CONFIG_SYS_DR_D_VAL,    &regs->port[PORTD].dr);
-+    writel(CONFIG_SYS_OCR1_D_VAL,  &regs->port[PORTD].ocr1);
-+    writel(CONFIG_SYS_OCR2_D_VAL,  &regs->port[PORTD].ocr2);
-+    writel(CONFIG_SYS_ICFA1_D_VAL, &regs->port[PORTD].iconfa1);
-+    writel(CONFIG_SYS_ICFA2_D_VAL, &regs->port[PORTD].iconfa2);
-+    writel(CONFIG_SYS_ICFB1_D_VAL, &regs->port[PORTD].iconfb1);
-+    writel(CONFIG_SYS_ICFB2_D_VAL, &regs->port[PORTD].iconfb2);
-+    writel(CONFIG_SYS_ICR1_D_VAL,  &regs->port[PORTD].icr1);
-+    writel(CONFIG_SYS_ICR2_D_VAL,  &regs->port[PORTD].icr2);
-+    writel(CONFIG_SYS_IMR_D_VAL,   &regs->port[PORTD].imr);
-+    writel(CONFIG_SYS_DDIR_D_VAL,  &regs->port[PORTD].ddir);
-+    writel(CONFIG_SYS_GPR_D_VAL,   &regs->port[PORTD].gpr);
-+    writel(CONFIG_SYS_PUEN_D_VAL,  &regs->port[PORTD].puen);
-+    writel(CONFIG_SYS_GIUS_D_VAL,  &regs->port[PORTD].gius);
-+
-+    /* PORT E */
-+    writel(CONFIG_SYS_DR_E_VAL,    &regs->port[PORTE].dr);
-+    writel(CONFIG_SYS_OCR1_E_VAL,  &regs->port[PORTE].ocr1);
-+    writel(CONFIG_SYS_OCR2_E_VAL,  &regs->port[PORTE].ocr2);
-+    writel(CONFIG_SYS_ICFA1_E_VAL, &regs->port[PORTE].iconfa1);
-+    writel(CONFIG_SYS_ICFA2_E_VAL, &regs->port[PORTE].iconfa2);
-+    writel(CONFIG_SYS_ICFB1_E_VAL, &regs->port[PORTE].iconfb1);
-+    writel(CONFIG_SYS_ICFB2_E_VAL, &regs->port[PORTE].iconfb2);
-+    writel(CONFIG_SYS_ICR1_E_VAL,  &regs->port[PORTE].icr1);
-+    writel(CONFIG_SYS_ICR2_E_VAL,  &regs->port[PORTE].icr2);
-+    writel(CONFIG_SYS_IMR_E_VAL,   &regs->port[PORTE].imr);
-+    writel(CONFIG_SYS_DDIR_E_VAL,  &regs->port[PORTE].ddir);
-+    writel(CONFIG_SYS_GPR_E_VAL,   &regs->port[PORTE].gpr);
-+    writel(CONFIG_SYS_PUEN_E_VAL,  &regs->port[PORTE].puen);
-+    writel(CONFIG_SYS_GIUS_E_VAL,  &regs->port[PORTE].gius);
-+
-+    /* PORT F */
-+    writel(CONFIG_SYS_DR_F_VAL,    &regs->port[PORTF].dr);
-+    writel(CONFIG_SYS_OCR1_F_VAL,  &regs->port[PORTF].ocr1);
-+    writel(CONFIG_SYS_OCR2_F_VAL,  &regs->port[PORTF].ocr2);
-+    writel(CONFIG_SYS_ICFA1_F_VAL, &regs->port[PORTF].iconfa1);
-+    writel(CONFIG_SYS_ICFA2_F_VAL, &regs->port[PORTF].iconfa2);
-+    writel(CONFIG_SYS_ICFB1_F_VAL, &regs->port[PORTF].iconfb1);
-+    writel(CONFIG_SYS_ICFB2_F_VAL, &regs->port[PORTF].iconfb2);
-+    writel(CONFIG_SYS_ICR1_F_VAL,  &regs->port[PORTF].icr1);
-+    writel(CONFIG_SYS_ICR2_F_VAL,  &regs->port[PORTF].icr2);
-+    writel(CONFIG_SYS_IMR_F_VAL,   &regs->port[PORTF].imr);
-+    writel(CONFIG_SYS_DDIR_F_VAL,  &regs->port[PORTF].ddir);
-+    writel(CONFIG_SYS_GPR_F_VAL,   &regs->port[PORTF].gpr);
-+    writel(CONFIG_SYS_PUEN_F_VAL,  &regs->port[PORTF].puen);
-+    writel(CONFIG_SYS_GIUS_F_VAL,  &regs->port[PORTF].gius);
++	struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE;
++
++	/* PORT A */
++	writel(CONFIG_SYS_DR_A_VAL,    &regs->port[PORTA].dr);
++	writel(CONFIG_SYS_OCR1_A_VAL,  &regs->port[PORTA].ocr1);
++	writel(CONFIG_SYS_OCR2_A_VAL,  &regs->port[PORTA].ocr2);
++	writel(CONFIG_SYS_ICFA1_A_VAL, &regs->port[PORTA].iconfa1);
++	writel(CONFIG_SYS_ICFA2_A_VAL, &regs->port[PORTA].iconfa2);
++	writel(CONFIG_SYS_ICFB1_A_VAL, &regs->port[PORTA].iconfb1);
++	writel(CONFIG_SYS_ICFB2_A_VAL, &regs->port[PORTA].iconfb2);
++	writel(CONFIG_SYS_ICR1_A_VAL,  &regs->port[PORTA].icr1);
++	writel(CONFIG_SYS_ICR2_A_VAL,  &regs->port[PORTA].icr2);
++	writel(CONFIG_SYS_IMR_A_VAL,   &regs->port[PORTA].imr);
++	writel(CONFIG_SYS_DDIR_A_VAL,  &regs->port[PORTA].ddir);
++	writel(CONFIG_SYS_GPR_A_VAL,   &regs->port[PORTA].gpr);
++	writel(CONFIG_SYS_PUEN_A_VAL,  &regs->port[PORTA].puen);
++	writel(CONFIG_SYS_GIUS_A_VAL,  &regs->port[PORTA].gius);
++
++	/* PORT B */
++	writel(CONFIG_SYS_DR_B_VAL,    &regs->port[PORTB].dr);
++	writel(CONFIG_SYS_OCR1_B_VAL,  &regs->port[PORTB].ocr1);
++	writel(CONFIG_SYS_OCR2_B_VAL,  &regs->port[PORTB].ocr2);
++	writel(CONFIG_SYS_ICFA1_B_VAL, &regs->port[PORTB].iconfa1);
++	writel(CONFIG_SYS_ICFA2_B_VAL, &regs->port[PORTB].iconfa2);
++	writel(CONFIG_SYS_ICFB1_B_VAL, &regs->port[PORTB].iconfb1);
++	writel(CONFIG_SYS_ICFB2_B_VAL, &regs->port[PORTB].iconfb2);
++	writel(CONFIG_SYS_ICR1_B_VAL,  &regs->port[PORTB].icr1);
++	writel(CONFIG_SYS_ICR2_B_VAL,  &regs->port[PORTB].icr2);
++	writel(CONFIG_SYS_IMR_B_VAL,   &regs->port[PORTB].imr);
++	writel(CONFIG_SYS_DDIR_B_VAL,  &regs->port[PORTB].ddir);
++	writel(CONFIG_SYS_GPR_B_VAL,   &regs->port[PORTB].gpr);
++	writel(CONFIG_SYS_PUEN_B_VAL,  &regs->port[PORTB].puen);
++	writel(CONFIG_SYS_GIUS_B_VAL,  &regs->port[PORTB].gius);
++
++	/* PORT C */
++	writel(CONFIG_SYS_DR_C_VAL,    &regs->port[PORTC].dr);
++	writel(CONFIG_SYS_OCR1_C_VAL,  &regs->port[PORTC].ocr1);
++	writel(CONFIG_SYS_OCR2_C_VAL,  &regs->port[PORTC].ocr2);
++	writel(CONFIG_SYS_ICFA1_C_VAL, &regs->port[PORTC].iconfa1);
++	writel(CONFIG_SYS_ICFA2_C_VAL, &regs->port[PORTC].iconfa2);
++	writel(CONFIG_SYS_ICFB1_C_VAL, &regs->port[PORTC].iconfb1);
++	writel(CONFIG_SYS_ICFB2_C_VAL, &regs->port[PORTC].iconfb2);
++	writel(CONFIG_SYS_ICR1_C_VAL,  &regs->port[PORTC].icr1);
++	writel(CONFIG_SYS_ICR2_C_VAL,  &regs->port[PORTC].icr2);
++	writel(CONFIG_SYS_IMR_C_VAL,   &regs->port[PORTC].imr);
++	writel(CONFIG_SYS_DDIR_C_VAL,  &regs->port[PORTC].ddir);
++	writel(CONFIG_SYS_GPR_C_VAL,   &regs->port[PORTC].gpr);
++	writel(CONFIG_SYS_PUEN_C_VAL,  &regs->port[PORTC].puen);
++	writel(CONFIG_SYS_GIUS_C_VAL,  &regs->port[PORTC].gius);
++
++	/* PORT D */
++	writel(CONFIG_SYS_DR_D_VAL,    &regs->port[PORTD].dr);
++	writel(CONFIG_SYS_OCR1_D_VAL,  &regs->port[PORTD].ocr1);
++	writel(CONFIG_SYS_OCR2_D_VAL,  &regs->port[PORTD].ocr2);
++	writel(CONFIG_SYS_ICFA1_D_VAL, &regs->port[PORTD].iconfa1);
++	writel(CONFIG_SYS_ICFA2_D_VAL, &regs->port[PORTD].iconfa2);
++	writel(CONFIG_SYS_ICFB1_D_VAL, &regs->port[PORTD].iconfb1);
++	writel(CONFIG_SYS_ICFB2_D_VAL, &regs->port[PORTD].iconfb2);
++	writel(CONFIG_SYS_ICR1_D_VAL,  &regs->port[PORTD].icr1);
++	writel(CONFIG_SYS_ICR2_D_VAL,  &regs->port[PORTD].icr2);
++	writel(CONFIG_SYS_IMR_D_VAL,   &regs->port[PORTD].imr);
++	writel(CONFIG_SYS_DDIR_D_VAL,  &regs->port[PORTD].ddir);
++	writel(CONFIG_SYS_GPR_D_VAL,   &regs->port[PORTD].gpr);
++	writel(CONFIG_SYS_PUEN_D_VAL,  &regs->port[PORTD].puen);
++	writel(CONFIG_SYS_GIUS_D_VAL,  &regs->port[PORTD].gius);
++
++	/* PORT E */
++	writel(CONFIG_SYS_DR_E_VAL,    &regs->port[PORTE].dr);
++	writel(CONFIG_SYS_OCR1_E_VAL,  &regs->port[PORTE].ocr1);
++	writel(CONFIG_SYS_OCR2_E_VAL,  &regs->port[PORTE].ocr2);
++	writel(CONFIG_SYS_ICFA1_E_VAL, &regs->port[PORTE].iconfa1);
++	writel(CONFIG_SYS_ICFA2_E_VAL, &regs->port[PORTE].iconfa2);
++	writel(CONFIG_SYS_ICFB1_E_VAL, &regs->port[PORTE].iconfb1);
++	writel(CONFIG_SYS_ICFB2_E_VAL, &regs->port[PORTE].iconfb2);
++	writel(CONFIG_SYS_ICR1_E_VAL,  &regs->port[PORTE].icr1);
++	writel(CONFIG_SYS_ICR2_E_VAL,  &regs->port[PORTE].icr2);
++	writel(CONFIG_SYS_IMR_E_VAL,   &regs->port[PORTE].imr);
++	writel(CONFIG_SYS_DDIR_E_VAL,  &regs->port[PORTE].ddir);
++	writel(CONFIG_SYS_GPR_E_VAL,   &regs->port[PORTE].gpr);
++	writel(CONFIG_SYS_PUEN_E_VAL,  &regs->port[PORTE].puen);
++	writel(CONFIG_SYS_GIUS_E_VAL,  &regs->port[PORTE].gius);
++
++	/* PORT F */
++	writel(CONFIG_SYS_DR_F_VAL,    &regs->port[PORTF].dr);
++	writel(CONFIG_SYS_OCR1_F_VAL,  &regs->port[PORTF].ocr1);
++	writel(CONFIG_SYS_OCR2_F_VAL,  &regs->port[PORTF].ocr2);
++	writel(CONFIG_SYS_ICFA1_F_VAL, &regs->port[PORTF].iconfa1);
++	writel(CONFIG_SYS_ICFA2_F_VAL, &regs->port[PORTF].iconfa2);
++	writel(CONFIG_SYS_ICFB1_F_VAL, &regs->port[PORTF].iconfb1);
++	writel(CONFIG_SYS_ICFB2_F_VAL, &regs->port[PORTF].iconfb2);
++	writel(CONFIG_SYS_ICR1_F_VAL,  &regs->port[PORTF].icr1);
++	writel(CONFIG_SYS_ICR2_F_VAL,  &regs->port[PORTF].icr2);
++	writel(CONFIG_SYS_IMR_F_VAL,   &regs->port[PORTF].imr);
++	writel(CONFIG_SYS_DDIR_F_VAL,  &regs->port[PORTF].ddir);
++	writel(CONFIG_SYS_GPR_F_VAL,   &regs->port[PORTF].gpr);
++	writel(CONFIG_SYS_PUEN_F_VAL,  &regs->port[PORTF].puen);
++	writel(CONFIG_SYS_GIUS_F_VAL,  &regs->port[PORTF].gius);
 +}
 +
 +static int apf27_devices_init(void)
@@ -283,7 +272,7 @@ index 0000000..1f1bd42
 +	return -1;
 +}
 +int
-+board_init (void)
++board_init(void)
 +{
 +	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
 +
@@ -294,13 +283,13 @@ index 0000000..1f1bd42
 +}
 +
 +int
-+dram_init (void)
++dram_init(void)
 +{
 +	/* dram_init must store complete ramsize in gd->ram_size */
 +	gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
 +	if (get_num_ram_bank() > 1) {
 +		gd->ram_size += get_ram_size((void *)PHYS_SDRAM_2,
-+						PHYS_SDRAM_2_SIZE);
++					     PHYS_SDRAM_2_SIZE);
 +	}
 +
 +	return 0;
@@ -312,7 +301,8 @@ index 0000000..1f1bd42
 +	gd->bd->bi_dram[0].size = gd->ram_size / get_num_ram_bank();
 +	if (CONFIG_NR_DRAM_BANKS > 1) {
 +		gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
-+		gd->bd->bi_dram[1].size = gd->ram_size -gd->bd->bi_dram[0].size;
++		gd->bd->bi_dram[1].size = \
++			gd->ram_size - gd->bd->bi_dram[0].size;
 +	}
 +}
 +
@@ -320,55 +310,40 @@ index 0000000..1f1bd42
 + * Miscellaneous intialization
 + */
 +int
-+misc_init_r (void)
++misc_init_r(void)
 +{
 +	char *s;
-+	u_char * firmware_buffer = (u_char *)(CONFIG_SYS_LOAD_ADDR + CONFIG_SYS_MONITOR_LEN);
++	u_char * firmware_buffer = (u_char *)(CONFIG_SYS_LOAD_ADDR + \
++					      CONFIG_SYS_MONITOR_LEN);
 +	size_t size	= 0;
 +	size_t offset	= -1;
-+	char *autoload = getenv ("firmware_autoload");
++	char *autoload = getenv("firmware_autoload");
 +	u8 pnum;
 +	struct mtd_device *dev;
 +	struct part_info *part;
 +
-+#if defined(CONFIG_FPGA)
-+	/* init and download fpga */
-+	if (( autoload ) && (0 == strcmp(autoload, "1"))) {
-+		if (mtdparts_init() == 0)
-+		if (find_dev_and_part("firmware", &dev, &pnum, &part) == 0) {
-+			size = part->size;
-+			if (nand_read_skip_bad(&nand_info[0], part->offset,
-+				&size, firmware_buffer))
-+				size = 0;
-+		}
-+	}
-+	APF27_init_fpga (firmware_buffer, size);
-+#endif
-+
 +	/* detect compatibility issue of environment version */
-+	s = getenv ("env_version");
-+	if (( NULL == s ) || (0 != strcmp(s, CONFIG_ENV_VERSION))) {
++	s = getenv("env_version");
++	if ((NULL == s) || (0 != strcmp(s, CONFIG_ENV_VERSION))) {
 +		printf("*** Warning - Environment version change suggests: "
 +			"run flash_reset_env; reset\n");
 +	}
 +
 +	/* Unlock whole flash but U-Boot */
-+	s = getenv ("env_offset");
++	s = getenv("env_offset");
 +	offset = CONFIG_ENV_OFFSET;
-+	if ((s != NULL) && (0 != strcmp(s, "0"))) {
++	if ((s != NULL) && (0 != strcmp(s, "0")))
 +		offset = simple_strtoul(s, NULL, 16);
-+	}
 +
-+	if (nand_unlock(&nand_info[0], offset, nand_info[0].size - offset)) {
++	if (nand_unlock(&nand_info[0], offset, nand_info[0].size - offset))
 +		printf("NAND flash lock/unlocked failed\n");
-+	}
 +
 +
 +	return 0;
 +}
 +
 +void
-+show_boot_progress (int status)
++show_boot_progress(int status)
 +{
 +#ifdef CONFIG_SHOW_BOOT_PROGRESS
 +#endif
@@ -381,7 +356,7 @@ index 0000000..1f1bd42
 +	return 0;
 +}
 +
-+int board_eth_init(bd_t * bis)
++int board_eth_init(bd_t *bis)
 +{
 +#define STR_ENV_ETHADDR	"ethaddr"
 +	int rc = -ENODEV;
@@ -410,16 +385,41 @@ index 0000000..1f1bd42
 +void enable_caches(void)
 +{
 +	/* Enable D-cache. I-cache is already enabled in start.S */
-+	//dcache_enable();
++	/* dcache_enable(); */
 +}
 +
 +#endif
 diff --git a/board/armadeus/apf27/config.mk b/board/armadeus/apf27/config.mk
 new file mode 100644
-index 0000000..3354ba0
+index 0000000..9713e69
 --- /dev/null
 +++ b/board/armadeus/apf27/config.mk
-@@ -0,0 +1,13 @@
+@@ -0,0 +1,38 @@
++#
++# (C) Copyright 2003
++# Wolfgang Denk, DENX Software Engineering, wd...@de....
++# (C) Copyright 2012
++# Eric Jarrige <eri...@ar...>
++#
++# See file CREDITS for list of people who contributed to this
++# project.
++#
++# This program is free software; you can redistribute it and/or
++# modify it under the terms of the GNU General Public License as
++# published by the Free Software Foundation; either version 2 of
++# the License, or (at your option) any later version.
++#
++# This program is distributed in the hope that it will be useful,
++# but WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++# GNU General Public License for more details.
++#
++# You should have received a copy of the GNU General Public License
++# along with this program; if not, write to the Free Software
++# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++# MA 02111-1307 USA
++#
++
 +#
 +# This config file is used for compilation of armadeus sources
 +#
@@ -432,330 +432,10 @@ index 0000000..3354ba0
 +ifndef TEXT_BASE
 +TEXT_BASE = 0xAFF00000
 +endif
-+# CONFIG_NAND_U_BOOT = y
-diff --git a/board/armadeus/apf27/fpga.c b/board/armadeus/apf27/fpga.c
-new file mode 100644
-index 0000000..1d2c168
---- /dev/null
-+++ b/board/armadeus/apf27/fpga.c
-@@ -0,0 +1,269 @@
-+/*
-+ * (C) Copyright 2002-2008
-+ * Eric Jarrige <eri...@ar...>
-+ * Rich Ireland, Enterasys Networks, rir...@en....
-+ * Keith Outwater, kei...@mv....
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ *
-+ */
-+#include <common.h>
-+
-+#if defined(CONFIG_FPGA)
-+
-+#include <asm/arch/imx-regs.h>
-+#include <asm/io.h>
-+#include <command.h>
-+#include <config.h>
-+#include "fpga.h"
-+#include <spartan3.h>
-+
-+#define GPIO_PORT(x)  ((x & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT)
-+#define GPIO_SET(x)   writel(readl(&gpregs->port[GPIO_PORT(x)].dr) | (1 << (x & GPIO_PIN_MASK)), \
-+				&gpregs->port[GPIO_PORT(x)].dr)
-+//(DR(GPIO_PORT(x)) |= (1<<(x & GPIO_PIN_MASK)))
-+#define GPIO_CLEAR(x) writel(readl(&gpregs->port[GPIO_PORT(x)].dr) & ~(1 << (x & GPIO_PIN_MASK)), \
-+				&gpregs->port[GPIO_PORT(x)].dr)
-+//(DR(GPIO_PORT(x)) &= ~(1<<(x & GPIO_PIN_MASK)))
-+#define GPIO_WRITE(x,y) ( y ? GPIO_SET(x) : GPIO_CLEAR(x) )
-+#define GPIO_READ(x) ((readl(&gpregs->port[GPIO_PORT(x)].ssr) & (1 << (x & GPIO_PIN_MASK))) \
-+				>> (x & GPIO_PIN_MASK))
-+//((SSR (GPIO_PORT(x)) & (1<<(x & GPIO_PIN_MASK)))>> (x & GPIO_PIN_MASK))
-+#ifdef FPGA_DEBUG
-+#define	PRINTF(fmt,args...)	printf (fmt ,##args)
-+#else
-+#define	PRINTF(fmt,args...)
-+#endif
-+
-+/* Note that these are pointers to code that is in Flash.  They will be
-+ * relocated at runtime.
-+ * Spartan2 code is used to download our Spartan 3 :) code is compatible.
-+ * Just take care about the file size
-+*/
-+Xilinx_Spartan3_Slave_Parallel_fns fpga_fns = {
-+	fpga_pre_fn,
-+	fpga_pgm_fn,
-+	fpga_init_fn,
-+	NULL,
-+	fpga_done_fn,
-+	fpga_clk_fn,
-+	fpga_cs_fn,
-+	fpga_wr_fn,
-+	fpga_rdata_fn,
-+	fpga_wdata_fn,
-+   fpga_busy_fn,
-+	fpga_abort_fn,
-+	fpga_post_fn,
-+};
-+
-+Xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
-+	{Xilinx_Spartan3,
-+	 slave_parallel,
-+	 1196128l/8,
-+	 (void *) &fpga_fns,
-+	 0}
-+};
-+
-+/*
-+ * nitialize GPIO port B before download
-+ */
-+int
-+fpga_pre_fn (int cookie)
-+{
-+       struct gpio_regs *gpregs = (struct gpio_regs *)IMX_GPIO_BASE;
-+	// Initialize GPIO pins
-+	GPIO_SET(CONFIG_SYS_FPGA_PWR);
-+	imx_gpio_mode (CONFIG_SYS_FPGA_INIT | GPIO_IN | GPIO_PUEN | GPIO_GPIO);
-+	imx_gpio_mode (CONFIG_SYS_FPGA_DONE | GPIO_IN | GPIO_PUEN | GPIO_GPIO);
-+	imx_gpio_mode (CONFIG_SYS_FPGA_PRG | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
-+	imx_gpio_mode (CONFIG_SYS_FPGA_CLK | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
-+	imx_gpio_mode (CONFIG_SYS_FPGA_RW | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
-+	imx_gpio_mode (CONFIG_SYS_FPGA_CS | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
-+	imx_gpio_mode (CONFIG_SYS_FPGA_SUSPEND | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
-+	GPIO_SET(CONFIG_SYS_FPGA_RESET);
-+	imx_gpio_mode (CONFIG_SYS_FPGA_RESET | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
-+	imx_gpio_mode (CONFIG_SYS_FPGA_PWR | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
-+	GPIO_SET(CONFIG_SYS_FPGA_PRG);
-+	GPIO_SET(CONFIG_SYS_FPGA_CLK);
-+	GPIO_SET(CONFIG_SYS_FPGA_RW);
-+	GPIO_SET(CONFIG_SYS_FPGA_CS);
-+	GPIO_CLEAR(CONFIG_SYS_FPGA_SUSPEND);
-+// 	GPIO_CLEAR(CONFIG_SYS_FPGA_RESET);
-+	GPIO_CLEAR(CONFIG_SYS_FPGA_PWR);
-+
-+	return cookie;
-+}
-+
-+/*
-+ * Set the FPGA's active-low program line to the specified level
-+ */
-+int
-+fpga_pgm_fn (int assert, int flush, int cookie)
-+{
-+       struct gpio_regs *gpregs = (struct gpio_regs *)IMX_GPIO_BASE;
-+	PRINTF ("%s:%d: FPGA PROGRAM %s", __FUNCTION__, __LINE__,
-+					assert?"high":"low");
-+	GPIO_WRITE( CONFIG_SYS_FPGA_PRG, !assert);
-+	return assert;
-+}
-+
-+/*
-+ * Set the FPGA's active-high clock line to the specified level
-+ */
-+int
-+fpga_clk_fn (int assert_clk, int flush, int cookie)
-+{
-+       struct gpio_regs *gpregs = (struct gpio_regs *)IMX_GPIO_BASE;
-+	PRINTF ("%s:%d: FPGA CLOCK %s", __FUNCTION__, __LINE__,
-+					assert_clk?"high":"low");
-+	GPIO_WRITE( CONFIG_SYS_FPGA_CLK, !assert_clk);
-+	return assert_clk;
-+}
-+
-+/*
-+ * Test the state of the active-low FPGA INIT line.  Return 1 on INIT
-+ * asserted (low).
-+ */
-+int
-+fpga_init_fn (int cookie)
-+{
-+       struct gpio_regs *gpregs = (struct gpio_regs *)IMX_GPIO_BASE;
-+	int value;
-+	PRINTF ("%s:%d: INIT check... ", __FUNCTION__, __LINE__);
-+	value = GPIO_READ(CONFIG_SYS_FPGA_INIT);
-+	//printf("init value read %x",value);
-+#ifdef CONFIG_SYS_FPGA_IS_PROTO
-+	return value;
-+#else
-+	return !value;
-+#endif
-+}
-+
-+/*
-+ * Test the state of the active-high FPGA DONE pin
-+ */
-+int
-+fpga_done_fn (int cookie)
-+{
-+       struct gpio_regs *gpregs = (struct gpio_regs *)IMX_GPIO_BASE;
-+	PRINTF ("%s:%d: DONE check... %s", __FUNCTION__, __LINE__,
-+					GPIO_READ(CONFIG_SYS_FPGA_DONE)?"high":"low");
-+	return(GPIO_READ(CONFIG_SYS_FPGA_DONE)?FPGA_SUCCESS:FPGA_FAIL);
-+}
-+
-+/*
-+ * Set the FPGA's wr line to the specified level
-+ */
-+int
-+fpga_wr_fn (int assert_write, int flush, int cookie)
-+{
-+       struct gpio_regs *gpregs = (struct gpio_regs *)IMX_GPIO_BASE;
-+	PRINTF ("%s:%d: FPGA RW... %s ", __FUNCTION__, __LINE__,
-+					assert_write?"high":"low");
-+	GPIO_WRITE( CONFIG_SYS_FPGA_RW, !assert_write);
-+	return assert_write;
-+}
-+
-+int
-+fpga_cs_fn (int assert_cs, int flush, int cookie)
-+{
-+       struct gpio_regs *gpregs = (struct gpio_regs *)IMX_GPIO_BASE;
-+	PRINTF ("%s:%d: FPGA CS %s ", __FUNCTION__, __LINE__,
-+					assert_cs?"high":"low");
-+	GPIO_WRITE( CONFIG_SYS_FPGA_CS, !assert_cs);
-+	return assert_cs;
-+}
-+
-+int
-+fpga_rdata_fn ( unsigned char *data, int cookie )
-+{
-+	PRINTF ("%s:%d: FPGA READ DATA %02X ", __FUNCTION__, __LINE__,
-+					*((char*)CONFIG_SYS_FPGA_RDATA));
-+	*data = (unsigned char)((*((unsigned short*)CONFIG_SYS_FPGA_RDATA))&0x00FF);
-+	return *data;
-+}
-+
-+int
-+fpga_wdata_fn ( unsigned char data, int cookie )
-+{
-+	PRINTF ("%s:%d: FPGA WRITE DATA %02X ", __FUNCTION__, __LINE__,
-+					data);
-+	*((unsigned short*)CONFIG_SYS_FPGA_WDATA) = data;
-+	return data;
-+}
-+
-+int
-+fpga_abort_fn ( int cookie )
-+{
-+	return cookie;
-+}
-+
-+
-+int
-+fpga_busy_fn ( int cookie )
-+{
-+	return 1;
-+}
-+
-+int
-+fpga_post_fn (int cookie)
-+{
-+       struct gpio_regs *gpregs = (struct gpio_regs *)IMX_GPIO_BASE;
-+	PRINTF ("%s:%d: FPGA POST ", __FUNCTION__, __LINE__);
-+
-+	imx_gpio_mode (CONFIG_SYS_FPGA_RW | GPIO_PF | GPIO_PUEN);
-+	imx_gpio_mode (CONFIG_SYS_FPGA_CS | GPIO_PF | GPIO_PUEN);
-+	imx_gpio_mode (CONFIG_SYS_FPGA_CLK | GPIO_PF | GPIO_PUEN);
-+	GPIO_SET(CONFIG_SYS_FPGA_PRG);
-+	GPIO_CLEAR(CONFIG_SYS_FPGA_RESET);
-+	imx_gpio_mode (CONFIG_SYS_FPGA_RESET | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
-+	return cookie;
-+}
-+
-+/*
-+ * Initialize the fpga.  Return 1 on success, 0 on failure.
-+ */
-+int
-+APF27_init_fpga (u_char * buffer, size_t size)
-+{
-+	char *autoload = getenv ("firmware_autoload");
-+
-+	int i,lout=0;
 +
-+       fpga_init();
-+
-+	for (i = 0; i < CONFIG_FPGA_COUNT; i++) {
-+		PRINTF ("%s:%d: Adding fpga %d\n", __FUNCTION__, __LINE__, i);
-+		fpga_add (fpga_xilinx, &fpga[i]);
-+	}
-+
-+	if ((size >= fpga[0].size) && ( autoload ) && (0 == strcmp(autoload, "1"))) {
-+		if (ctrlc()) {
-+			printf("Firmware download stopped!\n"); 
-+		} else if (FPGA_SUCCESS != fpga_load( 0,(void *)buffer, size )) {
-+			printf("Firmware download failed!\n");
-+		} else {
-+			printf("Firmware successfully programmed\n");
-+			lout = 1;
-+		}
-+	}
-+	return lout;
-+}
-+
-+#endif /* CONFIG_FPGA */
-diff --git a/board/armadeus/apf27/fpga.h b/board/armadeus/apf27/fpga.h
-new file mode 100644
-index 0000000..ca569e0
---- /dev/null
-+++ b/board/armadeus/apf27/fpga.h
-@@ -0,0 +1,39 @@
-+/*
-+ * (C) Copyright 2002-2008
-+ * Eric Jarrige <eri...@ar...>
-+ * Rich Ireland, Enterasys Networks, rir...@en....
-+ * Keith Outwater, kei...@mv....
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ *
-+ */
-+extern int APF27_init_fpga (u_char * buffer, size_t size);
-+
-+extern int fpga_pre_fn (int cookie);
-+extern int fpga_pgm_fn (int assert_pgm, int flush, int cookie);
-+extern int fpga_cs_fn (int assert_cs, int flush, int cookie);
-+extern int fpga_init_fn (int cookie);
-+extern int fpga_done_fn (int cookie);
-+extern int fpga_clk_fn (int assert_clk, int flush, int cookie);
-+extern int fpga_wr_fn (int assert_write, int flush, int cookie);
-+extern int fpga_rdata_fn ( unsigned char *data, int cookie );
-+extern int fpga_wdata_fn ( unsigned char data, int cookie );
-+extern int fpga_abort_fn (int cookie);
-+extern int fpga_post_fn (int cookie);
-+extern int fpga_busy_fn (int cookie);
 diff --git a/board/armadeus/apf27/lowlevel_init.S b/board/armadeus/apf27/lowlevel_init.S
 new file mode 100644
-index 0000000..a6bbbc1
+index 0000000..f5dbbb4
 --- /dev/null
 +++ b/board/armadeus/apf27/lowlevel_init.S
 @@ -0,0 +1,275 @@
@@ -763,7 +443,7 @@ index 0000000..a6bbbc1
 + * For clock initialization, see chapter 3 of the "MCIMX27 Multimedia
 + * Applications Processor Reference Manual, Rev. 0.2".
 + *
-+ * (C) Copyright 2008 Eric Jarrige <eri...@ar...>
++ * (C) Copyright 2008-2012 Eric Jarrige <eri...@ar...>
 + *
 + * This program is free software; you can redistribute it and/or
 + * modify it under the terms of the GNU General Public License as
@@ -784,7 +464,7 @@ index 0000000..a6bbbc1
 +
 +#include <config.h>
 +#include <version.h>
-+#include <asm/macro.h>        
++#include <asm/macro.h>
 +#include <asm/arch/imx-regs.h>
 +#include <generated/asm-offsets.h>
 +
@@ -826,7 +506,7 @@ index 0000000..a6bbbc1
 +	write32 MPCTL0, CONFIG_SYS_MPCTL0_VAL
 +	write32 SPCTL0, CONFIG_SYS_SPCTL0_VAL
 +
-+	write32 CSCR, CONFIG_SYS_CSCR_VAL | CSCR_MPLL_RESTART | CSCR_SPLL_RESTART
++	write32 CSCR, CONFIG_SYS_CSCR_VAL|CSCR_MPLL_RESTART|CSCR_SPLL_RESTART
 +
 +	/*
 +	 * add some delay here
@@ -887,9 +567,9 @@ index 0000000..a6bbbc1
 +
 +	ldr 		r4, =PHYS_SDRAM_1	/* CSD0 base address	*/
 +
-+	ldr 		r6,=0x7			/* load loop counter	*/
-+1:	str 		r5,[r4]			/* run auto-refresh cycle to array 0 */
-+	subs 		r6,r6,#1		/* decrease counter value */
++	ldr 		r6,=0x7		/* load loop counter	*/
++1:	str 		r5,[r4]		/* run auto-refresh cycle to array 0 */
++	subs 		r6,r6,#1	/* decrease counter value */
 +	bne 1b
 +
 +	/* writel(CONFIG_SYS_PRECHARGE_CMD, CONFIG_SYS_SET_MODE_REG_CMD) */
@@ -911,7 +591,7 @@ index 0000000..a6bbbc1
 +	/* 2nd sdram */
 +	/* write32 ESDCFG1, CONFIG_SYS_SDRAM_ESDCFG_REGISTER_VAL */
 +	ldr		r1, =CONFIG_SYS_SDRAM_ESDCFG_REGISTER_VAL
-+	str		r1, [r0, #ESDCFG1_ROF]        
++	str		r1, [r0, #ESDCFG1_ROF]
 +
 +	/* writel(ESDCTL1, CONFIG_SYS_PRECHARGE_CMD) */
 +	ldr		r1, =CONFIG_SYS_PRECHARGE_CMD
@@ -927,9 +607,9 @@ index 0000000..a6bbbc1
 +
 +	ldr 		r4, =PHYS_SDRAM_2	/* CSD1 base address */
 +
-+	ldr 		r6,=0x7			/* load loop counter */
-+1:	str 		r5,[r4]			/* run auto-refresh cycle to array 0 */
-+	subs 		r6,r6,#1		/* decrease counter value */
++	ldr 		r6,=0x7		/* load loop counter */
++1:	str 		r5,[r4]		/* run auto-refresh cycle to array 0 */
++	subs 		r6,r6,#1	/* decrease counter value */
 +	bne 1b
 +
 +	/* writel(ESDCTL1, CONFIG_SYS_SET_MODE_REG_CMD) */
@@ -1046,737 +726,6 @@ index c8bc589..fc8f71c 100644
  at91sam9260ek_dataflash_cs0  arm         arm926ejs   at91sam9260ek       atmel          at91        at91sam9260ek:AT91SAM9260,SYS_USE_DATAFLASH_CS0
  at91sam9260ek_dataflash_cs1  arm         arm926ejs   at91sam9260ek       atmel          at91        at91sam9260ek:AT91SAM9260,SYS_USE_DATAFLASH_CS1
  at91sam9260ek_nandflash      arm         arm926ejs   at91sam9260ek       atmel          at91        at91sam9260ek:AT91SAM9260,SYS_USE_NANDFLASH
-diff --git a/nand_spl/board/armadeus/apf27/Makefile b/nand_spl/board/armadeus/apf27/Makefile
-new file mode 100644
-index 0000000..79a250e
---- /dev/null
-+++ b/nand_spl/board/armadeus/apf27/Makefile
-@@ -0,0 +1,77 @@
-+#
-+# (C) Copyright 2007
-+# Stefan Roese, DENX Software Engineering, sr...@de....
-+#
-+# See file CREDITS for list of people who contributed to this
-+# project.
-+#
-+# This program is free software; you can redistribute it and/or
-+# modify it under the terms of the GNU General Public License as
-+# published by the Free Software Foundation; either version 2 of
-+# the License, or (at your option) any later version.
-+#
-+# This program is distributed in the hope that it will be useful,
-+# but WITHOUT ANY WARRANTY; without even the implied warranty of
-+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+# GNU General Public License for more details.
-+#
-+# You should have received a copy of the GNU General Public License
-+# along with this program; if not, write to the Free Software
-+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+# MA 02111-1307 USA
-+#
-+
-+include $(TOPDIR)/config.mk
-+include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
-+
-+LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
-+LDFLAGS	= -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
-+AFLAGS	+= -DCONFIG_NAND_SPL
-+CFLAGS	+= -DCONFIG_NAND_SPL
-+
-+SOBJS	= start.o
-+COBJS	=
-+
-+SRCS	:= $(addprefix $(src),$(SOBJS:.o=.S) $(COBJS:.o=.c))
-+OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
-+__OBJS	:= $(SOBJS) $(COBJS)
-+LNDIR	:= $(OBJTREE)/nand_spl/board/$(BOARDDIR)
-+
-+nandobj	:= $(OBJTREE)/nand_spl/
-+
-+ALL	= $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin \
-+	$(nandobj)System.map
-+
-+all:	$(obj).depend $(ALL)
-+
-+$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
-+	$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
-+
-+$(nandobj)u-boot-spl.bin:	$(nandobj)u-boot-spl
-+	$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
-+
-+$(nandobj)u-boot-spl:	$(OBJS)
-+	cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \
-+		-Map $(nandobj)u-boot-spl.map \
-+		-o $(nandobj)u-boot-spl
-+
-+$(nandobj)System.map:	$(nandobj)u-boot-spl
-+		@$(NM) $< | \
-+		grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
-+		sort > $(nandobj)System.map
-+
-+
-+#########################################################################
-+
-+$(obj)%.o:	%.S
-+	$(CC) $(AFLAGS) -c -o $@ $<
-+
-+$(obj)%.o:	%.c
-+	$(CC) $(CFLAGS) -c -o $@ $<
-+
-+# defines $(obj).depend target
-+include $(SRCTREE)/rules.mk
-+
-+sinclude $(obj).depend
-+
-+#########################################################################
-diff --git a/nand_spl/board/armadeus/apf27/config.mk b/nand_spl/board/armadeus/apf27/config.mk
-new file mode 100644
-index 0000000..46802e3
---- /dev/null
-+++ b/nand_spl/board/armadeus/apf27/config.mk
-@@ -0,0 +1,43 @@
-+#
-+# (C) Copyright 2007
-+# Stefan Roese, DENX Software Engineering, sr...@de....
-+#
-+# See file CREDITS for list of people who contributed to this
-+# project.
-+#
-+# This program is free software; you can redistribute it and/or
-+# modify it under the terms of the GNU General Public License as
-+# published by the Free Software Foundation; either version 2 of
-+# the License, or (at your option) any later version.
-+#
-+# This program is distributed in the hope that it will be useful,
-+# but WITHOUT ANY WARRANTY; without even the implied warranty of
-+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+# GNU General Public License for more details.
-+#
-+# You should have received a copy of the GNU General Public License
-+# along with this program; if not, write to the Free Software
-+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+# MA 02111-1307 USA
-+#
-+#
-+# This config file is used for compilation of armadeus apf27 board
-+#
-+
-+#
-+# TEXT_BASE for SPL:
-+#
-+#
-+# This config file is used for compilation of armadeus sources
-+#
-+# You might change location of U-Boot in memory by setting right TEXT_BASE.
-+# This allows for example having one copy located at the end of ram and stored
-+# in flash device and later on while developing use other location to test
-+# the code in RAM device only.
-+#
-+
-+TEXT_BASE = 0xa0000000
-+
-+# PAD_TO used to generate a 2kByte binary needed for the combined image
-+# -> PAD_TO = TEXT_BASE + 0x0800
-+PAD_TO	= 0xa0000800
-diff --git a/nand_spl/board/armadeus/apf27/start.S b/nand_spl/board/armadeus/apf27/start.S
-new file mode 100644
-index 0000000..c8f158d
---- /dev/null
-+++ b/nand_spl/board/armadeus/apf27/start.S
-@@ -0,0 +1,550 @@
-+/*
-+ *  IMX27 NAND Flash SPL (Secondary Program Loader)
-+ *
-+ *  Copyright (c) 2008  Armadeus Project / eja
-+ *
-+ *  Based on Freescale NAND SPL
-+ *
-+ *  Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
-+ *  Copyright (c) 2008	Eric Jarrige <eri...@ar...>
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+
-+#include <config.h>
-+#include <version.h>
-+#include <asm/arch/mxc_nand.h>
-+#include <asm/arch/imx-regs.h>
-+#include <generated/asm-offsets.h>
-+
-+/*
-+ * Standard NAND flash commands
-+ */
-+#define NAND_CMD_READ0		0
-+#define NAND_CMD_READ1		1
-+#define NAND_CMD_PAGEPROG	0x10
-+#define NAND_CMD_READOOB	0x50
-+#define NAND_CMD_ERASE1		0x60
-+#define NAND_CMD_STATUS		0x70
-+#define NAND_CMD_STATUS_MULTI	0x71
-+#define NAND_CMD_SEQIN		0x80
-+#define NAND_CMD_READID		0x90
-+#define NAND_CMD_ERASE2		0xd0
-+#define NAND_CMD_RESET		0xff
-+
-+/* Extended commands for large page devices */
-+#define NAND_CMD_READSTART	0x30
-+#define NAND_CMD_CACHEDPROG	0x15
-+
-+/* Status bits */
-+#define NAND_STATUS_FAIL	0x01
-+#define NAND_STATUS_FAIL_N1	0x02
-+#define NAND_STATUS_TRUE_READY	0x20
-+#define NAND_STATUS_READY	0x40
-+#define NAND_STATUS_WP		0x80
-+
-+#define writel(reg, val)		\
-+	ldr		r0,	=reg;	\
-+	ldr		r1,	=val;	\
-+	str		r1,   [r0];
-+
-+	.macro nand_boot
-+
-+#ifdef CONFIG_BOOT_TRACE_REG
-+/*
-+ * If CONFIG_BOOT_TRACE_REG is a SDRAM address then be sure to use the following
-+ * 2 command after SDRAM init
-+ */
-+
-+/* Backup state of previous boot to CONFIG_BOOT_TRACE_REG+4*/
-+#define BACKUP_TRACE()			\
-+	ldr r4, =CONFIG_BOOT_TRACE_REG;	\
-+	ldr r3, [r4];			\
-+	str r3, [r4, #0x04];
-+
-+/* Save a state of boot at CONFIG_BOOT_TRACE_REG */
-+#define BOOT_TRACE(val)		\
-+	ldr r4, =CONFIG_BOOT_TRACE_REG;	\
-+	ldr r3, =val;			\
-+	str r3, [r4];
-+#else
-+#define BACKUP_TRACE()
-+#define BOOT_TRACE(val)
-+#endif
-+
-+nand_boot_setup:
-+
-+	/* Copy SPL image from flash to SDRAM first */
-+	BOOT_TRACE(1)
-+	ldr r0, =IMX_NFC_MAIN_AREA0
-+	add r2, r0, #(IMX_NFC_SPARE_AREA0-IMX_NFC_MAIN_AREA0) //2KB NFC Buff
-+	ldr r1, =CONFIG_SYS_NAND_U_BOOT_DST
-+
-+	BOOT_TRACE(2)
-+1:	ldmia r0!, {r3-r10}
-+	stmia r1!, {r3-r10}
-+	cmp r0, r2
-+	blo 1b
-+
-+
-+
-+	/* Jump to SDRAM */
-+	BOOT_TRACE(3)
-+	ldr r1, =0xFFF
-+	and r0, pc, r1	 /* offset of pc */
-+	ldr r1, =CONFIG_SYS_NAND_U_BOOT_DST
-+	add r1, r1, #0x10
-+	add pc, r0, r1
-+	nop
-+	nop
-+	nop
-+	nop
-+
-+NAND_Copy_Main:
-+	BOOT_TRACE(4)
-+	/* r0: nfc base. Reloaded after each page copying		*/
-+	ldr r0, =IMX_NFC_MAIN_AREA0
-+
-+	/* r1: starting flash addr to be copied. Updated constantly	*/
-+	/* bypass the first preloaded pages				*/
-+	ldr r1, =(IMX_NFC_SPARE_AREA0-IMX_NFC_MAIN_AREA0)
-+
-+	/* r2: end of 1st RAM buf. Doesn't change			*/
-+	ldr r2, =IMX_NFC_MAIN_AREA1
-+
-+	/* r12: NFC register base. Doesn't change			*/
-+	ldr r12, =IMX_NFC_REGS
-+
-+	ldr r11, =CONFIG_SYS_NAND_U_BOOT_DST
-+
-+	/* r13: end of SDRAM address for copying. Doesn't change	*/
-+	add r13, r11, #CONFIG_SYS_NAND_U_BOOT_SIZE
-+
-+	/* r11: starting SDRAM address for copying. Updated constantly	*/
-+	add r11, r11, r1
-+
-+	/* unlock internal buffer					*/
-+	ldr r3, =NFC_CONFIG_UNLOCKED
-+	strh r3, [r12, #NFC_OFFSET_CONFIG]
-+
-+	/* enable ECC and mask interrupts				*/
-+	ldr r3, =(NFC_CONFIG1_ECC_EN | NFC_CONFIG1_INT_MSK)
-+	strh r3, [r12, #NFC_OFFSET_CONFIG1]
-+
-+Nfc_Read_Page:
-+	BOOT_TRACE(5)
-+	/*  send NAND_CMD_READ0 command				*/
-+	ldr r3, =NAND_CMD_READ0;
-+	strh r3, [r12, #NFC_OFFSET_FLASH_CMD]
-+
-+	ldr r3, =NFC_CONFIG2_FCMD
-+	strh r3, [r12, #NFC_OFFSET_CONFIG2]
-+	bl do_wait_op_done
-+
-+	/* send NAND address to read. TODO small page support		*/
-+	BOOT_TRACE(6)
-+	mov r3, r1, lsr #1
-+	bl do_addr_input	   /* 1st addr cycle */
-+
-+	mov r3, r1, lsr #9
-+	and r3, r3, #0x03
-+	bl do_addr_input	   /* 2nd addr cycle */
-+
-+	mov r3, r1, lsr #11
-+	bl do_addr_input	   /* 3rd addr cycle */
-+
-+	mov r3, r1, lsr #19
-+	bl do_addr_input	   /* 4th addr cycle */
-+
-+	/* Small NAND flashs (== 1Gb) support 5 addr cycles		*/
-+	mov r3, r1, lsr #27
-+	bl do_addr_input	   /* 5th addr cycle */
-+
-+	/* send NAND_CMD_READSTART command. TODO small page support	*/
-+	BOOT_TRACE(7)
-+	mov r3, #NAND_CMD_READSTART;
-+	strh r3, [r12, #NFC_OFFSET_FLASH_CMD]
-+	mov r3, #NFC_CONFIG2_FCMD
-+	strh r3, [r12, #NFC_OFFSET_CONFIG2]
-+	bl do_wait_op_done
-+
-+	/* read and copy buf 0						*/
-+	BOOT_TRACE(8)
-+	mov r3, #0
-+	strh r3, [r12, #NFC_OFFSET_BUF_ADDR]
-+
-+	mov r3, #NFC_CONFIG2_FDO_PAGE
-+	strh r3, [r12, #NFC_OFFSET_CONFIG2]
-+	bl do_wait_op_done
-+
-+	bl Test_And_Copy_Buffer
-+
-+	/* read and copy buf 1						*/
-+	mov r3, #1
-+	strh r3, [r12, #NFC_OFFSET_BUF_ADDR]
-+
-+	mov r3, #NFC_CONFIG2_FDO_PAGE
-+	strh r3, [r12, #NFC_OFFSET_CONFIG2]
-+	bl do_wait_op_done
-+
-+	bl Test_And_Copy_Buffer
-+
-+	/* here we should test if 512B page flash and bypass next buffers */
-+	/* read and copy buf 2. TODO small page support		*/
-+	mov r3, #2
-+	strh r3, [r12, #NFC_OFFSET_BUF_ADDR]
-+
-+	mov r3, #NFC_CONFIG2_FDO_PAGE
-+	strh r3, [r12, #NFC_OFFSET_CONFIG2]
-+	bl do_wait_op_done
-+
-+	bl Test_And_Copy_Buffer
-+
-+	/* read and copy buf 3						*/
-+	mov r3, #3
-+	strh r3, [r12, #NFC_OFFSET_BUF_ADDR]
-+
-+	mov r3, #NFC_CONFIG2_FDO_PAGE
-+	strh r3, [r12, #NFC_OFFSET_CONFIG2]
-+	bl do_wait_op_done
-+
-+	bl Test_And_Copy_Buffer
-+
-+	/* is the last page ? */
-+	BOOT_TRACE(12)
-+	cmp r11, r13
-+	bge NAND_Copy_Main_done
-+
-+	/* r0: nfc base. Reloaded after each page copying		*/
-+	ldr r0, =IMX_NFC_MAIN_AREA0
-+	/* r2: end of 1st RAM buf. Doesn't change 			*/
-+	ldr r2, =IMX_NFC_MAIN_AREA1
-+	b Nfc_Read_Page
-+
-+NAND_Copy_Main_done:
-+	BOOT_TRACE(13)
-+	.endm /* nand_boot */
-+
-+	.macro init_aipi
-+	/*
-+	 * setup AIPI1 and AIPI2
-+	 */
-+	writel(AIPI1_PSR0, CONFIG_SYS_AIPI1_PSR0_VAL)
-+	writel(AIPI1_PSR1, CONFIG_SYS_AIPI1_PSR1_VAL)
-+	writel(AIPI2_PSR0, CONFIG_SYS_AIPI2_PSR0_VAL)
-+	writel(AIPI2_PSR1, CONFIG_SYS_AIPI2_PSR1_VAL)
-+
-+	/* Change SDRAM signal strengh */
-+	ldr r0, =GPCR
-+	ldr r1, =CONFIG_SYS_GPCR_VAL
-+	ldr r5, [r0]
-+	orr r5, r5, r1
-+	str r5, [r0]
-+
-+	.endm /* init_aipi */
-+
-+	.macro init_clock
-+	ldr r0, =CSCR
-+	/* disable MPLL/SPLL first */
-+	ldr r1, [r0]
-+	bic r1, r1, #(CSCR_MPEN|CSCR_SPEN)
-+	str r1, [r0]
-+
-+ 	/*
-+	 * pll clock initialization predefined in apf27.h
-+	 */
-+	writel(MPCTL0, CONFIG_SYS_MPCTL0_VAL)
-+	writel(SPCTL0, CONFIG_SYS_SPCTL0_VAL)
-+
-+	writel(CSCR, CONFIG_SYS_CSCR_VAL | CSCR_MPLL_RESTART | CSCR_SPLL_RESTART)
-+
-+	/*
-+	 * add some delay here
-+	 */
-+	mov r1, #0x1000
-+	1:  subs r1, r1, #0x1
-+	bne 1b
-+
-+	/* peripheral clock divider */
-+	writel(PCDR0, CONFIG_SYS_PCDR0_VAL)
-+	writel(PCDR1, CONFIG_SYS_PCDR1_VAL)
-+
-+	/* Configure PCCR0 and PCCR1 */
-+	writel(PCCR0, CONFIG_SYS_PCCR0_VAL)
-+	writel(PCCR1, CONFIG_SYS_PCCR1_VAL)
-+
-+	.endm /* init_clock */
-+
-+/*
-+ *************************************************************************
-+ *
-+ * No jump vector table. Use reset vector as direct entry point.
-+ * Do not support any interrupt event within SPL
-+ *
-+ *************************************************************************
-+ */
-+
-+
-+.globl _start
-+_start:
-+
-+/*
-+ *************************************************************************
-+ *
-+ * Startup Code (reset vector)
-+ *
-+ * do important init only if we don't start from memory!
-+ * setup Memory and board specific bits prior to relocation.
-+ * relocate armboot to ram
-+ * setup stack
-+ *
-+ *************************************************************************
-+ */
-+
-+
-+/*
-+ * the actual reset code
-+ */
-+
-+reset:
-+	/*
-+	 * set the cpu to SVC32 mode
-+	 */
-+	mrs	r0,cpsr
-+	bic	r0,r0,#0x1f
-+	orr	r0,r0,#0xd3
-+	msr	cpsr,r0
-+
-+	/*
-+	 * invalidate I/D cache/TLB and drain write buffer
-+	 */
-+	mov r0, #0
-+	mcr p15, 0, r0, c7, c7, 0	/* invalidate I cache and D cache */
-+	mcr p15, 0, r0, c8, c7, 0	/* invalidate TLBs */
-+	mcr p15, 0, r0, c7, c10, 4   /* Drain the write buffer */
-+
-+	/*
-+	 * disable MMU stuff and caches
-+	 */
-+	mrc p15, 0, r0, c1, c0, 0
-+	bic	r0, r0, #0x00002300	/* clear bits 13, 9:8 (--V- --RS) */
-+	bic	r0, r0, #0x00000087	/* clear bits 7, 2:0 (B--- -CAM) */
-+	orr	r0, r0, #0x00000002	/* set bit 2 (A) Align */
-+	orr	r0, r0, #0x00001000	/* set bit 12 (I) I-Cache */
-+	mcr p15, 0, r0, c1, c0, 0
-+
-+init_aipi_start:
-+	init_aipi
-+
-+	/* check if sdram has been setup (running within sdram) */
-+	cmp pc, #0xa0000000 /* start of first sdram memory space */
-+	blo init_clock_start
-+	cmp pc, #0xc0000000 /* end of second sdram memory space */
-+	blo regular_boot
-+
-+	/* running from sdram with full code present -> regular_boot */
-+init_clock_start:
-+	init_clock
-+
-+init_sdram_start:
-+	bl setup_sdram_ddr
-+
-+	/* save state of previous boot (SDRAM is configured)*/
-+	BACKUP_TRACE()
-+
-+	/* nand_boot BOOT_TRACE(1..13) */
-+
-+	nand_boot
-+
-+	BOOT_TRACE(14) /* start regular U-Boot */
-+
-+regular_boot: /* jump to start of next 2kiB block (U-Boot) */
-+	ldr r0, =0xfffff800
-+	and r0, r0, pc
-+	add pc, r0, #0x800
-+
-+do_wait_op_done:
-+	1:
-+	ldrh r3, [r12, #NFC_OFFSET_CONFIG2]
-+	ands r3, r3, #NFC_CONFIG2_INT
-+	beq 1b
-+	mov r3, #0x0
-+	strh r3, [r12, #NFC_OFFSET_CONFIG2]
-+	mov	pc, lr
-+
-+do_addr_input:
-+	mov r9, lr
-+	and r3, r3, #0xFF
-+	strh r3, [r12, #NFC_OFFSET_FLASH_ADDR]
-+	mov r3, #NFC_CONFIG2_FADD
-+	strh r3, [r12, #NFC_OFFSET_CONFIG2]
-+	bl do_wait_op_done
-+	mov pc, r9
-+
-+Test_And_Copy_Buffer:
-+	/* check for bad block (2 bits error in main or spare are)*/
-+	BOOT_TRACE(9)
-+	ldrh r4, [r12, #NFC_OFFSET_ECC_STATUS_RESULT]
-+	ands r4, r4, #(NFC_ECC_STAT_ERROR2|(NFC_ECC_STAT_ERROR2<<NFC_ECC_STAT_ERM_SHFT))
-+	bne Skip_Bad_Buffer
-+
-+	/* check BI byte of the current spare buffer */
-+	ldr r4, =IMX_NFC_SPARE_AREA0
-+	ldrh r3, [r12, #NFC_OFFSET_BUF_ADDR] /* for the current buffer */
-+	orr  r4, r3, lsl #0x04
-+
-+	/* at bi word offset 4. Fixme position change betwwen 8 and 16 bits bus */
-+	ldrh r4, [r4, #0x04]
-+	and r4, r4, #0x0FF00 /* has to be 0xFFxx */
-+	cmp r4, #0x0FF00
-+	bne Skip_Bad_Buffer
-+
-+Copy_Good_Buffer:
-+	/* copying 512 bytes buffer */
-+	BOOT_TRACE(10)
-+1:  ldmia r0!, {r3-r10}
-+	stmia r11!, {r3-r10}
-+	cmp r0, r2
-+	blo 1b
-+	b End_Of_Copy
-+
-+Skip_Bad_Buffer:
-+	BOOT_TRACE(11)
-+	/* bad pages do not contain valid data and have to be skip	*/
-+	add r0, r0, #0x200
-+
-+	/* rewind ram addr to start of buffer */
-+	ldr r3, =(~0x1FF)
-+	and r11, r11, r3
-+
-+End_Of_Copy:
-+	add r2, r2, #0x200
-+	add r1, r1, #0x200
-+
-+	mov	pc, lr
-+
-+
-+setup_sdram_ddr:
-+
-+	/* wait for SDRAM/LPDDR ready (SDRAMRDY) */
-+	ldr  r0, =IMX_ESD_BASE
-+	ldr  r4, =ESDMISC_SDRAM_RDY
-+2:	ldr  r1, [r0, #ESDMISC_ROF]
-+	ands r1, r1, r4
-+	bpl 2b
-+
-+	/* LPDDR Soft Reset Mobile/Low Power DDR SDRAM. */
-+	ldr		r0, =IMX_ESD_BASE
-+	ldr		r4, =CONFIG_SYS_ESDMISC_VAL
-+	orr		r1, r4, #ESDMISC_MDDR_DL_RST
-+	str		r1, [r0, #ESDMISC_ROF]
-+
-+	/* Hold for more than 200ns */
-+	ldr r1, =0x10000
-+	1:	subs r1, r1, #0x1
-+	bne 1b
-+
-+	str		r4, [r0]
-+
-+	/* writel(ESDCFG0, CONFIG_SYS_SDRAM_ESDCFG_REGISTER_VAL) */
-+	ldr		r0, =IMX_ESD_BASE
-+	ldr		r1, =CONFIG_SYS_SDRAM_ESDCFG_REGISTER_VAL
-+	str		r1, [r0, #ESDCFG0_ROF]
-+
-+	/* writel(ESDCTL0, CONFIG_SYS_PRECHARGE_CMD) */
-+	ldr		r0, =IMX_ESD_BASE
-+	ldr		r1, =CONFIG_SYS_PRECHARGE_CMD
-+	str		r1, [r0, #ESDCTL0_ROF]
-+
-+	/* writeb(0xA0001000, any value) */
-+	ldr		r1, =PHYS_SDRAM_1+CONFIG_SYS_SDRAM_PRECHARGE_ALL_VAL
-+	strb		r2, [r1]
-+
-+	/* writel(ESDCTL0, CONFIG_SYS_AUTOREFRESH_CMD) */
-+	ldr		r1, =CONFIG_SYS_AUTOREFRESH_CMD
-+	str		r1, [r0, #ESDCTL0_ROF]
-+
-+	ldr 		r4, =PHYS_SDRAM_1	/* ...
 
[truncated message content]

[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-361-g9f7dc4a

From: Julien B a. A. <ar...@us...> - 2012-06-11 09:21:26

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".

The branch, master has been updated
       via  9f7dc4ae66b9db2601bfb53190a2bd7b4a911489 (commit)
      from  a61e0576150d20926fe543a0dc34a423a2d331e3 (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit 9f7dc4ae66b9db2601bfb53190a2bd7b4a911489
Author: Julien Boibessot <jul...@ar...>
Date:   Mon Jun 11 11:20:25 2012 +0200

    [BUILDROOT] Add PPS51 support to pps utilities and cleanup package installation while we are at it

-----------------------------------------------------------------------

Summary of changes:
 buildroot/configs/pps51_defconfig            |    4 +-
 buildroot/configs/pps_defconfig              |    4 +-
 buildroot/package/armadeus/pps/Config.in     |    6 +-
 buildroot/package/armadeus/pps/pps.mk        |   89 +++++++++++---------------
 target/pps/init/{S80gpios => S80gpios_pps}   |    2 +-
 target/pps/init/{S80gpios => S80gpios_pps51} |   33 ++++------
 6 files changed, 59 insertions(+), 79 deletions(-)
 copy target/pps/init/{S80gpios => S80gpios_pps} (96%)
 rename target/pps/init/{S80gpios => S80gpios_pps51} (52%)

diff --git a/buildroot/configs/pps51_defconfig b/buildroot/configs/pps51_defconfig
index c19c4c9..2e8e522 100644
--- a/buildroot/configs/pps51_defconfig
+++ b/buildroot/configs/pps51_defconfig
@@ -41,8 +41,8 @@ BR2_PACKAGE_ARMADEUS_FPGA_FIRMWARE=y
 BR2_PACKAGE_ARMADEUS_FPGA_FIRMWARE_APF51_DUAL_UART=y
 BR2_PACKAGE_IMXREGS=y
 BR2_PACKAGE_ARMADEUS_TESTSUITE=y
-BR2_PACKAGE_ARMADEUS_PPS_UTILITIES=y
-BR2_PACKAGE_ARMADEUS_PPS_TEST_SCRIPTS=y
+BR2_PACKAGE_PPS=y
+BR2_PACKAGE_PPS_TEST_SCRIPTS=y
 BR2_PACKAGE_TFP410CTRL=y
 BR2_PACKAGE_ALSA_UTILS=y
 BR2_PACKAGE_ALSA_UTILS_AMIXER=y
diff --git a/buildroot/configs/pps_defconfig b/buildroot/configs/pps_defconfig
index 5887cdf..756dfb2 100644
--- a/buildroot/configs/pps_defconfig
+++ b/buildroot/configs/pps_defconfig
@@ -35,8 +35,8 @@ BR2_PACKAGE_BUSYBOX_SHOW_OTHERS=y
 BR2_PACKAGE_FPGAREGS=y
 BR2_PACKAGE_IMXREGS=y
 BR2_PACKAGE_MAX5821CTRL=y
-BR2_PACKAGE_ARMADEUS_PPS_UTILITIES=y
-BR2_PACKAGE_ARMADEUS_PPS_TEST_SCRIPTS=y
+BR2_PACKAGE_PPS=y
+BR2_PACKAGE_PPS_TEST_SCRIPTS=y
 BR2_PACKAGE_STRACE=y
 BR2_PACKAGE_FIRMWARE=y
 BR2_PACKAGE_FIRMWARE_88W8686=y
diff --git a/buildroot/package/armadeus/pps/Config.in b/buildroot/package/armadeus/pps/Config.in
index 69fbff8..54fbce9 100644
--- a/buildroot/package/armadeus/pps/Config.in
+++ b/buildroot/package/armadeus/pps/Config.in
@@ -1,13 +1,13 @@
-config BR2_PACKAGE_ARMADEUS_PPS_UTILITIES
+config BR2_PACKAGE_PPS
 	bool "PPS Utilities"
 	help
 	  Install PPS utilities & initialization scripts needed for:
 	    - GPIOs initialization
 	    - Guest user creation to connect to PPS via SSH
 
-if BR2_PACKAGE_ARMADEUS_PPS_UTILITIES
+if BR2_PACKAGE_PPS
 
-config BR2_PACKAGE_ARMADEUS_PPS_TEST_SCRIPTS
+config BR2_PACKAGE_PPS_TEST_SCRIPTS
 	bool "PPS Test scripts"
 	help
 	  Install PPS test scripts for Ethernet, WiFi & USB Gadget.
diff --git a/buildroot/package/armadeus/pps/pps.mk b/buildroot/package/armadeus/pps/pps.mk
index 9eeceb5..3dbe091 100644
--- a/buildroot/package/armadeus/pps/pps.mk
+++ b/buildroot/package/armadeus/pps/pps.mk
@@ -4,56 +4,43 @@
 #
 #############################################################
 
-ARMADEUS-PPS_CONFIGS_DIR:=$(TOPDIR)/../target/pps/configs
-ARMADEUS-PPS_CONFIGS_TARGET_DIR:=$(TARGET_DIR)/etc/
-ARMADEUS-PPS_INITS_DIR:=$(TOPDIR)/../target/pps/init
-ARMADEUS-PPS_INITS_TARGET_DIR:=$(ARMADEUS-PPS_CONFIGS_TARGET_DIR)/init.d
-ARMADEUS-PPS_HOME_DIR:=$(TOPDIR)/../target/pps/home
-ARMADEUS-PPS_HOME_TARGET_DIR:=$(TARGET_DIR)/home
-
-ARMADEUS-PPS_TESTSCRIPTS_SOURCE:=$(TOPDIR)/../target/pps/scripts
-ARMADEUS-PPS_TESTSCRIPTS_TARGET_DIR:=$(TARGET_DIR)/usr/local/pps/scripts
-ARMADEUS-PPS_TESTSCRIPTS_WWW_DIR:=$(ARMADEUS-PPS_TESTSCRIPTS_SOURCE)/www
-ARMADEUS-PPS_TESTSCRIPTS_WWW_TARGET_DIR:=$(TARGET_DIR)/var
-ARMADEUS-PPS_TESTSCRIPTS_CONFIGS_DIR:=$(ARMADEUS-PPS_TESTSCRIPTS_SOURCE)/configs
-ARMADEUS-PPS_TESTSCRIPTS_CONFIGS_TARGET_DIR:=$(ARMADEUS-PPS_CONFIGS_TARGET_DIR)
-
-$(ARMADEUS-PPS_INITS_TARGET_DIR)/S80gpios:
-	cp -Rf $(ARMADEUS-PPS_INITS_DIR)/* $(ARMADEUS-PPS_INITS_TARGET_DIR)
-
-pps-home:
-	cp -Rf $(ARMADEUS-PPS_HOME_DIR)/* $(ARMADEUS-PPS_HOME_TARGET_DIR)
-
-pps-configs:
-	mkdir -p $(ARMADEUS-PPS_CONFIGS_TARGET_DIR)
-	cp -Rf $(ARMADEUS-PPS_CONFIGS_DIR)/* $(ARMADEUS-PPS_CONFIGS_TARGET_DIR)
-
-$(ARMADEUS-PPS_TESTSCRIPTS_TARGET_DIR)/init_boa.sh:
-ifeq ($(BR2_PACKAGE_ARMADEUS_PPS_TEST_SCRIPTS),y)
-	$(ARMADEUS-PPS_TESTSCRIPTS_SOURCE)/install.sh $(ARMADEUS-PPS_TESTSCRIPTS_TARGET_DIR)
-endif
-
-$(ARMADEUS-PPS_TESTSCRIPTS_WWW_TARGET_DIR)/www/index.html:
-ifeq ($(BR2_PACKAGE_ARMADEUS_PPS_TEST_SCRIPTS),y)
-	cp -Rf $(ARMADEUS-PPS_TESTSCRIPTS_WWW_DIR) $(ARMADEUS-PPS_TESTSCRIPTS_WWW_TARGET_DIR)
-endif
-
-$(ARMADEUS-PPS_TESTSCRIPTS_CONFIGS_TARGET_DIR)/ipsec-tools.conf:
-ifeq ($(BR2_PACKAGE_ARMADEUS_PPS_TEST_SCRIPTS),y)
-	cp -Rf $(ARMADEUS-PPS_TESTSCRIPTS_CONFIGS_DIR)/* $(ARMADEUS-PPS_TESTSCRIPTS_CONFIGS_TARGET_DIR)
+PPS_VERSION = 1.1
+PPS_SITE = $(TOPDIR)/../target/pps
+PPS_SITE_METHOD = copy
+
+PPS_CONFIGS_DIR:=$(TOPDIR)/../target/pps/configs
+PPS_CONFIGS_TARGET_DIR:=$(TARGET_DIR)/etc/
+PPS_INITS_DIR:=$(TOPDIR)/../target/pps/init
+PPS_INITS_TARGET_DIR:=$(PPS_CONFIGS_TARGET_DIR)/init.d
+PPS_HOME_DIR:=$(TOPDIR)/../target/pps/home
+
+PPS_TESTSCRIPTS_SOURCE:=$(TOPDIR)/../target/pps/scripts
+PPS_TESTSCRIPTS_TARGET_DIR:=$(TARGET_DIR)/usr/local/pps/scripts
+PPS_TESTSCRIPTS_WWW_DIR:=$(PPS_TESTSCRIPTS_SOURCE)/www
+PPS_TESTSCRIPTS_WWW_TARGET_DIR:=$(TARGET_DIR)/var
+PPS_TESTSCRIPTS_CONFIGS_DIR:=$(PPS_TESTSCRIPTS_SOURCE)/configs
+
+ifeq ($(BR2_PACKAGE_PPS_TEST_SCRIPTS),y)
+define PPS_INSTALL_TEST_SCRIPTS
+	$(PPS_TESTSCRIPTS_SOURCE)/install.sh $(PPS_TESTSCRIPTS_TARGET_DIR)
+	cp -Rf $(PPS_TESTSCRIPTS_WWW_DIR) $(PPS_TESTSCRIPTS_WWW_TARGET_DIR)
+	cp -Rf $(PPS_TESTSCRIPTS_CONFIGS_DIR)/* $(PPS_CONFIGS_TARGET_DIR)
+endef
 endif
 
-pps-utils: $(ARMADEUS-PPS_INITS_TARGET_DIR)/S80gpios pps-home pps-configs $(ARMADEUS-PPS_TESTSCRIPTS_TARGET_DIR)/init_boa.sh $(ARMADEUS-PPS_TESTSCRIPTS_WWW_TARGET_DIR)/www/index.html $(ARMADEUS-PPS_TESTSCRIPTS_CONFIGS_TARGET_DIR)/ipsec-tools.conf
-
-armadeus-pps-utils-clean:
-	rm -rf $(ARMADEUS-PPS_TESTSCRIPTS_TARGET_DIR)
-	rm -rf $(ARMADEUS-PPS_WWW_TARGET_DIR)/www
-
-#############################################################
-#
-# Toplevel Makefile options
-#
-#############################################################
-ifeq ($(strip $(BR2_PACKAGE_ARMADEUS_PPS_UTILITIES)),y)
-TARGETS+=pps-utils
-endif
+define PPS_INSTALL_TARGET_CMDS
+	cp $(PPS_INITS_DIR)/S80gpios_$(BR2_BOARD_NAME) $(PPS_INITS_TARGET_DIR)/S80gpios
+	cp -Rf $(PPS_INITS_DIR)/S90* $(PPS_INITS_TARGET_DIR)
+	mkdir -p $(TARGET_DIR)/home
+	cp -Rf $(PPS_HOME_DIR)/* $(TARGET_DIR)/home
+	mkdir -p $(PPS_CONFIGS_TARGET_DIR)
+	cp -Rf $(PPS_CONFIGS_DIR)/* $(PPS_CONFIGS_TARGET_DIR)
+	$(PPS_INSTALL_TEST_SCRIPTS)
+endef
+
+define PPS_UNINSTALL_TARGET_CMDS
+	rm -rf $(PPS_TESTSCRIPTS_TARGET_DIR)
+	rm -rf $(PPS_WWW_TARGET_DIR)/www
+endef
+
+$(eval $(call GENTARGETS))
diff --git a/target/pps/init/S80gpios b/target/pps/init/S80gpios_pps
similarity index 96%
copy from target/pps/init/S80gpios
copy to target/pps/init/S80gpios_pps
index 9c7a91d..ba6875f 100755
--- a/target/pps/init/S80gpios
+++ b/target/pps/init/S80gpios_pps
@@ -3,7 +3,7 @@
 #
 # Script used to configure userspace usable GPIOs on PPS
 #
-#  Copyright (C) 2010-2011  The Armadeus Project - ARMadeus Systems
+#  Copyright (C) 2010-2011  The Armadeus Project - Armadeus systems
 #  Author: Jeremie Scheer
 #
 # This program is free software; you can redistribute it and/or modify
diff --git a/target/pps/init/S80gpios b/target/pps/init/S80gpios_pps51
similarity index 52%
rename from target/pps/init/S80gpios
rename to target/pps/init/S80gpios_pps51
index 9c7a91d..380fe7f 100755
--- a/target/pps/init/S80gpios
+++ b/target/pps/init/S80gpios_pps51
@@ -1,10 +1,9 @@
 #!/bin/sh
 
 #
-# Script used to configure userspace usable GPIOs on PPS
+# Script used to configure userspace usable GPIOs on PPS51
 #
-#  Copyright (C) 2010-2011  The Armadeus Project - ARMadeus Systems
-#  Author: Jeremie Scheer
+#  Copyright (C) 2010-2012  The Armadeus Project - Armadeus systems
 #
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
@@ -25,27 +24,21 @@ GPIOLIB_DIR=/sys/class/gpio
 
 case "$1" in
 	start)
-		echo "Configuring PPS GPIOs"
+		echo "Configuring PPS51 GPIOs"
 
-		# Power LED (red) (PF16)
-		echo 176 > $GPIOLIB_DIR/export
-		echo out > $GPIOLIB_DIR/gpio176/direction
-		echo 1 > $GPIOLIB_DIR/gpio176/value	# on
+		# Power LED (red)
+		echo 55 > $GPIOLIB_DIR/export
+		echo out > $GPIOLIB_DIR/gpio55/direction
+		echo 1 > $GPIOLIB_DIR/gpio55/value	# on
 
-		# Status LED (green) (PF17)
-		echo 177 > $GPIOLIB_DIR/export
-		echo out > $GPIOLIB_DIR/gpio177/direction
-		echo 0 > $GPIOLIB_DIR/gpio177/value	# off
-
-		# Second eth, LAN9500_RESETN (PC15)
-		echo 79 > $GPIOLIB_DIR/export
-		echo out > $GPIOLIB_DIR/gpio79/direction
-		echo 1 > $GPIOLIB_DIR/gpio79/value	# out of reset
+		# Status LED (green)
+		echo 54 > $GPIOLIB_DIR/export
+		echo out > $GPIOLIB_DIR/gpio54/direction
+		echo 0 > $GPIOLIB_DIR/gpio54/value	# off
 	;;
 	stop)
-		echo 0 > $GPIOLIB_DIR/gpio176/value	#STATUS_LED0 (green) off
-		echo 1 > $GPIOLIB_DIR/gpio177/value	#STATUS_LED1 (red) on
-		echo 0 > $GPIOLIB_DIR/gpio79/value	# in reset
+		echo 0 > $GPIOLIB_DIR/gpio54/value	# Status LED (green) off
+		echo 1 > $GPIOLIB_DIR/gpio55/value	# Power LED (red) on
 	;;
 	restart)
 		$0 stop


hooks/post-receive
-- 
armadeus

[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-360-ga61e057

From: Julien B a. A. <ar...@us...> - 2012-06-11 08:02:32

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".

The branch, master has been updated
       via  a61e0576150d20926fe543a0dc34a423a2d331e3 (commit)
       via  0e3825df23deaf363543e5a73f244594c2b3ded3 (commit)
      from  b51d3aeffc47949426cb0d93c336b5a8af43e5e6 (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit a61e0576150d20926fe543a0dc34a423a2d331e3
Merge: 0e3825d b51d3ae
Author: Julien Boibessot <jul...@ar...>
Date:   Sun Jun 10 22:08:18 2012 +0200

    Merge branch 'master' of ssh://armadeus.git.sourceforge.net/gitroot/armadeus/armadeus

commit 0e3825df23deaf363543e5a73f244594c2b3ded3
Author: Julien Boibessot <jul...@ar...>
Date:   Sun Jun 10 22:05:28 2012 +0200

    [BUILDROOT] Fixes PPS51 defconfig (U-Boot stuff)

-----------------------------------------------------------------------

Summary of changes:
 buildroot/configs/pps51_defconfig |   15 ++++++++++-----
 1 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/buildroot/configs/pps51_defconfig b/buildroot/configs/pps51_defconfig
index 18792d5..c19c4c9 100644
--- a/buildroot/configs/pps51_defconfig
+++ b/buildroot/configs/pps51_defconfig
@@ -77,11 +77,16 @@ BR2_TARGET_ROOTFS_UBIFS_MAXLEBCNT=135301
 BR2_TARGET_ROOTFS_UBI=y
 BR2_TARGET_UBOOT=y
 BR2_TARGET_UBOOT_BOARDNAME="apf51"
-BR2_TARGET_U_BOOT_CONFIG_HEADER_FILE="$(ARMADEUS_PATH)/apf51/apf51-u-boot-2010.03.h"
-BR2_TARGET_UBOOT_2010_03=y
-BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/$(BR2_TARGET_UBOOT_VERSION)/"
-BR2_TARGET_UBOOT_TOOL_ENV=y
-# BR2_TARGET_UBOOT_NETWORK is not set
+BR2_TARGET_UBOOT_CONFIG_HEADER_FILE="$(ARMADEUS_PATH)/apf51/apf51-u-boot-2011.12.h"
+BR2_TARGET_UBOOT_CUSTOM_TARBALL=y
+BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2011.12.tar.bz2"
+BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2011.12"
+BR2_TARGET_UBOOT_FORMAT_NAND_BIN=y
+BR2_TARGET_UBOOT_NETWORK=y
+BR2_TARGET_UBOOT_SERVERIP="192.168.0.2"
+BR2_TARGET_UBOOT_IPADDR="192.168.0.10"
+BR2_TARGET_UBOOT_GATEWAY="192.168.0.1"
+BR2_TARGET_UBOOT_ETHADDR=""
 BR2_LINUX_KERNEL=y
 BR2_LINUX_KERNEL_CUSTOM_VERSION=y
 BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="2.6.38.8"


hooks/post-receive
-- 
armadeus

[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-358-gb51d3ae

From: Gwenhael Goavec-M. <gwe...@us...> - 2012-06-09 13:52:28

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".

The branch, master has been updated
       via  b51d3aeffc47949426cb0d93c336b5a8af43e5e6 (commit)
      from  b9e96756cd7e7b24acd1bb409695254622c79dec (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit b51d3aeffc47949426cb0d93c336b5a8af43e5e6
Author: Gwenhael Goavec-Merou <gw...@tr...>
Date:   Sat Jun 9 15:50:40 2012 +0200

    [BUILDROOT][2012.02] Re-Add and adapt 072-xenomai-package for new BR

-----------------------------------------------------------------------

Summary of changes:
 .../buildroot/2012.02/072-xenomai-package.patch    |  219 ++++++++++++++++++++
 1 files changed, 219 insertions(+), 0 deletions(-)
 create mode 100644 patches/buildroot/2012.02/072-xenomai-package.patch

diff --git a/patches/buildroot/2012.02/072-xenomai-package.patch b/patches/buildroot/2012.02/072-xenomai-package.patch
new file mode 100644
index 0000000..f41b12b
--- /dev/null
+++ b/patches/buildroot/2012.02/072-xenomai-package.patch
@@ -0,0 +1,219 @@
+* Allows downloading adeos patch instead of specifying a local path
+* Adds patches specific for Armadeus boards
+* Adds linux config file 
+
+Signed-off-by: Gwenhael Goavec-Merou <gwe...@ar...>
+
+Index: buildroot/linux/Config.ext.in
+===================================================================
+--- buildroot.orig/linux/Config.ext.in
++++ buildroot/linux/Config.ext.in
+@@ -15,13 +15,19 @@ config BR2_LINUX_KERNEL_EXT_XENOMAI
+ 	  ARM, 2.6.35.9, 2.6.37.6, 2.6.38.8, on NIOS2, 2.6.35, on
+ 	  PowerPC, 2.6.35.7, 2.6.36.4, 3.0.8.
+ 
++config BR2_LINUX_KERNEL_EXT_XENOMAI_ADEOS_URL
++	depends on BR2_LINUX_KERNEL_EXT_XENOMAI
++	string "Adeos patch URL"
++	default "http://download.gna.org/adeos/patches/v2.6/$(BR2_ARCH)/older"
++	help
++	  Optionally, explicitly specify the Adeos url.
++
+ config BR2_LINUX_KERNEL_EXT_XENOMAI_ADEOS_PATCH
+ 	depends on BR2_LINUX_KERNEL_EXT_XENOMAI
+ 	string "Path for Adeos patch file"
++	default "adeos-ipipe-2.6.29-arm-1.13-05.patch"
+ 	help
+ 	  Optionally, explicitly specify the Adeos patch to use.
+-	  Download it at http://download.gna.org/adeos/patches/v2.6/$(ARCH)/
+-	  and verify that your kernel version in buildroot matches.
+ 
+ # RTAI
+ config BR2_LINUX_KERNEL_EXT_RTAI
+Index: buildroot/linux/linux-ext-xenomai.mk
+===================================================================
+--- buildroot.orig/linux/linux-ext-xenomai.mk
++++ buildroot/linux/linux-ext-xenomai.mk
+@@ -13,7 +13,7 @@ XENOMAI_ADEOS_PATCH = $(call qstrip,$(BR
+ ifeq ($(XENOMAI_ADEOS_PATCH),)
+ XENOMAI_ADEOS_OPT = --default
+ else
+-XENOMAI_ADEOS_OPT = --adeos=$(XENOMAI_ADEOS_PATCH)
++XENOMAI_ADEOS_OPT = --adeos=$(BR2_DL_DIR)/$(XENOMAI_ADEOS_PATCH)
+ endif
+ 
+ # Prepare kernel patch
+@@ -23,6 +23,9 @@ define XENOMAI_PREPARE_KERNEL
+ 		--arch=$(KERNEL_ARCH) \
+ 		$(XENOMAI_ADEOS_OPT) \
+ 		--verbose
++	support/scripts/apply-patches.sh $(LINUX_DIR) \
++		package/xenomai/						\
++		adeos-*.patch
+ endef
+ 
+ LINUX_PRE_PATCH_HOOKS += XENOMAI_PREPARE_KERNEL
+Index: buildroot/linux/linux.mk
+===================================================================
+--- buildroot.orig/linux/linux.mk
++++ buildroot/linux/linux.mk
+@@ -133,6 +133,12 @@ define ARMADEUS_LINUX_CONFIG_HACKS
+ endef
+ endif
+ 
++ifeq ($(strip $(BR2_LINUX_KERNEL_EXT_XENOMAI)),y)
++define KERNEL_EXT_XENOMAI_CONFIG_HACKS
++	cat package/xenomai/xeno-kernel.config >> $(@D)/.config
++endef
++endif
++
+ define LINUX_CONFIGURE_CMDS
+ 	$(ARMADEUS_LINUX_CONFIG_HACKS)
+ 	cp $(KERNEL_SOURCE_CONFIG) $(KERNEL_ARCH_PATH)/configs/buildroot_defconfig
+@@ -159,6 +165,7 @@ define LINUX_CONFIGURE_CMDS
+ 	$(if $(BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_MDEV),
+ 		$(call KCONFIG_SET_OPT,CONFIG_UEVENT_HELPER_PATH,\"/sbin/mdev\",$(@D)/.config))
+ 	yes '' | $(TARGET_MAKE_ENV) $(MAKE1) $(LINUX_MAKE_FLAGS) -C $(@D) oldconfig
++	$(KERNEL_EXT_XENOMAI_CONFIG_HACKS)
+ endef
+ 
+ # Compilation. We make sure the kernel gets rebuilt when the
+Index: buildroot/package/xenomai/adeos-00-compatibility_with_armadeus.patch
+===================================================================
+--- /dev/null
++++ buildroot/package/xenomai/adeos-00-compatibility_with_armadeus.patch
+@@ -0,0 +1,10 @@
++--- a/arch/arm/mach-imx/include/mach/imxfb.h
+++++ b/arch/arm/mach-imx/include/mach/imxfb.h
++@@ -14,7 +14,6 @@
++ #define PCR_BPIX_8	(3 << 25)
++ #define PCR_BPIX_12	(4 << 25)
++ #define PCR_BPIX_16	(4 << 25)
++-#define PCR_BPIX_MASK   (7 << 25)
++ #define PCR_PIXPOL	(1 << 24)
++ #define PCR_FLMPOL	(1 << 23)
++ #define PCR_LPPOL	(1 << 22)
+Index: buildroot/package/xenomai/adeos-01-adeos-prevent_system_freeze_on_mxc_with_gpio_generated_interrupts.patch
+===================================================================
+--- /dev/null
++++ buildroot/package/xenomai/adeos-01-adeos-prevent_system_freeze_on_mxc_with_gpio_generated_interrupts.patch
+@@ -0,0 +1,23 @@
++Corrects Freeze problem with MX2 when Adeos is active and
++application/driver uses interruption on GPIO
++
++Signed-off-by: Gwenhael GOAVEC-MEROU <gw...@tr...>
++
++Index: kernel/arch/arm/plat-mxc/gpio.c
++===================================================================
++--- a/arch/arm/plat-mxc/gpio.c	2009-12-17 22:09:56.000000000 +0100
+++++ b/arch/arm/plat-mxc/gpio.c	2009-12-17 15:45:17.000000000 +0100
++@@ -241,11 +241,11 @@
++ 	int i;
++ 
++ 	for (i = 0; i < gpio_table_size; i++) {
++-		irq_msk = __raw_readl(port->base + GPIO_IMR);
+++		irq_msk = __raw_readl(port[i].base + GPIO_IMR);
++ 		if (!irq_msk)
++ 			continue;
++ 
++-		irq_stat = __raw_readl(port->base + GPIO_ISR) & irq_msk;
+++		irq_stat = __raw_readl(port[i].base + GPIO_ISR) & irq_msk;
++ 
++ 		gpio_irq_no = port[i].virtual_irq_start;
++ 
+Index: buildroot/package/xenomai/xeno-kernel.config
+===================================================================
+--- /dev/null
++++ buildroot/package/xenomai/xeno-kernel.config
+@@ -0,0 +1,69 @@
++CONFIG_XENOMAI=y
++CONFIG_XENO_OPT_NUCLEUS=y
++CONFIG_XENO_OPT_PERVASIVE=y
++# CONFIG_XENO_OPT_ISHIELD is not set
++CONFIG_XENO_OPT_PRIOCPL=y
++CONFIG_XENO_OPT_PIPELINE_HEAD=y
++CONFIG_XENO_OPT_PIPE_NRDEV=32
++CONFIG_XENO_OPT_REGISTRY_NRSLOTS=512
++CONFIG_XENO_OPT_SYS_HEAPSZ=128
++CONFIG_XENO_OPT_SYS_STACKPOOLSZ=32
++CONFIG_XENO_OPT_STATS=y
++# CONFIG_XENO_OPT_DEBUG is not set
++# CONFIG_XENO_OPT_SHIRQ is not set
++CONFIG_XENO_OPT_TIMING_PERIODIC=y
++CONFIG_XENO_OPT_TIMING_SCHEDLAT=0
++# CONFIG_XENO_OPT_SCALABLE_SCHED is not set
++CONFIG_XENO_OPT_TIMER_LIST=y
++# CONFIG_XENO_OPT_TIMER_HEAP is not set
++# CONFIG_XENO_OPT_TIMER_WHEEL is not set
++CONFIG_XENO_HW_FPU=y
++CONFIG_XENO_SKIN_NATIVE=y
++CONFIG_XENO_OPT_NATIVE_BUFFER=y
++# CONFIG_XENO_OPT_NOWARN_DEPRECATED is not set
++CONFIG_XENO_OPT_NATIVE_PERIOD=0
++CONFIG_XENO_OPT_NATIVE_PIPE=y
++CONFIG_XENO_OPT_NATIVE_PIPE_BUFSZ=1024
++CONFIG_XENO_OPT_NATIVE_SEM=y
++CONFIG_XENO_OPT_NATIVE_EVENT=y
++CONFIG_XENO_OPT_NATIVE_MUTEX=y
++CONFIG_XENO_OPT_NATIVE_COND=y
++CONFIG_XENO_OPT_NATIVE_QUEUE=y
++CONFIG_XENO_OPT_NATIVE_HEAP=y
++CONFIG_XENO_OPT_NATIVE_ALARM=y
++CONFIG_XENO_OPT_NATIVE_MPS=y
++CONFIG_XENO_OPT_NATIVE_INTR=y
++CONFIG_XENO_SKIN_POSIX=y
++CONFIG_XENO_OPT_POSIX_PERIOD=0
++# CONFIG_XENO_OPT_POSIX_SHM is not set
++# CONFIG_XENO_OPT_POSIX_INTR is not set
++# CONFIG_XENO_OPT_POSIX_SELECT is not set
++# CONFIG_XENO_OPT_SCHED_CLASSES is not set
++CONFIG_XENO_OPT_SEM_HEAPSZ=12
++CONFIG_XENO_OPT_GLOBAL_SEM_HEAPSZ=12
++# CONFIG_XENO_OPT_DEBUG_POSIX is not set
++CONFIG_XENO_OPT_TIMING_VIRTICK=1000
++CONFIG_XENO_HW_UNLOCKED_SWITCH=y
++# CONFIG_XENO_SKIN_PSOS is not set
++# CONFIG_XENO_SKIN_UITRON is not set
++# CONFIG_XENO_SKIN_VRTX is not set
++# CONFIG_XENO_SKIN_VXWORKS is not set
++# CONFIG_XENO_SKIN_RTAI is not set
++CONFIG_XENO_SKIN_RTDM=y
++CONFIG_XENO_OPT_RTDM_PERIOD=0
++CONFIG_XENO_OPT_RTDM_FILDES=128
++CONFIG_XENO_OPT_RTDM_SELECT=y
++# CONFIG_XENO_DRIVERS_16550A is not set
++# CONFIG_XENO_DRIVERS_ANALOGY is not set
++# CONFIG_XENO_DRIVERS_RTIPC is not set
++CONFIG_XENO_DRIVERS_TIMERBENCH=m
++CONFIG_XENO_DRIVERS_KLATENCY=m
++CONFIG_XENO_DRIVERS_IRQBENCH=m
++# CONFIG_XENO_DRIVERS_SIGTEST is not set
++CONFIG_XENO_DRIVERS_SWITCHTEST=m
++# CONFIG_XENO_DRIVERS_CAN is not set
++# CONFIG_ARM_FCSE is not set
++CONFIG_IPIPE=y
++CONFIG_IPIPE_DOMAINS=4
++CONFIG_IPIPE_COMPAT=y
++# CONFIG_IPIPE_DEBUG is not set
+Index: buildroot/package/xenomai/xenomai.mk
+===================================================================
+--- buildroot.orig/package/xenomai/xenomai.mk
++++ buildroot/package/xenomai/xenomai.mk
+@@ -12,9 +12,17 @@ endif
+ 
+ XENOMAI_SITE = http://download.gna.org/xenomai/stable/
+ XENOMAI_SOURCE = xenomai-$(XENOMAI_VERSION).tar.bz2
++XENOMAI_ADEOS_PATCH = $(call qstrip,$(BR2_LINUX_KERNEL_EXT_XENOMAI_ADEOS_PATCH))
++XENOMAI_ADEOS_SITE = $(call qstrip,$(BR2_LINUX_KERNEL_EXT_XENOMAI_ADEOS_URL))
+ 
+ XENOMAI_INSTALL_STAGING = YES
+ 
++define ADEOS_DOWNLOAD_PATCH
++	$(call DOWNLOAD,$(XENOMAI_ADEOS_SITE),$(XENOMAI_ADEOS_PATCH))
++endef
++
++XENOMAI_POST_DOWNLOAD_HOOKS += ADEOS_DOWNLOAD_PATCH
++
+ ifeq ($(BR2_PACKAGE_XENOMAI_SMP),y)
+ XENOMAI_CONF_OPT += --enable-smp
+ endif


hooks/post-receive
-- 
armadeus

[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-357-gb9e9675

From: Julien B a. A. <ar...@us...> - 2012-06-08 21:08:11

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".

The branch, master has been updated
       via  b9e96756cd7e7b24acd1bb409695254622c79dec (commit)
       via  fe590fd3f4eea2e4e9f99874d7e78302340f0b3f (commit)
      from  51f941bd1de615b76b4ce4e59d97c24591a6bc3a (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit b9e96756cd7e7b24acd1bb409695254622c79dec
Merge: fe590fd 51f941b
Author: Julien Boibessot <jul...@ar...>
Date:   Fri Jun 8 23:07:36 2012 +0200

    Merge branch 'master' of ssh://armadeus.git.sourceforge.net/gitroot/armadeus/armadeus

commit fe590fd3f4eea2e4e9f99874d7e78302340f0b3f
Author: Julien Boibessot <jul...@ar...>
Date:   Fri Jun 8 23:05:40 2012 +0200

    [LINUX] Add PPS51 support

-----------------------------------------------------------------------

Summary of changes:
 Makefile                                           |    1 +
 buildroot/configs/.gitignore                       |    2 +-
 .../configs/{apf51_defconfig => pps51_defconfig}   |   26 +-
 .../armadeus/pps51/pps51-linux-2.6.38.8.config     |    1 +
 .../pps51-linux-2.6.38.config}                     |   35 +-
 ...madeus-pps51-adding_HX8369_display_driver.patch |  417 ++++++++++++++++++++
 .../2.6.38/449-armadeus-add_pps51_baseboard.patch  |  379 ++++++++++++++++++
 7 files changed, 830 insertions(+), 31 deletions(-)
 copy buildroot/configs/{apf51_defconfig => pps51_defconfig} (81%)
 create mode 120000 buildroot/target/device/armadeus/pps51/pps51-linux-2.6.38.8.config
 copy buildroot/target/device/armadeus/{apf51/apf51-linux-3.0.config => pps51/pps51-linux-2.6.38.config} (94%)
 create mode 100644 patches/linux/2.6.38/448-armadeus-pps51-adding_HX8369_display_driver.patch
 create mode 100644 patches/linux/2.6.38/449-armadeus-add_pps51_baseboard.patch

diff --git a/Makefile b/Makefile
index bb7b6af..d49487e 100644
--- a/Makefile
+++ b/Makefile
@@ -68,6 +68,7 @@ help:
 	@echo '  apf27_defconfig    - get default config for an APF27+Dev kit'
 	@echo '  pps_defconfig      - get default config for an APF27+PPS system'
 	@echo '  apf51_defconfig    - get default config for an APF51+Dev kit'
+	@echo '  pps51_defconfig    - get default config for an APF51+PPS51 system'
 	@echo ''
 	@echo 'Build:'
 	@echo '  all                - make world '
diff --git a/buildroot/configs/.gitignore b/buildroot/configs/.gitignore
index 40d884f..0f18ac2 100644
--- a/buildroot/configs/.gitignore
+++ b/buildroot/configs/.gitignore
@@ -1,3 +1,3 @@
 *_defconfig
 !/apf*
-!/pps_defconfig
+!/pps*_defconfig
diff --git a/buildroot/configs/apf51_defconfig b/buildroot/configs/pps51_defconfig
similarity index 81%
copy from buildroot/configs/apf51_defconfig
copy to buildroot/configs/pps51_defconfig
index a214580..18792d5 100644
--- a/buildroot/configs/apf51_defconfig
+++ b/buildroot/configs/pps51_defconfig
@@ -7,6 +7,7 @@ BR2_SOURCEFORGE_MIRROR="switch"
 BR2_JLEVEL=1
 BR2_CCACHE=y
 BR2_STRIP_sstrip=y
+BR2_OPTIMIZE_2=y
 BR2_KERNEL_HEADERS_VERSION=y
 BR2_DEFAULT_KERNEL_VERSION="2.6.38.8"
 BR2_UCLIBC_CONFIG="target/device/armadeus/uClibc-$(BR2_UCLIBC_VERSION_STRING).config"
@@ -15,7 +16,7 @@ BR2_PACKAGE_GDB_HOST=y
 BR2_ENABLE_LOCALE_PURGE=y
 BR2_ENABLE_LOCALE_WHITELIST="C en_US"
 # BR2_SOFT_FLOAT is not set
-BR2_TARGET_OPTIMIZATION="-Os -pipe"
+BR2_TARGET_OPTIMIZATION="-O2 -pipe"
 BR2_TOOLCHAIN_BUILDROOT_LARGEFILE=y
 BR2_TOOLCHAIN_BUILDROOT_INET_IPV6=y
 BR2_TOOLCHAIN_BUILDROOT_INET_RPC=y
@@ -31,7 +32,7 @@ BR2_ROOTFS_SKELETON_CUSTOM_PATH="$(ARMADEUS_PATH)/rootfs/target_skeleton"
 BR2_TARGET_GENERIC_GETTY_PORT="ttymxc2"
 BR2_ROOTFS_POST_BUILD_SCRIPT="$(ARMADEUS_PATH)/rootfs/post_build.sh"
 BR2_TARGET_ARMADEUS=y
-BR2_BOARD_NAME="apf51"
+BR2_BOARD_NAME="pps51"
 BR2_CPU_NAME="imx51"
 BR2_TARGET_ARMADEUS_SDRAM_SIZE="256"
 BR2_PACKAGE_BUSYBOX_CONFIG="$(ARMADEUS_PATH)/busybox-$(BR2_BUSYBOX_VERSION).config"
@@ -39,12 +40,16 @@ BR2_PACKAGE_FPGAREGS=y
 BR2_PACKAGE_ARMADEUS_FPGA_FIRMWARE=y
 BR2_PACKAGE_ARMADEUS_FPGA_FIRMWARE_APF51_DUAL_UART=y
 BR2_PACKAGE_IMXREGS=y
+BR2_PACKAGE_ARMADEUS_TESTSUITE=y
+BR2_PACKAGE_ARMADEUS_PPS_UTILITIES=y
+BR2_PACKAGE_ARMADEUS_PPS_TEST_SCRIPTS=y
 BR2_PACKAGE_TFP410CTRL=y
 BR2_PACKAGE_ALSA_UTILS=y
 BR2_PACKAGE_ALSA_UTILS_AMIXER=y
 BR2_PACKAGE_ALSA_UTILS_APLAY=y
 BR2_PACKAGE_ALSA_UTILS_SPEAKER_TEST=y
 BR2_PACKAGE_STRACE=y
+BR2_PACKAGE_FBTEST=y
 BR2_PACKAGE_FBV=y
 BR2_PACKAGE_DBUS=y
 BR2_PACKAGE_FIRMWARE=y
@@ -71,17 +76,12 @@ BR2_TARGET_ROOTFS_UBIFS=y
 BR2_TARGET_ROOTFS_UBIFS_MAXLEBCNT=135301
 BR2_TARGET_ROOTFS_UBI=y
 BR2_TARGET_UBOOT=y
-BR2_TARGET_UBOOT_BOARDNAME="$(BR2_BOARD_NAME)"
-BR2_TARGET_UBOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2011.12.h"
-BR2_TARGET_UBOOT_CUSTOM_TARBALL=y
-BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2011.12.tar.bz2"
-BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2011.12"
-BR2_TARGET_UBOOT_FORMAT_NAND_BIN=y
-BR2_TARGET_UBOOT_NETWORK=y
-BR2_TARGET_UBOOT_SERVERIP="192.168.0.2"
-BR2_TARGET_UBOOT_IPADDR="192.168.0.10"
-BR2_TARGET_UBOOT_GATEWAY="192.168.0.1"
-BR2_TARGET_UBOOT_ETHADDR=""
+BR2_TARGET_UBOOT_BOARDNAME="apf51"
+BR2_TARGET_U_BOOT_CONFIG_HEADER_FILE="$(ARMADEUS_PATH)/apf51/apf51-u-boot-2010.03.h"
+BR2_TARGET_UBOOT_2010_03=y
+BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/$(BR2_TARGET_UBOOT_VERSION)/"
+BR2_TARGET_UBOOT_TOOL_ENV=y
+# BR2_TARGET_UBOOT_NETWORK is not set
 BR2_LINUX_KERNEL=y
 BR2_LINUX_KERNEL_CUSTOM_VERSION=y
 BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="2.6.38.8"
diff --git a/buildroot/target/device/armadeus/pps51/pps51-linux-2.6.38.8.config b/buildroot/target/device/armadeus/pps51/pps51-linux-2.6.38.8.config
new file mode 120000
index 0000000..873d682
--- /dev/null
+++ b/buildroot/target/device/armadeus/pps51/pps51-linux-2.6.38.8.config
@@ -0,0 +1 @@
+pps51-linux-2.6.38.config
\ No newline at end of file
diff --git a/buildroot/target/device/armadeus/apf51/apf51-linux-3.0.config b/buildroot/target/device/armadeus/pps51/pps51-linux-2.6.38.config
similarity index 94%
copy from buildroot/target/device/armadeus/apf51/apf51-linux-3.0.config
copy to buildroot/target/device/armadeus/pps51/pps51-linux-2.6.38.config
index 21eb398..7cefd7c 100644
--- a/buildroot/target/device/armadeus/apf51/apf51-linux-3.0.config
+++ b/buildroot/target/device/armadeus/pps51/pps51-linux-2.6.38.config
@@ -5,6 +5,7 @@ CONFIG_SYSVIPC=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_EMBEDDED=y
 # CONFIG_COMPAT_BRK is not set
 CONFIG_SLAB=y
@@ -15,8 +16,9 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_IOSCHED_CFQ is not set
 CONFIG_ARCH_MXC=y
-CONFIG_ARCH_MX51=y
+CONFIG_ARCH_MX5=y
 CONFIG_MACH_APF51=y
+CONFIG_MACH_APF51_PPS=y
 CONFIG_ARM_THUMBEE=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
@@ -25,6 +27,7 @@ CONFIG_AEABI=y
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_DEBUG=y
 CONFIG_CPU_FREQ_STAT_DETAILS=y
 CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
 CONFIG_CPU_FREQ_GOV_POWERSAVE=y
@@ -35,9 +38,11 @@ CONFIG_CPU_IDLE=y
 CONFIG_VFP=y
 CONFIG_NEON=y
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_PM_RUNTIME=y
+CONFIG_PM=y
 CONFIG_PM_DEBUG=y
+CONFIG_PM_VERBOSE=y
 CONFIG_APM_EMULATION=y
+CONFIG_PM_RUNTIME=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
@@ -54,10 +59,12 @@ CONFIG_CAN=m
 CONFIG_CAN_RAW=m
 CONFIG_CAN_BCM=m
 CONFIG_CAN_VCAN=m
+CONFIG_CAN_DEV=m
+CONFIG_CAN_CALC_BITTIMING=y
 CONFIG_CAN_MCP251X=m
 CONFIG_BT=m
-CONFIG_BT_L2CAP=y
-CONFIG_BT_SCO=y
+CONFIG_BT_L2CAP=m
+CONFIG_BT_SCO=m
 CONFIG_BT_RFCOMM=m
 CONFIG_BT_RFCOMM_TTY=y
 CONFIG_BT_BNEP=m
@@ -74,6 +81,7 @@ CONFIG_DEVTMPFS=y
 CONFIG_DEVTMPFS_MOUNT=y
 CONFIG_FW_LOADER=m
 CONFIG_MTD=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
@@ -96,6 +104,7 @@ CONFIG_NETDEVICES=y
 CONFIG_MII=y
 CONFIG_SMSC_PHY=y
 CONFIG_NET_ETHERNET=y
+CONFIG_FEC=y
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
 CONFIG_RTL8187=m
@@ -104,6 +113,8 @@ CONFIG_LIBERTAS_SDIO=m
 CONFIG_RT2X00=m
 CONFIG_RT73USB=m
 CONFIG_ZD1211RW=m
+CONFIG_USB_USBNET=m
+CONFIG_USB_NET_SMSC95XX=m
 CONFIG_PPP=m
 CONFIG_PPP_ASYNC=m
 CONFIG_INPUT_JOYDEV=y
@@ -115,10 +126,10 @@ CONFIG_TOUCHSCREEN_WM831X=y
 CONFIG_INPUT_MISC=y
 CONFIG_INPUT_UINPUT=m
 CONFIG_INPUT_WM831X_ON=y
-# CONFIG_LEGACY_PTYS is not set
 CONFIG_SERIAL_8250=m
 CONFIG_SERIAL_IMX=y
 CONFIG_SERIAL_IMX_CONSOLE=y
+# CONFIG_LEGACY_PTYS is not set
 # CONFIG_HW_RANDOM is not set
 CONFIG_I2C=y
 CONFIG_I2C_CHARDEV=y
@@ -174,18 +185,6 @@ CONFIG_FONT_8x8=y
 CONFIG_LOGO=y
 # CONFIG_LOGO_LINUX_MONO is not set
 # CONFIG_LOGO_LINUX_VGA16 is not set
-CONFIG_SOUND=m
-# CONFIG_SOUND_OSS_CORE_PRECLAIM is not set
-CONFIG_SND=m
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_ARM is not set
-# CONFIG_SND_SPI is not set
-# CONFIG_SND_USB is not set
-CONFIG_SND_SOC=m
-CONFIG_SND_IMX_SOC=m
-CONFIG_SND_SOC_APF51_DEV_WM8960=m
 CONFIG_USB=y
 CONFIG_USB_DEBUG=y
 CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
@@ -229,6 +228,7 @@ CONFIG_RTC_CLASS=y
 CONFIG_RTC_MXC=y
 CONFIG_RTC_DRV_WM831X=y
 CONFIG_STAGING=y
+# CONFIG_STAGING_EXCLUDE_BUILD is not set
 CONFIG_IIO=m
 CONFIG_MCP49x2=m
 # CONFIG_MXC_HWEVENT is not set
@@ -266,5 +266,6 @@ CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_CODEPAGE_850=y
 CONFIG_NLS_ISO8859_1=y
 CONFIG_DEBUG_FS=y
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 # CONFIG_CRYPTO_HW is not set
diff --git a/patches/linux/2.6.38/448-armadeus-pps51-adding_HX8369_display_driver.patch b/patches/linux/2.6.38/448-armadeus-pps51-adding_HX8369_display_driver.patch
new file mode 100644
index 0000000..7bcdc0e
--- /dev/null
+++ b/patches/linux/2.6.38/448-armadeus-pps51-adding_HX8369_display_driver.patch
@@ -0,0 +1,417 @@
+Index: linux-2.6.38.8/drivers/video/display/hx8369.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.38.8/drivers/video/display/hx8369.c	2011-12-15 09:35:04.000000000 +0100
+@@ -0,0 +1,262 @@
++/*
++ * Display Driver for hx8369 controler for AMOLED
++ *
++ * Copyright (c) 2009-2012 Armadeus systems / Author: F. Marteau
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ */
++
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/platform_device.h>
++#include <linux/mutex.h>
++#include <linux/fb.h>
++#include <linux/delay.h>
++
++#include <linux/display.h>
++#include <linux/spi/spi.h>
++
++#include <linux/version.h>
++#include <mach/imxfb.h>	/* Backlight machinfo struct is defined here */
++#include <mach/hardware.h>
++
++#include <video/hx8369.h>
++
++#define DRIVER_NAME	"hx8369-display"
++#define DRIVER_VERSION "0.3"
++
++/* write value hx8369 display register via SPI */
++void hx8369_write(struct hx8369_display *hx8369_dev, u8 address, u16 data)
++{
++	struct spi_message	message;
++	struct spi_transfer	x[1];
++	int i;
++	u8	cmd_send;
++	unsigned char buf[64];
++	unsigned char buf_read[64];
++
++	cmd_send = address;
++
++	spi_message_init(&message);
++	memset(x, 0, sizeof x);
++	memset(buf, 0, sizeof(buf));
++	memset(buf_read, 0, sizeof(buf_read));
++
++	buf[0] = 0;
++	for (i = 1; i < 9; i++) {
++		buf[i] = ((cmd_send & 0x80)>>7);
++		cmd_send = cmd_send << 1;
++	}
++	buf[9] = 1;
++
++	cmd_send = data;
++
++	for (i = 10; i < 18; i++) {
++		buf[i] = ((cmd_send & 0x80)>>7);
++		cmd_send = cmd_send << 1;
++	}
++
++	x[0].tx_buf = buf;
++	x[0].len = 18;
++	x[0].rx_buf = buf_read;
++	x[0].speed_hz = 1000000;
++	x[0].bits_per_word = 1;
++	spi_message_add_tail(&x[0], &message);
++
++	spi_sync(hx8369_dev->spi, &message);
++}
++
++u8 hx8369_read(struct hx8369_display *hx8369_dev, u8 address)
++{
++	struct spi_message	message;
++	struct spi_transfer	x[1];
++	int status, i;
++	u8	cmd_send;
++	unsigned char buf[64];
++	unsigned char buf_read[64];
++	int ret_value=0;
++
++	cmd_send = address;
++
++	spi_message_init(&message);
++	memset(x, 0, sizeof x);
++	memset(buf, 0, sizeof(buf));
++	memset(buf_read, 0, sizeof(buf_read));
++
++	buf[0] = 0;
++	for (i = 1; i < 9; i++) {
++		buf[i] = ((cmd_send & 0x80)>>7);
++		cmd_send = cmd_send << 1;
++	}
++
++	x[0].tx_buf = buf;
++	x[0].len = 17;
++	x[0].rx_buf = buf_read;
++	x[0].speed_hz = 1000000;
++	x[0].bits_per_word = 1;
++	spi_message_add_tail(&x[0], &message);
++
++	status = spi_sync(hx8369_dev->spi, &message);
++	if (status < 0)
++		return status;
++
++	for (i = 0; i < 17 ; i++) {
++		ret_value = ret_value << 1;
++		ret_value = ret_value | (buf_read[i]&0x01);
++	}
++
++	return (u8)ret_value;
++}
++
++static int hx8369_display_get_contrast(struct display_device *dev)
++{
++	struct hx8369_display *hx8369_dev = dev->priv_data;
++
++	return hx8369_dev->gcontrast_value;
++}
++
++static int hx8369_display_set_contrast(struct display_device *dev, unsigned int value)
++{
++	return value;
++}
++
++static int hx8369_display_probe(struct display_device *dev, void *data)
++{
++	return 1;
++}
++
++static int hx8369_display_remove(struct display_device *dev)
++{
++	return 0;
++}
++
++#ifdef CONFIG_PM
++static void hx8369_display_suspend(struct display_device *dev, pm_message_t state)
++{
++}
++
++static void hx8369_display_resume(struct display_device *dev)
++{
++}
++#else
++#define hx8369_display_suspend	NULL
++#define hx8369_display_resume	NULL
++#endif /* CONFIG_PM */
++
++static struct display_driver hx8369_ops = {
++	.get_contrast 	= hx8369_display_get_contrast,
++	.set_contrast 	= hx8369_display_set_contrast,
++	.probe	 	= hx8369_display_probe,
++	.suspend	= hx8369_display_suspend,
++	.resume		= hx8369_display_resume,
++	.remove		= hx8369_display_remove,
++	.max_contrast	= 63,
++};
++
++
++static void hx8369_init_sequence(struct hx8369_display *hx8369_dev)
++{
++	/* initial procedure for 24-bit parallel RGB (DE) */
++	hx8369_write(hx8369_dev, HX8369_DISPON, 0);
++	hx8369_write(hx8369_dev, HX8369_SLPOUT, 0);
++}
++
++static int hx8369_spi_probe(struct spi_device *pdev)
++{
++	int err = -EINVAL;
++	struct display_device *disp_dev;
++	struct hx8369_display *hx8369_dev = pdev->dev.platform_data;
++
++	/* fill hx8369 display structure */
++	disp_dev = display_device_register(&hx8369_ops,
++					&pdev->dev,
++					hx8369_dev);
++	if (disp_dev == NULL)
++		goto display_device_error;
++	disp_dev->priv_data = hx8369_dev;
++	hx8369_dev->display_dev = disp_dev;
++	hx8369_dev->spi = pdev;
++
++	/* configure spi */
++	hx8369_dev->spi->mode = SPI_MODE_0;
++	hx8369_dev->spi->bits_per_word = 1;
++	hx8369_dev->spi->dev.power.power_state = PMSG_ON;
++	err = spi_setup(hx8369_dev->spi);
++	if (err < 0)
++		goto spi_error;
++
++	hx8369_init_sequence(hx8369_dev);
++
++	return 0;
++
++spi_error:
++	printk("ERROR: can't setup spi for hx8369\n");
++	display_device_unregister(hx8369_dev->display_dev);
++display_device_error:
++	printk("ERROR: can't register display device\n");
++	return err;
++}
++
++static int hx8369_spi_remove(struct spi_device *pdev)
++{
++	struct hx8369_display *hx8369_dev = pdev->dev.platform_data;
++
++	hx8369_dev->reset_on(1); /* let hx8369 in reset */
++	display_device_unregister(hx8369_dev->display_dev);
++
++	return 0;
++}
++
++#ifdef CONFIG_PM
++static int hx8369_spi_suspend(struct spi_device *dev, pm_message_t state)
++{
++	return 0;
++}
++
++static int hx8369_spi_resume(struct spi_device *dev)
++{
++	return 0;
++}
++#else
++#define hx8369_suspend	NULL
++#define hx8369_resume	NULL
++#endif
++
++static void hx8369_spi_shutdown(struct spi_device *spi)
++{
++
++}
++
++static struct spi_driver hx8369_driver = {
++	.probe		= hx8369_spi_probe,
++	.remove		= hx8369_spi_remove,
++	.shutdown	= hx8369_spi_shutdown,
++	.suspend	= hx8369_spi_suspend,
++	.resume		= hx8369_spi_resume,
++	.driver		= {
++		.name	= DRIVER_NAME,
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init hx8369_init(void)
++{
++	return spi_register_driver(&hx8369_driver);
++}
++
++static void __exit hx8369_exit(void)
++{
++	spi_unregister_driver(&hx8369_driver);
++}
++
++module_init(hx8369_init);
++module_exit(hx8369_exit);
++
++MODULE_AUTHOR("Fabien Marteau <fab...@ar...");
++MODULE_DESCRIPTION("HX8369 display Driver");
++MODULE_LICENSE("GPL");
++
+Index: linux-2.6.38.8/drivers/video/display/Kconfig
+===================================================================
+--- linux-2.6.38.8.orig/drivers/video/display/Kconfig	2011-12-08 09:39:26.000000000 +0100
++++ linux-2.6.38.8/drivers/video/display/Kconfig	2011-12-08 09:50:38.000000000 +0100
+@@ -5,6 +5,7 @@
+ menu "Display device support"
+ 
+ config DISPLAY_SUPPORT
++	default y
+ 	tristate "Display panel/monitor support"
+ 	---help---
+ 	  This framework adds support for low-level control of a display.
+@@ -21,4 +22,12 @@
+ comment "Display hardware drivers"
+ 	depends on DISPLAY_SUPPORT
+ 
++config HX8369_DISPLAY
++	tristate "HX8369 display driver"
++	default y
++	depends on DISPLAY_SUPPORT
++	---help---
++	  This driver allows you to control the contrast of
++	  HX5116 based AMOLED screen.
++
+ endmenu
+Index: linux-2.6.38.8/drivers/video/display/Makefile
+===================================================================
+--- linux-2.6.38.8.orig/drivers/video/display/Makefile	2011-12-08 09:41:18.000000000 +0100
++++ linux-2.6.38.8/drivers/video/display/Makefile	2011-12-08 09:41:54.000000000 +0100
+@@ -3,4 +3,5 @@
+ display-objs				:= display-sysfs.o
+ 
+ obj-$(CONFIG_DISPLAY_SUPPORT)		+= display.o
++obj-$(CONFIG_HX8369_DISPLAY)		+= hx8369.o
+ 
+Index: linux-2.6.38.8/include/video/hx8369.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.38.8/include/video/hx8369.h	2011-12-15 09:35:21.000000000 +0100
+@@ -0,0 +1,110 @@
++/*
++ *
++ * HX8369 Single Chip Driver
++ *
++ *  Copyright 2011-2012 Armadeus systems
++ *  Authors:
++ *  Fabien Marteau <fab...@ar...>
++ *  Nicolas Colombain <nic...@ar...>
++ *
++ *  http://www.armadeus.com/
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#define HX8369_REG(x)	(x)
++
++/***********************/
++/* Standards registers */
++/***********************/
++#define HX8369_NOP		HX8369_REG(0x00)
++#define HX8369_SWRESET		HX8369_REG(0x01)
++#define HX8369_RDNUMPE		HX8369_REG(0x05)
++#define HX8369_RDRED		HX8369_REG(0x06)
++#define HX8369_RDGREEN		HX8369_REG(0x07)
++#define HX8369_RDBLUE		HX8369_REG(0x08)
++#define HX8369_RDDPM		HX8369_REG(0x0A)
++#define HX8369_RDDMADCTL	HX8369_REG(0x0B)
++#define HX8369_RDDCOLMOD	HX8369_REG(0x0C)
++#define HX8369_RDDIM		HX8369_REG(0x0D)
++#define HX8369_RDDSM		HX8369_REG(0x0E)
++#define HX8369_RDDSDR		HX8369_REG(0x0F)
++
++#define HX8369_SLPIN		HX8369_REG(0x10)
++#define HX8369_SLPOUT		HX8369_REG(0x11)
++#define HX8369_PTLON		HX8369_REG(0x12)
++#define HX8369_NORON		HX8369_REG(0x13)
++#define HX8369_INVOFF		HX8369_REG(0x20)
++#define HX8369_INVON		HX8369_REG(0x21)
++#define HX8369_GAMSET		HX8369_REG(0x26)
++#define HX8369_DISPOFF		HX8369_REG(0x28)
++#define HX8369_DISPON		HX8369_REG(0x29)
++#define HX8369_CASET		HX8369_REG(0x2A)
++#define HX8369_PASET		HX8369_REG(0x2B)
++#define	HX8369_RAMWR		HX8369_REG(0x2C)
++#define HX8369_RGBSET		HX8369_REG(0x2D)
++#define HX8369_RAMRD		HX8369_REG(0x2E)
++#define HX8369_PLTAR		HX8369_REG(0x30)
++
++#define HX8369_VSCRDEF		HX8369_REG(0x33)
++#define HX8369_TEOFF		HX8369_REG(0x34)
++#define HX8369_TEON		HX8369_REG(0x35)
++#define HX8369_MADCTL		HX8369_REG(0x36)
++#define HX8369_VSCRSADD		HX8369_REG(0x37)
++#define HX8369_IDMOFF		HX8369_REG(0x38)
++#define HX8369_IDMON		HX8369_REG(0x39)
++#define HX8369_COLMOD 		HX8369_REG(0x3A)
++#define HX8369_RAMWRCON		HX8369_REG(0x3C)
++#define HX8369_RAMRDCON		HX8369_REG(0x3E)
++#define HX8369_TESL		HX8369_REG(0x44)
++#define HX8369_GETSCAN		HX8369_REG(0x45)
++#define HX8369_WRDISBV		HX8369_REG(0x51)
++#define HX8369_RDDISBV		HX8369_REG(0x52)
++#define HX8369_WRCTRLD		HX8369_REG(0x53)
++#define HX8369_RDCTRLD		HX8369_REG(0x54)
++#define HX8369_WRCABC 		HX8369_REG(0x55)
++#define HX8369_RDCABC 		HX8369_REG(0x56)
++
++#define HX8369_WRCABCMB			HX8369_REG(0x5E)
++#define HX8369_RDCABCMB			HX8369_REG(0x5F)
++#define HX8369_RDABCSDR			HX8369_REG(0x68)
++#define HX8369_RDID1 			HX8369_REG(0xDA)
++#define HX8369_RDID2 			HX8369_REG(0xDB)
++#define HX8369_RDID3 			HX8369_REG(0xDC)
++#define HX8369_READ_DDB_START		HX8369_REG(0xA1)
++#define HX8369_READ_DDB_CONTINUE	HX8369_REG(0xA8)
++
++#define HX8369_SETOSC		HX8369_REG(0xB0)
++#define HX8369_SETPOWE		HX8369_REG(0xB1)
++#define HX8369_SETDISP		HX8369_REG(0xB2)
++#define HX8369_SETRGBIF		HX8369_REG(0xB3)
++#define HX8369_SETCYC		HX8369_REG(0xB4)
++#define HX8369_SETVCOM		HX8369_REG(0xB6)
++#define HX8369_SETEXTC		HX8369_REG(0xB9)
++#define HX8369_SETMIPI		HX8369_REG(0xBA)
++#define HX8369_SETOTP		HX8369_REG(0xBB)
++#define HX8369_SETDGCLUT	HX8369_REG(0xC1)
++#define HX8369_SETID		HX8369_REG(0xC3)
++#define HX8369_SETPANEL		HX8369_REG(0xCC)
++#define HX8369_SETGIP		HX8369_REG(0xD5)
++
++#define HX8369_SETTPSNR		HX8369_REX(0xD8)
++#define HX8369_SETGAMMA		HX8369_REX(0xE0)
++#define HX8369_SETOTPKEY	HX8369_REX(0xE9)
++#define HX8369_GETHXID		HX8369_REX(0xF4)
++#define HX8369_SETCNCD_GETCNCD	HX8369_REX(0xFD)
++#define HX8369_SET_READ_INDEX	HX8369_REX(0xFE)
++#define HX8369_GETSPIREAD  	HX8369_REX(0xFF)
++
++
++/* platform data to pass configuration from lcd */
++struct hx8369_display {
++	struct  display_device *display_dev;
++	struct  spi_device *spi;  /* spi bus */
++	void	(*reset_on)(int); /* function that let hx8369 on reset */
++	int	gcontrast_value;  /* current contrast value */
++};
++
++
diff --git a/patches/linux/2.6.38/449-armadeus-add_pps51_baseboard.patch b/patches/linux/2.6.38/449-armadeus-add_pps51_baseboard.patch
new file mode 100644
index 0000000..0328dfe
--- /dev/null
+++ b/patches/linux/2.6.38/449-armadeus-add_pps51_baseboard.patch
@@ -0,0 +1,379 @@
+Add APF51_PPS baseboard support.
+
+Signed-off-by: Julien Boibessot <jul...@ar...>
+Signed-off-by: Fabien Marteau <fab...@ar...> 
+
+Index: linux-2.6.38.8/arch/arm/mach-mx5/Kconfig
+===================================================================
+--- linux-2.6.38.8.orig/arch/arm/mach-mx5/Kconfig	2011-12-15 10:13:07.000000000 +0100
++++ linux-2.6.38.8/arch/arm/mach-mx5/Kconfig	2011-12-15 10:33:32.000000000 +0100
+@@ -197,6 +197,18 @@
+ 	  This selects the APF51Dev as baseboard and adds board's specific
+ 	  devices.
+ 
++config MACH_APF51_PPS
++	prompt "Armadeus systems APF51_PPS development board"
++	bool
++	select MACH_APF51_HAS_BASEBOARD
++	select IMX_HAVE_PLATFORM_IMX_IPUV3
++	select IMX_HAVE_PLATFORM_SPI_IMX
++	select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
++	select IMX_HAVE_PLATFORM_IMX_SSI
++	help
++	  This selects the APF51_PPS as baseboard and adds board's specific
++	  devices.
++
+ config MACH_APF51_PROTO
+ 	prompt "Armadeus systems APF51Proto development board"
+ 	bool
+Index: linux-2.6.38.8/arch/arm/mach-mx5/Makefile
+===================================================================
+--- linux-2.6.38.8.orig/arch/arm/mach-mx5/Makefile	2011-12-15 10:13:07.000000000 +0100
++++ linux-2.6.38.8/arch/arm/mach-mx5/Makefile	2011-12-15 10:33:32.000000000 +0100
+@@ -10,6 +10,7 @@
+ obj-$(CONFIG_CPU_FREQ_IMX)    += cpu_op-mx51.o
+ obj-$(CONFIG_MACH_APF51) += board-apf51.o
+ obj-$(CONFIG_MACH_APF51_DEV) += apf51dev-baseboard.o
++obj-$(CONFIG_MACH_APF51_PPS) += apf51pps-baseboard.o
+ obj-$(CONFIG_MACH_APF51_PROTO) += apf51proto-baseboard.o
+ obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o
+ obj-$(CONFIG_MACH_MX51_3DS) += board-mx51_3ds.o
+Index: linux-2.6.38.8/arch/arm/mach-mx5/apf51pps-baseboard.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.38.8/arch/arm/mach-mx5/apf51pps-baseboard.c	2011-12-15 13:48:19.000000000 +0100
+@@ -0,0 +1,334 @@
++ /*
++ * Support for APF51's PPS baseboard (APF51_PPS)
++ *
++ * Copyright (C) 2011 Armadeus systems <su...@ar...>
++ *
++ * Based on code which is:
++ * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
++ * Copyright (C) 2009-2010 Amit Kucheria <ami...@ca...>
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++#include <linux/gpio.h>
++#include <linux/platform_device.h>
++#include <linux/io.h>
++#include <linux/spi/spi.h>
++#include <linux/fb.h>
++#include <linux/mfd/imx-ipu-v3.h>
++#include <linux/delay.h>
++#include <mach/iomux-mx51.h>
++#include <mach/ipu-v3.h>
++#include <mach/i2c.h>
++#include <linux/can/platform/mcp251x.h>
++
++#include <linux/debugfs.h>
++#include <linux/seq_file.h>
++
++#include <video/hx8369.h>
++
++#include "devices-imx51.h"
++#include "devices.h"
++#include "cpu_op-mx51.h"
++
++#define APF51_GPIO_SPECIAL_PAD_CTRL (PAD_CTL_DSE_HIGH | PAD_CTL_PKE | PAD_CTL_SRE_FAST | PAD_CTL_PUE)
++
++#define APF51_SDHCI_PAD_CTRL	(PAD_CTL_PKE | PAD_CTL_DSE_MED | \
++				PAD_CTL_PUS_47K_UP | PAD_CTL_PUE | \
++				PAD_CTL_SRE_FAST | PAD_CTL_DVS)
++
++#define APF51_LCD_PAD_CTRL (PAD_CTL_SRE_SLOW | PAD_CTL_DSE_MED)
++
++static iomux_v3_cfg_t pps51_pads[] = {
++	/* SD1 */
++	(_MX51_PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(APF51_SDHCI_PAD_CTRL)),
++	(_MX51_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(APF51_SDHCI_PAD_CTRL)),
++	(_MX51_PAD_SD1_DATA0__SD1_DATA0 | MUX_PAD_CTRL(APF51_SDHCI_PAD_CTRL)),
++	(_MX51_PAD_SD1_DATA1__SD1_DATA1 | MUX_PAD_CTRL(APF51_SDHCI_PAD_CTRL)),
++	(_MX51_PAD_SD1_DATA2__SD1_DATA2 | MUX_PAD_CTRL(APF51_SDHCI_PAD_CTRL)),
++	(_MX51_PAD_SD1_DATA3__SD1_DATA3 | MUX_PAD_CTRL(APF51_SDHCI_PAD_CTRL)),
++	(_MX51_PAD_EIM_CS4__GPIO2_29 | MUX_PAD_CTRL(APF51_GPIO_SPECIAL_PAD_CTRL)),
++	(_MX51_PAD_GPIO1_1__GPIO1_1 | MUX_PAD_CTRL(PAD_CTL_DSE_HIGH | PAD_CTL_PKE | 
++		PAD_CTL_SRE_FAST | PAD_CTL_PUE | PAD_CTL_PUS_100K_DOWN)),
++
++	/* SD2 (WiFi) */
++	(_MX51_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(APF51_SDHCI_PAD_CTRL)),
++	(_MX51_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(APF51_SDHCI_PAD_CTRL)),
++	(_MX51_PAD_SD2_DATA0__SD2_DATA0 | MUX_PAD_CTRL(APF51_SDHCI_PAD_CTRL)),
++	(_MX51_PAD_SD2_DATA1__SD2_DATA1 | MUX_PAD_CTRL(APF51_SDHCI_PAD_CTRL)),
++	(_MX51_PAD_SD2_DATA2__SD2_DATA2 | MUX_PAD_CTRL(APF51_SDHCI_PAD_CTRL)),
++	(_MX51_PAD_SD2_DATA3__SD2_DATA3 | MUX_PAD_CTRL(APF51_SDHCI_PAD_CTRL)),
++
++	/* SD2 Detect */
++	(_MX51_PAD_AUD3_BB_CK__GPIO4_20 | MUX_PAD_CTRL(APF51_GPIO_SPECIAL_PAD_CTRL)),
++
++
++	(_MX51_PAD_CSPI1_SS1__GPIO4_25 | MUX_PAD_CTRL(APF51_GPIO_SPECIAL_PAD_CTRL)), /* WIFI_PWRDN# */
++	(_MX51_PAD_CSPI1_RDY__GPIO4_26 | MUX_PAD_CTRL(APF51_GPIO_SPECIAL_PAD_CTRL)), /* WIFI_RESET# */
++
++	/* UART3 (DEBUG)  */
++	MX51_PAD_UART3_RXD__UART3_RXD,
++	MX51_PAD_UART3_TXD__UART3_TXD,
++	/* UART2 (Bluetooth) */
++	MX51_PAD_UART2_RXD__UART2_RXD,
++	MX51_PAD_UART2_TXD__UART2_TXD,
++	MX51_PAD_EIM_D25__UART2_CTS,
++	MX51_PAD_EIM_D26__UART2_RTS,
++
++	(_MX51_PAD_AUD3_BB_RXD__GPIO4_19 | MUX_PAD_CTRL(APF51_GPIO_SPECIAL_PAD_CTRL)), /* BT_RESET# */
++
++	/* UART1 */
++	MX51_PAD_UART1_RXD__UART1_RXD,
++	MX51_PAD_UART1_TXD__UART1_TXD,
++	MX51_PAD_UART1_RTS__UART1_RTS,
++	MX51_PAD_UART1_CTS__UART1_CTS,
++
++	/* eCSPI1 */
++	MX51_PAD_CSPI1_MISO__ECSPI1_MISO,
++	MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI,
++	MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,
++	(_MX51_PAD_CSPI1_SS0__GPIO4_24 | MUX_PAD_CTRL(APF51_GPIO_SPECIAL_PAD_CTRL)),
++	(_MX51_PAD_CSPI1_SS1__GPIO4_25 | MUX_PAD_CTRL(APF51_GPIO_SPECIAL_PAD_CTRL)),
++
++	/* eCSPI2 */
++	MX51_PAD_NANDF_RB2__ECSPI2_SCLK,
++	MX51_PAD_NANDF_RB3__ECSPI2_MISO,
++	MX51_PAD_NANDF_D15__ECSPI2_MOSI,
++	(_MX51_PAD_NANDF_D12__GPIO3_28 | MUX_PAD_CTRL(APF51_GPIO_SPECIAL_PAD_CTRL)),	/* SS1 */
++	(_MX51_PAD_NANDF_D13__GPIO3_27 | MUX_PAD_CTRL(APF51_GPIO_SPECIAL_PAD_CTRL)),	/* SS2 */
++
++	/* Display */
++	(_MX51_PAD_DISP1_DAT0__DISP1_DAT0 | MUX_PAD_CTRL(APF51_LCD_PAD_CTRL)),
++	(_MX51_PAD_DISP1_DAT1__DISP1_DAT1 | MUX_PAD_CTRL(APF51_LCD_PAD_CTRL)),
++	(_MX51_PAD_DISP1_DAT2__DISP1_DAT2 | MUX_PAD_CTRL(APF51_LCD_PAD_CTRL)),
++	(_MX51_PAD_DISP1_DAT3__DISP1_DAT3 | MUX_PAD_CTRL(APF51_LCD_PAD_CTRL)),
++	(_MX51_PAD_DISP1_DAT4__DISP1_DAT4 | MUX_PAD_CTRL(APF51_LCD_PAD_CTRL)),
++	(_MX51_PAD_DISP1_DAT5__DISP1_DAT5 | MUX_PAD_CTRL(APF51_LCD_PAD_CTRL)),
++	(_MX51_PAD_DISP1_DAT6__DISP1_DAT6 | MUX_PAD_CTRL(APF51_LCD_PAD_CTRL)),
++	(_MX51_PAD_DISP1_DAT7__DISP1_DAT7 | MUX_PAD_CTRL(APF51_LCD_PAD_CTRL)),
++	(_MX51_PAD_DISP1_DAT8__DISP1_DAT8 | MUX_PAD_CTRL(APF51_LCD_PAD_CTRL)),
++	(_MX51_PAD_DISP1_DAT9__DISP1_DAT9 | MUX_PAD_CTRL(APF51_LCD_PAD_CTRL)),
++	(_MX51_PAD_DISP1_DAT10__DISP1_DAT10 | MUX_PAD_CTRL(APF51_LCD_PAD_CTRL)),
++	(_MX51_PAD_DISP1_DAT11__DISP1_DAT11 | MUX_PAD_CTRL(APF51_LCD_PAD_CTRL)),
++	(_MX51_PAD_DISP1_DAT12__DISP1_DAT12 | MUX_PAD_CTRL(APF51_LCD_PAD_CTRL)),
++	(_MX51_PAD_DISP1_DAT13__DISP1_DAT13 | MUX_PAD_CTRL(APF51_LCD_PAD_CTRL)),
++	(_MX51_PAD_DISP1_DAT14__DISP1_DAT14 | MUX_PAD_CTRL(APF51_LCD_PAD_CTRL)),
++	(_MX51_PAD_DISP1_DAT15__DISP1_DAT15 | MUX_PAD_CTRL(APF51_LCD_PAD_CTRL)),
++	(_MX51_PAD_DISP1_DAT16__DISP1_DAT16 | MUX_PAD_CTRL(APF51_LCD_PAD_CTRL)),
++	(_MX51_PAD_DISP1_DAT17__DISP1_DAT17 | MUX_PAD_CTRL(APF51_LCD_PAD_CTRL)),
++	(_MX51_PAD_DISP1_DAT18__DISP1_DAT18 | MUX_PAD_CTRL(APF51_LCD_PAD_CTRL)),
++	(_MX51_PAD_DISP1_DAT19__DISP1_DAT19 | MUX_PAD_CTRL(APF51_LCD_PAD_CTRL)),
++	(_MX51_PAD_DISP1_DAT20__DISP1_DAT20 | MUX_PAD_CTRL(APF51_LCD_PAD_CTRL)),
++	(_MX51_PAD_DISP1_DAT21__DISP1_DAT21 | MUX_PAD_CTRL(APF51_LCD_PAD_CTRL)),
++	(_MX51_PAD_DISP1_DAT22__DISP1_DAT22 | MUX_PAD_CTRL(APF51_LCD_PAD_CTRL)),
++	(_MX51_PAD_DISP1_DAT23__DISP1_DAT23 | MUX_PAD_CTRL(APF51_LCD_PAD_CTRL)),
++	(_MX51_PAD_DI1_PIN2__DI1_PIN2 | MUX_PAD_CTRL(APF51_LCD_PAD_CTRL)),	/* HSYNC */
++	(_MX51_PAD_DI1_PIN3__DI1_PIN3 | MUX_PAD_CTRL(APF51_LCD_PAD_CTRL)),	/* VSYNC */
++	(_MX51_PAD_DI1_D1_CS__DI1_D1_CS | MUX_PAD_CTRL(APF51_LCD_PAD_CTRL)),	/* CONTRAST */
++
++	/* HDMI detect */
++	(_MX51_PAD_I2C1_DAT__GPIO4_17 | MUX_PAD_CTRL(APF51_GPIO_SPECIAL_PAD_CTRL)),
++
++	/* LEDs */
++	(_MX51_PAD_EIM_EB2__GPIO2_22 | MUX_PAD_CTRL(APF51_GPIO_SPECIAL_PAD_CTRL)), /* Red led */
++	(_MX51_PAD_EIM_EB3__GPIO2_23 | MUX_PAD_CTRL(APF51_GPIO_SPECIAL_PAD_CTRL)), /* green led */
++
++	/* lan95000 resetn */
++	(_MX51_PAD_AUD3_BB_FS__GPIO4_21 | MUX_PAD_CTRL(APF51_GPIO_SPECIAL_PAD_CTRL)),
++
++};
++
++/* Serial ports */
++static struct imxuart_platform_data pps51_uart_pdata = {
++	.flags = IMXUART_HAVE_RTSCTS,
++};
++
++/* APF51Proto has a LCD connector for a 18 bits 800x480 Chimei TFT LCD */
++static struct fb_videomode pps51_modes[] = {
++        {
++		.name 		= "tft480800-hx8369",
++		.refresh 	= 60,
++		.xres 		= 480,
++		.yres 		= 800,
++		.pixclock 	= 30303, /* picoS */
++		.left_margin 	= 45, .right_margin = 98,
++		.upper_margin 	= 0, .lower_margin = 21,
++		.hsync_len 	= 64, .vsync_len = 4,
++		.sync 		= FB_SYNC_CLK_IDLE_EN,
++		.vmode 		= FB_VMODE_NONINTERLACED,
++		.flag 		= 0,
++        },
++};
++
++static struct ipuv3_fb_platform_data pps51_fb0_data = {
++	.interface_pix_fmt = IPU_PIX_FMT_RGB666,
++	.modes = pps51_modes,
++	.num_modes = ARRAY_SIZE(pps51_modes),
++	.display = 0,
++};
++
++static struct imx_ipuv3_platform_data pps51_ipu_data = {
++	.fb_head0_platform_data = &pps51_fb0_data,
++};
++
++/* ECSPI1 */
++#define PPS51_ECSPI1_SS0	IMX_GPIO_NR(4, 24)
++
++static int pps51_spi1_cs[] = {
++	PPS51_ECSPI1_SS0,
++};
++
++static const struct spi_imx_master pps51_spi1_pdata __initconst = {
++	.chipselect     = pps51_spi1_cs,
++	.num_chipselect = ARRAY_SIZE(pps51_spi1_cs),
++};
++
++static void p0340_reset_on(int value){
++}
++
++static struct hx8369_display hx8369_display_config = {
++	.gcontrast_value = 32,
++	.reset_on	 = &p0340_reset_on,
++};
++
++static struct spi_board_info apf51dev_spi1_board_info[] __initdata = {
++	{
++		.modalias = "hx8369-display",
++		.max_speed_hz = 1000,
++		.bus_num = 0,
++		.chip_select = 0,
++		.mode = SPI_MODE_0,
++		.platform_data = &hx8369_display_config,
++	},
++};
++
++/* I2C2 */
++static struct i2c_board_info pps51_i2c2_devices[] __initdata = {
++	{
++	/* EDID */
++		I2C_BOARD_INFO("eeprom", 0x50),
++	},
++};
++
++/* SD card ports */
++#define ESDHC_CARD_DETECT	(GPIO_PORTD | 20)
++static struct esdhc_platform_data edshc0_pdata = {
++	.no_sdio_irq = 1,	/* Temporary ! (for Wi2Wi) */
++};
++
++static struct esdhc_platform_data edshc1_pdata = {
++	.cd_gpio = ESDHC_CARD_DETECT,	/* card detect pin */
++};
++
++static int init_gpio(void)
++{
++#define WIFI_PWRDN		(GPIO_PORTD | 25)
++#define WIFI_RESET		(GPIO_PORTD | 26)
++#define BT_RESET		(GPIO_PORTD | 19)
++#define HDMI_DETECT_GPIO	(GPIO_PORTD | 17)
++
++#define RED_LED_GPIO		(GPIO_PORTB | 22)
++#define GREEN_LED_GPIO		(GPIO_PORTB | 23)
++
++#define LAN9500_RESETN		(GPIO_PORTD | 21)
++
++	int ret;
++
++	/* LAN9500 */
++	ret = gpio_request(LAN9500_RESETN, "LAN9500_RESETN");
++	if (ret) {
++		pr_warn("failed to get LAN9500_RESETN GPIO: %d\n", ret);
++		return ret;
++	}
++	gpio_direction_output(LAN9500_RESETN, 1);
++	gpio_set_value(LAN9500_RESETN, 1);
++
++
++	/* WIFI */
++	ret = gpio_request(WIFI_PWRDN, "WIFI");
++	if (ret) {
++		pr_warn("failed to get WIFI_PWRDN GPIO: %d\n", ret);
++		return ret;
++	}
++	ret = gpio_request(WIFI_RESET, "WIFI");
++	if (ret) {
++		pr_warn("failed to get WIFI_RESET GPIO: %d\n", ret);
++		return ret;
++	}
++	gpio_direction_output(WIFI_PWRDN, 1);
++	udelay(1000);
++	gpio_direction_output(WIFI_RESET, 1);
++
++	/* BT */
++	ret = gpio_request(BT_RESET, "BT");
++	if (ret) {
++		pr_warn("failed to get BT_RESET GPIO: %d\n", ret);
++		return ret;
++	}
++	gpio_direction_output(BT_RESET, 1);
++	gpio_set_value(BT_RESET, 1);
++
++	/* LEDs */
++	ret = gpio_request(RED_LED_GPIO, "RED_LED_GPIO");
++	if (ret) {
++		pr_warn("failed to get red LED GPIO: %d\n", ret);
++		return ret;
++	}
++	gpio_direction_output(RED_LED_GPIO, 1);
++	gpio_free(RED_LED_GPIO);
++
++	ret = gpio_request(GREEN_LED_GPIO, "GREEN_LED_GPIO");
++	if (ret) {
++		pr_warn("failed to get red LED GPIO: %d\n", ret);
++		return ret;
++	}
++	gpio_direction_output(GREEN_LED_GPIO, 1);
++	gpio_free(GREEN_LED_GPIO);
++
++	/* HDMI */
++	ret = gpio_request(HDMI_DETECT_GPIO, "HDMI_DETECT_GPIO");
++	if (ret) {
++		pr_warn("failed to get HDMI detect GPIO: %d\n", ret);
++		return ret;
++	}
++	gpio_direction_input(HDMI_DETECT_GPIO);
++
++	return 0;
++}
++
++void __init apf51_baseboard_init(void)
++{
++#if defined(CONFIG_CPU_FREQ_IMX)
++	get_cpu_op = mx51_get_cpu_op;
++#endif
++
++	mxc_iomux_v3_setup_multiple_pads(pps51_pads,
++					ARRAY_SIZE(pps51_pads));
++
++	imx51_add_imx_uart(1, &pps51_uart_pdata);
++
++	init_gpio();
++
++	/* SD card ports */
++	imx51_add_sdhci_esdhc_imx(0, &edshc0_pdata); /* wi2wi */
++	imx51_add_sdhci_esdhc_imx(1, &edshc1_pdata); /* sdcard*/
++
++	/* Register LCD on spi1 bus */
++	spi_register_board_info(apf51dev_spi1_board_info,
++				ARRAY_SIZE(apf51dev_spi1_board_info));
++	imx51_add_ecspi(0, &pps51_spi1_pdata);
++
++	/* I2C2 already initialized by APF51, so just register devices */
++	i2c_register_board_info(1, pps51_i2c2_devices,
++				ARRAY_SIZE(pps51_i2c2_devices));
++
++	imx51_add_ipuv3(&pps51_ipu_data);
++
++	printk("DEBUG: init debugfs\n");
++
++}


hooks/post-receive
-- 
armadeus

[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-355-g51f941b

From: jorasse <jo...@us...> - 2012-06-08 16:52:48

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".

The branch, master has been updated
       via  51f941bd1de615b76b4ce4e59d97c24591a6bc3a (commit)
      from  58d5a77c9ae9a52cd782f2f01282342d3a5af326 (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit 51f941bd1de615b76b4ce4e59d97c24591a6bc3a
Author: Eric Jarrige <eri...@ar...>
Date:   Fri Jun 8 18:54:01 2012 +0200

    [UBOOT] APF28: improve high frequency bus

-----------------------------------------------------------------------

Summary of changes:
 .../device/armadeus/apf28/apf28-u-boot-2012.04.h   |    2 +-
 patches/u-boot/2012.04/502-add-apf28.patch         |    4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/buildroot/target/device/armadeus/apf28/apf28-u-boot-2012.04.h b/buildroot/target/device/armadeus/apf28/apf28-u-boot-2012.04.h
index 98f5afe..f517ac7 100644
--- a/buildroot/target/device/armadeus/apf28/apf28-u-boot-2012.04.h
+++ b/buildroot/target/device/armadeus/apf28/apf28-u-boot-2012.04.h
@@ -26,7 +26,7 @@
 
 #define CONFIG_VERSION_VARIABLE
 #define CONFIG_ENV_VERSION 	"1.0"
-#define CONFIG_IDENT_STRING	" apf28 patch 1.3"
+#define CONFIG_IDENT_STRING	" apf28 patch 1.4"
 #define CONFIG_BOARD_NAME	apf28
 
 /*
diff --git a/patches/u-boot/2012.04/502-add-apf28.patch b/patches/u-boot/2012.04/502-add-apf28.patch
index 4e92586..c1831cd 100644
--- a/patches/u-boot/2012.04/502-add-apf28.patch
+++ b/patches/u-boot/2012.04/502-add-apf28.patch
@@ -1150,10 +1150,10 @@ index 0000000..3769d44
 +#include <asm/arch/sys_proto.h>
 +
 +#define	MUX_CONFIG_LED	(MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL)
-+#define	MUX_CONFIG_SSP0	(MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_PULLUP)
++#define	MUX_CONFIG_SSP0	(MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
 +#define	MUX_CONFIG_GPMI	(MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL)
 +#define	MUX_CONFIG_ENET	(MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_PULLUP)
-+#define	MUX_CONFIG_EMI	(MXS_PAD_1V8 | MXS_PAD_4MA | MXS_PAD_NOPULL)
++#define	MUX_CONFIG_EMI	(MXS_PAD_1V8 | MXS_PAD_8MA | MXS_PAD_NOPULL)
 +
 +const iomux_cfg_t iomux_setup[] = {
 +	/* LED */


hooks/post-receive
-- 
armadeus

[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-354-g58d5a77

From: jorasse <jo...@us...> - 2012-06-08 12:47:29

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".

The branch, master has been updated
       via  58d5a77c9ae9a52cd782f2f01282342d3a5af326 (commit)
      from  3157f7505ade837f99af5bf2c834a8086797403c (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit 58d5a77c9ae9a52cd782f2f01282342d3a5af326
Author: Eric Jarrige <eri...@ar...>
Date:   Fri Jun 8 14:48:32 2012 +0200

    [LINUX] apf28: patch clean-up

-----------------------------------------------------------------------

Summary of changes:
 ...1-armadeus-add_apf28dev_baseboard_support.patch |   57 +++-----------------
 1 files changed, 8 insertions(+), 49 deletions(-)

diff --git a/patches/linux/2.6.35/451-armadeus-add_apf28dev_baseboard_support.patch b/patches/linux/2.6.35/451-armadeus-add_apf28dev_baseboard_support.patch
index 7bb35b9..ca4b59f 100644
--- a/patches/linux/2.6.35/451-armadeus-add_apf28dev_baseboard_support.patch
+++ b/patches/linux/2.6.35/451-armadeus-add_apf28dev_baseboard_support.patch
@@ -1542,59 +1542,18 @@ Index: linux-2.6.35.3/arch/arm/mach-mx28/device.c
 ===================================================================
 --- linux-2.6.35.3.orig/arch/arm/mach-mx28/device.c
 +++ linux-2.6.35.3/arch/arm/mach-mx28/device.c
-@@ -426,7 +426,6 @@ static void mx28_init_gpmi_nfc(void)
+@@ -421,12 +421,12 @@ static void mx28_init_gpmi_nfc(void)
+ #endif
+ 
+ #if defined(CONFIG_MMC_MXS) || defined(CONFIG_MMC_MXS_MODULE)
+-#if defined(CONFIG_MACH_MX28EVK)
++/*#if defined(CONFIG_MACH_MX28EVK)*/
+ #define MMC0_POWER	MXS_PIN_TO_GPIO(PINID_PWM3)
  #define MMC1_POWER	MXS_PIN_TO_GPIO(PINID_PWM4)
  #define MMC0_WP		MXS_PIN_TO_GPIO(PINID_SSP1_SCK)
  #define MMC1_WP		MXS_PIN_TO_GPIO(PINID_GPMI_RESETN)
 -#endif
++/*#endif*/
  
  static int mxs_mmc_get_wp_ssp0(void)
  {
-@@ -467,6 +466,7 @@ static void mxs_mmc_hw_release_ssp0(void
- 	gpio_free(MMC0_WP);
- 
- }
-+#endif
- 
- static void mxs_mmc_cmd_pullup_ssp0(int enable)
- {
-@@ -490,6 +490,7 @@ static unsigned long mxs_mmc_setclock_ss
- 	return hz;
- }
- 
-+#if defined(CONFIG_MACH_MX28EVK)
- static int mxs_mmc_get_wp_ssp1(void)
- {
- 	return gpio_get_value(MMC1_WP);
-@@ -528,6 +529,7 @@ static void mxs_mmc_hw_release_ssp1(void
- 	gpio_free(MMC1_POWER);
- 	gpio_free(MMC1_WP);
- }
-+#endif /* CONFIG_MACH_MX28EVK */
- 
- static void mxs_mmc_cmd_pullup_ssp1(int enable)
- {
-@@ -552,9 +554,11 @@ static unsigned long mxs_mmc_setclock_ss
- }
- 
- static struct mxs_mmc_platform_data mmc0_data = {
-+#if defined(CONFIG_MACH_MX28EVK)
- 	.hw_init	= mxs_mmc_hw_init_ssp0,
- 	.hw_release	= mxs_mmc_hw_release_ssp0,
- 	.get_wp		= mxs_mmc_get_wp_ssp0,
-+#endif
- 	.cmd_pullup	= mxs_mmc_cmd_pullup_ssp0,
- 	.setclock	= mxs_mmc_setclock_ssp0,
- 	.caps 		= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA
-@@ -591,9 +595,11 @@ static struct resource mmc0_resource[] =
- };
- 
- static struct mxs_mmc_platform_data mmc1_data = {
-+#if defined(CONFIG_MACH_MX28EVK)
- 	.hw_init	= mxs_mmc_hw_init_ssp1,
- 	.hw_release	= mxs_mmc_hw_release_ssp1,
- 	.get_wp		= mxs_mmc_get_wp_ssp1,
-+#endif
- 	.cmd_pullup	= mxs_mmc_cmd_pullup_ssp1,
- 	.setclock	= mxs_mmc_setclock_ssp1,
- 	.caps 		= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA


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-- 
armadeus

[Armadeus-commitlog] armadeus branch, master, updated. armadeus-4.1-353-g3157f75

From: jorasse <jo...@us...> - 2012-06-08 12:36:46

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".

The branch, master has been updated
       via  3157f7505ade837f99af5bf2c834a8086797403c (commit)
      from  ff39fcb4d6d3762a42bfd1fb3e347ff6f89146db (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit 3157f7505ade837f99af5bf2c834a8086797403c
Author: Eric Jarrige <eri...@ar...>
Date:   Fri Jun 8 14:37:58 2012 +0200

    [LINUX] apf28: rework SD/MMC plateform interface

-----------------------------------------------------------------------

Summary of changes:
 ...1-armadeus-add_apf28dev_baseboard_support.patch |  204 ++++++++++++++------
 1 files changed, 146 insertions(+), 58 deletions(-)

diff --git a/patches/linux/2.6.35/451-armadeus-add_apf28dev_baseboard_support.patch b/patches/linux/2.6.35/451-armadeus-add_apf28dev_baseboard_support.patch
index 5c1ea39..7bb35b9 100644
--- a/patches/linux/2.6.35/451-armadeus-add_apf28dev_baseboard_support.patch
+++ b/patches/linux/2.6.35/451-armadeus-add_apf28dev_baseboard_support.patch
@@ -45,7 +45,7 @@ Index: linux-2.6.35.3/arch/arm/mach-mx28/apf28dev.c
 ===================================================================
 --- /dev/null
 +++ linux-2.6.35.3/arch/arm/mach-mx28/apf28dev.c
-@@ -0,0 +1,755 @@
+@@ -0,0 +1,843 @@
 +/*
 + * Copyright (C) 2012 Armadeus systems
 + *
@@ -77,6 +77,7 @@ Index: linux-2.6.35.3/arch/arm/mach-mx28/apf28dev.c
 +#include <linux/gpio_keys.h>
 +#include <linux/input.h>
 +#include <linux/leds.h>
++#include <linux/mmc/host.h>
 +#include <linux/platform_device.h>
 +#include <linux/i2c.h>
 +
@@ -85,8 +86,9 @@ Index: linux-2.6.35.3/arch/arm/mach-mx28/apf28dev.c
 +#include <asm/mach/arch.h>
 +
 +#include <mach/apf28.h>
-+#include <mach/hardware.h>
 +#include <mach/device.h>
++#include <mach/dma.h>
++#include <mach/hardware.h>
 +#include <mach/pinctrl.h>
 +
 +#include <linux/spi/spi.h>
@@ -283,77 +285,79 @@ Index: linux-2.6.35.3/arch/arm/mach-mx28/apf28dev.c
 +	 },
 +
 +#endif
++#if defined(CONFIG_MMC_MXS) || defined(CONFIG_MMC_MXS_MODULE)
 +	/* SSP0 SD/MMC port pins */
 +	{
-+		.name = "SSP0_DATA0",
-+		.id = PINID_SSP0_DATA0,
-+		.fun = PIN_FUN1,
-+		.strength = PAD_4MA,
-+		.voltage = PAD_3_3V,
-+		.pullup	= 1,
-+		.drive = 1,
-+		.pull = 1,
++		.name		= "SSP0_DATA0",
++		.id		= PINID_SSP0_DATA0,
++		.fun		= PIN_FUN1,
++		.strength	= PAD_8MA,
++		.voltage	= PAD_3_3V,
++		.pullup		= 1,
++		.drive		= 1,
++		.pull		= 1,
 +	},
 +	{
-+		.name = "SSP0_DATA1",
-+		.id = PINID_SSP0_DATA1,
-+		.fun = PIN_FUN1,
-+		.strength = PAD_4MA,
-+		.voltage = PAD_3_3V,
-+		.pullup	= 1,
-+		.drive = 1,
-+		.pull = 1,
++		.name		= "SSP0_DATA1",
++		.id		= PINID_SSP0_DATA1,
++		.fun		= PIN_FUN1,
++		.strength	= PAD_8MA,
++		.voltage	= PAD_3_3V,
++		.pullup		= 1,
++		.drive		= 1,
++		.pull		= 1,
 +	},
 +	{
-+		.name = "SSP0_DATA2",
-+		.id = PINID_SSP0_DATA2,
-+		.fun = PIN_FUN1,
-+		.strength = PAD_4MA,
-+		.voltage = PAD_3_3V,
-+		.pullup	= 1,
-+		.drive = 1,
-+		.pull = 1,
++		.name		= "SSP0_DATA2",
++		.id		= PINID_SSP0_DATA2,
++		.fun		= PIN_FUN1,
++		.strength	= PAD_8MA,
++		.voltage	= PAD_3_3V,
++		.pullup		= 1,
++		.drive		= 1,
++		.pull		= 1,
 +	},
 +	{
-+		.name = "SSP0_DATA3",
-+		.id = PINID_SSP0_DATA3,
-+		.fun = PIN_FUN1,
-+		.strength = PAD_4MA,
-+		.voltage = PAD_3_3V,
-+		.pullup	= 1,
-+		.drive = 1,
-+		.pull = 1,
++		.name		= "SSP0_DATA3",
++		.id		= PINID_SSP0_DATA3,
++		.fun		= PIN_FUN1,
++		.strength	= PAD_8MA,
++		.voltage	= PAD_3_3V,
++		.pullup		= 1,
++		.drive		= 1,
++		.pull		= 1,
 +	},
 +	{
-+		.name = "SSP0_CMD",
-+		.id = PINID_SSP0_CMD,
-+		.fun = PIN_FUN1,
-+		.strength = PAD_4MA,
-+		.voltage = PAD_3_3V,
-+		.pullup	= 1,
-+		.drive = 1,
-+		.pull = 1,
++		.name		= "SSP0_CMD",
++		.id		= PINID_SSP0_CMD,
++		.fun		= PIN_FUN1,
++		.strength	= PAD_8MA,
++		.voltage	= PAD_3_3V,
++		.pullup		= 1,
++		.drive		= 1,
++		.pull		= 1,
 +	},
 +	{
-+		.name = "SSP0_SCK",
-+		.id = PINID_SSP0_SCK,
-+		.fun = PIN_FUN1,
-+		.strength = PAD_4MA,
-+		.voltage = PAD_3_3V,
-+		.pullup	= 0,
-+		.drive = 1,
-+		.pull = 0,
++		.name		= "SSP0_SCK",
++		.id		= PINID_SSP0_SCK,
++		.fun		= PIN_FUN1,
++		.strength	= PAD_8MA,
++		.voltage	= PAD_3_3V,
++		.pullup		= 0,
++		.drive		= 1,
++		.pull		= 0,
 +	},
 +	{
-+		.name = "SSP0_DETECT",
-+		.id = PINID_SSP0_DETECT,
-+		.fun = PIN_FUN1,
-+		.strength = PAD_4MA,
-+		.voltage = PAD_3_3V,
-+		.pullup	= 0,
-+		.drive = 1,
-+		.pull = 0,
++		.name		= "SSP0_DETECT",
++		.id		= PINID_SSP0_DETECT,
++		.fun		= PIN_FUN1,
++		.strength	= PAD_8MA,
++		.voltage	= PAD_3_3V,
++		.pullup		= 0,
++		.drive		= 1,
++		.pull		= 0,
 +	},
++#endif /* defined(CONFIG_MMC_MXS) || defined(CONFIG_MMC_MXS_MODULE) */
 +#ifdef CONFIG_MXS_AUART0_DEVICE_ENABLE
 +	{
 +		.name		= "AUART0.RX",
@@ -772,6 +776,87 @@ Index: linux-2.6.35.3/arch/arm/mach-mx28/apf28dev.c
 +}
 +#endif /* defined(CONFIG_FEC) || defined(CONFIG_FEC_MODULE) */
 +
++#if defined(CONFIG_MMC_MXS) || defined(CONFIG_MMC_MXS_MODULE)
++static void mxs_mmc_cmd_pullup_ssp0(int enable)
++{
++	mxs_set_pullup(PINID_SSP0_CMD, enable, "mmc0_cmd");
++}
++
++static unsigned long mxs_mmc_setclock_ssp0(unsigned long hz)
++{
++	struct clk *ssp = clk_get(NULL, "ssp.0"), *parent;
++
++	if (hz > 1000000)
++		parent = clk_get(NULL, "ref_io.0");
++	else
++		parent = clk_get(NULL, "xtal.0");
++
++	clk_set_parent(ssp, parent);
++	clk_set_rate(ssp, 2 * hz);
++	clk_put(parent);
++	clk_put(ssp);
++
++	return hz;
++}
++
++static struct mxs_mmc_platform_data mmc0_data = {
++	.cmd_pullup	= mxs_mmc_cmd_pullup_ssp0,
++	.setclock	= mxs_mmc_setclock_ssp0,
++	.caps 		= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA
++				| MMC_CAP_DATA_DDR,
++	.min_clk	= 400000,
++	.max_clk	= 48000000,
++	.read_uA        = 50000,
++	.write_uA       = 70000,
++	.clock_mmc = "ssp.0",
++	.power_mmc = NULL,
++	.fastpath_sz = 1024,
++};
++
++static struct resource mmc0_resource[] = {
++	{
++		.flags	= IORESOURCE_MEM,
++		.start	= SSP0_PHYS_ADDR,
++		.end	= SSP0_PHYS_ADDR + 0x2000 - 1,
++	},
++	{
++		.flags	= IORESOURCE_DMA,
++		.start	= MXS_DMA_CHANNEL_AHB_APBH_SSP0,
++		.end	= MXS_DMA_CHANNEL_AHB_APBH_SSP0,
++	},
++	{
++		.flags	= IORESOURCE_IRQ,
++		.start	= IRQ_SSP0_DMA,
++		.end	= IRQ_SSP0_DMA,
++	},
++	{
++		.flags	= IORESOURCE_IRQ,
++		.start	= IRQ_SSP0,
++		.end	= IRQ_SSP0,
++	},
++};
++
++static void __init apf28dev_init_mmc(void)
++{
++	struct platform_device *pdev;
++
++	if (mxs_get_type(PINID_SSP0_CMD) == PIN_FUN1) {
++		pdev = mxs_get_device("mxs-mmc", 0);
++		if (pdev == NULL || IS_ERR(pdev))
++			return;
++		pdev->resource = mmc0_resource;
++		pdev->num_resources = ARRAY_SIZE(mmc0_resource);
++		pdev->dev.platform_data = &mmc0_data;
++		mxs_add_device(pdev, 2);
++		mxs_get_devices("mxs-mmc"); /* reserve the mxs-mmx ressource */
++	}
++}
++#else
++static void apf28dev_init_mmc(void)
++{
++}
++#endif /* defined(CONFIG_MMC_MXS) || defined(CONFIG_MMC_MXS_MODULE) */
++
 +#if defined(CONFIG_SPI_MXS) || defined(CONFIG_SPI_MXS_MODULE)
 +static struct spi_board_info spi_board_info[] __initdata = {
 +	{
@@ -788,6 +873,9 @@ Index: linux-2.6.35.3/arch/arm/mach-mx28/apf28dev.c
 +	printk("--- apf28_baseboard_init %d\n", MXS_PIN_TO_GPIO(PINID_PWM3));
 +
 +	apf28_init_pin_group(apf28dev_fixed_pins, ARRAY_SIZE(apf28dev_fixed_pins));
++
++	/* some init code that should be done before mx28_device_init() */
++	apf28dev_init_mmc();
 +}
 +
 +void __init apf28_baseboard_devices_init(void)


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