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From: jorasse <jo...@us...> - 2013-08-06 08:47:33
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 9764d74f32ee8f4570affc4285bae96187f46fcf (commit)
from 4b9362953e12891dd89e80bae2e0b417303ae337 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 9764d74f32ee8f4570affc4285bae96187f46fcf
Author: Eric Jarrige <eri...@ar...>
Date: Tue Aug 6 10:56:22 2013 +0200
[UBOOT] enhance FPGA / firmware management scripts.
-----------------------------------------------------------------------
Summary of changes:
.../target/device/armadeus/u-boot-env-2013.04.txt | 19 +++++++++++--------
1 files changed, 11 insertions(+), 8 deletions(-)
diff --git a/buildroot/target/device/armadeus/u-boot-env-2013.04.txt b/buildroot/target/device/armadeus/u-boot-env-2013.04.txt
index 563f558..25cd39f 100644
--- a/buildroot/target/device/armadeus/u-boot-env-2013.04.txt
+++ b/buildroot/target/device/armadeus/u-boot-env-2013.04.txt
@@ -1,23 +1,25 @@
# U-Boot / environment variable management scripts
-autoload=no
-# FPGA management scripts
-firmware_autoload=0
+# FPGA
+download_firmware=tftpboot ${loadaddr} ${board_name}-firmware.bin
flash_firmware=nand erase.part firmware;if nand write.trimffs ${fileaddr} ${firmware_addr} ${filesize};then echo Flashing of Firmware succeed;else echo Flashing of Firmware failed;fi
-# DTB management scripts
+update_firmware=run download_firmware flash_firmware
+load_firmware=nand read ${loadaddr} firmware && fpga loadb 0 ${loadaddr} ${firmware_size} || fpga loadb 0 ${loadaddr} ${firmware_size};
+checknload_firmware=if test -n ${firmware_autoload}; then if test -n ${had_ctrlc}; then echo Firmware download stopped!; else run load_firmware && echo Firmware successfully programmed; fi; fi;
+# DTB
download_dtb=tftpboot ${loadaddr} ${cpu_name}-${board_name}.dtb
flash_dtb=nand erase.part dtb;if nand write.trimffs ${fileaddr} dtb ${filesize};then echo Flashing of rootfs succeed;else echo Flashing of rootfs failed;fi
update_dtb=run download_dtb flash_dtb
-# kernel management scripts
+# kernel
download_kernel=tftpboot ${loadaddr} ${board_name}-linux.bin
flash_kernel=nand erase.part kernel;if nand write.trimffs ${fileaddr} ${kernel_addr} ${filesize};then echo Flashing of kernel succeed;else echo Flashing of kernel failed;fi
update_kernel=run download_kernel flash_kernel
-# rootfs management scripts
+# rootfs
download_rootfs=tftpboot ${loadaddr} ${board_name}-rootfs.ubi
flash_rootfs=nand erase.part rootfs;if nand write.trimffs ${fileaddr} ${rootfs_addr} ${filesize};then echo Flashing of rootfs succeed;else echo Flashing of rootfs failed;fi
update_rootfs=run download_rootfs flash_rootfs
-# update management scripts
+# update
update_all=run update_kernel update_rootfs update_env update_uboot
-# boot management scripts
+# boot
addipargs=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off
addmmcargs=setenv bootargs ${bootargs} root=/dev/mmcblk0p1 rootfstype=ext2
mmcboot=setenv bootargs console=${consoledev},${baudrate} ${mtdparts} ${extrabootargs}; run addmmcargs addipargs;if test -n ${fdt_addr_r} ; then nand read ${fdt_addr_r} dtb; fi;mmc dev 0; ext2load mmc 0 ${kernel_addr_r} /boot/${board_name}-linux.bin;bootm ${kernel_addr_r} - ${fdt_addr_r}
@@ -25,4 +27,5 @@ addnfsargs=setenv bootargs ${bootargs} root=/dev/nfs rw nfsroot=${serverip}:${ro
nfsboot=setenv bootargs console=${consoledev},${baudrate} ${mtdparts} ${extrabootargs}; run addnfsargs addipargs;nfs ${kernel_addr_r} ${serverip}:${rootpath}/boot/${board_name}-linux.bin;if test -n ${fdt_addr_r} ; then nand read ${fdt_addr_r} dtb; fi;bootm ${kernel_addr_r} - ${fdt_addr_r}
addubifsargs=setenv bootargs ${bootargs} ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs
ubifsboot=setenv bootargs console=${consoledev},${baudrate} ${mtdparts} ${extrabootargs};run addubifsargs addipargs;if test -n ${fdt_addr_r} ; then nand read ${fdt_addr_r} dtb; fi;nboot ${kernel_addr_r} kernel;bootm ${kernel_addr_r} - ${fdt_addr_r}
+preboot=run check_flash checknload_firmware check_env ;
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2013-08-05 12:44:33
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 4b9362953e12891dd89e80bae2e0b417303ae337 (commit)
from fc9fac096ce6b7459938d7d4d76476f7a6df1561 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 4b9362953e12891dd89e80bae2e0b417303ae337
Author: Philippe Reynes <tr...@ya...>
Date: Tue Jul 30 21:14:32 2013 +0200
[LINUX] 3.11: move to 3.11-rc3
Signed-off-by: Philippe Reynes <tr...@ya...>
-----------------------------------------------------------------------
Summary of changes:
...3.11-rc2.config => apf27-linux-3.11-rc3.config} | 0
patches/linux/{3.11-rc2 => 3.11-rc3} | 0
2 files changed, 0 insertions(+), 0 deletions(-)
rename buildroot/target/device/armadeus/apf27/{apf27-linux-3.11-rc2.config => apf27-linux-3.11-rc3.config} (100%)
rename patches/linux/{3.11-rc2 => 3.11-rc3} (100%)
diff --git a/buildroot/target/device/armadeus/apf27/apf27-linux-3.11-rc2.config b/buildroot/target/device/armadeus/apf27/apf27-linux-3.11-rc3.config
similarity index 100%
rename from buildroot/target/device/armadeus/apf27/apf27-linux-3.11-rc2.config
rename to buildroot/target/device/armadeus/apf27/apf27-linux-3.11-rc3.config
diff --git a/patches/linux/3.11-rc2 b/patches/linux/3.11-rc3
similarity index 100%
rename from patches/linux/3.11-rc2
rename to patches/linux/3.11-rc3
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2013-08-02 13:11:31
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via fc9fac096ce6b7459938d7d4d76476f7a6df1561 (commit)
via b704ce98fea5d9596fd4570a76f2c11db5bc9de6 (commit)
from 0aab9be94e30662456eb43125f355d4d5e42025a (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit fc9fac096ce6b7459938d7d4d76476f7a6df1561
Merge: b704ce9 0aab9be
Author: Eric Jarrige <eri...@ar...>
Date: Fri Aug 2 15:20:15 2013 +0200
Merge branch 'master' of ssh://git.code.sf.net/p/armadeus/code
commit b704ce98fea5d9596fd4570a76f2c11db5bc9de6
Author: Eric Jarrige <eri...@ar...>
Date: Fri Aug 2 15:20:02 2013 +0200
[BUILDROOT] apf27: update config to build apf27-u-boot-env.bin
-----------------------------------------------------------------------
Summary of changes:
buildroot/configs/apf27_defconfig | 3 +++
buildroot/configs/apf27test_defconfig | 3 +++
2 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/buildroot/configs/apf27_defconfig b/buildroot/configs/apf27_defconfig
index 22ffd44..7229bc2 100644
--- a/buildroot/configs/apf27_defconfig
+++ b/buildroot/configs/apf27_defconfig
@@ -82,6 +82,9 @@ BR2_TARGET_UBOOT_SERVERIP="192.168.0.2"
BR2_TARGET_UBOOT_IPADDR="192.168.0.10"
BR2_TARGET_UBOOT_GATEWAY="192.168.0.1"
BR2_TARGET_UBOOT_ETHADDR=""
+BR2_TARGET_UBOOT_ENVIMAGE=y
+BR2_TARGET_UBOOT_ENVIMAGE_SOURCE="$(ARMADEUS_PATH)/u-boot-env-2013.04.txt"
+BR2_TARGET_UBOOT_ENVIMAGE_SIZE="0x20000"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="2.6.29.6"
diff --git a/buildroot/configs/apf27test_defconfig b/buildroot/configs/apf27test_defconfig
index 5fe8b28..c9e1bb7 100644
--- a/buildroot/configs/apf27test_defconfig
+++ b/buildroot/configs/apf27test_defconfig
@@ -141,6 +141,9 @@ BR2_TARGET_UBOOT_SERVERIP="192.168.0.2"
BR2_TARGET_UBOOT_IPADDR="192.168.0.10"
BR2_TARGET_UBOOT_GATEWAY="192.168.0.1"
BR2_TARGET_UBOOT_ETHADDR=""
+BR2_TARGET_UBOOT_ENVIMAGE=y
+BR2_TARGET_UBOOT_ENVIMAGE_SOURCE="$(ARMADEUS_PATH)/u-boot-env-2013.04.txt"
+BR2_TARGET_UBOOT_ENVIMAGE_SIZE="0x20000"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="2.6.29.6"
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2013-08-02 12:51:26
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 0aab9be94e30662456eb43125f355d4d5e42025a (commit)
from 0167dc67311bcb4200e39b1aa4c0b1b70d5e341b (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 0aab9be94e30662456eb43125f355d4d5e42025a
Author: Eric Jarrige <eri...@ar...>
Date: Fri Aug 2 14:45:58 2013 +0200
[BUILDROOT] apf51: update config to build apf51-u-boot-env.bin
-----------------------------------------------------------------------
Summary of changes:
buildroot/configs/apf51_defconfig | 3 +++
buildroot/configs/apf51test_defconfig | 3 +++
2 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/buildroot/configs/apf51_defconfig b/buildroot/configs/apf51_defconfig
index a3b9cb9..92bf62d 100644
--- a/buildroot/configs/apf51_defconfig
+++ b/buildroot/configs/apf51_defconfig
@@ -93,6 +93,9 @@ BR2_TARGET_UBOOT_SERVERIP="192.168.0.2"
BR2_TARGET_UBOOT_IPADDR="192.168.0.10"
BR2_TARGET_UBOOT_GATEWAY="192.168.0.1"
BR2_TARGET_UBOOT_ETHADDR=""
+BR2_TARGET_UBOOT_ENVIMAGE=y
+BR2_TARGET_UBOOT_ENVIMAGE_SOURCE="$(ARMADEUS_PATH)/u-boot-env-2013.04.txt"
+BR2_TARGET_UBOOT_ENVIMAGE_SIZE="0x20000"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="2.6.38.8"
diff --git a/buildroot/configs/apf51test_defconfig b/buildroot/configs/apf51test_defconfig
index 3ba31b0..e03a633 100644
--- a/buildroot/configs/apf51test_defconfig
+++ b/buildroot/configs/apf51test_defconfig
@@ -159,6 +159,9 @@ BR2_TARGET_UBOOT_SERVERIP="192.168.0.2"
BR2_TARGET_UBOOT_IPADDR="192.168.0.10"
BR2_TARGET_UBOOT_GATEWAY="192.168.0.1"
BR2_TARGET_UBOOT_ETHADDR=""
+BR2_TARGET_UBOOT_ENVIMAGE=y
+BR2_TARGET_UBOOT_ENVIMAGE_SOURCE="$(ARMADEUS_PATH)/u-boot-env-2013.04.txt"
+BR2_TARGET_UBOOT_ENVIMAGE_SIZE="0x20000"
BR2_LINUX_KERNEL=y
BR2_LINUX_KERNEL_CUSTOM_VERSION=y
BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="2.6.38.8"
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2013-08-02 12:35:35
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 0167dc67311bcb4200e39b1aa4c0b1b70d5e341b (commit)
from 7e97d2c53099150b57f92e3eafd68e9bb2f211bf (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 0167dc67311bcb4200e39b1aa4c0b1b70d5e341b
Author: Eric Jarrige <eri...@ar...>
Date: Fri Aug 2 14:44:07 2013 +0200
[BUILDROOT] add an external environment to be used by U-Boot
-----------------------------------------------------------------------
Summary of changes:
buildroot/target/device/armadeus/Makefile.in | 6 ++++
.../target/device/armadeus/u-boot-env-2013.04.txt | 28 ++++++++++++++++++++
2 files changed, 34 insertions(+), 0 deletions(-)
create mode 100644 buildroot/target/device/armadeus/u-boot-env-2013.04.txt
diff --git a/buildroot/target/device/armadeus/Makefile.in b/buildroot/target/device/armadeus/Makefile.in
index a37a8c4..a19c057 100644
--- a/buildroot/target/device/armadeus/Makefile.in
+++ b/buildroot/target/device/armadeus/Makefile.in
@@ -40,6 +40,12 @@ define UBOOT_POST_INSTALL_IMAGES_ACTION
@if [ ! -e "$(BINARIES_DIR)/$(BOARD_NAME)-u-boot-nand.bin" ]; then \
ln -sf $(BINARIES_DIR)/$(BOARD_NAME)-$(UBOOT_BIN) $(BINARIES_DIR)/$(BOARD_NAME)-u-boot-nand.bin ; \
fi
+ @if [ -e "$(BINARIES_DIR)/uboot-env.bin" ]; then \
+ rm -f $(BINARIES_DIR)/$(BOARD_NAME)-u-boot-env.bin ;\
+ mv $(BINARIES_DIR)/uboot-env.bin $(BINARIES_DIR)/$(BOARD_NAME)-u-boot-env.bin ; \
+ chmod a+r $(BINARIES_DIR)/$(BOARD_NAME)-u-boot-env.bin ; \
+ cp $(BR2_TARGET_UBOOT_ENVIMAGE_SOURCE) $(BINARIES_DIR)/$(BOARD_NAME)-u-boot-env.txt ; \
+ fi
endef
UBOOT_POST_INSTALL_IMAGES_HOOKS += UBOOT_POST_INSTALL_IMAGES_ACTION
diff --git a/buildroot/target/device/armadeus/u-boot-env-2013.04.txt b/buildroot/target/device/armadeus/u-boot-env-2013.04.txt
new file mode 100644
index 0000000..563f558
--- /dev/null
+++ b/buildroot/target/device/armadeus/u-boot-env-2013.04.txt
@@ -0,0 +1,28 @@
+# U-Boot / environment variable management scripts
+autoload=no
+# FPGA management scripts
+firmware_autoload=0
+flash_firmware=nand erase.part firmware;if nand write.trimffs ${fileaddr} ${firmware_addr} ${filesize};then echo Flashing of Firmware succeed;else echo Flashing of Firmware failed;fi
+# DTB management scripts
+download_dtb=tftpboot ${loadaddr} ${cpu_name}-${board_name}.dtb
+flash_dtb=nand erase.part dtb;if nand write.trimffs ${fileaddr} dtb ${filesize};then echo Flashing of rootfs succeed;else echo Flashing of rootfs failed;fi
+update_dtb=run download_dtb flash_dtb
+# kernel management scripts
+download_kernel=tftpboot ${loadaddr} ${board_name}-linux.bin
+flash_kernel=nand erase.part kernel;if nand write.trimffs ${fileaddr} ${kernel_addr} ${filesize};then echo Flashing of kernel succeed;else echo Flashing of kernel failed;fi
+update_kernel=run download_kernel flash_kernel
+# rootfs management scripts
+download_rootfs=tftpboot ${loadaddr} ${board_name}-rootfs.ubi
+flash_rootfs=nand erase.part rootfs;if nand write.trimffs ${fileaddr} ${rootfs_addr} ${filesize};then echo Flashing of rootfs succeed;else echo Flashing of rootfs failed;fi
+update_rootfs=run download_rootfs flash_rootfs
+# update management scripts
+update_all=run update_kernel update_rootfs update_env update_uboot
+# boot management scripts
+addipargs=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off
+addmmcargs=setenv bootargs ${bootargs} root=/dev/mmcblk0p1 rootfstype=ext2
+mmcboot=setenv bootargs console=${consoledev},${baudrate} ${mtdparts} ${extrabootargs}; run addmmcargs addipargs;if test -n ${fdt_addr_r} ; then nand read ${fdt_addr_r} dtb; fi;mmc dev 0; ext2load mmc 0 ${kernel_addr_r} /boot/${board_name}-linux.bin;bootm ${kernel_addr_r} - ${fdt_addr_r}
+addnfsargs=setenv bootargs ${bootargs} root=/dev/nfs rw nfsroot=${serverip}:${rootpath}
+nfsboot=setenv bootargs console=${consoledev},${baudrate} ${mtdparts} ${extrabootargs}; run addnfsargs addipargs;nfs ${kernel_addr_r} ${serverip}:${rootpath}/boot/${board_name}-linux.bin;if test -n ${fdt_addr_r} ; then nand read ${fdt_addr_r} dtb; fi;bootm ${kernel_addr_r} - ${fdt_addr_r}
+addubifsargs=setenv bootargs ${bootargs} ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs
+ubifsboot=setenv bootargs console=${consoledev},${baudrate} ${mtdparts} ${extrabootargs};run addubifsargs addipargs;if test -n ${fdt_addr_r} ; then nand read ${fdt_addr_r} dtb; fi;nboot ${kernel_addr_r} kernel;bootm ${kernel_addr_r} - ${fdt_addr_r}
+
hooks/post-receive
--
armadeus
|
|
From: Fabien M <fa...@us...> - 2013-08-01 09:49:59
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 7e97d2c53099150b57f92e3eafd68e9bb2f211bf (commit)
from 061b7847e268e708078d56a4a46ac9f222bf0c98 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 7e97d2c53099150b57f92e3eafd68e9bb2f211bf
Author: Fabien Marteau <fab...@ar...>
Date: Thu Aug 1 12:06:49 2013 +0200
[linux] microSD bug correction (patch 2.6.39-stable backport)
-----------------------------------------------------------------------
Summary of changes:
...kdev_get-should-access-bd_disk-only-after.patch | 40 ++++++++++++++++++++
1 files changed, 40 insertions(+), 0 deletions(-)
create mode 100644 patches/linux/2.6.38/452-BACKPORT_2_6_39-block-blkdev_get-should-access-bd_disk-only-after.patch
diff --git a/patches/linux/2.6.38/452-BACKPORT_2_6_39-block-blkdev_get-should-access-bd_disk-only-after.patch b/patches/linux/2.6.38/452-BACKPORT_2_6_39-block-blkdev_get-should-access-bd_disk-only-after.patch
new file mode 100644
index 0000000..956b041
--- /dev/null
+++ b/patches/linux/2.6.38/452-BACKPORT_2_6_39-block-blkdev_get-should-access-bd_disk-only-after.patch
@@ -0,0 +1,40 @@
+From 4c49ff3fe128ca68dabd07537415c419ad7f82f9 Mon Sep 17 00:00:00 2001
+From: Tejun Heo <tj...@ke...>
+Date: Wed, 1 Jun 2011 08:27:41 +0200
+Subject: block: blkdev_get() should access ->bd_disk only after
+ success
+
+From: Tejun Heo <tj...@ke...>
+
+commit 4c49ff3fe128ca68dabd07537415c419ad7f82f9 upstream.
+
+d4dc210f69 (block: don't block events on excl write for non-optical
+devices) added dereferencing of bdev->bd_disk to test
+GENHD_FL_BLOCK_EVENTS_ON_EXCL_WRITE; however, bdev->bd_disk can be
+%NULL if open failed which can lead to an oops.
+
+Test the flag after testing open was successful, not before.
+
+Signed-off-by: Tejun Heo <tj...@ke...>
+Reported-by: David Miller <da...@da...>
+Tested-by: David Miller <da...@da...>
+Signed-off-by: Jens Axboe <ja...@fu...>
+Signed-off-by: Greg Kroah-Hartman <gr...@su...>
+
+---
+ fs/block_dev.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/fs/block_dev.c
++++ b/fs/block_dev.c
+@@ -1272,8 +1272,8 @@ int blkdev_get(struct block_device *bdev
+ * individual writeable reference is too fragile given the
+ * way @mode is used in blkdev_get/put().
+ */
+- if ((disk->flags & GENHD_FL_BLOCK_EVENTS_ON_EXCL_WRITE) &&
+- !res && (mode & FMODE_WRITE) && !bdev->bd_write_holder) {
++ if (!res && (mode & FMODE_WRITE) && !bdev->bd_write_holder &&
++ (disk->flags & GENHD_FL_BLOCK_EVENTS_ON_EXCL_WRITE)) {
+ bdev->bd_write_holder = true;
+ disk_block_events(disk);
+ }
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2013-07-30 07:29:05
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 061b7847e268e708078d56a4a46ac9f222bf0c98 (commit)
from 57d710a544adb5215482a24ed5f4d2fa8e8da6fd (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 061b7847e268e708078d56a4a46ac9f222bf0c98
Author: Eric Jarrige <eri...@ar...>
Date: Tue Jul 30 09:37:33 2013 +0200
[UBOOT] apf51: recover settings dammaged with last commit
-----------------------------------------------------------------------
Summary of changes:
.../device/armadeus/apf51/apf51-u-boot-2013.04.h | 8 +++-----
1 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/buildroot/target/device/armadeus/apf51/apf51-u-boot-2013.04.h b/buildroot/target/device/armadeus/apf51/apf51-u-boot-2013.04.h
index fa98427..31f7aa5 100644
--- a/buildroot/target/device/armadeus/apf51/apf51-u-boot-2013.04.h
+++ b/buildroot/target/device/armadeus/apf51/apf51-u-boot-2013.04.h
@@ -47,11 +47,11 @@
#define CONFIG_SPL_STACK CONFIG_SYS_INIT_RAM_ADDR \
+ CONFIG_SYS_INIT_RAM_SIZE \
- 0x80000 /* MMU and IPL stack */
-/*#define CONFIG_SPL_LIBCOMMON_SUPPORT*/
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
-/*#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_GPIO_SUPPORT
-*/
+
/* NAND boot config */
#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_NAND_U_BOOT
@@ -86,9 +86,7 @@
#define CONFIG_CMD_DHCP /* DHCP Support */
#define CONFIG_CMD_DNS
#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_EXT4
#define CONFIG_CMD_FAT /* FAT support */
-#define CONFIG_CMD_FS_GENERIC
#define CONFIG_CMD_I2C /* I2C serial bus support */
#define CONFIG_CMD_IIM /* imx iim fuse */
#define CONFIG_CMD_MII /* MII support */
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2013-07-30 06:50:32
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 57d710a544adb5215482a24ed5f4d2fa8e8da6fd (commit)
via 0b35be7b7412a1c838d2ace488e253045a0f39e7 (commit)
from cefccdd82ac0d5b235fcfe187df9f57e62469019 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 57d710a544adb5215482a24ed5f4d2fa8e8da6fd
Author: Eric Jarrige <eri...@ar...>
Date: Tue Jul 30 08:58:49 2013 +0200
[OTHER] add GNU GPL version 2 licence information
commit 0b35be7b7412a1c838d2ace488e253045a0f39e7
Author: Eric Jarrige <eri...@ar...>
Date: Tue Jul 30 08:50:48 2013 +0200
[UBOOT] 2013.04: cleanup / replace config file full header by SPDX-Licence-identifier
-----------------------------------------------------------------------
Summary of changes:
target/linux/debug/imxssi/COPYING => COPYING | 41 ++++++++++----------
.../device/armadeus/apf27/apf27-u-boot-2013.04.h | 20 +---------
.../device/armadeus/apf28/apf28-u-boot-2013.04.h | 19 +--------
.../device/armadeus/apf51/apf51-u-boot-2013.04.h | 28 +++----------
.../armadeus/apf9328/apf9328-u-boot-2013.04.h | 19 +--------
5 files changed, 33 insertions(+), 94 deletions(-)
copy target/linux/debug/imxssi/COPYING => COPYING (95%)
diff --git a/target/linux/debug/imxssi/COPYING b/COPYING
similarity index 95%
copy from target/linux/debug/imxssi/COPYING
copy to COPYING
index d60c31a..d159169 100644
--- a/target/linux/debug/imxssi/COPYING
+++ b/COPYING
@@ -1,12 +1,12 @@
- GNU GENERAL PUBLIC LICENSE
- Version 2, June 1991
+ GNU GENERAL PUBLIC LICENSE
+ Version 2, June 1991
- Copyright (C) 1989, 1991 Free Software Foundation, Inc.
- 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
+ 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
Everyone is permitted to copy and distribute verbatim copies
of this license document, but changing it is not allowed.
- Preamble
+ Preamble
The licenses for most software are designed to take away your
freedom to share and change it. By contrast, the GNU General Public
@@ -15,7 +15,7 @@ software--to make sure the software is free for all its users. This
General Public License applies to most of the Free Software
Foundation's software and to any other program whose authors commit to
using it. (Some other Free Software Foundation software is covered by
-the GNU Library General Public License instead.) You can apply it to
+the GNU Lesser General Public License instead.) You can apply it to
your programs, too.
When we speak of free software, we are referring to freedom, not
@@ -55,8 +55,8 @@ patent must be licensed for everyone's free use or not licensed at all.
The precise terms and conditions for copying, distribution and
modification follow.
-
- GNU GENERAL PUBLIC LICENSE
+
+ GNU GENERAL PUBLIC LICENSE
TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
0. This License applies to any program or other work which contains
@@ -110,7 +110,7 @@ above, provided that you also meet all of these conditions:
License. (Exception: if the Program itself is interactive but
does not normally print such an announcement, your work based on
the Program is not required to print an announcement.)
-
+
These requirements apply to the modified work as a whole. If
identifiable sections of that work are not derived from the Program,
and can be reasonably considered independent and separate works in
@@ -168,7 +168,7 @@ access to copy from a designated place, then offering equivalent
access to copy the source code from the same place counts as
distribution of the source code, even though third parties are not
compelled to copy the source along with the object code.
-
+
4. You may not copy, modify, sublicense, or distribute the Program
except as expressly provided under this License. Any attempt
otherwise to copy, modify, sublicense or distribute the Program is
@@ -225,7 +225,7 @@ impose that choice.
This section is intended to make thoroughly clear what is believed to
be a consequence of the rest of this License.
-
+
8. If the distribution and/or use of the Program is restricted in
certain countries either by patents or by copyrighted interfaces, the
original copyright holder who places the Program under this License
@@ -255,7 +255,7 @@ make exceptions for this. Our decision will be guided by the two goals
of preserving the free status of all derivatives of our free software and
of promoting the sharing and reuse of software generally.
- NO WARRANTY
+ NO WARRANTY
11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
@@ -277,9 +277,9 @@ YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
POSSIBILITY OF SUCH DAMAGES.
- END OF TERMS AND CONDITIONS
-
- How to Apply These Terms to Your New Programs
+ END OF TERMS AND CONDITIONS
+
+ How to Apply These Terms to Your New Programs
If you develop a new program, and you want it to be of the greatest
possible use to the public, the best way to achieve this is to make it
@@ -303,17 +303,16 @@ the "copyright" line and a pointer to where the full notice is found.
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
Also add information on how to contact you by electronic and paper mail.
If the program is interactive, make it output a short notice like this
when it starts in an interactive mode:
- Gnomovision version 69, Copyright (C) year name of author
+ Gnomovision version 69, Copyright (C) year name of author
Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.
@@ -336,5 +335,5 @@ necessary. Here is a sample; alter the names:
This General Public License does not permit incorporating your program into
proprietary programs. If your program is a subroutine library, you may
consider it more useful to permit linking proprietary applications with the
-library. If this is what you want to do, use the GNU Library General
+library. If this is what you want to do, use the GNU Lesser General
Public License instead of this License.
diff --git a/buildroot/target/device/armadeus/apf27/apf27-u-boot-2013.04.h b/buildroot/target/device/armadeus/apf27/apf27-u-boot-2013.04.h
index a6e6d26..416a750 100644
--- a/buildroot/target/device/armadeus/apf27/apf27-u-boot-2013.04.h
+++ b/buildroot/target/device/armadeus/apf27/apf27-u-boot-2013.04.h
@@ -1,23 +1,7 @@
/*
+ * Copyright (C) 2008-2013 Eric Jarrige <eri...@ar...>
*
- * Configuration settings for the Armadeus Project motherboard APF27
- *
- * Copyright (C) 2008-2012 ej / Armadeus Project <eri...@ar...>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:Â Â Â Â Â GPL-2.0+
*/
#ifndef __CONFIG_H
diff --git a/buildroot/target/device/armadeus/apf28/apf28-u-boot-2013.04.h b/buildroot/target/device/armadeus/apf28/apf28-u-boot-2013.04.h
index 3dcaced..1cb9d61 100644
--- a/buildroot/target/device/armadeus/apf28/apf28-u-boot-2013.04.h
+++ b/buildroot/target/device/armadeus/apf28/apf28-u-boot-2013.04.h
@@ -1,22 +1,7 @@
/*
- * Configuration settings for the Armadeus Project APF28 module.
+ * Copyright (C) 2011-2013 Eric Jarrige <eri...@ar...>
*
- * Copyright (C) 2011-2012 ej / Armadeus Project <eri...@ar...>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:Â Â Â Â Â GPL-2.0+
*/
#ifndef __CONFIG_H
diff --git a/buildroot/target/device/armadeus/apf51/apf51-u-boot-2013.04.h b/buildroot/target/device/armadeus/apf51/apf51-u-boot-2013.04.h
index 0566a21..fa98427 100644
--- a/buildroot/target/device/armadeus/apf51/apf51-u-boot-2013.04.h
+++ b/buildroot/target/device/armadeus/apf51/apf51-u-boot-2013.04.h
@@ -1,23 +1,7 @@
/*
+ * Copyright (C) 2010-2013 Eric Jarrige <eri...@ar...>
*
- * Configuration settings for the Armadeus Project motherboard APF51
- *
- * Copyright (C) 2010-2013 ej / Armadeus Project <eri...@ar...>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:Â Â Â Â Â GPL-2.0+
*/
#ifndef __CONFIG_H
@@ -63,11 +47,11 @@
#define CONFIG_SPL_STACK CONFIG_SYS_INIT_RAM_ADDR \
+ CONFIG_SYS_INIT_RAM_SIZE \
- 0x80000 /* MMU and IPL stack */
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
+/*#define CONFIG_SPL_LIBCOMMON_SUPPORT*/
#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
+/*#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_GPIO_SUPPORT
-
+*/
/* NAND boot config */
#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_NAND_U_BOOT
@@ -102,7 +86,9 @@
#define CONFIG_CMD_DHCP /* DHCP Support */
#define CONFIG_CMD_DNS
#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_EXT4
#define CONFIG_CMD_FAT /* FAT support */
+#define CONFIG_CMD_FS_GENERIC
#define CONFIG_CMD_I2C /* I2C serial bus support */
#define CONFIG_CMD_IIM /* imx iim fuse */
#define CONFIG_CMD_MII /* MII support */
diff --git a/buildroot/target/device/armadeus/apf9328/apf9328-u-boot-2013.04.h b/buildroot/target/device/armadeus/apf9328/apf9328-u-boot-2013.04.h
index 98fd250..d75c8a4 100644
--- a/buildroot/target/device/armadeus/apf9328/apf9328-u-boot-2013.04.h
+++ b/buildroot/target/device/armadeus/apf9328/apf9328-u-boot-2013.04.h
@@ -1,22 +1,7 @@
/*
- * Configuration settings for the Armadeus Project motherboard APF9328
+ * Copyright (C) 2005-2013 Eric Jarrige <eri...@ar...>
*
- * Copyright (C) 2005-2012 ej / Armadeus Project <eri...@ar...>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:Â Â Â Â Â GPL-2.0+
*/
#ifndef __CONFIG_H
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2013-07-28 21:35:58
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via cefccdd82ac0d5b235fcfe187df9f57e62469019 (commit)
from 1ebf83c5922a3f3bed7b8c4752ea058ba98ec497 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit cefccdd82ac0d5b235fcfe187df9f57e62469019
Author: Philippe Reynes <tr...@ya...>
Date: Fri Jul 26 14:52:45 2013 +0200
[LINUX] 3.10: move to 3.10.3
Signed-off-by: Philippe Reynes <tr...@ya...>
-----------------------------------------------------------------------
Summary of changes:
...nux-3.10.1.config => apf27-linux-3.10.3.config} | 0
patches/linux/{3.10.1 => 3.10.3} | 0
2 files changed, 0 insertions(+), 0 deletions(-)
rename buildroot/target/device/armadeus/apf27/{apf27-linux-3.10.1.config => apf27-linux-3.10.3.config} (100%)
rename patches/linux/{3.10.1 => 3.10.3} (100%)
diff --git a/buildroot/target/device/armadeus/apf27/apf27-linux-3.10.1.config b/buildroot/target/device/armadeus/apf27/apf27-linux-3.10.3.config
similarity index 100%
rename from buildroot/target/device/armadeus/apf27/apf27-linux-3.10.1.config
rename to buildroot/target/device/armadeus/apf27/apf27-linux-3.10.3.config
diff --git a/patches/linux/3.10.1 b/patches/linux/3.10.3
similarity index 100%
rename from patches/linux/3.10.1
rename to patches/linux/3.10.3
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2013-07-28 21:29:34
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 1ebf83c5922a3f3bed7b8c4752ea058ba98ec497 (commit)
from fa65c74a1f1d80e5e5d461c2b4a4c9ebb5976a16 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 1ebf83c5922a3f3bed7b8c4752ea058ba98ec497
Author: Eric Jarrige <eri...@ar...>
Date: Sun Jul 28 23:37:53 2013 +0200
[UBOOT] 2013.04: apf51: fix mmc card detect
-----------------------------------------------------------------------
Summary of changes:
patches/u-boot/2013.04/401-apf51.patch | 23 +++++++++++++++++------
1 files changed, 17 insertions(+), 6 deletions(-)
diff --git a/patches/u-boot/2013.04/401-apf51.patch b/patches/u-boot/2013.04/401-apf51.patch
index 3ef1ef7..66a5455 100644
--- a/patches/u-boot/2013.04/401-apf51.patch
+++ b/patches/u-boot/2013.04/401-apf51.patch
@@ -67,7 +67,7 @@ new file mode 100644
index 0000000..8ff1381
--- /dev/null
+++ b/board/armadeus/apf51/apf51.c
-@@ -0,0 +1,1193 @@
+@@ -0,0 +1,1204 @@
+/*
+ * (C) Copyright 2010-2013 Eric Jarrige, Armadeus Project
+ *
@@ -97,6 +97,7 @@ index 0000000..8ff1381
+#include <asm/arch/clock.h>
+#include <asm/arch/crm_regs.h>
+#include <asm/arch/iomux.h>
++#include <asm/arch/iomux-mx51.h>
+#include <asm/arch/regs_esdctl.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/gpio.h>
@@ -106,6 +107,7 @@ index 0000000..8ff1381
+#include <fsl_esdhc.h>
+#include "fpga.h"
+#include <nand.h>
++#include <mmc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
@@ -833,6 +835,15 @@ index 0000000..8ff1381
+ {MMC_SDHC2_BASE_ADDR},
+};
+
++int board_mmc_getcd(struct mmc *mmc)
++{
++ struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
++ int ret = 0;
++ if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR)
++ ret = !gpio_get_value(IMX_GPIO_NR(2, 29));
++ return ret;
++}
++
+#define SD_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | \
+ PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU | \
+ PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | \
@@ -844,11 +855,11 @@ index 0000000..8ff1381
+
+ switch (esdh_addr) {
+ case MMC_SDHC1_BASE_ADDR:
-+/*
-+ mxc_request_iomux(MX51_PIN_GPIO1_0, IOMUX_CONFIG_ALT0 |
-+ IOMUX_CONFIG_SION);
-+ mxc_iomux_set_pad(MX51_PIN_GPIO1_0, SD_PAD_CFG);
-+*/
++
++ /* SD1_CD */
++ imx_iomux_v3_setup_pad(MX51_PAD_EIM_CS4__GPIO2_29);
++ gpio_direction_input(IMX_GPIO_NR(2, 29));
++
+ /* SD1_CMD */
+ mxc_request_iomux(MX51_PIN_SD1_CMD, IOMUX_CONFIG_ALT0 |
+ IOMUX_CONFIG_SION);
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2013-07-25 12:53:26
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via fa65c74a1f1d80e5e5d461c2b4a4c9ebb5976a16 (commit)
from 98ecd8696cb12a5fb20ef6c3e6109aa2a5970fe4 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit fa65c74a1f1d80e5e5d461c2b4a4c9ebb5976a16
Author: Eric Jarrige <eri...@ar...>
Date: Thu Jul 25 15:04:00 2013 +0200
[UBOOT] 2013.04: remove spartan6 patch. now natively supported by U-Boot
-----------------------------------------------------------------------
Summary of changes:
patches/u-boot/2013.04/321-add_spartan6.patch | 763 -------------------------
1 files changed, 0 insertions(+), 763 deletions(-)
delete mode 100644 patches/u-boot/2013.04/321-add_spartan6.patch
diff --git a/patches/u-boot/2013.04/321-add_spartan6.patch b/patches/u-boot/2013.04/321-add_spartan6.patch
deleted file mode 100644
index 689db28..0000000
--- a/patches/u-boot/2013.04/321-add_spartan6.patch
+++ /dev/null
@@ -1,763 +0,0 @@
-Add suport for Spartan 6.
-
-Signed-off-by: Eric Jarrige <eri...@ar...>
-Signed-off-by: Philippe Reynes <tr...@ya...>
-Signed-off-by: Nicolas Colombain <nic...@ar...>
----
- README | 2 +-
- drivers/fpga/Makefile | 1 +
- drivers/fpga/spartan6.c | 538 +++++++++++++++++++++++++++++++++++++++++++++++
- drivers/fpga/xilinx.c | 1 +
- include/spartan6.h | 132 ++++++++++++
- include/xilinx.h | 3 +
- 6 files changed, 676 insertions(+), 1 deletions(-)
- create mode 100644 drivers/fpga/spartan6.c
- create mode 100644 include/spartan6.h
-
-diff --git a/README b/README
-index dd250a0..d97bc04 100644
---- a/README
-+++ b/README
-@@ -2134,7 +2134,7 @@ The following options need to be configured:
- CONFIG_FPGA_<family>
-
- Enables support for FPGA family.
-- (SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)
-+ (SPARTAN2, SPARTAN3,SPARTAN6, VIRTEX2, CYCLONE2, ACEX1K, ACEX)
-
- CONFIG_FPGA_COUNT
-
-diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
-index b48f623..e3fad66 100644
---- a/drivers/fpga/Makefile
-+++ b/drivers/fpga/Makefile
-@@ -29,6 +29,7 @@ ifdef CONFIG_FPGA
- COBJS-y += fpga.o
- COBJS-$(CONFIG_FPGA_SPARTAN2) += spartan2.o
- COBJS-$(CONFIG_FPGA_SPARTAN3) += spartan3.o
-+COBJS-$(CONFIG_FPGA_SPARTAN6) += spartan6.o
- COBJS-$(CONFIG_FPGA_VIRTEX2) += virtex2.o
- COBJS-$(CONFIG_FPGA_XILINX) += xilinx.o
- COBJS-$(CONFIG_FPGA_LATTICE) += ivm_core.o lattice.o
-diff --git a/drivers/fpga/spartan6.c b/drivers/fpga/spartan6.c
-new file mode 100644
-index 0000000..2c25f4b
---- /dev/null
-+++ b/drivers/fpga/spartan6.c
-@@ -0,0 +1,538 @@
-+/*
-+ * (C) Copyright 2010 Fabien Marteau <fab...@ar...>
-+ * Sponsorised by ARMadeus Systems.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ *
-+ */
-+
-+/*
-+ * Configuration support for Xilinx Spartan6 devices. Based
-+ * on spartan6.c (Rich Ireland, rir...@en...).
-+ */
-+
-+#include <common.h> /* core U-Boot definitions */
-+#include <spartan6.h> /* Spartan-II device family */
-+
-+#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_SPARTAN6)
-+
-+/* Define FPGA_DEBUG to get debug printf's */
-+#ifdef FPGA_DEBUG
-+#define PRINTF(fmt,args...) printf (fmt ,##args)
-+#else
-+#define PRINTF(fmt,args...)
-+#endif
-+
-+#undef CONFIG_SYS_FPGA_CHECK_BUSY
-+#undef CONFIG_SYS_FPGA_PROG_FEEDBACK
-+
-+/* Note: The assumption is that we cannot possibly run fast enough to
-+ * overrun the device (the Slave Parallel mode can free run at 50MHz).
-+ * If there is a need to operate slower, define CONFIG_FPGA_DELAY in
-+ * the board config file to slow things down.
-+ */
-+#ifndef CONFIG_FPGA_DELAY
-+#define CONFIG_FPGA_DELAY()
-+#endif
-+
-+#ifndef CONFIG_SYS_FPGA_WAIT
-+#define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/100 /* 10 ms */
-+#endif
-+
-+static int Spartan6_sp_load( Xilinx_desc *desc, void *buf, size_t bsize );
-+static int Spartan6_sp_dump( Xilinx_desc *desc, void *buf, size_t bsize );
-+/* static int Spartan6_sp_info( Xilinx_desc *desc ); */
-+static int Spartan6_sp_reloc( Xilinx_desc *desc, ulong reloc_offset );
-+
-+static int Spartan6_ss_load( Xilinx_desc *desc, void *buf, size_t bsize );
-+static int Spartan6_ss_dump( Xilinx_desc *desc, void *buf, size_t bsize );
-+/* static int Spartan6_ss_info( Xilinx_desc *desc ); */
-+static int Spartan6_ss_reloc( Xilinx_desc *desc, ulong reloc_offset );
-+static int Spartan6_ssm_reloc( Xilinx_desc *desc, ulong reloc_offset );
-+
-+/* ------------------------------------------------------------------------- */
-+/* Spartan-II Generic Implementation */
-+int Spartan6_load (Xilinx_desc * desc, void *buf, size_t bsize)
-+{
-+ int ret_val = FPGA_FAIL;
-+
-+ printf("ERROR: spartan6 simple load function is not implemented\n");
-+
-+ return ret_val;
-+}
-+
-+/* ------------------------------------------------------------------------- */
-+/* Spartan-VI Generic Implementation */
-+int Spartan6_dump (Xilinx_desc * desc, void *buf, size_t bsize)
-+{
-+ int ret_val = FPGA_FAIL;
-+
-+
-+ return ret_val;
-+}
-+
-+int Spartan6_info( Xilinx_desc *desc )
-+{
-+ return FPGA_SUCCESS;
-+}
-+
-+
-+int Spartan6_reloc (Xilinx_desc * desc, ulong reloc_offset)
-+{
-+ int ret_val = FPGA_FAIL; /* assume a failure */
-+
-+ if (desc->family != Xilinx_Spartan6) {
-+ printf ("%s: Unsupported family type (spartan6 line %d), %d\n",
-+ __FUNCTION__, __LINE__, desc->family);
-+ return FPGA_FAIL;
-+ } else
-+ switch (desc->iface) {
-+ case slave_serial:
-+ ret_val = Spartan6_ss_reloc (desc, reloc_offset);
-+ break;
-+
-+ case slave_parallel:
-+ ret_val = Spartan6_sp_reloc (desc, reloc_offset);
-+ break;
-+
-+ case slave_selectmap:
-+ ret_val = Spartan6_ssm_reloc (desc, reloc_offset);
-+ break;
-+
-+ default:
-+ printf ("%s: Unsupported interface type (spartan6 line %d), %d\n",
-+ __FUNCTION__, __LINE__, desc->iface);
-+ }
-+
-+ return ret_val;
-+}
-+
-+/* ------------------------------------------------------------------------- */
-+/* Spartan-VI Slave Parallel Generic Implementation */
-+static int Spartan6_sp_load (Xilinx_desc * desc, void *buf, size_t bsize)
-+{
-+ int ret_val = FPGA_FAIL; /* assume the worst */
-+ Xilinx_Spartan6_Slave_Parallel_fns *fn = desc->iface_fns;
-+
-+ PRINTF ("%s: start with interface functions @ 0x%p\n",
-+ __FUNCTION__, fn);
-+
-+ if (fn) {
-+ size_t bytecount = 0;
-+ unsigned char *data = (unsigned char *) buf;
-+ int cookie = desc->cookie; /* make a local copy */
-+ unsigned long ts; /* timestamp */
-+
-+ PRINTF ("%s: Function Table:\n"
-+ "ptr:\t0x%p\n"
-+ "struct: 0x%p\n"
-+ "pre: 0x%p\n"
-+ "pgm:\t0x%p\n"
-+ "init:\t0x%p\n"
-+ "err:\t0x%p\n"
-+ "clk:\t0x%p\n"
-+ "cs:\t0x%p\n"
-+ "wr:\t0x%p\n"
-+ "read data:\t0x%p\n"
-+ "write data:\t0x%p\n"
-+ "busy:\t0x%p\n"
-+ "abort:\t0x%p\n",
-+ "post:\t0x%p\n\n",
-+ __FUNCTION__, &fn, fn, fn->pre, fn->pgm, fn->init, fn->err,
-+ fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata, fn->busy,
-+ fn->abort, fn->post);
-+
-+ /*
-+ * This code is designed to emulate the "Express Style"
-+ * Continuous Data Loading in Slave Parallel Mode for
-+ * the Spartan-II Family.
-+ */
-+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
-+ printf ("Loading FPGA Device %d...\n", cookie);
-+#endif
-+ /*
-+ * Run the pre configuration function if there is one.
-+ */
-+ if (*fn->pre) {
-+ (*fn->pre) (cookie);
-+ }
-+
-+ /* Establish the initial state */
-+ (*fn->pgm) (TRUE, TRUE, cookie); /* Assert the program, commit */
-+
-+ /* Get ready for the burn */
-+ CONFIG_FPGA_DELAY ();
-+ (*fn->pgm) (FALSE, TRUE, cookie); /* Deassert the program, commit */
-+
-+ ts = get_timer (0); /* get current time */
-+ /* Now wait for INIT and BUSY to go high */
-+ do {
-+ CONFIG_FPGA_DELAY ();
-+ if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
-+ puts ("** Timeout waiting for INIT to clear.\n");
-+ (*fn->abort) (cookie); /* abort the burn */
-+ return FPGA_FAIL;
-+ }
-+ } while ((*fn->init) (cookie) && (*fn->busy) (cookie));
-+
-+ (*fn->wr) (TRUE, TRUE, cookie); /* Assert write, commit */
-+ (*fn->cs) (TRUE, TRUE, cookie); /* Assert chip select, commit */
-+ (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
-+
-+ /* Load the data */
-+ while ( (*fn->done) (cookie) == FPGA_FAIL){
-+ /* XXX - do we check for an Ctrl-C press in here ??? */
-+ /* XXX - Check the error bit? */
-+
-+ (*fn->wdata) (data[bytecount++], TRUE, cookie); /* write the data */
-+ CONFIG_FPGA_DELAY ();
-+ (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
-+ CONFIG_FPGA_DELAY ();
-+ (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
-+
-+ ts = get_timer (0); /* get current time */
-+#ifdef CONFIG_SYS_FPGA_CHECK_BUSY
-+ while ((*fn->busy) (cookie)) {
-+ /* XXX - we should have a check in here somewhere to
-+ * make sure we aren't busy forever... */
-+
-+ CONFIG_FPGA_DELAY ();
-+ (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
-+ CONFIG_FPGA_DELAY ();
-+ (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
-+
-+ if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
-+ puts ("** Timeout waiting for BUSY to clear.\n");
-+ (*fn->abort) (cookie); /* abort the burn */
-+ return FPGA_FAIL;
-+ }
-+ }
-+#endif
-+ if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
-+ puts ("** Timeout waiting for BUSY to clear.\n");
-+ (*fn->abort) (cookie); /* abort the burn */
-+ return FPGA_FAIL;
-+ }
-+
-+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
-+ if (bytecount % (bsize / 40) == 0)
-+ putc ('.'); /* let them know we are alive */
-+#endif
-+ }
-+
-+ CONFIG_FPGA_DELAY ();
-+ (*fn->cs) (FALSE, TRUE, cookie); /* Deassert the chip select */
-+ (*fn->wr) (FALSE, TRUE, cookie); /* Deassert the write pin */
-+
-+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
-+ putc ('\n'); /* terminate the dotted line */
-+#endif
-+
-+ /* now check for done signal */
-+ ts = get_timer (0); /* get current time */
-+ ret_val = FPGA_SUCCESS;
-+ while ((*fn->done) (cookie) == FPGA_FAIL) {
-+ /* XXX - we should have a check in here somewhere to
-+ * make sure we aren't busy forever... */
-+
-+ CONFIG_FPGA_DELAY ();
-+ (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
-+ CONFIG_FPGA_DELAY ();
-+ (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
-+
-+ if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
-+ puts ("** Timeout waiting for DONE to clear.\n");
-+ (*fn->abort) (cookie); /* abort the burn */
-+ ret_val = FPGA_FAIL;
-+ break;
-+ }
-+ }
-+
-+ if (ret_val == FPGA_SUCCESS) {
-+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
-+ puts ("Done.\n");
-+#endif
-+ }
-+ /*
-+ * Run the post configuration function if there is one.
-+ */
-+ if (*fn->post) {
-+ (*fn->post) (cookie);
-+ }
-+
-+ else {
-+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
-+ puts ("Fail.\n");
-+#endif
-+ }
-+
-+ } else {
-+ printf ("%s: NULL Interface function table!\n", __FUNCTION__);
-+ }
-+
-+ return ret_val;
-+}
-+
-+static int Spartan6_sp_dump (Xilinx_desc * desc, void *buf, size_t bsize)
-+{
-+ int ret_val = FPGA_FAIL; /* assume the worst */
-+ Xilinx_Spartan6_Slave_Parallel_fns *fn = desc->iface_fns;
-+
-+ if (fn) {
-+ unsigned char *data = (unsigned char *) buf;
-+ size_t bytecount = 0;
-+ int cookie = desc->cookie; /* make a local copy */
-+
-+ printf ("Starting Dump of FPGA Device %d...\n", cookie);
-+
-+ (*fn->cs) (TRUE, TRUE, cookie); /* Assert chip select, commit */
-+ (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
-+
-+ /* dump the data */
-+ while (bytecount < bsize) {
-+ /* XXX - do we check for an Ctrl-C press in here ??? */
-+
-+ (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
-+ (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
-+ (*fn->rdata) (&(data[bytecount++]), cookie); /* read the data */
-+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
-+ if (bytecount % (bsize / 40) == 0)
-+ putc ('.'); /* let them know we are alive */
-+#endif
-+ }
-+
-+ (*fn->cs) (FALSE, FALSE, cookie); /* Deassert the chip select */
-+ (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
-+ (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
-+
-+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
-+ putc ('\n'); /* terminate the dotted line */
-+#endif
-+ puts ("Done.\n");
-+
-+ /* XXX - checksum the data? */
-+ } else {
-+ printf ("%s: NULL Interface function table!\n", __FUNCTION__);
-+ }
-+
-+ return ret_val;
-+}
-+
-+
-+static int Spartan6_sp_reloc (Xilinx_desc * desc, ulong reloc_offset)
-+{
-+ int ret_val = FPGA_FAIL; /* assume the worst */
-+ Xilinx_Spartan6_Slave_Parallel_fns *fn_r, *fn =
-+ (Xilinx_Spartan6_Slave_Parallel_fns *) (desc->iface_fns);
-+
-+ if (fn) {
-+ ulong addr;
-+
-+ /* Get the relocated table address */
-+ addr = (ulong) fn + reloc_offset;
-+ fn_r = (Xilinx_Spartan6_Slave_Parallel_fns *) addr;
-+
-+ if (!fn_r->relocated) {
-+
-+ if (memcmp (fn_r, fn,
-+ sizeof (Xilinx_Spartan6_Slave_Parallel_fns))
-+ == 0) {
-+ /* good copy of the table, fix the descriptor pointer */
-+ desc->iface_fns = fn_r;
-+ } else {
-+ PRINTF ("%s: Invalid function table at 0x%p\n",
-+ __FUNCTION__, fn_r);
-+ return FPGA_FAIL;
-+ }
-+
-+ PRINTF ("%s: Relocating descriptor at 0x%p\n", __FUNCTION__,
-+ desc);
-+
-+ addr = (ulong) (fn->pre) + reloc_offset;
-+ fn_r->pre = (Xilinx_pre_fn) addr;
-+
-+ addr = (ulong) (fn->pgm) + reloc_offset;
-+ fn_r->pgm = (Xilinx_pgm_fn) addr;
-+
-+ addr = (ulong) (fn->init) + reloc_offset;
-+ fn_r->init = (Xilinx_init_fn) addr;
-+
-+ addr = (ulong) (fn->done) + reloc_offset;
-+ fn_r->done = (Xilinx_done_fn) addr;
-+
-+ addr = (ulong) (fn->clk) + reloc_offset;
-+ fn_r->clk = (Xilinx_clk_fn) addr;
-+
-+ addr = (ulong) (fn->err) + reloc_offset;
-+ fn_r->err = (Xilinx_err_fn) addr;
-+
-+ addr = (ulong) (fn->cs) + reloc_offset;
-+ fn_r->cs = (Xilinx_cs_fn) addr;
-+
-+ addr = (ulong) (fn->wr) + reloc_offset;
-+ fn_r->wr = (Xilinx_wr_fn) addr;
-+
-+ addr = (ulong) (fn->rdata) + reloc_offset;
-+ fn_r->rdata = (Xilinx_rdata_fn) addr;
-+
-+ addr = (ulong) (fn->wdata) + reloc_offset;
-+ fn_r->wdata = (Xilinx_wdata_fn) addr;
-+
-+ addr = (ulong) (fn->busy) + reloc_offset;
-+ fn_r->busy = (Xilinx_busy_fn) addr;
-+
-+ addr = (ulong) (fn->abort) + reloc_offset;
-+ fn_r->abort = (Xilinx_abort_fn) addr;
-+
-+ addr = (ulong) (fn->post) + reloc_offset;
-+ fn_r->post = (Xilinx_post_fn) addr;
-+
-+ fn_r->relocated = TRUE;
-+
-+ } else {
-+ /* this table has already been moved */
-+ /* XXX - should check to see if the descriptor is correct */
-+ desc->iface_fns = fn_r;
-+ }
-+
-+ ret_val = FPGA_SUCCESS;
-+ } else {
-+ printf ("%s: NULL Interface function table!\n", __FUNCTION__);
-+ }
-+
-+ return ret_val;
-+
-+}
-+
-+/* ------------------------------------------------------------------------- */
-+
-+static int Spartan6_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
-+{
-+ int ret_val = FPGA_FAIL; /* assume the worst */
-+
-+ printf ("%s: Slave Serial load is unavailable\n",
-+ __FUNCTION__);
-+
-+ return ret_val;
-+}
-+
-+static int Spartan6_ss_dump (Xilinx_desc * desc, void *buf, size_t bsize)
-+{
-+ /* Readback is only available through the Slave Parallel and */
-+ /* boundary-scan interfaces. */
-+ printf ("%s: Slave Serial Dumping is unavailable\n",
-+ __FUNCTION__);
-+ return FPGA_FAIL;
-+}
-+
-+static int Spartan6_ss_reloc (Xilinx_desc * desc, ulong reloc_offset)
-+{
-+ int ret_val = FPGA_FAIL; /* assume the worst */
-+
-+ printf ("%s: Slave Serial reloc is unavailable\n",
-+ __FUNCTION__);
-+
-+ return ret_val;
-+
-+}
-+
-+static int Spartan6_ssm_reloc (Xilinx_desc * desc, ulong reloc_offset)
-+{
-+ int ret_val = FPGA_FAIL; /* assume the worst */
-+
-+ Xilinx_Spartan6_Slave_SelectMap_fns *fn_r, *fn =
-+ (Xilinx_Spartan6_Slave_SelectMap_fns *) (desc->iface_fns);
-+
-+ if (fn) {
-+ ulong addr;
-+
-+ /* Get the relocated table address */
-+ addr = (ulong) fn + reloc_offset;
-+ fn_r = (Xilinx_Spartan6_Slave_SelectMap_fns *) addr;
-+
-+ if (!fn_r->relocated) {
-+
-+ if (memcmp (fn_r, fn,
-+ sizeof (Xilinx_Spartan6_Slave_SelectMap_fns))
-+ == 0) {
-+ /* good copy of the table, fix the descriptor pointer */
-+ desc->iface_fns = fn_r;
-+ } else {
-+ PRINTF ("%s: Invalid function table at 0x%p\n",
-+ __FUNCTION__, fn_r);
-+ return FPGA_FAIL;
-+ }
-+
-+ PRINTF ("%s: Relocating descriptor at 0x%p\n", __FUNCTION__,
-+ desc);
-+
-+ addr = (ulong) (fn->pre) + reloc_offset;
-+ fn_r->pre = (Xilinx_pre_fn) addr;
-+
-+ addr = (ulong) (fn->pgm) + reloc_offset;
-+ fn_r->pgm = (Xilinx_pgm_fn) addr;
-+
-+ addr = (ulong) (fn->init) + reloc_offset;
-+ fn_r->init = (Xilinx_init_fn) addr;
-+
-+ addr = (ulong) (fn->done) + reloc_offset;
-+ fn_r->done = (Xilinx_done_fn) addr;
-+
-+ addr = (ulong) (fn->clk) + reloc_offset;
-+ fn_r->clk = (Xilinx_clk_fn) addr;
-+
-+ addr = (ulong) (fn->err) + reloc_offset;
-+ fn_r->err = (Xilinx_err_fn) addr;
-+
-+ addr = (ulong) (fn->cs) + reloc_offset;
-+ fn_r->cs = (Xilinx_cs_fn) addr;
-+
-+ addr = (ulong) (fn->wr) + reloc_offset;
-+ fn_r->wr = (Xilinx_wr_fn) addr;
-+
-+ addr = (ulong) (fn->rdata) + reloc_offset;
-+ fn_r->rdata = (Xilinx_rdata_fn) addr;
-+
-+ addr = (ulong) (fn->wdata) + reloc_offset;
-+ fn_r->wdata = (Xilinx_wdata_fn) addr;
-+
-+ addr = (ulong) (fn->busy) + reloc_offset;
-+ fn_r->busy = (Xilinx_busy_fn) addr;
-+
-+ addr = (ulong) (fn->abort) + reloc_offset;
-+ fn_r->abort = (Xilinx_abort_fn) addr;
-+
-+ addr = (ulong) (fn->post) + reloc_offset;
-+ fn_r->post = (Xilinx_post_fn) addr;
-+
-+ fn_r->relocated = TRUE;
-+
-+ } else {
-+ /* this table has already been moved */
-+ /* XXX - should check to see if the descriptor is correct */
-+ desc->iface_fns = fn_r;
-+ }
-+
-+ ret_val = FPGA_SUCCESS;
-+ } else {
-+ printf ("%s: NULL Interface function table!\n", __FUNCTION__);
-+ }
-+
-+
-+ return ret_val;
-+
-+}
-+#endif
-diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
-index 4072cb4..1290793 100644
---- a/drivers/fpga/xilinx.c
-+++ b/drivers/fpga/xilinx.c
-@@ -31,6 +31,7 @@
- #include <virtex2.h>
- #include <spartan2.h>
- #include <spartan3.h>
-+#include <spartan6.h>
-
- #if 0
- #define FPGA_DEBUG
-diff --git a/include/spartan6.h b/include/spartan6.h
-new file mode 100644
-index 0000000..3f648a0
---- /dev/null
-+++ b/include/spartan6.h
-@@ -0,0 +1,132 @@
-+/*
-+ * (C) Copyright 2010-2011 Fabien Marteau <fab...@ar...>
-+ * Sponsorised by ARMadeus Systems.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ *
-+ */
-+
-+/*
-+ * Configuration support for Xilinx Spartan6 devices. Based
-+ * on spartan2.h (Rich Ireland, rir...@en...).
-+ */
-+
-+#ifndef _SPARTAN6_H_
-+#define _SPARTAN6_H_
-+
-+#include <xilinx.h>
-+
-+extern int Spartan6_load( Xilinx_desc *desc, void *image, size_t size );
-+extern int Spartan6_dump( Xilinx_desc *desc, void *buf, size_t bsize );
-+extern int Spartan6_info( Xilinx_desc *desc );
-+extern int Spartan6_reloc( Xilinx_desc *desc, ulong reloc_off );
-+
-+/* Slave Parallel Implementation function table */
-+typedef struct {
-+ Xilinx_pre_fn pre;
-+ Xilinx_pgm_fn pgm;
-+ Xilinx_init_fn init;
-+ Xilinx_err_fn err;
-+ Xilinx_done_fn done;
-+ Xilinx_clk_fn clk;
-+ Xilinx_cs_fn cs;
-+ Xilinx_wr_fn wr;
-+ Xilinx_rdata_fn rdata;
-+ Xilinx_wdata_fn wdata;
-+ Xilinx_busy_fn busy;
-+ Xilinx_abort_fn abort;
-+ Xilinx_post_fn post;
-+ int relocated;
-+} Xilinx_Spartan6_Slave_Parallel_fns;
-+
-+/* Slave SelectMap Implementation function table */
-+typedef struct {
-+ Xilinx_pre_fn pre;
-+ Xilinx_pgm_fn pgm;
-+ Xilinx_init_fn init;
-+ Xilinx_err_fn err;
-+ Xilinx_done_fn done;
-+ Xilinx_clk_fn clk;
-+ Xilinx_cs_fn cs;
-+ Xilinx_wr_fn wr;
-+ Xilinx_rdata_fn rdata;
-+ Xilinx_wdata_fn wdata;
-+ Xilinx_busy_fn busy;
-+ Xilinx_abort_fn abort;
-+ Xilinx_post_fn post;
-+ int relocated;
-+} Xilinx_Spartan6_Slave_SelectMap_fns;
-+
-+/* Device Image Sizes
-+ *********************************************************************/
-+/* Spartan-VI */
-+#define XILINX_XC6SLX4_SIZE (2724704l/8)
-+#define XILINX_XC6SLX9_SIZE (2724704l/8)
-+#define XILINX_XC6SLX16_SIZE (3713440l/8)
-+#define XILINX_XC6SLX25_SIZE (6411440l/8)
-+#define XILINX_XC6SLX25T_SIZE (6411440l/8)
-+#define XILINX_XC6SLX45_SIZE (11875104l/8)
-+#define XILINX_XC6SLX45T_SIZE (11875104l/8)
-+#define XILINX_XC6SLX75_SIZE (19624608l/8)
-+#define XILINX_XC6SLX75T_SIZE (19624608l/8)
-+#define XILINX_XC6SLX100_SIZE (26543136l/8)
-+#define XILINX_XC6SLX100T_SIZE (26543136l/8)
-+#define XILINX_XC6SLX150_SIZE (33761568l/8)
-+#define XILINX_XC6SLX150T40_SIZE (33761568l/8)
-+
-+/* Descriptor Macros
-+ *********************************************************************/
-+/* Spartan-VI devices */
-+#define XILINX_XC6SLX4_DESC(iface, fn_table, cookie) \
-+{ Xilinx_Spartan6, iface,XILINX_XC6SLX9_SIZE , fn_table, cookie }
-+
-+#define XILINX_XC6SLX9_DESC(iface, fn_table, cookie) \
-+{ Xilinx_Spartan6, iface,XILINX_XC6SLX16_SIZE , fn_table, cookie }
-+
-+#define XILINX_XC6SLX16_DESC(iface, fn_table, cookie) \
-+{ Xilinx_Spartan6, iface,XILINX_XC6SLX25_SIZE , fn_table, cookie }
-+
-+#define XILINX_XC6SLX25_DESC(iface, fn_table, cookie) \
-+{ Xilinx_Spartan6, iface,XILINX_XC6SLX25T_SIZE , fn_table, cookie }
-+
-+#define XILINX_XC6SLX25T_DESC(iface, fn_table, cookie) \
-+{ Xilinx_Spartan6, iface,XILINX_XC6SLX25T_SIZE , fn_table, cookie }
-+
-+#define XILINX_XC6SLX45_DESC(iface, fn_table, cookie) \
-+{ Xilinx_Spartan6, iface,XILINX_XC6SLX45_SIZE , fn_table, cookie }
-+
-+#define XILINX_XC6SLX45T_DESC(iface, fn_table, cookie) \
-+{ Xilinx_Spartan6, iface,XILINX_XC6SLX45T_SIZE , fn_table, cookie }
-+
-+#define XILINX_XC6SLX75_DESC(iface, fn_table, cookie) \
-+{ Xilinx_Spartan6, iface,XILINX_XC6SLX75_SIZE , fn_table, cookie }
-+
-+#define XILINX_XC6SLX75T_DESC(iface, fn_table, cookie) \
-+{ Xilinx_Spartan6, iface,XILINX_XC6SLX75T_SIZE , fn_table, cookie }
-+
-+#define XILINX_XC6SLX100_DESC(iface, fn_table, cookie) \
-+{ Xilinx_Spartan6, iface,XILINX_XC6SLX100_SIZE , fn_table, cookie }
-+
-+#define XILINX_XC6SLX100T_DESC(iface, fn_table, cookie) \
-+{ Xilinx_Spartan6, iface, XILINX_XC6SLX100T_SIZE , fn_table, cookie }
-+
-+#define XILINX_XC6SLX150_DESC(iface, fn_table, cookie) \
-+{ Xilinx_Spartan6, iface, XILINX_XC6SLX150_SIZE , fn_table, cookie }
-+
-+#define XILINX_XC6SLX150T40_DESC(iface, fn_table, cookie) \
-+{ Xilinx_Spartan6, iface,XILINX_XC6SLX150T40_SIZE , fn_table, cookie }
-+
-+#endif /* _SPARTAN6_H_ */
-diff --git a/include/xilinx.h b/include/xilinx.h
-index 5f25b7a..c228559 100644
---- a/include/xilinx.h
-+++ b/include/xilinx.h
-@@ -33,10 +33,12 @@
- #define CONFIG_SYS_VIRTEX_E CONFIG_SYS_FPGA_DEV( 0x2 )
- #define CONFIG_SYS_VIRTEX2 CONFIG_SYS_FPGA_DEV( 0x4 )
- #define CONFIG_SYS_SPARTAN3 CONFIG_SYS_FPGA_DEV( 0x8 )
-+#define CONFIG_SYS_SPARTAN6 CONFIG_SYS_FPGA_DEV( 0xa )
- #define CONFIG_SYS_XILINX_SPARTAN2 (CONFIG_SYS_FPGA_XILINX | CONFIG_SYS_SPARTAN2)
- #define CONFIG_SYS_XILINX_VIRTEX_E (CONFIG_SYS_FPGA_XILINX | CONFIG_SYS_VIRTEX_E)
- #define CONFIG_SYS_XILINX_VIRTEX2 (CONFIG_SYS_FPGA_XILINX | CONFIG_SYS_VIRTEX2)
- #define CONFIG_SYS_XILINX_SPARTAN3 (CONFIG_SYS_FPGA_XILINX | CONFIG_SYS_SPARTAN3)
-+#define CONFIG_SYS_XILINX_SPARTAN6 (CONFIG_SYS_FPGA_XILINX | CONFIG_SYS_SPARTAN6)
- /* XXX - Add new models here */
-
-
-@@ -68,6 +70,7 @@ typedef enum { /* typedef Xilinx_Family */
- Xilinx_VirtexE, /* Virtex-E Family */
- Xilinx_Virtex2, /* Virtex2 Family */
- Xilinx_Spartan3, /* Spartan-III Family */
-+ Xilinx_Spartan6, /* Spartan-VI Family */
- max_xilinx_type /* insert all new types before this */
- } Xilinx_Family; /* end, typedef Xilinx_Family */
-
---
-1.7.2.5
-
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2013-07-25 07:19:51
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 98ecd8696cb12a5fb20ef6c3e6109aa2a5970fe4 (commit)
from 98038908c1479870344d2b20e2ff12575e49d5cb (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 98ecd8696cb12a5fb20ef6c3e6109aa2a5970fe4
Author: Eric Jarrige <eri...@ar...>
Date: Thu Jul 25 09:30:30 2013 +0200
[BUILDROOT] patchwork 2013.02: cleanup non supported version
-----------------------------------------------------------------------
Summary of changes:
.../2013.02/001-add_armadeus_device.patch | 24 -
.../002-add_armadeus_specific_packages.patch | 16 -
patches/buildroot/2013.02/006-lcd4linux.patch | 753 -----------
patches/buildroot/2013.02/018-allegro.patch | 114 --
.../buildroot/2013.02/021-sdl-water-config.patch | 99 --
patches/buildroot/2013.02/034-slideshow.patch | 224 ----
patches/buildroot/2013.02/040-linux-makefile.patch | 47 -
.../buildroot/2013.02/043-mesa-add_packages.patch | 287 ----
.../2013.02/045-openssh-add_passwd_expire.patch | 18 -
...support-for-Safe-Boot-file-format-this-fo.patch | 46 -
...d_possibility_to_choose_board_header_file.patch | 26 -
...x_in_a_standalone_way_after_configuration.patch | 13 -
...-linux-change_board_specific_patches_name.patch | 13 -
.../buildroot/2013.02/072-xenomai-package.patch | 222 ----
.../buildroot/2013.02/081-adds_quake_package.patch | 160 ---
.../2013.02/083-pygame-armadeus_addons.patch | 43 -
.../buildroot/2013.02/085-adds_gpm_package.patch | 168 ---
.../buildroot/2013.02/097-adds_flite_package.patch | 108 --
...for_pld_asm_instruction_on_non_armv5_arch.patch | 22 -
...r-add_patch_for_recent_alsa_compatibility.patch | 187 ---
.../buildroot/2013.02/107-games-add_wolf4sdl.patch | 92 --
.../buildroot/2013.02/110-bluez3-add_package.patch | 118 --
patches/buildroot/2013.02/111-bluez3-hacks.patch | 198 ---
.../2013.02/116-openobex-add_package.patch | 168 ---
.../2013.02/117-ussp-push-add_package.patch | 85 --
.../buildroot/2013.02/118-snes9x-add_package.patch | 417 ------
.../buildroot/2013.02/119-fbtest-add_package.patch | 176 ---
.../buildroot/2013.02/120-cwiid-add_package.patch | 106 --
.../2013.02/121-target-arm926t_is_arm926ej-s.patch | 18 -
.../buildroot/2013.02/122-urg-add_package.patch | 74 -
.../2013.02/123-pywebradio-add_package.patch | 56 -
.../buildroot/2013.02/124-e-uae-add_package.patch | 54 -
.../2013.02/125-opentyrian-add_package.patch | 83 --
.../2013.02/130-lbreakout-add_package.patch | 82 --
.../2013.02/131-ltetris-add_package.patch | 84 --
...-qt-full_integration_with_cross_compiling.patch | 44 -
...ffs2-add_board_name_to_binary_rootfs_name.patch | 30 -
.../135-linux-add_linux26-clean_target.patch | 11 -
...42-ncurses-fix_compilation_with_old_hosts.patch | 25 -
...-disable_ip_busybox_if_iproute2_buildroot.patch | 37 -
...fix_installation_bug_on_some_host_systems.patch | 19 -
...lection_even_when_custom_rootfs_is_chosen.patch | 46 -
.../2013.02/158-setserial-bump_version.patch | 17 -
.../2013.02/168-libcanfestival-add_package.patch | 897 -------------
.../buildroot/2013.02/172-gsmmux-add_package.patch | 88 --
.../2013.02/174-imx-lib-add_package.patch.TOUPDATE | 105 --
.../2013.02/176-imx-test-add_package.patch | 148 ---
.../178-uboot-add-missing-UBOOT_CLEAN_CMDS.patch | 29 -
...e4defrag_build_against_old_kernel_headers.patch | 81 --
.../2013.02/181-qtcreator-add_package.patch | 1001 --------------
.../182-uclibc-add_accept4_declaration_fix.patch | 146 --
.../2013.02/184-fsl-mm-codeclib-add_package.patch | 30 -
...nore-env_sectors-on-NOR-and-SPI-dataflash.patch | 45 -
.../buildroot/2013.02/188-marble-add_package.patch | 88 --
.../2013.02/189-dbus-fix_installation.patch | 27 -
.../2013.02/191-madplay-requires_libintl.patch | 29 -
.../2013.02/196-python-crc16-add_package.patch | 58 -
.../buildroot/2013.02/197-cunit-add_package.patch | 49 -
.../2013.02/201-armadeus-add_gnokii.patch | 57 -
.../2013.02/202-boost-bump-version-to-1.53.0.patch | 43 -
.../203-xenomai-bump-to-version-2.6.2.1.patch | 201 ---
.../2013.02/204-busybox-fix-snapshot.patch | 17 -
.../204-wpa-supplicant-add-option-ieee80211w.patch | 45 -
...x-coreutils-stty-add-rs485-config-options.patch | 1397 --------------------
patches/buildroot/2013.02/cleanup_buildroot.sh | 78 --
65 files changed, 0 insertions(+), 9289 deletions(-)
delete mode 100644 patches/buildroot/2013.02/001-add_armadeus_device.patch
delete mode 100644 patches/buildroot/2013.02/002-add_armadeus_specific_packages.patch
delete mode 100644 patches/buildroot/2013.02/006-lcd4linux.patch
delete mode 100644 patches/buildroot/2013.02/018-allegro.patch
delete mode 100644 patches/buildroot/2013.02/021-sdl-water-config.patch
delete mode 100644 patches/buildroot/2013.02/034-slideshow.patch
delete mode 100644 patches/buildroot/2013.02/040-linux-makefile.patch
delete mode 100644 patches/buildroot/2013.02/043-mesa-add_packages.patch
delete mode 100644 patches/buildroot/2013.02/045-openssh-add_passwd_expire.patch
delete mode 100644 patches/buildroot/2013.02/051a-U-Boot-add-support-for-Safe-Boot-file-format-this-fo.patch
delete mode 100644 patches/buildroot/2013.02/051d-u-boot-add_possibility_to_choose_board_header_file.patch
delete mode 100644 patches/buildroot/2013.02/060-makes_possible_to_compile_linux_in_a_standalone_way_after_configuration.patch
delete mode 100644 patches/buildroot/2013.02/071-linux-change_board_specific_patches_name.patch
delete mode 100644 patches/buildroot/2013.02/072-xenomai-package.patch
delete mode 100644 patches/buildroot/2013.02/081-adds_quake_package.patch
delete mode 100644 patches/buildroot/2013.02/083-pygame-armadeus_addons.patch
delete mode 100644 patches/buildroot/2013.02/085-adds_gpm_package.patch
delete mode 100644 patches/buildroot/2013.02/097-adds_flite_package.patch
delete mode 100644 patches/buildroot/2013.02/099-mplayer-add_patch_for_pld_asm_instruction_on_non_armv5_arch.patch
delete mode 100644 patches/buildroot/2013.02/101-mplayer-add_patch_for_recent_alsa_compatibility.patch
delete mode 100644 patches/buildroot/2013.02/107-games-add_wolf4sdl.patch
delete mode 100644 patches/buildroot/2013.02/110-bluez3-add_package.patch
delete mode 100644 patches/buildroot/2013.02/111-bluez3-hacks.patch
delete mode 100644 patches/buildroot/2013.02/116-openobex-add_package.patch
delete mode 100644 patches/buildroot/2013.02/117-ussp-push-add_package.patch
delete mode 100644 patches/buildroot/2013.02/118-snes9x-add_package.patch
delete mode 100644 patches/buildroot/2013.02/119-fbtest-add_package.patch
delete mode 100644 patches/buildroot/2013.02/120-cwiid-add_package.patch
delete mode 100644 patches/buildroot/2013.02/121-target-arm926t_is_arm926ej-s.patch
delete mode 100644 patches/buildroot/2013.02/122-urg-add_package.patch
delete mode 100644 patches/buildroot/2013.02/123-pywebradio-add_package.patch
delete mode 100644 patches/buildroot/2013.02/124-e-uae-add_package.patch
delete mode 100644 patches/buildroot/2013.02/125-opentyrian-add_package.patch
delete mode 100644 patches/buildroot/2013.02/130-lbreakout-add_package.patch
delete mode 100644 patches/buildroot/2013.02/131-ltetris-add_package.patch
delete mode 100644 patches/buildroot/2013.02/132-qt-full_integration_with_cross_compiling.patch
delete mode 100644 patches/buildroot/2013.02/134-jffs2-add_board_name_to_binary_rootfs_name.patch
delete mode 100644 patches/buildroot/2013.02/135-linux-add_linux26-clean_target.patch
delete mode 100644 patches/buildroot/2013.02/142-ncurses-fix_compilation_with_old_hosts.patch
delete mode 100644 patches/buildroot/2013.02/146-busybox-disable_ip_busybox_if_iproute2_buildroot.patch
delete mode 100644 patches/buildroot/2013.02/150-alsa-utils-fix_installation_bug_on_some_host_systems.patch
delete mode 100644 patches/buildroot/2013.02/157-buildroot-allow_generic_device_selection_even_when_custom_rootfs_is_chosen.patch
delete mode 100644 patches/buildroot/2013.02/158-setserial-bump_version.patch
delete mode 100644 patches/buildroot/2013.02/168-libcanfestival-add_package.patch
delete mode 100644 patches/buildroot/2013.02/172-gsmmux-add_package.patch
delete mode 100644 patches/buildroot/2013.02/174-imx-lib-add_package.patch.TOUPDATE
delete mode 100644 patches/buildroot/2013.02/176-imx-test-add_package.patch
delete mode 100644 patches/buildroot/2013.02/178-uboot-add-missing-UBOOT_CLEAN_CMDS.patch
delete mode 100644 patches/buildroot/2013.02/179-e2fsprog-allow_e4defrag_build_against_old_kernel_headers.patch
delete mode 100644 patches/buildroot/2013.02/181-qtcreator-add_package.patch
delete mode 100644 patches/buildroot/2013.02/182-uclibc-add_accept4_declaration_fix.patch
delete mode 100644 patches/buildroot/2013.02/184-fsl-mm-codeclib-add_package.patch
delete mode 100644 patches/buildroot/2013.02/186-uboot-tools-2011.03-Ignore-env_sectors-on-NOR-and-SPI-dataflash.patch
delete mode 100644 patches/buildroot/2013.02/188-marble-add_package.patch
delete mode 100644 patches/buildroot/2013.02/189-dbus-fix_installation.patch
delete mode 100644 patches/buildroot/2013.02/191-madplay-requires_libintl.patch
delete mode 100644 patches/buildroot/2013.02/196-python-crc16-add_package.patch
delete mode 100644 patches/buildroot/2013.02/197-cunit-add_package.patch
delete mode 100644 patches/buildroot/2013.02/201-armadeus-add_gnokii.patch
delete mode 100644 patches/buildroot/2013.02/202-boost-bump-version-to-1.53.0.patch
delete mode 100644 patches/buildroot/2013.02/203-xenomai-bump-to-version-2.6.2.1.patch
delete mode 100644 patches/buildroot/2013.02/204-busybox-fix-snapshot.patch
delete mode 100644 patches/buildroot/2013.02/204-wpa-supplicant-add-option-ieee80211w.patch
delete mode 100644 patches/buildroot/2013.02/205-busybox-coreutils-stty-add-rs485-config-options.patch
delete mode 100755 patches/buildroot/2013.02/cleanup_buildroot.sh
diff --git a/patches/buildroot/2013.02/001-add_armadeus_device.patch b/patches/buildroot/2013.02/001-add_armadeus_device.patch
deleted file mode 100644
index 66c7914..0000000
--- a/patches/buildroot/2013.02/001-add_armadeus_device.patch
+++ /dev/null
@@ -1,24 +0,0 @@
-Add armadeus target specific menu to BR.
-
-Index: buildroot/Makefile
-===================================================================
---- buildroot/Makefile
-+++ buildroot/Makefile
-@@ -334,6 +334,7 @@ endif
- include boot/common.mk
- include linux/linux.mk
- include system/system.mk
-+include target/device/armadeus/Makefile.in
-
- TARGETS+=target-finalize
-
-Index: buildroot/system/Config.in
-===================================================================
---- buildroot/system/Config.in
-+++ buildroot/system/Config.in
-@@ -294,4 +294,5 @@ config BR2_ROOTFS_POST_BUILD_SCRIPT
- first and only argument. The script is executed from the
- main Buildroot source directory as the current directory.
-
-+source "target/device/armadeus/Config.in"
- endmenu
diff --git a/patches/buildroot/2013.02/002-add_armadeus_specific_packages.patch b/patches/buildroot/2013.02/002-add_armadeus_specific_packages.patch
deleted file mode 100644
index a5ae028..0000000
--- a/patches/buildroot/2013.02/002-add_armadeus_specific_packages.patch
+++ /dev/null
@@ -1,16 +0,0 @@
-Add armadeus specific packages menu to BR.
-
-Index: buildroot/package/Config.in
-===================================================================
---- buildroot.orig/package/Config.in 2012-02-21 16:43:29.000000000 +0100
-+++ buildroot/package/Config.in 2012-02-21 16:43:56.000000000 +0100
-@@ -2,6 +2,9 @@
-
- source "package/busybox/Config.in"
-
-+# Armadeus specific
-+source "package/armadeus/Config.in"
-+
- # Audio and video applications
- source "package/multimedia/Config.in"
-
diff --git a/patches/buildroot/2013.02/006-lcd4linux.patch b/patches/buildroot/2013.02/006-lcd4linux.patch
deleted file mode 100644
index 097e12c..0000000
--- a/patches/buildroot/2013.02/006-lcd4linux.patch
+++ /dev/null
@@ -1,753 +0,0 @@
-Add lcd4linux package to BR.
-
-Signed-off-by: Julien Boibessot <jul...@ar...>
-
-Index: buildroot/package/Config.in
-===================================================================
---- buildroot/package/Config.in
-+++ buildroot/package/Config.in
-@@ -248,6 +248,7 @@
- source "package/iostat/Config.in"
- source "package/irda-utils/Config.in"
- source "package/kbd/Config.in"
-+source "package/lcd4linux/Config.in"
- source "package/lcdproc/Config.in"
- source "package/lm-sensors/Config.in"
- source "package/lshw/Config.in"
-Index: buildroot/package/lcd4linux/Config.in
-===================================================================
---- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ buildroot/package/lcd4linux/Config.in 2012-02-21 16:43:57.000000000 +0100
-@@ -0,0 +1,7 @@
-+config BR2_PACKAGE_LCD4LINUX
-+ bool "LCD4Linux daemon"
-+ select BR2_PACKAGE_NCURSES
-+ help
-+ LCD4Linux allows you to show some system parameters on a textual LCD
-+ connected to your Armadeus board.
-+
-Index: buildroot/package/lcd4linux/lcd4linux.mk
-===================================================================
---- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ buildroot/package/lcd4linux/lcd4linux.mk 2012-02-21 16:43:57.000000000 +0100
-@@ -0,0 +1,66 @@
-+#############################################################
-+#
-+# LCD4Linux daemon
-+#
-+#############################################################
-+
-+LCD4LINUX_VER:=0.10.1-RC2
-+LCD4LINUX_SOURCE:=lcd4linux-$(LCD4LINUX_VER).tar.gz
-+LCD4LINUX_SITE:=http://ssl.bulix.org/projects/lcd4linux/raw-attachment/wiki/Download/
-+LCD4LINUX_DIR:=$(BUILD_DIR)/lcd4linux-$(LCD4LINUX_VER)
-+LCD4LINUX_CAT:=zcat
-+LCD4LINUX_BINARY:=lcd4linux
-+LCD4LINUX_TARGET_BINARY:=usr/bin/lcd4linux
-+LCD4LINUX_PATCH:=lcd4linux_armadeus.patch
-+LCD4LINUX_CONF:=lcd4linux_armadeus.conf
-+LCD4LINUX_TARGET_CONF:=etc/lcd4linux.conf
-+
-+
-+$(DL_DIR)/$(LCD4LINUX_SOURCE):
-+ $(call DOWNLOAD,$(LCD4LINUX_SITE),$(LCD4LINUX_SOURCE))
-+
-+lcd4linux-source: $(DL_DIR)/$(LCD4LINUX_SOURCE)
-+
-+$(LCD4LINUX_DIR)/.unpacked: $(DL_DIR)/$(LCD4LINUX_SOURCE)
-+ $(LCD4LINUX_CAT) $(DL_DIR)/$(LCD4LINUX_SOURCE) | tar -C $(BUILD_DIR) $(TAR_OPTIONS) -
-+ touch $@
-+
-+$(LCD4LINUX_DIR)/.patched: $(LCD4LINUX_DIR)/.unpacked
-+ support/scripts/apply-patches.sh $(LCD4LINUX_DIR) package/lcd4linux lcd4linux\*.patch
-+ (if [ -d $(BUILD_DIR)/linux-2.6.12/include/asm-generic ]; then ln -sf $(BUILD_DIR)/linux-2.6.12/include/asm-generic/ $(BUILD_DIR)/staging_dir/arm-linux-uclibc/sys-include/asm-generic; fi)
-+ touch $@
-+
-+$(LCD4LINUX_DIR)/.configured: $(LCD4LINUX_DIR)/.patched
-+ (cd $(LCD4LINUX_DIR); rm -rf config.cache; \
-+ $(TARGET_CONFIGURE_OPTS) CC_FOR_BUILD=$(HOSTCC) \
-+ CFLAGS="$(TARGET_CFLAGS)" \
-+ ./configure \
-+ --host=$(GNU_TARGET_NAME) \
-+ );
-+ touch $@
-+
-+$(LCD4LINUX_DIR)/$(LCD4LINUX_BINARY): $(LCD4LINUX_DIR)/.configured
-+ $(TARGET_CONFIGURE_OPTS) $(MAKE) CC=$(TARGET_CC) -C $(LCD4LINUX_DIR)
-+
-+$(TARGET_DIR)/$(LCD4LINUX_TARGET_BINARY): $(LCD4LINUX_DIR)/$(LCD4LINUX_BINARY)
-+ install -D $< $@
-+ $(STRIPCMD) $(STRIP_STRIP_UNNEEDED) $@
-+ cp package/lcd4linux/$(LCD4LINUX_CONF) $(TARGET_DIR)/$(LCD4LINUX_TARGET_CONF)
-+
-+lcd4linux: uclibc ncurses $(TARGET_DIR)/$(LCD4LINUX_TARGET_BINARY)
-+
-+lcd4linux-clean:
-+ rm -f $(TARGET_DIR)/$(LCD4LINUX_TARGET_BINARY)
-+ -$(MAKE) -C $(LCD4LINUX_DIR) clean
-+
-+lcd4linux-dirclean:
-+ rm -rf $(LCD4LINUX_DIR)
-+
-+#############################################################
-+#
-+# Toplevel Makefile options
-+#
-+#############################################################
-+ifeq ($(strip $(BR2_PACKAGE_LCD4LINUX)),y)
-+TARGETS+=lcd4linux
-+endif
-Index: buildroot/package/lcd4linux/lcd4linux-remove-wireless.patch
-===================================================================
---- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ buildroot/package/lcd4linux/lcd4linux-remove-wireless.patch 2012-02-21 16:43:57.000000000 +0100
-@@ -0,0 +1,13 @@
-+This plugin doesn't compile yet (/anymore?)
-+
-+--- lcd4linux-0.10.0/configure.org 2007-11-21 22:31:40.000000000 +0100
-++++ lcd4linux-0.10.0/configure 2007-11-21 22:32:04.000000000 +0100
-+@@ -6366,7 +6366,7 @@
-+ PLUGIN_STATFS="yes"
-+ PLUGIN_UNAME="yes"
-+ PLUGIN_UPTIME="yes"
-+- PLUGIN_WIRELESS="yes"
-++ PLUGIN_WIRELESS="no"
-+ PLUGIN_XMMS="yes"
-+ ;;
-+ apm)
-Index: buildroot/package/lcd4linux/lcd4linux-armadeus.patch
-===================================================================
---- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ buildroot/package/lcd4linux/lcd4linux-armadeus.patch 2012-02-21 16:43:57.000000000 +0100
-@@ -0,0 +1,181 @@
-+diff -uprN lcd4linux-0.10.0/configure lcd4linux-0.10.0.armadeus/configure
-+--- lcd4linux-0.10.0/configure 2005-06-10 13:21:49.000000000 +0200
-++++ lcd4linux-0.10.0.armadeus/configure 2005-09-11 20:39:47.000000000 +0200
-+@@ -7242,7 +7242,7 @@ for driver in $drivers; do
-+ picoLCD="yes"
-+ PNG="yes"
-+ PPM="yes"
-+- ROUTERBOARD="yes"
-++ ROUTERBOARD="no"
-+ SAMPLE="yes"
-+ SERDISPLIB="yes"
-+ SIMPLELCD="yes"
-+diff -uprN lcd4linux-0.10.0/drv_generic_parport.c lcd4linux-0.10.0.armadeus/drv_generic_parport.c
-+--- lcd4linux-0.10.0/drv_generic_parport.c 2005-05-08 06:32:44.000000000 +0200
-++++ lcd4linux-0.10.0.armadeus/drv_generic_parport.c 2005-09-11 20:46:27.000000000 +0200
-+@@ -215,9 +215,8 @@ int drv_generic_parport_open(const char
-+ return -1;
-+ }
-+ } else
-+-#endif
-+-
-+ {
-++#else
-+ error("using raw port 0x%x (deprecated!)", Port);
-+ error("You *really* should change your setup and use ppdev!");
-+ if ((Port + 3) <= 0x3ff) {
-+@@ -231,6 +230,7 @@ int drv_generic_parport_open(const char
-+ return -1;
-+ }
-+ }
-++#endif // WITH_PPDEV
-+ }
-+ return 0;
-+ }
-+@@ -250,9 +250,9 @@ int drv_generic_parport_close(void)
-+ }
-+ free(PPdev);
-+ } else
-+-#endif
-+ {
-+ debug("closing raw port 0x%x", Port);
-++#else
-+ if ((Port + 3) <= 0x3ff) {
-+ if (ioperm(Port, 3, 0) != 0) {
-+ error("%s: ioperm(0x%x) failed: %s", Driver, Port, strerror(errno));
-+@@ -264,6 +264,7 @@ int drv_generic_parport_close(void)
-+ return -1;
-+ }
-+ }
-++#endif // WITH_PPDEV
-+ }
-+
-+ return 0;
-+@@ -426,11 +427,12 @@ void drv_generic_parport_direction(const
-+ if (PPdev) {
-+ ioctl(PPfd, PPDATADIR, &direction);
-+ } else
-+-#endif
-+ {
-++#else
-+ /* code stolen from linux/parport_pc.h */
-+ ctr = (ctr & ~0x20) ^ (direction ? 0x20 : 0x00);
-+ outb(ctr, Port + 2);
-++#endif
-+ }
-+ }
-+
-+@@ -445,9 +447,10 @@ unsigned char drv_generic_parport_status
-+ if (PPdev) {
-+ ioctl(PPfd, PPRSTATUS, &data);
-+ } else
-+-#endif
-+ {
-++#else
-+ data = inb(Port + 1);
-++#endif
-+ }
-+
-+ /* clear unused bits */
-+@@ -476,11 +479,12 @@ void drv_generic_parport_control(const u
-+ frob.val = val;
-+ ioctl(PPfd, PPFCONTROL, &frob);
-+ } else
-+-#endif
-+ {
-++#else
-+ /* code stolen from linux/parport_pc.h */
-+ ctr = (ctr & ~mask) ^ val;
-+ outb(ctr, Port + 2);
-++#endif
-+ }
-+ }
-+
-+@@ -519,9 +523,10 @@ void drv_generic_parport_toggle(const un
-+ frob.val = value2;
-+ ioctl(PPfd, PPFCONTROL, &frob);
-+
-+- } else
-+-#endif
-++ }
-++ else
-+ {
-++#else
-+ /* rise */
-+ ctr = (ctr & ~bits) ^ value1;
-+ outb(ctr, Port + 2);
-+@@ -532,6 +537,7 @@ void drv_generic_parport_toggle(const un
-+ /* lower */
-+ ctr = (ctr & ~bits) ^ value2;
-+ outb(ctr, Port + 2);
-++#endif
-+ }
-+ }
-+
-+@@ -541,11 +547,13 @@ void drv_generic_parport_data(const unsi
-+ #ifdef WITH_PPDEV
-+ if (PPdev) {
-+ ioctl(PPfd, PPWDATA, &data);
-+- } else
-+-#endif
-++ }
-++#else
-++ else
-+ {
-+ outb(data, Port);
-+ }
-++#endif
-+ }
-+
-+ unsigned char drv_generic_parport_read(void)
-+@@ -555,11 +563,13 @@ unsigned char drv_generic_parport_read(v
-+ #ifdef WITH_PPDEV
-+ if (PPdev) {
-+ ioctl(PPfd, PPRDATA, &data);
-+- } else
-+-#endif
-+- {
-++ }
-++#else
-++ else {
-+ data = inb(Port);
-+ }
-++#endif // WITH_PPDEV
-++
-+ return data;
-+ }
-+
-+@@ -571,11 +581,12 @@ void drv_generic_parport_debug(void)
-+ #ifdef WITH_PPDEV
-+ if (PPdev) {
-+ ioctl(PPfd, PPRCONTROL, &control);
-+- } else
-+-#endif
-+- {
-++ }
-++#else
-++ else {
-+ control = ctr;
-+ }
-++#endif // WITH_PPDEV
-+
-+ debug("%cSTROBE %cAUTOFD %cINIT %cSLCTIN",
-+ control & PARPORT_CONTROL_STROBE ? '-' : '+',
-+diff -uprN lcd4linux-0.10.0/stamp-h lcd4linux-0.10.0.armadeus/stamp-h
-+--- lcd4linux-0.10.0/stamp-h 1970-01-01 01:00:00.000000000 +0100
-++++ lcd4linux-0.10.0.armadeus/stamp-h 2005-09-11 20:40:06.000000000 +0200
-+@@ -0,0 +1 @@
-++timestamp
-+diff -uprN lcd4linux-0.10.0/udelay.c lcd4linux-0.10.0.armadeus/udelay.c
-+--- lcd4linux-0.10.0/udelay.c 2005-05-08 06:32:45.000000000 +0200
-++++ lcd4linux-0.10.0.armadeus/udelay.c 2005-09-11 19:59:42.000000000 +0200
-+@@ -133,6 +133,7 @@
-+ #include <stdlib.h>
-+ #include <stdio.h>
-+
-++#undef USE_OLD_UDELAY // otherwise x86 asm code is used
-+
-+ #ifdef USE_OLD_UDELAY
-+
-+
-+
-Index: buildroot/package/lcd4linux/lcd4linux_armadeus.conf
-===================================================================
---- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ buildroot/package/lcd4linux/lcd4linux_armadeus.conf 2012-02-21 16:43:57.000000000 +0100
-@@ -0,0 +1,445 @@
-+
-+# Armadeus HD44780 display (Nico wiring ;-))
-+Display HD44780-generic {
-+ Driver 'HD44780'
-+ Model 'generic'
-+ Port '/dev/parports/0'
-+ Size '40x2'
-+ asc255bug 0
-+ Bits 4
-+ Wire {
-+ RW 'DB4'
-+ RS 'DB5'
-+ ENABLE 'DB6'
-+ ENABLE2 'GND'
-+ GPO 'GND'
-+ }
-+}
-+
-+Plugin Seti {
-+ Directory '/root/setiathome-3.08.i686-pc-linux-gnu'
-+}
-+
-+
-+Plugin MySQL {
-+ server 'gsmlandia.com' # if none, localhost assumed
-+ port 3306 # if none, MySQL default assumed
-+ user 'lcd4linux' # if none, lcd4linux unix owner assumed
-+ password 'lcd4linux' # if none, empty password assumed
-+ database 'lcd4linux' # MUST be specified
-+}
-+
-+Plugin Pop3 {
-+ server1 'localhost'
-+ port1 110
-+ user1 'michael'
-+ password1 'secret'
-+}
-+
-+
-+Widget OS {
-+ class 'Text'
-+ expression '*** '.uname('sysname').' '.uname('release').' ***'
-+ width 20
-+ align 'M'
-+ speed 100
-+ update tick
-+}
-+
-+Widget CPU {
-+ class 'Text'
-+ expression uname('machine')
-+ prefix 'CPU '
-+ width 9
-+ align 'L'
-+ update tick
-+}
-+
-+
-+Widget RAM {
-+ class 'Text'
-+ expression meminfo('MemTotal')/1024
-+ postfix ' MB RAM'
-+ width 11
-+ precision 0
-+ align 'R'
-+ update tick
-+}
-+
-+Widget Busy {
-+ class 'Text'
-+ expression proc_stat::cpu('busy', 500)
-+ prefix 'Busy'
-+ postfix '%'
-+ width 8
-+ precision 1
-+ align 'R'
-+ update tick
-+}
-+
-+Widget BusyBar {
-+ class 'Bar'
-+ expression proc_stat::cpu('busy', 500)
-+ expression2 proc_stat::cpu('system', 500)
-+ length 10
-+ direction 'E'
-+ update tack
-+}
-+
-+Widget Load {
-+ class 'Text'
-+ expression loadavg(1)
-+ prefix 'Load'
-+ postfix loadavg(1)>1.0?'!':' '
-+ width 10
-+ precision 1
-+ align 'R'
-+ update tick
-+}
-+
-+Widget LoadBar {
-+ class 'Bar'
-+ expression loadavg(1)
-+ max 2.0
-+ length 10
-+ direction 'E'
-+ update tack
-+}
-+
-+
-+Widget Disk {
-+ class 'Text'
-+ # disk.[rw]blk return blocks, we assume a blocksize of 512
-+ # to get the number in kB/s we would do blk*512/1024, which is blk/2
-+ # expression (proc_stat::disk('.*', 'rblk', 500)+proc_stat::disk('.*', 'wblk', 500))/2
-+ # with kernel 2.6, disk_io disappeared from /proc/stat but moved to /proc/diskstat
-+ # therefore you have to use another function called 'diskstats':
-+ expression diskstats('hd.', 'read_sectors', 500) + diskstats('hd.', 'write_sectors', 500)
-+ prefix 'disk'
-+ postfix ' '
-+ width 10
-+ precision 0
-+ align 'R'
-+ update tick
-+}
-+
-+Widget DiskBar {
-+ class 'Bar'
-+ #expression proc_stat::disk('.*', 'rblk', 500)
-+ #expression2 proc_stat::disk('.*', 'wblk', 500)
-+ # for kernel 2.6:
-+ expression diskstats('hd.', 'read_sectors', 500)
-+ expression2 diskstats('hd.', 'write_sectors', 500)
-+ length 14
-+ direction 'E'
-+ update tack
-+}
-+
-+Widget Eth0 {
-+ class 'Text'
-+ expression (netdev('eth0', 'Rx_bytes', 500)+netdev('eth0', 'Tx_bytes', 500))/1024
-+ prefix 'eth0'
-+ postfix ' '
-+ width 10
-+ precision 0
-+ align 'R'
-+ update tick
-+}
-+
-+Widget Eth0Bar {
-+ class 'Bar'
-+ expression netdev('eth0', 'Rx_bytes', 500)
-+ expression2 netdev('eth0', 'Tx_bytes', 500)
-+ length 14
-+ direction 'E'
-+ update tack
-+}
-+
-+Widget PPP {
-+ class 'Text'
-+ expression (ppp('Rx:0', 500)+ppp('Tx:0', 500))
-+ prefix 'PPP'
-+ width 9
-+ precision 0
-+ align 'R'
-+ update tick
-+}
-+
-+Widget Temp {
-+ class 'Text'
-+ expression i2c_sensors('temp_input3')*1.0324-67
-+ prefix 'Temp'
-+ width 9
-+ precision 1
-+ align 'R'
-+ update tick
-+}
-+
-+Widget TempBar {
-+ class 'Bar'
-+ expression i2c_sensors('temp_input3')*1.0324-67
-+ min 40
-+ max 80
-+ length 10
-+ direction 'E'
-+ update tack
-+}
-+
-+Widget MySQLtest1 {
-+ class 'Text'
-+ expression MySQL::query('SELECT id FROM table1')
-+ width 20
-+ align 'R'
-+ prefix 'MySQL test:'
-+ update minute
-+}
-+
-+Widget MySQLtest2 {
-+ class 'Text'
-+ expression MySQL::status()
-+ width 20
-+ align 'M'
-+ prefix 'Status: '
-+ update minute
-+}
-+
-+Widget Uptime {
-+ class 'Text'
-+ expression uptime('%d days %H:%M:%S')
-+ width 20
-+ align 'R'
-+ prefix 'Up '
-+ update 1000
-+}
-+
-+
-+# debugging widgets
-+
-+Widget BarTest {
-+ class 'Bar'
-+ # test::bar(barno,maxval,startval,delta) - move a test value between 0 and max.
-+ # delta= step to change value by each time it's read.
-+ # barno - ten different test bar values can be set up, with barno=0..9
-+ # if delta=0, just returns the value of bar n instead of changing it.
-+ expression test::bar(0,30,25,1)
-+ expression2 test::bar(1,30,0,1)
-+ length 8
-+ # max 50
-+ direction 'E'
-+ update 10
-+}
-+
-+Widget BarTestVal {
-+ class 'Text'
-+ expression test::bar(0,100,50,0)
-+ prefix 'Test '
-+ width 9
-+ update 200
-+}
-+
-+Widget LightningTest {
-+ class 'icon'
-+ speed 500
-+ visible test::onoff(0)
-+ bitmap {
-+ row1 '...***'
-+ row2 '..***.'
-+ row3 '.***..'
-+ row4 '.****.'
-+ row5 '..**..'
-+ row6 '.**...'
-+ row7 '**....'
-+ row8 '*.....'
-+ }
-+}
-+
-+
-+# Icons
-+
-+Widget Heartbeat {
-+ class 'Icon'
-+ speed 800
-+ Bitmap {
-+ Row1 '.....|.....'
-+ Row2 '.*.*.|.*.*.'
-+ Row3 '*****|*.*.*'
-+ Row4 '*****|*...*'
-+ Row5 '.***.|.*.*.'
-+ Row6 '.***.|.*.*.'
-+ Row7 '..*..|..*..'
-+ Row8 '.....|.....'
-+ }
-+}
-+
-+Widget EKG {
-+ class 'Icon'
-+ speed 50
-+ Bitmap {
-+ Row1 '.....|.....|.....|.....|.....|.....|.....|.....'
-+ Row2 '.....|....*|...*.|..*..|.*...|*....|.....|.....'
-+ Row3 '.....|....*|...*.|..*..|.*...|*....|.....|.....'
-+ Row4 '.....|....*|...**|..**.|.**..|**...|*....|.....'
-+ Row5 '.....|....*|...**|..**.|.**..|**...|*....|.....'
-+ Row6 '.....|....*|...*.|..*.*|.*.*.|*.*..|.*...|*....'
-+ Row7 '*****|*****|****.|***..|**..*|*..**|..***|.****'
-+ Row8 '.....|.....|.....|.....|.....|.....|.....|.....'
-+ }
-+}
-+Widget Karo {
-+ class 'Icon'
-+ speed 200
-+ Bitmap {
-+ Row1 '.....|.....|.....|.....|..*..|.....|.....|.....'
-+ Row2 '.....|.....|.....|..*..|.*.*.|..*..|.....|.....'
-+ Row3 '.....|.....|..*..|.*.*.|*...*|.*.*.|..*..|.....'
-+ Row4 '.....|..*..|.*.*.|*...*|.....|*...*|.*.*.|..*..'
-+ Row5 '.....|.....|..*..|.*.*.|*...*|.*.*.|..*..|.....'
-+ Row6 '.....|.....|.....|..*..|.*.*.|..*..|.....|.....'
-+ Row7 '.....|.....|.....|.....|..*..|.....|.....|.....'
-+ Row8 '.....|.....|.....|.....|.....|.....|.....|.....'
-+ }
-+}
-+Widget Heart {
-+ class 'Icon'
-+ speed 250
-+ Bitmap {
-+ Row1 '.....|.....|.....|.....|.....|.....'
-+ Row2 '.*.*.|.....|.*.*.|.....|.....|.....'
-+ Row3 '*****|.*.*.|*****|.*.*.|.*.*.|.*.*.'
-+ Row4 '*****|.***.|*****|.***.|.***.|.***.'
-+ Row5 '.***.|.***.|.***.|.***.|.***.|.***.'
-+ Row6 '.***.|..*..|.***.|..*..|..*..|..*..'
-+ Row7 '..*..|.....|..*..|.....|.....|.....'
-+ Row8 '.....|.....|.....|.....|.....|.....'
-+ }
-+}
-+Widget Blob {
-+ class 'Icon'
-+ speed 250
-+ Bitmap {
-+ Row1 '.....|.....|.....'
-+ Row2 '.....|.....|.***.'
-+ Row3 '.....|.***.|*...*'
-+ Row4 '..*..|.*.*.|*...*'
-+ Row5 '.....|.***.|*...*'
-+ Row6 '.....|.....|.***.'
-+ Row7 '.....|.....|.....'
-+ Row8 '.....|.....|.....'
-+ }
-+}
-+Widget Wave {
-+ class 'Icon'
-+ speed 100
-+ Bitmap {
-+ Row1 '..**.|.**..|**...|*....|.....|.....|.....|.....|....*|...**'
-+ Row2 '.*..*|*..*.|..*..|.*...|*....|.....|.....|....*|...*.|..*..'
-+ Row3 '*....|....*|...*.|..*..|.*...|*....|....*|...*.|..*..|.*...'
-+ Row4 '*....|....*|...*.|..*..|.*...|*....|....*|...*.|..*..|.*...'
-+ Row5 '*....|....*|...*.|..*..|.*...|*....|....*|...*.|..*..|.*...'
-+ Row6 '.....|.....|....*|...*.|..*..|.*..*|*..*.|..*..|.*...|*....'
-+ Row7 '.....|.....|.....|....*|...**|..**.|.**..|**...|*....|.....'
-+ Row8 '.....|.....|.....|.....|.....|.....|.....|.....|.....|.....'
-+ }
-+}
-+Widget Squirrel {
-+ class 'Icon'
-+ speed 100
-+ Bitmap {
-+ Row1 '.....|.....|.....|.....|.....|.....'
-+ Row2 '.....|.....|.....|.....|.....|.....'
-+ Row3 '.....|.....|.....|.....|.....|.....'
-+ Row4 '**...|.**..|..**.|...**|....*|.....'
-+ Row5 '*****|*****|*****|*****|*****|*****'
-+ Row6 '...**|..**.|.**..|**...|*....|.....'
-+ Row7 '.....|.....|.....|.....|.....|.....'
-+ Row8 '.....|.....|.....|.....|.....|.....'
-+ }
-+}
-+
-+Widget Lightning {
-+ class 'icon'
-+ speed 100
-+ visible cpu('busy', 500)-50
-+ bitmap {
-+ row1 '...***'
-+ row2 '..***.'
-+ row3 '.***..'
-+ row4 '.****.'
-+ row5 '..**..'
-+ row6 '.**...'
-+ row7 '**....'
-+ row8 '*.....'
-+ }
-+}
-+
-+Widget Rain {
-+ class 'icon'
-+ speed 200
-+ bitmap {
-+ row1 '...*.|.....|.....|.*...|....*|..*..|.....|*....'
-+ row2 '*....|...*.|.....|.....|.*...|....*|..*..|.....'
-+ row3 '.....|*....|...*.|.....|.....|.*...|....*|..*..'
-+ row4 '..*..|.....|*....|...*.|.....|.....|.*...|....*'
-+ row5 '....*|..*..|.....|*....|...*.|.....|.....|.*...'
-+ row6 '.*...|....*|..*..|.....|*....|...*.|.....|.....'
-+ row7 '.....|.*...|....*|..*..|.....|*....|...*.|.....'
-+ row8 '.....|.....|.*...|....*|..*..|.....|*....|...*.'
-+ }
-+}
-+
-+Widget Test {
-+ class 'Text'
-+ expression '1234567890123456789012345678901234567890'
-+ #expression '|'
-+ width 40
-+}
-+
-+Widget Armadeus {
-+ class 'Text'
-+ expression 'Armadeus Project'
-+ width 20
-+}
-+
-+
-+Layout L40x2 {
-+ Row1 {
-+ Col1 'Busy'
-+ Col10 'BusyBar'
-+ Col20 'Uptime'
-+ }
-+ Row2 {
-+ Col1 'Load'
-+ Col10 'LoadBar'
-+ Col21 'Armadeus
-+ }
-+}
-+
-+Layout Test {
-+ Row01.Col1 'Test'
-+ Row02.Col1 'Test'
-+ Row03.Col1 'Test'
-+ Row04.Col1 'Test'
-+}
-+
-+Layout testMySQL {
-+ Row1 {
-+ Col1 'MySQLtest1'
-+ }
-+ Row2 {
-+ Col1 'MySQLtest2'
-+ }
-+}
-+
-+
-+#
-+# Specify here which diplay and layout should be used
-+#
-+Display 'HD44780-generic'
-+Layout 'L40x2'
-+
-+
-+Variables {
-+ tick 500
-+ tack 100
-+ minute 60000
-+}
diff --git a/patches/buildroot/2013.02/018-allegro.patch b/patches/buildroot/2013.02/018-allegro.patch
deleted file mode 100644
index 43a542b..0000000
--- a/patches/buildroot/2013.02/018-allegro.patch
+++ /dev/null
@@ -1,114 +0,0 @@
-Add allegro package to BR.
-
-Signed-off-by: Julien Boibessot <jul...@ar...>
-
-Index: buildroot/package/Config.in
-===================================================================
---- buildroot/package/Config.in
-+++ buildroot/package/Config.in
-@@ -115,6 +115,7 @@
- source "package/rrdtool/Config.in"
-
- comment "graphic libraries"
-+source "package/allegro/Config.in"
- source "package/cegui06/Config.in"
- source "package/directfb/Config.in"
- source "package/directfb-examples/Config.in"
-Index: buildroot/package/allegro/Config.in
-===================================================================
---- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ buildroot/package/allegro/Config.in 2012-02-21 16:44:05.000000000 +0100
-@@ -0,0 +1,13 @@
-+config BR2_PACKAGE_ALLEGRO
-+ bool "Allegro"
-+ help
-+ Allegro is a game programming library for C/C++ developers
-+ distributed freely and supporting the following platforms:
-+ DOS, Unix (Linux, FreeBSD, Irix, Solaris, Darwin), Windows, QNX,
-+ BeOS and MacOS X.
-+ It provides many functions for graphics, sounds, player input
-+ (keyboard, mouse and joystick) and timers. It also provides fixed and
-+ floating point mathematical functions, 3d functions, file management
-+ functions, compressed datafile and a GUI.
-+
-+ http://alleg.sourceforge.net/
-Index: buildroot/package/allegro/allegro.mk
-===================================================================
---- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ buildroot/package/allegro/allegro.mk 2012-02-21 16:44:05.000000000 +0100
-@@ -0,0 +1,75 @@
-+#############################################################
-+#
-+# Allegro: a game programming library
-+#
-+#############################################################
-+ALLEGRO_VERSION:=4.2.1
-+ALLEGRO_SOURCE:=allegro-$(ALLEGRO_VERSION).tar.gz
-+ALLEGRO_SITE:=http://downloads.sourceforge.net/alleg
-+ALLEGRO_CAT:=zcat
-+ALLEGRO_DIR:=$(BUILD_DIR)/allegro-$(ALLEGRO_VERSION)
-+
-+$(DL_DIR)/$(ALLEGRO_SOURCE):
-+ $(call DOWNLOAD,$(ALLEGRO_SITE),$(ALLEGRO_SOURCE))
-+
-+allegro-source: $(DL_DIR)/$(ALLEGRO_SOURCE)
-+
-+$(ALLEGRO_DIR)/.unpacked: $(DL_DIR)/$(ALLEGRO_SOURCE)
-+ $(ALLEGRO_CAT) $(DL_DIR)/$(ALLEGRO_SOURCE) | tar -C $(BUILD_DIR) $(TAR_OPTIONS) -
-+ touch $@
-+
-+$(ALLEGRO_DIR)/.configured: $(ALLEGRO_DIR)/.unpacked
-+ (cd $(ALLEGRO_DIR); \
-+ $(TARGET_CONFIGURE_OPTS) \
-+ CFLAGS="$(TARGET_CFLAGS)" \
-+ LDFLAGS="$(TARGET_LDFLAGS)" \
-+ CROSSCOMPILE=1 \
-+ ./configure \
-+ --target=$(GNU_TARGET_NAME) \
-+ --host=$(GNU_TARGET_NAME) \
-+ --build=$(GNU_HOST_NAME) \
-+ --prefix=/usr \
-+ --without-svgalib \
-+ --enable-modules=no \
-+ --enable-static=yes \
-+ --enable-shared=no \
-+ --disable-asm \
-+ --disable-mmx \
-+ --disable-sse \
-+ --disable-color24 \
-+ --disable-color32 \
-+ --without-x );
-+ touch $@
-+# allegro doesn't seem to build as shared library
-+# --disable-color24 \
-+# --disable-color32 \
-+
-+$(ALLEGRO_DIR)/lib/unix/liballeg.a: $(ALLEGRO_DIR)/.configured
-+ $(MAKE) -C $(ALLEGRO_DIR) CROSSCOMPILE=1
-+ touch $@
-+
-+#$(STAGING_DIR)/usr/lib/liballeg.so: $(ALLEGRO_DIR)/lib/unix/liballeg.a
-+# $(MAKE) -C $(ALLEGRO_DIR) install
-+# touch -c $@
-+#
-+# $(TARGET_DIR)/usr/lib/liballeg.so.so: $(STAGING_DIR)/usr/lib/liballeg.so
-+# cp -dpf $(STAGING_DIR)/usr/lib/liballeg*.so* $(TARGET_DIR)/usr/lib/
-+# -$(STRIP) --strip-unneeded $(TARGET_DIR)/usr/lib/liballeg.so
-+
-+ALLEGRO allegro: $(ALLEGRO_DIR)/lib/unix/liballeg.a
-+
-+allegro-clean:
-+ $(MAKE) DESTDIR=$(TARGET_DIR) CC=$(TARGET_CC) -C $(ALLEGRO_DIR) uninstall
-+ -$(MAKE) -C $(ALLEGRO_DIR) clean
-+
-+allegro-dirclean:
-+ rm -rf $(ALLEGRO_DIR)
-+
-+#############################################################
-+#
-+# Toplevel Makefile options
-+#
-+#############################################################
-+ifeq ($(strip $(BR2_PACKAGE_ALLEGRO)),y)
-+TARGETS+=allegro
-+endif
diff --git a/patches/buildroot/2013.02/021-sdl-water-config.patch b/patches/buildroot/2013.02/021-sdl-water-config.patch
deleted file mode 100644
index d14eea7..0000000
--- a/patches/buildroot/2013.02/021-sdl-water-config.patch
+++ /dev/null
@@ -1,99 +0,0 @@
-Add sdlwater package to BR.
-
-Signed-off-by: Julien Boibessot <jul...@ar...>
-
-Index: buildroot/package/Config.in
-===================================================================
---- buildroot/package/Config.in
-+++ buildroot/package/Config.in
-@@ -139,6 +139,8 @@
- source "package/sdl_net/Config.in"
- source "package/sdl_ttf/Config.in"
- source "package/sdl_gfx/Config.in"
-+comment "Demos"
-+source "package/sdlwater/Config.in"
-
- comment "other GUIs"
- source "package/efl/Config.in"
-Index: buildroot/package/sdlwater/Config.in
-===================================================================
---- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ buildroot/package/sdlwater/Config.in 2012-02-21 16:44:08.000000000 +0100
-@@ -0,0 +1,7 @@
-+config BR2_PACKAGE_SDL_WATER
-+ bool "SDL_water"
-+ select BR2_PACKAGE_SDL
-+ help
-+ Water effect demo coded with SDL
-+
-+ http://www.libsdl.org/projects/SDL_water/
-Index: buildroot/package/sdlwater/sdlwater.mk
-===================================================================
---- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ buildroot/package/sdlwater/sdlwater.mk 2012-02-21 16:44:08.000000000 +0100
-@@ -0,0 +1,65 @@
-+#############################################################
-+#
-+# SDL Water Demo
-+#
-+#############################################################
-+SDL_WATER_VERSION:=1.0
-+SDL_WATER_SOURCE:=water-$(SDL_WATER_VERSION).tar.gz
-+SDL_WATER_SITE:=http://www.libsdl.org/projects/water/src/
-+SDL_WATER_CAT:=$(ZCAT)
-+SDL_WATER_DIR:=$(BUILD_DIR)/water-$(SDL_WATER_VERSION)
-+SDL_WATER_TARGET_DATA_DIR:=$(TARGET_DIR)/usr/share/images/
-+
-+$(DL_DIR)/$(SDL_WATER_SOURCE):
-+ $(call DOWNLOAD,$(SDL_WATER_SITE),$(SDL_WATER_SOURCE))
-+
-+sdl-water-source: $(DL_DIR)/$(SDL_WATER_SOURCE)
-+
-+$(SDL_WATER_DIR)/.unpacked: $(DL_DIR)/$(SDL_WATER_SOURCE)
-+ $(SDL_WATER_CAT) $(DL_DIR)/$(SDL_WATER_SOURCE) | tar -C $(BUILD_DIR) $(TAR_OPTIONS) -
-+ touch $@
-+
-+$(SDL_WATER_DIR)/.configured: $(SDL_WATER_DIR)/.unpacked
-+ (cd $(SDL_WATER_DIR); \
-+ $(TARGET_CONFIGURE_OPTS) \
-+ CFLAGS="$(TARGET_CFLAGS) " \
-+ ./configure \
-+ --target=$(GNU_TARGET_NAME) \
-+ --host=$(GNU_TARGET_NAME) \
-+ --build=$(GNU_HOST_NAME) \
-+ --prefix=$(STAGING_DIR)/usr \
-+ --with-sdl-exec-prefix=$(STAGING_DIR)/usr/ \
-+ --disable-video-x11 );
-+ touch $@
-+
-+$(SDL_WATER_DIR)/water: $(SDL_WATER_DIR)/.configured
-+ $(MAKE) -C $(SDL_WATER_DIR)
-+
-+$(STAGING_DIR)/usr/bin/water: $(SDL_WATER_DIR)/water
-+ $(MAKE) -C $(SDL_WATER_DIR) install
-+ touch -c $@
-+
-+$(TARGET_DIR)/usr/bin/water: $(STAGING_DIR)/usr/bin/water
-+ mkdir -p $(SDL_WATER_TARGET_DATA_DIR)
-+ cp -dpf $(SDL_WATER_DIR)/water320.bmp $(SDL_WATER_TARGET_DATA_DIR)/
-+ cp -dpf $< $(TARGET_DIR)/usr/bin/
-+ -$(STRIPCMD) $@
-+
-+SDL-WATER sdl-water: uclibc sdl $(TARGET_DIR)/usr/bin/water
-+
-+sdl-water-clean:
-+ $(MAKE) DESTDIR=$(TARGET_DIR) CC=$(TARGET_CC) -C $(SDL_WATER_DIR) uninstall
-+ rm $(SDL_WATER_TARGET_DATA_DIR)/water320.bmp
-+ -$(MAKE) -C $(SDL_WATER_DIR) clean
-+
-+sdl-water-dirclean:
-+ rm -rf $(SDL_WATER_DIR)
-+
-+#############################################################
-+#
-+# Toplevel Makefile options
-+#
-+#############################################################
-+ifeq ($(strip $(BR2_PACKAGE_SDL_WATER)),y)
-+TARGETS+=sdl-water
-+endif
diff --git a/patches/buildroot/2013.02/034-slideshow.patch b/patches/buildroot/2013.02/034-slideshow.patch
deleted file mode 100644
index 41acbce..0000000
--- a/patches/buildroot/2013.02/034-slideshow.patch
+++ /dev/null
@@ -1,224 +0,0 @@
-Add slideshow package to BR.
-
-Signed-off-by: Julien Boibessot <jul...@ar...>
-
-Index: buildroot/package/Config.in
-===================================================================
---- buildroot/package/Config.in
-+++ buildroot/package/Config.in
-@@ -139,6 +139,7 @@
- source "package/sdl_net/Config.in"
- source "package/sdl_ttf/Config.in"
- source "package/sdl_gfx/Config.in"
-+source "package/slideshow/Config.in"
- comment "Demos"
- source "package/sdlwater/Config.in"
-
-Index: buildroot/package/slideshow/Config.in
-===================================================================
---- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ buildroot/package/slideshow/Config.in 2012-02-21 16:44:09.000000000 +0100
-@@ -0,0 +1,8 @@
-+config BR2_PACKAGE_SLIDESHOW
-+ bool "Slideshow"
-+ depends on BR2_PACKAGE_SDL && BR2_PACKAGE_SDL_IMAGE
-+ help
-+ Perigee Slideshow is a command line program that searches a directory
-+ for supported graphic files and displays them in a slideshow.
-+
-+ http://www.xmission.com/~jstanley/slideshow.html
-Index: buildroot/package/slideshow/slideshow.mk
-===================================================================
---- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ buildroot/package/slideshow/slideshow.mk 2012-02-21 16:44:09.000000000 +0100
-@@ -0,0 +1,39 @@
-+#############################################################
-+#
-+# slideshow
-+#
-+#############################################################
-+
-+SLIDESHOW_VERSION:=1.1
-+SLIDESHOW_SOURCE:=slideshow-source-$(SLIDESHOW_VERSION).zip
-+SLIDESHOW_SITE:=http://www.xmission.com/~jstanley/
-+
-+SLIDESHOW_DEPENDENCIES += sdl sdl_image
-+
-+define SLIDESHOW_BUILD_CMDS
-+ $(MAKE) CC="$(TARGET_CXX)" CFLAGS="$(TARGET_CFLAGS) `sh $(STAGING_DIR)/usr/bin/sdl-config --cflags`" \
-+ LFLAGS="`sh $(STAGING_DIR)/usr/bin/sdl-config --libs` -lSDL_image" \
-+ -C $(SLIDESHOW_DIR)
-+endef
-+
-+define SLIDESHOW_INSTALL_TARGET_CMDS
-+ cp -dpf $(SLIDESHOW_DIR)/slideshow $(TARGET_DIR)/usr/bin
-+endef
-+
-+define SLIDESHOW_CLEAN_CMDS
-+ $(MAKE) clean -C $(SLIDESHOW_DIR)
-+endef
-+
-+define SLIDESHOW_UNINSTALL_TARGET_CMDS
-+ rm -f $(TARGET_DIR)/usr/bin/slideshow
-+endef
-+
-+$(eval $(generic-package))
-+
-+# BR currently doesn't support .zip archive, so do extraction manually:
-+$(SLIDESHOW_TARGET_EXTRACT): $(SLIDESHOW_TARGET_SOURCE)
-+ $(call MESSAGE,"Extracting")
-+ unzip $(DL_DIR)/$($(PKG)_SOURCE) -d $(BUILD_DIR)
-+ mv $(BUILD_DIR)/slideshow/* $(BUILD_DIR)/slideshow-$(SLIDESHOW_VERSION)/
-+ rm -rf $(BUILD_DIR)/slideshow
-+ touch $@
-Index: buildroot/package/slideshow/slideshow-01-restart-after-end.patch
-===================================================================
---- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ buildroot/package/slideshow/slideshow-01-restart-after-end.patch 2012-02-21 16:44:09.000000000 +0100
-@@ -0,0 +1,73 @@
-+--- slideshow/slideshow.cpp 2003-12-08 22:17:38.000000000 +0100
-++++ slideshow.mod/slideshow.cpp 2007-09-08 19:05:10.000000000 +0200
-+@@ -196,43 +196,48 @@
-+ SDL_FillRect(m_sdl, &rc, SDL_MapRGB(m_sdl->format, 0, 255, 0));
-+ SDL_UpdateRects(m_sdl, 1, &rc);
-+ }
-+-
-+- user_command cmd = wait_for_command();
-+-
-++
-++ user_command cmd = wait_for_command();
-++
-+ switch(cmd)
-+- {
-+- case c_quit:
-+- stop_timer();
-+- return true;
-+- case c_first_slide:
-++ {
-++ case c_quit:
-++ stop_timer();
-++ return true;
-++ case c_first_slide:
-+ stop_timer();
-+ m_image_index = 0;
-+ break;
-+ case c_last_slide:
-+- stop_timer();
-++ stop_timer();
-+ m_image_index = m_file_list->count() - 1;
-+- break;
-++ break;
-+ case c_prev_slide:
-+- stop_timer();
-++ stop_timer();
-+ if ( m_image_index > 0 )
-+ m_image_index--;
-+ break;
-+ case c_next_slide:
-+- stop_timer();
-+- // fall through
-+- case c_timer_advance:
-+- if ( m_image_index < m_file_list->count() - 1 )
-++ stop_timer();
-++ // fall through
-++ case c_timer_advance:
-++ if ( m_image_index <= m_file_list->count() - 1 )
-+ m_image_index++;
-+- break;
-+- case c_redraw:
-+ break;
-+- }
-++ case c_redraw:
-++ break;
-++ }
-+
-+ // stop the auto-advance when the last picture is about to be shown
-+- if ( m_image_index == m_file_list->count() - 1 )
-+- stop_timer();
-+- }
-+-
-++ if ( m_image_index == m_file_list->count() /*- 1*/ )
-++ {
-++ //stop_timer();
-++ m_image_index = 0;
-++ m_prev_image_index = -1;
-++ }
-++
-++ }
-++
-+ return true;
-+ }
-+
-Index: buildroot/package/slideshow/slideshow-02-remove-compile-warning.patch
-===================================================================
---- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ buildroot/package/slideshow/slideshow-02-remove-compile-warning.patch 2012-02-21 16:44:09.000000000 +0100
-@@ -0,0 +1,13 @@
-+--- slideshow.org/SDLFont.cpp 2007-11-17 19:25:02.000000000 +0100
-++++ slideshow/SDLFont.cpp 2007-11-17 20:06:20.000000000 +0100
-+@@ -84,8 +84,8 @@
-+
-+ Uint8 *pixloc = (Uint8 *)pDisplay->pixels + dpitch * y + Bpp * x;
-+ Uint8 *pChar, *pScreen;
-+- char c;
-+- int i, j;
-++ //char c;
-++ int i, j, c;
-+
-+ for(const char *p = text; *p != '\0'; p++)
-+ {
-Index: buildroot/package/slideshow/slideshow-03-fix_compilation_errors_with_recent_gcc.patch
-===================================================================
---- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ buildroot/package/slideshow/slideshow-03-fix_compilation_errors_with_recent_gcc.patch 2012-02-21 16:44:09.000000000 +0100
-@@ -0,0 +1,28 @@
-+On recent gcc some includes are needed to have string stuff defined.
-+
-+Signed-off-by: Julien Boibessot <jul...@ar...>
-+
-+Index: slideshow-1.1/file_list.cpp
-+===================================================================
-+--- slideshow-1.1.orig/file_list.cpp 2011-07-01 18:58:49.000000000 +0200
-++++ slideshow-1.1/file_list.cpp 2011-07-01 18:59:10.000000000 +0200
-+@@ -8,6 +8,7 @@
-+ #include <fstream>
-+ #include <stdlib.h>
-+ #include <ctype.h>
-++#include <string.h>
-+
-+ #ifdef WIN32
-+ #include <io.h>
-+Index: slideshow-1.1/slideshow.h
-+===================================================================
-+--- slideshow-1.1.orig/slideshow.h 2011-07-01 18:59:56.000000000 +0200
-++++ slideshow-1.1/slideshow.h 2011-07-01 19:00:02.000000000 +0200
-+@@ -9,6 +9,7 @@
-+ #pragma once
-+ #endif // _MSC_VER > 1000
-+
-++#include <iostream>
-+ #include "SDL.h"
-+ #include "cache.h"
-+
-Index: buildroot/package/slideshow/slideshow-04-fix_sdl_crash.patch
-===================================================================
---- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ buildroot/package/slideshow/slideshow-04-fix_sdl_crash.patch 2012-02-21 16:44:09.000000000 +0100
-@@ -0,0 +1,17 @@
-+Otherwise crashes on APF27.
-+
-+Signed-off-by: Julien Boibessot <jul...@ar...>
-+
-+Index: slideshow-1.1/slideshow.cpp
-+===================================================================
-+--- slideshow-1.1.orig/slideshow.cpp 2011-07-02 13:19:00.000000000 +0200
-++++ slideshow-1.1/slideshow.cpp 2011-07-02 13:19:17.000000000 +0200
-+@@ -416,7 +416,7 @@
-+ else
-+ flags |= SDL_FULLSCREEN;
-+
-+- m_sdl = SDL_SetVideoMode(m_options->width, m_options->height, 32, flags);
-++ m_sdl = SDL_SetVideoMode(m_options->width, m_options->height, 16 /*32*/, flags);
-+
-+ if ( !m_sdl )
-+ {
diff --git a/patches/buildroot/2013.02/040-linux-makefile.patch b/patches/buildroot/2013.02/040-linux-makefile.patch
deleted file mode 100644
index 727b82c..0000000
--- a/patches/buildroot/2013.02/040-linux-makefile.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-Index: buildroot/linux/linux.mk
-===================================================================
---- buildroot.orig/linux/linux.mk 2012-02-12 23:22:29.000000000 +0100
-+++ buildroot/linux/linux.mk 2012-02-21 20:57:38.000000000 +0100
-@@ -50,7 +50,8 @@
-
- # Get the real Linux version, which tells us where kernel modules are
- # going to be installed in the target filesystem.
--LINUX_VERSION_PROBED = $(shell $(MAKE) $(LINUX_MAKE_FLAGS) -C $(LINUX_DIR) --no-print-directory -s kernelrelease)
-+LINUX_VERSION_PROBED = $(LINUX_VERSION)
-+#LINUX_VERSION_PROBED = $(shell $(MAKE) $(LINUX_MAKE_FLAGS) -C $(LINUX_DIR) --no-print-directory -s kernelrelease)
-
- ifeq ($(BR2_LINUX_KERNEL_USE_INTREE_DTS),y)
- KERNEL_DTS_NAME = $(call qstrip,$(BR2_LINUX_KERNEL_INTREE_DTS_NAME))
-@@ -155,7 +156,14 @@
- KERNEL_SOURCE_CONFIG = $(BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE)
- endif
-
-+ifeq ($(strip $(BR2_TARGET_ARMADEUS)),y)
-+define ARMADEUS_LINUX_CONFIG_HACKS
-+ ln -sf $(ARMADEUS_TOPDIR)/target/linux/modules/ $(@D)/drivers/armadeus
-+endef
-+endif
-+
- define LINUX_CONFIGURE_CMDS
-+ $(ARMADEUS_LINUX_CONFIG_HACKS)
- cp $(KERNEL_SOURCE_CONFIG) $(KERNEL_ARCH_PATH)/configs/buildroot_defconfig
- $(TARGET_MAKE_ENV) $(MAKE1) $(LINUX_MAKE_FLAGS) -C $(@D) buildroot_defconfig
- rm $(KERNEL_ARCH_PATH)/configs/buildroot_defconfig
-@@ -255,7 +253,7 @@
-
-
- define LINUX_INSTALL_IMAGES_CMDS
-- cp $(LINUX_IMAGE_PATH) $(BINARIES_DIR)
-+ cp $(LINUX_IMAGE_PATH) $(BINARIES_DIR)/$(ARMADEUS_LINUX_IMAGE_NAME)
- endef
-
- define LINUX_INSTALL_TARGET_CMDS
-@@ -305,7 +313,7 @@
- # Build the kernel.
- $(TARGET_MAKE_ENV) $(MAKE) $(LINUX_MAKE_FLAGS) -C $(@D) $(LINUX_IMAGE_NAME)
- # Copy the kernel image to its final destination
-- cp $(LINUX_IMAGE_PATH) $(BINARIES_DIR)
-+ cp $(LINUX_IMAGE_PATH) $(BINARIES_DIR)/$(ARMADEUS_LINUX_IMAGE_NAME)
- # If there is a .ub file copy it to the final destination
- test ! -f $(LINUX_IMAGE_PATH).ub || cp $(LINUX_IMAGE_PATH).ub $(BINARIES_DIR)
- $(Q)touch $@
diff --git a/patches/buildroot/2013.02/043-mesa-add_packages.patch b/patches/buildroot/2013.02/043-mesa-add_packages.patch
deleted file mode 100644
index 2854070..0000000
--- a/patches/buildroot/2013.02/043-mesa-add_packages.patch
+++ /dev/null
@@ -1,287 +0,0 @@
-Index: buildroot/package/Config.in
-===================================================================
---- buildroot/package/Config.in
-+++ buildroot/package/Config.in
-@@ -440,6 +440,7 @@
- source "package/librsvg/Config.in"
- source "package/libsvgtiny/Config.in"
- source "package/libungif/Config.in"
-+source "package/mesa/Config.in"
- source "package/opencv/Config.in"
- source "package/pango/Config.in"
- source "package/pixman/Config.in"
-Index: buildroot/package/mesa/Config.in
-===================================================================
---- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ buildroot/package/mesa/Config.in 2012-02-21 16:44:18.000000000 +0100
-@@ -0,0 +1,6 @@
-+config BR2_PACKAGE_MESALIB
-+ bool "Mesa library"
-+ select BR2_PACKAGE_GPM
-+ help
-+ Build MesaGL. It allows you to use OpenGL on your system.
-+
-Index: buildroot/package/mesa/mesa.mk
-===================================================================
---- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ buildroot/package/mesa/mesa.mk 2012-02-21 16:44:18.000000000 +0100
-@@ -0,0 +1,66 @@
-+#############################################################
-+#
-+# Mesa
-+#
-+#############################################################
-+
-+MESALIB_VER:=7.0
-+MESALIB_SOURCE:=MesaLib-$(MESALIB_VER).tar.bz2
-+MESALIB_DEMOS:=MesaDemos-$(MESALIB_VER).tar.bz2
-+MESAGLUT_SOURCE:=MesaGLUT-$(MESALIB_VER).tar.bz2
-+MESALIB_SITE:=http://downloads.sourceforge.net/mesa3d
-+MESALIB_DIR:=$(BUILD_DIR)/Mesa-$(MESALIB_VER)
-+MESALIB_CAT:=bzcat
-+MESALIB_PATCH:=mesa.patch
-+
-+
-+$(DL_DIR)/$(MESALIB_SOURCE):
-+ $(call DOWNLOAD,$(MESALIB_SITE),$(MESALIB_SOURCE))
-+
-+$(DL_DIR)/$(MESALIB_DEMOS):
-+ $(call DOWNLOAD,$(MESALIB_SITE),$(MESALIB_DEMOS))
-+
-+$(DL_DIR)/$(MESAGLUT_SOURCE):
-+ $(call DOWNLOAD,$(MESALIB_SITE),$(MESAGLUT_SOURCE))
-+
-+mesa-source: $(DL_DIR)/$(MESALIB_SOURCE) $(DL_DIR)/$(MESALIB_DEMOS)
-+
-+$(MESALIB_DIR)/.unpacked: $(DL_DIR)/$(MESALIB_SOURCE) $(DL_DIR)/$(MESALIB_DEMOS) $(DL_DIR)/$(MESAGLUT_SOURCE)
-+ $(MESALIB_CAT) $(DL_DIR)/$(MESALIB_SOURCE) | tar -C $(BUILD_DIR) $(TAR_OPTIONS) -
-+ $(MESALIB_CAT) $(DL_DIR)/$(MESALIB_DEMOS) | tar -C $(BUILD_DIR) $(TAR_OPTIONS) -
-+ $(MESALIB_CAT) $(DL_DIR)/$(MESAGLUT_SOURCE) | tar -C $(BUILD_DIR) $(TAR_OPTIONS) -
-+ touch $@
-+
-+$(MESALIB_DIR)/.patched: $(MESALIB_DIR)/.unpacked
-+ support/scripts/apply-patches.sh $(MESALIB_DIR) package/mesa $(MESALIB_PATCH)
-+ touch $@
-+
-+$(MESALIB_DIR)/.compiled: $(MESALIB_DIR)/.patched
-+ (cd $(MESALIB_DIR); \
-+ $(MAKE) realclean; \
-+ $(MAKE) CC="$(TARGET_CC)" CXX="$(TARGET_CXX)" linux-fbdev);
-+#arm-linux-osmesa
-+ touch $@
-+
-+$(TARGET_DIR)/usr/lib/libGL.so.7.1.0: $(MESALIB_DIR)/.compiled
-+ mkdir -p $(TARGET_DIR)/usr/lib/
-+ cp -a $(MESALIB_DIR)/lib/* $(TARGET_DIR)/usr/lib/
-+ touch $@
-+
-+#also depends on host-makedepend ?
-+MESA mesa: gpm $(TARGET_DIR)/usr/lib/libGL.so.7.1.0
-+
-+mesa-clean:
-+ $(MAKE) CC="$(TARGET_CC)" clean -C $(MESALIB_DIR)
-+
-+mesa-dirclean:
-+ rm -rf $(MESALIB_DIR)
-+
-+#############################################################
-+#
-+# Toplevel Makefile options
-+#
-+#############################################################
-+ifeq ($(strip $(BR2_PACKAGE_MESALIB)),y)
-+TARGETS+=mesa
-+endif
-Index: buildroot/package/mesa/mesa.patch
-===================================================================
---- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ buildroot/package/mesa/mesa.patch 2012-02-21 16:44:18.000000000 +0100
-@@ -0,0 +1,188 @@
-+diff -bruN Mesa-7.0.orig/configs/arm-linux-osmesa Mesa-7.0/configs/arm-linux-osmesa
-+--- Mesa-7.0.orig/configs/arm-linux-osmesa 1970-01-01 01:00:00.000000000 +0100
-++++ Mesa-7.0/configs/arm-linux-osmesa 2007-06-26 23:00:52.000000000 +0200
-+@@ -0,0 +1,25 @@
-++# Configuration for building only libOSMesa on Linux, no Xlib driver
-++# This doesn't really have any Linux dependencies, so it should be usable
-++# on other (gcc-based) systems.
-++
-++include $(TOP)/configs/default
-++
-++CONFIG_NAME = arm-linux-osmesa
-++
-++# Compiler and flags
-++CC = gcc
-++CXX = g++
-++CFLAGS = -O3 -ansi -pedantic -D_POSIX_SOURCE -D_POSIX_C_SOURCE=199309L -D_SVID_SOURCE -D_BSD_SOURCE -DPTHREADS
-++CXXFLAGS = -O3 -ansi -pedantic -D_POSIX_SOURCE -D_POSIX_C_SOURCE=199309L -D_SVID_SOURCE -D_BSD_SOURCE
-++
-++
-++# Directories
-++SRC_DIRS = mesa
-++DRIVER_DIRS = osmesa
-++PROGRAM_DIRS = osdemos
-++
-++
-++# Dependencies
-++OSMESA_LIB_DEPS = -lm -lpthread
-++GLU_LIB_DEPS = -L$(TOP)/$(LIB_DIR) -l$(OSMESA_LIB)
-++APP_LIB_DEPS = -lOSMesa
-+diff -bruN Mesa-7.0.orig/Makefile Mesa-7.0/Makefile
-+--- Mesa-7.0.orig/Makefile 2007-06-22 00:14:38.000000000 +0200
-++++ Mesa-7.0/Makefile 2007-06-26 22:31:34.000000000 +0200
-+@@ -111,6 +111,7 @@
-+ linux-ia64-icc-static \
-+ linux-icc \
-+ linux-icc-static \
-++arm-linux-osmesa \
-+ linux-osmesa \
-+ linux-osmesa16 \
-+ linux-osmesa16-static \
-+diff -bruN Mesa-7.0.orig/progs/osdemos/osdemo.c Mesa-7.0/progs/osdemos/osdemo.c
-+--- Mesa-7.0.orig/progs/osdemos/osdemo.c 2007-06-26 23:05:40.000000000 +0200
-++++ Mesa-7.0/progs/osdemos/osdemo.c 2007-06-26 22:44:58.000000000 +0200
-+@@ -22,7 +22,7 @@
-+ #include <stdlib.h>
-+ #include <string.h>
-+ #include "GL/osmesa.h"
-+-#include "GL/glu.h"
-++/*#include "GL/glu.h"*/
-+
-+
-+ #define SAVE_TARGA
-+@@ -30,7 +30,7 @@
-+ static int Width = 400;
-+ static int Height = 400;
-+
-+-
-++/*
-+ static void
-+ Sphere(float radius, int slices, int stacks)
-+ {
-+@@ -50,7 +50,7 @@
-+ gluCylinder(q, base, 0.0, height, slices, stacks);
-+ gluDeleteQuadric(q);
-+ }
-+-
-++*/
-+
-+ static void
-+ Torus(float innerRadius, float outerRadius, int sides, int rings)
-+@@ -131,7 +131,7 @@
-+ Torus(0.275, 0.85, 20, 20);
-+ glPopMatrix();
-+
-+- glPushMatrix();
-++/* glPushMatrix();
-+ glTranslatef(-0.75, -0.5, 0.0);
-+ glRotatef(270.0, 1.0, 0.0, 0.0);
-+ glMaterialfv( GL_FRONT_AND_BACK, GL_AMBIENT_AND_DIFFUSE, green_mat );
-+@@ -143,7 +143,7 @@
-+ glMaterialfv( GL_FRONT_AND_BACK, GL_AMBIENT_AND_DIFFUSE, blue_mat );
-+ Sphere(1.0, 20, 20);
-+ glPopMatrix();
-+-
-++*/
-+ glPopMatrix();
-+
-+ /* This is very important!!!
-+diff -bruN Mesa-7.0.orig/progs/osdemos/ostest1.c Mesa-7.0/progs/osdemos/ostest1.c
-+--- Mesa-7.0.orig/progs/osdemos/ostest1.c 2007-06-26 23:05:40.000000000 +0200
-++++ Mesa-7.0/progs/osdemos/ostest1.c 2007-06-26 22:47:58.000000000 +0200
-+@@ -14,7 +14,7 @@
-+ #include <stdlib.h>
-+ #include <string.h>
-+ #include "GL/osmesa.h"
-+-#include "GL/glu.h"
-++/*#include "GL/glu.h"*/
-+
-+
-+ #define WIDTH 600
-+@@ -23,7 +23,7 @@
-+ static GLboolean WriteFiles = GL_FALSE;
-+ static GLboolean Gradient = GL_FALSE;
-+
-+-
-++/*
-+ static void
-+ Sphere(float radius, int slices, int stacks)
-+ {
-+@@ -43,7 +43,7 @@
-+ gluCylinder(q, base, 0.0, height, slices, stacks);
-+ gluDeleteQuadric(q);
-+ }
-+-
-++*/
-+
-+ static void
-+ Torus(float innerRadius, float outerRadius, int sides, int rings)
-+@@ -225,7 +225,7 @@
-+ glMaterialfv( GL_FRONT_AND_BACK, GL_AMBIENT_AND_DIFFUSE, red_mat );
-+ Torus(0.275, 0.85, 20, 20);
-+ glPopMatrix();
-+-
-++/*
-+ glPushMatrix();
-+ glTranslatef(-1.5, -0.5, 0.0);
-+ glRotatef(270.0, 1.0, 0.0, 0.0);
-+@@ -241,7 +241,7 @@
-+ Sphere(1.2, 20, 20);
-+ glPolygonMode(GL_FRONT_AND_BACK, GL_FILL);
-+ glPopMatrix();
-+-
-++*/
-+ #if 0
-+ glPushMatrix();
-+ glTranslatef(0.75, 0.0, 1.3);
-+diff -bruN Mesa-7.0.orig/src/mesa/Makefile Mesa-7.0/src/mesa/Makefile
-+--- Mesa-7.0.orig/src/mesa/Makefile 2007-06-22 00:10:54.000000000 +0200
-++++ Mesa-7.0/src/mesa/Makefile 2007-06-26 22:31:34.000000000 +0200
-+@@ -107,7 +107,7 @@
-+
-+ stand-alone: depend subdirs $(TOP)/$(LIB_DIR)/$(GL_LIB_NAME) $(TOP)/$(LIB_DIR)/$(OSMESA_LIB_NAME)
-+
-+-osmesa-only: depend subdirs $(TOP)/$(LIB_DIR)/$(OSMESA_LIB_NAME)
-++osmesa-only: depend $(TOP)/$(LIB_DIR)/$(OSMESA_LIB_NAME)
-+
-+ # Make the GL library
-+ $(TOP)/$(LIB_DIR)/$(GL_LIB_NAME): $(STAND_ALONE_OBJECTS)
-+@@ -139,13 +139,13 @@
-+ depend: $(ALL_SOURCES)
-+ @ echo "running $(MKDEP)"
-+ @ touch depend
-+- @$(MKDEP) $(MKDEP_OPTIONS) $(DEFINES) $(INCLUDE_DIRS) $(ALL_SOURCES) \
-+- > /dev/null 2>/dev/null
-++ @$(MKDEP) $(MKDEP_OPTIONS) $(DEFINES) $(INCLUDE_DIRS) $(ALL_SOURCES) #\
-++ #> /dev/null 2>/dev/null
-+
-+
-+-subdirs:
-+- @ (cd x86 ; $(MAKE))
-+- @ (cd x86-64 ; $(MAKE))
-++#subdirs:
-++# @ (cd x86 ; $(MAKE))
-++# @ (cd x86-64 ; $(MAKE))
-+
-+
-+ install: default
-+--- Mesa-7.0.org/configs/linux-fbdev 2007-06-22 00:10:53.000000000 +0200
-++++ Mesa-7.0/configs/linux-fbdev 2007-06-29 19:13:04.000000000 +0200
-+@@ -4,13 +4,14 @@
-+
-+ CONFIG_NAME = linux-fbdev
-+
-+-CFLAGS = -O3 -ffast-math -ansi -pedantic -fPIC -D_POSIX_C_SOURCE=199309L -D_SVID_SOURCE -D_BSD_SOURCE -DPTHREADS -DUSE_GLFBDEV_DRIVER
-++CFLAGS = -O3 -ffast-math -ansi -pedantic -fPIC -D_POSIX_C_SOURCE=199309L -D_SVID_SOURCE -D_BSD_SOURCE -DPTHREADS -DUSE_GLFBDEV_DRIVER -I$(TOP)/../staging_dir/usr/include -I$(TOP)/../staging_dir/include
-+
-+ SRC_DIRS = mesa glu glut/fbdev
-+ DRIVER_DIRS = fbdev osmesa
-+-PROGRAM_DIRS = fbdev demos redbook samples
-++PROGRAM_DIRS = fbdev demos osdemos redbook samples
-+
-+ GL_LIB_DEPS = $(EXTRA_LIB_PATH) -lm -lpthread
-+-OSMESA_LIB_DEPS = -lm -lpthread
-+-GLUT_LIB_DEPS = -L$(TOP)/$(LIB_DIR) -l$(GLU_LIB) -l$(GL_LIB) $(EXTRA_LIB_PATH) -lgpm -lm
-++OSMESA_LIB_DEPS = -lm -lpthread -L$(TOP)/../staging_dir/usr/lib
-++GLUT_LIB_DEPS = -L$(TOP)/$(LIB_DIR) -L$(TOP)/../staging_dir/usr/lib -l$(GLU_LIB) -l$(GL_LIB) $(EXTRA_LIB_PATH) -lgpm -lm
-++APP_LIB_DEPS = -L$(TOP)/$(LIB_DIR) -L$(TOP)/../staging_dir/usr/lib -l$(GLU_LIB) -l$(GL_LIB) -l$(GLUT_LIB) $(EXTRA_LIB_PATH) -lgpm -lm -lstdc++
-+
diff --git a/patches/buildroot/2013.02/045-openssh-add_passwd_expire.patch b/patches/buildroot/2013.02/045-openssh-add_passwd_expire.patch
deleted file mode 100644
index 939063e..0000000
--- a/patches/buildroot/2013.02/045-openssh-add_passwd_expire.patch
+++ /dev/null
@@ -1,18 +0,0 @@
-Index: buildroot/package/openssh/openssh.passwdexpire.patch
-===================================================================
---- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ buildroot/package/openssh/openssh.passwdexpire.patch 2012-03-16 17:29:59.000000000 +0100
-@@ -0,0 +1,13...
[truncated message content] |
|
From: jorasse <jo...@us...> - 2013-07-25 07:01:27
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 98038908c1479870344d2b20e2ff12575e49d5cb (commit)
from 785fce16777bd69bce890f8c3c0acae565fc63e6 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 98038908c1479870344d2b20e2ff12575e49d5cb
Author: Eric Jarrige <eri...@ar...>
Date: Thu Jul 25 09:12:04 2013 +0200
[UBOOT] cleanup non supported version and config
-----------------------------------------------------------------------
Summary of changes:
.../armadeus/apf27/apf27-u-boot-2013.01.01.h | 447 ------
.../device/armadeus/apf51/apf51-u-boot-2012.10.h | 803 ----------
.../100-SPL-Add-u-boot-nand-build-option.patch | 30 -
patches/u-boot/2013.01.01/102-mx1-i2c.patch | 46 -
patches/u-boot/2013.01.01/103-apf9328.patch | 1345 ----------------
.../u-boot/2013.01.01/104-apf9328-makefile.patch | 41 -
patches/u-boot/2013.01.01/106-mx1-pllclk.patch | 63 -
.../u-boot/2013.01.01/107-mx1-pllclk-debug.patch | 26 -
patches/u-boot/2013.01.01/108-DM9000.patch | 48 -
patches/u-boot/2013.01.01/111-mx1-timer.patch | 25 -
...stant-to-support-the-armadeus-APF27-board.patch | 181 ---
...-add-support-for-the-armadeus-APF27-board.patch | 1469 ------------------
.../303-apf27-Add-spl-support-for-the-apf27.patch | 679 ---------
...pf27-Add-FPGA-support-for-the-apf27-board.patch | 372 -----
.../2013.01.01/311-imx-nand-lock-unlock.patch | 95 --
patches/u-boot/2013.01.01/320-spartan.patch | 47 -
patches/u-boot/2013.01.01/321-add_spartan6.patch | 763 ----------
.../2013.01.01/340-apf27-misc-commands.patch | 379 -----
.../2013.01.01/350-nand_large_file_download.patch | 241 ---
...60-arm-support-continuous-mmu-mem-mapping.patch | 76 -
.../2013.01.01/370-imx27-add-i2c-driver.patch | 25 -
patches/u-boot/2013.01.01/400-imx51.patch | 508 -------
patches/u-boot/2013.01.01/401-apf51.patch | 1601 --------------------
patches/u-boot/2013.01.01/403-apf51-wdog.patch | 29 -
patches/u-boot/2013.01.01/407-imx51-nand.patch | 1398 -----------------
patches/u-boot/2013.01.01/409-apf51-nand-spl.patch | 407 -----
patches/u-boot/2013.01.01/410-imx-iim.patch | 547 -------
.../2013.01.01/501-imx28-update-and-fix.patch | 37 -
patches/u-boot/2013.01.01/502-add-apf28.patch | 1338 ----------------
29 files changed, 0 insertions(+), 13066 deletions(-)
delete mode 100644 buildroot/target/device/armadeus/apf27/apf27-u-boot-2013.01.01.h
delete mode 100644 buildroot/target/device/armadeus/apf51/apf51-u-boot-2012.10.h
delete mode 100644 patches/u-boot/2013.01.01/100-SPL-Add-u-boot-nand-build-option.patch
delete mode 100644 patches/u-boot/2013.01.01/102-mx1-i2c.patch
delete mode 100644 patches/u-boot/2013.01.01/103-apf9328.patch
delete mode 100644 patches/u-boot/2013.01.01/104-apf9328-makefile.patch
delete mode 100644 patches/u-boot/2013.01.01/106-mx1-pllclk.patch
delete mode 100644 patches/u-boot/2013.01.01/107-mx1-pllclk-debug.patch
delete mode 100644 patches/u-boot/2013.01.01/108-DM9000.patch
delete mode 100644 patches/u-boot/2013.01.01/111-mx1-timer.patch
delete mode 100644 patches/u-boot/2013.01.01/301-imx27-Add-missing-constant-to-support-the-armadeus-APF27-board.patch
delete mode 100644 patches/u-boot/2013.01.01/302-apf27-add-support-for-the-armadeus-APF27-board.patch
delete mode 100644 patches/u-boot/2013.01.01/303-apf27-Add-spl-support-for-the-apf27.patch
delete mode 100644 patches/u-boot/2013.01.01/304-apf27-Add-FPGA-support-for-the-apf27-board.patch
delete mode 100644 patches/u-boot/2013.01.01/311-imx-nand-lock-unlock.patch
delete mode 100644 patches/u-boot/2013.01.01/320-spartan.patch
delete mode 100644 patches/u-boot/2013.01.01/321-add_spartan6.patch
delete mode 100644 patches/u-boot/2013.01.01/340-apf27-misc-commands.patch
delete mode 100644 patches/u-boot/2013.01.01/350-nand_large_file_download.patch
delete mode 100644 patches/u-boot/2013.01.01/360-arm-support-continuous-mmu-mem-mapping.patch
delete mode 100644 patches/u-boot/2013.01.01/370-imx27-add-i2c-driver.patch
delete mode 100644 patches/u-boot/2013.01.01/400-imx51.patch
delete mode 100644 patches/u-boot/2013.01.01/401-apf51.patch
delete mode 100644 patches/u-boot/2013.01.01/403-apf51-wdog.patch
delete mode 100644 patches/u-boot/2013.01.01/407-imx51-nand.patch
delete mode 100644 patches/u-boot/2013.01.01/409-apf51-nand-spl.patch
delete mode 100644 patches/u-boot/2013.01.01/410-imx-iim.patch
delete mode 100644 patches/u-boot/2013.01.01/501-imx28-update-and-fix.patch
delete mode 100644 patches/u-boot/2013.01.01/502-add-apf28.patch
diff --git a/buildroot/target/device/armadeus/apf27/apf27-u-boot-2013.01.01.h b/buildroot/target/device/armadeus/apf27/apf27-u-boot-2013.01.01.h
deleted file mode 100644
index df2a9cc..0000000
--- a/buildroot/target/device/armadeus/apf27/apf27-u-boot-2013.01.01.h
+++ /dev/null
@@ -1,447 +0,0 @@
-/*
- *
- * Configuration settings for the Armadeus Project motherboard APF27
- *
- * Copyright (C) 2008-2012 ej / Armadeus Project <eri...@ar...>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#define CONFIG_VERSION_VARIABLE
-#define CONFIG_ENV_VERSION "3.3"
-#define CONFIG_IDENT_STRING " apf27 patch 3.8"
-#define CONFIG_BOARD_NAME apf27
-
-/*
- * SoC configurations
- */
-#define CONFIG_ARM926EJS /* this is an ARM926EJS CPU */
-#define CONFIG_MX27 /* in a Freescale i.MX27 Chip */
-#define CONFIG_MACH_TYPE 1698 /* APF27 */
-
-/*
- * Enable the call to miscellaneous platform dependent initialization.
- */
-#define CONFIG_SYS_NO_FLASH /* to be define before <config_cmd_default.h> */
-#define CONFIG_MISC_INIT_R
-#define CONFIG_BOARD_EARLY_INIT_F
-
-/*
- * Board display option
- */
-#define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_DISPLAY_CPUINFO
-
-/*
- * SPL
- */
-/* Copy SPL+U-Boot here */
-#define CONFIG_SYS_NAND_U_BOOT_DST (CONFIG_SYS_TEXT_BASE - 0x800)
-/* Size is the partion size */
-#define CONFIG_SYS_NAND_U_BOOT_SIZE CONFIG_SYS_MONITOR_LEN
-/* Build image with spl and u-boot */
-#define CONFIG_NAND_U_BOOT
-#define CONFIG_SPL_PAD_TO 0xa1000000
-
-/*
- * SPL
- */
-#define CONFIG_SPL
-#define CONFIG_SPL_TEXT_BASE 0xa0fff800
-/* #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR */
-#define CONFIG_SPL_STACK 0xd8000800
-#define CONFIG_SYS_NAND_U_BOOT_START 0xa1000000
-#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x800
-#define CONFIG_SPL_LIBGENERIC_SUPPORT /* memcpy */
-
-#define CONFIG_CMD_NAND_SIMPLE
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_DNS
-#define CONFIG_BOOTP_DNS2
-
-#define CONFIG_HOSTNAME CONFIG_BOARD_NAME
-#define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
-
-/*
- * U-Boot Commands
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_ASKENV /* ask for env variable */
-#define CONFIG_CMD_BSP /* Board Specific functions */
-#define CONFIG_CMD_CACHE /* icache, dcache */
-#define CONFIG_CMD_DHCP /* DHCP Support */
-#define CONFIG_CMD_DNS
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT /* FAT support */
-#define CONFIG_CMD_IMX_FUSE /* imx iim fuse */
-#define CONFIG_CMD_MII /* MII support */
-#define CONFIG_CMD_MMC
-#define CONFIG_CMD_MTDPARTS /* MTD partition support */
-#define CONFIG_CMD_NAND /* NAND support */
-#define CONFIG_CMD_NAND_LOCK_UNLOCK
-#define CONFIG_CMD_NAND_TRIMFFS
-#define CONFIG_CMD_NFS /* NFS support */
-#define CONFIG_CMD_PING /* ping support */
-#define CONFIG_CMD_SETEXPR /* setexpr support */
-#define CONFIG_CMD_UBI
-#define CONFIG_CMD_UBIFS
-
-/*
- * Memory configurations
- */
-#define CONFIG_NR_DRAM_POPULATED 1
-#define CONFIG_NR_DRAM_BANKS 2
-
-#define ACFG_SDRAM_MBYTE_SYZE 64
-
-#define PHYS_SDRAM_1 0xA0000000
-#define PHYS_SDRAM_2 0xB0000000
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (512<<10))
-#define CONFIG_SYS_MEMTEST_START 0xA0000000 /* memtest test area */
-#define CONFIG_SYS_MEMTEST_END 0xA0300000 /* 3 MiB RAM test */
-
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE \
- + PHYS_SDRAM_1_SIZE - 0x0100000)
-
-#define CONFIG_SYS_TEXT_BASE 0xA1000000
-
-/*
- * FLASH organization
- */
-#define ACFG_MONITOR_OFFSET 0x00000000
-#define CONFIG_SYS_MONITOR_LEN 0x00100000 /* 1MiB */
-#define CONFIG_ENV_IS_IN_NAND
-#define CONFIG_ENV_OVERWRITE
-#define CONFIG_ENV_OFFSET 0x00100000 /* NAND offset */
-#define CONFIG_ENV_SIZE 0x00020000 /* 128kB */
-#define CONFIG_ENV_RANGE 0X00080000 /* 512kB */
-#define CONFIG_ENV_OFFSET_REDUND \
- (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) /* +512kB */
-#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE /* 512kB */
-#define CONFIG_FIRMWARE_OFFSET 0x00200000
-#define CONFIG_KERNEL_OFFSET 0x00300000
-#define CONFIG_ROOTFS_OFFSET 0x00800000
-
-#define CONFIG_MTDMAP "mxc_nand.0"
-#define MTDIDS_DEFAULT "nand0=" CONFIG_MTDMAP
-#define MTDPARTS_DEFAULT "mtdparts=" CONFIG_MTDMAP \
- ":1M(u-boot)ro," \
- "512K(env)," \
- "512K(env2)," \
- "512K(firmware)," \
- "512K(dtb)," \
- "5M(kernel)," \
- "-(rootfs)"
-
-/*
- * U-Boot general configurations
- */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT "BIOS> " /* prompt string */
-#define CONFIG_SYS_CBSIZE 2048 /* console I/O buffer */
-#define CONFIG_SYS_PBSIZE \
- (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
- /* Print buffer size */
-#define CONFIG_SYS_MAXARGS 16 /* max command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
- /* Boot argument buffer size */
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_HUSH_PARSER /* enable the "hush" shell */
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " /* secondary prompt string */
-
-/*
- * Boot Linux
- */
-#define CONFIG_CMDLINE_TAG /* send commandline to Kernel */
-#define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */
-#define CONFIG_INITRD_TAG /* send initrd params */
-
-#define CONFIG_OF_LIBFDT
-
-#define CONFIG_BOOTDELAY 5
-#define CONFIG_ZERO_BOOTDELAY_CHECK
-#define CONFIG_BOOTFILE __stringify(CONFIG_BOARD_NAME) "-linux.bin"
-#define CONFIG_BOOTARGS "console=" __stringify(ACFG_CONSOLE_DEV) "," \
- __stringify(CONFIG_BAUDRATE) " " MTDPARTS_DEFAULT \
- " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs "
-
-#define ACFG_CONSOLE_DEV ttySMX0
-#define CONFIG_BOOTCOMMAND "run ubifsboot"
-#define CONFIG_SYS_AUTOLOAD "no"
-/*
- * Default load address for user programs and kernel
- */
-#define CONFIG_LOADADDR 0xA0000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
-/*
- * Extra Environments
- */
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "env_version=" CONFIG_ENV_VERSION "\0" \
- "consoledev=" __stringify(ACFG_CONSOLE_DEV) "\0" \
- "mtdparts=" MTDPARTS_DEFAULT "\0" \
- "partition=nand0,6\0" \
- "u-boot_addr=" __stringify(ACFG_MONITOR_OFFSET) "\0" \
- "env_addr=" __stringify(CONFIG_ENV_OFFSET) "\0" \
- "firmware_addr=" __stringify(CONFIG_FIRMWARE_OFFSET) "\0" \
- "kernel_addr=" __stringify(CONFIG_KERNEL_OFFSET) "\0" \
- "rootfs_addr=" __stringify(CONFIG_ROOTFS_OFFSET) "\0" \
- "board_name=" __stringify(CONFIG_BOARD_NAME) "\0" \
- "kernel_addr_r=A0000000\0" \
- "addnfsargs=setenv bootargs ${bootargs} " \
- "root=/dev/nfs rw nfsroot=${serverip}:${rootpath}\0" \
- "addubifsargs=setenv bootargs ${bootargs} " \
- "ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs\0" \
- "addmmcargs=setenv bootargs ${bootargs} " \
- "root=/dev/mmcblk0p1 rootfstype=ext2\0" \
- "addipargs=setenv bootargs ${bootargs} " \
- "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:" \
- "${hostname}:eth0:off \0" \
- "nfsboot=setenv bootargs console=${consoledev},${baudrate} " \
- "${mtdparts} ${extrabootargs}; run addnfsargs addipargs;"\
- "nfs ${kernel_addr_r} " \
- "${serverip}:${rootpath}/boot/${board_name}-linux.bin;" \
- "if test -n ${fdt_addr_r} ; then " \
- "nand read ${fdt_addr_r} dtb; fi;" \
- "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
- "ubifsboot=setenv bootargs console=${consoledev},${baudrate} " \
- "${mtdparts} ${extrabootargs};run addubifsargs addipargs;"\
- "if test -n ${fdt_addr_r} ; then " \
- "nand read ${fdt_addr_r} dtb; fi;" \
- "nboot ${kernel_addr_r} kernel;" \
- "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
- "mmcboot=setenv bootargs console=${consoledev},${baudrate} " \
- "${mtdparts} ${extrabootargs}; run addmmcargs addipargs;"\
- "if test -n ${fdt_addr_r} ; then " \
- "nand read ${fdt_addr_r} dtb; fi;" \
- "mmc dev 0; ext2load mmc 0 ${kernel_addr_r}" \
- " /boot/${board_name}-linux.bin;" \
- "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
- "boot_nfs_fallback_flash=if ping ${serverip};" \
- "then echo Boot over NFS; run nfsboot;" \
- "else echo Boot from the board; run ubifsboot;" \
- "fi\0" \
- "firmware_autoload=0\0" \
- "flash_uboot=nand unlock ${u-boot_addr} ;" \
- "nand erase.part u-boot;" \
- "if nand write.trimffs ${fileaddr} ${u-boot_addr} ${filesize};"\
- "then nand lock; nand unlock ${env_addr};" \
- "echo Flashing of uboot succeed;" \
- "else echo Flashing of uboot failed;" \
- "fi; \0" \
- "flash_firmware=nand erase.part firmware;" \
- "if nand write.trimffs ${fileaddr} ${firmware_addr} ${filesize};"\
- "then echo Flashing of Firmware succeed;" \
- "else echo Flashing of Firmware failed;" \
- "fi\0" \
- "flash_kernel=nand erase.part kernel;" \
- "if nand write.trimffs ${fileaddr} ${kernel_addr} ${filesize};"\
- "then echo Flashing of kernel succeed;" \
- "else echo Flashing of kernel failed;" \
- "fi\0" \
- "flash_rootfs=nand erase.part rootfs;" \
- "if nand write.trimffs ${fileaddr} ${rootfs_addr} ${filesize};"\
- "then echo Flashing of rootfs succeed;" \
- "else echo Flashing of rootfs failed;" \
- "fi\0" \
- "flash_dtb=nand erase.part dtb;" \
- "if nand write.trimffs ${fileaddr} dtb ${filesize};" \
- "then echo Flashing of rootfs succeed;" \
- "else echo Flashing of rootfs failed;" \
- "fi\0" \
- "flash_reset_env=env default -f -a; saveenv;" \
- "echo Flash environment variables erased!\0" \
- "download_uboot=tftpboot ${loadaddr} ${board_name}-u-boot-nand.bin\0" \
- "download_kernel=tftpboot ${loadaddr} ${board_name}-linux.bin\0" \
- "download_rootfs=tftpboot ${loadaddr} ${board_name}-rootfs.ubi\0" \
- "download_dtb=tftpboot ${loadaddr} imx27-${board_name}.dtb\0" \
- "update_uboot=run download_uboot flash_uboot\0" \
- "update_kernel=run download_kernel flash_kernel\0" \
- "update_rootfs=run download_rootfs flash_rootfs\0" \
- "update_dtb=run download_dtb flash_dtb\0" \
- "update_all=run download_kernel flash_kernel download_rootfs " \
- "flash_rootfs download_uboot flash_uboot\0" \
- "unlock_regs=mw 10000008 0; mw 10020008 0\0" \
-
-/*
- * Serial Driver
- */
-#define CONFIG_MXC_UART
-#define CONFIG_CONS_INDEX 1
-#define CONFIG_BAUDRATE 115200
-#define CONFIG_MXC_UART_BASE UART1_BASE
-
-/*
- * GPIO
- */
-#define CONFIG_MXC_GPIO
-
-/*
- * NOR
- */
-
-/*
- * NAND
- */
-#define CONFIG_NAND_MXC
-
-#define CONFIG_MXC_NAND_REGS_BASE 0xD8000000
-#define CONFIG_SYS_NAND_BASE CONFIG_MXC_NAND_REGS_BASE
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-
-#define CONFIG_MXC_NAND_HWECC
-#define CONFIG_SYS_NAND_LARGEPAGE
-#define IMX27_NAND_16BITS
-#define NAND_MAX_CHIPS 1
-
-
-#define CONFIG_FLASH_SHOW_PROGRESS 45
-#define CONFIG_SYS_NAND_QUIET 1
-
-#define CONFIG_BOOT_TRACE_REG 0xAFFFFFF8 /* Addr to store traces of SPL boot*/
-
-/*
- * Partitions & Filsystems
- */
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_DOS_PARTITION
-#define CONFIG_SUPPORT_VFAT
-
-/*
- * UBIFS
- */
-#define CONFIG_RBTREE
-#define CONFIG_LZO
-
-/*
- * Ethernet (on SOC imx FEC)
- */
-#define CONFIG_FEC_MXC
-
-#define CONFIG_NET_MULTI
-#define CONFIG_FEC_MXC_PHYADDR 0x1f
-#define CONFIG_MII 1 /* MII PHY management */
-
-/*
- * FPGA
- */
-#define CONFIG_FPGA CONFIG_SYS_SPARTAN3
-#define CONFIG_FPGA_COUNT 1
-#define CONFIG_FPGA_XILINX
-#define CONFIG_FPGA_SPARTAN3
-#define CONFIG_SYS_FPGA_WAIT 20000 /* 20 ms */
-#define CONFIG_SYS_FPGA_PROG_FEEDBACK
-#define CONFIG_SYS_FPGA_CHECK_CTRLC
-#define CONFIG_SYS_FPGA_CHECK_ERROR
-
-/*
- * Fuses - IIM
- */
-#ifdef CONFIG_CMD_IMX_FUSE
-#define IIM_MAC_BANK 0
-#define IIM_MAC_ROW 5
-#define IIM0_SCC_KEY 11
-#define IIM1_SUID 1
-#endif
-
-/*
- * I2C
- */
-#ifdef CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C 1
-
-#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
-#define CONFIG_SYS_I2C_SLAVE 0x7F
-
-#define CONFIG_I2C_CMD_TREE
-#define CONFIG_I2C_MULTI_BUS 2
-#define CONFIG_SYS_I2C_NOPROBES { }
-
-#ifdef CONFIG_CMD_EEPROM
-# define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24LC02 */
-# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* msec */
-#endif /* CONFIG_CMD_EEPROM */
-#endif /* CONFIG_CMD_I2C */
-
-/*
- * SD/MMC
- */
-#ifdef CONFIG_CMD_MMC
-#define CONFIG_MMC
-#define CONFIG_GENERIC_MMC
-#define CONFIG_MXC_MMC
-#define CONFIG_MXC_MCI_REGS_BASE 0x10014000
-#endif
-
-/*
- * RTC
- */
-#ifdef CONFIG_CMD_DATE
-#define CONFIG_RTC_DS1374
-#define CONFIG_SYS_RTC_BUS_NUM 0
-#endif /* CONFIG_CMD_DATE */
-
-/*
- * Clocks
- */
-#define CONFIG_SYS_HZ 1000 /* Ticks per second */
-
-/*
- * PLL
- *
- * 31 | x |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0
- * |CPLM|X|----PD---|--------MFD---------|XXX|--MFI--|-----MFN-----------|
- */
-#define CONFIG_MX27_CLK32 32768 /* 32768 or 32000 Hz crystal */
-#undef CONFIG_MX27_CLK26 /* No external 26MHz external clock */
-
-#if (ACFG_SDRAM_MBYTE_SYZE == 64) /* micron MT46H16M32LF -6 */
-/* micron 64MB */
-#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
-#define PHYS_SDRAM_2_SIZE 0x04000000 /* 64 MB */
-#endif
-
-#if (ACFG_SDRAM_MBYTE_SYZE == 128)
-/* micron 128MB */
-#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
-#define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
-#endif
-
-#if (ACFG_SDRAM_MBYTE_SYZE == 256)
-/* micron 256MB */
-#define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */
-#define PHYS_SDRAM_2_SIZE 0x10000000 /* 256 MB */
-#endif
-
-#endif /* __CONFIG_H */
diff --git a/buildroot/target/device/armadeus/apf51/apf51-u-boot-2012.10.h b/buildroot/target/device/armadeus/apf51/apf51-u-boot-2012.10.h
deleted file mode 100644
index 63024df..0000000
--- a/buildroot/target/device/armadeus/apf51/apf51-u-boot-2012.10.h
+++ /dev/null
@@ -1,803 +0,0 @@
-/*
- *
- * Configuration settings for the Armadeus Project motherboard APF51
- *
- * Copyright (C) 2010-2012 ej / Armadeus Project <eri...@ar...>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#define CONFIG_VERSION_VARIABLE
-#define CONFIG_ENV_VERSION "1.3"
-#define CONFIG_IDENT_STRING " apf51 patch 1.8"
-#define CONFIG_BOARD_NAME apf51
-
-/*
- * SoC configurations
- */
-#define CONFIG_ARMV7 /* This is armv7 Cortex-A8 CPU */
-#define CONFIG_MX51 /* in a Freescale i.MX51 Chip */
-#define CONFIG_MACH_TYPE 2795 /* APF51 */
-
-/*
- * Enable the call to miscellaneous platform dependent initialization.
- */
-#define CONFIG_SYS_NO_FLASH /* to be define before <config_cmd_default.h> */
-#define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_MISC_INIT_R
-#define CONFIG_BOARD_LATE_INIT
-
-/*
- * Board display option
- */
-/*#define CONFIG_DISPLAY_BOARDINFO*/
-/*#define CONFIG_DISPLAY_CPUINFO*/
-
-/*
- * SPL
- */
-#ifndef CONFIG_DOWNLOAD_BY_DEBUGGER
-#define CONFIG_FLASH_HEADER
-#define CONFIG_FLASH_HEADER_OFFSET 0x400
-#define CONFIG_FLASH_HEADER_BARKER 0xB1
-#endif
-
-#define CONFIG_NAND_U_BOOT
-/* APF Copy SPL+U-Boot here */
-#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_LOAD_ADDR
-/* APF Size is the partion size */
-#define CONFIG_SYS_NAND_U_BOOT_SIZE CONFIG_SYS_MONITOR_LEN
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_BOOTFILESIZE
-/*
-#define CONFIG_BOOTP_DNS
-#define CONFIG_BOOTP_DNS2
-*/
-
-#define CONFIG_HOSTNAME CONFIG_BOARD_NAME
-#define CONFIG_ROOTPATH "/tftpboot/" MK_STR(CONFIG_BOARD_NAME) "-root"
-
-/*
- * U-Boot Commands
- */
-#include <config_cmd_default.h>
-
-#undef CONFIG_CMD_LOADS
-#define CONFIG_CMD_ASKENV /* ask for env variable */
-/*#define CONFIG_CMD_BSP*/ /* Board Specific functions */
-#define CONFIG_CMD_CACHE /* icache, dcache */
-#define CONFIG_CMD_DHCP /* DHCP Support */
-/*#define CONFIG_CMD_DNS*/
-/*#define CONFIG_CMD_EXT2*/
-/*#define CONFIG_CMD_I2C*/ /* I2C serial bus support */
-/*#define CONFIG_CMD_IIM*/ /* imx iim fuse */
-/*#define CONFIG_CMD_MMC*/
-#define CONFIG_CMD_MTDPARTS /* MTD partition support */
-#define CONFIG_CMD_NAND /* NAND support */
-#define CONFIG_CMD_NAND_LOCK_UNLOCK
-#define CONFIG_CMD_NAND_TRIMFFS
-#undef CONFIG_CMD_NFS
-#define CONFIG_CMD_PING /* ping support */
-/*#define CONFIG_CMD_SETEXPR*/ /* setexpr support */
-/*#define CONFIG_CMD_UBI*/
-/*#define CONFIG_CMD_UBIFS*/
-
-#undef CONFIG_CMD_XIMG /* Load part of Multi Image */
-
-/*
- * Memory configurations
- */
-#define CONFIG_NR_DRAM_POPULATED 1
-#define CONFIG_NR_DRAM_BANKS 2
-#define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR /* SDRAM bank #1 */
-#define PHYS_SDRAM_SIZE 256
-#define PHYS_SDRAM_1_SIZE (PHYS_SDRAM_SIZE) * 1024 * 1024
-#define PHYS_SDRAM_2_SIZE (PHYS_SDRAM_SIZE) * 1024 * 1024
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (2 * 1024 * 1024))
-#define CONFIG_SYS_MEMTEST_START 0x90000000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x90100000 /* 1st MiB in DRAM */
-
-#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
-#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
-
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
-#define CONFIG_SYS_TEXT_BASE 0x97000000
-
-/*
- * FLASH organization
- */
-#define CONFIG_SYS_MONITOR_OFFSET 0x00000000 /* offset in NAND */
-#define CONFIG_SYS_MONITOR_LEN 0x00100000 /* 1MB */
-#define CONFIG_ENV_IS_IN_NAND
-#define CONFIG_ENV_OVERWRITE
-#define CONFIG_ENV_OFFSET 0x00100000 /* NAND offset */
-#define CONFIG_ENV_SIZE 0x00020000 /* 128kB */
-#define CONFIG_ENV_RANGE 0x00080000 /* 512kB */
-#define CONFIG_ENV_OFFSET_REDUND \
- (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) /* +512kB */
-#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE /* 512kB */
-#define CONFIG_FIRMWARE_OFFSET 0x00200000
-#define CONFIG_KERNEL_OFFSET 0x00400000
-#define CONFIG_ROOTFS_OFFSET 0x00C00000
-
-#define CONFIG_MTDMAP "mxc_nand"
-#define MTDIDS_DEFAULT "nand0=" CONFIG_MTDMAP
-#define MTDPARTS_DEFAULT "mtdparts=" CONFIG_MTDMAP \
- ":1M(u-boot)ro,"\
- "512K(env)," \
- "512K(env2)," \
- "1M(firmware)," \
- "512K(dtb)," \
- "512K(splash)," \
- "8M(kernel)," \
- "-(rootfs)"
-
-/*
- * U-Boot general configurations
- */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT "BIOS> " /* prompt string */
-#define CONFIG_SYS_CBSIZE 2048 /* console I/O buffer */
-#define CONFIG_SYS_PBSIZE \
- (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
- /* Print buffer size */
-#define CONFIG_SYS_MAXARGS 16 /* max command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
- /* Boot argument buffer size */
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_HUSH_PARSER /* enable the "hush" shell */
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " /* secondary prompt string */
-
-/*
- * Boot Linux
- */
-#define CONFIG_CMDLINE_TAG /* send commandline to Kernel */
-#define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */
-#define CONFIG_INITRD_TAG /* send initrd params */
-
-/* #define CONFIG_REVISION_TAG */
-#define CONFIG_OF_LIBFDT
-
-#define CONFIG_BOOTDELAY 5
-#define CONFIG_ZERO_BOOTDELAY_CHECK
-#define CONFIG_BOOTFILE MK_STR(CONFIG_BOARD_NAME) "-linux.bin"
-#define CONFIG_BOOTARGS "console=" MK_STR(ACFG_CONSOLE_DEV) "," \
- MK_STR(CONFIG_BAUDRATE) " " MTDPARTS_DEFAULT \
- " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs "
-
-#define ACFG_CONSOLE_DEV ttymxc2
-#define CONFIG_BOOTCOMMAND "run ubifsboot"
-#define CONFIG_SYS_AUTOLOAD "no"
-/*
- * Default load address for user programs and kernel
- */
-#define CONFIG_LOADADDR 0x90000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
-/*
- * Extra Environments
- */
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "env_version=" CONFIG_ENV_VERSION "\0" \
- "consoledev=" MK_STR(ACFG_CONSOLE_DEV) "\0" \
- "mtdparts=" MTDPARTS_DEFAULT "\0" \
- "partition=nand0,7\0" \
- "uboot_addr=" MK_STR(CONFIG_SYS_MONITOR_OFFSET) "\0" \
- "env_addr=" MK_STR(CONFIG_ENV_OFFSET) "\0" \
- "firmware_addr=" MK_STR(CONFIG_FIRMWARE_OFFSET) "\0" \
- "kernel_addr=" MK_STR(CONFIG_KERNEL_OFFSET) "\0" \
- "rootfs_addr=" MK_STR(CONFIG_ROOTFS_OFFSET) "\0" \
- "board_name=" MK_STR(CONFIG_BOARD_NAME) "\0" \
- "kernel_addr_r=90800000\0" \
- "addnfsargs=setenv bootargs ${bootargs} " \
- "root=/dev/nfs rw nfsroot=${serverip}:${rootpath}\0" \
- "addubifsargs=setenv bootargs ${bootargs} " \
- "ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs\0" \
- "addmmcargs=setenv bootargs ${bootargs} " \
- "root=/dev/mmcblk0p1 rootfstype=ext2\0" \
- "addipargs=setenv bootargs ${bootargs} " \
- "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:" \
- "${hostname}:eth0:off\0" \
- "nfsboot=setenv bootargs console=${consoledev},${baudrate} " \
- "${mtdparts} ${extrabootargs}; run addnfsargs addipargs;"\
- "nfs ${kernel_addr_r} " \
- "${serverip}:${rootpath}/boot/${board_name}-linux.bin;" \
- "if test -n ${fdt_addr_r} ; then " \
- "nand read ${fdt_addr_r} dtb; fi;" \
- "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
- "ubifsboot=setenv bootargs console=${consoledev},${baudrate} " \
- "${mtdparts} ${extrabootargs};run addubifsargs addipargs;"\
- "if test -n ${fdt_addr_r} ; then " \
- "nand read ${fdt_addr_r} dtb; fi;" \
- "nboot ${kernel_addr_r} kernel;" \
- "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
- "mmcboot=setenv bootargs console=${consoledev},${baudrate} " \
- "${mtdparts} ${extrabootargs}; run addmmcargs addipargs;"\
- "if test -n ${fdt_addr_r} ; then " \
- "nand read ${fdt_addr_r} dtb; fi;" \
- "nboot ${kernel_addr_r} kernel;" \
- "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
- "firmware_autoload=0\0" \
- "flash_uboot=nand unlock ${uboot_addr} ;" \
- "nand erase.part u-boot;" \
- "if nand write.trimffs ${fileaddr} ${uboot_addr} ${filesize};"\
- "then nand lock; nand unlock ${env_addr};" \
- "echo Flashing of uboot succeed;" \
- "else echo Flashing of uboot failed;" \
- "fi; \0" \
- "flash_firmware=nand erase.part firmware;" \
- "if nand write.trimffs ${fileaddr} ${firmware_addr}" \
- " ${filesize};" \
- "then echo Flashing of Firmware succeed;" \
- "else echo Flashing of Firmware failed;" \
- "fi\0" \
- "flash_kernel=nand erase.part kernel;" \
- "if nand write.trimffs ${fileaddr} ${kernel_addr} ${filesize};"\
- "then echo Flashing of kernel succeed;" \
- "else echo Flashing of kernel failed;" \
- "fi\0" \
- "flash_rootfs=nand erase.part rootfs;" \
- "if nand write.trimffs ${fileaddr} ${rootfs_addr} ${filesize};"\
- "then echo Flashing of rootfs succeed;" \
- "else echo Flashing of rootfs failed;" \
- "fi\0" \
- "flash_dtb=nand erase.part dtb;" \
- "if nand write.trimffs ${fileaddr} dtb ${filesize};" \
- "then echo Flashing of rootfs succeed;" \
- "else echo Flashing of rootfs failed;" \
- "fi\0" \
- "flash_reset_env=env default -f -a; saveenv;" \
- "echo Flash environment variables erased!\0" \
- "download_uboot=tftpboot ${loadaddr} ${board_name}-u-boot-nand.bin\0" \
- "download_kernel=tftpboot ${loadaddr} ${board_name}-linux.bin\0" \
- "download_rootfs=tftpboot ${loadaddr} ${board_name}-rootfs.ubi\0" \
- "download_dtb=tftpboot ${loadaddr} imx51-${board_name}.dtb\0" \
- "update_uboot=run download_uboot flash_uboot\0" \
- "update_kernel=run download_kernel flash_kernel\0" \
- "update_rootfs=run download_rootfs flash_rootfs\0" \
- "update_dtb=run download_dtb flash_dtb\0" \
- "update_all=run download_kernel flash_kernel download_rootfs " \
- "flash_rootfs download_uboot flash_uboot\0" \
- "unlock_regs=echo unlock_reg not needed anymore\0"
-
-/*
- * Serial Driver
- */
-#define CONFIG_MXC_UART
-#define CONFIG_MXC_UART_BASE UART3_BASE
-#define CONFIG_BAUDRATE 115200
-
-/*
- * GPIO
- */
-#define CONFIG_MXC_GPIO
-
-/*
- * NOR
- */
-
-/*
- * NAND
- */
-#define CONFIG_NAND_MXC_V2
-#define CONFIG_MXC_NAND_REGS_BASE 0xCFFF0000
-#define CONFIG_SYS_NAND_BASE CONFIG_MXC_NAND_REGS_BASE
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-
-#define CONFIG_MXC_NAND_HWECC
-#define CONFIG_SYS_NAND_LARGEPAGE
-#define NAND_MAX_CHIPS 1
-
-#define CONFIG_SYS_DIRECT_FLASH_TFTP
-#define CONFIG_FLASH_SHOW_PROGRESS 45
-#define CONFIG_SYS_NAND_QUIET 1
-
-/*
- * Partitions & Filsystems
- */
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-/*
-#define CONFIG_DOS_PARTITION
-#define CONFIG_SUPPORT_VFAT
-*/
-
-/*
- * UBIFS
- */
-/*
-#define CONFIG_RBTREE
-#define CONFIG_LZO
-*/
-
-/*
- * Ethernet (on SOC mx51 FEC)
- */
-#define CONFIG_FEC_MXC
-#define IMX_FEC_BASE FEC_BASE_ADDR
-#define CONFIG_SYS_PHY_RESET_GPIO IOMUX_TO_GPIO(MX51_PIN_DI1_PIN11)
-
-#define CONFIG_FEC_MXC_PHYADDR 0x02
-#define CONFIG_MII
-#define CONFIG_DISCOVER_PHY
-
-/*
- * FPGA
- */
-#define CONFIG_FPGA CONFIG_SYS_SPARTAN3
-#define CONFIG_FPGA_COUNT 1
-#define CONFIG_FPGA_XILINX
-#define CONFIG_FPGA_SPARTAN3
-#define CONFIG_SYS_FPGA_WAIT 20000 /* 20 ms */
-#define CONFIG_SYS_FPGA_PROG_FEEDBACK
-#define CONFIG_SYS_FPGA_CHECK_CTRLC
-#define CONFIG_SYS_FPGA_CHECK_ERROR
-
-/* FPGA program pin configuration */
-#define ACFG_FPGA_PWR MX51_PIN_DI1_D0_CS
-#define ACFG_FPGA_PRG MX51_PIN_CSI2_D12
-#define ACFG_FPGA_RDATA CS1_BASE_ADDR
-#define ACFG_FPGA_WDATA CS1_BASE_ADDR
-#define ACFG_FPGA_INIT MX51_PIN_CSI2_D18
-#define ACFG_FPGA_DONE MX51_PIN_CSI2_D13
-#define ACFG_FPGA_SUSPEND MX51_PIN_DISPB2_SER_DIO
-
-#define ACFG_FPGA_GCR1_VALUE 0x019100bf
-#define ACFG_FPGA_GCR2_VALUE 0x00000000
-
-#define ACFG_FPGA_RCR1_VALUE 0x04000010
-#define ACFG_FPGA_RCR2_VALUE 0x00000000
-
-#define ACFG_FPGA_WCR1_VALUE 0x04000008
-#define ACFG_FPGA_WCR2_VALUE 0x00000000
-
-/*
- * Fuses - IIM
- */
-
-#define CONFIG_IMX_IIM
-#define CONFIG_IIM_MAC_BANK 1
-#define CONFIG_IIM_MAC_ROW 9
-
-/*
- * I2C
- */
-#ifdef CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_I2C_MXC 1
-#define CONFIG_SYS_I2C_PORT I2C2_BASE_ADDR
-#define CONFIG_SYS_I2C_MX51_PORT2
-#define CONFIG_SYS_I2C_SPEED 400000
-#define CONFIG_SYS_I2C_SLAVE 0xfe
-#endif /* CONFIG_CMD_I2C */
-
-/*
- * SPI
- */
-
-/*
- * SD/MMC
- */
-#ifdef CONFIG_CMD_MMC
-#define CONFIG_FSL_ESDHC
-#define CONFIG_SYS_FSL_ESDHC_ADDR 0
-#define CONFIG_SYS_FSL_ESDHC_NUM 1
-
-#define CONFIG_MMC
-#define CONFIG_CMD_MMC
-#define CONFIG_GENERIC_MMC
-#endif
-
-/*
- * RTC
- */
-
-/*
- * Watchdog Config
- */
-#define CONFIG_HW_WATCHDOG
-
-/*
- * USB
- */
-
-/*
- * Clocks
- */
-#define CONFIG_SYS_HZ 1000 /* Ticks per second */
-#define CONFIG_SYS_MX5_CLK32 32768
-#define CONFIG_SYS_MX5_HCLK 1024*CONFIG_SYS_MX5_CLK32
-#define CONFIG_MX51_PLL_ERRATA
-
-/* external bus frequencies */
-#define APF_DDR_CLK 200 /* MHZ DDR frequency from PLL1 */
-#define APF_ARM_CLK 800 /* MHZ CPU frequency from PLL1 */
-#define APF_AXIA_CLK 166 /* MHZ AXI A frequency from PLL2 */
-#define APF_AXIB_CLK 110 /* 110.8 133 MHZ AXI B frequency from PLL2 */
-#define APF_EMI_CLK 95 /* MHZ AHB frequency from PLL2 */
-#define APF_AHB_CLK 133 /* MHZ AHB frequency from PLL2 */
-#define APF_IPG_CLK 66 /* 66.5 MHZ IPG frequency from PLL2 */
-#define APF_PERCLK 55 /* 55.4 MHZ PERCLK frequency */
-#define APF_NFC_CLK 23 /* MHZ NFC Clock from EMI clk */
-#define APF_USB_CLK 54 /* external USB serial bus frequency PLL3 */
-#define APF_ESDHC_CLK 54 /* MHz ESDHC controller frequency / PLL3 */
-#define APF_UART_CLK 66 /* 66.5 MHz UART frequency from PLL2 */
-
-/*#define APF_SSI_CLK 54*/ /* MHz SSI controller frequency */
-/*#define APF_TVE_CLK 216*/ /* MHz TVE controller frequency */
-/*#define APF_DI_CLK 0*/ /* MHz DISPLAY controller frequency*/
-/*#define APF_VPU_CLK 0*/ /* MHz VPU controller frequency*/
-/*#define APF_SPDIF_CLK 10*/ /* MHz SPDIF controller frequency 10.3 MHz*/
-/*#define APF_SIM_CLK 54*/ /* MHz SIM controller frequency */
-/*#define APF_FIRI_CLK 54*/ /* MHz FIRI controller frequency */
-/*#define APF_HSI2C_CLK 54*/ /* MHz HS I2C controller frequency */
-/*#define APF_CSI_CLK 54*/ /* MHz HS CSI controller frequency */
-/*#define APF_ECSPI_CLK 54*/ /* MHz HECSPI controller frequency */
-/*#define APF_WRCK_CLK 13*/ /* MHz WRCK 13.3 MHz */
-/*#define APF_LPSR_CLK 0*/ /* MHz */
-#define APF_PGC_CLK 66 /* MHz 66.5 MHz */
-
-/* PLL parameters assuming 32.768kHz *1024 input clock with doubler ON */
-/* MFI PDF */
-#define DP_OP_864 ((11 << 4) + ((2 - 1) << 0))
-#define DP_MFD_864 (65536 - 1)
-#define DP_MFN_864 122854
-#define DP_MFN_800_DIT 60354
-
-#define DP_OP_850 ((6 << 4) + ((1 - 1) << 0))
-#define DP_MFD_850 (1048576 - 1)
-#define DP_MFN_850 349169
-
-#define ACFG_PLL1_CLK 800 /* MHz */
-#define DP_OP_800 ((11 << 4) + ((2 - 1) << 0))
-#define DP_MFD_800 (65536 - 1)
-#define DP_MFN_800 60354
-
-#define ACFG_PLL2_CLK 665 /* MHz */
-#define DP_OP_665 ((14 << 4) + ((3 - 1) << 0))
-#define DP_MFD_665 (2097152 - 1)
-#define DP_MFN_665 1811747
-
-#define ACFG_PLL3_CLK 216 /* MHz */
-#define DP_OP_216 ((8 << 4) + ((5 - 1) << 0))
-#define DP_MFD_216 (262144 - 1)
-#define DP_MFN_216 12223
-
-#define CONFIG_SYS_DDR_CLKSEL 0
-
-/*
- * SDRAM
- */
-/*
- * ACFG_SDRAM_NUM_COL 8, 9, 10 or 11 column address bits
- * ACFG_SDRAM_NUM_ROW 11, 12 or 13 row address bits
- * ACFG_SDRAM_REFRESH 0=OFF 1=2048 2=4096 3=8192.. refresh
- * ACFG_SDRAM_XSR_DELAY ns Exit self refresh to any command (>= 25 ddr_clk)
- * ACFG_SDRAM_EXIT_PWD ns exit power down delay
- * ACFG_SDRAM_W2R_DELAY WRITE to READ Command Delay 0=1ck 1=2ck
- * ACFG_SDRAM_ROW_PRECHARGE_DELAY ns (>2 x ddr_clk)
- * ACFG_SDRAM_TMRD_DELAY Load mode register cycle delay 1..4
- * ACFG_SDRAM_TWR_DELAY DDR: 0=2ck 1=3ck
- * ACFG_SDRAM_RAS_DELAY ns ACTIVE-to-PRECHARGE delay
- * ACFG_SDRAM_RRD_DELAY ns ACTIVE-to-ACTIVE delay
- * ACFG_SDRAM_RCD_DELAY ns Row to Column delay
- * ACFG_SDRAM_RC_DELAY ns Row cycle delay (tRFC refresh to command)
- * ACFG_SDRAM_RFC_DELAY ns (> 10xddr_clk) auto refresh to any command
- * ACFG_SDRAM_PARTIAL_ARRAY_SR 0=full 1=half 2=quater 3=Eighth 4=Sixteenth
- * ACFG_SDRAM_DRIVE_STRENGH 0=Full-strength 1=half 2=quater 3=Eighth
- * ACFG_SDRAM_BURST_LENGTH 2^N BYTES (N=0..3)
- * ACFG_SDRAM_SINGLE_ACCESS 1= single access; 0 = Burst mode
- *
- */
-/* micron 256MB */
-#define ACFG_SDRAM_NUM_COL 10 /* 8..11 column address bits */
-#define ACFG_SDRAM_NUM_ROW 14 /* 11..13 row address bits */
-#define ACFG_SDRAM_REFRESH 3 /* 0=OFF 1=2048 2=4096 3=8192.*/
-#define ACFG_SDRAM_XSR_DELAY 125 /* ns Exit self refresh */
-#define ACFG_SDRAM_EXIT_PWD 10 /* ns exit power down delay */
-#define ACFG_SDRAM_W2R_DELAY 1 /* 0=1ck 1=2ck */
-#define ACFG_SDRAM_ROW_PRECHARGE_DELAY 15 /* ns (>2 x ddr_clk) */
-#define ACFG_SDRAM_TMRD_DELAY 2 /* 1..4 */
-#define ACFG_SDRAM_TWR_DELAY 1 /* DDR: 0=2ck 1=3ck */
-#define ACFG_SDRAM_RAS_DELAY 40 /* ns ACTIVE-to-PRECHARGE */
-#define ACFG_SDRAM_RRD_DELAY 10 /* ns ACTIVE-to-ACTIVE delay */
-#define ACFG_SDRAM_RCD_DELAY 15 /* ns Row to Column delay */
-#define ACFG_SDRAM_RC_DELAY 55 /* ns Row cycle delay */
-#define ACFG_SDRAM_RFC_DELAY 72 /* ns (> 10xddr_clk) */
-#define ACFG_SDRAM_PARTIAL_ARRAY_SR 0 /* 0..4 */
-#define ACFG_SDRAM_DRIVE_STRENGH 0 /* 0..3 */
-#define ACFG_SDRAM_BURST_LENGTH 3 /* 2^N BYTES (N=0..3) */
-#define ACFG_SDRAM_SINGLE_ACCESS 0 /* 0..1 */
-
-/*
- * External interface
- */
- /* force BCLK free run */
-#define ACFG_WCR_VALUE 0x00000021
-#define ACFG_WIAR_VALUE 0x00000010
-
-/* CS1 */
-#define ACFG_CS1GCR1_VALUE ACFG_FPGA_GCR1_VALUE
-#define ACFG_CS1GCR2_VALUE ACFG_FPGA_GCR2_VALUE
-
-#define ACFG_CS1RCR1_VALUE ACFG_FPGA_RCR1_VALUE
-#define ACFG_CS1RCR2_VALUE ACFG_FPGA_RCR2_VALUE
-
-#define ACFG_CS1WCR1_VALUE ACFG_FPGA_WCR1_VALUE
-#define ACFG_CS1WCR2_VALUE ACFG_FPGA_WCR2_VALUE
-
-/* CS2 */
-#define ACFG_CS2GCR1_VALUE 0x00010080
-#define ACFG_CS2GCR2_VALUE 0x00000000
-
-#define ACFG_CS2RCR1_VALUE 0x00000000
-#define ACFG_CS2RCR2_VALUE 0x00000000
-
-#define ACFG_CS2WCR1_VALUE 0x00000000
-#define ACFG_CS2WCR2_VALUE 0x00000000
-
-/* CS3 */
-#define ACFG_CS3GCR1_VALUE 0x00010080
-#define ACFG_CS3GCR2_VALUE 0x00000000
-
-#define ACFG_CS3RCR1_VALUE 0x00000000
-#define ACFG_CS3RCR2_VALUE 0x00000000
-
-#define ACFG_CS3WCR1_VALUE 0x00000000
-#define ACFG_CS3WCR2_VALUE 0x00000000
-
-/* CS4 */
-#define ACFG_CS4GCR1_VALUE 0x00010080
-#define ACFG_CS4GCR2_VALUE 0x00000000
-
-#define ACFG_CS4RCR1_VALUE 0x00000000
-#define ACFG_CS4RCR2_VALUE 0x00000000
-
-#define ACFG_CS4WCR1_VALUE 0x00000000
-#define ACFG_CS4WCR2_VALUE 0x00000000
-
-/* CS5 */
-#define ACFG_CS5GCR1_VALUE 0x00010080
-#define ACFG_CS5GCR2_VALUE 0x00000000
-
-#define ACFG_CS5RCR1_VALUE 0x00000000
-#define ACFG_CS5RCR2_VALUE 0x00000000
-
-#define ACFG_CS5WCR1_VALUE 0x00000000
-#define ACFG_CS5WCR2_VALUE 0x00000000
-
-/*
- * From here, there should not be any user configuration.
- * All Equations are automatic
- */
-#include <asm/arch/imx-regs.h>
-
-/* Issue Mode register Command to SDRAM*/
-#define ACFG_DRR_MR_VAL (0x0\
- | (((ACFG_SDRAM_BURST_LENGTH)&0x7)<<(0))\
- | ((3)<<(4)) \
- | (((ACFG_SDRAM_SINGLE_ACCESS)&0x1)<<(3)))
-
-/* Issue Extended Mode register Command to SDRAM*/
-#define ACFG_DRR_EMR_VAL\
- (((ACFG_SDRAM_PARTIAL_ARRAY_SR&0x7)<<0)\
- | ((ACFG_SDRAM_DRIVE_STRENGH&0x7)<<(5)))
-
-#define ACFG_SDRAM_ESDGPR_REGISTER_VAL 0x20020000
-#define ACFG_SDRAM_ESDCDLY1_REGISTER_VAL 0x00F48000
-#define ACFG_SDRAM_ESDCDLY2_REGISTER_VAL 0x00F48000
-#define ACFG_SDRAM_ESDCDLY3_REGISTER_VAL 0x00F48000
-#define ACFG_SDRAM_ESDCDLY4_REGISTER_VAL 0x00F48000
-#define ACFG_SDRAM_ESDCDLY5_REGISTER_VAL 0x00F48000
-
-/* SDRAM IO Muxing */
-#define ACFG_IOMUX_PAD_DRAM_RAS PAD_CTL_DRV_HIGH+PAD_CTL_SRE_FAST /* default */
-#define ACFG_IOMUX_PAD_DRAM_CAS PAD_CTL_DRV_HIGH+PAD_CTL_SRE_FAST /* default */
-#define ACFG_IOMUX_PAD_DRAM_SDWE \
- PAD_CTL_PKE_ENABLE+PAD_CTL_PUE_PULL+PAD_CTL_100K_PU \
- +PAD_CTL_DRV_HIGH+PAD_CTL_SRE_FAST /* imx default */
-#define ACFG_IOMUX_PAD_DRAM_SDCKE0 \
- PAD_CTL_PKE_ENABLE+PAD_CTL_PUE_PULL+PAD_CTL_100K_PU \
- +PAD_CTL_DRV_HIGH+PAD_CTL_SRE_FAST /* imx default */
-#define ACFG_IOMUX_PAD_DRAM_SDCKE1 \
- PAD_CTL_PKE_ENABLE+PAD_CTL_PUE_PULL+PAD_CTL_100K_PU \
- +PAD_CTL_DRV_HIGH+PAD_CTL_SRE_FAST /* imx default */
-#define ACFG_IOMUX_PAD_DRAM_SDCLK \
- PAD_CTL_PKE_ENABLE+PAD_CTL_PUE_PULL+PAD_CTL_100K_PU \
- +PAD_CTL_DRV_MAX+PAD_CTL_SRE_FAST
-#define ACFG_IOMUX_PAD_DRAM_SDQS0 \
- PAD_CTL_PKE_ENABLE+PAD_CTL_PUE_PULL+PAD_CTL_100K_PD \
- +PAD_CTL_DRV_HIGH+PAD_CTL_SRE_SLOW
-#define ACFG_IOMUX_PAD_DRAM_SDQS1 \
- PAD_CTL_PKE_ENABLE+PAD_CTL_PUE_PULL+PAD_CTL_100K_PD \
- +PAD_CTL_DRV_HIGH+PAD_CTL_SRE_SLOW
-#define ACFG_IOMUX_PAD_DRAM_SDQS2 \
- PAD_CTL_PKE_ENABLE+PAD_CTL_PUE_PULL+PAD_CTL_100K_PD \
- +PAD_CTL_DRV_HIGH+PAD_CTL_SRE_SLOW
-#define ACFG_IOMUX_PAD_DRAM_SDQS3 \
- PAD_CTL_PKE_ENABLE+PAD_CTL_PUE_PULL+PAD_CTL_100K_PD \
- +PAD_CTL_DRV_HIGH+PAD_CTL_SRE_SLOW
-#define ACFG_IOMUX_PAD_DRAM_CS0 \
- PAD_CTL_PKE_ENABLE+PAD_CTL_PUE_PULL+PAD_CTL_100K_PU \
- +PAD_CTL_DRV_HIGH+PAD_CTL_SRE_FAST /* imx default */
-#define ACFG_IOMUX_PAD_DRAM_CS1 \
- PAD_CTL_PKE_ENABLE+PAD_CTL_PUE_PULL+PAD_CTL_100K_PU \
- +PAD_CTL_DRV_HIGH /* imx default */
-#define ACFG_IOMUX_PAD_DRAM_DQM0 \
- PAD_CTL_PKE_ENABLE+PAD_CTL_PUE_PULL+PAD_CTL_100K_PU \
- +PAD_CTL_DRV_HIGH+PAD_CTL_SRE_SLOW
-#define ACFG_IOMUX_PAD_DRAM_DQM1 \
- PAD_CTL_PKE_ENABLE+PAD_CTL_PUE_PULL+PAD_CTL_100K_PU \
- +PAD_CTL_DRV_HIGH+PAD_CTL_SRE_SLOW
-#define ACFG_IOMUX_PAD_DRAM_DQM2 \
- PAD_CTL_PKE_ENABLE+PAD_CTL_PUE_PULL+PAD_CTL_100K_PU \
- +PAD_CTL_DRV_HIGH+PAD_CTL_SRE_SLOW
-#define ACFG_IOMUX_PAD_DRAM_DQM3 \
- PAD_CTL_PKE_ENABLE+PAD_CTL_PUE_PULL+PAD_CTL_100K_PU \
- +PAD_CTL_DRV_HIGH+PAD_CTL_SRE_SLOW
-
-#define ACFG_IOMUX_PAD_EIM_SDBA2 \
- PAD_CTL_DRV_VOT_LOW+PAD_CTL_PKE_ENABLE+PAD_CTL_PUE_PULL \
- +PAD_CTL_100K_PU
-#define ACFG_IOMUX_PAD_EIM_SDODT1 \
- PAD_CTL_DRV_VOT_LOW+PAD_CTL_PKE_ENABLE+PAD_CTL_PUE_PULL \
- +PAD_CTL_100K_PD+PAD_CTL_DRV_LOW+PAD_CTL_SRE_FAST
-#define ACFG_IOMUX_PAD_EIM_SDODT0 \
- PAD_CTL_DRV_VOT_LOW+PAD_CTL_PKE_ENABLE+PAD_CTL_PUE_PULL \
- +PAD_CTL_100K_PD+PAD_CTL_DRV_LOW+PAD_CTL_SRE_FAST
-
-#define ACFG_IOMUX_GRP_DDRPKS PAD_CTL_PUE_PULL /* imx default */
-#define ACFG_IOMUX_GRP_DRAM_B4 PAD_CTL_DRV_HIGH /* imx default */
-#define ACFG_IOMUX_GRP_INDDR PAD_CTL_DDR_INPUT_CMOS /* imx default */
-#define ACFG_IOMUX_GRP_PKEDDR PAD_CTL_PKE_ENABLE /* imx default */
-#define ACFG_IOMUX_GRP_DDR_A0 PAD_CTL_DRV_HIGH /* imx default */
-#define ACFG_IOMUX_GRP_DDR_A1 PAD_CTL_DRV_MEDIUM /* imx default */
-#define ACFG_IOMUX_GRP_DDRAPUS PAD_CTL_100K_PU /* imx default */
-#define ACFG_IOMUX_GRP_HYSDDR0 PAD_CTL_HYS_NONE /* imx default */
-#define ACFG_IOMUX_GRP_HYSDDR1 PAD_CTL_HYS_NONE /* imx default */
-#define ACFG_IOMUX_GRP_HYSDDR2 PAD_CTL_HYS_NONE /* imx default */
-#define ACFG_IOMUX_GRP_HVDDR PAD_CTL_DRV_VOT_LOW
-#define ACFG_IOMUX_GRP_HYSDDR3 PAD_CTL_HYS_NONE /* imx default */
-#define ACFG_IOMUX_GRP_DDR_SR_B0 PAD_CTL_SRE_SLOW
-#define ACFG_IOMUX_GRP_DDRAPKS PAD_CTL_PUE_PULL /* imx default */
-
-#define ACFG_IOMUX_GRP_DDR_SR_B1 PAD_CTL_SRE_SLOW
-#define ACFG_IOMUX_GRP_DDRPUS PAD_CTL_100K_PU /* imx default */
-#define ACFG_IOMUX_GRP_DDR_SR_B2 PAD_CTL_SRE_SLOW
-#define ACFG_IOMUX_GRP_PKEADDR PAD_CTL_PKE_ENABLE /* imx default */
-#define ACFG_IOMUX_GRP_DDR_SR_B4 PAD_CTL_SRE_SLOW
-
-#define ACFG_IOMUX_GRP_INMODE1 PAD_CTL_DDR_INPUT_CMOS /* imx default */
-#define ACFG_IOMUX_GRP_DRAM_B0 PAD_CTL_DRV_HIGH /* imx default */
-#define ACFG_IOMUX_GRP_DRAM_B1 PAD_CTL_DRV_HIGH /* imx default */
-
-#define ACFG_IOMUX_GRP_DDR_SR_A0 PAD_CTL_SRE_FAST/* imx default */
-
-#define ACFG_IOMUX_GRP_DRAM_B2 PAD_CTL_DRV_HIGH /* imx default */
-
-#define ACFG_IOMUX_GRP_DDR_SR_A1 PAD_CTL_SRE_FAST/* imx default */
-/* end of SDRAM IO Muxing */
-
-/* CCM Configuration */
-
-#define CONFIG_SYS_PLL_DP_CTL 0x00001332 /* use fpm_clk */
-#define CONFIG_SYS_CLKCTL_CCMR 0x00001FFF
-#define CONFIG_SYS_CLKCTL_CSR 0x0000003E
-#define CONFIG_SYS_CLKCTL_CCSR 0x00000200
-
-#define CCBDR_MASK 0x40000000
-
-#define CONFIG_SYS_CLKTL_CBCDR\
- (CCBDR_MASK \
- |((((ACFG_PLL1_CLK/APF_DDR_CLK)-1)&0x07)<<27) \
- |((((ACFG_PLL2_CLK/APF_EMI_CLK)-1)&0x07)<<22) \
- |((((ACFG_PLL2_CLK/APF_AXIB_CLK)-1)&0x07)<<19) \
- |((((ACFG_PLL2_CLK/APF_AXIA_CLK)-1)&0x07)<<16) \
- |((((APF_EMI_CLK/APF_NFC_CLK)-1)&0x07)<<13) \
- |((((ACFG_PLL2_CLK/APF_AHB_CLK)-1)&0x07)<<10) \
- |((((APF_AHB_CLK/APF_IPG_CLK)-1)&0x03)<<8) \
- |(((((ACFG_PLL2_CLK/APF_PERCLK)/8))&0x03)<<6) \
- |(((((ACFG_PLL2_CLK/APF_PERCLK) \
- /((ACFG_PLL2_CLK/APF_PERCLK)/8+1))-1)&0x07)<<0)\
- )
-
-#define CONFIG_SYS_CLKTL_CBCMR 0x000020C0
-
-#define CONFIG_SYS_CLKTL_CBCMR1 0xA5A2A020
-
-#define CONFIG_SYS_CLKTL_CSCDR1\
- (0x0 \
- |((((ACFG_PLL3_CLK/APF_ESDHC_CLK)/8)&0x07)<<19) \
- |(((((ACFG_PLL3_CLK/APF_ESDHC_CLK) \
- /((ACFG_PLL3_CLK/APF_ESDHC_CLK)/8+1))-1)&0x07)<<22) \
- |((((ACFG_PLL3_CLK/APF_ESDHC_CLK)/8)&0x07)<<11) \
- |((((APF_IPG_CLK/APF_PGC_CLK)-1)&0x07)<<14) \
- |(((((ACFG_PLL3_CLK/APF_ESDHC_CLK) \
- /((ACFG_PLL3_CLK/APF_ESDHC_CLK)/8+1))-1)&0x07)<<16) \
- |((((ACFG_PLL3_CLK/APF_USB_CLK)/4)&0x07)<<6) \
- |(((((ACFG_PLL3_CLK/APF_USB_CLK) \
- /((ACFG_PLL3_CLK/APF_USB_CLK)/4+1))-1)&0x03)<<8) \
- |((((ACFG_PLL2_CLK/APF_UART_CLK)/8)&0x07)<<0) \
- |(((((ACFG_PLL2_CLK/APF_UART_CLK) \
- /((ACFG_PLL2_CLK/APF_UART_CLK)/8+1))-1)&0x07)<<3) \
- )
-
-/* clock cycle time with x2 for a 0.5ns accuracy */
-#define CONFIG_SYS_2XDDRCLK_LGTH (2000/APF_DDR_CLK) /* ns */
-
-#define ACFG_SDRAM_ESDMISC_REGISTER_VAL 0x000a5680
-
-#if ((2*ACFG_SDRAM_RC_DELAY) > (16*CONFIG_SYS_2XDDRCLK_LGTH))
-#define REG_FIELD_RC_VAL 0
-#else
-#define REG_FIELD_RC_VAL \
- (((2*ACFG_SDRAM_RC_DELAY+CONFIG_SYS_2XDDRCLK_LGTH-1) \
- /CONFIG_SYS_2XDDRCLK_LGTH)-1)
-#endif
-
-#if ((2*ACFG_SDRAM_RFC_DELAY) > (25*CONFIG_SYS_2XDDRCLK_LGTH))
-#define REG_FIELD_RFC_VAL \
- (((2*ACFG_SDRAM_RFC_DELAY+CONFIG_SYS_2XDDRCLK_LGTH-1) \
- /CONFIG_SYS_2XDDRCLK_LGTH/2)-10)
-#define REG_FIELD_ESDCTL_PAT 0x80820000
-#else
-#define REG_FIELD_RFC_VAL \
- (((2*ACFG_SDRAM_RFC_DELAY+CONFIG_SYS_2XDDRCLK_LGTH-1) \
- /CONFIG_SYS_2XDDRCLK_LGTH)-10)
-#define REG_FIELD_ESDCTL_PAT 0x80020000
-#endif
-
-/* ESDCTLx Configuration Registers: 32bits */
-#define ACFG_SDRAM_ESDCTL_REGISTER_VAL (REG_FIELD_ESDCTL_PAT\
- | (((ACFG_SDRAM_REFRESH)&0x0F)<<28)\
- | (((ACFG_SDRAM_NUM_ROW-11)&0x7)<<24)\
- | (((ACFG_SDRAM_NUM_COL-8)&0x3)<<20))
-
-#define ACFG_SDRAM_ESDCFG_REGISTER_VAL (0x00000000\
- | ((REG_FIELD_RFC_VAL&0x0F)<<28)\
- | (((((2*ACFG_SDRAM_XSR_DELAY+CONFIG_SYS_2XDDRCLK_LGTH-1)\
- /CONFIG_SYS_2XDDRCLK_LGTH)-25)&0x0F)<<24)\
- | (((((2*ACFG_SDRAM_EXIT_PWD+CONFIG_SYS_2XDDRCLK_LGTH-1)\
- /CONFIG_SYS_2XDDRCLK_LGTH)-1)&0x7)<<20)\
- | ((ACFG_SDRAM_W2R_DELAY)<<20)\
- | (((((2*ACFG_SDRAM_ROW_PRECHARGE_DELAY+CONFIG_SYS_2XDDRCLK_LGTH-1)\
- /CONFIG_SYS_2XDDRCLK_LGTH)-2)&0x3)<<18)\
- | (((ACFG_SDRAM_TMRD_DELAY-1)&0x3)<<16)\
- | (((((2*ACFG_SDRAM_RAS_DELAY+CONFIG_SYS_2XDDRCLK_LGTH-1)\
- /CONFIG_SYS_2XDDRCLK_LGTH)-1)&0x0F)<<12)\
- | (((((2*ACFG_SDRAM_RRD_DELAY+CONFIG_SYS_2XDDRCLK_LGTH-1)\
- /CONFIG_SYS_2XDDRCLK_LGTH)-1)&0x3)<<10)\
- | (((ACFG_SDRAM_TWR_DELAY)&0x1)<<7)\
- | (((((2*ACFG_SDRAM_RCD_DELAY+CONFIG_SYS_2XDDRCLK_LGTH-1)\
- /CONFIG_SYS_2XDDRCLK_LGTH)-1)&0x7)<<4)\
- | (((REG_FIELD_RC_VAL)&0x0F)<<0))
-
-#endif /* __CONFIG_H */
diff --git a/patches/u-boot/2013.01.01/100-SPL-Add-u-boot-nand-build-option.patch b/patches/u-boot/2013.01.01/100-SPL-Add-u-boot-nand-build-option.patch
deleted file mode 100644
index f6c3cc8..0000000
--- a/patches/u-boot/2013.01.01/100-SPL-Add-u-boot-nand-build-option.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-SPL: Add u-boot-nand build option
-
-Signed-off-by: Eric Jarrige <eri...@ar...>
-
----
- Makefile | 5 +++++
- 1 files changed, 5 insertions(+), 0 deletions(-)
-
-diff --git a/Makefile b/Makefile
-index 08eecbb..00c9422 100644
---- a/Makefile
-+++ b/Makefile
-@@ -601,8 +601,14 @@ $(obj)u-boot.lds: $(LDSCRIPT)
- nand_spl: $(TIMESTAMP_FILE) $(VERSION_FILE) depend
- $(MAKE) -C nand_spl/board/$(BOARDDIR) all
-
-+ifeq ($(CONFIG_SPL),y)
-+$(obj)u-boot-nand.bin: $(obj)u-boot.bin $(obj)spl/u-boot-spl.bin
-+ $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SPL_PAD_TO) -O binary $(obj)spl/u-boot-spl $(obj)spl/u-boot-spl-pad.bin && \
-+ cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
-+else
- $(obj)u-boot-nand.bin: nand_spl $(obj)u-boot.bin
- cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
-+endif
-
- $(obj)spl/u-boot-spl.bin: $(SUBDIR_TOOLS) depend
- $(MAKE) -C spl all
---
-1.7.4.4
-
diff --git a/patches/u-boot/2013.01.01/102-mx1-i2c.patch b/patches/u-boot/2013.01.01/102-mx1-i2c.patch
deleted file mode 100644
index ff78658..0000000
--- a/patches/u-boot/2013.01.01/102-mx1-i2c.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-mx1: add i2c registers
-
-Add i2c registers for Freescale imx1/L/S
-
-Signed-off-by: Eric Jarrige <eri...@ar...>
-Signed-off-by: Philippe Reynes <tr...@ya...>
-Cc: Stefano Babic <sb...@de...>
----
- arch/arm/include/asm/arch-imx/imx-regs.h | 23 +++++++++++++++++++++++
- 1 files changed, 23 insertions(+), 0 deletions(-)
-
-diff --git a/arch/arm/include/asm/arch-imx/imx-regs.h b/arch/arm/include/asm/arch-imx/imx-regs.h
-index 4de0779..1fd3e17 100644
---- a/arch/arm/include/asm/arch-imx/imx-regs.h
-+++ b/arch/arm/include/asm/arch-imx/imx-regs.h
-@@ -634,4 +634,27 @@
- #define TSTAT_CAPT (1<<1) /* Capture event */
- #define TSTAT_COMP (1) /* Compare event */
-
-+/*
-+ * I2C module
-+ */
-+#define IADR __REG(IMX_I2C_BASE + 0x000) /* I2C Address Register */
-+#define IFDR __REG(IMX_I2C_BASE + 0x004) /* I2C Frequency Divider Register*/
-+#define I2CR __REG(IMX_I2C_BASE + 0x008) /* I2C Control Register */
-+#define I2SR __REG(IMX_I2C_BASE + 0x00C) /* I2C Status Register */
-+#define I2DR __REG(IMX_I2C_BASE + 0x010) /* I2C Data I/O Register */
-+/* I2C Control Register Bit Fields */
-+#define I2CR_IEN (1<<7) /* I2C Enable */
-+#define I2CR_IIEN (1<<6) /* I2C Interrupt Enable */
-+#define I2CR_MSTA (1<<5) /* I2C Master/Slave Mode Select */
-+#define I2CR_MTX (1<<4) /* I2C Transmit/Receive Mode Select */
-+#define I2CR_TXAK (1<<3) /* I2C Transmit Acknowledge Enable */
-+#define I2CR_RSTA (1<<2) /* I2C Repeated START */
-+#define I2SR_ICF (1<<7) /* I2C Data Transfer */
-+#define I2SR_IAAS (1<<6) /* I2C Addressed As a Slave */
-+#define I2SR_IBB (1<<5) /* I2C Bus Busy */
-+#define I2SR_IAL (1<<4) /* I2C Arbitration Lost */
-+#define I2SR_SRW (1<<2) /* I2C Slave Read/Write */
-+#define I2SR_IIF (1<<1) /* I2C interrupt */
-+#define I2SR_RXAK (1<<0) /* I2C Received Acknowledge */
-+
- #endif /* _IMX_REGS_H */
---
-1.7.2.5
-
diff --git a/patches/u-boot/2013.01.01/103-apf9328.patch b/patches/u-boot/2013.01.01/103-apf9328.patch
deleted file mode 100644
index 36f302a..0000000
--- a/patches/u-boot/2013.01.01/103-apf9328.patch
+++ /dev/null
@@ -1,1345 +0,0 @@
-apf9328: Add Armadeus Project board APF9328
-
-Add Armadeus Project board APF9328
-
-Signed-off-by: Eric Jarrige <eri...@ar...>
-Signed-off-by: Nicolas Colombain <nic...@ar...>
-Signed-off-by: Philippe Reynes <tr...@ya...>
-Cc: Nicolas Colombain <nic...@ar...>
----
- board/armadeus/apf9328/Makefile | 51 ++++
- board/armadeus/apf9328/apf9328.c | 106 +++++++
- board/armadeus/apf9328/apf9328fpga.c | 100 +++++++
- board/armadeus/apf9328/apf9328fpga.h | 31 ++
- board/armadeus/apf9328/eeprom.c | 88 ++++++
- board/armadeus/apf9328/fpga.c | 121 ++++++++
- board/armadeus/apf9328/fpga.h | 30 ++
- board/armadeus/apf9328/i2c.c | 276 +++++++++++++++++++
- board/armadeus/apf9328/lowlevel_init.S | 469 ++++++++++++++++++++++++++++++++
- 9 files changed, 1272 insertions(+), 0 deletions(-)
- create mode 100644 board/armadeus/apf9328/Makefile
- create mode 100644 board/armadeus/apf9328/apf9328.c
- create mode 100644 board/armadeus/apf9328/apf9328fpga.c
- create mode 100644 board/armadeus/apf9328/apf9328fpga.h
- create mode 100644 board/armadeus/apf9328/eeprom.c
- create mode 100644 board/armadeus/apf9328/fpga.c
- create mode 100644 board/armadeus/apf9328/fpga.h
- create mode 100644 board/armadeus/apf9328/i2c.c
- create mode 100644 board/armadeus/apf9328/lowlevel_init.S
-
-diff --git a/board/armadeus/apf9328/Makefile b/board/armadeus/apf9328/Makefile
-new file mode 100644
-index 0000000..0f097cd
---- /dev/null
-+++ b/board/armadeus/apf9328/Makefile
-@@ -0,0 +1,51 @@
-+#
-+# (C) Copyright 2000-2004
-+# Wolfgang Denk, DENX Software Engineering, wd...@de....
-+#
-+# See file CREDITS for list of people who contributed to this
-+# project.
-+#
-+# This program is free software; you can redistribute it and/or
-+# modify it under the terms of the GNU General Public License as
-+# published by the Free Software Foundation; either version 2 of
-+# the License, or (at your option) any later version.
-+#
-+# This program is distributed in the hope that it will be useful,
-+# but WITHOUT ANY WARRANTY; without even the implied warranty of
-+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+# GNU General Public License for more details.
-+#
-+# You should have received a copy of the GNU General Public License
-+# along with this program; if not, write to the Free Software
-+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+# MA 02111-1307 USA
-+#
-+
-+include $(TOPDIR)/config.mk
-+
-+LIB = $(obj)lib$(BOARD).o
-+
-+COBJS := apf9328.o i2c.o apf9328fpga.o fpga.o eeprom.o
-+SOBJS := lowlevel_init.o
-+
-+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-+OBJS := $(addprefix $(obj),$(COBJS))
-+SOBJS := $(addprefix $(obj),$(SOBJS))
-+
-+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
-+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-+
-+clean:
-+ rm -f $(SOBJS) $(OBJS)
-+
-+distclean: clean
-+ rm -f $(LIB) core *.bak .depend
-+
-+#########################################################################
-+
-+# defines $(obj).depend target
-+include $(SRCTREE)/rules.mk
-+
-+sinclude $(obj).depend
-+
-+#########################################################################
-diff --git a/board/armadeus/apf9328/apf9328.c b/board/armadeus/apf9328/apf9328.c
-new file mode 100644
-index 0000000..280f749
---- /dev/null
-+++ b/board/armadeus/apf9328/apf9328.c
-@@ -0,0 +1,93 @@
-+/*
-+ * (C) Copyright 2005-2011
-+ * Nicolas Colombain <nic...@ar...>
-+ * Eric Jarrige <eri...@ar...>
-+ * Copyright (C) 2004 Sascha Hauer, Synertronixx GmbH
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ *
-+ */
-+
-+#include <common.h>
-+#include <asm/arch/imx-regs.h>
-+#include <flash.h>
-+#include <netdev.h>
-+#include "apf9328fpga.h"
-+
-+DECLARE_GLOBAL_DATA_PTR;
-+
-+int board_init(void)
-+{
-+
-+ gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
-+
-+ return 0;
-+}
-+
-+int dram_init(void)
-+{
-+ /* dram_init must store complete ramsize in gd->ram_size */
-+ gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1,
-+ PHYS_SDRAM_1_SIZE);
-+ return 0;
-+}
-+
-+void enable_caches(void)
-+{
-+#ifndef CONFIG_SYS_DCACHE_OFF
-+ /* Enable D-cache. I-cache is already enabled in start.S */
-+ dcache_enable();
-+#endif
-+}
-+
-+/*
-+ * Miscellaneous intialization
-+ */
-+int misc_init_r(void)
-+{
-+ char *s;
-+
-+#ifdef CONFIG_FPGA
-+ apf9328_init_fpga();
-+#endif
-+
-+#ifdef CONFIG_DRIVER_DM9000
-+ imx_gpio_mode(GPIO_PORTB | GPIO_DR | GPIO_IN | 14);
-+#endif
-+
-+ /* detect compatibility issue of environment version */
-+ s = getenv("env_version");
-+ if ((NULL == s) || (0 != strcmp(s, CONFIG_ENV_VERSION))) {
-+ char * const vars[] = {"flash_reset_env"};
-+ printf("*** Warning - Environment version change suggests: "
-+ "run flash_reset_env; reset\n");
-+ set_default_vars(1, vars);
-+ }
-+
-+ return 0;
-+}
-+
-+void show_boot_progress(int status)
-+{
-+ return;
-+}
-+
-+#ifdef CONFIG_DRIVER_DM9000
-+int board_eth_init(bd_t *bis)
-+{
-+ return dm9000_initialize(bis);
-+}
-+#endif
-diff --git a/board/armadeus/apf9328/apf9328fpga.c b/board/armadeus/apf9328/apf9328fpga.c
-new file mode 100644
-index 0000000..9782115
---- /dev/null
-+++ b/board/armadeus/apf9328/apf9328fpga.c
-@@ -0,0 +1,100 @@
-+/*
-+ * (C) Copyright 2005-2011
-+ * Nicolas Colombain <nic...@ar...>
-+ * Eric Jarrige <eri...@ar...>
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ *
-+ */
-+
-+/*
-+ * Spartan 3 FPGA configuration support for the APF9328 daughter board
-+ */
-+
-+#include <common.h>
-+#include <spartan3.h>
-+#include <command.h>
-+#include <jffs2/jffs2.h>
-+#include <asm/arch/imx-regs.h>
-+#include <asm/io.h>
-+#include "apf9328fpga.h"
-+
-+#ifdef CONFIG_FPGA
-+DECLARE_GLOBAL_DATA_PTR;
-+/* Note that these are pointers to code that is in Flash. They will be
-+ * relocated at runtime.
-+ * Spartan3 code is used to download our Spartan 3 :) code is compatible.
-+ * Just take care about the file size
-+*/
-+Xilinx_Spartan3_Slave_Serial_fns fpga_fns = {
-+ fpga_pre_fn,
-+ fpga_pgm_fn,
-+ fpga_clk_fn,
-+ fpga_init_fn,
-+ fpga_done_fn,
-+ fpga_wr_fn,
-+};
-+
-+Xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
-+ {Xilinx_Spartan3,
-+ slave_serial,
-+ XILINX_XC3S400_SIZE,
-+ (void *)&fpga_fns,
-+ 0}
-+};
-+
-+/*
-+ * Initialize the fpga. Return 1 on success, 0 on failure.
-+ */
-+int apf9328_init_fpga(void)
-+{
-+ char *autoload = getenv("firmware_autoload");
-+ int i, lout = 1;
-+ u8 pnum;
-+ struct mtd_device *dev;
-+ struct part_info *part;
-+
-+ debug("%s:%d: Initialize FPGA interface (relocation offset= 0x%.8lx)\n",
-+ __func__, __LINE__, gd->reloc_off);
-+
-+ fpga_init();
-+
-+ for (i = 0; i < CONFIG_FPGA_COUNT; i++) {
-+ debug("%s:%d: Adding fpga %d\n", __func__, __LINE__, i);
-+ fpga_add(fpga_xilinx, &fpga[i]);
-+ }
-+
-+ if ((autoload) && (0 == strcmp(autoload, "1"))) {
-+ if ((mtdparts_init() == 0) &&
-+ (find_dev_and_part("firmware", &dev, &pnum, &part) == 0)) {
-+ if (ctrlc()) {
-+ printf("Firmware download stopped!\n");
-+ lout = 0;
-+ } else if (FPGA_SUCCESS != fpga_load(0,
-+ (void *)part->offset,
-+ (size_t)part->size)) {
-+ lout = 0;
-+ printf("Firmware not loaded!\n");
-+ }
-+ }
-+ }
-+ return lout;
-+}
-+
-+#endif /* CONFIG_FPGA */
-diff --git a/board/armadeus/apf9328/apf9328fpga.h b/board/armadeus/apf9328/apf9328fpga.h
-new file mode 100644
-index 0000000..2a15443
---- /dev/null
-+++ b/board/armadeus/apf9328/apf9328fpga.h
-@@ -0,0 +1,31 @@
-+/*
-+ * (C) Copyright 2002
-+ * Rich Irela...
[truncated message content] |
|
From: jorasse <jo...@us...> - 2013-07-24 23:14:12
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 785fce16777bd69bce890f8c3c0acae565fc63e6 (commit)
from fc37d1a11d8aa6460def3890169d08eeb2288e62 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 785fce16777bd69bce890f8c3c0acae565fc63e6
Author: Eric Jarrige <eri...@ar...>
Date: Thu Jul 25 01:24:50 2013 +0200
[BUILDROOT] apf51: bump to U-Boot 2013.04
-----------------------------------------------------------------------
Summary of changes:
buildroot/configs/apf51_defconfig | 9 +++++----
buildroot/configs/apf51test_defconfig | 9 +++++----
2 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/buildroot/configs/apf51_defconfig b/buildroot/configs/apf51_defconfig
index 5813be8..a3b9cb9 100644
--- a/buildroot/configs/apf51_defconfig
+++ b/buildroot/configs/apf51_defconfig
@@ -82,11 +82,12 @@ BR2_TARGET_ROOTFS_UBI=y
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BOARDNAME="$(BR2_BOARD_NAME)"
BR2_TARGET_UBOOT_CUSTOM_TARBALL=y
-BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2012.04.01.tar.bz2"
-BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2012.04"
+BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2013.04.tar.bz2"
+BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2013.04"
BR2_TARGET_UBOOT_USE_CUSTOM_CONFIG=y
-BR2_TARGET_UBOOT_CUSTOM_CONFIG_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2012.04.h"
-BR2_TARGET_UBOOT_FORMAT_NAND_BIN=y
+BR2_TARGET_UBOOT_CUSTOM_CONFIG_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2013.04.h"
+BR2_LINUX_UBOOT_USE_CUSTOM_FORMAT=y
+BR2_LINUX_UBOOT_CUSTOM_FORMAT_NAME="u-boot-with-nand-spl.imx"
BR2_TARGET_UBOOT_NETWORK=y
BR2_TARGET_UBOOT_SERVERIP="192.168.0.2"
BR2_TARGET_UBOOT_IPADDR="192.168.0.10"
diff --git a/buildroot/configs/apf51test_defconfig b/buildroot/configs/apf51test_defconfig
index fdf2e17..3ba31b0 100644
--- a/buildroot/configs/apf51test_defconfig
+++ b/buildroot/configs/apf51test_defconfig
@@ -148,11 +148,12 @@ BR2_TARGET_ROOTFS_UBI=y
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BOARDNAME="$(BR2_BOARD_NAME)"
BR2_TARGET_UBOOT_CUSTOM_TARBALL=y
-BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2012.04.01.tar.bz2"
-BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2012.04"
+BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2013.04.tar.bz2"
+BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2013.04"
BR2_TARGET_UBOOT_USE_CUSTOM_CONFIG=y
-BR2_TARGET_UBOOT_CUSTOM_CONFIG_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2012.04.h"
-BR2_TARGET_UBOOT_FORMAT_NAND_BIN=y
+BR2_TARGET_UBOOT_CUSTOM_CONFIG_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2013.04.h"
+BR2_LINUX_UBOOT_USE_CUSTOM_FORMAT=y
+BR2_LINUX_UBOOT_CUSTOM_FORMAT_NAME="u-boot-with-nand-spl.imx"
BR2_TARGET_UBOOT_NETWORK=y
BR2_TARGET_UBOOT_SERVERIP="192.168.0.2"
BR2_TARGET_UBOOT_IPADDR="192.168.0.10"
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2013-07-24 23:09:51
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via fc37d1a11d8aa6460def3890169d08eeb2288e62 (commit)
from 7529281983f70df10a9974aeb9f7e7f763efe930 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit fc37d1a11d8aa6460def3890169d08eeb2288e62
Author: Eric Jarrige <eri...@ar...>
Date: Thu Jul 25 01:20:09 2013 +0200
[UBOOT] 2013.04: apf51: fix last nand lock/unlock bug - update to patch revision 2.1
-----------------------------------------------------------------------
Summary of changes:
.../device/armadeus/apf51/apf51-u-boot-2013.04.h | 7 +-
patches/u-boot/2013.04/401-apf51.patch | 79 ++++++++++++--------
patches/u-boot/2013.04/420-apf51-nand-spl-NG.patch | 24 +++++-
3 files changed, 72 insertions(+), 38 deletions(-)
diff --git a/buildroot/target/device/armadeus/apf51/apf51-u-boot-2013.04.h b/buildroot/target/device/armadeus/apf51/apf51-u-boot-2013.04.h
index bd19e5c..0566a21 100644
--- a/buildroot/target/device/armadeus/apf51/apf51-u-boot-2013.04.h
+++ b/buildroot/target/device/armadeus/apf51/apf51-u-boot-2013.04.h
@@ -24,8 +24,8 @@
#define __CONFIG_H
#define CONFIG_VERSION_VARIABLE
-#define CONFIG_ENV_VERSION "1.4"
-#define CONFIG_IDENT_STRING " apf51 patch 2.0"
+#define CONFIG_ENV_VERSION "1.5"
+#define CONFIG_IDENT_STRING " apf51 patch 2.1"
#define CONFIG_BOARD_NAME apf51
/*
@@ -253,7 +253,8 @@
"${mtdparts} ${extrabootargs}; run addmmcargs addipargs;"\
"if test -n ${fdt_addr_r} ; then " \
"nand read ${fdt_addr_r} dtb; fi;" \
- "nboot ${kernel_addr_r} kernel;" \
+ "mmc dev 0; ext2load mmc 0 ${kernel_addr_r}" \
+ " /boot/${board_name}-linux.bin;" \
"bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
"firmware_autoload=0\0" \
"flash_uboot=nand unlock ${uboot_addr} ;" \
diff --git a/patches/u-boot/2013.04/401-apf51.patch b/patches/u-boot/2013.04/401-apf51.patch
index 53c66f8..3ef1ef7 100644
--- a/patches/u-boot/2013.04/401-apf51.patch
+++ b/patches/u-boot/2013.04/401-apf51.patch
@@ -67,7 +67,7 @@ new file mode 100644
index 0000000..8ff1381
--- /dev/null
+++ b/board/armadeus/apf51/apf51.c
-@@ -0,0 +1,1174 @@
+@@ -0,0 +1,1193 @@
+/*
+ * (C) Copyright 2010-2013 Eric Jarrige, Armadeus Project
+ *
@@ -92,6 +92,7 @@ index 0000000..8ff1381
+
+#include <common.h>
+#include <command.h>
++#include <environment.h>
+#include <asm/armv7.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/crm_regs.h>
@@ -832,7 +833,7 @@ index 0000000..8ff1381
+ {MMC_SDHC2_BASE_ADDR},
+};
+
-+#define SD1_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | \
++#define SD_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | \
+ PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU | \
+ PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | \
+ PAD_CTL_SRE_FAST)
@@ -846,32 +847,41 @@ index 0000000..8ff1381
+/*
+ mxc_request_iomux(MX51_PIN_GPIO1_0, IOMUX_CONFIG_ALT0 |
+ IOMUX_CONFIG_SION);
-+ mxc_iomux_set_pad(MX51_PIN_GPIO1_0, SD1_PAD_CFG);
++ mxc_iomux_set_pad(MX51_PIN_GPIO1_0, SD_PAD_CFG);
+*/
+ /* SD1_CMD */
-+ mxc_request_iomux(MX51_PIN_SD1_CMD, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION);
-+ mxc_iomux_set_pad(MX51_PIN_SD1_CMD, SD1_PAD_CFG);
++ mxc_request_iomux(MX51_PIN_SD1_CMD, IOMUX_CONFIG_ALT0 |
++ IOMUX_CONFIG_SION);
++ mxc_iomux_set_pad(MX51_PIN_SD1_CMD, SD_PAD_CFG);
+
+ /* SD1_CLK */
-+ mxc_request_iomux(MX51_PIN_SD1_CLK, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION);
-+ mxc_iomux_set_pad(MX51_PIN_SD1_CLK, PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | PAD_CTL_HYS_NONE | PAD_CTL_47K_PU | PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
++ mxc_request_iomux(MX51_PIN_SD1_CLK, IOMUX_CONFIG_ALT0 |
++ IOMUX_CONFIG_SION);
++ mxc_iomux_set_pad(MX51_PIN_SD1_CLK, PAD_CTL_DRV_MAX |
++ PAD_CTL_DRV_VOT_HIGH | PAD_CTL_HYS_NONE |
++ PAD_CTL_47K_PU | PAD_CTL_PUE_PULL |
++ PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
+
+ /* SD1_DATA0 */
-+ mxc_request_iomux(MX51_PIN_SD1_DATA0, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION);
-+ mxc_iomux_set_pad(MX51_PIN_SD1_DATA0, SD1_PAD_CFG);
++ mxc_request_iomux(MX51_PIN_SD1_DATA0, IOMUX_CONFIG_ALT0 |
++ IOMUX_CONFIG_SION);
++ mxc_iomux_set_pad(MX51_PIN_SD1_DATA0, SD_PAD_CFG);
+
+ /* SD1_DATA1 */
-+ mxc_request_iomux(MX51_PIN_SD1_DATA1, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION);
-+ mxc_iomux_set_pad(MX51_PIN_SD1_DATA1, SD1_PAD_CFG);
++ mxc_request_iomux(MX51_PIN_SD1_DATA1, IOMUX_CONFIG_ALT0 |
++ IOMUX_CONFIG_SION);
++ mxc_iomux_set_pad(MX51_PIN_SD1_DATA1, SD_PAD_CFG);
+
+ /* SD1_DATA2 */
-+ mxc_request_iomux(MX51_PIN_SD1_DATA2, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION);
-+ mxc_iomux_set_pad(MX51_PIN_SD1_DATA2, SD1_PAD_CFG);
++ mxc_request_iomux(MX51_PIN_SD1_DATA2, IOMUX_CONFIG_ALT0 |
++ IOMUX_CONFIG_SION);
++ mxc_iomux_set_pad(MX51_PIN_SD1_DATA2, SD_PAD_CFG);
+
+ /* SD1_DATA3 */
-+ mxc_request_iomux(MX51_PIN_SD1_DATA3, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION);
-+ mxc_iomux_set_pad(MX51_PIN_SD1_DATA3, SD1_PAD_CFG);
-+ printf("*** SD/MMC interface %d intialized\n", esdh_addr);
++ mxc_request_iomux(MX51_PIN_SD1_DATA3, IOMUX_CONFIG_ALT0 |
++ IOMUX_CONFIG_SION);
++ mxc_iomux_set_pad(MX51_PIN_SD1_DATA3, SD_PAD_CFG);
++
+ esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+ status = fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
+ break;
@@ -879,32 +889,41 @@ index 0000000..8ff1381
+/*
+ mxc_request_iomux(MX51_PIN_GPIO1_0, IOMUX_CONFIG_ALT0 |
+ IOMUX_CONFIG_SION);
-+ mxc_iomux_set_pad(MX51_PIN_GPIO1_0, SD1_PAD_CFG);
++ mxc_iomux_set_pad(MX51_PIN_GPIO1_0, SD_PAD_CFG);
+*/
+ /* SD2_CMD */
-+ mxc_request_iomux(MX51_PIN_SD2_CMD, IOMUX_CONFIG_ALT0);
-+ mxc_iomux_set_pad(MX51_PIN_SD2_CMD, SD1_PAD_CFG);
++ mxc_request_iomux(MX51_PIN_SD2_CMD, IOMUX_CONFIG_ALT0 |
++ IOMUX_CONFIG_SION);
++ mxc_iomux_set_pad(MX51_PIN_SD2_CMD, SD_PAD_CFG);
+
+ /* SD2_CLK */
-+ mxc_request_iomux(MX51_PIN_SD2_CLK, IOMUX_CONFIG_ALT0);
-+ mxc_iomux_set_pad(MX51_PIN_SD2_CLK, SD1_PAD_CFG);
++ mxc_request_iomux(MX51_PIN_SD2_CLK, IOMUX_CONFIG_ALT0 |
++ IOMUX_CONFIG_SION);
++ mxc_iomux_set_pad(MX51_PIN_SD2_CLK, PAD_CTL_DRV_MAX |
++ PAD_CTL_DRV_VOT_HIGH | PAD_CTL_HYS_NONE |
++ PAD_CTL_47K_PU | PAD_CTL_PUE_PULL |
++ PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
+
+ /* SD2_DATA0 */
-+ mxc_request_iomux(MX51_PIN_SD2_DATA0, IOMUX_CONFIG_ALT0);
-+ mxc_iomux_set_pad(MX51_PIN_SD2_DATA0, SD1_PAD_CFG);
++ mxc_request_iomux(MX51_PIN_SD2_DATA0, IOMUX_CONFIG_ALT0 |
++ IOMUX_CONFIG_SION);
++ mxc_iomux_set_pad(MX51_PIN_SD2_DATA0, SD_PAD_CFG);
+
+ /* SD2_DATA1 */
-+ mxc_request_iomux(MX51_PIN_SD2_DATA1, IOMUX_CONFIG_ALT0);
-+ mxc_iomux_set_pad(MX51_PIN_SD2_DATA1, SD1_PAD_CFG);
++ mxc_request_iomux(MX51_PIN_SD2_DATA1, IOMUX_CONFIG_ALT0 |
++ IOMUX_CONFIG_SION);
++ mxc_iomux_set_pad(MX51_PIN_SD2_DATA1, SD_PAD_CFG);
+
+ /* SD2_DATA2 */
-+ mxc_request_iomux(MX51_PIN_SD2_DATA2, IOMUX_CONFIG_ALT0);
-+ mxc_iomux_set_pad(MX51_PIN_SD2_DATA2, SD1_PAD_CFG);
++ mxc_request_iomux(MX51_PIN_SD2_DATA2, IOMUX_CONFIG_ALT0 |
++ IOMUX_CONFIG_SION);
++ mxc_iomux_set_pad(MX51_PIN_SD2_DATA2, SD_PAD_CFG);
+
+ /* SD2_DATA3 */
-+ mxc_request_iomux(MX51_PIN_SD2_DATA3, IOMUX_CONFIG_ALT0);
-+ mxc_iomux_set_pad(MX51_PIN_SD2_DATA3, SD1_PAD_CFG);
-+ printf("*** SD/MMC interface %x intialized\n", esdh_addr);
++ mxc_request_iomux(MX51_PIN_SD2_DATA3, IOMUX_CONFIG_ALT0 |
++ IOMUX_CONFIG_SION);
++ mxc_iomux_set_pad(MX51_PIN_SD2_DATA3, SD_PAD_CFG);
++
+ esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+ status = fsl_esdhc_initialize(bis, &esdhc_cfg[1]);
+ break;
diff --git a/patches/u-boot/2013.04/420-apf51-nand-spl-NG.patch b/patches/u-boot/2013.04/420-apf51-nand-spl-NG.patch
index 805f50d..900533e 100644
--- a/patches/u-boot/2013.04/420-apf51-nand-spl-NG.patch
+++ b/patches/u-boot/2013.04/420-apf51-nand-spl-NG.patch
@@ -328,7 +328,7 @@ Signed-off-by: Eric Jarrige <eri...@ar...>
OBJS := $(addprefix $(obj),$(COBJS))
--- uboot-custom/drivers/mtd/nand/mxc_nand.c
+++ uboot-custom/drivers/mtd/nand/mxc_nand.c
-@@ -1108,7 +1108,39 @@ void mxc_nand_command(struct mtd_info *m
+@@ -1108,7 +1108,53 @@ void mxc_nand_command(struct mtd_info *m
break;
#ifdef CONFIG_CMD_NAND_LOCK_UNLOCK
@@ -339,17 +339,17 @@ Signed-off-by: Eric Jarrige <eri...@ar...>
+ writenfc(NFC_V3_WRPROT_BLS_UNLOCK | NFC_V3_WRPROT_LOCK,
+ &host->ip_regs->wrprot);
+ return;
-+ case NAND_CMD_LOCK_TIGHT:
++ case NAND_CMD_LOCK_TIGHT:
+ /* Lock Tight whole NAND only supported */
+ writenfc(NFC_V3_WRPROT_BLS_UNLOCK | NFC_V3_WRPROT_LOCKTIGHT,
+ &host->ip_regs->wrprot);
+ return;
-+ case NAND_CMD_UNLOCK1:
++ case NAND_CMD_UNLOCK1:
+ /* 64 pages per block only */
+ writenfc(page_addr>>6,
+ &host->ip_regs->wrprot_unlock_blkaddr);
+ return;
-+ case NAND_CMD_UNLOCK2:{
++ case NAND_CMD_UNLOCK2:{
+ int temp = readnfc(&host->ip_regs->wrprot_unlock_blkaddr)
+ & 0x0000FFFF;
+ writenfc(((page_addr>>6)<<16) | temp ,
@@ -359,9 +359,23 @@ Signed-off-by: Eric Jarrige <eri...@ar...>
+ &host->ip_regs->wrprot);
+ }
+ return;
-+ case NAND_CMD_LOCK_STATUS:
++ case NAND_CMD_LOCK_STATUS:{
++ void __iomem *main_buf = host->regs->main_area[0];
+ host->col_addr = 0;
+ host->spare_only = false;
++ MTDDEBUG(MTD_DEBUG_LEVEL3,"get_lock_status %x\n", readnfc(&host->ip_regs->wrprot));
++
++ if (((readnfc(&host->ip_regs->wrprot)>>8) & NFC_WRPR_US)
++ && !((readnfc(&host->ip_regs->wrprot)>>8) & NFC_WRPR_LTS)
++ && (((readnfc(&host->ip_regs->wrprot_unlock_blkaddr)>>16) >= page_addr>>6)
++ && ((readnfc(&host->ip_regs->wrprot_unlock_blkaddr)& 0x0000FFFF) <= page_addr>>6))) {
++ writew(NFC_WRPR_US, main_buf);
++ } else if ((readnfc(&host->ip_regs->wrprot)>>8) & NFC_WRPR_LTS) {
++ writew((readnfc(&host->ip_regs->wrprot)>>8), main_buf);
++ } else {
++ writew((readnfc(&host->ip_regs->wrprot)>>8) & ~NFC_WRPR_US, main_buf);
++ }
++ }
+ return;
+
+#else /* not defined(MXC_NFC_V3_2) */
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2013-07-24 16:09:39
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 7529281983f70df10a9974aeb9f7e7f763efe930 (commit)
from c32345f876b7951a0c9af928b15656cd60632699 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 7529281983f70df10a9974aeb9f7e7f763efe930
Author: Eric Jarrige <eri...@ar...>
Date: Wed Jul 24 18:20:09 2013 +0200
[UBOOT] 2013.04: apf51: Update I2C & SD/MMC configuration - work in progress
-----------------------------------------------------------------------
Summary of changes:
.../device/armadeus/apf51/apf51-u-boot-2013.04.h | 16 ++----
patches/u-boot/2013.04/401-apf51.patch | 54 +++++++++++---------
2 files changed, 36 insertions(+), 34 deletions(-)
diff --git a/buildroot/target/device/armadeus/apf51/apf51-u-boot-2013.04.h b/buildroot/target/device/armadeus/apf51/apf51-u-boot-2013.04.h
index 158357f..bd19e5c 100644
--- a/buildroot/target/device/armadeus/apf51/apf51-u-boot-2013.04.h
+++ b/buildroot/target/device/armadeus/apf51/apf51-u-boot-2013.04.h
@@ -103,10 +103,10 @@
#define CONFIG_CMD_DNS
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT /* FAT support */
-/*#define CONFIG_CMD_I2C*/ /* I2C serial bus support */
-/*#define CONFIG_CMD_IIM*/ /* imx iim fuse */
+#define CONFIG_CMD_I2C /* I2C serial bus support */
+#define CONFIG_CMD_IIM /* imx iim fuse */
#define CONFIG_CMD_MII /* MII support */
-/*#define CONFIG_CMD_MMC*/
+#define CONFIG_CMD_MMC
#define CONFIG_CMD_MTDPARTS /* MTD partition support */
#define CONFIG_CMD_NAND /* NAND support */
#define CONFIG_CMD_NAND_LOCK_UNLOCK
@@ -418,9 +418,8 @@
*/
#ifdef CONFIG_CMD_I2C
#define CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_I2C_MXC 1
-#define CONFIG_SYS_I2C_PORT I2C2_BASE_ADDR
-#define CONFIG_SYS_I2C_MX51_PORT2
+#define CONFIG_I2C_MXC
+#define CONFIG_SYS_I2C_BASE I2C2_BASE_ADDR
#define CONFIG_SYS_I2C_SPEED 400000
#define CONFIG_SYS_I2C_SLAVE 0xfe
#endif /* CONFIG_CMD_I2C */
@@ -434,11 +433,8 @@
*/
#ifdef CONFIG_CMD_MMC
#define CONFIG_FSL_ESDHC
-#define CONFIG_SYS_FSL_ESDHC_ADDR 0
-#define CONFIG_SYS_FSL_ESDHC_NUM 1
-
+#define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR
#define CONFIG_MMC
-#define CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
#endif
diff --git a/patches/u-boot/2013.04/401-apf51.patch b/patches/u-boot/2013.04/401-apf51.patch
index fe88a12..53c66f8 100644
--- a/patches/u-boot/2013.04/401-apf51.patch
+++ b/patches/u-boot/2013.04/401-apf51.patch
@@ -67,7 +67,7 @@ new file mode 100644
index 0000000..8ff1381
--- /dev/null
+++ b/board/armadeus/apf51/apf51.c
-@@ -0,0 +1,1168 @@
+@@ -0,0 +1,1174 @@
+/*
+ * (C) Copyright 2010-2013 Eric Jarrige, Armadeus Project
+ *
@@ -93,6 +93,7 @@ index 0000000..8ff1381
+#include <common.h>
+#include <command.h>
+#include <asm/armv7.h>
++#include <asm/arch/clock.h>
+#include <asm/arch/crm_regs.h>
+#include <asm/arch/iomux.h>
+#include <asm/arch/regs_esdctl.h>
@@ -101,6 +102,7 @@ index 0000000..8ff1381
+#include <asm/errno.h>
+#include <i2c.h>
+#include <jffs2/jffs2.h>
++#include <fsl_esdhc.h>
+#include "fpga.h"
+#include <nand.h>
+
@@ -823,51 +825,57 @@ index 0000000..8ff1381
+#endif
+}
+
-+#ifdef CONFIG_FSL_MMC
-+int esdhc_active = CONFIG_DEFAULT_MMC;
++#ifdef CONFIG_FSL_ESDHC
++
++struct fsl_esdhc_cfg esdhc_cfg[2] = {
++ {MMC_SDHC1_BASE_ADDR},
++ {MMC_SDHC2_BASE_ADDR},
++};
++
+#define SD1_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | \
-+ PAD_CTL_HYS_NONE | PAD_CTL_47K_PU | \
++ PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU | \
+ PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | \
+ PAD_CTL_SRE_FAST)
-+int sdhc_init(void)
++int board_mmc_init(bd_t *bis)
+{
+ s32 status = 0;
++ int esdh_addr = CONFIG_SYS_FSL_ESDHC_ADDR;
+
-+ switch (esdhc_active) {
-+ case 0:
++ switch (esdh_addr) {
++ case MMC_SDHC1_BASE_ADDR:
+/*
+ mxc_request_iomux(MX51_PIN_GPIO1_0, IOMUX_CONFIG_ALT0 |
+ IOMUX_CONFIG_SION);
+ mxc_iomux_set_pad(MX51_PIN_GPIO1_0, SD1_PAD_CFG);
+*/
+ /* SD1_CMD */
-+ mxc_request_iomux(MX51_PIN_SD1_CMD, IOMUX_CONFIG_ALT0);
++ mxc_request_iomux(MX51_PIN_SD1_CMD, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION);
+ mxc_iomux_set_pad(MX51_PIN_SD1_CMD, SD1_PAD_CFG);
+
+ /* SD1_CLK */
-+ mxc_request_iomux(MX51_PIN_SD1_CLK, IOMUX_CONFIG_ALT0);
-+ mxc_iomux_set_pad(MX51_PIN_SD1_CLK, SD1_PAD_CFG);
++ mxc_request_iomux(MX51_PIN_SD1_CLK, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION);
++ mxc_iomux_set_pad(MX51_PIN_SD1_CLK, PAD_CTL_DRV_MAX | PAD_CTL_DRV_VOT_HIGH | PAD_CTL_HYS_NONE | PAD_CTL_47K_PU | PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
+
+ /* SD1_DATA0 */
-+ mxc_request_iomux(MX51_PIN_SD1_DATA0, IOMUX_CONFIG_ALT0);
++ mxc_request_iomux(MX51_PIN_SD1_DATA0, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION);
+ mxc_iomux_set_pad(MX51_PIN_SD1_DATA0, SD1_PAD_CFG);
+
+ /* SD1_DATA1 */
-+ mxc_request_iomux(MX51_PIN_SD1_DATA1, IOMUX_CONFIG_ALT0);
++ mxc_request_iomux(MX51_PIN_SD1_DATA1, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION);
+ mxc_iomux_set_pad(MX51_PIN_SD1_DATA1, SD1_PAD_CFG);
+
+ /* SD1_DATA2 */
-+ mxc_request_iomux(MX51_PIN_SD1_DATA2, IOMUX_CONFIG_ALT0);
++ mxc_request_iomux(MX51_PIN_SD1_DATA2, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION);
+ mxc_iomux_set_pad(MX51_PIN_SD1_DATA2, SD1_PAD_CFG);
+
+ /* SD1_DATA3 */
-+ mxc_request_iomux(MX51_PIN_SD1_DATA3, IOMUX_CONFIG_ALT0);
++ mxc_request_iomux(MX51_PIN_SD1_DATA3, IOMUX_CONFIG_ALT0 | IOMUX_CONFIG_SION);
+ mxc_iomux_set_pad(MX51_PIN_SD1_DATA3, SD1_PAD_CFG);
++ printf("*** SD/MMC interface %d intialized\n", esdh_addr);
++ esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
++ status = fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
+ break;
-+
-+ status = 1;
-+ break;
-+ case 1:
++ case MMC_SDHC2_BASE_ADDR:
+/*
+ mxc_request_iomux(MX51_PIN_GPIO1_0, IOMUX_CONFIG_ALT0 |
+ IOMUX_CONFIG_SION);
@@ -896,15 +904,13 @@ index 0000000..8ff1381
+ /* SD2_DATA3 */
+ mxc_request_iomux(MX51_PIN_SD2_DATA3, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX51_PIN_SD2_DATA3, SD1_PAD_CFG);
++ printf("*** SD/MMC interface %x intialized\n", esdh_addr);
++ esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
++ status = fsl_esdhc_initialize(bis, &esdhc_cfg[1]);
+ break;
-+
-+ status = 1;
-+ break;
-+ case 2:
-+ case 3:
+ default:
+ printf("*** ERROR: SD/MMC interface %d not supported\n",
-+ esdhc_active);
++ esdh_addr);
+ status = 1;
+ break;
+ }
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2013-07-24 12:23:41
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via c32345f876b7951a0c9af928b15656cd60632699 (commit)
from 92f508bb3f9bfc45961dd5daa1ae0f6c9af36578 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit c32345f876b7951a0c9af928b15656cd60632699
Author: Eric Jarrige <eri...@ar...>
Date: Wed Jul 24 14:34:10 2013 +0200
[UBOOT] 2013.04: apf51: Update default - configuration - environment variables to use the new U-Boot file format u-boot-with-nand-spl.imx
-----------------------------------------------------------------------
Summary of changes:
.../device/armadeus/apf51/apf51-u-boot-2013.04.h | 5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/buildroot/target/device/armadeus/apf51/apf51-u-boot-2013.04.h b/buildroot/target/device/armadeus/apf51/apf51-u-boot-2013.04.h
index f641431..158357f 100644
--- a/buildroot/target/device/armadeus/apf51/apf51-u-boot-2013.04.h
+++ b/buildroot/target/device/armadeus/apf51/apf51-u-boot-2013.04.h
@@ -24,7 +24,7 @@
#define __CONFIG_H
#define CONFIG_VERSION_VARIABLE
-#define CONFIG_ENV_VERSION "1.3"
+#define CONFIG_ENV_VERSION "1.4"
#define CONFIG_IDENT_STRING " apf51 patch 2.0"
#define CONFIG_BOARD_NAME apf51
@@ -286,7 +286,8 @@
"fi\0" \
"flash_reset_env=env default -f -a; saveenv;" \
"echo Flash environment variables erased!\0" \
- "download_uboot=tftpboot ${loadaddr} ${board_name}-u-boot-nand.bin\0" \
+ "download_uboot=tftpboot ${loadaddr} ${board_name}" \
+ "-u-boot-with-nand-spl.imx\0" \
"download_kernel=tftpboot ${loadaddr} ${board_name}-linux.bin\0" \
"download_rootfs=tftpboot ${loadaddr} ${board_name}-rootfs.ubi\0" \
"download_dtb=tftpboot ${loadaddr} imx51-${board_name}.dtb\0" \
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2013-07-24 12:11:54
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 92f508bb3f9bfc45961dd5daa1ae0f6c9af36578 (commit)
via f52469e5b6c72ea5c905843177b3fa12c71e88f0 (commit)
via 10438bbc61df6217c856a4782a4d7c972615a96f (commit)
via 5ccf0482e062e541d118cd54941df8f67fac872e (commit)
via b98858accfa48e4b03e5b67ed7032c0dabf87841 (commit)
from 9becacc17d58821a9cc2897eb776b732320b9a9b (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 92f508bb3f9bfc45961dd5daa1ae0f6c9af36578
Author: Eric Jarrige <eri...@ar...>
Date: Wed Jul 24 14:21:29 2013 +0200
[BUILD] all apf/pps boards: update default config file to support the new option added to BUILDROOT
commit f52469e5b6c72ea5c905843177b3fa12c71e88f0
Author: Eric Jarrige <eri...@ar...>
Date: Wed Jul 24 14:15:31 2013 +0200
[OTHER] update makefiles according to the new U-Boot option
commit 10438bbc61df6217c856a4782a4d7c972615a96f
Author: Eric Jarrige <eri...@ar...>
Date: Wed Jul 24 14:12:22 2013 +0200
[BUILDROOT] update patch supporting the Safe Boot file format
commit 5ccf0482e062e541d118cd54941df8f67fac872e
Author: Eric Jarrige <eri...@ar...>
Date: Wed Jul 24 14:10:23 2013 +0200
[BUILDROOT] add U-Boot option to build any binary file format
commit b98858accfa48e4b03e5b67ed7032c0dabf87841
Author: Eric Jarrige <eri...@ar...>
Date: Wed Jul 24 14:08:35 2013 +0200
[BUILDROOT] make U-Boot custom config option generic to be submited upstream
-----------------------------------------------------------------------
Summary of changes:
Makefile.in | 2 +-
buildroot/configs/apf27_defconfig | 3 +-
buildroot/configs/apf27_webradio_defconfig | 3 +-
buildroot/configs/apf27test_defconfig | 3 +-
buildroot/configs/apf28_defconfig | 3 +-
buildroot/configs/apf28test_defconfig | 3 +-
buildroot/configs/apf51_defconfig | 3 +-
buildroot/configs/apf51test_defconfig | 3 +-
buildroot/configs/apf9328_defconfig | 3 +-
buildroot/configs/apf9328test_defconfig | 3 +-
buildroot/configs/pps51_defconfig | 3 +-
buildroot/configs/pps_defconfig | 3 +-
buildroot/target/device/armadeus/Makefile.in | 6 +-
...add_support_for_custom_configuration_file.patch | 46 ++++++++++++++++++++
...add_support_for_custom_binary_file_format.patch | 43 ++++++++++++++++++
...support-for-Safe-Boot-file-format-this-fo.patch | 46 --------------------
...d_possibility_to_choose_board_header_file.patch | 26 -----------
...oot-add_support_for_Safe_Boot_file_format.patch | 31 +++++++++++++
18 files changed, 146 insertions(+), 87 deletions(-)
create mode 100644 patches/buildroot/2013.05/050-U-Boot-add_support_for_custom_configuration_file.patch
create mode 100644 patches/buildroot/2013.05/051-U-Boot-add_support_for_custom_binary_file_format.patch
delete mode 100644 patches/buildroot/2013.05/051a-U-Boot-add-support-for-Safe-Boot-file-format-this-fo.patch
delete mode 100644 patches/buildroot/2013.05/051d-u-boot-add_possibility_to_choose_board_header_file.patch
create mode 100644 patches/buildroot/2013.05/052-U-Boot-add_support_for_Safe_Boot_file_format.patch
diff --git a/Makefile.in b/Makefile.in
index ae0c830..1eebf88 100644
--- a/Makefile.in
+++ b/Makefile.in
@@ -68,7 +68,7 @@ ARMADEUS_U_BOOT_DIR:=$(BUILDROOT_PROJECT_BUILD_DIR)/uboot-$(ARMADEUS_U_BOOT_VERS
ARMADEUS_UCLIBC_DIR:=$(BUILDROOT_TOOLCHAIN_BUILD_DIR)/uClibc-$(ARMADEUS_UCLIBC_VERSION)
ARMADEUS_BOARD_DIR:=$(BUILDROOT_DIR)/target/device/armadeus/$(ARMADEUS_BOARD_NAME)
ARMADEUS_LINUX_CONFIG:=$(ARMADEUS_BOARD_DIR)/$(ARMADEUS_BOARD_NAME)-linux-$(ARMADEUS_LINUX_MAIN_VERSION).config
-ARMADEUS_U_BOOT_CONFIG:=$(BUILDROOT_DIR)/$(shell echo $(BR2_TARGET_UBOOT_CONFIG_HEADER_FILE))
+ARMADEUS_U_BOOT_CONFIG:=$(BUILDROOT_DIR)/$(shell echo $(BR2_TARGET_UBOOT_CUSTOM_CONFIG_FILE))
ARMADEUS_STAGING_DIR:=$(BUILDROOT_OUTPUT_DIR)/staging
ARMADEUS_TOOLCHAIN_PATH:=$(BUILDROOT_OUTPUT_DIR)/host/usr/bin
ifeq ($(BR2_TOOLCHAIN_EXTERNAL),y)
diff --git a/buildroot/configs/apf27_defconfig b/buildroot/configs/apf27_defconfig
index f3bf4df..22ffd44 100644
--- a/buildroot/configs/apf27_defconfig
+++ b/buildroot/configs/apf27_defconfig
@@ -71,10 +71,11 @@ BR2_TARGET_ROOTFS_UBIFS_MAXLEBCNT=2047
BR2_TARGET_ROOTFS_UBI=y
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BOARDNAME="$(BR2_BOARD_NAME)"
-BR2_TARGET_UBOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2013.04.h"
BR2_TARGET_UBOOT_CUSTOM_TARBALL=y
BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2013.04.tar.bz2"
BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2013.04"
+BR2_TARGET_UBOOT_USE_CUSTOM_CONFIG=y
+BR2_TARGET_UBOOT_CUSTOM_CONFIG_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2013.04.h"
BR2_TARGET_UBOOT_FORMAT_NAND_BIN=y
BR2_TARGET_UBOOT_NETWORK=y
BR2_TARGET_UBOOT_SERVERIP="192.168.0.2"
diff --git a/buildroot/configs/apf27_webradio_defconfig b/buildroot/configs/apf27_webradio_defconfig
index 3cc70f6..2f63a7c 100644
--- a/buildroot/configs/apf27_webradio_defconfig
+++ b/buildroot/configs/apf27_webradio_defconfig
@@ -80,10 +80,11 @@ BR2_TARGET_ROOTFS_UBIFS_MAXLEBCNT=2047
BR2_TARGET_ROOTFS_UBI=y
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BOARDNAME="$(BR2_BOARD_NAME)"
-BR2_TARGET_UBOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2012.04.h"
BR2_TARGET_UBOOT_CUSTOM_TARBALL=y
BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2012.04.01.tar.bz2"
BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2012.04"
+BR2_TARGET_UBOOT_USE_CUSTOM_CONFIG=y
+BR2_TARGET_UBOOT_CUSTOM_CONFIG_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2012.04.h"
BR2_TARGET_UBOOT_FORMAT_NAND_BIN=y
BR2_TARGET_UBOOT_NETWORK=y
BR2_TARGET_UBOOT_SERVERIP="192.168.0.2"
diff --git a/buildroot/configs/apf27test_defconfig b/buildroot/configs/apf27test_defconfig
index 0fd1055..5fe8b28 100644
--- a/buildroot/configs/apf27test_defconfig
+++ b/buildroot/configs/apf27test_defconfig
@@ -130,10 +130,11 @@ BR2_TARGET_ROOTFS_UBIFS_MAXLEBCNT=2047
BR2_TARGET_ROOTFS_UBI=y
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BOARDNAME="$(BR2_BOARD_NAME)"
-BR2_TARGET_UBOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2013.04.h"
BR2_TARGET_UBOOT_CUSTOM_TARBALL=y
BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2013.04.tar.bz2"
BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2013.04"
+BR2_TARGET_UBOOT_USE_CUSTOM_CONFIG=y
+BR2_TARGET_UBOOT_CUSTOM_CONFIG_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2013.04.h"
BR2_TARGET_UBOOT_FORMAT_NAND_BIN=y
BR2_TARGET_UBOOT_NETWORK=y
BR2_TARGET_UBOOT_SERVERIP="192.168.0.2"
diff --git a/buildroot/configs/apf28_defconfig b/buildroot/configs/apf28_defconfig
index 57d98a3..83dfdcf 100644
--- a/buildroot/configs/apf28_defconfig
+++ b/buildroot/configs/apf28_defconfig
@@ -73,10 +73,11 @@ BR2_TARGET_ROOTFS_UBI=y
BR2_TARGET_ROOTFS_UBI_SUBSIZE=0
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BOARDNAME="$(BR2_BOARD_NAME)"
-BR2_TARGET_UBOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2013.04.h"
BR2_TARGET_UBOOT_CUSTOM_TARBALL=y
BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2013.04.tar.bz2"
BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2013.04"
+BR2_TARGET_UBOOT_USE_CUSTOM_CONFIG=y
+BR2_TARGET_UBOOT_CUSTOM_CONFIG_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2013.04.h"
BR2_TARGET_UBOOT_FORMAT_SB=y
BR2_TARGET_UBOOT_NETWORK=y
BR2_TARGET_UBOOT_SERVERIP="192.168.0.2"
diff --git a/buildroot/configs/apf28test_defconfig b/buildroot/configs/apf28test_defconfig
index 5a9e407..8022526 100644
--- a/buildroot/configs/apf28test_defconfig
+++ b/buildroot/configs/apf28test_defconfig
@@ -99,10 +99,11 @@ BR2_TARGET_ROOTFS_UBI=y
BR2_TARGET_ROOTFS_UBI_SUBSIZE=0
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BOARDNAME="$(BR2_BOARD_NAME)"
-BR2_TARGET_UBOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2013.04.h"
BR2_TARGET_UBOOT_CUSTOM_TARBALL=y
BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2013.04.tar.bz2"
BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2013.04"
+BR2_TARGET_UBOOT_USE_CUSTOM_CONFIG=y
+BR2_TARGET_UBOOT_CUSTOM_CONFIG_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2013.04.h"
BR2_TARGET_UBOOT_FORMAT_SB=y
BR2_TARGET_UBOOT_NETWORK=y
BR2_TARGET_UBOOT_SERVERIP="192.168.0.2"
diff --git a/buildroot/configs/apf51_defconfig b/buildroot/configs/apf51_defconfig
index 4ed5412..5813be8 100644
--- a/buildroot/configs/apf51_defconfig
+++ b/buildroot/configs/apf51_defconfig
@@ -81,10 +81,11 @@ BR2_TARGET_ROOTFS_UBIFS_MAXLEBCNT=135301
BR2_TARGET_ROOTFS_UBI=y
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BOARDNAME="$(BR2_BOARD_NAME)"
-BR2_TARGET_UBOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2012.04.h"
BR2_TARGET_UBOOT_CUSTOM_TARBALL=y
BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2012.04.01.tar.bz2"
BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2012.04"
+BR2_TARGET_UBOOT_USE_CUSTOM_CONFIG=y
+BR2_TARGET_UBOOT_CUSTOM_CONFIG_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2012.04.h"
BR2_TARGET_UBOOT_FORMAT_NAND_BIN=y
BR2_TARGET_UBOOT_NETWORK=y
BR2_TARGET_UBOOT_SERVERIP="192.168.0.2"
diff --git a/buildroot/configs/apf51test_defconfig b/buildroot/configs/apf51test_defconfig
index e2f334b..fdf2e17 100644
--- a/buildroot/configs/apf51test_defconfig
+++ b/buildroot/configs/apf51test_defconfig
@@ -147,10 +147,11 @@ BR2_TARGET_ROOTFS_UBIFS_MAXLEBCNT=135301
BR2_TARGET_ROOTFS_UBI=y
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BOARDNAME="$(BR2_BOARD_NAME)"
-BR2_TARGET_UBOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2012.04.h"
BR2_TARGET_UBOOT_CUSTOM_TARBALL=y
BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2012.04.01.tar.bz2"
BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2012.04"
+BR2_TARGET_UBOOT_USE_CUSTOM_CONFIG=y
+BR2_TARGET_UBOOT_CUSTOM_CONFIG_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2012.04.h"
BR2_TARGET_UBOOT_FORMAT_NAND_BIN=y
BR2_TARGET_UBOOT_NETWORK=y
BR2_TARGET_UBOOT_SERVERIP="192.168.0.2"
diff --git a/buildroot/configs/apf9328_defconfig b/buildroot/configs/apf9328_defconfig
index f083054..71e41dc 100644
--- a/buildroot/configs/apf9328_defconfig
+++ b/buildroot/configs/apf9328_defconfig
@@ -57,10 +57,11 @@ BR2_TARGET_ROOTFS_JFFS2=y
BR2_TARGET_ROOTFS_JFFS2_PAD=y
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BOARDNAME="$(BR2_BOARD_NAME)"
-BR2_TARGET_UBOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2013.04.h"
BR2_TARGET_UBOOT_CUSTOM_TARBALL=y
BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2013.04.tar.bz2"
BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2013.04"
+BR2_TARGET_UBOOT_USE_CUSTOM_CONFIG=y
+BR2_TARGET_UBOOT_CUSTOM_CONFIG_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2013.04.h"
BR2_TARGET_UBOOT_NETWORK=y
BR2_TARGET_UBOOT_SERVERIP="192.168.0.2"
BR2_TARGET_UBOOT_IPADDR="192.168.0.10"
diff --git a/buildroot/configs/apf9328test_defconfig b/buildroot/configs/apf9328test_defconfig
index 442ceda..1a99ed6 100644
--- a/buildroot/configs/apf9328test_defconfig
+++ b/buildroot/configs/apf9328test_defconfig
@@ -102,10 +102,11 @@ BR2_TARGET_ROOTFS_JFFS2=y
BR2_TARGET_ROOTFS_JFFS2_PAD=y
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BOARDNAME="$(BR2_BOARD_NAME)"
-BR2_TARGET_UBOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2013.04.h"
BR2_TARGET_UBOOT_CUSTOM_TARBALL=y
BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2013.04.tar.bz2"
BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2013.04"
+BR2_TARGET_UBOOT_USE_CUSTOM_CONFIG=y
+BR2_TARGET_UBOOT_CUSTOM_CONFIG_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2013.04.h"
BR2_TARGET_UBOOT_NETWORK=y
BR2_TARGET_UBOOT_SERVERIP="192.168.0.2"
BR2_TARGET_UBOOT_IPADDR="192.168.0.10"
diff --git a/buildroot/configs/pps51_defconfig b/buildroot/configs/pps51_defconfig
index bfcdc7e..2e612e5 100644
--- a/buildroot/configs/pps51_defconfig
+++ b/buildroot/configs/pps51_defconfig
@@ -85,10 +85,11 @@ BR2_TARGET_ROOTFS_UBIFS_MAXLEBCNT=135301
BR2_TARGET_ROOTFS_UBI=y
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BOARDNAME="apf51"
-BR2_TARGET_UBOOT_CONFIG_HEADER_FILE="$(ARMADEUS_PATH)/apf51/apf51-u-boot-2012.04.h"
BR2_TARGET_UBOOT_CUSTOM_TARBALL=y
BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2012.04.01.tar.bz2"
BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2012.04"
+BR2_TARGET_UBOOT_USE_CUSTOM_CONFIG=y
+BR2_TARGET_UBOOT_CUSTOM_CONFIG_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2012.04.h"
BR2_TARGET_UBOOT_FORMAT_NAND_BIN=y
BR2_TARGET_UBOOT_NETWORK=y
BR2_TARGET_UBOOT_SERVERIP="192.168.0.2"
diff --git a/buildroot/configs/pps_defconfig b/buildroot/configs/pps_defconfig
index 7cc99df..92e6a3d 100644
--- a/buildroot/configs/pps_defconfig
+++ b/buildroot/configs/pps_defconfig
@@ -75,10 +75,11 @@ BR2_TARGET_ROOTFS_UBIFS_MAXLEBCNT=2047
BR2_TARGET_ROOTFS_UBI=y
BR2_TARGET_UBOOT=y
BR2_TARGET_UBOOT_BOARDNAME="apf27"
-BR2_TARGET_UBOOT_CONFIG_HEADER_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2012.04.h"
BR2_TARGET_UBOOT_CUSTOM_TARBALL=y
BR2_TARGET_UBOOT_CUSTOM_TARBALL_LOCATION="ftp://ftp.denx.de/pub/u-boot/u-boot-2012.04.01.tar.bz2"
BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR="../patches/u-boot/2012.04"
+BR2_TARGET_UBOOT_USE_CUSTOM_CONFIG=y
+BR2_TARGET_UBOOT_CUSTOM_CONFIG_FILE="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-2012.04.h"
BR2_TARGET_UBOOT_FORMAT_NAND_BIN=y
BR2_TARGET_UBOOT_NETWORK=y
BR2_TARGET_UBOOT_SERVERIP="192.168.0.2"
diff --git a/buildroot/target/device/armadeus/Makefile.in b/buildroot/target/device/armadeus/Makefile.in
index 79803ca..a37a8c4 100644
--- a/buildroot/target/device/armadeus/Makefile.in
+++ b/buildroot/target/device/armadeus/Makefile.in
@@ -12,9 +12,6 @@ LINUX26_KERNEL_NAME:=$(BOARD_NAME)-linux.bin
# !! if you modify the following, please also update scripts/quiltify.sh !!
define UBOOT_ARMADEUS_SPECIFIC_PATCH_HOOK
support/scripts/apply-patches.sh $(@D) $(BR2_TARGET_UBOOT_CUSTOM_PATCH_DIR) \*.patch
-$(ifneq ($(strip $(BR2_TARGET_UBOOT_CONFIG_HEADER_FILE)),))
- cp -pf $(BR2_TARGET_UBOOT_CONFIG_HEADER_FILE) $(@D)/include/configs/$(UBOOT_BOARD_NAME).h
-$(endif)
endef
UBOOT_POST_PATCH_HOOKS += UBOOT_ARMADEUS_SPECIFIC_PATCH_HOOK
@@ -40,6 +37,9 @@ define UBOOT_POST_INSTALL_IMAGES_ACTION
@if [ ! -e "$(BINARIES_DIR)/$(BOARD_NAME)-u-boot.bin" ]; then \
ln -sf $(BINARIES_DIR)/$(BOARD_NAME)-$(UBOOT_BIN) $(BINARIES_DIR)/$(BOARD_NAME)-u-boot.bin ; \
fi
+ @if [ ! -e "$(BINARIES_DIR)/$(BOARD_NAME)-u-boot-nand.bin" ]; then \
+ ln -sf $(BINARIES_DIR)/$(BOARD_NAME)-$(UBOOT_BIN) $(BINARIES_DIR)/$(BOARD_NAME)-u-boot-nand.bin ; \
+ fi
endef
UBOOT_POST_INSTALL_IMAGES_HOOKS += UBOOT_POST_INSTALL_IMAGES_ACTION
diff --git a/patches/buildroot/2013.05/050-U-Boot-add_support_for_custom_configuration_file.patch b/patches/buildroot/2013.05/050-U-Boot-add_support_for_custom_configuration_file.patch
new file mode 100644
index 0000000..5791481
--- /dev/null
+++ b/patches/buildroot/2013.05/050-U-Boot-add_support_for_custom_configuration_file.patch
@@ -0,0 +1,46 @@
+U-Boot: add option to use a custom config file as it can be done within
+ Linux kernel, Busybox, uClibc and some other tools.
+
+Signed-off-by: Eric Jarrige <eri...@ar...>
+---
+--- buildroot/boot/uboot/Config.in
++++ buildroot/boot/uboot/Config.in
+@@ -71,6 +71,26 @@ config BR2_TARGET_UBOOT_CUSTOM_GIT_VERSI
+ endif
+
+ choice
++ prompt "U-Boot configuration"
++ default BR2_TARGET_UBOOT_USE_DEFCONFIG
++
++config BR2_TARGET_UBOOT_USE_DEFCONFIG
++ bool "Using default configuration"
++ help
++ Using the default configuration selected by U-Boot board name.
++
++config BR2_TARGET_UBOOT_USE_CUSTOM_CONFIG
++ bool "Using a custom config file"
++
++endchoice
++
++config BR2_TARGET_UBOOT_CUSTOM_CONFIG_FILE
++ string "Configuration file path"
++ depends on BR2_TARGET_UBOOT_USE_CUSTOM_CONFIG
++ help
++ Path to the custimized U-Boot configuration file
++
++choice
+ prompt "U-Boot binary format"
+ default BR2_TARGET_UBOOT_FORMAT_BIN
+
+--- buildroot/boot/uboot/uboot.mk
++++ buildroot/boot/uboot/uboot.mk
+@@ -71,6 +71,9 @@ UBOOT_POST_PATCH_HOOKS += UBOOT_APPLY_CU
+ endif
+
+ define UBOOT_CONFIGURE_CMDS
++ $(if $(BR2_TARGET_UBOOT_USE_CUSTOM_CONFIG),
++ cp -pf $(call qstrip,$(BR2_TARGET_UBOOT_CUSTOM_CONFIG_FILE)) \
++ $(@D)/include/configs/$(UBOOT_BOARD_NAME).h)
+ $(TARGET_CONFIGURE_OPTS) $(UBOOT_CONFIGURE_OPTS) \
+ $(MAKE) -C $(@D) $(UBOOT_MAKE_OPTS) \
+ $(UBOOT_BOARD_NAME)_config
diff --git a/patches/buildroot/2013.05/051-U-Boot-add_support_for_custom_binary_file_format.patch b/patches/buildroot/2013.05/051-U-Boot-add_support_for_custom_binary_file_format.patch
new file mode 100644
index 0000000..636ff2e
--- /dev/null
+++ b/patches/buildroot/2013.05/051-U-Boot-add_support_for_custom_binary_file_format.patch
@@ -0,0 +1,43 @@
+U-Boot: add option to use a custom U-Boot binary image format
+
+Signed-off-by: Eric Jarrige <eri...@ar...>
+---
+--- buildroot/boot/uboot/Config.in
++++ buildroot/boot/uboot/Config.in
+@@ -118,8 +118,23 @@ config BR2_TARGET_UBOOT_FORMAT_LDR
+ depends on BR2_bfin
+ bool "u-boot.ldr"
+
++config BR2_LINUX_UBOOT_USE_CUSTOM_FORMAT
++ bool "custom binary format"
++ help
++ Use CPU-specific binary format.
++
++ Select this option and specify the make target in "U-Boot
++ binary target name".
++
+ endchoice
+
++config BR2_LINUX_UBOOT_CUSTOM_FORMAT_NAME
++ string "U-Boot binary target name"
++ depends on BR2_LINUX_UBOOT_USE_CUSTOM_FORMAT
++ help
++ Specify the kernel make target to build the kernel that you
++ need.
++
+ config BR2_TARGET_UBOOT_OMAP_IFT
+ depends on BR2_TARGET_UBOOT_FORMAT_BIN
+ depends on BR2_arm || BR2_armeb
+--- buildroot/boot/uboot/uboot.mk
++++ buildroot/boot/uboot/uboot.mk
+@@ -37,6 +37,9 @@ else ifeq ($(BR2_TARGET_UBOOT_FORMAT_NAN
+ UBOOT_BIN = u-boot-nand.bin
+ else ifeq ($(BR2_TARGET_UBOOT_FORMAT_IMG),y)
+ UBOOT_BIN = u-boot.img
++else ifeq ($(BR2_LINUX_UBOOT_USE_CUSTOM_FORMAT),y)
++UBOOT_BIN = $(call qstrip,$(BR2_LINUX_UBOOT_CUSTOM_FORMAT_NAME))
++UBOOT_MAKE_TARGET = $(UBOOT_BIN)
+ else
+ UBOOT_BIN = u-boot.bin
+ UBOOT_BIN_IFT = $(UBOOT_BIN).ift
+
diff --git a/patches/buildroot/2013.05/051a-U-Boot-add-support-for-Safe-Boot-file-format-this-fo.patch b/patches/buildroot/2013.05/051a-U-Boot-add-support-for-Safe-Boot-file-format-this-fo.patch
deleted file mode 100644
index a503b90..0000000
--- a/patches/buildroot/2013.05/051a-U-Boot-add-support-for-Safe-Boot-file-format-this-fo.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From c6f5dc1ac36a8b01a732b972035a1ace5b97f790 Mon Sep 17 00:00:00 2001
-From: Eric Jarrige <eri...@ar...>
-Date: Tue, 13 Mar 2012 12:42:52 +0100
-Subject: [PATCH 2/2] u-boot: add support for u-boot.sb file format
-
-add u-boot.sb binary format in BR menuconfig - Safe Boot (.sb) file format
-have to be used with Freescale CPUs like imx23, imx28, stp37xx
-
-Signed-off-by: Eric Jarrige <eri...@ar...>
----
- boot/uboot/Config.in | 3 +++
- boot/uboot/uboot.mk | 4 ++++
- 2 files changed, 7 insertions(+), 0 deletions(-)
-
-diff --git a/boot/uboot/Config.in b/boot/uboot/Config.in
-index c8db9fb..5fd5258 100644
---- a/boot/uboot/Config.in
-+++ b/boot/uboot/Config.in
-@@ -98,6 +98,9 @@ config BR2_TARGET_UBOOT_FORMAT_LDR
- depends on BR2_bfin
- bool "u-boot.ldr"
-
-+config BR2_TARGET_UBOOT_FORMAT_SB
-+ bool "u-boot.sb"
-+
- endchoice
-
- config BR2_TARGET_UBOOT_OMAP_IFT
-diff --git a/boot/uboot/uboot.mk b/boot/uboot/uboot.mk
-index db9de8d..1394400 100644
---- a/boot/uboot/uboot.mk
-+++ b/boot/uboot/uboot.mk
-@@ -37,6 +37,10 @@ else ifeq ($(BR2_TARGET_UBOOT_FORMAT_LDR),y)
- UBOOT_BIN = u-boot-nand.bin
- else ifeq ($(BR2_TARGET_UBOOT_FORMAT_IMG),y)
- UBOOT_BIN = u-boot.img
-+else ifeq ($(BR2_TARGET_UBOOT_FORMAT_SB),y)
-+UBOOT_DEPENDENCIES += host-elftosb
-+UBOOT_BIN = u-boot.sb
-+UBOOT_MAKE_TARGET = $(UBOOT_BIN)
- else
- UBOOT_BIN = u-boot.bin
- UBOOT_BIN_IFT = $(UBOOT_BIN).ift
---
-1.7.2.5
-
diff --git a/patches/buildroot/2013.05/051d-u-boot-add_possibility_to_choose_board_header_file.patch b/patches/buildroot/2013.05/051d-u-boot-add_possibility_to_choose_board_header_file.patch
deleted file mode 100644
index 631fe1e..0000000
--- a/patches/buildroot/2013.05/051d-u-boot-add_possibility_to_choose_board_header_file.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-
-BR maintainer removes this change (and others) with this commit:
-http://git.buildroot.net/buildroot/commit/?id=3bab463be4a42de790b745ab2e873e1c1ce42f2d
-
-We need it because U-Boot's mainline doesn't have (yet?) our boards configs.
-So this patch reverts the removing + refines it.
-
-Index: buildroot/boot/uboot/Config.in
-===================================================================
---- buildroot.orig/boot/uboot/Config.in 2012-02-21 16:44:24.000000000 +0100
-+++ buildroot/boot/uboot/Config.in 2012-02-21 16:44:26.000000000 +0100
-@@ -12,6 +12,14 @@
- See boards.cfg in U-Boot source code for the list of available
- configurations.
-
-+config BR2_TARGET_UBOOT_CONFIG_HEADER_FILE
-+ string "U-Boot header file"
-+ default "$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-u-boot-$(BR2_TARGET_UBOOT_VERSION).h"
-+ help
-+ U-Boot config header file to use to build U-Boot for your target.
-+ Mainly for people using boards not (yet) integrated in U-Boot's
-+ mainline or wanting to test a config different from the default one.
-+
- choice
- prompt "U-Boot Version"
- help
diff --git a/patches/buildroot/2013.05/052-U-Boot-add_support_for_Safe_Boot_file_format.patch b/patches/buildroot/2013.05/052-U-Boot-add_support_for_Safe_Boot_file_format.patch
new file mode 100644
index 0000000..5a1192d
--- /dev/null
+++ b/patches/buildroot/2013.05/052-U-Boot-add_support_for_Safe_Boot_file_format.patch
@@ -0,0 +1,31 @@
+add u-boot.sb binary format in BR menuconfig - Safe Boot (.sb) format
+depends on the host-elftosb tool to build requiring a specific dependency
+in BuidlRoot makefile
+
+Signed-off-by: Eric Jarrige <eri...@ar...>
+---
+--- buildroot/boot/uboot/Config.in
++++ buildroot/boot/uboot/Config.in
+@@ -118,6 +118,9 @@ config BR2_TARGET_UBOOT_FORMAT_LDR
+ depends on BR2_bfin
+ bool "u-boot.ldr"
+
++config BR2_TARGET_UBOOT_FORMAT_SB
++ bool "u-boot.sb"
++
+ config BR2_LINUX_UBOOT_USE_CUSTOM_FORMAT
+ bool "custom binary format"
+ help
+--- buildroot/boot/uboot/uboot.mk
++++ buildroot/boot/uboot/uboot.mk
+@@ -37,6 +37,10 @@ else ifeq ($(BR2_TARGET_UBOOT_FORMAT_NAN
+ UBOOT_BIN = u-boot-nand.bin
+ else ifeq ($(BR2_TARGET_UBOOT_FORMAT_IMG),y)
+ UBOOT_BIN = u-boot.img
++else ifeq ($(BR2_TARGET_UBOOT_FORMAT_SB),y)
++UBOOT_DEPENDENCIES += host-elftosb
++UBOOT_BIN = u-boot.sb
++UBOOT_MAKE_TARGET = $(UBOOT_BIN)
+ else ifeq ($(BR2_LINUX_UBOOT_USE_CUSTOM_FORMAT),y)
+ UBOOT_BIN = $(call qstrip,$(BR2_LINUX_UBOOT_CUSTOM_FORMAT_NAME))
+ UBOOT_MAKE_TARGET = $(UBOOT_BIN)
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2013-07-24 07:32:25
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 9becacc17d58821a9cc2897eb776b732320b9a9b (commit)
from 1cf91d44c33cf35f84e088746a1d70b5341deab0 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 9becacc17d58821a9cc2897eb776b732320b9a9b
Author: Philippe Reynes <tr...@ya...>
Date: Wed Jul 24 00:51:38 2013 +0200
[LINUX] 3.11: move to 3.11-rc2
Signed-off-by: Philippe Reynes <tr...@ya...>
-----------------------------------------------------------------------
Summary of changes:
...3.11-rc1.config => apf27-linux-3.11-rc2.config} | 0
patches/linux/{3.11-rc1 => 3.11-rc2} | 0
2 files changed, 0 insertions(+), 0 deletions(-)
rename buildroot/target/device/armadeus/apf27/{apf27-linux-3.11-rc1.config => apf27-linux-3.11-rc2.config} (100%)
rename patches/linux/{3.11-rc1 => 3.11-rc2} (100%)
diff --git a/buildroot/target/device/armadeus/apf27/apf27-linux-3.11-rc1.config b/buildroot/target/device/armadeus/apf27/apf27-linux-3.11-rc2.config
similarity index 100%
rename from buildroot/target/device/armadeus/apf27/apf27-linux-3.11-rc1.config
rename to buildroot/target/device/armadeus/apf27/apf27-linux-3.11-rc2.config
diff --git a/patches/linux/3.11-rc1 b/patches/linux/3.11-rc2
similarity index 100%
rename from patches/linux/3.11-rc1
rename to patches/linux/3.11-rc2
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2013-07-23 23:15:21
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 1cf91d44c33cf35f84e088746a1d70b5341deab0 (commit)
from d489f3a63438b1f83a85205ad9ead40faedadafc (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 1cf91d44c33cf35f84e088746a1d70b5341deab0
Author: Eric Jarrige <eri...@ar...>
Date: Wed Jul 24 01:25:45 2013 +0200
[UBOOT] 2013.04: apf51: extend SDRAM pin init - and new clean-up
-----------------------------------------------------------------------
Summary of changes:
patches/u-boot/2013.04/400-imx51.patch | 205 +++----------------
patches/u-boot/2013.04/401-apf51.patch | 24 +--
patches/u-boot/2013.04/420-apf51-nand-spl-NG.patch | 15 +--
3 files changed, 39 insertions(+), 205 deletions(-)
diff --git a/patches/u-boot/2013.04/400-imx51.patch b/patches/u-boot/2013.04/400-imx51.patch
index 8c8057f..d28be43 100644
--- a/patches/u-boot/2013.04/400-imx51.patch
+++ b/patches/u-boot/2013.04/400-imx51.patch
@@ -1,13 +1,11 @@
Signed-off-by: Eric Jarrige <eri...@ar...>
Signed-off-by: Philippe Reynes <tr...@ya...>
---
- arch/arm/cpu/armv7/cpu.c | 4 +
- arch/arm/cpu/armv7/mx5/asm-offsets.c | 135 ++++++++++++++++++++++++++-
- arch/arm/cpu/armv7/mx5/lowlevel_init.S | 85 +++++++++++++++--
- arch/arm/include/asm/arch-mx5/imx-regs.h | 2 +
- arch/arm/include/asm/arch-mx5/regs_esdctl.h | 131 ++++++++++++++++++++++++++
- 5 files changed, 344 insertions(+), 13 deletions(-)
- create mode 100644 arch/arm/include/asm/arch-mx5/regs_esdctl.h
+ arch/arm/cpu/armv7/cpu.c
+ arch/arm/cpu/armv7/mx5/lowlevel_init.S
+ arch/arm/include/asm/arch-mx5/imx-regs.h
+ arch/arm/include/asm/arch-mx5/mx5x_pins.h
+ arch/arm/include/asm/arch-mx5/regs_esdctl.h
diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c
index 39a8023..c8c2293 100644
@@ -23,171 +21,6 @@ index 39a8023..c8c2293 100644
+
return 0;
}
-diff --git a/arch/arm/cpu/armv7/mx5/asm-offsets.c b/arch/arm/cpu/armv7/mx5/asm-offsets.c
-index f972498..f7ef30a 100644
---- a/arch/arm/cpu/armv7/mx5/asm-offsets.c
-+++ b/arch/arm/cpu/armv7/mx5/asm-offsets.c
-@@ -17,13 +17,15 @@
-
- #include <common.h>
- #include <asm/arch/imx-regs.h>
--
-+#include <asm/arch/iomux.h>
-+#include <asm/arch/regs_esdctl.h>
- #include <linux/kbuild.h>
-
- int main(void)
- {
-
- /* Round up to make sure size gives nice stack alignment */
-+ COMMENT("ESDCTL");
- DEFINE(CLKCTL_CCMR, offsetof(struct clkctl, ccr));
- DEFINE(CLKCTL_CCDR, offsetof(struct clkctl, ccdr));
- DEFINE(CLKCTL_CSR, offsetof(struct clkctl, csr));
-@@ -62,7 +64,8 @@ int main(void)
- DEFINE(CLKCTL_CCGR7, offsetof(struct clkctl, ccgr7));
- #endif
-
-- /* DPLL */
-+ BLANK();
-+ COMMENT("DPLL");
- DEFINE(PLL_DP_CTL, offsetof(struct dpll, dp_ctl));
- DEFINE(PLL_DP_CONFIG, offsetof(struct dpll, dp_config));
- DEFINE(PLL_DP_OP, offsetof(struct dpll, dp_op));
-@@ -72,5 +75,133 @@ int main(void)
- DEFINE(PLL_DP_HFS_MFD, offsetof(struct dpll, dp_hfs_mfd));
- DEFINE(PLL_DP_HFS_MFN, offsetof(struct dpll, dp_hfs_mfn));
-
-+#if defined(CONFIG_MX51)
-+ BLANK();
-+ COMMENT("ESDCTL");
-+ DEFINE(ESDCTL_ESDCTL0, offsetof(struct esdctl_regs, esdctl0));
-+ DEFINE(ESDCTL_ESDCFG0, offsetof(struct esdctl_regs, esdcfg0));
-+ DEFINE(ESDCTL_ESDCTL1, offsetof(struct esdctl_regs, esdctl1));
-+ DEFINE(ESDCTL_ESDCFG1, offsetof(struct esdctl_regs, esdcfg1));
-+ DEFINE(ESDCTL_ESDMISC, offsetof(struct esdctl_regs, esdmisc));
-+ DEFINE(ESDCTL_ESDSCR, offsetof(struct esdctl_regs, esdscr));
-+ DEFINE(ESDCTL_ESDCDLY1, offsetof(struct esdctl_regs, esdcdly1));
-+ DEFINE(ESDCTL_ESDCDLY2, offsetof(struct esdctl_regs, esdcdly2));
-+ DEFINE(ESDCTL_ESDCDLY3, offsetof(struct esdctl_regs, esdcdly3));
-+ DEFINE(ESDCTL_ESDCDLY4, offsetof(struct esdctl_regs, esdcdly4));
-+ DEFINE(ESDCTL_ESDCDLY5, offsetof(struct esdctl_regs, esdcdly5));
-+ DEFINE(ESDCTL_ESDGPR, offsetof(struct esdctl_regs, esdgpr));
-+ DEFINE(ESDCTL_ESDPRCT0, offsetof(struct esdctl_regs, esdprct0));
-+ DEFINE(ESDCTL_ESDPRCT1, offsetof(struct esdctl_regs, esdprct1));
-+ BLANK();
-+ COMMENT("IOMUX");
-+ DEFINE(IOMUXC_SW_PAD_CTL_GRP_DDRPKS, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_DDRPKS));
-+ DEFINE(IOMUXC_SW_PAD_CTL_GRP_PKEDDR, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_PKEDDR));
-+ DEFINE(IOMUXC_SW_PAD_CTL_GRP_PKEADDR, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_PKEADDR));
-+ DEFINE(IOMUXC_SW_PAD_CTL_GRP_DDRAPKS, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_DDRAPKS));
-+ DEFINE(IOMUXC_SW_PAD_CTL_GRP_DDRAPUS, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_DDRAPUS));
-+ DEFINE(IOMUXC_SW_PAD_CTL_GRP_DDRPUS, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_DDRPUS));
-+ DEFINE(IOMUXC_SW_PAD_CTL_GRP_HYSDDR0, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_HYSDDR0));
-+ DEFINE(IOMUXC_SW_PAD_CTL_GRP_HYSDDR1, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_HYSDDR1));
-+ DEFINE(IOMUXC_SW_PAD_CTL_GRP_HYSDDR2, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_HYSDDR2));
-+ DEFINE(IOMUXC_SW_PAD_CTL_GRP_HYSDDR3, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_HYSDDR3));
-+ DEFINE(IOMUXC_SW_PAD_CTL_GRP_DDR_SR_B0, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_DDR_SR_B0));
-+ DEFINE(IOMUXC_SW_PAD_CTL_GRP_DDR_SR_B1, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_DDR_SR_B1));
-+ DEFINE(IOMUXC_SW_PAD_CTL_GRP_DDR_SR_B2, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_DDR_SR_B2));
-+ DEFINE(IOMUXC_SW_PAD_CTL_GRP_DDR_SR_B4, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_DDR_SR_B4));
-+ DEFINE(IOMUXC_SW_PAD_CTL_GRP_DRAM_B0, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_DRAM_B0));
-+ DEFINE(IOMUXC_SW_PAD_CTL_GRP_DRAM_B1, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_DRAM_B1));
-+ DEFINE(IOMUXC_SW_PAD_CTL_GRP_DRAM_B2, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_DRAM_B2));
-+ DEFINE(IOMUXC_SW_PAD_CTL_GRP_DRAM_B4, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_DRAM_B4));
-+ DEFINE(IOMUXC_SW_PAD_CTL_GRP_INMODE1, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_INMODE1));
-+ DEFINE(IOMUXC_SW_PAD_CTL_GRP_DDR_SR_A0, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_DDR_SR_A0));
-+ DEFINE(IOMUXC_SW_PAD_CTL_GRP_EMI_DS5, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_EMI_DS5));
-+ DEFINE(IOMUXC_SW_PAD_CTL_GRP_DDR_SR_A1, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_DDR_SR_A1));
-+ DEFINE(IOMUXC_SW_PAD_CTL_GRP_DDR_A0, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_DDR_A0));
-+ DEFINE(IOMUXC_SW_PAD_CTL_GRP_DDR_A1, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_DDR_A1));
-+ DEFINE(IOMUXC_SW_PAD_CTL_GRP_DISP_PKE0, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_DISP_PKE0));
-+ DEFINE(IOMUXC_SW_PAD_CTL_PAD_DRAM_RAS, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_DRAM_RAS));
-+ DEFINE(IOMUXC_SW_PAD_CTL_PAD_DRAM_CAS, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_DRAM_CAS));
-+ DEFINE(IOMUXC_SW_PAD_CTL_PAD_DRAM_SDWE, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_DRAM_SDWE));
-+ DEFINE(IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCKE0, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_DRAM_SDCKE0));
-+ DEFINE(IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCKE1, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_DRAM_SDCKE1));
-+ DEFINE(IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCLK, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_DRAM_SDCLK));
-+ DEFINE(IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS0, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_DRAM_SDQS0));
-+ DEFINE(IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS1, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_DRAM_SDQS1));
-+ DEFINE(IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS2, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_DRAM_SDQS2));
-+ DEFINE(IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS3, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_DRAM_SDQS3));
-+ DEFINE(IOMUXC_SW_PAD_CTL_PAD_DRAM_CS0, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_DRAM_CS0));
-+ DEFINE(IOMUXC_SW_PAD_CTL_PAD_DRAM_CS1, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_DRAM_CS1));
-+ DEFINE(IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM0, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_DRAM_DQM0));
-+ DEFINE(IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM1, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_DRAM_DQM1));
-+ DEFINE(IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM2, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_DRAM_DQM2));
-+ DEFINE(IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM3, PAD_I_START
-+ + PIN_TO_IOMUX_PAD(MX51_PIN_CTL_DRAM_DQM3));
-+
-+ BLANK();
-+ COMMENT("various IOMUX pad functions");
-+ DEFINE(PAD_CTL_SRE_SLOW, PAD_CTL_SRE_SLOW);
-+ DEFINE(PAD_CTL_SRE_FAST, PAD_CTL_SRE_FAST);
-+ DEFINE(PAD_CTL_DRV_LOW, PAD_CTL_DRV_LOW);
-+ DEFINE(PAD_CTL_DRV_MEDIUM, PAD_CTL_DRV_MEDIUM);
-+ DEFINE(PAD_CTL_DRV_HIGH, PAD_CTL_DRV_HIGH);
-+ DEFINE(PAD_CTL_DRV_MAX, PAD_CTL_DRV_MAX);
-+ DEFINE(PAD_CTL_ODE_OPENDRAIN_NONE, PAD_CTL_ODE_OPENDRAIN_NONE);
-+ DEFINE(PAD_CTL_ODE_OPENDRAIN_ENABLE, PAD_CTL_ODE_OPENDRAIN_ENABLE);
-+ DEFINE(PAD_CTL_100K_PD, PAD_CTL_100K_PD);
-+ DEFINE(PAD_CTL_47K_PU, PAD_CTL_47K_PU);
-+ DEFINE(PAD_CTL_100K_PU, PAD_CTL_100K_PU);
-+ DEFINE(PAD_CTL_22K_PU, PAD_CTL_22K_PU);
-+ DEFINE(PAD_CTL_PUE_KEEPER, PAD_CTL_PUE_KEEPER);
-+ DEFINE(PAD_CTL_PUE_PULL, PAD_CTL_PUE_PULL);
-+ DEFINE(PAD_CTL_PUE_PULL, PAD_CTL_PUE_PULL);
-+ DEFINE(PAD_CTL_PKE_NONE, PAD_CTL_PKE_NONE);
-+ DEFINE(PAD_CTL_PKE_ENABLE, PAD_CTL_PKE_ENABLE);
-+ DEFINE(PAD_CTL_HYS_NONE, PAD_CTL_HYS_NONE);
-+ DEFINE(PAD_CTL_HYS_ENABLE, PAD_CTL_HYS_ENABLE);
-+ DEFINE(PAD_CTL_DDR_INPUT_CMOS, PAD_CTL_DDR_INPUT_CMOS);
-+ DEFINE(PAD_CTL_DDR_INPUT_DDR, PAD_CTL_DDR_INPUT_DDR);
-+ DEFINE(PAD_CTL_DRV_VOT_HIGH, PAD_CTL_DRV_VOT_HIGH);
-+ DEFINE(PAD_CTL_DRV_VOT_LOW, PAD_CTL_DRV_VOT_LOW);
-+#endif
- return 0;
- }
diff --git a/arch/arm/cpu/armv7/mx5/lowlevel_init.S b/arch/arm/cpu/armv7/mx5/lowlevel_init.S
index a40b84f..1ca9b22 100644
--- a/arch/arm/cpu/armv7/mx5/lowlevel_init.S
@@ -468,6 +301,34 @@ index 0000000..1c0bf8e
+ + (cs << 2) + ba)
+
+#endif /* __REGS_ESDCTL_H__ */
+--- uboot-custom/arch/arm/include/asm/arch-mx5/mx5x_pins.h
++++ uboot-custom/arch/arm/include/asm/arch-mx5/mx5x_pins.h
+@@ -380,6 +380,7 @@ enum {
+ /* The following are PADS used for drive strength */
+
+ MX51_PIN_CTL_GRP_DDRPKS = _MXC_BUILD_NON_GPIO_PIN(0, 0x820),
++ MX51_PIN_CTL_GRP_INDDR = _MXC_BUILD_NON_GPIO_PIN(0, 0x830),
+ MX51_PIN_CTL_GRP_PKEDDR = _MXC_BUILD_NON_GPIO_PIN(0, 0x838),
+ MX51_PIN_CTL_GRP_PKEADDR = _MXC_BUILD_NON_GPIO_PIN(0, 0x890),
+ MX51_PIN_CTL_GRP_DDRAPKS = _MXC_BUILD_NON_GPIO_PIN(0, 0x87C),
+@@ -388,6 +389,7 @@ enum {
+ MX51_PIN_CTL_GRP_HYSDDR0 = _MXC_BUILD_NON_GPIO_PIN(0, 0x85C),
+ MX51_PIN_CTL_GRP_HYSDDR1 = _MXC_BUILD_NON_GPIO_PIN(0, 0x864),
+ MX51_PIN_CTL_GRP_HYSDDR2 = _MXC_BUILD_NON_GPIO_PIN(0, 0x86C),
++ MX51_PIN_CTL_GRP_HVDDR = _MXC_BUILD_NON_GPIO_PIN(0, 0x870),
+ MX51_PIN_CTL_GRP_HYSDDR3 = _MXC_BUILD_NON_GPIO_PIN(0, 0x874),
+ MX51_PIN_CTL_GRP_DDR_SR_B0 = _MXC_BUILD_NON_GPIO_PIN(0, 0x878),
+ MX51_PIN_CTL_GRP_DDR_SR_B1 = _MXC_BUILD_NON_GPIO_PIN(0, 0x880),
+@@ -420,6 +422,9 @@ enum {
+ MX51_PIN_CTL_DRAM_DQM1 = _MXC_BUILD_NON_GPIO_PIN(0, 0x4D8),
+ MX51_PIN_CTL_DRAM_DQM2 = _MXC_BUILD_NON_GPIO_PIN(0, 0x4DC),
+ MX51_PIN_CTL_DRAM_DQM3 = _MXC_BUILD_NON_GPIO_PIN(0, 0x4E0),
++ MX51_PIN_CTL_PAD_EIM_SDBA2 = _MXC_BUILD_NON_GPIO_PIN(0, 0x508),
++ MX51_PIN_CTL_PAD_EIM_SDODT1 = _MXC_BUILD_NON_GPIO_PIN(0, 0x50C),
++ MX51_PIN_CTL_PAD_EIM_SDODT0 = _MXC_BUILD_NON_GPIO_PIN(0, 0x510),
+ };
+
+ enum {
--
1.7.2.5
diff --git a/patches/u-boot/2013.04/401-apf51.patch b/patches/u-boot/2013.04/401-apf51.patch
index 7fa9920..fe88a12 100644
--- a/patches/u-boot/2013.04/401-apf51.patch
+++ b/patches/u-boot/2013.04/401-apf51.patch
@@ -67,7 +67,7 @@ new file mode 100644
index 0000000..8ff1381
--- /dev/null
+++ b/board/armadeus/apf51/apf51.c
-@@ -0,0 +1,1184 @@
+@@ -0,0 +1,1168 @@
+/*
+ * (C) Copyright 2010-2013 Eric Jarrige, Armadeus Project
+ *
@@ -93,11 +93,7 @@ index 0000000..8ff1381
+#include <common.h>
+#include <command.h>
+#include <asm/armv7.h>
-+#include <asm/io.h>
-+#include <asm/arch/imx-regs.h>
-+#include <generated/asm-offsets.h>
+#include <asm/arch/crm_regs.h>
-+#include <asm/arch/mx5x_pins.h>
+#include <asm/arch/iomux.h>
+#include <asm/arch/regs_esdctl.h>
+#include <asm/arch/sys_proto.h>
@@ -105,7 +101,6 @@ index 0000000..8ff1381
+#include <asm/errno.h>
+#include <i2c.h>
+#include <jffs2/jffs2.h>
-+#include <asm/arch/mxc_nand.h>
+#include "fpga.h"
+#include <nand.h>
+
@@ -643,9 +638,6 @@ index 0000000..8ff1381
+
+ mxc_request_iomux(MX51_PIN_NANDF_D7, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX51_PIN_NANDF_D7, NAND_PAD100K_CFG);
-+
-+ writel(0, NFC_IPC);
-+ NFC_SET_FW(1);
+}
+
+void setup_spi_io(void)
@@ -1104,28 +1096,24 @@ index 0000000..8ff1381
+ printf(dcd_item, i++, 4, IOMUXC_BASE_ADDR + PAD_I_START +
+ PIN_TO_IOMUX_PAD(MX51_PIN_CTL_DRAM_DQM3),
+ ACFG_IOMUX_PAD_DRAM_DQM3);
-+/*
+ printf(dcd_item, i++, 4, IOMUXC_BASE_ADDR + PAD_I_START +
-+ PIN_TO_IOMUX_PAD(MX51_PIN_CTL_EIM_SDBA2),
++ PIN_TO_IOMUX_PAD(MX51_PIN_CTL_PAD_EIM_SDBA2),
+ ACFG_IOMUX_PAD_EIM_SDBA2);
+ printf(dcd_item, i++, 4, IOMUXC_BASE_ADDR + PAD_I_START +
-+ PIN_TO_IOMUX_PAD(MX51_PIN_CTL_EIM_SDODT1),
++ PIN_TO_IOMUX_PAD(MX51_PIN_CTL_PAD_EIM_SDODT1),
+ ACFG_IOMUX_PAD_EIM_SDODT1);
+ printf(dcd_item, i++, 4, IOMUXC_BASE_ADDR + PAD_I_START +
-+ PIN_TO_IOMUX_PAD(MX51_PIN_CTL_EIM_SDODT0),
++ PIN_TO_IOMUX_PAD(MX51_PIN_CTL_PAD_EIM_SDODT0),
+ ACFG_IOMUX_PAD_EIM_SDODT0);
-+*/
+ printf(dcd_item, i++, 4, IOMUXC_BASE_ADDR + PAD_I_START +
+ PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_DDRPKS),
+ ACFG_IOMUX_GRP_DDRPKS);
+ printf(dcd_item, i++, 4, IOMUXC_BASE_ADDR + PAD_I_START +
+ PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_DRAM_B4),
+ ACFG_IOMUX_GRP_DRAM_B4);
-+/*
+ printf(dcd_item, i++, 4, IOMUXC_BASE_ADDR + PAD_I_START +
+ PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_INDDR),
+ ACFG_IOMUX_GRP_INDDR);
-+*/
+ printf(dcd_item, i++, 4, IOMUXC_BASE_ADDR + PAD_I_START +
+ PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_PKEDDR),
+ ACFG_IOMUX_GRP_PKEDDR);
@@ -1135,7 +1123,6 @@ index 0000000..8ff1381
+ printf(dcd_item, i++, 4, IOMUXC_BASE_ADDR + PAD_I_START +
+ PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_DDR_A1),
+ ACFG_IOMUX_GRP_DDR_A1);
-+/*
+ printf(dcd_item, i++, 4, IOMUXC_BASE_ADDR + PAD_I_START +
+ PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_DDRAPUS),
+ ACFG_IOMUX_GRP_DDRAPUS);
@@ -1154,7 +1141,6 @@ index 0000000..8ff1381
+ printf(dcd_item, i++, 4, IOMUXC_BASE_ADDR + PAD_I_START +
+ PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_HYSDDR3),
+ ACFG_IOMUX_GRP_HYSDDR3);
-+*/
+ printf(dcd_item, i++, 4, IOMUXC_BASE_ADDR + PAD_I_START +
+ PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_DDR_SR_B0),
+ ACFG_IOMUX_GRP_DDR_SR_B0);
@@ -1176,11 +1162,9 @@ index 0000000..8ff1381
+ printf(dcd_item, i++, 4, IOMUXC_BASE_ADDR + PAD_I_START +
+ PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_DDR_SR_B4),
+ ACFG_IOMUX_GRP_DDR_SR_B4);
-+/*
+ printf(dcd_item, i++, 4, IOMUXC_BASE_ADDR + PAD_I_START +
+ PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_INMODE1),
+ ACFG_IOMUX_GRP_INMODE1);
-+*/
+ printf(dcd_item, i++, 4, IOMUXC_BASE_ADDR + PAD_I_START +
+ PIN_TO_IOMUX_PAD(MX51_PIN_CTL_GRP_DRAM_B0),
+ ACFG_IOMUX_GRP_DRAM_B0);
diff --git a/patches/u-boot/2013.04/420-apf51-nand-spl-NG.patch b/patches/u-boot/2013.04/420-apf51-nand-spl-NG.patch
index 81e05dd..805f50d 100644
--- a/patches/u-boot/2013.04/420-apf51-nand-spl-NG.patch
+++ b/patches/u-boot/2013.04/420-apf51-nand-spl-NG.patch
@@ -61,7 +61,7 @@ Signed-off-by: Eric Jarrige <eri...@ar...>
+#endif
--- uboot-custom/board/armadeus/apf51/apf51_spl.c
+++ uboot-custom/board/armadeus/apf51/apf51_spl.c
-@@ -0,0 +1,208 @@
+@@ -0,0 +1,197 @@
+/*
+ * (C) Copyright 2013 ej / Armadeus Project <eri...@ar...>
+ *
@@ -88,10 +88,7 @@ Signed-off-by: Eric Jarrige <eri...@ar...>
+#include <config.h>
+#include <spl.h>
+#include <nand.h>
-+#include <asm/io.h>
-+#include <asm/arch/imx-regs.h>
+#include <asm/arch/iomux.h>
-+#include <asm/arch/mx5x_pins.h>
+#include <asm/arch/regs_esdctl.h>
+
+/* Pointer to as well as the global data structure for SPL */
@@ -118,27 +115,21 @@ Signed-off-by: Eric Jarrige <eri...@ar...>
+ mxc_iomux_set_pad(MX51_PIN_CTL_DRAM_DQM1, ACFG_IOMUX_PAD_DRAM_DQM1);
+ mxc_iomux_set_pad(MX51_PIN_CTL_DRAM_DQM2, ACFG_IOMUX_PAD_DRAM_DQM2);
+ mxc_iomux_set_pad(MX51_PIN_CTL_DRAM_DQM3, ACFG_IOMUX_PAD_DRAM_DQM3);
-+/*
+ mxc_iomux_set_pad(MX51_PIN_CTL_PAD_EIM_SDBA2, ACFG_IOMUX_PAD_EIM_SDBA2);
-+ mxc_iomux_set_pad(MX51_PIN_CTL_PAD_EIM_SDODT0, ACFG_IOMUX_PAD_EIM_SDODT1);
++ mxc_iomux_set_pad(MX51_PIN_CTL_PAD_EIM_SDODT1, ACFG_IOMUX_PAD_EIM_SDODT1);
+ mxc_iomux_set_pad(MX51_PIN_CTL_PAD_EIM_SDODT0, ACFG_IOMUX_PAD_EIM_SDODT0);
-+*/
+ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DDRPKS, ACFG_IOMUX_GRP_DDRPKS);
+ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DRAM_B4, ACFG_IOMUX_GRP_DRAM_B4);
-+/*
+ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_INDDR, ACFG_IOMUX_GRP_INDDR);
-+*/
+ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_PKEDDR, ACFG_IOMUX_GRP_PKEDDR);
+ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DDR_A0, ACFG_IOMUX_GRP_DDR_A0);
+ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DDR_A1, ACFG_IOMUX_GRP_DDR_A1);
-+/*
+ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DDRAPUS, ACFG_IOMUX_GRP_DDRAPUS);
+ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_HYSDDR0, ACFG_IOMUX_GRP_HYSDDR0);
+ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_HYSDDR1, ACFG_IOMUX_GRP_HYSDDR1);
+ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_HYSDDR2, ACFG_IOMUX_GRP_HYSDDR2);
+ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_HVDDR, ACFG_IOMUX_GRP_HVDDR);
+ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_HYSDDR3, ACFG_IOMUX_GRP_HYSDDR3);
-+*/
+ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DDR_SR_B0, ACFG_IOMUX_GRP_DDR_SR_B0);
+ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DDRAPKS, ACFG_IOMUX_GRP_DDRAPKS);
+ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DDR_SR_B1, ACFG_IOMUX_GRP_DDR_SR_B1);
@@ -146,9 +137,7 @@ Signed-off-by: Eric Jarrige <eri...@ar...>
+ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DDR_SR_B2, ACFG_IOMUX_GRP_DDR_SR_B2);
+ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_PKEADDR, ACFG_IOMUX_GRP_PKEADDR);
+ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DDR_SR_B4, ACFG_IOMUX_GRP_DDR_SR_B4);
-+/*
+ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_INMODE1, ACFG_IOMUX_GRP_INMODE1);
-+*/
+ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DRAM_B0, ACFG_IOMUX_GRP_DRAM_B0);
+ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DRAM_B1, ACFG_IOMUX_GRP_DRAM_B1);
+ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DDR_SR_A0, ACFG_IOMUX_GRP_DDR_SR_A0);
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2013-07-23 21:27:11
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via d489f3a63438b1f83a85205ad9ead40faedadafc (commit)
from 63835213cd853f6ba0ca56d708a648d2dae6fb06 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit d489f3a63438b1f83a85205ad9ead40faedadafc
Author: Eric Jarrige <eri...@ar...>
Date: Tue Jul 23 23:37:29 2013 +0200
[UBOOT] 2013.04: apf51: patch clean-up
-----------------------------------------------------------------------
Summary of changes:
patches/u-boot/2013.04/403-apf51-wdog.patch | 29 -
patches/u-boot/2013.04/407-imx51-nand.patch | 1398 -----------------------
patches/u-boot/2013.04/409-apf51-nand-spl.patch | 407 -------
3 files changed, 0 insertions(+), 1834 deletions(-)
delete mode 100644 patches/u-boot/2013.04/403-apf51-wdog.patch
delete mode 100644 patches/u-boot/2013.04/407-imx51-nand.patch
delete mode 100644 patches/u-boot/2013.04/409-apf51-nand-spl.patch
diff --git a/patches/u-boot/2013.04/403-apf51-wdog.patch b/patches/u-boot/2013.04/403-apf51-wdog.patch
deleted file mode 100644
index 6c33620..0000000
--- a/patches/u-boot/2013.04/403-apf51-wdog.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-Signed-off-by: Eric Jarrige <eri...@ar...>
-Signed-off-by: Philippe Reynes <tr...@ya...>
----
- arch/arm/include/asm/arch-mx5/imx-regs.h | 9 +++++++++
- 1 files changed, 9 insertions(+), 0 deletions(-)
-
-diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h
-index 520bf98..063979e 100644
---- a/arch/arm/include/asm/arch-mx5/imx-regs.h
-+++ b/arch/arm/include/asm/arch-mx5/imx-regs.h
-@@ -523,6 +523,15 @@ struct fuse_bank1_regs {
- u32 fuse15_31[0x11];
- };
-
-+/* WDOG registers */
-+struct wdog_regs {
-+ u16 wcr;
-+ u16 wsr;
-+ u16 wrsr;
-+ u16 wicr;
-+ u16 wmcr;
-+};
-+
- #endif /* __ASSEMBLER__*/
-
- #endif /* __ASM_ARCH_MX5_IMX_REGS_H__ */
---
-1.7.2.5
-
diff --git a/patches/u-boot/2013.04/407-imx51-nand.patch b/patches/u-boot/2013.04/407-imx51-nand.patch
deleted file mode 100644
index 3e30571..0000000
--- a/patches/u-boot/2013.04/407-imx51-nand.patch
+++ /dev/null
@@ -1,1398 +0,0 @@
-Signed-off-by: Eric Jarrige <eri...@ar...>
-Signed-off-by: Philippe Reynes <tr...@ya...>
----
- arch/arm/include/asm/arch-mx5/mxc_nand.h | 369 +++++++++++
- drivers/mtd/nand/Makefile | 1 +
- drivers/mtd/nand/mx51_nand.c | 992 ++++++++++++++++++++++++++++++
- 3 files changed, 1362 insertions(+), 0 deletions(-)
- create mode 100644 arch/arm/include/asm/arch-mx5/mxc_nand.h
- create mode 100644 drivers/mtd/nand/mx51_nand.c
-
-diff --git a/arch/arm/include/asm/arch-mx5/mxc_nand.h b/arch/arm/include/asm/arch-mx5/mxc_nand.h
-new file mode 100644
-index 0000000..77e54aa
---- /dev/null
-+++ b/arch/arm/include/asm/arch-mx5/mxc_nand.h
-@@ -0,0 +1,369 @@
-+/*
-+ * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
-+ */
-+
-+/*
-+ * The code contained herein is licensed under the GNU General Public
-+ * License. You may obtain a copy of the GNU General Public License
-+ * Version 2 or later at the following locations:
-+ *
-+ * http://www.opensource.org/licenses/gpl-license.html
-+ * http://www.gnu.org/copyleft/gpl.html
-+ */
-+
-+/*!
-+ * @file mxc_nand.h
-+ *
-+ * @brief This file contains the NAND Flash Controller register information.
-+ *
-+ *
-+ * @ingroup NAND_MTD
-+ */
-+
-+#ifndef __MXC_NAND_H__
-+#define __MXC_NAND_H__
-+
-+#include <asm/arch/imx-regs.h>
-+
-+#define IS_2K_PAGE_NAND ((mtd->writesize / info->num_of_intlv) \
-+ == NAND_PAGESIZE_2KB)
-+#define IS_4K_PAGE_NAND ((mtd->writesize / info->num_of_intlv) \
-+ == NAND_PAGESIZE_4KB)
-+#define IS_LARGE_PAGE_NAND ((mtd->writesize / info->num_of_intlv) > 512)
-+
-+#define GET_NAND_OOB_SIZE (mtd->oobsize / info->num_of_intlv)
-+
-+#define NAND_PAGESIZE_2KB 2048
-+#define NAND_PAGESIZE_4KB 4096
-+
-+#define NFC_AXI_BASE_ADDR NFC_BASE_ADDR_AXI
-+#define NFC_IP_BASE_ADDR NFC_BASE_ADDR
-+#define MXC_INT_NANDFC MXC_INT_NFC
-+#define CONFIG_MXC_NFC_SP_AUTO
-+#define NFC_FLASH_CMD (NFC_AXI_BASE_ADDR + 0x1E00)
-+#define NFC_FLASH_ADDR0 (NFC_AXI_BASE_ADDR + 0x1E04)
-+#define NFC_FLASH_ADDR8 (NFC_AXI_BASE_ADDR + 0x1E24)
-+#define NFC_CONFIG1 (NFC_AXI_BASE_ADDR + 0x1E34)
-+#define NFC_ECC_STATUS_RESULT (NFC_AXI_BASE_ADDR + 0x1E38)
-+#define NFC_ECC_STATUS_SUM (NFC_AXI_BASE_ADDR + 0x1E3C)
-+#define LAUNCH_NFC (NFC_AXI_BASE_ADDR + 0x1E40)
-+#define NFC_WRPROT (NFC_IP_BASE_ADDR + 0x00)
-+#define NFC_WRPROT_UNLOCK_BLK_ADD0 (NFC_IP_BASE_ADDR + 0x04)
-+#define NFC_CONFIG2 (NFC_IP_BASE_ADDR + 0x24)
-+#define NFC_CONFIG3 (NFC_IP_BASE_ADDR + 0x28)
-+#define NFC_IPC (NFC_IP_BASE_ADDR + 0x2C)
-+
-+/*!
-+ * Addresses for NFC RAM BUFFER Main area 0
-+ */
-+#define MAIN_AREA0 ((u16 *)(NFC_AXI_BASE_ADDR + 0x000))
-+#define MAIN_AREA1 ((u16 *)(NFC_AXI_BASE_ADDR + 0x200))
-+
-+/*!
-+ * Addresses for NFC SPARE BUFFER Spare area 0
-+ */
-+#define SPARE_AREA0 ((u16 *)(NFC_AXI_BASE_ADDR + 0x1000))
-+#define SPARE_LEN 64
-+#define SPARE_COUNT 8
-+#define SPARE_SIZE (SPARE_LEN * SPARE_COUNT)
-+
-+#define NFC_SPAS_WIDTH 8
-+#define NFC_SPAS_SHIFT 16
-+
-+#define IS_4BIT_ECC \
-+( \
-+ is_soc_rev(CHIP_REV_2_0) >= 0 ? \
-+ !((raw_read(NFC_CONFIG2) & NFC_ECC_MODE_4) >> 6) : \
-+ ((raw_read(NFC_CONFIG2) & NFC_ECC_MODE_4) >> 6) \
-+)
-+
-+#define NFC_SET_SPAS(v) \
-+ raw_write((((raw_read(NFC_CONFIG2) & \
-+ NFC_FIELD_RESET(NFC_SPAS_WIDTH, NFC_SPAS_SHIFT)) | ((v) << 16))), \
-+ NFC_CONFIG2)
-+
-+#define NFC_SET_ECC_MODE(v) \
-+do { \
-+ if (is_soc_rev(CHIP_REV_2_0) >= 0) { \
-+ if ((v) == NFC_SPAS_218 || (v) == NFC_SPAS_112) \
-+ raw_write(((raw_read(NFC_CONFIG2) & \
-+ NFC_ECC_MODE_MASK) | \
-+ NFC_ECC_MODE_4), NFC_CONFIG2); \
-+ else \
-+ raw_write(((raw_read(NFC_CONFIG2) & \
-+ NFC_ECC_MODE_MASK) & \
-+ NFC_ECC_MODE_8), NFC_CONFIG2); \
-+ } else { \
-+ if ((v) == NFC_SPAS_218 || (v) == NFC_SPAS_112) \
-+ /* set 2k page and 64bytes spare */ \
-+ raw_write(((raw_read(NFC_CONFIG2) & \
-+ NFC_ECC_MODE_MASK) & \
-+ NFC_ECC_MODE_8), NFC_CONFIG2); \
-+ else \
-+ raw_write(((raw_read(NFC_CONFIG2) & \
-+ NFC_ECC_MODE_MASK) | \
-+ NFC_ECC_MODE_4), NFC_CONFIG2); \
-+ } \
-+} while (0)
-+
-+#define WRITE_NFC_IP_REG(val, reg) \
-+ do { \
-+ writel(NFC_IPC_CREQ, NFC_IPC); \
-+ while (!((readl(NFC_IPC) & NFC_IPC_ACK)>>1)) \
-+ ; \
-+ writel(val, reg); \
-+ writel(0, NFC_IPC); \
-+ } while (0)
-+
-+#define GET_NFC_ECC_STATUS() raw_read(REG_NFC_ECC_STATUS_RESULT);
-+
-+/*!
-+ * Set 1 to specific operation bit, rest to 0 in LAUNCH_NFC Register for
-+ * Specific operation
-+ */
-+#define NFC_CMD 0x1
-+#define NFC_ADDR 0x2
-+#define NFC_INPUT 0x4
-+#define NFC_OUTPUT 0x8
-+#define NFC_ID 0x10
-+#define NFC_STATUS 0x20
-+#define NFC_AUTO_PROG 0x40
-+#define NFC_AUTO_READ 0x80
-+#define NFC_AUTO_ERASE 0x200
-+#define NFC_COPY_BACK_0 0x400
-+#define NFC_COPY_BACK_1 0x800
-+#define NFC_AUTO_STATE 0x1000
-+
-+/* Bit Definitions for NFC_IPC*/
-+#define NFC_OPS_STAT (1 << 31)
-+#define NFC_OP_DONE (1 << 30)
-+#define NFC_RB (1 << 28)
-+#define NFC_PS_WIDTH 2
-+#define NFC_PS_SHIFT 0
-+#define NFC_PS_512 0
-+#define NFC_PS_2K 1
-+#define NFC_PS_4K 2
-+
-+
-+#define NFC_ONE_CYCLE (1 << 2)
-+#define NFC_INT_MSK (1 << 15)
-+#define NFC_AUTO_PROG_DONE_MSK (1 << 14)
-+#define NFC_NUM_ADDR_PHASE1_WIDTH 2
-+#define NFC_NUM_ADDR_PHASE1_SHIFT 12
-+#define NFC_NUM_ADDR_PHASE0_WIDTH 1
-+#define NFC_NUM_ADDR_PHASE0_SHIFT 5
-+#define NFC_ONE_LESS_PHASE1 0
-+#define NFC_TWO_LESS_PHASE1 1
-+#define NFC_FLASH_ADDR_SHIFT 0
-+#define NFC_UNLOCK_END_ADDR_SHIFT 16
-+
-+/* Bit definition for NFC_CONFIGRATION_1 */
-+#define NFC_SP_EN (1 << 0)
-+#define NFC_CE (1 << 1)
-+#define NFC_RST (1 << 2)
-+#define NFC_ECC_EN (1 << 3)
-+
-+#define NFC_FIELD_RESET(width, shift) (~(((1 << (width)) - 1) << (shift)))
-+
-+#define NFC_RBA_SHIFT 4
-+#define NFC_RBA_WIDTH 3
-+
-+#define NFC_ITERATION_SHIFT 8
-+#define NFC_ITERATION_WIDTH 4
-+#define NFC_ACTIVE_CS_SHIFT 12
-+#define NFC_ACTIVE_CS_WIDTH 3
-+/* bit definition for CONFIGRATION3 */
-+#define NFC_NO_SDMA (1 << 20)
-+#define NFC_FMP_SHIFT 16
-+#define NFC_FMP_WIDTH 4
-+#define NFC_RBB_MODE (1 << 15)
-+#define NFC_NUM_OF_DEVICES_SHIFT 12
-+#define NFC_NUM_OF_DEVICES_WIDTH 4
-+#define NFC_DMA_MODE_SHIFT 11
-+#define NFC_DMA_MODE_WIDTH 1
-+#define NFC_SBB_SHIFT 8
-+#define NFC_SBB_WIDTH 3
-+#define NFC_BIG (1 << 7)
-+#define NFC_SB2R_SHIFT 4
-+#define NFC_SB2R_WIDTH 3
-+#define NFC_FW_SHIFT 3
-+#define NFC_FW_WIDTH 1
-+#define NFC_TOO (1 << 2)
-+#define NFC_ADD_OP_SHIFT 0
-+#define NFC_ADD_OP_WIDTH 2
-+#define NFC_FW_8 1
-+#define NFC_FW_16 0
-+#define NFC_ST_CMD_SHITF 24
-+#define NFC_ST_CMD_WIDTH 8
-+
-+#define NFC_PPB_32 (0 << 7)
-+#define NFC_PPB_64 (1 << 7)
-+#define NFC_PPB_128 (2 << 7)
-+#define NFC_PPB_256 (3 << 7)
-+#define NFC_PPB_RESET (~(3 << 7))
-+
-+#define NFC_BLS_LOCKED (0 << 6)
-+#define NFC_BLS_LOCKED_DEFAULT (1 << 6)
-+#define NFC_BLS_UNLCOKED (2 << 6)
-+#define NFC_BLS_RESET (~(3 << 16))
-+#define NFC_WPC_LOCK_TIGHT 1
-+#define NFC_WPC_LOCK (1 << 1)
-+#define NFC_WPC_UNLOCK (1 << 2)
-+#define NFC_WPC_RESET (~(7))
-+#define NFC_ECC_MODE_4 (1 << 6)
-+#define NFC_ECC_MODE_8 (~(1 << 6))
-+#define NFC_ECC_MODE_MASK (~(1 << 6))
-+#define NFC_SPAS_16 8
-+#define NFC_SPAS_64 32
-+#define NFC_SPAS_128 64
-+#define NFC_SPAS_112 56
-+#define NFC_SPAS_218 109
-+#define NFC_IPC_CREQ (1 << 0)
-+#define NFC_IPC_ACK (1 << 1)
-+
-+#define REG_NFC_OPS_STAT NFC_IPC
-+#define REG_NFC_INTRRUPT NFC_CONFIG2
-+#define REG_NFC_FLASH_ADDR NFC_FLASH_ADDR0
-+#define REG_NFC_FLASH_CMD NFC_FLASH_CMD
-+#define REG_NFC_OPS LAUNCH_NFC
-+#define REG_NFC_SET_RBA NFC_CONFIG1
-+#define REG_NFC_RB NFC_IPC
-+#define REG_NFC_ECC_EN NFC_CONFIG2
-+#define REG_NFC_ECC_STATUS_RESULT NFC_ECC_STATUS_RESULT
-+#define REG_NFC_CE NFC_CONFIG1
-+#define REG_NFC_RST NFC_CONFIG1
-+#define REG_NFC_PPB NFC_CONFIG2
-+#define REG_NFC_SP_EN NFC_CONFIG1
-+#define REG_NFC_BLS NFC_WRPROT
-+#define REG_UNLOCK_BLK_ADD0 NFC_WRPROT_UNLOCK_BLK_ADD0
-+#define REG_UNLOCK_BLK_ADD1 NFC_WRPROT_UNLOCK_BLK_ADD1
-+#define REG_UNLOCK_BLK_ADD2 NFC_WRPROT_UNLOCK_BLK_ADD2
-+#define REG_UNLOCK_BLK_ADD3 NFC_WRPROT_UNLOCK_BLK_ADD3
-+#define REG_NFC_WPC NFC_WRPROT
-+#define REG_NFC_ONE_CYCLE NFC_CONFIG2
-+
-+/* NFC V3 Specific MACRO functions definitions */
-+#define raw_write(v, a) __raw_writel(v, a)
-+#define raw_read(a) __raw_readl(a)
-+
-+/* Explcit ack ops status (if any), before issue of any command */
-+#define ACK_OPS \
-+ writel((readl(REG_NFC_OPS_STAT) & ~NFC_OPS_STAT), \
-+ REG_NFC_OPS_STAT);
-+
-+/* Set RBA buffer id*/
-+#define NFC_SET_RBA(val) \
-+ writel((readl(REG_NFC_SET_RBA) & \
-+ (NFC_FIELD_RESET(NFC_RBA_WIDTH, NFC_RBA_SHIFT))) | \
-+ ((val) << NFC_RBA_SHIFT), REG_NFC_SET_RBA);
-+
-+#define NFC_SET_PS(val) \
-+ raw_write((raw_read(NFC_CONFIG2) & \
-+ (NFC_FIELD_RESET(NFC_PS_WIDTH, NFC_PS_SHIFT))) | \
-+ ((val) << NFC_PS_SHIFT), NFC_CONFIG2);
-+
-+#define UNLOCK_ADDR(start_addr, end_addr) \
-+{ \
-+ int i = 0; \
-+ for (; i < NAND_MAX_CHIPS; i++) \
-+ raw_write(start_addr | \
-+ (end_addr << NFC_UNLOCK_END_ADDR_SHIFT), \
-+ REG_UNLOCK_BLK_ADD0 + (i << 2)); \
-+}
-+
-+#define NFC_SET_NFC_ACTIVE_CS(val) \
-+ raw_write((raw_read(NFC_CONFIG1) & \
-+ (NFC_FIELD_RESET(NFC_ACTIVE_CS_WIDTH, NFC_ACTIVE_CS_SHIFT))) | \
-+ ((val) << NFC_ACTIVE_CS_SHIFT), NFC_CONFIG1);
-+
-+#define NFC_GET_MAXCHIP_SP() 8
-+
-+#define NFC_SET_BLS(val) ((raw_read(REG_NFC_BLS) & NFC_BLS_RESET) | val)
-+#define NFC_SET_WPC(val) ((raw_read(REG_NFC_WPC) & NFC_WPC_RESET) | val)
-+#define CHECK_NFC_RB (raw_read(REG_NFC_RB) & NFC_RB)
-+
-+#define NFC_SET_NFC_NUM_ADDR_PHASE1(val) \
-+ raw_write((raw_read(NFC_CONFIG2) & \
-+ (NFC_FIELD_RESET(NFC_NUM_ADDR_PHASE1_WIDTH, \
-+ NFC_NUM_ADDR_PHASE1_SHIFT))) | \
-+ ((val) << NFC_NUM_ADDR_PHASE1_SHIFT), NFC_CONFIG2);
-+
-+#define NFC_SET_NFC_NUM_ADDR_PHASE0(val) \
-+ raw_write((raw_read(NFC_CONFIG2) & \
-+ (NFC_FIELD_RESET(NFC_NUM_ADDR_PHASE0_WIDTH, \
-+ NFC_NUM_ADDR_PHASE0_SHIFT))) | \
-+ ((val) << NFC_NUM_ADDR_PHASE0_SHIFT), NFC_CONFIG2);
-+
-+#define NFC_SET_NFC_ITERATION(val) \
-+ raw_write((raw_read(NFC_CONFIG1) & \
-+ (NFC_FIELD_RESET(NFC_ITERATION_WIDTH, NFC_ITERATION_SHIFT))) | \
-+ ((val) << NFC_ITERATION_SHIFT), NFC_CONFIG1);
-+
-+#define NFC_SET_FW(val) \
-+ raw_write((raw_read(NFC_CONFIG3) & \
-+ (NFC_FIELD_RESET(NFC_FW_WIDTH, NFC_FW_SHIFT))) | \
-+ ((val) << NFC_FW_SHIFT), NFC_CONFIG3);
-+
-+#define NFC_SET_NUM_OF_DEVICE(val) \
-+ raw_write((raw_read(NFC_CONFIG3) & \
-+ (NFC_FIELD_RESET(NFC_NUM_OF_DEVICES_WIDTH, \
-+ NFC_NUM_OF_DEVICES_SHIFT))) | \
-+ ((val) << NFC_NUM_OF_DEVICES_SHIFT), NFC_CONFIG3);
-+
-+#define NFC_SET_ADD_OP_MODE(val) \
-+ raw_write((raw_read(NFC_CONFIG3) & \
-+ (NFC_FIELD_RESET(NFC_ADD_OP_WIDTH, NFC_ADD_OP_SHIFT))) | \
-+ ((val) << NFC_ADD_OP_SHIFT), NFC_CONFIG3);
-+
-+#define NFC_SET_ADD_CS_MODE(val) \
-+{ \
-+ NFC_SET_ADD_OP_MODE(val); \
-+ NFC_SET_NUM_OF_DEVICE(this->numchips - 1); \
-+}
-+
-+#define NFC_SET_ST_CMD(val) \
-+ raw_write((raw_read(NFC_CONFIG2) & \
-+ (NFC_FIELD_RESET(NFC_ST_CMD_WIDTH, \
-+ NFC_ST_CMD_SHITF))) | \
-+ ((val) << NFC_ST_CMD_SHITF), NFC_CONFIG2);
-+
-+#define NFMS_NF_DWIDTH 0
-+#define NFMS_NF_PG_SZ 1
-+#define NFC_CMD_1_SHIFT 8
-+
-+#define NUM_OF_ADDR_CYCLE ((ffs(~(info->page_mask)) - 1) >> 3)
-+
-+/*should set the fw,ps,spas,ppb*/
-+#define NFC_SET_NFMS(v) \
-+do { \
-+ if (!(v)) \
-+ NFC_SET_FW(NFC_FW_8); \
-+ if (((v) & (1 << NFMS_NF_DWIDTH))) \
-+ NFC_SET_FW(NFC_FW_16); \
-+ if (((v) & (1 << NFMS_NF_PG_SZ))) { \
-+ if (IS_2K_PAGE_NAND) { \
-+ NFC_SET_PS(NFC_PS_2K); \
-+ NFC_SET_NFC_NUM_ADDR_PHASE1(NUM_OF_ADDR_CYCLE); \
-+ NFC_SET_NFC_NUM_ADDR_PHASE0(NFC_TWO_LESS_PHASE1); \
-+ } else if (IS_4K_PAGE_NAND) { \
-+ NFC_SET_PS(NFC_PS_4K); \
-+ NFC_SET_NFC_NUM_ADDR_PHASE1(NUM_OF_ADDR_CYCLE); \
-+ NFC_SET_NFC_NUM_ADDR_PHASE0(NFC_TWO_LESS_PHASE1); \
-+ } else { \
-+ NFC_SET_PS(NFC_PS_512); \
-+ NFC_SET_NFC_NUM_ADDR_PHASE1(NUM_OF_ADDR_CYCLE - 1); \
-+ NFC_SET_NFC_NUM_ADDR_PHASE0(NFC_ONE_LESS_PHASE1); \
-+ } \
-+ NFC_SET_ADD_CS_MODE(1); \
-+ NFC_SET_SPAS(GET_NAND_OOB_SIZE >> 1); \
-+ NFC_SET_ECC_MODE(GET_NAND_OOB_SIZE >> 1); \
-+ NFC_SET_ST_CMD(0x70); \
-+ raw_write(raw_read(NFC_CONFIG3) | NFC_NO_SDMA, NFC_CONFIG3); \
-+ raw_write(raw_read(NFC_CONFIG3) | NFC_RBB_MODE, NFC_CONFIG3); \
-+ } \
-+} while (0)
-+
-+#define READ_PAGE() send_read_page(0)
-+#define PROG_PAGE() send_prog_page(0)
-+
-+#endif /* __MXC_NAND_H__ */
-diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
-index beb99ca..3af02c6 100644
---- a/drivers/mtd/nand/Makefile
-+++ b/drivers/mtd/nand/Makefile
-@@ -69,6 +69,7 @@ COBJS-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o
- COBJS-$(CONFIG_NAND_KMETER1) += kmeter1_nand.o
- COBJS-$(CONFIG_NAND_MPC5121_NFC) += mpc5121_nfc.o
- COBJS-$(CONFIG_NAND_MXC) += mxc_nand.o
-+COBJS-$(CONFIG_NAND_MXC_V2) += mx51_nand.o
- COBJS-$(CONFIG_NAND_MXS) += mxs_nand.o
- COBJS-$(CONFIG_NAND_NDFC) += ndfc.o
- COBJS-$(CONFIG_NAND_NOMADIK) += nomadik.o
-diff --git a/drivers/mtd/nand/mx51_nand.c b/drivers/mtd/nand/mx51_nand.c
-new file mode 100644
-index 0000000..2e20e64
---- /dev/null
-+++ b/drivers/mtd/nand/mx51_nand.c
-@@ -0,0 +1,992 @@
-+/*
-+ * Copyright (C) 2010 Eric Jarrige <jo...@ar...>
-+ * Copyright 2004-2007 Freescale Semiconductor, Inc.
-+ * Copyright 2008 Sascha Hauer, ke...@pe...
-+ * Copyright 2009 Ilya Yanok, <ya...@em...>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version 2
-+ * of the License, or (at your option) any later version.
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
-+ * MA 02110-1301, USA.
-+ */
-+
-+#include <common.h>
-+#include <nand.h>
-+#include <linux/err.h>
-+#include <asm/io.h>
-+#include <asm/arch/imx-regs.h>
-+#include <asm/arch/mxc_nand.h>
-+
-+#define DRIVER_NAME "mxc_nand"
-+
-+
-+#ifdef CONFIG_CMD_NAND_LOCK_UNLOCK
-+/******************************************************************************
-+ * Support for locking / unlocking feature of imx NFC controller
-+ *****************************************************************************/
-+
-+#define NAND_CMD_LOCK 0x2a
-+#define NAND_CMD_LOCK_TIGHT 0x2c
-+#define NAND_CMD_UNLOCK1 0x23
-+#define NAND_CMD_UNLOCK2 0x24
-+#define NAND_CMD_LOCK_STATUS 0x7a
-+
-+/* NFC_WRPROT Control Register Bit Fields */
-+#define NFC_WRPROT_UNLOCKBLK (4<<0) /* unlock block according to */
-+ /* the given address range */
-+#define NFC_WRPROT_LOCKALL (2<<0) /* lock all */
-+#define NFC_WRPROT_LOCKTIGHT (1<<0) /* lock-tight locked blocks */
-+/* NFC_WRPR_STAT Status Register Bit Fields */
-+#define NFC_WRPR_US (1<<2) /* Unlocked status */
-+#define NFC_WRPR_LS (1<<1) /* Locked status */
-+#define NFC_WRPR_LTS (1<<0) /* Lock-tight Status */
-+
-+#endif
-+
-+#define NAND_MXC_NR_BUFS 8
-+#define NAND_MXC_SPARE_BUF_SIZE 64
-+#define NAND_MXC_REG_OFFSET 0x1e00
-+
-+struct nfc_regs {
-+ uint8_t main_area[NAND_MXC_NR_BUFS][0x200];
-+ uint8_t spare_area[NAND_MXC_NR_BUFS][NAND_MXC_SPARE_BUF_SIZE];
-+ /*
-+ * reserved size is offset of nfc registers
-+ * minus total main and spare sizes
-+ */
-+ uint8_t reserved1[NAND_MXC_REG_OFFSET
-+ - NAND_MXC_NR_BUFS * (512 + NAND_MXC_SPARE_BUF_SIZE)];
-+ uint32_t nfc_flash_cmd;
-+ uint32_t nfc_flash_addr;
-+ uint32_t nfc_flash_addr1;
-+ uint32_t nfc_flash_addr2;
-+ uint32_t nfc_flash_addr3;
-+ uint32_t nfc_flash_addr4;
-+ uint32_t nfc_flash_addr5;
-+ uint32_t nfc_flash_addr6;
-+ uint32_t nfc_flash_addr7;
-+ uint32_t nfc_flash_addr8;
-+ uint32_t nfc_flash_addr9;
-+ uint32_t nfc_flash_addr10;
-+ uint32_t nfc_flash_addr11;
-+ uint32_t nfc_config;
-+ uint32_t nfc_ecc_status_result;
-+ uint32_t nfc_status_sum;
-+ uint32_t nfc_launch;
-+};
-+
-+/*
-+ * Set INT to 0, FCMD to 1, rest to 0 in NFC_CONFIG2 Register
-+ * for Command operation
-+ */
-+#define NFC_CMD 0x1
-+
-+/*
-+ * Set INT to 0, FADD to 1, rest to 0 in NFC_CONFIG2 Register
-+ * for Address operation
-+ */
-+#define NFC_ADDR 0x2
-+
-+/*
-+ * Set INT to 0, FDI to 1, rest to 0 in NFC_CONFIG2 Register
-+ * for Input operation
-+ */
-+#define NFC_INPUT 0x4
-+
-+/*
-+ * Set INT to 0, FDO to 001, rest to 0 in NFC_CONFIG2 Register
-+ * for Data Output operation
-+ */
-+#define NFC_OUTPUT 0x8
-+
-+/*
-+ * Set INT to 0, FD0 to 010, rest to 0 in NFC_CONFIG2 Register
-+ * for Read ID operation
-+ */
-+#define NFC_ID 0x10
-+
-+/*
-+ * Set INT to 0, FDO to 100, rest to 0 in NFC_CONFIG2 Register
-+ * for Read Status operation
-+ */
-+#define NFC_STATUS 0x20
-+
-+#define NFC_AUTO_PROG 0x40
-+#define NFC_AUTO_READ 0x80
-+#define NFC_AUTO_ERASE 0x200
-+#define NFC_COPY_BACK_0 0x400
-+#define NFC_COPY_BACK_1 0x800
-+#define NFC_AUTO_STATE 0x1000
-+
-+#define NFC_4_8N_ECC 0
-+
-+/*typedef enum {false, true} bool;*/
-+
-+struct mxc_nand_host {
-+ struct mtd_info mtd;
-+ struct nand_chip *nand;
-+
-+ struct nfc_regs __iomem *regs;
-+ int spare_only;
-+ int status_request;
-+ int pagesize_2k;
-+ int clk_act;
-+ uint16_t col_addr;
-+ unsigned int page_addr;
-+};
-+
-+static struct mxc_nand_host mxc_host;
-+static struct mxc_nand_host *host = &mxc_host;
-+
-+/* Define delays in microsec for NAND device operations */
-+#define TROP_US_DELAY 2000
-+/* Macros to get byte and bit positions of ECC */
-+#define COLPOS(x) ((x) >> 3)
-+#define BITPOS(x) ((x) & 0xf)
-+
-+/* Define single bit Error positions in Main & Spare area */
-+#define MAIN_SINGLEBIT_ERROR 0x4
-+#define SPARE_SINGLEBIT_ERROR 0x1
-+
-+
-+static struct nand_ecclayout nand_hw_eccoob2k = {
-+ .eccbytes = 4 * 8,
-+ .eccpos = {
-+ 8, 9, 10, 11, 12, 13, 14, 15,
-+ 72, 73, 74, 75, 76, 77, 78, 79,
-+ 136, 137, 138, 139, 140, 141, 142, 143,
-+ 200, 201, 202, 203, 204, 205, 206, 207
-+ },
-+ .oobfree = {
-+ {.offset = 2, .length = 4},
-+ {.offset = 16, .length = 56},
-+ {.offset = 80, .length = 56},
-+ {.offset = 144, .length = 56},
-+ {.offset = 208, .length = 48}
-+ },
-+};
-+
-+
-+/* Generic flash bbt decriptors
-+*/
-+static uint8_t bbt_pattern[] = {'B', 'b', 't', '0' };
-+static uint8_t mirror_pattern[] = {'1', 't', 'b', 'B' };
-+
-+static struct nand_bbt_descr bbt_main_descr = {
-+ .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
-+ | NAND_BBT_4BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
-+ .offs = 2,
-+ .len = 4,
-+ .veroffs = 6,
-+ .maxblocks = 4,
-+ .pattern = bbt_pattern
-+};
-+
-+static struct nand_bbt_descr bbt_mirror_descr = {
-+ .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
-+ | NAND_BBT_4BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
-+ .offs = 2,
-+ .len = 4,
-+ .veroffs = 6,
-+ .maxblocks = 4,
-+ .pattern = mirror_pattern
-+};
-+
-+
-+
-+static uint32_t *mxc_nand_memcpy32(uint32_t *dest, uint32_t *source,
-+ size_t size)
-+{
-+ uint32_t *d = dest;
-+
-+ size >>= 2;
-+ while (size--)
-+ __raw_writel(__raw_readl(source++), d++);
-+ return dest;
-+}
-+
-+/*
-+ * This function polls the NANDFC to wait for the basic operation to
-+ * complete by checking the INT bit of config2 register.
-+ */
-+static void wait_op_done(struct mxc_nand_host *host, int max_retries,
-+ uint16_t param)
-+{
-+ while (/*max_retries-- > 0*/1) {
-+ if (readl(NFC_IPC) & NFC_OPS_STAT) {
-+ WRITE_NFC_IP_REG((readl(NFC_IPC) &
-+ ~NFC_OPS_STAT),
-+ NFC_IPC);
-+ break;
-+ }
-+ udelay(1);
-+ }
-+ if (max_retries < 0) {
-+ MTDDEBUG(MTD_DEBUG_LEVEL0, "%s(%d): INT not set\n",
-+ __func__, param);
-+ }
-+}
-+
-+/*
-+ * This function issues the specified command to the NAND device and
-+ * waits for completion.
-+ */
-+static void send_cmd(struct mxc_nand_host *host, uint16_t cmd)
-+{
-+ MTDDEBUG(MTD_DEBUG_LEVEL3, "send_cmd(host, 0x%x)\n", cmd);
-+ /* fill command */
-+ writel(cmd, REG_NFC_FLASH_CMD);
-+
-+ /* clear status */
-+ ACK_OPS;
-+
-+ /* send out command */
-+ writel(NFC_CMD, REG_NFC_OPS);
-+
-+ /* Wait for operation to complete */
-+ wait_op_done(host, TROP_US_DELAY, cmd);
-+}
-+
-+/*
-+ * This function sends an address (or partial address) to the
-+ * NAND device. The address is used to select the source/destination for
-+ * a NAND command.
-+ */
-+static void send_addr(struct mxc_nand_host *host, uint16_t addr)
-+{
-+ MTDDEBUG(MTD_DEBUG_LEVEL3, "send_addr(host, 0x%x)\n", addr);
-+
-+ /* fill address */
-+ writel((addr << NFC_FLASH_ADDR_SHIFT), REG_NFC_FLASH_ADDR);
-+
-+ /* clear status */
-+ ACK_OPS;
-+
-+ /* send out address */
-+ writel(NFC_ADDR, REG_NFC_OPS);
-+
-+ /* Wait for operation to complete */
-+ wait_op_done(host, TROP_US_DELAY, addr);
-+}
-+
-+/*
-+ * This function requests the NANDFC to initate the transfer
-+ * of data currently in the NANDFC RAM buffer to the NAND device.
-+ */
-+static void send_prog_page(struct mxc_nand_host *host, uint8_t buf_id,
-+ int spare_only)
-+{
-+ if (spare_only)
-+ MTDDEBUG(MTD_DEBUG_LEVEL1, "send_prog_page (%d)\n", spare_only);
-+
-+ /* set ram buffer id */
-+ NFC_SET_RBA(buf_id);
-+
-+ /* clear status */
-+ ACK_OPS;
-+
-+ /* transfer data from NFC ram to nand */
-+ writel(NFC_INPUT, REG_NFC_OPS);
-+
-+ /* Wait for operation to complete */
-+ wait_op_done(host, TROP_US_DELAY, spare_only);
-+}
-+
-+/*
-+ * Requests NANDFC to initated the transfer of data from the
-+ * NAND device into in the NANDFC ram buffer.
-+ */
-+static void send_read_page(struct mxc_nand_host *host, uint8_t buf_id,
-+ int spare_only)
-+{
-+ MTDDEBUG(MTD_DEBUG_LEVEL3, "send_read_page (%d)\n", spare_only);
-+
-+ /* set ram buffer id */
-+ NFC_SET_RBA(buf_id);
-+
-+ /* clear status */
-+ ACK_OPS;
-+
-+ /* transfer data from nand to NFC ram */
-+ writel(NFC_OUTPUT, REG_NFC_OPS);
-+
-+ /* Wait for operation to complete */
-+ wait_op_done(host, TROP_US_DELAY, spare_only);
-+}
-+
-+/* Request the NANDFC to perform a read of the NAND device ID. */
-+static void send_read_id(struct mxc_nand_host *host)
-+{
-+ /* Set RBA bits for BUFFER0 */
-+ NFC_SET_RBA(0);
-+
-+ /* clear status */
-+ ACK_OPS;
-+
-+ /* Read ID into main buffer */
-+ writel(NFC_ID, REG_NFC_OPS);
-+
-+ /* Wait for operation to complete */
-+ wait_op_done(host, TROP_US_DELAY, 0);
-+}
-+
-+/*
-+ * This function requests the NANDFC to perform a read of the
-+ * NAND device status and returns the current status.
-+ */
-+static uint16_t get_dev_status(struct mxc_nand_host *host)
-+{
-+ uint16_t ret;
-+
-+ /* clear status */
-+ ACK_OPS;
-+
-+ /* Read status into main buffer */
-+ writel(NFC_STATUS, REG_NFC_OPS);
-+
-+ /* Wait for operation to complete */
-+ wait_op_done(host, TROP_US_DELAY, 0);
-+
-+ ret = (readl(&host->regs->nfc_config) >> 16) & 0xff;
-+
-+ return ret;
-+}
-+
-+/* This function is used by upper layer to checks if device is ready */
-+static int mxc_nand_dev_ready(struct mtd_info *mtd)
-+{
-+ /*
-+ * NFC handles R/B internally. Therefore, this function
-+ * always returns status as ready.
-+ */
-+ return 1;
-+}
-+
-+static void mxc_nand_enable_hwecc(struct mtd_info *mtd, int mode)
-+{
-+ /*
-+ * If HW ECC is enabled, we turn it on during init. There is
-+ * no need to enable again here.
-+ */
-+}
-+
-+static int mxc_nand_correct_data(struct mtd_info *mtd, u_char *dat,
-+ u_char *read_ecc, u_char *calc_ecc)
-+{
-+ struct nand_chip *nand_chip = mtd->priv;
-+ struct mxc_nand_host *host = nand_chip->priv;
-+
-+ /*
-+ * 4-Bit errors are automatically corrected in HW. No need for
-+ * additional correction. 5-Bit errors cannot be corrected by
-+ * HW ECC, so we need to return failure
-+ */
-+ uint32_t ecc_sum_status = readl(&host->regs->nfc_status_sum) >> 8;
-+
-+ if (ecc_sum_status) {
-+ MTDDEBUG(MTD_DEBUG_LEVEL0,
-+ "MXC_NAND: HWECC uncorrectable 2-bit ECC error\n");
-+ return -1;
-+ }
-+
-+ return 0;
-+}
-+
-+static int mxc_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
-+ u_char *ecc_code)
-+{
-+ /*
-+ * Just return success. HW ECC does not read/write the NFC spare
-+ * buffer. Only the FLASH spare area contains the calcuated ECC.
-+ */
-+ struct nand_chip *this = mtd->priv;
-+ MTDDEBUG(MTD_DEBUG_LEVEL3, "mxc_nand_calculate_ecc: len = %d\n",
-+ this->ecc.bytes);
-+ memset((void *)ecc_code, 0xff, this->ecc.bytes);
-+
-+ return 0;
-+}
-+
-+static u_char mxc_nand_read_byte(struct mtd_info *mtd)
-+{
-+ struct nand_chip *nand_chip = mtd->priv;
-+ struct mxc_nand_host *host = nand_chip->priv;
-+ uint8_t ret = 0;
-+ uint16_t col;
-+ uint16_t __iomem *main_buf =
-+ (uint16_t __iomem *)host->regs->main_area[0];
-+ uint16_t __iomem *spare_buf =
-+ (uint16_t __iomem *)host->regs->spare_area[0];
-+ union {
-+ uint16_t word;
-+ uint8_t bytes[2];
-+ } nfc_word;
-+
-+ /* Check for status request */
-+ if (host->status_request)
-+ return get_dev_status(host) & 0xFF;
-+
-+ /* Get column for 16-bit access */
-+ col = host->col_addr >> 1;
-+
-+ /* If we are accessing the spare region */
-+ if (host->spare_only)
-+ nfc_word.word = readw(&spare_buf[col]);
-+ else
-+ nfc_word.word = readw(&main_buf[col]);
-+
-+ /* Pick upper/lower byte of word from RAM buffer */
-+ ret = nfc_word.bytes[host->col_addr & 0x1];
-+
-+ /* Update saved column address */
-+ if (nand_chip->options & NAND_BUSWIDTH_16)
-+ host->col_addr += 2;
-+ else
-+ host->col_addr++;
-+
-+ return ret;
-+}
-+
-+static uint16_t mxc_nand_read_word(struct mtd_info *mtd)
-+{
-+ struct nand_chip *nand_chip = mtd->priv;
-+ struct mxc_nand_host *host = nand_chip->priv;
-+ uint16_t col, ret;
-+ uint16_t __iomem *p;
-+
-+ MTDDEBUG(MTD_DEBUG_LEVEL3,
-+ "mxc_nand_read_word(col = %d)\n", host->col_addr);
-+
-+ col = host->col_addr;
-+ /* Adjust saved column address */
-+ if (col < mtd->writesize && host->spare_only)
-+ col += mtd->writesize;
-+
-+ if (col < mtd->writesize) {
-+ p = (uint16_t __iomem *)(host->regs->main_area[0] +
-+ (col >> 1));
-+ } else {
-+ p = (uint16_t __iomem *)(host->regs->spare_area[0] +
-+ ((col - mtd->writesize) >> 1));
-+ }
-+
-+ if (col & 1) {
-+ union {
-+ uint16_t word;
-+ uint8_t bytes[2];
-+ } nfc_word[3];
-+
-+ nfc_word[0].word = readw(p);
-+ nfc_word[1].word = readw(p + 1);
-+
-+ nfc_word[2].bytes[0] = nfc_word[0].bytes[1];
-+ nfc_word[2].bytes[1] = nfc_word[1].bytes[0];
-+
-+ ret = nfc_word[2].word;
-+ } else {
-+ ret = readw(p);
-+ }
-+
-+ /* Update saved column address */
-+ host->col_addr = col + 2;
-+
-+ return ret;
-+}
-+
-+/*
-+ * Write data of length len to buffer buf. The data to be
-+ * written on NAND Flash is first copied to RAMbuffer. After the Data Input
-+ * Operation by the NFC, the data is written to NAND Flash
-+ */
-+static void mxc_nand_write_buf(struct mtd_info *mtd,
-+ const u_char *buf, int len)
-+{
-+ struct nand_chip *nand_chip = mtd->priv;
-+ struct mxc_nand_host *host = nand_chip->priv;
-+ int n, col, i = 0;
-+
-+ MTDDEBUG(MTD_DEBUG_LEVEL3,
-+ "mxc_nand_write_buf(col = %d, len = %d)\n", host->col_addr,
-+ len);
-+
-+ col = host->col_addr;
-+
-+ /* Adjust saved column address */
-+ if (col < mtd->writesize && host->spare_only)
-+ col += mtd->writesize;
-+
-+ n = mtd->writesize + mtd->oobsize - col;
-+ n = min(len, n);
-+
-+ MTDDEBUG(MTD_DEBUG_LEVEL3,
-+ "%s:%d: col = %d, n = %d\n", __func__, __LINE__, col, n);
-+
-+ while (n > 0) {
-+ void __iomem *p;
-+
-+ if (col < mtd->writesize) {
-+ p = host->regs->main_area[0] + (col & ~3);
-+ } else {
-+ p = host->regs->spare_area[0] -
-+ mtd->writesize + (col & ~3);
-+ }
-+
-+ MTDDEBUG(MTD_DEBUG_LEVEL3, "%s:%d: p = %p\n", __func__,
-+ __LINE__, p);
-+
-+ if (((col | (unsigned long)&buf[i]) & 3) || n < 4) {
-+ union {
-+ uint32_t word;
-+ uint8_t bytes[4];
-+ } nfc_word;
-+
-+ nfc_word.word = readl(p);
-+ nfc_word.bytes[col & 3] = buf[i++];
-+ n--;
-+ col++;
-+
-+ writel(nfc_word.word, p);
-+ } else {
-+ int m = mtd->writesize - col;
-+
-+ if (col >= mtd->writesize)
-+ m += mtd->oobsize;
-+
-+ m = min(n, m) & ~3;
-+
-+ MTDDEBUG(MTD_DEBUG_LEVEL3,
-+ "%s:%d: n = %d, m = %d, i = %d, col = %d\n",
-+ __func__, __LINE__, n, m, i, col);
-+
-+ mxc_nand_memcpy32(p, (uint32_t *)&buf[i], m);
-+ col += m;
-+ i += m;
-+ n -= m;
-+ }
-+ }
-+ /* Update saved column address */
-+ host->col_addr = col;
-+}
-+
-+/*
-+ * Read the data buffer from the NAND Flash. To read the data from NAND
-+ * Flash first the data output cycle is initiated by the NFC, which copies
-+ * the data to RAMbuffer. This data of length len is then copied to buffer buf.
-+ */
-+static void mxc_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
-+{
-+ struct nand_chip *nand_chip = mtd->priv;
-+ struct mxc_nand_host *host = nand_chip->priv;
-+ int n, col, i = 0;
-+
-+ MTDDEBUG(MTD_DEBUG_LEVEL3,
-+ "mxc_nand_read_buf(col = %d, len = %d)\n", host->col_addr, len);
-+
-+ col = host->col_addr;
-+
-+ /* Adjust saved column address */
-+ if (col < mtd->writesize && host->spare_only)
-+ col += mtd->writesize;
-+
-+ n = mtd->writesize + mtd->oobsize - col;
-+ n = min(len, n);
-+
-+ while (n > 0) {
-+ void __iomem *p;
-+
-+ if (col < mtd->writesize) {
-+ p = host->regs->main_area[0] + (col & ~3);
-+ } else {
-+ p = host->regs->spare_area[0] -
-+ mtd->writesize + (col & ~3);
-+ }
-+
-+ if (((col | (int)&buf[i]) & 3) || n < 4) {
-+ union {
-+ uint32_t word;
-+ uint8_t bytes[4];
-+ } nfc_word;
-+
-+ nfc_word.word = readl(p);
-+ buf[i++] = nfc_word.bytes[col & 3];
-+ n--;
-+ col++;
-+ } else {
-+ int m = mtd->writesize - col;
-+
-+ if (col >= mtd->writesize)
-+ m += mtd->oobsize;
-+
-+ m = min(n, m) & ~3;
-+ mxc_nand_memcpy32((uint32_t *)&buf[i], p, m);
-+
-+ col += m;
-+ i += m;
-+ n -= m;
-+ }
-+ }
-+ /* Update saved column address */
-+ host->col_addr = col;
-+}
-+
-+/*
-+ * Used by the upper layer to verify the data in NAND Flash
-+ * with the data in the buf.
-+ */
-+static int mxc_nand_verify_buf(struct mtd_info *mtd,
-+ const u_char *buf, int len)
-+{
-+ u_char tmp[256];
-+ uint bsize;
-+
-+ while (len) {
-+ bsize = min(len, 256);
-+ mxc_nand_read_buf(mtd, tmp, bsize);
-+
-+ if (memcmp(buf, tmp, bsize))
-+ return 1;
-+
-+ buf += bsize;
-+ len -= bsize;
-+ }
-+
-+ return 0;
-+}
-+
-+/*!
-+ * mxc_nand_block_markbad - mark a block bad
-+ *
-+ * @param mtd MTD structure for the NAND Flash
-+ * @param buf data to be verified
-+ * @param ofs offset to the bad block
-+ *
-+ * @return -EFAULT if error else 0
-+ *
-+ * This function is used by the upper layer to mark bad blocks
-+ * We overload the default function to support NAND SPL capabilities to detect
-+ * badblocks without scanning the BBT. The first OOB location is filled with 0
-+ *
-+ */
-+
-+static int mxc_nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
-+{
-+
-+ struct nand_chip *this = mtd->priv;
-+ uint8_t buf[2] = { 0, 0 };
-+ int block, ret;
-+
-+ /* Get block number */
-+ block = (int)(ofs >> this->bbt_erase_shift);
-+ if (this->bbt)
-+ this->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
-+
-+ /* Do we have a flash based bad block table ? */
-+ if (this->options & NAND_USE_FLASH_BBT)
-+ ret = nand_update_bbt(mtd, ofs);
-+ /* We write two bytes, so we dont have to mess with 16 bit
-+ * access
-+ */
-+ ofs += mtd->oobsize;
-+ this->ops.len = this->ops.ooblen = 2;
-+ this->ops.datbuf = NULL;
-+ this->ops.oobbuf = buf;
-+ this->ops.ooboffs = this->badblockpos & ~0x01;
-+
-+ ret = mtd->write_oob(mtd, ofs , &this->ops);
-+ if (!ret)
-+ mtd->ecc_stats.badblocks++;
-+
-+ return ret;
-+}
-+
-+/*
-+ * This function is used by upper layer for select and
-+ * deselect of the NAND chip
-+ */
-+static void mxc_nand_select_chip(struct mtd_info *mtd, int chip)
-+{
-+ struct nand_chip *nand_chip = mtd->priv;
-+ struct mxc_nand_host *host = nand_chip->priv;
-+
-+ switch (chip) {
-+ case -1:
-+ /* TODO: Disable the NFC clock */
-+ if (host->clk_act)
-+ host->clk_act = 0;
-+ break;
-+ case 0 ... 7:
-+ /* TODO: Enable the NFC clock */
-+ if (!host->clk_act)
-+ host->clk_act = 1;
-+ NFC_SET_NFC_ACTIVE_CS(chip);
-+ break;
-+
-+ default:
-+ break;
-+ }
-+}
-+
-+/*
-+ * Used by the upper layer to write command to NAND Flash for
-+ * different operations to be carried out on NAND Flash
-+ */
-+void mxc_nand_command(struct mtd_info *mtd, unsigned command,
-+ int column, int page_addr)
-+{
-+ struct nand_chip *nand_chip = mtd->priv;
-+ struct mxc_nand_host *host = nand_chip->priv;
-+
-+ MTDDEBUG(MTD_DEBUG_LEVEL3,
-+ "mxc_nand_command (cmd = 0x%x, col = 0x%x, page = 0x%x)\n",
-+ command, column, page_addr);
-+
-+ /* Reset command state information */
-+ host->status_request = false;
-+
-+ /* Command pre-processing step */
-+ switch (command) {
-+
-+ case NAND_CMD_STATUS:
-+ host->col_addr = 0;
-+ host->status_request = true;
-+ break;
-+
-+ case NAND_CMD_READ0:
-+ host->page_addr = page_addr;
-+ host->col_addr = column;
-+ host->spare_only = false;
-+ break;
-+
-+ case NAND_CMD_READOOB:
-+ host->col_addr = column;
-+ host->spare_only = true;
-+ if (host->pagesize_2k)
-+ command = NAND_CMD_READ0; /* only READ0 is valid */
-+ break;
-+
-+ case NAND_CMD_SEQIN:
-+ if (column >= mtd->writesize) {
-+ /*
-+ * before sending SEQIN command for partial write,
-+ * we need read one page out. FSL NFC does not support
-+ * partial write. It alway send out 512+ecc+512+ecc ...
-+ * for large page nand flash. But for small page nand
-+ * flash, it does support SPARE ONLY operation.
-+ */
-+ if (host->pagesize_2k) {
-+ /* call ourself to read a page */
-+ mxc_nand_command(mtd, NAND_CMD_READ0, 0,
-+ page_addr);
-+ }
-+
-+ host->col_addr = column - mtd->writesize;
-+ host->spare_only = true;
-+
-+ if (!host->pagesize_2k)
-+ /* Set program pointer to spare region */
-+ send_cmd(host, NAND_CMD_READOOB);
-+ } else {
-+ host->spare_only = false;
-+ host->col_addr = column;
-+
-+ /* Set program pointer to page start */
-+ if (!host->pagesize_2k)
-+ send_cmd(host, NAND_CMD_READ0);
-+ }
-+ break;
-+
-+ case NAND_CMD_PAGEPROG:
-+ send_prog_page(host, 0, host->spare_only);
-+ break;
-+
-+#ifdef CONFIG_CMD_NAND_LOCK_UNLOCK
-+ case NAND_CMD_LOCK:
-+ /* Lock Block whole NAND only supported */
-+ writel(0x82 , NFC_WRPROT);
-+ return;
-+ case NAND_CMD_LOCK_TIGHT:
-+ /* Lock Tight whole NAND only supported */
-+ writel(0x81 , NFC_WRPROT);
-+ return;
-+ case NAND_CMD_UNLOCK1:
-+ /* 64 pages per block only */
-+ writel(page_addr>>6, NFC_WRPROT_UNLOCK_BLK_ADD0);
-+ return;
-+ case NAND_CMD_UNLOCK2:{
-+ int temp = readl(NFC_WRPROT_UNLOCK_BLK_ADD0)
-+ & 0x0000FFFF;
-+ writel(((page_addr>>6)<<16) | temp ,
-+ NFC_WRPROT_UNLOCK_BLK_ADD0);
-+ /* Unlock Block Command for given address range */
-+ writel(0x84 , NFC_WRPROT);
-+ }
-+ return;
-+ case NAND_CMD_LOCK_STATUS:
-+ host->col_addr = 0;
-+ host->spare_only = false;
-+ return;
-+#endif
-+ }
-+
-+ /* Write out the command to the device. */
-+ send_cmd(host, command);
-+
-+ /* Write out column address, if necessary */
-+ if (column != -1) {
-+ /*
-+ * MXC NANDFC can only perform full page+spare or
-+ * spare-only read/write. When the upper layers
-+ * layers perform a read/write buf operation,
-+ * we will used the saved column adress to index into
-+ * the full page.
-+ */
-+ send_addr(host, 0);
-+ send_addr(host, 0);
-+ }
-+
-+ /* Write out page address, if necessary */
-+ if (page_addr != -1) {
-+ u32 page_mask = nand_chip->pagemask;
-+ do {
-+ send_addr(host, page_addr & 0xFF);
-+ page_addr >>= 8;
-+ page_mask >>= 8;
-+ } while (page_mask);
-+ }
-+
-+ /* Command post-processing step */
-+ switch (command) {
-+
-+ case NAND_CMD_RESET:
-+ break;
-+
-+ case NAND_CMD_READOOB:
-+ case NAND_CMD_READ0:
-+ /* send read confirm command */
-+ send_cmd(host, NAND_CMD_READSTART);
-+ /* read for each AREA */
-+ send_read_page(host, 0, host->spare_only);
-+ break;
-+
-+ case NAND_CMD_READID:
-+ host->col_addr = 0;
-+ send_read_id(host);
-+ break;
-+
-+ case NAND_CMD_PAGEPROG:
-+ break;
-+
-+ case NAND_CMD_STATUS:
-+ break;
-+
-+ case NAND_CMD_ERASE2:
-+ break;
-+ }
-+}
-+
-+static void mxc_setup_config1(void)
-+{
-+ if (host->pagesize_2k) {
-+ NFC_SET_SPAS(0x20); /* set spare to 64bytes */
-+ /* set 2k page and 64bytes spare */
-+ writel(0x7020A0B9, NFC_CONFIG2);
-+ }
-+}
-+
-+
-+static void mxc_nfc_init(void)
-+{
-+ /* Disable interrupt */
-+ raw_write((raw_read(REG_NFC_INTRRUPT) | NFC_INT_MSK), REG_NFC_INTRRUPT);
-+
-+ /* disable spare enable */
-+ raw_write(raw_read(REG_NFC_SP_EN) & ~NFC_SP_EN, REG_NFC_SP_EN);
-+
-+ /* Unlock the internal RAM Buffer */
-+ raw_write(NFC_SET_BLS(NFC_BLS_UNLCOKED), REG_NFC_BLS);
-+
-+ /* Blocks to be unlocked */
-+ UNLOCK_ADDR(0x0, 0xFFFF);
-+
-+ /* Unlock Block Command for given address range */
-+ raw_write(NFC_SET_WPC(NFC_WPC_UNLOCK), REG_NFC_WPC);
-+
-+ /* Enable hw ecc */
-+ raw_write((raw_read(REG_NFC_ECC_EN) | NFC_ECC_EN), REG_NFC_ECC_EN);
-+}
-+
-+int board_nand_init(struct nand_chip *this)
-+{
-+ struct mtd_info *mtd;
-+ uint16_t tmp;
-+ int err = 0;
-+
-+ /* structures must be linked */
-+ mtd = &host->mtd;
-+ mtd->priv = this;
-+ host->nand = this;
-+
-+ /* 5 us command delay time */
-+ this->chip_delay = 5;
-+
-+ this->priv = host;
-+ this->dev_ready = mxc_nand_dev_ready;
-+ this->cmdfunc = mxc_nand_command;
-+ this->select_chip = mxc_nand_select_chip;
-+ this->read_byte = mxc_nand_read_byte;
-+ this->read_word = mxc_nand_read_word;
-+ this->write_buf = mxc_nand_write_buf;
-+ this->read_buf = mxc_nand_read_buf;
-+ this->verify_buf = mxc_nand_verify_buf;
-+ this->block_markbad = mxc_nand_block_markbad;
-+
-+ host->regs = (struct nfc_regs __iomem *)CONFIG_MXC_NAND_REGS_BASE;
-+ host->clk_act = 1;
-+
-+ /* init the nfc */
-+ mxc_nfc_init();
-+
-+#ifdef CONFIG_MXC_NAND_HWECC
-+ this->ecc.calculate = mxc_nand_calculate_ecc;
-+ this->ecc.hwctl = mxc_nand_enable_hwecc;
-+ this->ecc.correct = mxc_nand_correct_data;
-+ this->ecc.mode = NAND_ECC_HW;
-+ this->ecc.size = 2048;
-+ this->ecc.bytes = 8;
-+
-+ tmp = readl(NFC_CONFIG2);
-+ tmp |= NFC_ECC_EN;
-+ writel(tmp, NFC_CONFIG2);
-+#endif
-+
-+ this->options |= NAND_USE_FLASH_BBT;
-+ this->bbt_td = &bbt_main_descr;
-+ this->bbt_md = &bbt_mirror_descr;
-+
-+ /* Blocks to be unlocked */
-+ writel(0xFFFF0000, NFC_WRPROT_UNLOCK_BLK_ADD0);
-+ /* Unlock Block Command for given address range */
-+ writel(0x84 , NFC_WRPROT);
-+
-+#ifndef CONFIG_SYS_NAND_LARGEPAGE
-+ PRINT ONLY NAND LARGEPAGE SUPPORTED
-+#else
-+ host->pagesize_2k = 1;
-+ this->ecc.layout = &nand_hw_eccoob2k;
-+#endif
-+ mxc_setup_config1();
-+
-+ /* Reset NAND */
-+ this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
-+
-+ return err;
-+}
---
-1.7.2.5
-
diff --git a/patches/u-boot/2013.04/409-apf51-nand-spl.patch b/patches/u-boot/2013.04/409-apf51-nand-spl.patch
deleted file mode 100644
index 7428711..0000000
--- a/patches/u-boot/2013.04/409-apf51-nand-spl.patch
+++ /dev/null
@@ -1,407 +0,0 @@
-Signed-off-by: Eric Jarrige <eri...@ar...>
-Signed-off-by: Philippe Reynes <tr...@ya...>
----
- nand_spl/board/armadeus/apf51/Makefile | 77 ++++++++++
- nand_spl/board/armadeus/apf51/config.mk | 43 ++++++
- nand_spl/board/armadeus/apf51/flash_header.S | 208 ++++++++++++++++++++++++++
- nand_spl/board/armadeus/apf51/u-boot.lds | 39 +++++
- 4 files changed, 367 insertions(+), 0 deletions(-)
- create mode 100644 nand_spl/board/armadeus/apf51/Makefile
- create mode 100644 nand_spl/board/armadeus/apf51/config.mk
- create mode 100644 nand_spl/board/armadeus/apf51/flash_header.S
- create mode 100644 nand_spl/board/armadeus/apf51/u-boot.lds
-
-diff --git a/nand_spl/board/armadeus/apf51/Makefile b/nand_spl/board/armadeus/apf51/Makefile
-new file mode 100644
-index 0000000..c99d391
---- /dev/null
-+++ b/nand_spl/board/armadeus/apf51/Makefile
-@@ -0,0 +1,77 @@
-+#
-+# (C) Copyright 2007
-+# Stefan Roese, DENX Software Engineering, sr...@de....
-+#
-+# See file CREDITS for list of people who contributed to this
-+# project.
-+#
-+# This program is free software; you can redistribute it and/or
-+# modify it under the terms of the GNU General Public License as
-+# published by the Free Software Foundation; either version 2 of
-+# the License, or (at your option) any later version.
-+#
-+# This program is distributed in the hope that it will be useful,
-+# but WITHOUT ANY WARRANTY; without even the implied warranty of
-+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+# GNU General Public License for more details.
-+#
-+# You should have received a copy of the GNU General Public License
-+# along with this program; if not, write to the Free Software
-+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+# MA 02111-1307 USA
-+#
-+
-+include $(TOPDIR)/config.mk
-+include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
-+
-+LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
-+LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
-+AFLAGS += -DCONFIG_NAND_SPL
-+CFLAGS += -DCONFIG_NAND_SPL
-+
-+SOBJS = flash_header.o
-+COBJS =
-+
-+SRCS := $(addprefix $(src),$(SOBJS:.o=.S) $(COBJS:.o=.c))
-+OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-+__OBJS := $(SOBJS) $(COBJS)
-+LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR)
-+
-+nandobj := $(OBJTREE)/nand_spl/
-+
-+ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin \
-+ $(nandobj)System.map
-+
-+all: $(obj).depend $(ALL)
-+
-+$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
-+ $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
-+
-+$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
-+ $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
-+
-+$(nandobj)u-boot-spl: $(OBJS)
-+ cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \
-+ -Map $(nandobj)u-boot-spl.map \
-+ -o $(nandobj)u-boot-spl
-+
-+$(nandobj)System.map: $(nandobj)u-boot-spl
-+ @$(NM) $< | \
-+ grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
-+ sort > $(nandobj)System.map
-+
-+
-+#########################################################################
-+
-+$(obj)%.o: %.S
-+ $(CC) $(AFLAGS) -c -o $@ $<
-+
-+$(obj)%.o: %.c
-+ $(CC) $(CFLAGS) -c -o $@ $<
-+
-+# defines $(obj).depend target
-+include $(SRCTREE)/rules.mk
-+
-+sinclude $(obj).depend
-+
-+#########################################################################
-diff --git a/nand_spl/board/armadeus/apf51/config.mk b/nand_spl/board/armadeus/apf51/config.mk
-new file mode 100644
-index 0000000..ed02258
---- /dev/null
-+++ b/nand_spl/board/armadeus/apf51/config.mk
-@@ -0,0 +1,43 @@
-+#
-+# (C) Copyright 2007
-+# Stefan Roese, DENX Software Engineering, sr...@de....
-+#
-+# See file CREDITS for list of people who contributed to this
-+# project.
-+#
-+# This program is free software; you can redistribute it and/or
-+# modify it under the terms of the GNU General Public License as
-+# published by the Free Software Foundation; either version 2 of
-+# the License, or (at your option) any later version.
-+#
-+# This program is distributed in the hope that it will be useful,
-+# but WITHOUT ANY WARRANTY; without even the implied warranty of
-+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+# GNU General Public License for more details.
-+#
-+# You should have received a copy of the GNU General Public License
-+# along with this program; if not, write to the Free Software
-+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+# MA 02111-1307 USA
-+#
-+#
-+# This config file is used for compilation of armadeus apf27 board
-+#
-+
-+#
-+# TEXT_BASE for SPL:
-+#
-+#
-+# This config file is used for compilation of armadeus sources
-+#
-+# You might change location of U-Boot in memory by setting right TEXT_BASE.
-+# This allows for example having one copy located at the end of ram and stored
-+# in flash device and later on while developing use other location to test
-+# the code in RAM device only.
-+#
-+
-+TEXT_BASE = 0x90000000
-+
-+# PAD_TO used to generate a 2kByte binary needed for the combined image
-+# -> PAD_TO = TEXT_BASE + 0x0800
-+#PAD_TO = 0xa0000800
-diff --git a/nand_spl/board/armadeus/apf51/flash_header.S b/nand_spl/board/armadeus/apf51/flash_header.S
-new file mode 100644
-index 0000000..9c586e2
---- /dev/null
-+++ b/nand_spl/board/armadeus/apf51/flash_header.S
-@@ -0,0 +1,208 @@
-+/*
-+ *
-+ * Copyright (c) 2010-2012 Eric Jarrige, Armadeus Project
-+ * Copyright 2009 Freescale Semiconductor, Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+#include <config.h>
-+#include <asm/arch/imx-regs.h>
-+#include <asm/arch/regs_esdctl.h>
-+#include <generated/asm-offsets.h>
-+
-+#ifdef CONFIG_FLASH_HEADER
-+#ifndef CONFIG_FLASH_HEADER_OFFSET
-+# error "Must define the offset of flash header"
-+#endif
-+#define MXC_DCD_ITEM(i, type, addr, val) \
-+dcd_node_##i: \
-+ .word type ; \
-+ .word addr ; \
-+ .word val ; \
-+
-+.globl _start
-+_start:
-+ b _end
-+ b _end
-+ .org CONFIG_FLASH_HEADER_OFFSET
-+app_code_jump_v: .word end
-+app_code_code_barker: .word CONFIG_FLASH_HEADER_BARKER
-+app_code_csf: .word 0
-+dcd_ptr_ptr: .word dcd_ptr
-+super_root_key: .word 0
-+dcd_ptr: .word dcd_array_start
-+app_dest_ptr: .word _start/*TEXT_BASE*/
-+dcd_array_start:
-+magic: .word 0xB17219E9
-+dcd_array_size: .word dcd_data_end - dcd_array_start - 8
-+/* DCD */
-+
-+/* DDR2/mDDR IOMUX configuration */
-+/* NOTE: we removed some entry to fit in the max 60 entries */
-+
-+MXC_DCD_ITEM(1, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_PAD_DRAM_RAS,
-+ ACFG_IOMUX_PAD_DRAM_RAS)
-+MXC_DCD_ITEM(2, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_PAD_DRAM_CAS,
-+ ACFG_IOMUX_PAD_DRAM_CAS)
-+MXC_DCD_ITEM(3, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_PAD_DRAM_SDWE,
-+ ACFG_IOMUX_PAD_DRAM_SDWE)
-+MXC_DCD_ITEM(4, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCKE0,
-+ ACFG_IOMUX_PAD_DRAM_SDCKE0)
-+MXC_DCD_ITEM(5, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCKE1,
-+ ACFG_IOMUX_PAD_DRAM_SDCKE1)
-+MXC_DCD_ITEM(6, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCLK,
-+ ACFG_IOMUX_PAD_DRAM_SDCLK)
-+MXC_DCD_ITEM(7, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS0,
-+ ACFG_IOMUX_PAD_DRAM_SDQS0)
-+MXC_DCD_ITEM(8, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS1,
-+ ACFG_IOMUX_PAD_DRAM_SDQS1)
-+MXC_DCD_ITEM(9, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS2,
-+ ACFG_IOMUX_PAD_DRAM_SDQS2)
-+MXC_DCD_ITEM(10, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS3,
-+ ACFG_IOMUX_PAD_DRAM_SDQS3)
-+MXC_DCD_ITEM(11, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_PAD_DRAM_CS0,
-+ ACFG_IOMUX_PAD_DRAM_CS0)
-+MXC_DCD_ITEM(12, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_PAD_DRAM_CS1,
-+ ACFG_IOMUX_PAD_DRAM_CS1)
-+MXC_DCD_ITEM(13, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM0,
-+ ACFG_IOMUX_PAD_DRAM_DQM0)
-+MXC_DCD_ITEM(14, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM1,
-+ ACFG_IOMUX_PAD_DRAM_DQM1)
-+MXC_DCD_ITEM(15, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM2,
-+ ACFG_IOMUX_PAD_DRAM_DQM2)
-+MXC_DCD_ITEM(16, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM3,
-+ ACFG_IOMUX_PAD_DRAM_DQM3)
-+/*
-+MXC_DCD_ITEM(17, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_PAD_EIM_SDBA2,
-+ ACFG_IOMUX_PAD_EIM_SDBA2)
-+MXC_DCD_ITEM(18, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_PAD_EIM_SDODT1,
-+ ACFG_IOMUX_PAD_EIM_SDODT1)
-+MXC_DCD_ITEM(19, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_PAD_EIM_SDODT0,
-+ ACFG_IOMUX_PAD_EIM_SDODT0)
-+*/
-+MXC_DCD_ITEM(20, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_GRP_DDRPKS,
-+ ACFG_IOMUX_GRP_DDRPKS)
-+MXC_DCD_ITEM(21, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_GRP_DRAM_B4,
-+ ACFG_IOMUX_GRP_DRAM_B4)
-+/*
-+MXC_DCD_ITEM(22, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_GRP_INDDR,
-+ ACFG_IOMUX_GRP_INDDR)
-+*/
-+MXC_DCD_ITEM(23, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_GRP_PKEDDR,
-+ ACFG_IOMUX_GRP_PKEDDR)
-+MXC_DCD_ITEM(24, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_GRP_DDR_A0,
-+ ACFG_IOMUX_GRP_DDR_A0)
-+MXC_DCD_ITEM(25, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_GRP_DDR_A1,
-+ ACFG_IOMUX_GRP_DDR_A1)
-+/*
-+MXC_DCD_ITEM(26, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_GRP_DDRAPUS,
-+ ACFG_IOMUX_GRP_DDRAPUS)
-+MXC_DCD_ITEM(27, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_GRP_HYSDDR0,
-+ ACFG_IOMUX_GRP_HYSDDR0)
-+MXC_DCD_ITEM(28, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_GRP_HYSDDR1,
-+ ACFG_IOMUX_GRP_HYSDDR1)
-+MXC_DCD_ITEM(29, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_GRP_HYSDDR2,
-+ ACFG_IOMUX_GRP_HYSDDR2)
-+MXC_DCD_ITEM(30, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_GRP_HVDDR,
-+ ACFG_IOMUX_GRP_HVDDR)
-+MXC_DCD_ITEM(31, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_GRP_HYSDDR3,
-+ ACFG_IOMUX_GRP_HYSDDR3)
-+*/
-+MXC_DCD_ITEM(32, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_GRP_DDR_SR_B0,
-+ ACFG_IOMUX_GRP_DDR_SR_B0)
-+MXC_DCD_ITEM(33, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_GRP_DDRAPKS,
-+ ACFG_IOMUX_GRP_DDRAPKS)
-+MXC_DCD_ITEM(34, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_GRP_DDR_SR_B1,
-+ ACFG_IOMUX_GRP_DDR_SR_B1)
-+MXC_DCD_ITEM(35, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_GRP_DDRPUS,
-+ ACFG_IOMUX_GRP_DDRPUS)
-+MXC_DCD_ITEM(36, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_GRP_DDR_SR_B2,
-+ ACFG_IOMUX_GRP_DDR_SR_B2)
-+MXC_DCD_ITEM(37, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_GRP_PKEADDR,
-+ ACFG_IOMUX_GRP_PKEADDR)
-+MXC_DCD_ITEM(38, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_GRP_DDR_SR_B4,
-+ ACFG_IOMUX_GRP_DDR_SR_B4)
-+/*
-+MXC_DCD_ITEM(39, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_GRP_INMODE1,
-+ ACFG_IOMUX_GRP_INMODE1)
-+*/
-+MXC_DCD_ITEM(40, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_GRP_DRAM_B0,
-+ ACFG_IOMUX_GRP_DRAM_B0)
-+MXC_DCD_ITEM(41, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_GRP_DRAM_B1,
-+ ACFG_IOMUX_GRP_DRAM_B1)
-+MXC_DCD_ITEM(42, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_GRP_DDR_SR_A0,
-+ ACFG_IOMUX_GRP_DDR_SR_A0)
-+MXC_DCD_ITEM(43, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_GRP_DRAM_B2,
-+ ACFG_IOMUX_GRP_DRAM_B2)
-+MXC_DCD_ITEM(44, 4, IOMUXC_BASE_ADDR + IOMUXC_SW_PAD_CTL_GRP_DDR_SR_A1,
-+ ACFG_IOMUX_GRP_DDR_SR_A1)
-+
-+/* DDR2/mDDR Configs */
-+
-+/* Init DDR on CS0 */
-+MXC_DCD_ITEM(45, 4, ESDCTL_BASE_ADDR + ESDCTL_ESDCTL0, \
-+ (ACFG_SDRAM_ESDCTL_REGISTER_VAL&0x8FFFFFFF))
-+MXC_DCD_ITEM(46, 4, ESDCTL_BASE_ADDR + ESDCTL_ESDSCR, DRR_PRECHARGE_CMD(0, 0))
-+MXC_DCD_ITEM(47, 4, ESDCTL_BASE_ADDR + ESDCTL_ESDSCR, DRR_AUTOREFRESH_CMD(0))
-+MXC_DCD_ITEM(48, 4, ESDCTL_BASE_ADDR + ESDCTL_ESDSCR, DRR_AUTOREFRESH_CMD(0))
-+MXC_DCD_ITEM(49, 4, ESDCTL_BASE_ADDR + ESDCTL_ESDSCR, \
-+ DRR_LMR_CMD(0, 0, ACFG_DRR_MR_VAL))
-+MXC_DCD_ITEM(50, 4, ESDCTL_BASE_ADDR + ESDCTL_ESDSCR, \
-+ DRR_LMR_CMD(0, 2, ACFG_DRR_EMR_VAL))
-+MXC_DCD_ITEM(51, 4, ESDCTL_BASE_ADDR + ESDCTL_ESDSCR, DDR_NOP_CMD(0))
-+MXC_DCD_ITEM(52, 4, ESDCTL_BASE_ADDR + ESDCTL_ESDCTL0, \
-+ ACFG_SDRAM_ESDCTL_REGISTER_VAL)
-+MXC_DCD_ITEM(53, 4, ESDCTL_BASE_ADDR + ESDCTL_ESDCFG0, \
-+ ACFG_SDRAM_ESDCFG_REGISTER_VAL)
-+
-+/* Init DDR on CS1 */
-+MXC_DCD_ITEM(54, 4, ESDCTL_BASE_ADDR + ESDCTL_ESDCTL1, \
-+ (ACFG_SDRAM_ESDCTL_REGISTER_VAL&0x8FFFFFFF))
-+MXC_DCD_ITEM(55, 4, ESDCTL_BASE_ADDR + ESDCTL_ESDSCR, DRR_PRECHARGE_CMD(1, 0))
-+MXC_DCD_ITEM(56, 4, ESDCTL_BASE_ADDR + ESDCTL_ESDSCR, DRR_AUTOREFRESH_CMD(1))
-+MXC_DCD_ITEM(57, 4, ESDCTL_BASE_ADDR + ESDCTL_ESDSCR, DRR_AUTOREFRESH_CMD(1))
-+MXC_DCD_ITEM(58, 4, ESDCTL_BASE_ADDR + ESDCTL_ESDSCR, \
-+ DRR_LMR_CMD(1, 0, ACFG_DRR_MR_VAL))
-+MXC_DCD_ITEM(59, 4, ESDCTL_BASE_ADDR + ESDCTL_ESDSCR, \
-+ DRR_LMR_CMD(1, 2, ACFG_DRR_EMR_VAL))
-+MXC_DCD_ITEM(60, 4, ESDCTL_BASE_ADDR + ESDCTL_ESDSCR, DDR_NOP_CMD(1))
-+MXC_DCD_ITEM(61, 4, ESDCTL_BASE_ADDR + ESDCTL_ESDCTL1, \
-+ ACFG_SDRAM_ESDCTL_REGISTER_VAL)
-+MXC_DCD_ITEM(62, 4, ESDCTL_BASE_ADDR + ESDCTL_ESDCFG1, \
-+ ACFG_SDRAM_ESDCFG_REGISTER_VAL)
-+
-+MXC_DCD_ITEM(63, 4, ESDCTL_BASE_ADDR + ESDCTL_ESDMISC, \
-+ ACFG_SDRAM_ESDMISC_REGISTER_VAL)
-+MXC_DCD_ITEM(64, 4, ESDCTL_BASE_ADDR + ESDCTL_ESDSCR, 0x00000000)
-+
-+MXC_DCD_ITEM(65, 4, ESDCTL_BASE_ADDR + ESDCTL_ESDGPR, \
-+ ACFG_SDRAM_ESDGPR_REGISTER_VAL)
-+MXC_DCD_ITEM(66, 4, ESDCTL_BASE_ADDR + ESDCTL_ESDCDLY1, \
-+ ACFG_SDRAM_ESDCDLY1_REGISTER_VAL)
-+MXC_DCD_ITEM(67, 4, ESDCTL_BASE_ADDR + ESDCTL_ESDCDLY2, \
-+ ACFG_SDRAM_ESDCDLY2_REGISTER_VAL)
-+MXC_DCD_ITEM(68, 4, ESDCTL_BASE_ADDR + ESDCTL_ESDCDLY3, \
-+ ACFG_SDRAM_ESDCDLY3_REGISTER_VAL)
-+MXC_DCD_ITEM(69, 4, ESDCTL_BASE_ADDR + ESDCTL_ESDCDLY4, \
-+ ACFG_SDRAM_ESDCDLY4_REGISTER_VAL)
-+MXC_DCD_ITEM(70, 4, ESDCTL_BASE_ADDR + ESDCTL_ESDCDLY5, \
-+ ACFG_SDRAM_ESDCDLY5_REGISTER_VAL)
-+
-+dcd_data_end:
-+image_len: .word CONFIG_SYS_MONITOR_LEN
-+end:
-+#endif
-diff --git a/nand_spl/board/armadeus/apf51/u-boot.lds b/nand_spl/board/armadeus/apf51/u-boot.lds
-new file mode 100644
-index 0000000..003dff9
---- /dev/null
-+++ b/nand_spl/board/armadeus/apf51/u-boot.lds
-@@ -0,0 +1,39 @@
-+/*
-+ * (C) Copyright 2007
-+ * Stefan Roese, DENX Software Engineering, sr...@de....
-+ *
-+ * See file CREDITS for list of people who contributed to this
-+ * project.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of
-+ * the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-+ * MA 02111-1307 USA
-+ */
-+
-+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-+OUTPUT_ARCH(arm)
-+ENTRY(_start)
-+SECTIONS
-+{
-+ . = 0x00000000;
-+
-+ . = ALIGN(4);
-+ .text :
-+ {
-+ flash_header.o (.text)
-+ *(.text)
-+
-+ _end = .;
-+ }
-+}
---
-1.7.2.5
-
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2013-07-23 16:57:43
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 63835213cd853f6ba0ca56d708a648d2dae6fb06 (commit)
from 217ecfabace13b5719c8f166818ba0e77a765180 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 63835213cd853f6ba0ca56d708a648d2dae6fb06
Author: Eric Jarrige <eri...@ar...>
Date: Tue Jul 23 19:08:00 2013 +0200
[UBOOT] apf51: add U-Boot 2013.04 configuration file - first draft
-----------------------------------------------------------------------
Summary of changes:
...f51-u-boot-2012.10.h => apf51-u-boot-2013.04.h} | 128 ++++++++++++-------
1 files changed, 81 insertions(+), 47 deletions(-)
copy buildroot/target/device/armadeus/apf51/{apf51-u-boot-2012.10.h => apf51-u-boot-2013.04.h} (89%)
diff --git a/buildroot/target/device/armadeus/apf51/apf51-u-boot-2012.10.h b/buildroot/target/device/armadeus/apf51/apf51-u-boot-2013.04.h
similarity index 89%
copy from buildroot/target/device/armadeus/apf51/apf51-u-boot-2012.10.h
copy to buildroot/target/device/armadeus/apf51/apf51-u-boot-2013.04.h
index 63024df..f641431 100644
--- a/buildroot/target/device/armadeus/apf51/apf51-u-boot-2012.10.h
+++ b/buildroot/target/device/armadeus/apf51/apf51-u-boot-2013.04.h
@@ -2,7 +2,7 @@
*
* Configuration settings for the Armadeus Project motherboard APF51
*
- * Copyright (C) 2010-2012 ej / Armadeus Project <eri...@ar...>
+ * Copyright (C) 2010-2013 ej / Armadeus Project <eri...@ar...>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
@@ -25,8 +25,8 @@
#define CONFIG_VERSION_VARIABLE
#define CONFIG_ENV_VERSION "1.3"
-#define CONFIG_IDENT_STRING " apf51 patch 1.8"
-#define CONFIG_BOARD_NAME apf51
+#define CONFIG_IDENT_STRING " apf51 patch 2.0"
+#define CONFIG_BOARD_NAME apf51
/*
* SoC configurations
@@ -46,23 +46,35 @@
/*
* Board display option
*/
-/*#define CONFIG_DISPLAY_BOARDINFO*/
-/*#define CONFIG_DISPLAY_CPUINFO*/
+#define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_DISPLAY_CPUINFO
/*
* SPL
*/
-#ifndef CONFIG_DOWNLOAD_BY_DEBUGGER
-#define CONFIG_FLASH_HEADER
-#define CONFIG_FLASH_HEADER_OFFSET 0x400
-#define CONFIG_FLASH_HEADER_BARKER 0xB1
-#endif
-
+#define CONFIG_SPL
+#define CONFIG_SPL_MAX_SIZE 0x4000 /* can be extended to 128kiB */
+/* CONFIG_SPL_TEXT_BASE -> IRAM start address available for SPL :
+ * - 0x1FFE0000 IRAM base address
+ * - 0x00002000 IRAM space reserved for IPL
+ * - 0x00000800 size of SPL DCD header
+ */
+#define CONFIG_SPL_TEXT_BASE 0x1FFE2800
+#define CONFIG_SPL_STACK CONFIG_SYS_INIT_RAM_ADDR \
+ + CONFIG_SYS_INIT_RAM_SIZE \
+ - 0x80000 /* MMU and IPL stack */
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_GPIO_SUPPORT
+
+/* NAND boot config */
+#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_NAND_U_BOOT
-/* APF Copy SPL+U-Boot here */
-#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_LOAD_ADDR
-/* APF Size is the partion size */
+#define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SYS_MONITOR_OFFSET
#define CONFIG_SYS_NAND_U_BOOT_SIZE CONFIG_SYS_MONITOR_LEN
+#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_LOAD_ADDR
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
/*
* BOOTP options
@@ -72,40 +84,38 @@
#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE
-/*
#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
-*/
#define CONFIG_HOSTNAME CONFIG_BOARD_NAME
-#define CONFIG_ROOTPATH "/tftpboot/" MK_STR(CONFIG_BOARD_NAME) "-root"
+#define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
/*
* U-Boot Commands
*/
#include <config_cmd_default.h>
-#undef CONFIG_CMD_LOADS
#define CONFIG_CMD_ASKENV /* ask for env variable */
-/*#define CONFIG_CMD_BSP*/ /* Board Specific functions */
+#define CONFIG_CMD_BSP /* Board Specific functions */
#define CONFIG_CMD_CACHE /* icache, dcache */
+/*#define CONFIG_CMD_DATE*/
#define CONFIG_CMD_DHCP /* DHCP Support */
-/*#define CONFIG_CMD_DNS*/
-/*#define CONFIG_CMD_EXT2*/
+#define CONFIG_CMD_DNS
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT /* FAT support */
/*#define CONFIG_CMD_I2C*/ /* I2C serial bus support */
-/*#define CONFIG_CMD_IIM*/ /* imx iim fuse */
+/*#define CONFIG_CMD_IIM*/ /* imx iim fuse */
+#define CONFIG_CMD_MII /* MII support */
/*#define CONFIG_CMD_MMC*/
#define CONFIG_CMD_MTDPARTS /* MTD partition support */
#define CONFIG_CMD_NAND /* NAND support */
#define CONFIG_CMD_NAND_LOCK_UNLOCK
#define CONFIG_CMD_NAND_TRIMFFS
-#undef CONFIG_CMD_NFS
+#define CONFIG_CMD_NFS /* NFS support */
#define CONFIG_CMD_PING /* ping support */
-/*#define CONFIG_CMD_SETEXPR*/ /* setexpr support */
-/*#define CONFIG_CMD_UBI*/
-/*#define CONFIG_CMD_UBIFS*/
-
-#undef CONFIG_CMD_XIMG /* Load part of Multi Image */
+#define CONFIG_CMD_SETEXPR /* setexpr support */
+#define CONFIG_CMD_UBI
+#define CONFIG_CMD_UBIFS
/*
* Memory configurations
@@ -128,7 +138,7 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-#define CONFIG_SYS_TEXT_BASE 0x97000000
+#define CONFIG_SYS_TEXT_BASE 0x90004000
/*
* FLASH organization
@@ -183,14 +193,14 @@
#define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */
#define CONFIG_INITRD_TAG /* send initrd params */
-/* #define CONFIG_REVISION_TAG */
+#define CONFIG_REVISION_TAG
#define CONFIG_OF_LIBFDT
#define CONFIG_BOOTDELAY 5
#define CONFIG_ZERO_BOOTDELAY_CHECK
-#define CONFIG_BOOTFILE MK_STR(CONFIG_BOARD_NAME) "-linux.bin"
-#define CONFIG_BOOTARGS "console=" MK_STR(ACFG_CONSOLE_DEV) "," \
- MK_STR(CONFIG_BAUDRATE) " " MTDPARTS_DEFAULT \
+#define CONFIG_BOOTFILE __stringify(CONFIG_BOARD_NAME) "-linux.bin"
+#define CONFIG_BOOTARGS "console=" __stringify(ACFG_CONSOLE_DEV) "," \
+ __stringify(CONFIG_BAUDRATE) " " MTDPARTS_DEFAULT \
" ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs "
#define ACFG_CONSOLE_DEV ttymxc2
@@ -207,15 +217,15 @@
*/
#define CONFIG_EXTRA_ENV_SETTINGS \
"env_version=" CONFIG_ENV_VERSION "\0" \
- "consoledev=" MK_STR(ACFG_CONSOLE_DEV) "\0" \
+ "consoledev=" __stringify(ACFG_CONSOLE_DEV) "\0" \
"mtdparts=" MTDPARTS_DEFAULT "\0" \
"partition=nand0,7\0" \
- "uboot_addr=" MK_STR(CONFIG_SYS_MONITOR_OFFSET) "\0" \
- "env_addr=" MK_STR(CONFIG_ENV_OFFSET) "\0" \
- "firmware_addr=" MK_STR(CONFIG_FIRMWARE_OFFSET) "\0" \
- "kernel_addr=" MK_STR(CONFIG_KERNEL_OFFSET) "\0" \
- "rootfs_addr=" MK_STR(CONFIG_ROOTFS_OFFSET) "\0" \
- "board_name=" MK_STR(CONFIG_BOARD_NAME) "\0" \
+ "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_OFFSET) "\0" \
+ "env_addr=" __stringify(CONFIG_ENV_OFFSET) "\0" \
+ "firmware_addr=" __stringify(CONFIG_FIRMWARE_OFFSET) "\0" \
+ "kernel_addr=" __stringify(CONFIG_KERNEL_OFFSET) "\0" \
+ "rootfs_addr=" __stringify(CONFIG_ROOTFS_OFFSET) "\0" \
+ "board_name=" __stringify(CONFIG_BOARD_NAME) "\0" \
"kernel_addr_r=90800000\0" \
"addnfsargs=setenv bootargs ${bootargs} " \
"root=/dev/nfs rw nfsroot=${serverip}:${rootpath}\0" \
@@ -307,36 +317,51 @@
/*
* NAND
*/
-#define CONFIG_NAND_MXC_V2
-#define CONFIG_MXC_NAND_REGS_BASE 0xCFFF0000
+#define CONFIG_NAND_MXC
+
+#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
+#define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
#define CONFIG_SYS_NAND_BASE CONFIG_MXC_NAND_REGS_BASE
+#define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_MXC_NAND_HWECC
#define CONFIG_SYS_NAND_LARGEPAGE
+#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define NAND_MAX_CHIPS 1
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_PAGE_COUNT 64
+#define CONFIG_SYS_NAND_PAGE_SIZE 2048
+#define CONFIG_SYS_NAND_OOBSIZE 64
+#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
+#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
+ 10, 11, 12, 13}
+#define CONFIG_SYS_NAND_ECCSIZE 512
+#define CONFIG_SYS_NAND_ECCBYTES 3
+
#define CONFIG_SYS_DIRECT_FLASH_TFTP
#define CONFIG_FLASH_SHOW_PROGRESS 45
#define CONFIG_SYS_NAND_QUIET 1
+
+
/*
* Partitions & Filsystems
*/
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
-/*
#define CONFIG_DOS_PARTITION
#define CONFIG_SUPPORT_VFAT
-*/
+
/*
* UBIFS
*/
-/*
#define CONFIG_RBTREE
#define CONFIG_LZO
-*/
+
/*
* Ethernet (on SOC mx51 FEC)
@@ -424,7 +449,7 @@
* Watchdog Config
*/
#define CONFIG_HW_WATCHDOG
-
+#define CONFIG_IMX_WATCHDOG
/*
* USB
*/
@@ -481,6 +506,15 @@
#define DP_MFD_800 (65536 - 1)
#define DP_MFN_800 60354
+/* 455MHz only needed to define references to compile U-Boot */
+#define DP_OP_455 ((9 << 4) + ((2 - 1) << 0))
+#define DP_MFD_455 (48 - 1)
+#define DP_MFN_455 23
+
+#define DP_OP_400 ((11 << 4) + ((3 - 1) << 0))
+#define DP_MFD_400 (65536 - 1)
+#define DP_MFN_400 60354
+
#define ACFG_PLL2_CLK 665 /* MHz */
#define DP_OP_665 ((14 << 4) + ((3 - 1) << 0))
#define DP_MFD_665 (2097152 - 1)
hooks/post-receive
--
armadeus
|
|
From: jorasse <jo...@us...> - 2013-07-23 16:55:40
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 217ecfabace13b5719c8f166818ba0e77a765180 (commit)
from 68e5a35d59d6fa58958d8003cf7a0b86276aa2b9 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 217ecfabace13b5719c8f166818ba0e77a765180
Author: Eric Jarrige <eri...@ar...>
Date: Tue Jul 23 19:05:47 2013 +0200
[UBOOT] 2013.04: apf51: Add new SPL supporting bigger U-Boot memory footprint
-----------------------------------------------------------------------
Summary of changes:
patches/u-boot/2013.04/401-apf51.patch | 21 +-
patches/u-boot/2013.04/420-apf51-nand-spl-NG.patch | 401 ++++++++++++++++++++
2 files changed, 404 insertions(+), 18 deletions(-)
create mode 100644 patches/u-boot/2013.04/420-apf51-nand-spl-NG.patch
diff --git a/patches/u-boot/2013.04/401-apf51.patch b/patches/u-boot/2013.04/401-apf51.patch
index 1d47bc3..7fa9920 100644
--- a/patches/u-boot/2013.04/401-apf51.patch
+++ b/patches/u-boot/2013.04/401-apf51.patch
@@ -67,9 +67,9 @@ new file mode 100644
index 0000000..8ff1381
--- /dev/null
+++ b/board/armadeus/apf51/apf51.c
-@@ -0,0 +1,1199 @@
+@@ -0,0 +1,1184 @@
+/*
-+ * (C) Copyright 2010-2012 Eric Jarrige, Armadeus Project
++ * (C) Copyright 2010-2013 Eric Jarrige, Armadeus Project
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
@@ -1015,21 +1015,6 @@ index 0000000..8ff1381
+}
+#endif
+
-+/*************************************************************************
-+ * hw_watchdog_reset
-+ *
-+ * This routine is called to reset (keep alive) the watchdog timer
-+ *
-+ ************************************************************************/
-+#if defined(CONFIG_HW_WATCHDOG)
-+void hw_watchdog_reset(void)
-+{
-+ struct wdog_regs *imx_wdog1 = (struct wdog_regs *)WDOG1_BASE_ADDR;
-+ writew(0x5555, &imx_wdog1->wsr);
-+ writew(0xaaaa, &imx_wdog1->wsr);
-+}
-+#endif
-+
+int checkboard(void)
+{
+ printf("Board: Armadeus APF51 revision %d\n", get_board_rev());
@@ -1592,7 +1577,7 @@ index 9df6212..1aa7e95 100644
highbank arm armv7 highbank - highbank
mx51_efikamx arm armv7 mx51_efikamx genesi mx5 mx51_efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKAMX,IMX_CONFIG=board/genesi/mx51_efikamx/imximage_mx.cfg
mx51_efikasb arm armv7 mx51_efikamx genesi mx5 mx51_efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKASB,IMX_CONFIG=board/genesi/mx51_efikamx/imximage_sb.cfg
-+apf51 arm armv7 apf51 armadeus mx5
++apf51 arm armv7 apf51 armadeus mx5 apf51:IMX_CONFIG=board/armadeus/apf51/imximage.cfg
mx51evk arm armv7 mx51evk freescale mx5 mx51evk:IMX_CONFIG=board/freescale/mx51evk/imximage.cfg
mx53ard arm armv7 mx53ard freescale mx5 mx53ard:IMX_CONFIG=board/freescale/mx53ard/imximage_dd3.cfg
mx53evk arm armv7 mx53evk freescale mx5 mx53evk:IMX_CONFIG=board/freescale/mx53evk/imximage.cfg
diff --git a/patches/u-boot/2013.04/420-apf51-nand-spl-NG.patch b/patches/u-boot/2013.04/420-apf51-nand-spl-NG.patch
new file mode 100644
index 0000000..81e05dd
--- /dev/null
+++ b/patches/u-boot/2013.04/420-apf51-nand-spl-NG.patch
@@ -0,0 +1,401 @@
+Add APF51 new NAND SPL:
+- compliant with U-Boot regular SPL archictecture
+- Remove 256KiB limitation of the CPU internal SPL/IPL
+- run SPL from IRAM
+- intialize SDRAM from SPL instead of DCD: cf imx51 chip errata
+- use regular U-Boot mxc_nand driver
+- add nand loch/unlock feature
+- final binary may be launch from NAND, IRAM or SDRAM
+- use make u-boot-with-nand-spl.imx to build U-Boot with NAND SPL
+
+Signed-off-by: Eric Jarrige <eri...@ar...>
+
+--- uboot-custom/arch/arm/imx-common/Makefile
++++ uboot-custom/arch/arm/imx-common/Makefile
+@@ -62,7 +62,7 @@ $(OBJTREE)/u-boot-with-spl.imx: $(OBJTRE
+ rm $(OBJTREE)/spl/u-boot-spl-pad.imx
+
+ $(OBJTREE)/u-boot-with-nand-spl.imx: $(OBJTREE)/SPL $(OBJTREE)/u-boot.bin
+- (echo -ne '\x00\x00\x00\x00\x46\x43\x42\x20\x01' && \
++ (echo -ne '\xFE\x0F\x00\xEA\x46\x43\x42\x20\x01' && \
+ dd bs=1015 count=1 if=/dev/zero 2>/dev/null) | \
+ cat - $< > $(OBJTREE)/spl/u-boot-nand-spl.imx
+ $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SPL_PAD_TO) \
+--- uboot-custom/arch/arm/include/asm/arch-mx5/spl.h
++++ uboot-custom/arch/arm/include/asm/arch-mx5/spl.h
+@@ -0,0 +1,35 @@
++/*
++ * (C) Copyright 2012
++ * Texas Instruments, <www.ti.com>
++ * (C) Copyright 2013 ej / Armadeus Project <eri...@ar...>
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++#ifndef _ASM_ARCH_SPL_H_
++#define _ASM_SPL_H_
++
++#define BOOT_DEVICE_NOR 0
++#define BOOT_DEVICE_ONENAND 1
++#define BOOT_DEVICE_NAND 2
++#define BOOT_DEVICE_MMC2 3
++#define BOOT_DEVICE_MMC1 4
++#define BOOT_DEVICE_SPI 6
++#define BOOT_DEVICE_I2C 7
++
++#endif
+--- uboot-custom/board/armadeus/apf51/apf51_spl.c
++++ uboot-custom/board/armadeus/apf51/apf51_spl.c
+@@ -0,0 +1,208 @@
++/*
++ * (C) Copyright 2013 ej / Armadeus Project <eri...@ar...>
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <common.h>
++#include <config.h>
++#include <spl.h>
++#include <nand.h>
++#include <asm/io.h>
++#include <asm/arch/imx-regs.h>
++#include <asm/arch/iomux.h>
++#include <asm/arch/mx5x_pins.h>
++#include <asm/arch/regs_esdctl.h>
++
++/* Pointer to as well as the global data structure for SPL */
++DECLARE_GLOBAL_DATA_PTR;
++gd_t gdata __attribute__ ((section(".data")));
++
++static inline void init_dram()
++{
++ struct esdctl_regs *esdctl = (struct esdctl_regs *)ESDCTL_BASE_ADDR;
++
++ mxc_iomux_set_pad(MX51_PIN_CTL_DRAM_RAS, ACFG_IOMUX_PAD_DRAM_RAS);
++ mxc_iomux_set_pad(MX51_PIN_CTL_DRAM_CAS, ACFG_IOMUX_PAD_DRAM_CAS);
++ mxc_iomux_set_pad(MX51_PIN_CTL_DRAM_SDWE, ACFG_IOMUX_PAD_DRAM_SDWE);
++ mxc_iomux_set_pad(MX51_PIN_CTL_DRAM_SDCKE0, ACFG_IOMUX_PAD_DRAM_SDCKE0);
++ mxc_iomux_set_pad(MX51_PIN_CTL_DRAM_SDCKE1, ACFG_IOMUX_PAD_DRAM_SDCKE1);
++ mxc_iomux_set_pad(MX51_PIN_CTL_DRAM_SDCLK, ACFG_IOMUX_PAD_DRAM_SDCLK);
++ mxc_iomux_set_pad(MX51_PIN_CTL_DRAM_SDQS0, ACFG_IOMUX_PAD_DRAM_SDQS0);
++ mxc_iomux_set_pad(MX51_PIN_CTL_DRAM_SDQS1, ACFG_IOMUX_PAD_DRAM_SDQS1);
++ mxc_iomux_set_pad(MX51_PIN_CTL_DRAM_SDQS2, ACFG_IOMUX_PAD_DRAM_SDQS2);
++ mxc_iomux_set_pad(MX51_PIN_CTL_DRAM_SDQS3, ACFG_IOMUX_PAD_DRAM_SDQS3);
++ mxc_iomux_set_pad(MX51_PIN_CTL_DRAM_CS0, ACFG_IOMUX_PAD_DRAM_CS0);
++ mxc_iomux_set_pad(MX51_PIN_CTL_DRAM_CS1, ACFG_IOMUX_PAD_DRAM_CS1);
++ mxc_iomux_set_pad(MX51_PIN_CTL_DRAM_DQM0, ACFG_IOMUX_PAD_DRAM_DQM0);
++ mxc_iomux_set_pad(MX51_PIN_CTL_DRAM_DQM1, ACFG_IOMUX_PAD_DRAM_DQM1);
++ mxc_iomux_set_pad(MX51_PIN_CTL_DRAM_DQM2, ACFG_IOMUX_PAD_DRAM_DQM2);
++ mxc_iomux_set_pad(MX51_PIN_CTL_DRAM_DQM3, ACFG_IOMUX_PAD_DRAM_DQM3);
++/*
++ mxc_iomux_set_pad(MX51_PIN_CTL_PAD_EIM_SDBA2, ACFG_IOMUX_PAD_EIM_SDBA2);
++ mxc_iomux_set_pad(MX51_PIN_CTL_PAD_EIM_SDODT0, ACFG_IOMUX_PAD_EIM_SDODT1);
++ mxc_iomux_set_pad(MX51_PIN_CTL_PAD_EIM_SDODT0, ACFG_IOMUX_PAD_EIM_SDODT0);
++*/
++ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DDRPKS, ACFG_IOMUX_GRP_DDRPKS);
++ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DRAM_B4, ACFG_IOMUX_GRP_DRAM_B4);
++/*
++ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_INDDR, ACFG_IOMUX_GRP_INDDR);
++*/
++ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_PKEDDR, ACFG_IOMUX_GRP_PKEDDR);
++ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DDR_A0, ACFG_IOMUX_GRP_DDR_A0);
++ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DDR_A1, ACFG_IOMUX_GRP_DDR_A1);
++/*
++ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DDRAPUS, ACFG_IOMUX_GRP_DDRAPUS);
++ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_HYSDDR0, ACFG_IOMUX_GRP_HYSDDR0);
++ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_HYSDDR1, ACFG_IOMUX_GRP_HYSDDR1);
++ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_HYSDDR2, ACFG_IOMUX_GRP_HYSDDR2);
++ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_HVDDR, ACFG_IOMUX_GRP_HVDDR);
++ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_HYSDDR3, ACFG_IOMUX_GRP_HYSDDR3);
++*/
++ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DDR_SR_B0, ACFG_IOMUX_GRP_DDR_SR_B0);
++ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DDRAPKS, ACFG_IOMUX_GRP_DDRAPKS);
++ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DDR_SR_B1, ACFG_IOMUX_GRP_DDR_SR_B1);
++ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DDRPUS, ACFG_IOMUX_GRP_DDRPUS);
++ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DDR_SR_B2, ACFG_IOMUX_GRP_DDR_SR_B2);
++ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_PKEADDR, ACFG_IOMUX_GRP_PKEADDR);
++ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DDR_SR_B4, ACFG_IOMUX_GRP_DDR_SR_B4);
++/*
++ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_INMODE1, ACFG_IOMUX_GRP_INMODE1);
++*/
++ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DRAM_B0, ACFG_IOMUX_GRP_DRAM_B0);
++ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DRAM_B1, ACFG_IOMUX_GRP_DRAM_B1);
++ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DDR_SR_A0, ACFG_IOMUX_GRP_DDR_SR_A0);
++ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DRAM_B2, ACFG_IOMUX_GRP_DRAM_B2);
++ mxc_iomux_set_pad(MX51_PIN_CTL_GRP_DDR_SR_A1, ACFG_IOMUX_GRP_DDR_SR_A1);
++
++/* DDR2/mDDR Configs */
++
++/* Init DDR on CS0 */
++ writel((ACFG_SDRAM_ESDCTL_REGISTER_VAL&0x8FFFFFFF), &esdctl->esdctl0);
++ writel(DRR_PRECHARGE_CMD(0, 0), &esdctl->esdscr);
++ writel(DRR_AUTOREFRESH_CMD(0), &esdctl->esdscr);
++ writel(DRR_AUTOREFRESH_CMD(0), &esdctl->esdscr);
++ writel(DRR_LMR_CMD(0, 0, ACFG_DRR_MR_VAL), &esdctl->esdscr);
++ writel(DRR_LMR_CMD(0, 2, ACFG_DRR_EMR_VAL), &esdctl->esdscr);
++ writel(DDR_NOP_CMD(0), &esdctl->esdscr);
++ writel(ACFG_SDRAM_ESDCTL_REGISTER_VAL, &esdctl->esdctl0);
++ writel(ACFG_SDRAM_ESDCFG_REGISTER_VAL, &esdctl->esdcfg0);
++/* Init DDR on CS1 */
++ writel((ACFG_SDRAM_ESDCTL_REGISTER_VAL&0x8FFFFFFF), &esdctl->esdctl1);
++ writel(DRR_PRECHARGE_CMD(1, 0), &esdctl->esdscr);
++ writel(DRR_AUTOREFRESH_CMD(1), &esdctl->esdscr);
++ writel(DRR_AUTOREFRESH_CMD(1), &esdctl->esdscr);
++ writel(DRR_LMR_CMD(1, 0, ACFG_DRR_MR_VAL), &esdctl->esdscr);
++ writel(DRR_LMR_CMD(1, 2, ACFG_DRR_EMR_VAL), &esdctl->esdscr);
++ writel(DDR_NOP_CMD(1), &esdctl->esdscr);
++ writel(ACFG_SDRAM_ESDCTL_REGISTER_VAL, &esdctl->esdctl1);
++ writel(ACFG_SDRAM_ESDCFG_REGISTER_VAL, &esdctl->esdcfg1);
++
++ writel(ACFG_SDRAM_ESDMISC_REGISTER_VAL, &esdctl->esdmisc);
++ writel(0x00000000, &esdctl->esdscr);
++
++ writel(ACFG_SDRAM_ESDGPR_REGISTER_VAL, &esdctl->esdgpr);
++ writel(ACFG_SDRAM_ESDCDLY1_REGISTER_VAL, &esdctl->esdcdly1);
++ writel(ACFG_SDRAM_ESDCDLY2_REGISTER_VAL, &esdctl->esdcdly2);
++ writel(ACFG_SDRAM_ESDCDLY3_REGISTER_VAL, &esdctl->esdcdly3);
++ writel(ACFG_SDRAM_ESDCDLY4_REGISTER_VAL, &esdctl->esdcdly4);
++ writel(ACFG_SDRAM_ESDCDLY5_REGISTER_VAL, &esdctl->esdcdly5);
++}
++
++void setup_nfc(void)
++{
++ /*
++ * Configure iomux for NFC interface
++ */
++#define NAND_PAD47K_CFG (PAD_CTL_DRV_VOT_HIGH | PAD_CTL_HYS_NONE | \
++ PAD_CTL_PKE_ENABLE | PAD_CTL_47K_PU | \
++ PAD_CTL_DRV_HIGH)
++
++#define NAND_PAD100K_CFG (PAD_CTL_DRV_VOT_HIGH | PAD_CTL_HYS_NONE | \
++ PAD_CTL_PKE_ENABLE | PAD_CTL_100K_PU | \
++ PAD_CTL_DRV_HIGH)
++
++ mxc_request_iomux(MX51_PIN_NANDF_WE_B, IOMUX_CONFIG_ALT0);
++ mxc_iomux_set_pad(MX51_PIN_NANDF_WE_B, NAND_PAD47K_CFG);
++
++ mxc_request_iomux(MX51_PIN_NANDF_RE_B, IOMUX_CONFIG_ALT0);
++ mxc_iomux_set_pad(MX51_PIN_NANDF_RE_B, NAND_PAD47K_CFG);
++
++ mxc_request_iomux(MX51_PIN_NANDF_ALE, IOMUX_CONFIG_ALT0);
++ mxc_iomux_set_pad(MX51_PIN_NANDF_ALE, NAND_PAD47K_CFG);
++
++ mxc_request_iomux(MX51_PIN_NANDF_CLE, IOMUX_CONFIG_ALT0);
++ mxc_iomux_set_pad(MX51_PIN_NANDF_CLE, NAND_PAD47K_CFG);
++
++ mxc_request_iomux(MX51_PIN_NANDF_WP_B, IOMUX_CONFIG_ALT0);
++ mxc_iomux_set_pad(MX51_PIN_NANDF_WP_B, NAND_PAD100K_CFG);
++
++ mxc_request_iomux(MX51_PIN_NANDF_RB0, IOMUX_CONFIG_ALT0);
++ mxc_iomux_set_pad(MX51_PIN_NANDF_RB0, PAD_CTL_DRV_VOT_HIGH |
++ PAD_CTL_HYS_NONE | PAD_CTL_PKE_ENABLE |
++ PAD_CTL_PUE_PULL | PAD_CTL_100K_PU);
++
++ mxc_request_iomux(MX51_PIN_NANDF_CS0, IOMUX_CONFIG_ALT0);
++
++ /* MX51_PIN_NANDF_RDY_INT */
++
++ mxc_request_iomux(MX51_PIN_NANDF_D0, IOMUX_CONFIG_ALT0);
++ mxc_iomux_set_pad(MX51_PIN_NANDF_D0, NAND_PAD100K_CFG);
++
++ mxc_request_iomux(MX51_PIN_NANDF_D1, IOMUX_CONFIG_ALT0);
++ mxc_iomux_set_pad(MX51_PIN_NANDF_D1, NAND_PAD100K_CFG);
++
++ mxc_request_iomux(MX51_PIN_NANDF_D2, IOMUX_CONFIG_ALT0);
++ mxc_iomux_set_pad(MX51_PIN_NANDF_D2, NAND_PAD100K_CFG);
++
++ mxc_request_iomux(MX51_PIN_NANDF_D3, IOMUX_CONFIG_ALT0);
++ mxc_iomux_set_pad(MX51_PIN_NANDF_D3, NAND_PAD100K_CFG);
++
++ mxc_request_iomux(MX51_PIN_NANDF_D4, IOMUX_CONFIG_ALT0);
++ mxc_iomux_set_pad(MX51_PIN_NANDF_D4, NAND_PAD100K_CFG);
++
++ mxc_request_iomux(MX51_PIN_NANDF_D5, IOMUX_CONFIG_ALT0);
++ mxc_iomux_set_pad(MX51_PIN_NANDF_D5, NAND_PAD100K_CFG);
++
++ mxc_request_iomux(MX51_PIN_NANDF_D6, IOMUX_CONFIG_ALT0);
++ mxc_iomux_set_pad(MX51_PIN_NANDF_D6, NAND_PAD100K_CFG);
++
++ mxc_request_iomux(MX51_PIN_NANDF_D7, IOMUX_CONFIG_ALT0);
++ mxc_iomux_set_pad(MX51_PIN_NANDF_D7, NAND_PAD100K_CFG);
++}
++
++void board_init_f(ulong dummy)
++{
++ /* Set the stack pointer. */
++ asm volatile("mov sp, %0\n" : : "r"(CONFIG_SPL_STACK));
++
++ /* Clear the BSS. */
++ memset(__bss_start, 0, __bss_end - __bss_start);
++
++ /* Set global data pointer. */
++ gd = &gdata;
++
++ init_dram();
++
++ setup_nfc();
++
++ nand_boot();
++}
++
++
+--- uboot-custom/board/armadeus/apf51/imximage.cfg
++++ uboot-custom/board/armadeus/apf51/imximage.cfg
+@@ -0,0 +1,50 @@
++/*
++ * (C Copyright 2009
++ * Stefano Babic DENX Software Engineering sb...@de....
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not write to the Free Software
++ * Foundation Inc. 51 Franklin Street Fifth Floor Boston,
++ * MA 02110-1301 USA
++ *
++ * Refer docs/README.imxmage for more details about how-to configure
++ * and create imximage boot image
++ *
++ * The syntax is taken as close as possible with the kwbimage
++ */
++
++/* image version */
++IMAGE_VERSION 1
++
++/*
++ * Boot Device : one of
++ * spi, sd (the board has no nand neither onenand)
++ */
++BOOT_FROM nand
++
++/*
++ * Device Configuration Data (DCD)
++ *
++ * Each entry must have the format:
++ * Addr-type Address Value
++ *
++ * where:
++ * Addr-type register length (1,2 or 4 bytes)
++ * Address absolute address of the register
++ * value value to be stored in the register
++ */
++
++
+--- uboot-custom/board/armadeus/apf51/Makefile
++++ uboot-custom/board/armadeus/apf51/Makefile
+@@ -24,7 +24,11 @@ include $(TOPDIR)/config.mk
+
+ LIB = $(obj)lib$(BOARD).o
+
++ifndef CONFIG_SPL_BUILD
+ COBJS := apf51.o fpga.o
++else
++COBJS := apf51_spl.o
++endif
+
+ SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+ OBJS := $(addprefix $(obj),$(COBJS))
+--- uboot-custom/drivers/mtd/nand/mxc_nand.c
++++ uboot-custom/drivers/mtd/nand/mxc_nand.c
+@@ -1108,7 +1108,39 @@ void mxc_nand_command(struct mtd_info *m
+
+ break;
+ #ifdef CONFIG_CMD_NAND_LOCK_UNLOCK
+- case NAND_CMD_LOCK:
++#if defined(MXC_NFC_V3_2)
++ case NAND_CMD_LOCK:
++ /* Lock Block whole NAND only supported */
++ writenfc(NFC_V3_WRPROT_BLS_UNLOCK | NFC_V3_WRPROT_LOCK,
++ &host->ip_regs->wrprot);
++ return;
++ case NAND_CMD_LOCK_TIGHT:
++ /* Lock Tight whole NAND only supported */
++ writenfc(NFC_V3_WRPROT_BLS_UNLOCK | NFC_V3_WRPROT_LOCKTIGHT,
++ &host->ip_regs->wrprot);
++ return;
++ case NAND_CMD_UNLOCK1:
++ /* 64 pages per block only */
++ writenfc(page_addr>>6,
++ &host->ip_regs->wrprot_unlock_blkaddr);
++ return;
++ case NAND_CMD_UNLOCK2:{
++ int temp = readnfc(&host->ip_regs->wrprot_unlock_blkaddr)
++ & 0x0000FFFF;
++ writenfc(((page_addr>>6)<<16) | temp ,
++ &host->ip_regs->wrprot_unlock_blkaddr);
++ /* Unlock Block Command for given address range */
++ writenfc(NFC_V3_WRPROT_BLS_UNLOCK | NFC_V3_WRPROT_UNLOCK,
++ &host->ip_regs->wrprot);
++ }
++ return;
++ case NAND_CMD_LOCK_STATUS:
++ host->col_addr = 0;
++ host->spare_only = false;
++ return;
++
++#else /* not defined(MXC_NFC_V3_2) */
++ case NAND_CMD_LOCK:
+ /* Blocks to be unlocked */
+ writew(-1, &host->regs->unlockstart_blkaddr);
+ writew(-1, &host->regs->unlockend_blkaddr);
+@@ -1150,6 +1182,7 @@ void mxc_nand_command(struct mtd_info *m
+ writew(readw(&host->regs->nf_wrprst) & ~NFC_WRPR_US, &host->regs->main_area[0][0]);
+ }
+ return;
++#endif /* not defined(MXC_NFC_V3_2) */
+ #endif
+ }
+
+--- uboot-custom/drivers/mtd/nand/mxc_nand.h
++++ uboot-custom/drivers/mtd/nand/mxc_nand.h
+@@ -207,6 +207,8 @@ struct mxc_nand_ip_regs {
+ #define NFC_V3_CONFIG3_NO_SDMA (1 << 20)
+
+ #define NFC_V3_WRPROT_UNLOCK (1 << 2)
++#define NFC_V3_WRPROT_LOCK (1 << 1)
++#define NFC_V3_WRPROT_LOCKTIGHT (1 << 0)
+ #define NFC_V3_WRPROT_BLS_UNLOCK (2 << 6)
+
+ #define NFC_V3_IPC_CREQ (1 << 0)
hooks/post-receive
--
armadeus
|
|
From: Fabien M <fa...@us...> - 2013-07-22 15:00:31
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "armadeus".
The branch, master has been updated
via 68e5a35d59d6fa58958d8003cf7a0b86276aa2b9 (commit)
from 6e41bce7fdb32f98e4c19700bf34234864c8286f (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 68e5a35d59d6fa58958d8003cf7a0b86276aa2b9
Author: Fabien Marteau <fab...@ar...>
Date: Mon Jul 22 16:59:19 2013 +0200
kernel:mcp7940x: adding driver for kernel 2.6.38 and 2.6.35
-----------------------------------------------------------------------
Summary of changes:
.../464-armadeus-add_mcp7940x_rtc_driver.patch | 540 +-------------------
...4b-armadeus-add_mcp7940x_kconfig_makefile.patch | 39 ++
.../450-armadeus-add_mcp7940x_rtc_driver.patch | 358 +-------------
.../450b-armadeus-add_mcp7940x_rtc_driver.patch | 40 ++
.../000-armadeus-add_mcp7940x_rtc_driver.patch} | 38 +--
5 files changed, 86 insertions(+), 929 deletions(-)
mode change 100644 => 120000 patches/linux/2.6.35/464-armadeus-add_mcp7940x_rtc_driver.patch
create mode 100644 patches/linux/2.6.35/464b-armadeus-add_mcp7940x_kconfig_makefile.patch
mode change 100644 => 120000 patches/linux/2.6.38/450-armadeus-add_mcp7940x_rtc_driver.patch
create mode 100644 patches/linux/2.6.38/450b-armadeus-add_mcp7940x_rtc_driver.patch
copy patches/linux/{2.6.35/464-armadeus-add_mcp7940x_rtc_driver.patch => common/000-armadeus-add_mcp7940x_rtc_driver.patch} (92%)
diff --git a/patches/linux/2.6.35/464-armadeus-add_mcp7940x_rtc_driver.patch b/patches/linux/2.6.35/464-armadeus-add_mcp7940x_rtc_driver.patch
deleted file mode 100644
index fe63f02..0000000
--- a/patches/linux/2.6.35/464-armadeus-add_mcp7940x_rtc_driver.patch
+++ /dev/null
@@ -1,539 +0,0 @@
-Index: linux-2.6.35.3/drivers/rtc/rtc-mcp7940x.c
-===================================================================
---- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ linux-2.6.35.3/drivers/rtc/rtc-mcp7940x.c 2013-07-22 14:48:37.045061568 +0200
-@@ -0,0 +1,501 @@
-+/*
-+ * RTC client/driver for the Microchip MCP7940x Real-Time Clock over I2C
-+ *
-+ * Based on code by Scott Wood <sco...@fr...>
-+ * which was based on code by Randy Vinson <rv...@mv...>,
-+ * which was based on the m41t00.c by Mark Greer <mg...@mv...>.
-+ *
-+ * Copyright (C) 2012 Armadeus Systems
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2. This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+/*
-+ * It would be more efficient to use i2c msgs/i2c_transfer directly but, as
-+ * recommened in .../Documentation/i2c/writing-clients section
-+ * "Sending and receiving", using SMBus level communication is preferred.
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/interrupt.h>
-+#include <linux/i2c.h>
-+#include <linux/rtc.h>
-+#include <linux/bcd.h>
-+#include <linux/slab.h>
-+
-+/* Time of Day */
-+#define MCP7940X_REG_TD_SECONDS 0x00
-+#define MCP7940X_REG_TD_MINUTES 0x01
-+#define MCP7940X_REG_TD_HOURS 0x02
-+#define MCP7940X_REG_TD_DAY 0x03
-+#define MCP7940X_REG_TD_DATE 0x04
-+#define MCP7940X_REG_TD_MONTH 0x05
-+#define MCP7940X_REG_TD_YEAR 0x06
-+/* Controls */
-+#define MCP7940X_REG_CONTROL 0x07
-+#define MCP7940X_REG_CALIBRATION 0x08
-+#define MCP7940X_REG_UNLOCK_ID 0x08
-+/* Alarm 0 */
-+
-+#define MCP7940X_REG_ALRM0_SECONDS 0x0A
-+#define MCP7940X_REG_ALRM0_MINUTES 0x0B
-+#define MCP7940X_REG_ALRM0_HOURS 0x0C
-+#define MCP7940X_REG_ALRM0_DAY 0x0D
-+#define MCP7940X_REG_ALRM0_DATE 0x0E
-+#define MCP7940X_REG_ALRM0_MONTH 0x0F
-+/* Alarm 1 */
-+#define MCP7940X_REG_ALRM1_SECONDS 0x11
-+#define MCP7940X_REG_ALRM1_MINUTES 0x12
-+#define MCP7940X_REG_ALRM1_HOURS 0x13
-+#define MCP7940X_REG_ALRM1_DAY 0x14
-+#define MCP7940X_REG_ALRM1_DATE 0x15
-+#define MCP7940X_REG_ALRM1_MONTH 0x16
-+/* Timestamp 0 */
-+#define MCP7940X_REG_TS0_MINUTES 0x18
-+#define MCP7940X_REG_TS0_HOURS 0x19
-+#define MCP7940X_REG_TS0_DATE 0x1A
-+#define MCP7940X_REG_TS0_MONTH 0x1B
-+/* Timestamp 1 */
-+#define MCP7940X_REG_TS1_MINUTES 0x1C
-+#define MCP7940X_REG_TS1_HOURS 0x1D
-+#define MCP7940X_REG_TS1_DATE 0x1E
-+#define MCP7940X_REG_TS1_MONTH 0x1F
-+
-+
-+/* bits definitions */
-+#define MCP7940X_START_BITS 0x80
-+#define MCP7940X_24H_BITS 0x40
-+#define MCP7940X_VBATEN 0x08
-+
-+static const struct i2c_device_id mcp7940x_id[] = {
-+ { "mcp79400", 0 }, /* no unique ID */
-+ { "mcp79401", 1 }, /* EUI-48 */
-+ { "mcp79402", 2 }, /* EUI-64 */
-+ { }
-+};
-+MODULE_DEVICE_TABLE(i2c, mcp7940x_id);
-+
-+struct mcp7940x {
-+ struct rtc_device *rtc;
-+ struct i2c_client *client;
-+ int exiting;
-+ int irq;
-+ unsigned int irqen;
-+ int alrm_sec;
-+ int alrm_min;
-+ int alrm_hour;
-+ int alrm_mday;
-+ spinlock_t lock;
-+};
-+
-+static struct i2c_driver mcp7940x_driver;
-+
-+static void mcp7940x_reg_dump(struct device *dev)
-+{
-+ struct i2c_client *client = to_i2c_client(dev);
-+
-+ printk(" MCP7940X_REG_TD_SECONDS (0x%02X) -> 0x%02X\n", MCP7940X_REG_TD_SECONDS ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TD_SECONDS));
-+ printk(" MCP7940X_REG_TD_MINUTES (0x%02X) -> 0x%02X\n", MCP7940X_REG_TD_MINUTES ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TD_MINUTES));
-+ printk(" MCP7940X_REG_TD_HOURS (0x%02X) -> 0x%02X\n", MCP7940X_REG_TD_HOURS ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TD_HOURS));
-+ printk(" MCP7940X_REG_TD_DAY (0x%02X) -> 0x%02X\n", MCP7940X_REG_TD_DAY ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TD_DAY));
-+ printk(" MCP7940X_REG_TD_DATE (0x%02X) -> 0x%02X\n", MCP7940X_REG_TD_DATE ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TD_DATE));
-+ printk(" MCP7940X_REG_TD_MONTH (0x%02X) -> 0x%02X\n", MCP7940X_REG_TD_MONTH ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TD_MONTH));
-+ printk(" MCP7940X_REG_TD_YEAR (0x%02X) -> 0x%02X\n", MCP7940X_REG_TD_YEAR ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TD_YEAR));
-+ printk(" MCP7940X_REG_CONTROL (0x%02X) -> 0x%02X\n", MCP7940X_REG_CONTROL ,i2c_smbus_read_byte_data(client,MCP7940X_REG_CONTROL));
-+ printk(" MCP7940X_REG_CALIBRATION (0x%02X) -> 0x%02X\n", MCP7940X_REG_CALIBRATION ,i2c_smbus_read_byte_data(client,MCP7940X_REG_CALIBRATION));
-+ printk(" MCP7940X_REG_UNLOCK_ID (0x%02X) -> 0x%02X\n", MCP7940X_REG_UNLOCK_ID ,i2c_smbus_read_byte_data(client,MCP7940X_REG_UNLOCK_ID));
-+ printk(" MCP7940X_REG_ALRM0_SECONDS (0x%02X) -> 0x%02X\n", MCP7940X_REG_ALRM0_SECONDS,i2c_smbus_read_byte_data(client,MCP7940X_REG_ALRM0_SECONDS));
-+ printk(" MCP7940X_REG_ALRM0_MINUTES (0x%02X) -> 0x%02X\n", MCP7940X_REG_ALRM0_MINUTES,i2c_smbus_read_byte_data(client,MCP7940X_REG_ALRM0_MINUTES));
-+ printk(" MCP7940X_REG_ALRM0_HOURS (0x%02X) -> 0x%02X\n", MCP7940X_REG_ALRM0_HOURS ,i2c_smbus_read_byte_data(client,MCP7940X_REG_ALRM0_HOURS));
-+ printk(" MCP7940X_REG_ALRM0_DAY (0x%02X) -> 0x%02X\n", MCP7940X_REG_ALRM0_DAY ,i2c_smbus_read_byte_data(client,MCP7940X_REG_ALRM0_DAY));
-+ printk(" MCP7940X_REG_ALRM0_DATE (0x%02X) -> 0x%02X\n", MCP7940X_REG_ALRM0_DATE ,i2c_smbus_read_byte_data(client,MCP7940X_REG_ALRM0_DATE));
-+ printk(" MCP7940X_REG_ALRM0_MONTH (0x%02X) -> 0x%02X\n", MCP7940X_REG_ALRM0_MONTH ,i2c_smbus_read_byte_data(client,MCP7940X_REG_ALRM0_MONTH));
-+ printk(" MCP7940X_REG_ALRM1_SECONDS (0x%02X) -> 0x%02X\n", MCP7940X_REG_ALRM1_SECONDS,i2c_smbus_read_byte_data(client,MCP7940X_REG_ALRM1_SECONDS));
-+ printk(" MCP7940X_REG_ALRM1_MINUTES (0x%02X) -> 0x%02X\n", MCP7940X_REG_ALRM1_MINUTES,i2c_smbus_read_byte_data(client,MCP7940X_REG_ALRM1_MINUTES));
-+ printk(" MCP7940X_REG_ALRM1_HOURS (0x%02X) -> 0x%02X\n", MCP7940X_REG_ALRM1_HOURS ,i2c_smbus_read_byte_data(client,MCP7940X_REG_ALRM1_HOURS));
-+ printk(" MCP7940X_REG_ALRM1_DAY (0x%02X) -> 0x%02X\n", MCP7940X_REG_ALRM1_DAY ,i2c_smbus_read_byte_data(client,MCP7940X_REG_ALRM1_DAY));
-+ printk(" MCP7940X_REG_ALRM1_DATE (0x%02X) -> 0x%02X\n", MCP7940X_REG_ALRM1_DATE ,i2c_smbus_read_byte_data(client,MCP7940X_REG_ALRM1_DATE));
-+ printk(" MCP7940X_REG_ALRM1_MONTH (0x%02X) -> 0x%02X\n", MCP7940X_REG_ALRM1_MONTH ,i2c_smbus_read_byte_data(client,MCP7940X_REG_ALRM1_MONTH));
-+ printk(" MCP7940X_REG_TS0_MINUTES (0x%02X) -> 0x%02X\n", MCP7940X_REG_TS0_MINUTES ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TS0_MINUTES));
-+ printk(" MCP7940X_REG_TS0_HOURS (0x%02X) -> 0x%02X\n", MCP7940X_REG_TS0_HOURS ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TS0_HOURS));
-+ printk(" MCP7940X_REG_TS0_DATE (0x%02X) -> 0x%02X\n", MCP7940X_REG_TS0_DATE ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TS0_DATE));
-+ printk(" MCP7940X_REG_TS0_MONTH (0x%02X) -> 0x%02X\n", MCP7940X_REG_TS0_MONTH ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TS0_MONTH));
-+ printk(" MCP7940X_REG_TS1_MINUTES (0x%02X) -> 0x%02X\n", MCP7940X_REG_TS1_MINUTES ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TS1_MINUTES));
-+ printk(" MCP7940X_REG_TS1_HOURS (0x%02X) -> 0x%02X\n", MCP7940X_REG_TS1_HOURS ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TS1_HOURS));
-+ printk(" MCP7940X_REG_TS1_DATE (0x%02X) -> 0x%02X\n", MCP7940X_REG_TS1_DATE ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TS1_DATE));
-+ printk(" MCP7940X_REG_TS1_MONTH (0x%02X) -> 0x%02X\n", MCP7940X_REG_TS1_MONTH ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TS1_MONTH));
-+}
-+
-+static int mcp7940x_read_time(struct device *dev, struct rtc_time *time)
-+{
-+ struct i2c_client *client = to_i2c_client(dev);
-+ int ret;
-+
-+ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_TD_SECONDS);
-+ if (ret < 0)
-+ return ret;
-+ time->tm_sec = ((ret&0x70)>>4)*10 + (ret&0x0F);
-+
-+ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_TD_MINUTES);
-+ if (ret < 0)
-+ return ret;
-+ time->tm_min = ((ret&0x70)>>4)*10 + (ret&0x0F);
-+
-+ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_TD_HOURS);
-+ if (ret < 0)
-+ return ret;
-+ time->tm_hour = ((ret&0x30)>>4)*10 + (ret&0x0F);
-+
-+ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_TD_DATE);
-+ if (ret < 0)
-+ return ret;
-+ time->tm_mday = ((ret&0x30)>>4)*10 + (ret&0x0F);
-+
-+ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_TD_MONTH);
-+ if (ret < 0)
-+ return ret;
-+ time->tm_mon = (((ret&0x10)>>4)*10 + (ret&0x0F)) - 1;
-+
-+ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_TD_YEAR);
-+ if (ret < 0)
-+ return ret;
-+ time->tm_year = ((((ret&0xF0)>>4)*10 + (ret&0x0F))) + 100;
-+
-+ return 0;
-+}
-+
-+static int mcp7940x_set_time(struct device *dev, struct rtc_time *time)
-+{
-+ struct i2c_client *client = to_i2c_client(dev);
-+ int ret;
-+ int value;
-+ int day;
-+
-+ value = ((((time->tm_sec/10)&0x07)<<4)|(time->tm_sec % 10))|
-+ MCP7940X_START_BITS;
-+ ret = i2c_smbus_write_byte_data(client,
-+ MCP7940X_REG_TD_SECONDS,
-+ value);
-+ if (ret < 0)
-+ return ret;
-+
-+ value = (((time->tm_min/10)&0x07)<<4)|(time->tm_min % 10);
-+ ret = i2c_smbus_write_byte_data(client,
-+ MCP7940X_REG_TD_MINUTES,
-+ value);
-+ if (ret < 0)
-+ return ret;
-+
-+ value = ((((time->tm_hour/10)&0x03)<<4)|(time->tm_hour % 10));
-+ ret = i2c_smbus_write_byte_data(client,
-+ MCP7940X_REG_TD_HOURS,
-+ value);
-+ if (ret < 0)
-+ return ret;
-+
-+ value = (((time->tm_mday/10)&0x03)<<4)|(time->tm_mday % 10);
-+ ret = i2c_smbus_write_byte_data(client,
-+ MCP7940X_REG_TD_DATE,
-+ value);
-+ if (ret < 0)
-+ return ret;
-+
-+ /*****/
-+ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_TD_DAY);
-+ if (ret < 0)
-+ return ret;
-+ day = (time->tm_wday == 0)?7:time->tm_wday;
-+ ret = i2c_smbus_write_byte_data(client,
-+ MCP7940X_REG_TD_DAY,
-+ (ret&0xF8)|day);
-+ if (ret < 0)
-+ return ret;
-+ /*****/
-+
-+ value = ((((time->tm_mon+1)/10)&0x01)<<4)|((time->tm_mon+1) % 10);
-+ ret = i2c_smbus_write_byte_data(client,
-+ MCP7940X_REG_TD_MONTH,
-+ value);
-+ if (ret < 0)
-+ return ret;
-+
-+ value = ((((time->tm_year-100)/10)&0x0F)<<4)|((time->tm_year-100) % 10);
-+ ret = i2c_smbus_write_byte_data(client,
-+ MCP7940X_REG_TD_YEAR,
-+ value);
-+ if (ret < 0)
-+ return ret;
-+
-+ return 0;
-+}
-+
-+//struct rtc_wkalrm {
-+// unsigned char enabled; /* 0 = alarm disabled, 1 = alarm enabled */
-+// unsigned char pending; /* 0 = alarm not pending, 1 = alarm pending */
-+// struct rtc_time time; /* time the alarm is set to */
-+//};
-+
-+static int mcp79400_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm) {
-+ struct i2c_client *client = to_i2c_client(dev);
-+ struct rtc_time *time = &wkalrm->time;
-+ int ret;
-+
-+ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_ALRM0_SECONDS);
-+ if (ret < 0)
-+ return ret;
-+ time->tm_sec = ((ret&0x70)>>4)*10 + (ret&0x0F);
-+
-+ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_ALRM0_MINUTES);
-+ if (ret < 0)
-+ return ret;
-+ time->tm_min = ((ret&0x70)>>4)*10 + (ret&0x0F);
-+
-+ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_ALRM0_HOURS);
-+ if (ret < 0)
-+ return ret;
-+ time->tm_hour = ((ret&0x30)>>4)*10 + (ret&0x0F);
-+
-+ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_ALRM0_DATE);
-+ if (ret < 0)
-+ return ret;
-+ time->tm_mday = ((ret&0x30)>>4)*10 + (ret&0x0F);
-+
-+ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_ALRM0_MONTH);
-+ if (ret < 0)
-+ return ret;
-+ time->tm_mon = (((ret&0x10)>>4)*10 + (ret&0x0F)) - 1;
-+
-+ time->tm_year = -1;
-+ time->tm_wday = -1;
-+ time->tm_yday = -1;
-+ time->tm_isdst= -1;
-+
-+ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_CONTROL);
-+ if (ret < 0)
-+ return ret;
-+ wkalrm->enabled = ((ret&0x10)>>4);
-+
-+ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_ALRM0_DAY);
-+ if (ret < 0)
-+ return ret;
-+ wkalrm->pending = ((ret&0x08)>>3);
-+
-+ return 0;
-+}
-+
-+static int mcp79400_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm) {
-+ struct i2c_client *client = to_i2c_client(dev);
-+ struct rtc_time *time = &wkalrm->time;
-+ int ret;
-+ int value;
-+ int day;
-+
-+ /* clear pending alarm */
-+ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_ALRM0_DAY);
-+ if (ret < 0)
-+ return ret;
-+ day = (time->tm_wday == 0)?7:time->tm_wday;
-+ ret = i2c_smbus_write_byte_data(client,
-+ MCP7940X_REG_ALRM0_DAY,
-+ ((ret|0x70)&0x70)|day);
-+ if (ret < 0)
-+ return ret;
-+
-+ value = ((((time->tm_sec/10)&0x07)<<4)|(time->tm_sec % 10))|
-+ MCP7940X_START_BITS;
-+ ret = i2c_smbus_write_byte_data(client,
-+ MCP7940X_REG_ALRM0_SECONDS,
-+ value);
-+ if (ret < 0)
-+ return ret;
-+
-+ value = (((time->tm_min/10)&0x07)<<4)|(time->tm_min % 10);
-+ ret = i2c_smbus_write_byte_data(client,
-+ MCP7940X_REG_ALRM0_MINUTES,
-+ value);
-+ if (ret < 0)
-+ return ret;
-+
-+ value = ((((time->tm_hour/10)&0x03)<<4)|(time->tm_hour % 10));
-+ ret = i2c_smbus_write_byte_data(client,
-+ MCP7940X_REG_ALRM0_HOURS,
-+ value);
-+ if (ret < 0)
-+ return ret;
-+
-+ value = (((time->tm_mday/10)&0x03)<<4)|(time->tm_mday % 10);
-+ ret = i2c_smbus_write_byte_data(client,
-+ MCP7940X_REG_ALRM0_DATE,
-+ value);
-+ if (ret < 0)
-+ return ret;
-+
-+ value = ((((time->tm_mon+1)/10)&0x01)<<4)|((time->tm_mon+1) % 10);
-+ ret = i2c_smbus_write_byte_data(client,
-+ MCP7940X_REG_ALRM0_MONTH,
-+ value);
-+ if (ret < 0)
-+ return ret;
-+
-+ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_CONTROL);
-+ if (ret < 0)
-+ return ret;
-+ if (wkalrm->enabled) {
-+ ret = i2c_smbus_write_byte_data(client,
-+ MCP7940X_REG_CONTROL,
-+ ret | 0x10);
-+ } else {
-+ ret = i2c_smbus_write_byte_data(client,
-+ MCP7940X_REG_CONTROL,
-+ ret & ~(0x10));
-+ }
-+ if (ret < 0)
-+ return ret;
-+
-+ return 0;
-+}
-+
-+
-+/* TODO: see rtc-ds1511.c */
-+static int mcp79400_alarm_irq_enable(struct device *dev, unsigned int enabled)
-+{
-+ return 0;
-+}
-+
-+static int mcp79400_update_irq_enable(struct device *dev, unsigned int enabled)
-+{
-+ return 0;
-+}
-+
-+
-+static const struct rtc_class_ops mcp7940x_rtc_ops = {
-+ .read_time = mcp7940x_read_time,
-+ .set_time = mcp7940x_set_time,
-+ .read_alarm = mcp79400_read_alarm, /* Use ALARM0 only */
-+ .set_alarm = mcp79400_set_alarm,
-+ .alarm_irq_enable= mcp79400_alarm_irq_enable,
-+ .update_irq_enable=mcp79400_update_irq_enable,
-+};
-+
-+static int mcp7940x_probe(struct i2c_client *client,
-+ const struct i2c_device_id *id)
-+{
-+ struct mcp7940x *mcp7940x;
-+ int ret;
-+
-+ mcp7940x = kzalloc(sizeof(struct mcp7940x), GFP_KERNEL);
-+ if (!mcp7940x)
-+ return -ENOMEM;
-+
-+ mcp7940x->client = client;
-+ i2c_set_clientdata(client, mcp7940x);
-+
-+ ret = i2c_smbus_read_byte_data(mcp7940x->client, MCP7940X_REG_TD_HOURS);
-+ if (ret < 0)
-+ goto out_free;
-+
-+ /* set rtc to 24h format */
-+ if ((ret & MCP7940X_24H_BITS)) {
-+ ret = i2c_smbus_write_byte_data(mcp7940x->client,
-+ MCP7940X_REG_TD_HOURS,
-+ (u8)(ret & ~MCP7940X_24H_BITS));
-+ if(ret < 0)
-+ goto out_free;
-+ }
-+
-+ ret = i2c_smbus_read_byte_data(mcp7940x->client, MCP7940X_REG_TD_DAY);
-+ if (ret < 0)
-+ goto out_free;
-+ /* Use external baterie if Vcc fails */
-+ if (!(ret & MCP7940X_VBATEN)) {
-+ ret = i2c_smbus_write_byte_data(mcp7940x->client,
-+ MCP7940X_REG_TD_DAY,
-+ (u8)(ret | MCP7940X_VBATEN));
-+ if(ret < 0)
-+ goto out_free;
-+ }
-+
-+ ret = i2c_smbus_read_byte_data(mcp7940x->client, MCP7940X_REG_TD_SECONDS);
-+ if (ret < 0)
-+ goto out_free;
-+
-+ /* If time counter not launched, launch it */
-+ if (!(ret & MCP7940X_START_BITS)) {
-+ ret = i2c_smbus_write_byte_data(mcp7940x->client,
-+ MCP7940X_REG_TD_SECONDS,
-+ (u8)(ret | MCP7940X_START_BITS));
-+ if(ret < 0)
-+ goto out_free;
-+
-+ }
-+
-+ device_set_wakeup_capable(&client->dev, 1);
-+ mcp7940x->rtc = rtc_device_register(client->name, &client->dev,
-+ &mcp7940x_rtc_ops, THIS_MODULE);
-+ if (IS_ERR(mcp7940x->rtc)) {
-+ ret = PTR_ERR(mcp7940x->rtc);
-+ dev_err(&client->dev, "unable to register the class device\n");
-+ goto out_free;
-+ }
-+
-+ return 0;
-+
-+out_free:
-+ kfree(mcp7940x);
-+ return ret;
-+}
-+
-+static int __devexit mcp7940x_remove(struct i2c_client *client)
-+{
-+ struct mcp7940x *mcp7940x = i2c_get_clientdata(client);
-+
-+ rtc_device_unregister(mcp7940x->rtc);
-+ kfree(mcp7940x);
-+ return 0;
-+}
-+
-+#ifdef CONFIG_PM
-+static int mcp7940x_suspend(struct i2c_client *client, pm_message_t state)
-+{
-+ return 0;
-+}
-+
-+static int mcp7940x_resume(struct i2c_client *client)
-+{
-+ return 0;
-+}
-+#else
-+#define mcp7940x_suspend NULL
-+#define mcp7940x_resume NULL
-+#endif
-+
-+static struct i2c_driver mcp7940x_driver = {
-+ .driver = {
-+ .name = "rtc-mcp7940x",
-+ .owner = THIS_MODULE,
-+ },
-+ .probe = mcp7940x_probe,
-+ .suspend = mcp7940x_suspend,
-+ .resume = mcp7940x_resume,
-+ .remove = __devexit_p(mcp7940x_remove),
-+ .id_table = mcp7940x_id,
-+};
-+
-+static int __init mcp7940x_init(void)
-+{
-+ return i2c_add_driver(&mcp7940x_driver);
-+}
-+
-+static void __exit mcp7940x_exit(void)
-+{
-+ i2c_del_driver(&mcp7940x_driver);
-+}
-+
-+module_init(mcp7940x_init);
-+module_exit(mcp7940x_exit);
-+
-+MODULE_AUTHOR("Fabien Marteau <fab...@ar...>");
-+MODULE_DESCRIPTION("Microchip mcp7940x RTC Driver");
-+MODULE_LICENSE("GPL");
-Index: linux-2.6.35.3/drivers/rtc/Kconfig
-===================================================================
---- linux-2.6.35.3.orig/drivers/rtc/Kconfig 2013-07-22 10:15:39.469490871 +0200
-+++ linux-2.6.35.3/drivers/rtc/Kconfig 2013-07-22 15:07:23.917032031 +0200
-@@ -245,6 +245,16 @@
- This driver can also be built as a module. If so, the module
- will be called rtc-m41t80.
-
-+config RTC_DRV_MCP7940X
-+ tristate "Microchip MCP7940X"
-+ depends on RTC_CLASS && I2C
-+ help
-+ If you say yes here you get support for Microchip
-+ MCP7940x real-time clock chips.
-+
-+ This driver can also be built as a module. If so, the module
-+ will be called rtc-mcp7940x.
-+
- config RTC_DRV_M41T80_WDT
- bool "ST M41T65/M41T80 series RTC watchdog timer"
- depends on RTC_DRV_M41T80
-Index: linux-2.6.35.3/drivers/rtc/Makefile
-===================================================================
---- linux-2.6.35.3.orig/drivers/rtc/Makefile 2013-07-22 10:15:39.469490871 +0200
-+++ linux-2.6.35.3/drivers/rtc/Makefile 2013-07-22 15:08:09.837030826 +0200
-@@ -57,6 +57,7 @@
- obj-$(CONFIG_RTC_DRV_MAX8925) += rtc-max8925.o
- obj-$(CONFIG_RTC_DRV_MAX6902) += rtc-max6902.o
- obj-$(CONFIG_RTC_DRV_MC13783) += rtc-mc13783.o
-+obj-$(CONFIG_RTC_DRV_MCP7940X) += rtc-mcp7940x.o
- obj-$(CONFIG_RTC_DRV_MSM6242) += rtc-msm6242.o
- obj-$(CONFIG_RTC_DRV_MPC5121) += rtc-mpc5121.o
- obj-$(CONFIG_RTC_DRV_MV) += rtc-mv.o
diff --git a/patches/linux/2.6.35/464-armadeus-add_mcp7940x_rtc_driver.patch b/patches/linux/2.6.35/464-armadeus-add_mcp7940x_rtc_driver.patch
new file mode 120000
index 0000000..0cb4398
--- /dev/null
+++ b/patches/linux/2.6.35/464-armadeus-add_mcp7940x_rtc_driver.patch
@@ -0,0 +1 @@
+../common/000-armadeus-add_mcp7940x_rtc_driver.patch
\ No newline at end of file
diff --git a/patches/linux/2.6.35/464b-armadeus-add_mcp7940x_kconfig_makefile.patch b/patches/linux/2.6.35/464b-armadeus-add_mcp7940x_kconfig_makefile.patch
new file mode 100644
index 0000000..bda160b
--- /dev/null
+++ b/patches/linux/2.6.35/464b-armadeus-add_mcp7940x_kconfig_makefile.patch
@@ -0,0 +1,39 @@
+Add mcp79400 Linux driver on 2.6.35.x kernel
+
+Signed-off-by: Fabien Marteau <fab...@ar...>
+
+---
+
+Index: linux-2.6.35.3/drivers/rtc/Kconfig
+===================================================================
+--- linux-2.6.35.3.orig/drivers/rtc/Kconfig 2013-07-22 10:15:39.469490871 +0200
++++ linux-2.6.35.3/drivers/rtc/Kconfig 2013-07-22 15:07:23.917032031 +0200
+@@ -245,6 +245,16 @@
+ This driver can also be built as a module. If so, the module
+ will be called rtc-m41t80.
+
++config RTC_DRV_MCP7940X
++ tristate "Microchip MCP7940X"
++ depends on RTC_CLASS && I2C
++ help
++ If you say yes here you get support for Microchip
++ MCP7940x real-time clock chips.
++
++ This driver can also be built as a module. If so, the module
++ will be called rtc-mcp7940x.
++
+ config RTC_DRV_M41T80_WDT
+ bool "ST M41T65/M41T80 series RTC watchdog timer"
+ depends on RTC_DRV_M41T80
+Index: linux-2.6.35.3/drivers/rtc/Makefile
+===================================================================
+--- linux-2.6.35.3.orig/drivers/rtc/Makefile 2013-07-22 10:15:39.469490871 +0200
++++ linux-2.6.35.3/drivers/rtc/Makefile 2013-07-22 15:08:09.837030826 +0200
+@@ -57,6 +57,7 @@
+ obj-$(CONFIG_RTC_DRV_MAX8925) += rtc-max8925.o
+ obj-$(CONFIG_RTC_DRV_MAX6902) += rtc-max6902.o
+ obj-$(CONFIG_RTC_DRV_MC13783) += rtc-mc13783.o
++obj-$(CONFIG_RTC_DRV_MCP7940X) += rtc-mcp7940x.o
+ obj-$(CONFIG_RTC_DRV_MSM6242) += rtc-msm6242.o
+ obj-$(CONFIG_RTC_DRV_MPC5121) += rtc-mpc5121.o
+ obj-$(CONFIG_RTC_DRV_MV) += rtc-mv.o
diff --git a/patches/linux/2.6.38/450-armadeus-add_mcp7940x_rtc_driver.patch b/patches/linux/2.6.38/450-armadeus-add_mcp7940x_rtc_driver.patch
deleted file mode 100644
index d3ac48d..0000000
--- a/patches/linux/2.6.38/450-armadeus-add_mcp7940x_rtc_driver.patch
+++ /dev/null
@@ -1,357 +0,0 @@
-Add mcp79400 Linux driver
-
-Signed-off-by: Fabien Marteau <fab...@ar...>
-
----
-
-Index: linux-2.6.38.8/drivers/rtc/Kconfig
-===================================================================
---- linux-2.6.38.8.orig/drivers/rtc/Kconfig 2012-11-16 17:52:01.000000000 +0100
-+++ linux-2.6.38.8/drivers/rtc/Kconfig 2012-11-16 17:54:51.000000000 +0100
-@@ -282,6 +282,17 @@
- If you say Y here you will get support for the
- watchdog timer in the ST M41T60 and M41T80 RTC chips series.
-
-+config RTC_DRV_MCP7940X
-+ tristate "Microchip MCP7940X"
-+ depends on RTC_CLASS && I2C
-+ help
-+ If you say yes here you get support for Microchip
-+ MCP7940x real-time clock chips.
-+ The alarm functionality is not supported.
-+
-+ This driver can also be built as a module. If so, the module
-+ will be called rtc-mcp7940x.
-+
- config RTC_DRV_BQ32K
- tristate "TI BQ32000"
- help
-Index: linux-2.6.38.8/drivers/rtc/Makefile
-===================================================================
---- linux-2.6.38.8.orig/drivers/rtc/Makefile 2012-11-16 17:51:56.000000000 +0100
-+++ linux-2.6.38.8/drivers/rtc/Makefile 2012-11-16 17:52:28.000000000 +0100
-@@ -64,6 +64,7 @@
- obj-$(CONFIG_RTC_DRV_MAX8998) += rtc-max8998.o
- obj-$(CONFIG_RTC_DRV_MAX6902) += rtc-max6902.o
- obj-$(CONFIG_RTC_DRV_MC13XXX) += rtc-mc13xxx.o
-+obj-$(CONFIG_RTC_DRV_MCP7940X) += rtc-mcp7940x.o
- obj-$(CONFIG_RTC_DRV_MSM6242) += rtc-msm6242.o
- obj-$(CONFIG_RTC_DRV_MPC5121) += rtc-mpc5121.o
- obj-$(CONFIG_RTC_DRV_MV) += rtc-mv.o
-Index: linux-2.6.38.8/drivers/rtc/rtc-mcp7940x.c
-===================================================================
---- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ linux-2.6.38.8/drivers/rtc/rtc-mcp7940x.c 2012-11-16 17:54:34.000000000 +0100
-@@ -0,0 +1,312 @@
-+/*
-+ * RTC client/driver for the Microchip MCP7940x Real-Time Clock over I2C
-+ *
-+ * Based on code by Scott Wood <sco...@fr...>
-+ * which was based on code by Randy Vinson <rv...@mv...>,
-+ * which was based on the m41t00.c by Mark Greer <mg...@mv...>.
-+ *
-+ * Copyright (C) 2012 Armadeus Systems
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2. This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+/*
-+ * It would be more efficient to use i2c msgs/i2c_transfer directly but, as
-+ * recommened in .../Documentation/i2c/writing-clients section
-+ * "Sending and receiving", using SMBus level communication is preferred.
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/interrupt.h>
-+#include <linux/i2c.h>
-+#include <linux/rtc.h>
-+#include <linux/bcd.h>
-+#include <linux/slab.h>
-+
-+/* Time of Day */
-+#define MCP7940X_REG_TD_SECONDS 0x00
-+#define MCP7940X_REG_TD_MINUTES 0x01
-+#define MCP7940X_REG_TD_HOURS 0x02
-+#define MCP7940X_REG_TD_DAY 0x03
-+#define MCP7940X_REG_TD_DATE 0x04
-+#define MCP7940X_REG_TD_MONTH 0x05
-+#define MCP7940X_REG_TD_YEAR 0x06
-+/* Controls */
-+#define MCP7940X_REG_CONTROL 0x07
-+#define MCP7940X_REG_CALIBRATION 0x08
-+#define MCP7940X_REG_UNLOCK_ID 0x08
-+/* Alarm 0 */
-+#define MCP7940X_REG_ALRM0_SECONDS 0x0A
-+#define MCP7940X_REG_ALRM0_MINUTES 0x0B
-+#define MCP7940X_REG_ALRM0_HOURS 0x0C
-+#define MCP7940X_REG_ALRM0_DAY 0x0D
-+#define MCP7940X_REG_ALRM0_DATE 0x0E
-+#define MCP7940X_REG_ALRM0_MONTH 0x0F
-+/* Alarm 1 */
-+#define MCP7940X_REG_ALRM1_SECONDS 0x11
-+#define MCP7940X_REG_ALRM1_MINUTES 0x12
-+#define MCP7940X_REG_ALRM1_HOURS 0x13
-+#define MCP7940X_REG_ALRM1_DAY 0x14
-+#define MCP7940X_REG_ALRM1_DATE 0x15
-+#define MCP7940X_REG_ALRM1_MONTH 0x16
-+/* Timestamp 0 */
-+#define MCP7940X_REG_TS0_MINUTES 0x18
-+#define MCP7940X_REG_TS0_HOURS 0x19
-+#define MCP7940X_REG_TS0_DATE 0x1A
-+#define MCP7940X_REG_TS0_MONTH 0x1B
-+/* Timestamp 1 */
-+#define MCP7940X_REG_TS1_MINUTES 0x1C
-+#define MCP7940X_REG_TS1_HOURS 0x1D
-+#define MCP7940X_REG_TS1_DATE 0x1E
-+#define MCP7940X_REG_TS1_MONTH 0x1F
-+
-+
-+/* bits definitions */
-+#define MCP7940X_START_BITS 0x80
-+#define MCP7940X_24H_BITS 0x40
-+#define MCP7940X_VBATEN 0x08
-+
-+static const struct i2c_device_id mcp7940x_id[] = {
-+ { "mcp79400", 0 }, /* no unique ID */
-+ { "mcp79401", 1 }, /* EUI-48 */
-+ { "mcp79402", 2 }, /* EUI-64 */
-+ { }
-+};
-+MODULE_DEVICE_TABLE(i2c, mcp7940x_id);
-+
-+struct mcp7940x {
-+ struct i2c_client *client;
-+ struct rtc_device *rtc;
-+ int exiting;
-+};
-+
-+static struct i2c_driver mcp7940x_driver;
-+
-+//struct rtc_time {
-+// int tm_sec;
-+// int tm_min;
-+// int tm_hour;
-+// int tm_mday;
-+// int tm_mon;
-+// int tm_year;
-+// int tm_wday;
-+// int tm_yday;
-+// int tm_isdst;
-+//};
-+
-+static int mcp7940x_read_time(struct device *dev, struct rtc_time *time)
-+{
-+ struct i2c_client *client = to_i2c_client(dev);
-+ int ret;
-+
-+ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_TD_SECONDS);
-+ if (ret < 0)
-+ return ret;
-+ time->tm_sec = ((ret&0x70)>>4)*10 + (ret&0x0F);
-+
-+ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_TD_MINUTES);
-+ if (ret < 0)
-+ return ret;
-+ time->tm_min = ((ret&0x70)>>4)*10 + (ret&0x0F);
-+
-+ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_TD_HOURS);
-+ if (ret < 0)
-+ return ret;
-+ time->tm_hour = ((ret&0x30)>>4)*10 + (ret&0x0F);
-+
-+ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_TD_DATE);
-+ if (ret < 0)
-+ return ret;
-+ time->tm_mday = ((ret&0x30)>>4)*10 + (ret&0x0F);
-+
-+ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_TD_MONTH);
-+ if (ret < 0)
-+ return ret;
-+ time->tm_mon = (((ret&0x10)>>4)*10 + (ret&0x0F)) - 1;
-+
-+ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_TD_YEAR);
-+ if (ret < 0)
-+ return ret;
-+ time->tm_year = ((((ret&0xF0)>>4)*10 + (ret&0x0F))) + 100;
-+
-+ return 0;
-+}
-+
-+static int mcp7940x_set_time(struct device *dev, struct rtc_time *time)
-+{
-+ struct i2c_client *client = to_i2c_client(dev);
-+ int ret;
-+ int value;
-+
-+ value = ((((time->tm_sec/10)&0x07)<<4)|(time->tm_sec % 10))|
-+ MCP7940X_START_BITS;
-+ ret = i2c_smbus_write_byte_data(client,
-+ MCP7940X_REG_TD_SECONDS,
-+ value);
-+ if (ret < 0)
-+ return ret;
-+
-+ value = (((time->tm_min/10)&0x07)<<4)|(time->tm_min % 10);
-+ ret = i2c_smbus_write_byte_data(client,
-+ MCP7940X_REG_TD_MINUTES,
-+ value);
-+ if (ret < 0)
-+ return ret;
-+
-+ value = ((((time->tm_hour/10)&0x03)<<4)|(time->tm_hour % 10));
-+ ret = i2c_smbus_write_byte_data(client,
-+ MCP7940X_REG_TD_HOURS,
-+ value);
-+ if (ret < 0)
-+ return ret;
-+
-+ value = (((time->tm_mday/10)&0x03)<<4)|(time->tm_mday % 10);
-+ ret = i2c_smbus_write_byte_data(client,
-+ MCP7940X_REG_TD_DATE,
-+ value);
-+ if (ret < 0)
-+ return ret;
-+
-+ value = ((((time->tm_mon+1)/10)&0x01)<<4)|((time->tm_mon+1) % 10);
-+ ret = i2c_smbus_write_byte_data(client,
-+ MCP7940X_REG_TD_MONTH,
-+ value);
-+ if (ret < 0)
-+ return ret;
-+
-+ value = ((((time->tm_year-100)/10)&0x0F)<<4)|((time->tm_year-100) % 10);
-+ ret = i2c_smbus_write_byte_data(client,
-+ MCP7940X_REG_TD_YEAR,
-+ value);
-+ if (ret < 0)
-+ return ret;
-+
-+ return 0;
-+}
-+
-+static const struct rtc_class_ops mcp7940x_rtc_ops = {
-+ .read_time = mcp7940x_read_time,
-+ .set_time = mcp7940x_set_time,
-+};
-+
-+static int mcp7940x_probe(struct i2c_client *client,
-+ const struct i2c_device_id *id)
-+{
-+ struct mcp7940x *mcp7940x;
-+ int ret;
-+
-+ mcp7940x = kzalloc(sizeof(struct mcp7940x), GFP_KERNEL);
-+ if (!mcp7940x)
-+ return -ENOMEM;
-+
-+ mcp7940x->client = client;
-+ i2c_set_clientdata(client, mcp7940x);
-+
-+ ret = i2c_smbus_read_byte_data(mcp7940x->client, MCP7940X_REG_TD_HOURS);
-+ if (ret < 0)
-+ goto out_free;
-+
-+ /* set rtc to 24h format */
-+ if ((ret & MCP7940X_24H_BITS)) {
-+ ret = i2c_smbus_write_byte_data(mcp7940x->client,
-+ MCP7940X_REG_TD_HOURS,
-+ (u8)(ret & ~MCP7940X_24H_BITS));
-+ if(ret < 0)
-+ goto out_free;
-+ }
-+
-+ ret = i2c_smbus_read_byte_data(mcp7940x->client, MCP7940X_REG_TD_DAY);
-+ if (ret < 0)
-+ goto out_free;
-+ /* Use external baterie if Vcc fails */
-+ if (!(ret & MCP7940X_VBATEN)) {
-+ ret = i2c_smbus_write_byte_data(mcp7940x->client,
-+ MCP7940X_REG_TD_DAY,
-+ (u8)(ret | MCP7940X_VBATEN));
-+ if(ret < 0)
-+ goto out_free;
-+ }
-+
-+ ret = i2c_smbus_read_byte_data(mcp7940x->client, MCP7940X_REG_TD_SECONDS);
-+ if (ret < 0)
-+ goto out_free;
-+
-+ /* If time counter not launched, launch it */
-+ if (!(ret & MCP7940X_START_BITS)) {
-+ ret = i2c_smbus_write_byte_data(mcp7940x->client,
-+ MCP7940X_REG_TD_SECONDS,
-+ (u8)(ret | MCP7940X_START_BITS));
-+ if(ret < 0)
-+ goto out_free;
-+
-+ }
-+
-+ mcp7940x->rtc = rtc_device_register(client->name, &client->dev,
-+ &mcp7940x_rtc_ops, THIS_MODULE);
-+ if (IS_ERR(mcp7940x->rtc)) {
-+ ret = PTR_ERR(mcp7940x->rtc);
-+ dev_err(&client->dev, "unable to register the class device\n");
-+ goto out_free;
-+ }
-+
-+ return 0;
-+
-+out_free:
-+ kfree(mcp7940x);
-+ return ret;
-+}
-+
-+static int __devexit mcp7940x_remove(struct i2c_client *client)
-+{
-+ struct mcp7940x *mcp7940x = i2c_get_clientdata(client);
-+
-+ rtc_device_unregister(mcp7940x->rtc);
-+ kfree(mcp7940x);
-+ return 0;
-+}
-+
-+#ifdef CONFIG_PM
-+static int mcp7940x_suspend(struct i2c_client *client, pm_message_t state)
-+{
-+ return 0;
-+}
-+
-+static int mcp7940x_resume(struct i2c_client *client)
-+{
-+ return 0;
-+}
-+#else
-+#define mcp7940x_suspend NULL
-+#define mcp7940x_resume NULL
-+#endif
-+
-+static struct i2c_driver mcp7940x_driver = {
-+ .driver = {
-+ .name = "rtc-mcp7940x",
-+ .owner = THIS_MODULE,
-+ },
-+ .probe = mcp7940x_probe,
-+ .suspend = mcp7940x_suspend,
-+ .resume = mcp7940x_resume,
-+ .remove = __devexit_p(mcp7940x_remove),
-+ .id_table = mcp7940x_id,
-+};
-+
-+static int __init mcp7940x_init(void)
-+{
-+ return i2c_add_driver(&mcp7940x_driver);
-+}
-+
-+static void __exit mcp7940x_exit(void)
-+{
-+ i2c_del_driver(&mcp7940x_driver);
-+}
-+
-+module_init(mcp7940x_init);
-+module_exit(mcp7940x_exit);
-+
-+MODULE_AUTHOR("Fabien Marteau <fab...@ar...>");
-+MODULE_DESCRIPTION("Microchip mcp7940x RTC Driver");
-+MODULE_LICENSE("GPL");
diff --git a/patches/linux/2.6.38/450-armadeus-add_mcp7940x_rtc_driver.patch b/patches/linux/2.6.38/450-armadeus-add_mcp7940x_rtc_driver.patch
new file mode 120000
index 0000000..0cb4398
--- /dev/null
+++ b/patches/linux/2.6.38/450-armadeus-add_mcp7940x_rtc_driver.patch
@@ -0,0 +1 @@
+../common/000-armadeus-add_mcp7940x_rtc_driver.patch
\ No newline at end of file
diff --git a/patches/linux/2.6.38/450b-armadeus-add_mcp7940x_rtc_driver.patch b/patches/linux/2.6.38/450b-armadeus-add_mcp7940x_rtc_driver.patch
new file mode 100644
index 0000000..047d916
--- /dev/null
+++ b/patches/linux/2.6.38/450b-armadeus-add_mcp7940x_rtc_driver.patch
@@ -0,0 +1,40 @@
+Add mcp79400 Linux driver for kernel 2.6.38
+
+Signed-off-by: Fabien Marteau <fab...@ar...>
+
+---
+
+Index: linux-2.6.38.8/drivers/rtc/Kconfig
+===================================================================
+--- linux-2.6.38.8.orig/drivers/rtc/Kconfig 2012-11-16 17:52:01.000000000 +0100
++++ linux-2.6.38.8/drivers/rtc/Kconfig 2012-11-16 17:54:51.000000000 +0100
+@@ -282,6 +282,17 @@
+ If you say Y here you will get support for the
+ watchdog timer in the ST M41T60 and M41T80 RTC chips series.
+
++config RTC_DRV_MCP7940X
++ tristate "Microchip MCP7940X"
++ depends on RTC_CLASS && I2C
++ help
++ If you say yes here you get support for Microchip
++ MCP7940x real-time clock chips.
++ The alarm functionality is not supported.
++
++ This driver can also be built as a module. If so, the module
++ will be called rtc-mcp7940x.
++
+ config RTC_DRV_BQ32K
+ tristate "TI BQ32000"
+ help
+Index: linux-2.6.38.8/drivers/rtc/Makefile
+===================================================================
+--- linux-2.6.38.8.orig/drivers/rtc/Makefile 2012-11-16 17:51:56.000000000 +0100
++++ linux-2.6.38.8/drivers/rtc/Makefile 2012-11-16 17:52:28.000000000 +0100
+@@ -64,6 +64,7 @@
+ obj-$(CONFIG_RTC_DRV_MAX8998) += rtc-max8998.o
+ obj-$(CONFIG_RTC_DRV_MAX6902) += rtc-max6902.o
+ obj-$(CONFIG_RTC_DRV_MC13XXX) += rtc-mc13xxx.o
++obj-$(CONFIG_RTC_DRV_MCP7940X) += rtc-mcp7940x.o
+ obj-$(CONFIG_RTC_DRV_MSM6242) += rtc-msm6242.o
+ obj-$(CONFIG_RTC_DRV_MPC5121) += rtc-mpc5121.o
+ obj-$(CONFIG_RTC_DRV_MV) += rtc-mv.o
diff --git a/patches/linux/2.6.35/464-armadeus-add_mcp7940x_rtc_driver.patch b/patches/linux/common/000-armadeus-add_mcp7940x_rtc_driver.patch
similarity index 92%
copy from patches/linux/2.6.35/464-armadeus-add_mcp7940x_rtc_driver.patch
copy to patches/linux/common/000-armadeus-add_mcp7940x_rtc_driver.patch
index fe63f02..ed929ad 100644
--- a/patches/linux/2.6.35/464-armadeus-add_mcp7940x_rtc_driver.patch
+++ b/patches/linux/common/000-armadeus-add_mcp7940x_rtc_driver.patch
@@ -1,3 +1,8 @@
+Add mcp79400 Linux driver
+
+Signed-off-by: Fabien Marteau <fab...@ar...>
+
+---
Index: linux-2.6.35.3/drivers/rtc/rtc-mcp7940x.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
@@ -504,36 +509,3 @@ Index: linux-2.6.35.3/drivers/rtc/rtc-mcp7940x.c
+MODULE_AUTHOR("Fabien Marteau <fab...@ar...>");
+MODULE_DESCRIPTION("Microchip mcp7940x RTC Driver");
+MODULE_LICENSE("GPL");
-Index: linux-2.6.35.3/drivers/rtc/Kconfig
-===================================================================
---- linux-2.6.35.3.orig/drivers/rtc/Kconfig 2013-07-22 10:15:39.469490871 +0200
-+++ linux-2.6.35.3/drivers/rtc/Kconfig 2013-07-22 15:07:23.917032031 +0200
-@@ -245,6 +245,16 @@
- This driver can also be built as a module. If so, the module
- will be called rtc-m41t80.
-
-+config RTC_DRV_MCP7940X
-+ tristate "Microchip MCP7940X"
-+ depends on RTC_CLASS && I2C
-+ help
-+ If you say yes here you get support for Microchip
-+ MCP7940x real-time clock chips.
-+
-+ This driver can also be built as a module. If so, the module
-+ will be called rtc-mcp7940x.
-+
- config RTC_DRV_M41T80_WDT
- bool "ST M41T65/M41T80 series RTC watchdog timer"
- depends on RTC_DRV_M41T80
-Index: linux-2.6.35.3/drivers/rtc/Makefile
-===================================================================
---- linux-2.6.35.3.orig/drivers/rtc/Makefile 2013-07-22 10:15:39.469490871 +0200
-+++ linux-2.6.35.3/drivers/rtc/Makefile 2013-07-22 15:08:09.837030826 +0200
-@@ -57,6 +57,7 @@
- obj-$(CONFIG_RTC_DRV_MAX8925) += rtc-max8925.o
- obj-$(CONFIG_RTC_DRV_MAX6902) += rtc-max6902.o
- obj-$(CONFIG_RTC_DRV_MC13783) += rtc-mc13783.o
-+obj-$(CONFIG_RTC_DRV_MCP7940X) += rtc-mcp7940x.o
- obj-$(CONFIG_RTC_DRV_MSM6242) += rtc-msm6242.o
- obj-$(CONFIG_RTC_DRV_MPC5121) += rtc-mpc5121.o
- obj-$(CONFIG_RTC_DRV_MV) += rtc-mv.o
hooks/post-receive
--
armadeus
|
|
From: Fabien M <fa...@us...> - 2013-07-22 13:27:07
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This is an automated email from the git hooks/post-receive script. It was
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- Log -----------------------------------------------------------------
commit 6e41bce7fdb32f98e4c19700bf34234864c8286f
Author: Fabien Marteau <fab...@ar...>
Date: Mon Jul 22 15:23:47 2013 +0200
linux: driver: rtc: mcp7940x manage alarm
-----------------------------------------------------------------------
Summary of changes:
.../464-armadeus-add_mcp7940x_rtc_driver.patch | 539 ++++++++++++++++++++
1 files changed, 539 insertions(+), 0 deletions(-)
create mode 100644 patches/linux/2.6.35/464-armadeus-add_mcp7940x_rtc_driver.patch
diff --git a/patches/linux/2.6.35/464-armadeus-add_mcp7940x_rtc_driver.patch b/patches/linux/2.6.35/464-armadeus-add_mcp7940x_rtc_driver.patch
new file mode 100644
index 0000000..fe63f02
--- /dev/null
+++ b/patches/linux/2.6.35/464-armadeus-add_mcp7940x_rtc_driver.patch
@@ -0,0 +1,539 @@
+Index: linux-2.6.35.3/drivers/rtc/rtc-mcp7940x.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.35.3/drivers/rtc/rtc-mcp7940x.c 2013-07-22 14:48:37.045061568 +0200
+@@ -0,0 +1,501 @@
++/*
++ * RTC client/driver for the Microchip MCP7940x Real-Time Clock over I2C
++ *
++ * Based on code by Scott Wood <sco...@fr...>
++ * which was based on code by Randy Vinson <rv...@mv...>,
++ * which was based on the m41t00.c by Mark Greer <mg...@mv...>.
++ *
++ * Copyright (C) 2012 Armadeus Systems
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++/*
++ * It would be more efficient to use i2c msgs/i2c_transfer directly but, as
++ * recommened in .../Documentation/i2c/writing-clients section
++ * "Sending and receiving", using SMBus level communication is preferred.
++ */
++
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/interrupt.h>
++#include <linux/i2c.h>
++#include <linux/rtc.h>
++#include <linux/bcd.h>
++#include <linux/slab.h>
++
++/* Time of Day */
++#define MCP7940X_REG_TD_SECONDS 0x00
++#define MCP7940X_REG_TD_MINUTES 0x01
++#define MCP7940X_REG_TD_HOURS 0x02
++#define MCP7940X_REG_TD_DAY 0x03
++#define MCP7940X_REG_TD_DATE 0x04
++#define MCP7940X_REG_TD_MONTH 0x05
++#define MCP7940X_REG_TD_YEAR 0x06
++/* Controls */
++#define MCP7940X_REG_CONTROL 0x07
++#define MCP7940X_REG_CALIBRATION 0x08
++#define MCP7940X_REG_UNLOCK_ID 0x08
++/* Alarm 0 */
++
++#define MCP7940X_REG_ALRM0_SECONDS 0x0A
++#define MCP7940X_REG_ALRM0_MINUTES 0x0B
++#define MCP7940X_REG_ALRM0_HOURS 0x0C
++#define MCP7940X_REG_ALRM0_DAY 0x0D
++#define MCP7940X_REG_ALRM0_DATE 0x0E
++#define MCP7940X_REG_ALRM0_MONTH 0x0F
++/* Alarm 1 */
++#define MCP7940X_REG_ALRM1_SECONDS 0x11
++#define MCP7940X_REG_ALRM1_MINUTES 0x12
++#define MCP7940X_REG_ALRM1_HOURS 0x13
++#define MCP7940X_REG_ALRM1_DAY 0x14
++#define MCP7940X_REG_ALRM1_DATE 0x15
++#define MCP7940X_REG_ALRM1_MONTH 0x16
++/* Timestamp 0 */
++#define MCP7940X_REG_TS0_MINUTES 0x18
++#define MCP7940X_REG_TS0_HOURS 0x19
++#define MCP7940X_REG_TS0_DATE 0x1A
++#define MCP7940X_REG_TS0_MONTH 0x1B
++/* Timestamp 1 */
++#define MCP7940X_REG_TS1_MINUTES 0x1C
++#define MCP7940X_REG_TS1_HOURS 0x1D
++#define MCP7940X_REG_TS1_DATE 0x1E
++#define MCP7940X_REG_TS1_MONTH 0x1F
++
++
++/* bits definitions */
++#define MCP7940X_START_BITS 0x80
++#define MCP7940X_24H_BITS 0x40
++#define MCP7940X_VBATEN 0x08
++
++static const struct i2c_device_id mcp7940x_id[] = {
++ { "mcp79400", 0 }, /* no unique ID */
++ { "mcp79401", 1 }, /* EUI-48 */
++ { "mcp79402", 2 }, /* EUI-64 */
++ { }
++};
++MODULE_DEVICE_TABLE(i2c, mcp7940x_id);
++
++struct mcp7940x {
++ struct rtc_device *rtc;
++ struct i2c_client *client;
++ int exiting;
++ int irq;
++ unsigned int irqen;
++ int alrm_sec;
++ int alrm_min;
++ int alrm_hour;
++ int alrm_mday;
++ spinlock_t lock;
++};
++
++static struct i2c_driver mcp7940x_driver;
++
++static void mcp7940x_reg_dump(struct device *dev)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++
++ printk(" MCP7940X_REG_TD_SECONDS (0x%02X) -> 0x%02X\n", MCP7940X_REG_TD_SECONDS ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TD_SECONDS));
++ printk(" MCP7940X_REG_TD_MINUTES (0x%02X) -> 0x%02X\n", MCP7940X_REG_TD_MINUTES ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TD_MINUTES));
++ printk(" MCP7940X_REG_TD_HOURS (0x%02X) -> 0x%02X\n", MCP7940X_REG_TD_HOURS ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TD_HOURS));
++ printk(" MCP7940X_REG_TD_DAY (0x%02X) -> 0x%02X\n", MCP7940X_REG_TD_DAY ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TD_DAY));
++ printk(" MCP7940X_REG_TD_DATE (0x%02X) -> 0x%02X\n", MCP7940X_REG_TD_DATE ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TD_DATE));
++ printk(" MCP7940X_REG_TD_MONTH (0x%02X) -> 0x%02X\n", MCP7940X_REG_TD_MONTH ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TD_MONTH));
++ printk(" MCP7940X_REG_TD_YEAR (0x%02X) -> 0x%02X\n", MCP7940X_REG_TD_YEAR ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TD_YEAR));
++ printk(" MCP7940X_REG_CONTROL (0x%02X) -> 0x%02X\n", MCP7940X_REG_CONTROL ,i2c_smbus_read_byte_data(client,MCP7940X_REG_CONTROL));
++ printk(" MCP7940X_REG_CALIBRATION (0x%02X) -> 0x%02X\n", MCP7940X_REG_CALIBRATION ,i2c_smbus_read_byte_data(client,MCP7940X_REG_CALIBRATION));
++ printk(" MCP7940X_REG_UNLOCK_ID (0x%02X) -> 0x%02X\n", MCP7940X_REG_UNLOCK_ID ,i2c_smbus_read_byte_data(client,MCP7940X_REG_UNLOCK_ID));
++ printk(" MCP7940X_REG_ALRM0_SECONDS (0x%02X) -> 0x%02X\n", MCP7940X_REG_ALRM0_SECONDS,i2c_smbus_read_byte_data(client,MCP7940X_REG_ALRM0_SECONDS));
++ printk(" MCP7940X_REG_ALRM0_MINUTES (0x%02X) -> 0x%02X\n", MCP7940X_REG_ALRM0_MINUTES,i2c_smbus_read_byte_data(client,MCP7940X_REG_ALRM0_MINUTES));
++ printk(" MCP7940X_REG_ALRM0_HOURS (0x%02X) -> 0x%02X\n", MCP7940X_REG_ALRM0_HOURS ,i2c_smbus_read_byte_data(client,MCP7940X_REG_ALRM0_HOURS));
++ printk(" MCP7940X_REG_ALRM0_DAY (0x%02X) -> 0x%02X\n", MCP7940X_REG_ALRM0_DAY ,i2c_smbus_read_byte_data(client,MCP7940X_REG_ALRM0_DAY));
++ printk(" MCP7940X_REG_ALRM0_DATE (0x%02X) -> 0x%02X\n", MCP7940X_REG_ALRM0_DATE ,i2c_smbus_read_byte_data(client,MCP7940X_REG_ALRM0_DATE));
++ printk(" MCP7940X_REG_ALRM0_MONTH (0x%02X) -> 0x%02X\n", MCP7940X_REG_ALRM0_MONTH ,i2c_smbus_read_byte_data(client,MCP7940X_REG_ALRM0_MONTH));
++ printk(" MCP7940X_REG_ALRM1_SECONDS (0x%02X) -> 0x%02X\n", MCP7940X_REG_ALRM1_SECONDS,i2c_smbus_read_byte_data(client,MCP7940X_REG_ALRM1_SECONDS));
++ printk(" MCP7940X_REG_ALRM1_MINUTES (0x%02X) -> 0x%02X\n", MCP7940X_REG_ALRM1_MINUTES,i2c_smbus_read_byte_data(client,MCP7940X_REG_ALRM1_MINUTES));
++ printk(" MCP7940X_REG_ALRM1_HOURS (0x%02X) -> 0x%02X\n", MCP7940X_REG_ALRM1_HOURS ,i2c_smbus_read_byte_data(client,MCP7940X_REG_ALRM1_HOURS));
++ printk(" MCP7940X_REG_ALRM1_DAY (0x%02X) -> 0x%02X\n", MCP7940X_REG_ALRM1_DAY ,i2c_smbus_read_byte_data(client,MCP7940X_REG_ALRM1_DAY));
++ printk(" MCP7940X_REG_ALRM1_DATE (0x%02X) -> 0x%02X\n", MCP7940X_REG_ALRM1_DATE ,i2c_smbus_read_byte_data(client,MCP7940X_REG_ALRM1_DATE));
++ printk(" MCP7940X_REG_ALRM1_MONTH (0x%02X) -> 0x%02X\n", MCP7940X_REG_ALRM1_MONTH ,i2c_smbus_read_byte_data(client,MCP7940X_REG_ALRM1_MONTH));
++ printk(" MCP7940X_REG_TS0_MINUTES (0x%02X) -> 0x%02X\n", MCP7940X_REG_TS0_MINUTES ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TS0_MINUTES));
++ printk(" MCP7940X_REG_TS0_HOURS (0x%02X) -> 0x%02X\n", MCP7940X_REG_TS0_HOURS ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TS0_HOURS));
++ printk(" MCP7940X_REG_TS0_DATE (0x%02X) -> 0x%02X\n", MCP7940X_REG_TS0_DATE ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TS0_DATE));
++ printk(" MCP7940X_REG_TS0_MONTH (0x%02X) -> 0x%02X\n", MCP7940X_REG_TS0_MONTH ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TS0_MONTH));
++ printk(" MCP7940X_REG_TS1_MINUTES (0x%02X) -> 0x%02X\n", MCP7940X_REG_TS1_MINUTES ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TS1_MINUTES));
++ printk(" MCP7940X_REG_TS1_HOURS (0x%02X) -> 0x%02X\n", MCP7940X_REG_TS1_HOURS ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TS1_HOURS));
++ printk(" MCP7940X_REG_TS1_DATE (0x%02X) -> 0x%02X\n", MCP7940X_REG_TS1_DATE ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TS1_DATE));
++ printk(" MCP7940X_REG_TS1_MONTH (0x%02X) -> 0x%02X\n", MCP7940X_REG_TS1_MONTH ,i2c_smbus_read_byte_data(client,MCP7940X_REG_TS1_MONTH));
++}
++
++static int mcp7940x_read_time(struct device *dev, struct rtc_time *time)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ int ret;
++
++ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_TD_SECONDS);
++ if (ret < 0)
++ return ret;
++ time->tm_sec = ((ret&0x70)>>4)*10 + (ret&0x0F);
++
++ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_TD_MINUTES);
++ if (ret < 0)
++ return ret;
++ time->tm_min = ((ret&0x70)>>4)*10 + (ret&0x0F);
++
++ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_TD_HOURS);
++ if (ret < 0)
++ return ret;
++ time->tm_hour = ((ret&0x30)>>4)*10 + (ret&0x0F);
++
++ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_TD_DATE);
++ if (ret < 0)
++ return ret;
++ time->tm_mday = ((ret&0x30)>>4)*10 + (ret&0x0F);
++
++ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_TD_MONTH);
++ if (ret < 0)
++ return ret;
++ time->tm_mon = (((ret&0x10)>>4)*10 + (ret&0x0F)) - 1;
++
++ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_TD_YEAR);
++ if (ret < 0)
++ return ret;
++ time->tm_year = ((((ret&0xF0)>>4)*10 + (ret&0x0F))) + 100;
++
++ return 0;
++}
++
++static int mcp7940x_set_time(struct device *dev, struct rtc_time *time)
++{
++ struct i2c_client *client = to_i2c_client(dev);
++ int ret;
++ int value;
++ int day;
++
++ value = ((((time->tm_sec/10)&0x07)<<4)|(time->tm_sec % 10))|
++ MCP7940X_START_BITS;
++ ret = i2c_smbus_write_byte_data(client,
++ MCP7940X_REG_TD_SECONDS,
++ value);
++ if (ret < 0)
++ return ret;
++
++ value = (((time->tm_min/10)&0x07)<<4)|(time->tm_min % 10);
++ ret = i2c_smbus_write_byte_data(client,
++ MCP7940X_REG_TD_MINUTES,
++ value);
++ if (ret < 0)
++ return ret;
++
++ value = ((((time->tm_hour/10)&0x03)<<4)|(time->tm_hour % 10));
++ ret = i2c_smbus_write_byte_data(client,
++ MCP7940X_REG_TD_HOURS,
++ value);
++ if (ret < 0)
++ return ret;
++
++ value = (((time->tm_mday/10)&0x03)<<4)|(time->tm_mday % 10);
++ ret = i2c_smbus_write_byte_data(client,
++ MCP7940X_REG_TD_DATE,
++ value);
++ if (ret < 0)
++ return ret;
++
++ /*****/
++ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_TD_DAY);
++ if (ret < 0)
++ return ret;
++ day = (time->tm_wday == 0)?7:time->tm_wday;
++ ret = i2c_smbus_write_byte_data(client,
++ MCP7940X_REG_TD_DAY,
++ (ret&0xF8)|day);
++ if (ret < 0)
++ return ret;
++ /*****/
++
++ value = ((((time->tm_mon+1)/10)&0x01)<<4)|((time->tm_mon+1) % 10);
++ ret = i2c_smbus_write_byte_data(client,
++ MCP7940X_REG_TD_MONTH,
++ value);
++ if (ret < 0)
++ return ret;
++
++ value = ((((time->tm_year-100)/10)&0x0F)<<4)|((time->tm_year-100) % 10);
++ ret = i2c_smbus_write_byte_data(client,
++ MCP7940X_REG_TD_YEAR,
++ value);
++ if (ret < 0)
++ return ret;
++
++ return 0;
++}
++
++//struct rtc_wkalrm {
++// unsigned char enabled; /* 0 = alarm disabled, 1 = alarm enabled */
++// unsigned char pending; /* 0 = alarm not pending, 1 = alarm pending */
++// struct rtc_time time; /* time the alarm is set to */
++//};
++
++static int mcp79400_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm) {
++ struct i2c_client *client = to_i2c_client(dev);
++ struct rtc_time *time = &wkalrm->time;
++ int ret;
++
++ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_ALRM0_SECONDS);
++ if (ret < 0)
++ return ret;
++ time->tm_sec = ((ret&0x70)>>4)*10 + (ret&0x0F);
++
++ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_ALRM0_MINUTES);
++ if (ret < 0)
++ return ret;
++ time->tm_min = ((ret&0x70)>>4)*10 + (ret&0x0F);
++
++ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_ALRM0_HOURS);
++ if (ret < 0)
++ return ret;
++ time->tm_hour = ((ret&0x30)>>4)*10 + (ret&0x0F);
++
++ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_ALRM0_DATE);
++ if (ret < 0)
++ return ret;
++ time->tm_mday = ((ret&0x30)>>4)*10 + (ret&0x0F);
++
++ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_ALRM0_MONTH);
++ if (ret < 0)
++ return ret;
++ time->tm_mon = (((ret&0x10)>>4)*10 + (ret&0x0F)) - 1;
++
++ time->tm_year = -1;
++ time->tm_wday = -1;
++ time->tm_yday = -1;
++ time->tm_isdst= -1;
++
++ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_CONTROL);
++ if (ret < 0)
++ return ret;
++ wkalrm->enabled = ((ret&0x10)>>4);
++
++ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_ALRM0_DAY);
++ if (ret < 0)
++ return ret;
++ wkalrm->pending = ((ret&0x08)>>3);
++
++ return 0;
++}
++
++static int mcp79400_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm) {
++ struct i2c_client *client = to_i2c_client(dev);
++ struct rtc_time *time = &wkalrm->time;
++ int ret;
++ int value;
++ int day;
++
++ /* clear pending alarm */
++ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_ALRM0_DAY);
++ if (ret < 0)
++ return ret;
++ day = (time->tm_wday == 0)?7:time->tm_wday;
++ ret = i2c_smbus_write_byte_data(client,
++ MCP7940X_REG_ALRM0_DAY,
++ ((ret|0x70)&0x70)|day);
++ if (ret < 0)
++ return ret;
++
++ value = ((((time->tm_sec/10)&0x07)<<4)|(time->tm_sec % 10))|
++ MCP7940X_START_BITS;
++ ret = i2c_smbus_write_byte_data(client,
++ MCP7940X_REG_ALRM0_SECONDS,
++ value);
++ if (ret < 0)
++ return ret;
++
++ value = (((time->tm_min/10)&0x07)<<4)|(time->tm_min % 10);
++ ret = i2c_smbus_write_byte_data(client,
++ MCP7940X_REG_ALRM0_MINUTES,
++ value);
++ if (ret < 0)
++ return ret;
++
++ value = ((((time->tm_hour/10)&0x03)<<4)|(time->tm_hour % 10));
++ ret = i2c_smbus_write_byte_data(client,
++ MCP7940X_REG_ALRM0_HOURS,
++ value);
++ if (ret < 0)
++ return ret;
++
++ value = (((time->tm_mday/10)&0x03)<<4)|(time->tm_mday % 10);
++ ret = i2c_smbus_write_byte_data(client,
++ MCP7940X_REG_ALRM0_DATE,
++ value);
++ if (ret < 0)
++ return ret;
++
++ value = ((((time->tm_mon+1)/10)&0x01)<<4)|((time->tm_mon+1) % 10);
++ ret = i2c_smbus_write_byte_data(client,
++ MCP7940X_REG_ALRM0_MONTH,
++ value);
++ if (ret < 0)
++ return ret;
++
++ ret = i2c_smbus_read_byte_data(client, MCP7940X_REG_CONTROL);
++ if (ret < 0)
++ return ret;
++ if (wkalrm->enabled) {
++ ret = i2c_smbus_write_byte_data(client,
++ MCP7940X_REG_CONTROL,
++ ret | 0x10);
++ } else {
++ ret = i2c_smbus_write_byte_data(client,
++ MCP7940X_REG_CONTROL,
++ ret & ~(0x10));
++ }
++ if (ret < 0)
++ return ret;
++
++ return 0;
++}
++
++
++/* TODO: see rtc-ds1511.c */
++static int mcp79400_alarm_irq_enable(struct device *dev, unsigned int enabled)
++{
++ return 0;
++}
++
++static int mcp79400_update_irq_enable(struct device *dev, unsigned int enabled)
++{
++ return 0;
++}
++
++
++static const struct rtc_class_ops mcp7940x_rtc_ops = {
++ .read_time = mcp7940x_read_time,
++ .set_time = mcp7940x_set_time,
++ .read_alarm = mcp79400_read_alarm, /* Use ALARM0 only */
++ .set_alarm = mcp79400_set_alarm,
++ .alarm_irq_enable= mcp79400_alarm_irq_enable,
++ .update_irq_enable=mcp79400_update_irq_enable,
++};
++
++static int mcp7940x_probe(struct i2c_client *client,
++ const struct i2c_device_id *id)
++{
++ struct mcp7940x *mcp7940x;
++ int ret;
++
++ mcp7940x = kzalloc(sizeof(struct mcp7940x), GFP_KERNEL);
++ if (!mcp7940x)
++ return -ENOMEM;
++
++ mcp7940x->client = client;
++ i2c_set_clientdata(client, mcp7940x);
++
++ ret = i2c_smbus_read_byte_data(mcp7940x->client, MCP7940X_REG_TD_HOURS);
++ if (ret < 0)
++ goto out_free;
++
++ /* set rtc to 24h format */
++ if ((ret & MCP7940X_24H_BITS)) {
++ ret = i2c_smbus_write_byte_data(mcp7940x->client,
++ MCP7940X_REG_TD_HOURS,
++ (u8)(ret & ~MCP7940X_24H_BITS));
++ if(ret < 0)
++ goto out_free;
++ }
++
++ ret = i2c_smbus_read_byte_data(mcp7940x->client, MCP7940X_REG_TD_DAY);
++ if (ret < 0)
++ goto out_free;
++ /* Use external baterie if Vcc fails */
++ if (!(ret & MCP7940X_VBATEN)) {
++ ret = i2c_smbus_write_byte_data(mcp7940x->client,
++ MCP7940X_REG_TD_DAY,
++ (u8)(ret | MCP7940X_VBATEN));
++ if(ret < 0)
++ goto out_free;
++ }
++
++ ret = i2c_smbus_read_byte_data(mcp7940x->client, MCP7940X_REG_TD_SECONDS);
++ if (ret < 0)
++ goto out_free;
++
++ /* If time counter not launched, launch it */
++ if (!(ret & MCP7940X_START_BITS)) {
++ ret = i2c_smbus_write_byte_data(mcp7940x->client,
++ MCP7940X_REG_TD_SECONDS,
++ (u8)(ret | MCP7940X_START_BITS));
++ if(ret < 0)
++ goto out_free;
++
++ }
++
++ device_set_wakeup_capable(&client->dev, 1);
++ mcp7940x->rtc = rtc_device_register(client->name, &client->dev,
++ &mcp7940x_rtc_ops, THIS_MODULE);
++ if (IS_ERR(mcp7940x->rtc)) {
++ ret = PTR_ERR(mcp7940x->rtc);
++ dev_err(&client->dev, "unable to register the class device\n");
++ goto out_free;
++ }
++
++ return 0;
++
++out_free:
++ kfree(mcp7940x);
++ return ret;
++}
++
++static int __devexit mcp7940x_remove(struct i2c_client *client)
++{
++ struct mcp7940x *mcp7940x = i2c_get_clientdata(client);
++
++ rtc_device_unregister(mcp7940x->rtc);
++ kfree(mcp7940x);
++ return 0;
++}
++
++#ifdef CONFIG_PM
++static int mcp7940x_suspend(struct i2c_client *client, pm_message_t state)
++{
++ return 0;
++}
++
++static int mcp7940x_resume(struct i2c_client *client)
++{
++ return 0;
++}
++#else
++#define mcp7940x_suspend NULL
++#define mcp7940x_resume NULL
++#endif
++
++static struct i2c_driver mcp7940x_driver = {
++ .driver = {
++ .name = "rtc-mcp7940x",
++ .owner = THIS_MODULE,
++ },
++ .probe = mcp7940x_probe,
++ .suspend = mcp7940x_suspend,
++ .resume = mcp7940x_resume,
++ .remove = __devexit_p(mcp7940x_remove),
++ .id_table = mcp7940x_id,
++};
++
++static int __init mcp7940x_init(void)
++{
++ return i2c_add_driver(&mcp7940x_driver);
++}
++
++static void __exit mcp7940x_exit(void)
++{
++ i2c_del_driver(&mcp7940x_driver);
++}
++
++module_init(mcp7940x_init);
++module_exit(mcp7940x_exit);
++
++MODULE_AUTHOR("Fabien Marteau <fab...@ar...>");
++MODULE_DESCRIPTION("Microchip mcp7940x RTC Driver");
++MODULE_LICENSE("GPL");
+Index: linux-2.6.35.3/drivers/rtc/Kconfig
+===================================================================
+--- linux-2.6.35.3.orig/drivers/rtc/Kconfig 2013-07-22 10:15:39.469490871 +0200
++++ linux-2.6.35.3/drivers/rtc/Kconfig 2013-07-22 15:07:23.917032031 +0200
+@@ -245,6 +245,16 @@
+ This driver can also be built as a module. If so, the module
+ will be called rtc-m41t80.
+
++config RTC_DRV_MCP7940X
++ tristate "Microchip MCP7940X"
++ depends on RTC_CLASS && I2C
++ help
++ If you say yes here you get support for Microchip
++ MCP7940x real-time clock chips.
++
++ This driver can also be built as a module. If so, the module
++ will be called rtc-mcp7940x.
++
+ config RTC_DRV_M41T80_WDT
+ bool "ST M41T65/M41T80 series RTC watchdog timer"
+ depends on RTC_DRV_M41T80
+Index: linux-2.6.35.3/drivers/rtc/Makefile
+===================================================================
+--- linux-2.6.35.3.orig/drivers/rtc/Makefile 2013-07-22 10:15:39.469490871 +0200
++++ linux-2.6.35.3/drivers/rtc/Makefile 2013-07-22 15:08:09.837030826 +0200
+@@ -57,6 +57,7 @@
+ obj-$(CONFIG_RTC_DRV_MAX8925) += rtc-max8925.o
+ obj-$(CONFIG_RTC_DRV_MAX6902) += rtc-max6902.o
+ obj-$(CONFIG_RTC_DRV_MC13783) += rtc-mc13783.o
++obj-$(CONFIG_RTC_DRV_MCP7940X) += rtc-mcp7940x.o
+ obj-$(CONFIG_RTC_DRV_MSM6242) += rtc-msm6242.o
+ obj-$(CONFIG_RTC_DRV_MPC5121) += rtc-mpc5121.o
+ obj-$(CONFIG_RTC_DRV_MV) += rtc-mv.o
hooks/post-receive
--
armadeus
|
