Search Results for "verilog-xl" - Page 3
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Showing 81 open source projects for "verilog-xl"
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Software which runs on a gunstix overo, to contron stepper motors, and servos in such a way that they play the piano. The actual stepper motor and servo driver are done on an FPGA board from knjn.com (pluto-3).
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libhdlfltp is a VHDL library of floating point operators, all of which are parametrized, synthesizable to FPGAs and cover a number of the core operators in math.h.
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HW(VHDL) and SW of logic analyzer and On-Chip-Verification(OCV) for Value Change Dump(VCD) file format that exported to seemd SystemC ,ModelSIM, and many other EDA tools. Very easy and Simple.
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OpenWebServo is an Open Source Hardware and Software project. Its main goal is to develop a web-controlled servo system. The project includes web application, firmware and hardware design.
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The SBus is a family of high-speed packet-based databus standards, suitable for both networking and interdevice communication. They are optimized for high data density transactions. This project creates and documents the standards, schematics, and driver
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the goal of this project is to build a stack for Lonworks Protocol and device working on this protocol
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This project aims to develop a colour-based vision processing system for use in RoboCup. We are using a CCD camera for input to an FPGA. The system locates coloured objects and outputs detected corners.
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AtariMax front-end
Front-end to AtariMax software kit
Front-end to AtariMax software kit to flash a 1Mbit or 8Mbit cartridge for Atari XL computers. -
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m4-la is a Logic Analyzer written in VHDL for the Xilinx ML403 Development board featuring the Virtex4 FPGA. The user interface is written in C for Windows32 based platforms. Xilinx ISE and EDK tools compile the VHDL and MS Visual Studio compiles the UI.
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The OS561 operating system based around FORTH/Java. The OS is to run on a VHDL chip OpenHardware design called the Minon, but could become available for other platforms. The unique point of the design is a revolutionary data compression technology.
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The Affordable BIOS Restoration Tool provides VHDL and C code to recover from failed BIOS upgrades using affordable CPLD's. EEPROM's and Flash chips can be restored with this flash programmer. Interfaces for DIP and tsop packages are being developed.
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Pancham is an IP core that implements the MD5 message digest algorithm. It is written in Verilog and comes with a testbench. It will be portable across multiple simulators and will be synthesizable.
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RSTK is a C language program that generates Reed-Solomon HDL source code modules that can be compiled and synthesized using standard VHDL or Verilog compilers and synthesis tools.
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Yet Another DLX based Architecture System On a Chip (YADASOC) is a RTL Verilog implenetation of a DLX based CPU and subsystems.
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Inane's not a NES emulator. It is a reimplementation of the original NES hardware in VHDL with the goal of making it fully synthesize in hardware.
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A hardware project to interface a microcontroller (currently PIC family) to a LED driver consisting of a CPLD to drive an LED array with 35 LEDs... The source codes (c/vhdl) and schematics are going to be freely available
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The aim is to develop a foundation for a FPGA hardware platform able to run Linux kernel and software. It must be easy to add hardware accelerated ip-cores to the FPGA. Ethernet and TCP/IP is a corner stone of the hardware and software.
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L2MI - Little Modem Multiple Interface is a project that provide a firmware and hardware description of an educational Modem with multiple interfaces.
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