Search Results for "simulator processor"

Electronic circuit simulator. Simple environment to run and debug firmware for AVR 8-bit microprocessors. Able to run arduino firmware. Internally this program uses the open source Simavr AVR Processor Simulator (https://github.com/buserror/simavr) and wraps all its functions in a GUI shell. Setups for firmware debugging scenarios can be created dynamically.

openDLX is a DLX/MIPS ISA compatible pipeline simulator. (Visit https://github.com/smetzlaff/openDLX for the latest development version or if You want to contribute.)

ParallelSim is a parallel processor simulator written in Java which shows the effect of increasing the workload keeping the number of processing elements constant in one simulation. The number of processors is scalable and can be increased in subsequent iterations of simulation. The parameters like initial load, load offset, number of processors are declared as constants and can be changed directly in the source code to emulate different scenarios.

SCHEDuler SIMULAtor (originally sched_sim) is a simple C++ event driven simulator of scheduling policies (single processor). Currently supported scheduling policies are: FIFO, LIFO, EDF, LST, RM, DM.

DSPemu emule a digital signal processor TMS320F243, with console interface showing the registers and memory. With DSPemu is possible test algorithms such as Filter, FFT/IFFT. This can be integrate and used with a circuit simulator.

QUASI is stand-alone AVR RISC processor simulator with debugging features, EDA-like GUI and plugin interface.