Showing 37 open source projects for "gnu operating system"

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  • 1
    Icarus Verilog is an open source Verilog compiler that supports the IEEE-1364 Verilog HDL including IEEE1364-2005 plus extensions.
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    Downloads: 150 This Week
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  • 2
    Gwyscope

    Gwyscope

    Open hardware SPM controller with advanced sampling support.

    ... It is based on a low cost FPGA board Red Pitaya and additional high bit depth AD and DA converters. When put together with the AFM scanning hardware (sensor, scanner and their amplifiers) and user interface software it can serve as a standalone SPM system. Otherwise, it can serve as a sub-module for a custom built SPM system, e.g. providing the feedback loop mechanism only. Finally, it can be used as a board for developing advanced sampling techniques, which was the primary goal.
    Downloads: 0 This Week
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  • 3

    pyrpl

    PyRPL turns your Red Pitaya into a powerful analog feedback device.

    The Red Pitaya is a commercial, affordable FPGA board with fast analog inputs and outputs. This makes it useful for quantum optics experiments, in particular as a digital feedback controller for analog systems. Based on the open source software provided by the board manufacturer, PyRPL (Python RedPitaya Lockbox) implements many devices that are needed for optics experiments with the Red Pitaya. PyRPL implements various digital signal processing (DSP) modules (see features below). It allows...
    Downloads: 48 This Week
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  • 4

    VlibTools

    Tools and libraries for use with systemc and verilog

    Tool suite and libraries for developing system-c models. Tools for managing RTL projects.
    Downloads: 0 This Week
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  • 5

    SmGen

    Verilog Finite State Machine (FSM) Code Generator

    SmGen is a finite state machine (FSM) generator for Verilog. On the other hand, it is not an FSM entry tool. The input is behavioral Verilog with clock boundaries specifically set by the designer. SmGen unrolls this behavioral code and generates an FSM from it in synthesizable Verilog. Clock boundaries are explicitly provided by the designer so there is good control on the expected timing
    Downloads: 0 This Week
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  • 6
    adms
    ADMS is a code generator that converts electrical compact device models specified in high-level description language into ready-to-compile c code for the API of spice simulators. Repository migrated to: https://github.com/Qucs/ADMS For checkout do: git clone https://github.com/Qucs/ADMS.git
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    Downloads: 15 This Week
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  • 7

    lpACLib

    An Open-Source Library for Low-Power Approximate Computing Modules

    The “lpACLib” library contains the VHDL description of accurate and approximate versions of several arithmetic modules (like adders and multiplier of different bit-widths) and accelerators. Moreover, it also provides the corresponding software behavioral models/implementations developed in C and MATLAB to enable quality characterization. Besides our novel designs, it also contains implementations for several state-of-the-art arithmetic modules and their approximate versions. This open-source...
    Downloads: 5 This Week
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  • 8

    COFILOS

    A Development Framework for Coldfire

    Contains a framework for Coldfire MCUs like 52254. The framework supports a Command Line Interface (CLI) that may work from Serial port, USB or ENET. The framework uses Processor Expert and IDE requirement is MCU Eclipse 10.4 from Freescale. Includes the FunkOS Realtime Operating System by Funkenstein Software Consulting, available at http://funkos.sourceforge.net Mainly it is a support package for the development board Perseus, but I have ported also the RTOS to MCF52233DEMO board...
    Downloads: 0 This Week
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  • 9
    CoreTML framework
    CoreTML framework is an open-source template-based configuration system allowing the developer to create parametrized templates by inserting special content to any text files. Its main purpose is to serve as a toolkit for semiconductor IP core creation (based on VHDL/Verilog).
    Downloads: 0 This Week
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  • 10
    FSMDesigner
    FSMDesigner is a C++ based implementation for a Finite State Machine (FSM) design tool with integrated Hardware Description Language (HDL) generation. FSMDesigner4 uses the Simple-Moore FSM model guaranteeing efficient fast complex control circuits.
    Downloads: 0 This Week
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  • 11
    OpenSOC86

    OpenSOC86

    Open implementation of the x86 architecture

    ... and DOS in simulation. The system is targeted to run on the DE2-70 board. In order to run the system in hardware a SDRAM and SRAM controller need to be added. These are currently in development.
    Downloads: 2 This Week
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  • 12

    Anie

    PID_control, real_time, matlab_simulink, xilinx_ise, fpga_spartan3e

    Embedded system design (VHDL description) based on Xilinx's Spartan3E Development Kit to perform real-time PID control and monitoring of time critical plants such as brushless DC motors, maglevs... vimeo.com/channels/anie prezi.com/gpbycavq499c/anie/
    Downloads: 0 This Week
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  • 13
    FAZIA DAQ

    FAZIA DAQ

    The aim of FAZIA project is to build a 4Pi array for charged particles

    The FAZIA project groups together more than 10 institutions in Nuclear Physics, which are working in the domain of heavy-ion induced reactions around and below the Fermi energy (10-100AMeV). The aim of the project is to build a 4Pi array for charged particles, with high granularity and good energy resolution, with A and Z identification capability over the widest possible range. It will use the up-to-date techniques concerning detection, signal processing and data flow, with full digital...
    Downloads: 0 This Week
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  • 14

    smPla

    SystemVerilog module to substitute Verilog PLA system tasks.

    SystemVerilog module that models the following PLA system tasks of Verilog: $a/sync$and$array $a/sync$nand$array $a/sync$or$array $a/sync$nor$array $a/sync$and$plane $a/sync$nand$plane $a/sync$or$plane $a/sync$nor$plane.
    Downloads: 0 This Week
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  • 15
    GIAnT (Generic Implementation ANalysis Toolkit) is a platform for physical analysis of (embedded) devices. Primarily designed for hardware security analyses, it is built around an FPGA-based board for fault injection and side-channel analysis. This project has been supported by the German Federal Ministry of Education and Research BMBF (grant 01IS10026A, Project EXSET).
    Downloads: 0 This Week
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  • 16
    A free VHDL IPs for general purpose FPGA developpement. Need GRLIB to work properly, to setup see README.
    Downloads: 0 This Week
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  • 17
    This project includes a set of tools and guidelines designed for rapid production of large-scale embedded systems projects. The tools enable quick generation of reusable, reconfigurable hardware, using a user-specified hardware description language.
    Downloads: 0 This Week
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  • 18
    The ixo.de USB JTAG pod and firmware allows to access JTAG-capable chips via USB and a protocol like Altera USB-Blaster.
    Downloads: 0 This Week
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  • 19
    Ray Tracing micro-processor RTMP. Features: * Programmable pixel shaders. * SIMD 32-bit ALU. * Hardware support for Octree scene traversal. * Ray intersection cache. * Support for mutiple instances of RTMP working concurrently.
    Downloads: 0 This Week
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  • 20
    OpenVGA is an free and open FPGA-based implementation of a VGA compatible graphics adapter, and utilising low-cost hardware. The project includes the PCB schematic and artwork, Verilog HDL, firmware assembly code, and driver source code.
    Downloads: 0 This Week
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  • 21
    FPGA coprocessor floating point math lib
    libhdlfltp is a VHDL library of floating point operators, all of which are parametrized, synthesizable to FPGAs and cover a number of the core operators in math.h.
    Downloads: 0 This Week
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  • 22
    HW(VHDL) and SW of logic analyzer and On-Chip-Verification(OCV) for Value Change Dump(VCD) file format that exported to seemd SystemC ,ModelSIM, and many other EDA tools. Very easy and Simple.
    Downloads: 0 This Week
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  • 23
    BlowfishVHDL - free fully synthesizable Blowfish encryption algorithm hardware implementation.
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    Downloads: 0 This Week
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  • 24
    OpenWebServo is an Open Source Hardware and Software project. Its main goal is to develop a web-controlled servo system. The project includes web application, firmware and hardware design.
    Downloads: 0 This Week
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  • 25
    This project aims to generate video signal using an FPGA development board
    Downloads: 0 This Week
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