Search Results for "fpga"

...Valtr et al., Scanning Probe Microscopy controller with advanced sampling support, HardwareX, Volume 15, e00451 https://www.hardware-x.com/article/S2468-0672(23)00058-5/fulltext It is based on a low cost FPGA board Red Pitaya and additional high bit depth AD and DA converters. When put together with the AFM scanning hardware (sensor, scanner and their amplifiers) and user interface software it can serve as a standalone SPM system. Otherwise, it can serve as a sub-module for a custom built SPM system, e.g. providing the feedback loop mechanism only. ...

The Red Pitaya is a commercial, affordable FPGA board with fast analog inputs and outputs. This makes it useful for quantum optics experiments, in particular as a digital feedback controller for analog systems. Based on the open source software provided by the board manufacturer, PyRPL (Python RedPitaya Lockbox) implements many devices that are needed for optics experiments with the Red Pitaya.

darc, the Durham Adaptive optics Real-time Controller. For documentation or darctalk client only, select "View all files". For the latest bleeding-edge version, please use: git clone git://git.code.sf.net/p/darc2/code darc (no password required) (this changed May 2013 due to a sourceforge update). If you use darc, please cite with: Basden, A and Myers, R, MNRAS Vol 242, page 1483, 2012

Tools for FPGA development and IP cores. This project provides tools, cores and documentation to develope FPGA applications. The project focuses on VHDL.

An API for manipulating EDIF netlists in Java. We use this API to analyze netlists as a part of our FPGA reliability project. We intend to keep the API as general as possible to support other netlist analysis and manipulation activities. This material is based upon work supported by the National Science Foundation under Grant No. 0801876. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the National Science Foundation.

This (Python) tool allows you to easily create FPGA bitfiles for your embedded system, from several Open Source IPs (compatibles with the OpenCores Wishbone bus) . It will also generates the corresponding drivers (currently only Linux ones).

The design of an open platform devoted to allow students perform distance practices with a real FPGA device involves both hardware and software components.

ADopenPOWERLINK is an open source Ethernet Powerlink Controlled Node (Slave) solution using the Analog Devices ADSP-CM408F mixed signal processor (http://www.analog.com), along with Altera FPGA as network communication processor. The solution is based on openPOWERLINK provided by SYSTEC electronic (http://www.systec-electronic.com), B&R (http://www.br-automation.com) and Kalycito (http://www.kalycito.com). This release contains the necessary and required packages and documentation to setup the power-link controlled node using Analog Devices ADZS-CM408 EZLITE development board (http://www.analog.com/en/processors-dsp/cm4xx/adsp-cm408f/products/cm40x-ez/eb.html) as application processor, and a Terasic DE2-115 Altera FPGA development board as a communication processor.

...We write this software for the development and the validation of our instrument, the Low Frequency Receiver(LFR) for the Solar Orbiter mission. This instrument is based on an actel FPGA hosting a LEON3FT processor and some peripherals. To make it more collaborative, we use a plugin based system, the main executable is SocExplorer then all the functionality are provided by plugins. Like this everybody can provide his set of plugins to handle a new SOC or just a new peripheral. SocExplorer uses PythonQt to allow user to automate some tasks such as loading some plugins, configuring them and talking with his device. ...

...We have created an eclipse plugin version of the tool as well as a standalone command-line based version. Both function identically and output a netlist that can be imported into a pcb layout tool. VHDL revolutionized how FPGA designs and digital logic circuits have been designed and captured and overcame many of the difficulties associated with the use of schematic editing tools. We believe the use of an HDL is also the way of the future when it comes to PCB design. The PHDL compiler automatically supports the output of PADS and Eagle netlists, and through extending a simple java class, users can generate a netlist in practically any format required by their choice of a layout tool.

Oscilloscope components, including 100MHz quad A/D, VHDL code for Xilinx FPGA, and driver for Octave or Matlab.

FpgaC compiles a subset of the C language to net lists which can be imported into an FPGA vendors tool chains. C provides an excellent alternative to VHDL/Verilog for algorithmic expression of FPGA reconfigurable computing tasks. More info in wiki.

A free VHDL IPs for general purpose FPGA developpement. Need GRLIB to work properly, to setup see README.

The Daedalus Design framework is a complete design flow for multi-media embedded Multi-processor System-on-Chip (MPSoC) platforms. It transforms a high level system description into an FPGA prototype in a largely automated way in only a matter of hours.

MerakoGPS is a set of software for Merako-series board aiming at GPS receiver development. MerakoGPS runs on a flexible Merako-series hardware board which uses a CycloneIII FPGA to accomplish the correlator function. see http://www.hyrising.com.

OpenVGA is an free and open FPGA-based implementation of a VGA compatible graphics adapter, and utilising low-cost hardware. The project includes the PCB schematic and artwork, Verilog HDL, firmware assembly code, and driver source code.

The purpose of Mitrion-C Open Bio Project is to develop FPGA accelerated bioinformatics applications for the Mitrion Virtual Processor. The first accelerated application is NCBI BLAST.

libhdlfltp is a VHDL library of floating point operators, all of which are parametrized, synthesizable to FPGAs and cover a number of the core operators in math.h.

Development of a USB interface library to different USB enabled development (hardware) platforms. Including, but not limited to, FPGA prototype boards.

This project aims to develop a colour-based vision processing system for use in RoboCup. We are using a CCD camera for input to an FPGA. The system locates coloured objects and outputs detected corners.

This project aims to generate video signal using an FPGA development board

A complete bootloader that can load both an AVR processor and a Xilinx FPGA using a DataFLASH device to store programs.

asfpga is an assembler written for use in FPGA design. It can be easily modified for your instruction set. The ultimate goal of this software is to allow a FPGA designer to easily write assembly code for a custom instruction set. The current version al

This project aims at using the Artificial Intelligence (AI) algorithm called the Genetic algorithm to solve the problem of placement in the FPGA circuits.

This project aim to develop a suite of tool to ease the development of ASIC/FPGA solution. The final program should be an IDE enabling the creation and specification of a project from it's start to finish.