Search Results for "fpga project"

Using Approximate Computing, we have designed an innovative approximate adder with real-world image processing applications. The uploaded project includes its Matlab and Verilog models for result reproduction. This is an ongoing study and we aim to formally publish it for better understanding of viewers.

Tools for FPGA development and IP cores. This project provides tools, cores and documentation to develope FPGA applications. The project focuses on VHDL.

SOCGEN is a collection of tools that will help create digital components/ip_cores and then integrate them into a "System on a Chip"(SOC) for use in ASIC or FPGA designs.

An API for manipulating EDIF netlists in Java. We use this API to analyze netlists as a part of our FPGA reliability project. We intend to keep the API as general as possible to support other netlist analysis and manipulation activities. This material is based upon work supported by the National Science Foundation under Grant No. 0801876. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the National Science Foundation.

GIAnT (Generic Implementation ANalysis Toolkit) is a platform for physical analysis of (embedded) devices. Primarily designed for hardware security analyses, it is built around an FPGA-based board for fault injection and side-channel analysis. This project has been supported by the German Federal Ministry of Education and Research BMBF (grant 01IS10026A, Project EXSET).

Automatic build management for VHDL and Verilog projects. The automatic dependency resolver finds the exact subset of sources, and the correct order they must appear in required to build a project. A Makefile automates the actual build itself.

The project uses the infrared camera from the wiimote to track hand gestures. This tracking is performed on an Altera DE2-70 FPGA

OpenVGA is an free and open FPGA-based implementation of a VGA compatible graphics adapter, and utilising low-cost hardware. The project includes the PCB schematic and artwork, Verilog HDL, firmware assembly code, and driver source code.

The purpose of Mitrion-C Open Bio Project is to develop FPGA accelerated bioinformatics applications for the Mitrion Virtual Processor. The first accelerated application is NCBI BLAST.

This project aims to develop a colour-based vision processing system for use in RoboCup. We are using a CCD camera for input to an FPGA. The system locates coloured objects and outputs detected corners.

This project aims to generate video signal using an FPGA development board

This project aims at using the Artificial Intelligence (AI) algorithm called the Genetic algorithm to solve the problem of placement in the FPGA circuits.

The "RISC-0" project is a collection of Python libraries and programs to support the RISC architecture described by Prof. Niklaus Wirth on his web page (http://www.inf.ethz.ch/personal/wirth/Articles/FPGA-relatedWork/index.html)

This project aim to develop a suite of tool to ease the development of ASIC/FPGA solution. The final program should be an IDE enabling the creation and specification of a project from it's start to finish.