Showing 14 open source projects for "python verilog"

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  • 1
    IP-XACT 2009/2014  Platform

    IP-XACT 2009/2014 Platform

    Smart GUI/Commandline tools to create IP-XACT( 2009/2014) files

    Smart GUI to create or update IP-XACT often needed for the IP packaging. It has capability create Bus Definitions from scratch to populate BusDef library. One can create IP-XACT Component, Design or Registers by importing Ip in System Verilog/Verilog-95/VHDL, instantiate Bus Interfaces with proper port maps and attributes as needed. Smart GUI to create IP-XACT Registers, Memory Maps, Address Blocks for IP- has feature to import XLS or Verilog . It has Tcl/Python API support...
    Downloads: 6 This Week
    Last Update:
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  • 2
    Baya - SoC Integration Platform

    Baya - SoC Integration Platform

    Best in class SoC Integration Platform, IP-XACT, Verilog VHDL, UPF

    1. Comes with 200+ high level Tcl commands around SoC platform assembly 2. Easy to start - use the verilog2baya tool to convert existing SoC/SS into Baya 3. Adhoc and Interface based connections 4. Autoconnections 5. Rule based connections between component ports 6. A variety of SoC integration Methodologies 6.a. XLS/CSV Based connections 6.b. Port-to-Port Adhoc connections 6.c. IP-XACT and System Verilog Interface based connections 6.d. ... 7. Maintains a connectivity database...
    Downloads: 15 This Week
    Last Update:
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  • 3

    pyrpl

    PyRPL turns your Red Pitaya into a powerful analog feedback device.

    The Red Pitaya is a commercial, affordable FPGA board with fast analog inputs and outputs. This makes it useful for quantum optics experiments, in particular as a digital feedback controller for analog systems. Based on the open source software provided by the board manufacturer, PyRPL (Python RedPitaya Lockbox) implements many devices that are needed for optics experiments with the Red Pitaya. PyRPL implements various digital signal processing (DSP) modules (see features below). It allows...
    Downloads: 63 This Week
    Last Update:
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  • 4

    COFILOS

    A Development Framework for Coldfire

    Contains a framework for Coldfire MCUs like 52254. The framework supports a Command Line Interface (CLI) that may work from Serial port, USB or ENET. The framework uses Processor Expert and IDE requirement is MCU Eclipse 10.4 from Freescale. Includes the FunkOS Realtime Operating System by Funkenstein Software Consulting, available at http://funkos.sourceforge.net Mainly it is a support package for the development board Perseus, but I have ported also the RTOS to MCF52233DEMO...
    Downloads: 0 This Week
    Last Update:
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  • 5
    Pulse Programmer
    A programmable signal generator and RF synthesizer for scientific experiments, especially quantum computing and quantum information processing. It includes hardware, firmware, software, and documentation, all under an open source license.
    Downloads: 4 This Week
    Last Update:
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  • 6

    pyCPU

    Python Hardware Processor

    The Python Hardware Processsor is a implementation of a Hardware CPU in Myhdl. The CPU can directly execute something very similar to python bytecode (but only a very restricted instruction set). The Programm code for the CPU can be written directly in python (very restricted parts of python). This code is then converted by a small python programm to this restricted python bytecode. Since the hardware description is also in python, the slightly modified bytecode an then automatically loaded...
    Downloads: 0 This Week
    Last Update:
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  • 7
    naga EDA devotes to provide useful electronic design tools in C++ and, especially, Python. The current release contains naga.Verilog, a Verilog parser. Please visit project homepage http://naga-eda.org for more information
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    Downloads: 7 This Week
    Last Update:
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  • 8
    This project includes a set of tools and guidelines designed for rapid production of large-scale embedded systems projects. The tools enable quick generation of reusable, reconfigurable hardware, using a user-specified hardware description language.
    Downloads: 0 This Week
    Last Update:
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  • 9
    Language, compiler and simulator for CDL cycle description language Platforms: OSX, Linux, Cygwin CDL is a C-like language for hardware description; simulator generates C++ models and synthesizable verilog. Includes C++ cycle simulation engine.
    Downloads: 0 This Week
    Last Update:
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  • 10
    This project's goal is to provide a simple but extendable SOC (System On Chip) that can be loaded into an FPGA in order to quickly test custom coprocessors and evaluate their robustness against SCA (Side Channel Attacks) or others physical attacks.
    Downloads: 1 This Week
    Last Update:
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  • 11
    Synthesia is an open hardware/software platform intended for creating standalone audio devices such as synthesizers on embedded processors.
    Downloads: 1 This Week
    Last Update:
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  • 12
    System on Chip design generator.
    Downloads: 0 This Week
    Last Update:
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  • 13
    The main target of this project is to create a Open Source System on Chip generator for FPGA. This generator will use following technologies: Python, Wishbone SoC bus specifications and VHDL.
    Downloads: 0 This Week
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  • 14

    Labcoat: Cleanroom Apps for SuperWikia

    Labcoat; the VHDL graphic emulator.

    Labcoat for SuperWikia Alpha fabrication manages new or revised fabrication processes. Its 'Cleanroom' applets allow codesmiths to access the lab environment, used to create semiconductors, substrate prototypes, chipset instruction blocks and other Labcoat projects. Our extensions in future releases will include UML support for C#/C++ conforming projects, import/export architecture schematics and refactoring sub-projects.
    Downloads: 0 This Week
    Last Update:
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