Search Results for "electronic simulation" - Page 2
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Showing 65 open source projects for "electronic simulation"
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Qfsm
A graphical Finite State Machine (FSM) designer.
A graphical tool for designing finite state machines and exporting them to Hardware Description Languages, such as VHDL, AHDL, Verilog, or Ragel/SMC files for C, C++, Objective-C, Java, Python, PHP, Perl, Lua code generation. -
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TurboCircuit is an open source, cross-platform and easy-to-use circuits design and simulation tool. It allows the designed circuit to be printed or exported as an image.
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Simcas is a simple and very flexible analog simulator. SimCAS uses symbolic equations to define components and solves the net system by using a "Computer Algebra System" algorithm.
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This SourceForge project hosts an open-source Verilog-A library of compact large-signal RF MEMS capacitor, resonator and switch models. The Verilog-A models can be used with SPICE solvers for large-signal simulation of analog/RF circuits based on RF
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Puran2 - Real Random Number Generator
Real Random Number Generator
Puran2 is a real random number generator based on electronic noise. The random bits are stored on a CD. The software allow the access to the random bits like a pseudo random number generator and is easy to use. It can be mixed with random number of a tausworthe generator to grow the count of random number. -
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PAMELA Schrodinger-Poisson Code
self-consistent schrodinger-poisson code for core-shell nanowires
PAMELA (Pseudospectral Analysis Method with Exchange & Local Approximations) is a self-contained suite of MATLAB codes that can calculate electronic energies, densities, wavefunctions, and band-bending diagrams within a self-consistent Schrödinger-Poisson formalism. -
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GPS web application for the sport of orienteering. The course setter sets the GPS coordinates for the start, controls and finish. A runner with GPS runs the course and afterwards checks with FROG if she or he has been in the right positions.
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This library supports interoperability between components written for different verification methodologies such as VMM and OVM. This is maintained by the Accellera Verification Intellectual Property Technical Subcommittee.
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Language, compiler and simulator for CDL cycle description language Platforms: OSX, Linux, Cygwin CDL is a C-like language for hardware description; simulator generates C++ models and synthesizable verilog. Includes C++ cycle simulation engine.
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trab-energy is a small software simulation which teaches how to save energy on your house. it have a palette of electronic devices and the user can add some of them inside a canvas which have a living room.
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ElectroMimic is an electronic circuit simulator in Java™. The simulator is focused on the piecewise-linear models normally used by undergraduate students, but can also be linked with external simulation software for more realistic results.
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XML based parsers and translation tools for electronic design automation (EDA). Tools for manipulating netlist formats (e.g. SPICE, Spectre, CDL), languages (e.g. Verilog-AMS, VHDL-AMS, ASM), and other useful text-based formats (e.g. Liberty, Gerber).
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ENIAC: Electrical Network Interactive Analysis Console. Educational software originally made for the study and simulation of electrical LTI circuits, but which supply also a lot of mathematics computations, like complex, polynomial and matrix operations.
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OpenMie aims to solve electromagnetic scattering problems via the Mie method to provide a benchmark against which to test more general scattering codes. Complete field solutions are given for a number of practical geometries.
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ERepSim presents an agent-based cloud simulation environment integrating electronic institutions from multiagent research to simulate Internet-of-Services systems.
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This is a tool developed by 2nd yr CSE B.Techs at IIT Guwahati.We have designed a software in C++ language which,given some design specifications of an analog amplifier generates a netlist file in the current folder which can be opened in LTSpice.
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Laboratory Circuit Simulator is transient simulator whiht analog and digital components support for laboratory classes. This support spice netlist files, DSP Tms320f243 DSPemu integration and has high customizable device modules development in c.
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libLCS is a hardware description library in C++ aiming to be as powerfull and easy as the Verilog HDL. It currently supports logic gates, flipflops, clock, and facilitates delays, continuous assignments and variable value dumping into VCD files.
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Circuit Sandbox
Visually build and simulate boolean logic circuits
Visually build boolean logic circuits and then simulate their operation. Create custom components from user-designed circuits. Written in Java for cross-platform functionality. NOTE: This project has moved to Bitbucket at http://bitbucket.org/kwellwood/circuitsandbox -
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ESys.NET is a new system-level modeling and simulation environment. It takes advantages of .NET capabilities such as introspection, multi lingual model definition,... It allows more easily the creation of external tools (ex: verification, debugger, ...)
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