Search Results for "mips" - Page 2
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Showing 85 open source projects for "mips"
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Binary Analysis Platform
Binary Analysis Platform
The Carnegie Mellon University Binary Analysis Platform (CMU BAP) is a suite of utilities and libraries that enables analysis of programs in the machine code representation. BAP supports x86, x86-64, ARM, MIPS, PowerPC and new architectures can be added as plugins. BAP includes various analyses, standard interpreter, microexecution interpreter, and symbolic executor. BAP features its own domain-specific language, Primus Lisp, that is used for implementing analyses, specifying verification conditions, modeling functions (writing stubs) and even interfacing with the SMT solver. ... -
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EduMIPS64 (aka edumips) is a cross-platform MIPS 64 ISA simulator. It can be used to run and debug MIPS programs that are written using the MIPS64 instruction set. It supports visual debugging and lets you see what instructions do in the pipeline.
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Keystone Engine
Keystone assembler framework: Core (Arm, Arm64, Hexagon, Mips, etc.)
Keystone is a lightweight multi-platform, multi-architecture assembler framework. Multi-architecture, with support for Arm, Arm64 (AArch64/Armv8), Ethereum Virtual Machine, Hexagon, Mips, PowerPC, Sparc, SystemZ, & X86 (include 16/32/64bit). Clean/simple/lightweight/intuitive architecture-neutral API. Implemented in C/C++ languages, with bindings for Java, Masm, Visual Basic, C#, PowerShell, Perl, Python, NodeJS, Ruby, Go, Rust, Haskell & OCaml available. Native support for Windows & *nix (with Mac OSX, Linux, *BSD & Solaris confirmed). ... -
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Miasm
Reverse engineering framework in Python
The Miasm intermediate representation is used for multiple task: emulation through its jitter engine, symbolic execution, DSE, program analysis, but the intermediate representation can be a bit hard to read. We will present in this article new tricks Miasm has learned in 2018. Among them, the SSA/Out-of-SSA transformation, expression propagation and high-level operators can be joined to “lift” Miasm IR to a more human-readable language. We use graphviz to illustrate some graphs. Its layout... -
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An implementation of a light-weight stack-less jit compiler for x86 (32/64), ARM (32 [v5,v7,thumb2]/64), PowerPC (32/64), MIPS (32/64) and SPARC (32) architectures. It generates machine code from a platform independent (simplified) assembly language.
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jMIPS
MIPS processor in Java
A MIPS processor modeled in Java for educational purposes and aimed at undergraduate Computer Architecture courses. It presently runs MIPS 32-bit R3000 ELF executables on any platform where Java itself will run. Five successively more sophisticated models of a pipelined MIPS RISC processor are included. Though the code is deliberately kept clear and simple in order that readers are able to figure out how a real processor works through the medium of the code, it will soon be able to run a real Linux O/S kernel compiled for MIPS in Java - at what speed we don't know! -
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aria2 (Android port)
Best CLI BitTorrent client now on Android
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8 Sounds USB
Summary
XMOS based, USB2 audio card, low power consumption, small form factor, 8 synchronous input channels and 4 stereo output channels. -
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mips-injectso
Tool for injecting libs on mips/mipsel devices
This tool attaches to a specified process, modifies it's stack by copying small shellcode there, launches it and restores process previous state. Shellcode allows for loading custom .so. Either temporary (dlopen, dlclose) or "resident" (dlopen and no dlclose). -
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32-BIT GENERAL PURPOSE INTEGER PROCESSOR
Simple single cycle processor based on triadic Harvard architecture.
A 32-bit MIPS simple single cycle processor based on triadic Harvard architecture with a RISC-like ISA. This project is done in Cairo University-Faculty of Enigneering, Electronics and Electrical Communication department (EECE-2017) -
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vtrunkd
Network link bonding/trunking/aggregation and multichannel VPN daemon
...Features latency, reordering and jitter management, behaviour analysis optimizations for encapsulated protocols, bufferbloat control, packet redundancy, and multiple cpu cores utilization. Up to 30 heterogenous links bonding supported. Used for live streaming, LTE/3G/Wi-Fi link bonding. 32/64-bit, x86, MIPS and ARM supported. Supports python plug-ins for new algorithms implementation. Open source version developed and commercial support provided by Vrayo Systems, http://vrayo.com. No encryption supported yet. -
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ADI Buildroot
Buildroot Linux distribution for ADI Blackfin and future processors.
...Buildroot can generate a kernel image, various libraries and applications in a root filesystem. Buildroot is useful mainly for people working with small or embedded systems, using various CPU architectures (x86, ARM, Blackfin, MIPS, PowerPC, etc.). It automates the building process of your embedded system and eases the cross-compilation process. If you're new to buildroot Linux, the first thing to do is check out the [documentation](http://docs.blackfin.uclinux.org/). This should help you get your development host PC set up, and get you compling your first Linux distribution from source. -
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coins-compiler
COINS Compiler Infrastructure
COINS compiler infrastructure provides modulalized compiler components such as C front-end, Fortran front-end, optimizers, parallelizers, and back-ends for Intel x86, Sparc, Arm, Mips, PowerPC, etc. so that compiler developers can easily construct their own compiler by combining or modifying the components or adding new components. It has powerful retargeting facility so that a code generator for new machine can be constructed in 3 to 6 months. The execution speeds of generated codes are approaching to those of codes generated by gcc, some are high, and some are low, at present. ... -
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Coremu_for_mips
Port Coremu to MIPS host
The project is build for the mips-x86 version of coremu,which is also an open source project on sf. -
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DigMIPS
A simple MIPS processor for Chipmunk DigLog circuit simulator
- DigMIPS is a simple 1-cycle-per-instruction MIPS processor working under DigLog circuit simulator. - DigMIPS is provided with an assembler and a C compiler. - DigMIPS serve as a nice support to teach the basics of computer architecture. Features: - 8 instructions - 8K RAM + 8K ROM - I/O periphals (keyboard and teletype screen) Software: - DigASM (assembler) - DigCC (C compiler) -
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capstone
Capstone disassembly engine
Multiple-arch, multiple-platform disassembly engine with advanced features -
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SkyEye
a very fast full system simulator
SkyEye is a very fast full system simulator which takes llvm as IR of dynmic compiled framework.. It can simulate series ARM, Coldfire,Mips, Powerpc, Sparc, x86, TI DSP and Blackfin DSP Processor. Also can simulate multicore system by the multicore of host. The commercial support is provided by DigiProto Co. (http://www.digiproto.com) -
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Gehail is a MIPS32/MIPS64 CPU emulator that allows one to run statically linked Linux MIPS ELF binaries on a Linux host that is not MIPS - ie x86, PowerPC, etc.
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openDLX
A DLX/MIPS processor simulator
openDLX is a DLX/MIPS ISA compatible pipeline simulator. (Visit https://github.com/smetzlaff/openDLX for the latest development version or if You want to contribute.) -
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A Windows build of Gxemul found at http://gxemul.sourceforge.net/ which is a framework for full-system computer architecture emulator. Several real machines have been implemented within the framework, consisting of processors (ARM, MIPS, Motorola 88K, PowerPC, and SuperH) and surrounding hardware components such as framebuffers, interrupt controllers, busses, disk controllers, and serial controllers. The emulation is working well enough to allow several unmodified "guest" operating systems to run.