20 projects for "eda" with 2 filters applied:

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  • 1
    VTracer is a Verilog Testbench developer aid. Contains well documented Verilog-Perl co-simulation environment (TCP sockets based), structural Verilog parser, demo Testbenches.
    Downloads: 3 This Week
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  • 2
    UrJTAG aims to create an enhanced, modern tool for communicating over JTAG with flash chips, CPUs, and many more. It is a descendant of the popular openwince JTAG tools with a lot of additional features and enhancements.
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    Downloads: 51 This Week
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  • 3

    SmGen

    Verilog Finite State Machine (FSM) Code Generator

    SmGen is a finite state machine (FSM) generator for Verilog. On the other hand, it is not an FSM entry tool. The input is behavioral Verilog with clock boundaries specifically set by the designer. SmGen unrolls this behavioral code and generates an FSM from it in synthesizable Verilog. Clock boundaries are explicitly provided by the designer so there is good control on the expected timing
    Downloads: 0 This Week
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  • 4
    An API for manipulating EDIF netlists in Java. We use this API to analyze netlists as a part of our FPGA reliability project. We intend to keep the API as general as possible to support other netlist analysis and manipulation activities. This material is based upon work supported by the National Science Foundation under Grant No. 0801876. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the...
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    Downloads: 2 This Week
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  • 5

    ApproxAdderLib

    Library of Approximate Adders

    We provide MATLAB and Verilog Models of GeAr, and previously proposed adders (ACA-I, ETAII, ACA-II and GDA) at http://sourceforge.net/projects/approxadderlib/ GeAr is a low latency Generic Accuracy Configurable Adder that provides a higher number of potential configurations compared to state-of-the-art approximate adders, thus enabling a high degree of flexibility and trade-off between performance and output quality. These MATALB and Verilog models can allow software programmer as well as...
    Downloads: 1 This Week
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  • 6
    This (Python) tool allows you to easily create FPGA bitfiles for your embedded system, from several Open Source IPs (compatibles with the OpenCores Wishbone bus) . It will also generates the corresponding drivers (currently only Linux ones).
    Downloads: 0 This Week
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  • 7
    The primary aim of this project is to develop a full featured Microblaze simulator . The project is develloped only in C , then it can be easely ported.
    Downloads: 0 This Week
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  • 8
    OpenVGA is an free and open FPGA-based implementation of a VGA compatible graphics adapter, and utilising low-cost hardware. The project includes the PCB schematic and artwork, Verilog HDL, firmware assembly code, and driver source code.
    Downloads: 0 This Week
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  • 9
    HW(VHDL) and SW of logic analyzer and On-Chip-Verification(OCV) for Value Change Dump(VCD) file format that exported to seemd SystemC ,ModelSIM, and many other EDA tools. Very easy and Simple.
    Downloads: 0 This Week
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  • 10
    Generic packet visualization tool for generating flow diagrams from formatted logs. Can be used for cache coherency diagrams, software interaction diagrams or to plot network communications.
    Downloads: 0 This Week
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  • 11
    unPIC is a Perl script that disassembles Microchip microcontroller's HEX files. This is a powerful tool for all reverse engeneers that creates a well understandable assembly source from a binary file. Creates xrefs, labels, subroutines and much more...
    Downloads: 0 This Week
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  • 12
    The MP4Free project provides a simulation, analysis and exploration platform for multi-processor system-on-chip applications at variable level of abstraction, providing also a comprehensive component library.
    Downloads: 0 This Week
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  • 13
    RSTK is a C language program that generates Reed-Solomon HDL source code modules that can be compiled and synthesized using standard VHDL or Verilog compilers and synthesis tools.
    Downloads: 0 This Week
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  • 14
    "DSO" is a Digital Signal Oscilloscope. My DSO will be connected via the USB to the PC. All software to operate the DSO is developed within this project.
    Downloads: 0 This Week
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  • 15
    Portatux is an interactive ncurses interface as well as a command line tool for controlling the 8 data pins in the parallel port in Linux and FreeBSD.
    Downloads: 0 This Week
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  • 16
    his project is now at http://can.sourceforge.net EDA is a standardized model for development of components in a control system such as a home-/small office application or even in small systems such as a washing machine.
    Downloads: 0 This Week
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  • 17
    PROJECT IS DISCUNTINUED This project is about to contain information how to write data like boot loader into various flash devices on diffrent CPUs trough JTAG interface
    Downloads: 0 This Week
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  • 18
    This is an IEEE 1532 compliant JTAG programmer for CPLDs, FPGAs and similar programmable logic devices. It is only starting; developers are welcome!
    Downloads: 0 This Week
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  • 19
    Blitzer is a simple tool for driving the SX-Blitz microcontroller programmer from Parallax. There is now a version for PalmOS devices.
    Downloads: 0 This Week
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  • 20
    SHELLEY Software HardwarE Light LanguagE Yep !
    Downloads: 0 This Week
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