Search Results for "risc"
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Showing 3 open source projects for "risc"
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A new 64-bit RISC platform, complemented by a set of development tools, standards specifications and synthesizable VHDL implementations.
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A lightweight, simple and easy to use embedded system task scheduler. RataOS is written as a high level C, with a simple HAL & API structure, allowing it to be ported between embedded devices easily.
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This project implements a reduced instruction set (RISC) CPU in VHDL. It was designed for the Altera Flex10k20 chip, but the VHDL code should port to any compatable chip. The instruction set is extensive, and the design is easily extendable to 16 bits.
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