Search Results for "state machine"
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Showing 4 open source projects for "state machine"
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Stop Storing Third-Party Tokens in Your DatabaseRolling your own OAuth token storage can be a security liability. Token Vault securely stores access and refresh tokens from federated providers and handles exchange and renewal automatically. Connected accounts, refresh exchange, and privileged worker flows included.
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SmGen
Verilog Finite State Machine (FSM) Code Generator
SmGen is a finite state machine (FSM) generator for Verilog. On the other hand, it is not an FSM entry tool. The input is behavioral Verilog with clock boundaries specifically set by the designer. SmGen unrolls this behavioral code and generates an FSM from it in synthesizable Verilog. Clock boundaries are explicitly provided by the designer so there is good control on the expected timing -
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Interrupt-Driven Software UART
Interrupt Driven Software UART based on Atmel Software Framework
Interrupt-Driven Software UART based on Atmel Software Framework , tested on SAM3 Cortex M3 at 57600bps Start bit detection is managed by programmed GPIO falling edge interrupt handler, For bit timing is used timer counter, compare interrupt handler. Timer handler raises every 0.5 bit time periode and data sampling is managed by state machine in timer handler subroutine. Software can be used for any pin which supports external interrupt. -
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RHexLib is the control software library for the RHex robot (see http://ai.eecs.umich.edu/RHex for more information). It features an efficient real-time static scheduler, low level motion control tools, state machine based controller designs and various
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MachDB is machine database to catalog of the changing state of your hosts. It consists of a database, an aggregator, an XML spec and some example information gathering scripts. Along with a Web UI, these form the basis of a system that will allow you to
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Go From AI Idea to AI App FastAccess Gemini 3 and 200+ models. Build chatbots, agents, or custom models with built-in monitoring and scaling.
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