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PC based Oscilloscope and Spectrum analyzer using sound card
AUDio MEasurement System - a multi-platfrom system for audio measurement through sound card in the PC. It contains: generator, oscilloscope, audio spectrum analyzer (FFT) and frequency sweep plot. Compiles and works under Linux, Windows and MacOS. Source code is available in "git" and as ZIP snapshot. For more information see README.md
Kactus2 is a graphical EDA tool based on the IP-XACT standard.
Kactus2 is a toolset for IP-XACT based SoC design and provides packaging, integration and configuration of HW and SW components, plus register design and HDL import and generation.
The source code is hosted at https://github.com/kactus2/kactus2dev.
An example IP library is available at https://github.com/kactus2/ipxactexamplelib
Video tutorials are available at https://www.youtube.com/user/Kactus2Tutorial
Issue tracker is available at...
Current work at:
https://github.com/jcampos73/DraftCable
WARNING: version 1.0.94 previous to 2016-01-22 has a BUG! Download again!
Min. Req: Win XP SP3
If you get missing mfc120.dll install vcredist_x86.exe at prog folder
CAD design tool for electrical and block diagrams with net list compilation. Tool for creating new parts included.
DO NOT lose time copy and pasting cable datasheet.
This program, unlike MS Visio or other generic tools, has specific business funcionalities...
A single integrated payables solution that takes manual payment processes out of the equation, helping reduce risk and cutting costs for your business
Save time, money and your sanity. Deluxe Payment Exchange+ (DPX+) is our integrated payments solution that streamlines and automates your accounts payable (AP) disbursements. DPX+ ensures secure payments and offers suppliers alternate ways to receive funds, including mailed checks, ACH, virtual credit cards, debit cards, or eCheck payments. By simply integrating with your existing accounting software like QuickBooks®, you’ll implement efficient payment solutions for AP with ease—without costly development fees or untimely delays.
The aim of the UVE project is to create software that automatically generates a verification testbench (TB) written in SystemVerilog (SV) and integrating the UVM methodology.
UVE makes the rapid development of a verification environment a simple process. The generated TB is directly able to perform random actions on the DUV (design under verification). For this UVE provides a graphical user interface, a code generator, compilation scripts and a library of verification IPs (VIP). One...