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Kactus2 is the first graphical open source IP-XACT tool aiming at superior usabilty among EDA tools. It started as a simple IP-XACT editor but currently includes tools for complete IP-XACT design flow, e.g. Verilog/VHDL import, component, design and configuration editors and code generators. A special feature is real-time validation of user input, which helps locating potential design problems right in the beginning. Visualizations are included for e.g. Address spaces and Memory maps as well as file dependecies. Kactus2 is based on IEEE 1685-2014 from the version 3.0 onwards. The older releases are based on IP-XACT 1.4. A conversion tool is available upon request. You can see the Kactus2 project progress in the commit browser https://sourceforge.net/p/kactus2/code/commit_browser and issue tracker at http://kactus2.cs.tut.fi Sample libraries and plugins at https://github.com/kactus2 Please help us make Kactus2 even better http://funbase.cs.tut.fi/feedback

Kactus2 Web Site


  • Create "electronic datasheets" of your existing IPs to simplify integration
  • Import IP-XACT libraries by other vendors, check their integrity, export your IP library
  • Create HW designs with hierarchy
  • Create quick draft block diagram blueprints for IP, system-on-chip, printed circuit board (PCB), and product. All these are stored in IP-XACT format
  • Create system designs that map SW to HW
  • Create SW architecture in MCAPI communication abstraction (MCAPI endpoints and channels)
  • Configure all designs: set parameters, active views
  • Generate structural top-level VHDL and Verilog
  • Generate code templates for a new IP (VHDL entities, Verilog modules, C headers) based on their IP-XACT component description
  • Generate synthesis and simulation scripts, perform SW build for all processors
  • Generate combined documentation from all blocks, through all hierarchy levels


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  • 1 of 5 2 of 5 3 of 5 4 of 5 5 of 5

    Good work:)

    Posted 03/12/2012
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Intended Audience

Information Technology, Science/Research, Engineering

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