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Language, compiler and simulator for CDL cycle description language Platforms: OSX, Linux, Cygwin CDL is a C-like language for hardware description; simulator generates C++ models and synthesizable verilog. Includes C++ cycle simulation engine.
The aim of this project is to develop a GDSII viewer by using Java programminglanguage. Efforts will be made especially on ease-of-use, efficiency, and capacity.
pyLPCTools is a replacement for the Flash Programming Tools use with the Philips(tm)/NXP(tm) LPC2xxx series of ARM based microcontrollers. pyLPCTools is a script together with some ARM assembly language and a Python user interface. Please Donate !!
For companies looking to automate their consolidation and financial statement function
The software is cloud based and automates complexities around consolidating and reporting for groups with multiple year ends, currencies and ERP systems with a slice and dice approach to reporting. While retaining the structure, control and validation needed in a financial reporting tool, we’ve managed to keep things flexible.
ESOMA is a component orientated framework for simulation and evaluation
of arbitrary microprocessor and DSP architectures. Simulators using
ESOMA are runtime configurable. Architectural changes do not need
recompiling. Programminglanguage is C++ (Linu