Showing 142 open source projects for "minimum linux desktop"

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  • 1
    ngspice
    Ngspice project aims to improve the spice3f5 circuit simulator.
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    Downloads: 1,876 This Week
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  • 2
    Quite Universal Circuit Simulator

    Quite Universal Circuit Simulator

    A circuit simulator with graphical user interface (GUI)

    Qucs is a circuit simulator with graphical user interface. The software aims to support all kinds of circuit simulation types, e.g. DC, AC, S-parameter, Transient, Noise and Harmonic Balance analysis. Pure digital simulations are also supported.
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    Downloads: 1,454 This Week
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  • 3
    Icarus Verilog is an open source Verilog compiler that supports the IEEE-1364 Verilog HDL including IEEE1364-2005 plus extensions.
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    Downloads: 121 This Week
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  • 4

    AUDio MEasurement System

    PC based Oscilloscope and Spectrum analyzer using sound card

    AUDio MEasurement System - a multi-platfrom system for audio measurement through sound card in the PC. It contains: generator, oscilloscope, audio spectrum analyzer (FFT) and frequency sweep plot. Compiles and works under Linux, Windows and MacOS. Source code is available in "git" and as ZIP snapshot. For more information see README.md
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    Downloads: 92 This Week
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  • 5
    gpsim - The gnupic Simulator
    gpsim is an open sourced simulator for Microchip's PIC microcontrollers. It supports all three families of PICs: 12-bit, 14-bit, and 16-bit cores. See also gputils http://gputils.sourceforge.net/
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    Downloads: 86 This Week
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  • 6
    Printed Circuit Board Layout Tool
    PCB is a tool for the layout of printed circuit boards. PCB can produce industry standard RS-274X and Excellon NC-Drill format output for submission to board manufacturers.
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    Downloads: 63 This Week
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  • 7
    XSCHEM

    XSCHEM

    Schematic circuit editor for VLSI and Mixed mode circuit simulation.

    ... top speed performance, even on very big circuits. I have succesfully managed to simulate complete VLSI projects with this tool, both digital (Verilog / VHDL) and analog (Spice). Schematics can be printed in SVG, PNG, PDF, formats. XSCHEM runs on Linux or other Unix-likes with Xorg server and on Windows with the Cygwin layer and required tools installed. Can be found also on github: https://github.com/StefanSchippers/xschem
    Downloads: 25 This Week
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  • 8
    Open-source interpreted Verilog simulator with a feature set and performance similar to Verilog-XL. Implements all IEEE 1364-1995 features along with some Verilog-2001 features. Full support for Verilog PLIs.
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    Downloads: 5 This Week
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  • 9
    VTracer is a Verilog Testbench developer aid. Contains well documented Verilog-Perl co-simulation environment (TCP sockets based), structural Verilog parser, demo Testbenches.
    Downloads: 4 This Week
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  • 10
    ePnR

    ePnR

    ePnR is an IC block standard cell placement & routing tool

    ePnR is a simple Integrated Circuit (IC) block standard cell placement & routing tool. ePnR currently supports only circuit blocks using equal height standard cells arranged in one or more channels of user configurable length. Standard cells are described in a simple text based library (compliant with eLogSim). Placement follows initially the cell call order in the SPICE like circuit input netlist. However, a placement optimization, aiming at minimum weighted accumulated wire length...
    Downloads: 2 This Week
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  • 11
    An assembler for the Xilinx Picoblaze soft processor.
    Downloads: 0 This Week
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  • 12
    A portable loudspeaker design system supporting measurement, modeling, simulation and optimization of boxes, filters and systems.
    Downloads: 0 This Week
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  • 13
    Turns-n-Layers is a command line transformer and induction coil design aid that calculates the amount of wire needed, both length (feet) and weight (lbs). Also, the finished dimensions of the coil and the resistance are also returned.
    Downloads: 0 This Week
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  • 14
    wxArt2D gives wxWindows applications sophisticated vector drawing functionality. It is based on a framework supporting multiple views within a hierarchical document. Supports drawing & (Graph) editing. In-output in SVG, GDSII, XML, easy to extend.
    Downloads: 0 This Week
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  • 15
    NetworkDesigner does the design of various impedance matching networks. The designs are useful for both solid state designs as well as vacuum tube/valve circuits. In the newest version, the filter design functionality has been split off and will appear as a separate app. This makes for a cleaner user interface, The latest version was made from the FOX toolkit, and it is included in the package. This is the latest stable version of FOX.
    Downloads: 0 This Week
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  • 16
    FXtransformer Designer is a graphical design aid for both power and RF transformers. RF Design: Broadband, Single-Tuned, Double-Tuned.
    Downloads: 0 This Week
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  • 17
    eLogSim

    eLogSim

    Digital circuit simulator

    eLogSim is an event driven, 4-level (0,X,1,Z) digital circuit simulator. It uses a test oriented stimulus approach and offers a statistical (or exhaustive if it makes sense) fault simulation option. eLogSim has a simple GUI and is pre-compiled for Ubuntu 20, Mint 20, CentOS 8, openSUSE 15, FreeBSD 12, Solaris 11, Windows 10/11 & Raspbian/Raspberry PiOS Buster (32/64bit) & Ubuntu-MATE 20.04 (64 bit) operating systems. Cross platform & -network, concurrent fault simulation now available....
    Downloads: 1 This Week
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  • 18
    A simple VHDL(VHSIC Hardware Description Language) preprocessor
    Downloads: 0 This Week
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  • 19
    Gerber2eps - A small program for converting Gerber RS-274D files to Encapsulated Postscript (EPS).
    Downloads: 0 This Week
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  • 20

    SmGen

    Verilog Finite State Machine (FSM) Code Generator

    SmGen is a finite state machine (FSM) generator for Verilog. On the other hand, it is not an FSM entry tool. The input is behavioral Verilog with clock boundaries specifically set by the designer. SmGen unrolls this behavioral code and generates an FSM from it in synthesizable Verilog. Clock boundaries are explicitly provided by the designer so there is good control on the expected timing
    Downloads: 0 This Week
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  • 21
    A program that generates PLD (Programmable Logic Device) programming tables & LFSR/BIBLO (Linear Feedback Shift Register/Built In Logic Block Observer) signature for a function given by the user.
    Downloads: 0 This Week
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  • 22
    gerbv — a Gerber (RS-274X) viewer
    Gerbv is an open source Gerber file (RS-274X only) viewer. Gerbv lets you load several files on top of each other, do measurements on the displayed image, etc. Besides viewing Gerbers, you may also view Excellon drill files as well as pick-place file
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    Downloads: 718 This Week
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  • 23
    Ycad is a library of CAD functions in Java. Currently only DXF is supported for reading, viewing and writing. The DXF drawing may be rendered to a Graphics object for printing or imaging.
    Downloads: 4 This Week
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  • 24
    Capsim(r) C Text Mode Kernel(TMK),DSP and communication blocks, topologies, libraries and tools for the development of high performance block diagram digital signal processing and communications systems,built in interpreter for scripting.SystemC support.
    Downloads: 0 This Week
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  • 25
    circuitmod

    circuitmod

    The Future of the Java Circuit Simulator

    Circuitmod is a circuit simulator that extend the capacity of the original Falstad's Java Circuit Simulator into CMOS Chips, Led Arrays, Led Matrix and PIC Programming. The Horizon is limitless. Try today.
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    Downloads: 47 This Week
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