VHDL 2008/93/87 simulator
Schematic circuit editor for VLSI and Mixed mode circuit simulation.
Integrated Development Environment (IDE) for learning HDL
An open-source approximate logic design tool
The behavioral model of the old Soviet calculator EPOS-73
A graphical Finite State Machine (FSM) designer.
vHDL Obfuscator is an small GUI to obfuscate and reformat HDL files
Synthesis from Verilog HDL to asynchronous micropipelines
Demo of Simulink to C++ C or HDL FGA for HFT potential
Hardware FLAC Encoder / Decoder
C++ Verilog macro preprocessor