Re: [Sdcc-user] Assembler path issue...

[Joris v. d. S. <vd...@pu...>]

Hi Michael,

> could you please explain VPATH a bit more. It is complete new to me.

Ok, I am currently at my work so I don't have a makefile for SDCC at hand,
but I will try to reproduce it from my memory. But be warned that I
probably make some mistakes here:

I like to use the following directory structure (with the project names as
the root). For example the ROSES project:

    /home/roses        root directory holding makefile
    /home/roses/bin    directory holding .hex files
    /home/roses/src    directory holding source code (also has
                       subdirectories)
    /home/roses/tmp    directory holding .o, .lst, .a51, files

As a rule, all .c files in the /src directory are part of the project, so I
don't use the conventional list with object files in my makefile, but
generate it automatically instead from a list with source directories:

    SRCDIRS = src src/subdir1 src/subdir2
    TARGET  = bin/roses.hex
    SRCS    = $(foreach dir,$(SRCDIRS),$(wildcard $(dir)/*.c))
    OBJS    = $(addprefix tmp/,$(notdir $(patsubst %.c,%.o,$(SRCS))))

Now OBJS is a list with .o files all in the 'tmp' directory. Now I specify
a generic rule to build a 'tmp/*.o' file from a .c source file:

    tmp/%.o: %.c
        @echo Compiling $<
        @gcc $< -o $@

    .PHONY: all clean distclean

all: $(TARGET)

This is where VPATH comes in. Without VPATH, the make utility does a simple
text substitution and therefore expects, say, 'tmp/foo.o' to be build from
'tmp/foo.c' which doesn't exist. Therefore, I need to tell make which
directories to search:

    VPATH   = $(SRCDIRS)

Now make will look for 'foo.c' in directory /home/roses/src,
/home/roses/src/subdir1 and /home/roses/src/subdir2.

WARNING: This only works if all .c files have unique names (which is a good
idea anyway).

To get back to the pathname thing, I have a modified %.o rule for SDCC. I
don't have a makefile for SDCC at hand here but it is something like this:

    tmp/%.o: %.c
        @echo Compiling $<
        @copy %.c tmp\$(notdir $<)
        @gcc tmp\$(notdir $<) -o $@

If I remember correctly, SDCC will always write the output .HEX file to the
current directory (which is /home/roses when make is invoked) so I have an
additional copy command:

    $(TARGET): $(OBJS)
        @echo Linking $(TARGET)
        @sdcc $(OBJS)
        @copy $(notdir $(TARGET)) $(TARGET)

The actual makefile is more complex, since it uses variables to hold the
name of the compiler, the compiler options, etc. But the example is already
difficult enough. 

If this is any help, I can construct a template makefile especially for
SDCC if I can find the time. However, most people like to use their own
flavor of makefile so you probably want to hack VPATH into your existing
makefile instead.

Regards,
Joris