From: Vaclav P. <vac...@se...> - 2013-04-15 05:43:24
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Hi Valentin, you can try how it works in ucsim. But I probably do not understand well how addw does work in your example. If you use 2's complement and you add and wrap - it automatically does subtraction, doesn't it ? Vaclav ---------- Původní zpráva ---------- Od: Valentin Dudouyt <val...@gm...> Datum: 15. 4. 2013 Předmět: [Sdcc-user] ucsim: datasheet inaccuracies in STM8 "Yesterday, we discovered the following while developing the STM8 port with Philipp (we're testing on real hardware). 1) addw SP, #XX takes signed value and costs 1 cycle 2) sub SP, #XX takes unsigned value and costs 1 cycle I'm just wondering if it can be met with ucsim. P.S. chip used: stm8l152c6t6 ---------------------------------------------------------------------------- -- Precog is a next-generation analytics platform capable of advanced analytics on semi-structured data. The platform includes APIs for building apps and a phenomenal toolset for data science. Developers can use our toolset for easy data analysis & visualization. Get a free account! http://www2.precog.com/precogplatform/slashdotnewsletter _______________________________________________ Sdcc-user mailing list Sdc...@li... https://lists.sourceforge.net/lists/listinfo/sdcc-user" |