[sdcc-devel] [ sdcc-Feature Requests-1893510 ] Improve logical left shift on Z80

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Feature Requests item #1893510, was opened at 2008-02-14 12:48
Message generated for change (Comment added) made by borutr
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Category: None
Group: None
Status: Open
Priority: 5
Private: No
Submitted By: Philipp Krause (spth)
Assigned to: Nobody/Anonymous (nobody)
Summary: Improve logical left shift on Z80

Initial Comment:
When generating a logical left shift by a literal sdcc generates this:
Load source into accumulator, add accumulator to itself, load accumulator into destination: Three instructions.

However, very often source and destination are the same. The Z80 has a sla instruction which could be used (so we can shift in place using only one instruction).

Philipp


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>Comment By: Borut Ražem (borutr)
Date: 2008-02-17 09:22

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Philipp,

I have few questions:

- is the test shCount <= 2 really needed? I think that the rule works well
also for long ints, where shCount is probably 4 (maybe someone will even
implement 8 byte long longs some day ;-)?

- can the last line of peephole rule "add %3, %4" be removed? We must
ensure that accumulator is not reused after shifting, which is granted by
reloading it, so checking if the next operation is addition doesn't make
sense to me. The rule would look like this:

replace restart {
	ld	%1, a
	sla	%1
	ld	a, %2
} by {
	add	a, a
	; peephole 42a shifts in accumulator insted of %1
	ld	%1, a
	ld	a, %2
}

Borut

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Comment By: Philipp Krause (spth)
Date: 2008-02-14 15:20

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Since the currently generted code is optimized by peepholes in some cases
changing the code generation to generate sla instructions requires an
additional peephole.

The attached patch applies to applies to sdcc 2.7.4 #5008. I have run the
regression tests and see no problems.

sdcc already does a similar optimization for 16 bit operands. This patch
will be useful when shifting 8-bit operands.

Philipp

File Added: sdcc-sla.patch

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