[sdcc-devel] [ sdcc-Feature Requests-827755 ] more 'critical' improvements

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Feature Requests item #827755, was opened at 2003-10-21 21:57
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Category: None
Group: None
Status: Open
Priority: 5
Submitted By: Maarten Brock (maartenbrock)
Assigned to: Nobody/Anonymous (nobody)
Summary: more 'critical' improvements

Initial Comment:
Hello,

I see bernardheld and epetrich have worked on my 
previous question for a better 'critical' behaviour. They 
came up with a better solution in some part than mine 
(push psw), but that's mostly because I'm not familiar 
with which registers can be thrashed and which not. 
Only I see they did not use the proposed TEST BIT AND 
CLEAR opcode. This is a pity because that made the 
reading and disabling an atomic action. With the current 
implementation it is possible an interrupt arrives between 
the reading and the disabling which can turn interrupts 
off when they were on. After the function ends the 
interrupts will be enabled again which should not 
happen, because they were switched off in the ISR. 
Hope this will be fixed.

Now this was only a bug report. The real improvement 
could come from instantiating a local bit variable to store 
the EA state in. This way it won't cost an extra stack 
position, but only a bit. If a critical function is called 
from another critical function it costs two local bit 
variables, etc. Of course this won't work for reentrant 
functions which should use the stack.

Another big improvement would be if it were possible to 
use this keyword not only for a function, but for any 
compound statements block. Often you want to make a 
single access to a variable atomic and calling a function 
to do that brings a lot of overhead.

Hope to have helped improving the SDCC.

Greets,
Maarten Brock

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