From: Andrew S. <wac...@go...> - 2013-01-06 20:28:56
|
Hello Qucs team, First of all congratulations on an impressive achievement! It felt like an extra Christmas present when I first started browsing the sourceforge site and code-base. A decent GUI based on a modern toolkit AND a clean simulation core implemented from-scratch in well-written C++ with excellent Documentation. Wow - after looking at the some of the spice-derived projects I was beginning to despair... In my day job I develop and maintain a SystemC / SystemVerilog / SIMetrix based behavioural modelling/virtual prototyping flow for power-conversion controller ICs at Infineon technologies. Arising from this work I've for some time wanted to try out some ideas for a really effective cosimulation environment for this kind work in an open-source project*. Consequently, I've been looking for an open-source circuit simulator that could cleanly support a generic IPC based interface to parallel slaved discrete-event simulations. Qucs seems to fit perfectly! From the Qucs documentation I gather Qucs uses FreeHDL to implement digital simulation but (as I understand it) and that there is (currently?) no support for *co*simulation. The adms translator qucs uses to support Verilog-A(MS) would appear to support only a small subset of Verilog-A (Verilog-AMS would, of course, imply support for the entirety of Verilog-2005). Am I right in assuming that threshold crossing events (and the associated step-control) are not supported? Browsing docs and the trsolver.cpp sources there don't seem to be any hooks to allow a component model to register threshold crossing criteria to a llow a timestep to be rejected based on a threshold crossing failing its timing/value tolerances. Threshold crossings are of course the underlying 'primitive; used for A->D simulation synchronization in a cosimulation environment. Implementing suitable in the transient analsysis engine would be pretty much step 1 in realizing a cosimulation interface. Has anyone previously looked at adding the necessary step-control / back-off logic for this kind of thing? My own initial target for the digital side of a cosimulation interface would probably be SystemC. Primarily because the (extremely simple) SystemC simulation kernel is well suited for use as a testing/debugging/experimentation framework. Secondarily because day-job related acitivities could be used to provide some real-world use-cases**. Once something stable/satisfactory was in place the next stage would probably extend the interface to Icarus verilog via VPI (Icarus is excellent in its own right and VPI is the only halfways portable basis for interfacing to commercial simulators). Best regards, Andrew Stevens * Although for some reason I keep sliding in to SoC concept engineering work on mixed-signal/video ICs by professional background is as EDA/verification tools software engineer. ** I .e. try ideas out without having to splash out on a personal licence for SIMetrix! Its an excellent desktop circuit simulator and the developer is decent guy but I dislike working under Windows and I just can't afford that kind of money for a bit of 'playing around' ;-) |
From: Richard C. <s02...@sm...> - 2013-01-07 10:04:03
|
Hi Andrew, Welcome to the Qucs developers list! Now, a bit of a status update on Qucs for you. I am a relatively new member of the Qucs team. Until recently Qucs had not been worked on for around a year, and at it seemed like development had stopped. However, coincidentally for you, we have just recently begun to form a new team of people to do some work on the project and continue to take it forward. A port of the Qucs GUI code to Qt4 has already been achieved (with Qt3 support, see the qucs-qt4 branch in svn). But it would be great to get input from more people with experience working with and creating circuit simulators. The people on this list with most experience and understanding of the verilog code (and who could answer your questions) are Mike Brinson and Stefan Jahn (Stefan is a Qucs founder, but has not been very active for some time). I hope Mike will be listening on this and be able to comment on your ideas. What you are proposing sounds like quite a large change which would probably require its own branch in svn for a while. Alternatively there is also a mirror of the project kept on github by Frans Schreuder, you could always fork this if you wanted, with a view to reintegrating when complete. We would also welcome patches and bug fixes to the existing code though. Once you have submitted a couple of patches etc. we can look to adding you with commit access. Regards Richard Crozier -- rcc On 06/01/2013 20:28, Andrew Stevens wrote: > Hello Qucs team, > > > First of all congratulations on an impressive achievement! It felt > like an extra Christmas present when I first started browsing the > sourceforge site and code-base. A decent GUI based on a modern toolkit > AND a clean simulation core implemented from-scratch in well-written > C++ with excellent Documentation. > Wow - after looking at the some of the spice-derived projects I was > beginning to despair... > > In my day job I develop and maintain a SystemC / SystemVerilog / > SIMetrix based behavioural modelling/virtual prototyping flow for > power-conversion controller ICs at Infineon technologies. Arising from > this work I've for some time wanted to try out some ideas for a really > effective cosimulation environment for this kind work in an open-source > project*. Consequently, I've been looking for an open-source circuit > simulator that could cleanly support a generic IPC based interface to > parallel slaved discrete-event simulations. Qucs seems to fit perfectly! > > From the Qucs documentation I gather Qucs uses FreeHDL to implement > digital simulation but (as I understand it) and that there is > (currently?) no support for *co*simulation. The adms translator qucs > uses to support Verilog-A(MS) would appear to support only a small > subset of Verilog-A (Verilog-AMS would, of course, imply support for the > entirety of Verilog-2005). Am I right in assuming that threshold > crossing events (and the associated step-control) are not supported? > > Browsing docs and the trsolver.cpp sources there don't seem to be any > hooks to allow a component model to register threshold crossing criteria > to a llow a timestep to be rejected based on a threshold crossing > failing its timing/value tolerances. > > Threshold crossings are of course the underlying 'primitive; used for > A->D simulation synchronization in a cosimulation environment. > Implementing suitable in the transient analsysis engine would be pretty > much step 1 in realizing a cosimulation interface. > > Has anyone previously looked at adding the necessary step-control / > back-off logic for this kind of thing? > > My own initial target for the digital side of a cosimulation interface > would probably be SystemC. Primarily because the (extremely simple) > SystemC simulation kernel is well suited for use as a > testing/debugging/experimentation framework. Secondarily because > day-job related acitivities could be used to provide some real-world > use-cases**. > > Once something stable/satisfactory was in place the next stage would > probably extend the interface to Icarus verilog via VPI (Icarus is > excellent in its own right and VPI is the only halfways portable basis > for interfacing to commercial simulators). > > > > Best regards, > > Andrew Stevens > > * Although for some reason I keep sliding in to SoC concept engineering > work on mixed-signal/video ICs by professional background is as > EDA/verification tools software engineer. > > ** I .e. try ideas out without having to splash out on a personal > licence for SIMetrix! Its an excellent desktop circuit simulator and the > developer is decent guy but I dislike working under Windows and I just > can't afford that kind of money for a bit of 'playing around' ;-) > > > > ------------------------------------------------------------------------------ > Master Visual Studio, SharePoint, SQL, ASP.NET, C# 2012, HTML5, CSS, > MVC, Windows 8 Apps, JavaScript and much more. Keep your skills current > with LearnDevNow - 3,200 step-by-step video tutorials by Microsoft > MVPs and experts. ON SALE this month only -- learn more at: > http://p.sf.net/sfu/learnmore_123012 > _______________________________________________ > Qucs-devel mailing list > Quc...@li... > https://lists.sourceforge.net/lists/listinfo/qucs-devel > -- The University of Edinburgh is a charitable body, registered in Scotland, with registration number SC005336. |
From: mike b. <mbr...@ya...> - 2013-01-07 10:52:43
|
Hello Andrew, Richard and Frans I had just started to draft a reply to your email Andrew when Richard's note arrived. I will try and answer, as best I can, your questions- answers given below. Mike Brinson mbr...@ya... ________________________________ From: Richard Crozier <s02...@sm...> To: Andrew Stevens <wac...@go...> Cc: quc...@li... Sent: Monday, 7 January 2013, 10:04 Subject: Re: [Qucs-devel] Greetings, congratulations, and cosimulation Hi Andrew, Welcome to the Qucs developers list! Now, a bit of a status update on Qucs for you. I am a relatively new member of the Qucs team. Until recently Qucs had not been worked on for around a year, and at it seemed like development had stopped. However, coincidentally for you, we have just recently begun to form a new team of people to do some work on the project and continue to take it forward. A port of the Qucs GUI code to Qt4 has already been achieved (with Qt3 support, see the qucs-qt4 branch in svn). But it would be great to get input from more people with experience working with and creating circuit simulators. The people on this list with most experience and understanding of the verilog code (and who could answer your questions) are Mike Brinson and Stefan Jahn (Stefan is a Qucs founder, but has not been very active for some time). I hope Mike will be listening on this and be able to comment on your ideas. What you are proposing sounds like quite a large change which would probably require its own branch in svn for a while. Alternatively there is also a mirror of the project kept on github by Frans Schreuder, you could always fork this if you wanted, with a view to reintegrating when complete. We would also welcome patches and bug fixes to the existing code though. Once you have submitted a couple of patches etc. we can look to adding you with commit access. Regards Richard Crozier -- rcc On 06/01/2013 20:28, Andrew Stevens wrote: > Hello Qucs team, > > > First of all congratulations on an impressive achievement! It felt > like an extra Christmas present when I first started browsing the > sourceforge site and code-base. A decent GUI based on a modern toolkit > AND a clean simulation core implemented from-scratch in well-written > C++ with excellent Documentation. > Wow - after looking at the some of the spice-derived projects I was > beginning to despair... ### Thanks for your comments. Much work has already gone into Qucs ### over the last ten years. Much still needs to be done. However, at this stage the ### package is stable and usable for a wide range of simulations. There are however, ### a number of known bugs and serious omissions. These I hope to address with the ### extended development team over the next few months. > > In my day job I develop and maintain a SystemC / SystemVerilog / > SIMetrix based behavioural modelling/virtual prototyping flow for > power-conversion controller ICs at Infineon technologies. Arising from > this work I've for some time wanted to try out some ideas for a really > effective cosimulation environment for this kind work in an open-source > project*. Consequently, I've been looking for an open-source circuit > simulator that could cleanly support a generic IPC based interface to > parallel slaved discrete-event simulations. Qucs seems to fit perfectly! ### In the days when I was teaching engineering students I used the free ### version of Symetrix. Its a pity that a free version of the package which ### includes Verilog-A is not available. At the moment I am using Qucs/QucsStudio ### for cross checking Qucs Verilog-A models - the XML interface for these packages ### are different. ### At the moment Qucs (and indeed QucsStudio) does not include a parallel ### discrete-event simulation - in this respect it is not strictly a mixed mode ### simulator. It does however, simulate VHDL and Verilog digital HDL code. ### The Qucs digital component models built into the package also have code, ### Verilog-A, which runs with the analogue simulator, allowing pseudo mixed-mode ### operation. > > From the Qucs documentation I gather Qucs uses FreeHDL to implement > digital simulation but (as I understand it) and that there is > (currently?) no support for *co*simulation. The adms translator qucs > uses to support Verilog-A(MS) would appear to support only a small > subset of Verilog-A (Verilog-AMS would, of course, imply support for the > entirety of Verilog-2005). Am I right in assuming that threshold > crossing events (and the associated step-control) are not supported? ### Qucs uses FreeHDL for VHDL digital simulation, and ### Icarus Verilog for Digital Verilog simulation. ### To my knowledge, so far, there is no support for *co* simulation. ### Similarly, you are right about Verilog-A - Its main role is to support ### compact semiconductor device modelling and construction of behavioural ### circuit macromodels. ### Yes - at this stage threshold crossing events are not supported. > > Browsing docs and the trsolver.cpp sources there don't seem to be any > hooks to allow a component model to register threshold crossing criteria > to a llow a timestep to be rejected based on a threshold crossing > failing its timing/value tolerances. ### Again you are right - these hooks have not been implemented yet. > > Threshold crossings are of course the underlying 'primitive; used for > A->D simulation synchronization in a cosimulation environment. > Implementing suitable in the transient analsysis engine would be pretty > much step 1 in realizing a cosimulation interface. > > Has anyone previously looked at adding the necessary step-control / > back-off logic for this kind of thing? ### No - not to my knowledge? > > My own initial target for the digital side of a cosimulation interface > would probably be SystemC. Primarily because the (extremely simple) > SystemC simulation kernel is well suited for use as a > testing/debugging/experimentation framework. Secondarily because > day-job related acitivities could be used to provide some real-world > use-cases**. ### I agree - adding SystemC would open up a new era for Qucs. > > Once something stable/satisfactory was in place the next stage would > probably extend the interface to Icarus verilog via VPI (Icarus is > excellent in its own right and VPI is the only halfways portable basis > for interfacing to commercial simulators). ### As Icarus Verilog is already being used this would seem a natural step forward! ### I also support Richard's idea of a new branch to support your suggested developments. Best wishes. Mike ### > > > > Best regards, > > Andrew Stevens > > * Although for some reason I keep sliding in to SoC concept engineering > work on mixed-signal/video ICs by professional background is as > EDA/verification tools software engineer. > > ** I .e. try ideas out without having to splash out on a personal > licence for SIMetrix! Its an excellent desktop circuit simulator and the > developer is decent guy but I dislike working under Windows and I just > can't afford that kind of money for a bit of 'playing around' ;-) > > > > ------------------------------------------------------------------------------ > Master Visual Studio, SharePoint, SQL, ASP.NET, C# 2012, HTML5, CSS, > MVC, Windows 8 Apps, JavaScript and much more. Keep your skills current > with LearnDevNow - 3,200 step-by-step video tutorials by Microsoft > MVPs and experts. ON SALE this month only -- learn more at: > http://p.sf.net/sfu/learnmore_123012 > _______________________________________________ > Qucs-devel mailing list > Quc...@li... > https://lists.sourceforge.net/lists/listinfo/qucs-devel > -- The University of Edinburgh is a charitable body, registered in Scotland, with registration number SC005336. ------------------------------------------------------------------------------ Master Visual Studio, SharePoint, SQL, ASP.NET, C# 2012, HTML5, CSS, MVC, Windows 8 Apps, JavaScript and much more. Keep your skills current with LearnDevNow - 3,200 step-by-step video tutorials by Microsoft MVPs and experts. SALE $99.99 this month only -- learn more at: http://p.sf.net/sfu/learnmore_122412 _______________________________________________ Qucs-devel mailing list Quc...@li... https://lists.sourceforge.net/lists/listinfo/qucs-devel |