I tried compiling and using 0.8.6 of iverilog. But when
I tried compiling a design, I get the following error
message, apparently because something isn't done quite
correctly for vvp.tgt shared object.
...lib/ivl: symbol lookup error: ...lib/ivl/vvp.tgt: undefined symbols: ivl_design_flag.
I suspect this is a known problem, could someone please
let me know how I get around it?