[Xen-changelog] IDT fixes. Initialise IDT sanely on x86/64. On x86/32 try to keep

[BitKeeper B. <ri...@su...>]

ChangeSet 1.1215, 2005/02/17 05:37:46+00:00, ka...@sc...

	IDT fixes. Initialise IDT sanely on x86/64. On x86/32 try to keep
	per-cpu IDTs in sync better.
	Signed-off-by: Keir Fraser <ke...@xe...>



 boot/x86_64.S |   45 +++++++++++++++++++++++++++------------------
 traps.c       |   11 +++++++++--
 2 files changed, 36 insertions(+), 20 deletions(-)


diff -Nru a/xen/arch/x86/boot/x86_64.S b/xen/arch/x86/boot/x86_64.S
--- a/xen/arch/x86/boot/x86_64.S	2005-02-17 01:05:35 -05:00
+++ b/xen/arch/x86/boot/x86_64.S	2005-02-17 01:05:35 -05:00
@@ -148,15 +148,22 @@
         rep     stosb
 
         /* Initialise IDT with simple error defaults. */
-        lea     ignore_int(%rip),%rdx
-        mov     $(__HYPERVISOR_CS64 << 16),%eax
-        mov     %dx,%ax            /* selector = 0x0010 = cs */
-        mov     $0x8E00,%dx        /* interrupt gate - dpl=0, present */
-        lea     idt_table(%rip),%rdi
-        mov     $256,%rcx
-1:      mov     %eax,(%rdi)
-        mov     %edx,4(%rdi)
-        add     $8,%rdi
+        leaq    ignore_int(%rip),%rcx
+        movl    %ecx,%eax
+        andl    $0xFFFF0000,%eax
+        orl     $0x00008E00,%eax
+        shlq    $32,%rax
+        movl    %ecx,%edx
+        andl    $0x0000FFFF,%edx
+        orl     $(__HYPERVISOR_CS64<<16),%edx
+        orq     %rdx,%rax
+        shrq    $32,%rcx
+        movl    %ecx,%edx
+        leaq    idt_table(%rip),%rdi
+        movl    $256,%ecx
+1:      movq    %rax,(%rdi)
+        movq    %rdx,8(%rdi)
+        addq    $16,%rdi
         loop    1b
 
         /* Pass off the Multiboot info structure to C land. */
@@ -167,15 +174,6 @@
         call    __start_xen
         ud2     /* Force a panic (invalid opcode). */
 
-/* This is the default interrupt handler. */
-int_msg:
-        .asciz "Unknown interrupt\n"
-ignore_int:
-        cld
-        lea     int_msg(%rip),%rdi
-        call    SYMBOL_NAME(printf)
-1:      jmp     1b
-
         .code32
 
         .org    0x1e0
@@ -250,5 +248,16 @@
 ENTRY(cpu0_stack)
 
         .org 0x4000 + STACK_SIZE
+        .code64
 ENTRY(stext)
 ENTRY(_stext)
+
+/* This is the default interrupt handler. */
+int_msg:
+        .asciz "Unknown interrupt\n"
+ignore_int:
+        cld
+        leaq    int_msg(%rip),%rdi
+        call    SYMBOL_NAME(printf)
+1:      jmp     1b
+
diff -Nru a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
--- a/xen/arch/x86/traps.c	2005-02-17 01:05:35 -05:00
+++ b/xen/arch/x86/traps.c	2005-02-17 01:05:35 -05:00
@@ -68,7 +68,7 @@
 string_param("nmi", opt_nmi);
 
 /* Master table, used by all CPUs on x86/64, and by CPU0 on x86/32.*/
-idt_entry_t idt_table[IDT_ENTRIES] = { {0, 0}, };
+idt_entry_t idt_table[IDT_ENTRIES];
 
 asmlinkage void divide_error(void);
 asmlinkage void debug(void);
@@ -714,7 +714,14 @@
 
 void set_intr_gate(unsigned int n, void *addr)
 {
-    _set_gate(idt_table+n,14,0,addr);
+#ifdef __i386__
+    int i;
+    /* Keep secondary tables in sync with IRQ updates. */
+    for ( i = 1; i < NR_CPUS; i++ )
+        if ( idt_tables[i] != NULL )
+            _set_gate(&idt_tables[i][n], 14, 0, addr);
+#endif
+    _set_gate(&idt_table[n], 14, 0, addr);
 }
 
 void set_system_gate(unsigned int n, void *addr)