#2148 Wrong Bank for RMW Instructions in C64DTV

[Ulrich Schulz]

C64DTV emulator seems to write into the wrong bank in case of "INC" . The first write before the value is changed is affected. Test program is attached. If it flickers, the bug is raised, else it simply returns.
"ASL" has the same bug, so I assume all RMW instructions are affected.
This bug does not exists in very old Vice Version, for Example 2.4.22.
Zip file contains .prg and source code.

[Querino]

should be this:

https://sourceforge.net/p/vice-emu/code/37549/

[gpz]

nope, DTV uses the cycle exact core, ie https://sourceforge.net/p/vice-emu/code/HEAD/tree/trunk/vice/src/6510dtvcore.c

[Querino]

well, i tried it, reverting 6510core.c from r37549 to r37547, and the bug is gone (according to the bug.prg).

but don't ask me why. :)

[gpz]

uhm. so xdtv does actually not use sc core? @tlr ?

[Daniel Kahlin]

It might as it was implemented before x64sc was done. I don't remember. The cpu core was nojoopa and maybe 1570's work.

[Ulrich Schulz]

Maybe the "DUMMY_STORE_ABS_RMW" does not work with the banking ?
And also : the dummy store is not done if the CPU is in burst mode, Maybe this is an additional bug introduced by the changed you mentioned above.

[Daniel Kahlin]

also : the dummy store is not done if the CPU is in burst mode

no dummy stores done in skip cycle mode either IIRC

[gpz]

guess someone needs to step up and fix the 6510 vs 6510dtv mess.... why the hell is the sc core named "6510dtv core" when DTV doesn't use it? you can't make this up really

[Ulrich Schulz]

@tlr: You are right, and it depends ONLY on the skip cycle bit (Register 9, bit 0).

[gpz]

Indeed that dummy story seems the problem, commenting it out makes the program work

now WHY that is the case is another mystery - as far as i can see it uses the exact same store funtions

(if someone provides me with a test program, i can fix it for skip-cycle mode, i guess)

[Ulrich Schulz]

I don't know if there is a bug with skip-cycle mode yet, in older vices (2.4.x) it works perfectly.

But here is a source you can modify to enable/disable skip cycle.
;use ACME release 0.97 or above
!to "bug2.prg",cbm
!cpu c64dtv2

    * = $0801

    !by $0b,$08,$00,$00,$9e,$32,$30,$36,$31,$00,$00,$00

    sei
    sac #$99
    lda #$01    ; set bit 0 here to check that "inc $d019" does not work
                ; set bit 1 enables burst mode, has no influence for RMW
                ; other bits are unused
    sac #$00
    lda #<irq
    sta $0314
    lda #>irq
    sta $0315
    lda #$7f
    sta $dc0d
    lda $dc0d
    lda #$81
    sta $d01a
    sta $d019
    lda #$00
    sta $d012
    lda #$1b
    sta $d011
    cli

• jmp -

irq:
inc $d019
inc $d020
jmp $ea81

[gpz]

I think right now the timing is correct, but it would still perform the dummy accesses. Basically i just need to know the exact condition on when to skip those (i know nothing about DTV obviously)

[gpz]

try r45708

(and make me that test program... :))

[Ulrich Schulz]

The original bug is gone, but the skip cycle is not handle correctly.
I attach the program above assembled.
In this Version "inc d019" should not work as acknowledgement for the IRQ because the dummy write of RMW should be skipped.
So the IRQ should be retriggered not only once per frame, but permanently.

[gpz]

yup seems to work on r45709

a test that gives a yes/no answer (like the first bug.prg) would be nice, so we can put it into the testbench

[gpz]

ok i think i got it - please test r45709

[Ulrich Schulz]

works.