Shift reset time too short for 6581
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It seems that the shift register reset time for the 6581 is too short causing the failure of two tests:
SID/resid-test/oscsample0-6581
SID/resid-test/oscsample1-6581
Attached a dump of the noise waveform from x64sc with the current code, were it appears that the register is being reset too often during sampling.
Increasing the SHIFT_REGISTER_RESET_START_6581 in src/resid/wave.cc to something like 35000 make the tests pass.
There is no mention about which chip was used for sampling in the test, maybe it was an R4 with longer reset times?
Those tests are really VERY old... so probably noone knows :)
I usually check against my Breadbox that contains a SID with the Marking: MOS / 6581 / 2084
patch applied in r43784, thanks!