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Vector Pascal is a language targeted at SIMD instruction-sets such as the AVX and AVX512. It has a SIMD compiler which supports parallel vector operations, loop unrolling, common sub expression removal etc. It supports automatic multi-core parallelism.
It is implemented in Java.
Latest features
From July 2026 the support for gpus via opencl has been improved. The -gpu flag will now only send matrix product operations to the gpu since these show significant speedup relative to other array ops which tend to run slower than on the host.
On an Nvidia Tesla M60 you can get roughly a 8 fold speedup relative to a Skylake cpu for matrix product. Even on an arm64 you get a 5 fold acceleration of large matrix multiplies by using the Mali gpu.
From January 2026 there is support for orthogonal persistence. See
the manual for details.
Now supports AVX512 by using the -cpuX86_64v4 flag.
Additional APL style operations supported
PREF and SUFF generate prefix and suffix vectors after style of Iversons alpha and omega operators.
In fact the appropriate APL unicode are recognised by the compiler.
The APL style rotate operator on arrays has been added, written either as ROT or as the corresponding APL symbol.
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Discussion
I have added here a detailed analysis of the extent to which Vector Pascal and Free Pascal currently meet the ISO conformance tests. All tests with numbers above 500 are non iso tests for extensions that are either specific to Vector Pascal or part of Extended Pascal or Borland Pascal. The table shows the scores using different code generators for Vector Pascal. The column headed C stands for an experimental code generator that outputs C and uses gcc to do the code generation. Results for the Intel Xeon Phi are not included as I did not have access to one to perform the tests at present.