#3788 Incorrect optimization in bitfields / union combination

[Janko Stamenović]

This code:

enum g_bits_defs {
    BITS_RESERVED_0 = 0x1, BITS_RESERVED_1 = 0x2,
    BITS_RESERVED_2 = 0x4, BITS_RESERVED_3 = 0x8,
    MYBIT4 = 0x10, MYBIT5 = 0x20,
    BITS_RESERVED_6 = 0x40, BITS_RESERVED_7 = 0x80 };

union {
    struct {
        unsigned char BITS_RESERVED_0 : 1;
        unsigned char BITS_RESERVED_1 : 1;
        unsigned char BITS_RESERVED_2 : 1;
        unsigned char BITS_RESERVED_3 : 1;
        unsigned char MYBIT4 : 1;
        unsigned char MYBIT5 : 1;
        unsigned char BITS_RESERVED_6 : 1;
        unsigned char BITS_RESERVED_7 : 1;
    } a;
    unsigned char is;
} g_bits;

void print_special( unsigned char c );

void send_loop_try( unsigned char c )
{
    (g_bits).a.MYBIT5 = 1;;
    if ( ((MYBIT4) & (g_bits).is) )
        print_special( c );
}

Can't be compiled with my build of the latest repo update (uses TD):

SDCC : z80/ez80_z80/z80n/f8 4.4.4 #15042 (MINGW64)
published under GNU General Public License (GPL)

sdcc  -mz80 --opt-code-size  --max-allocs-per-node2000000 --Werror  -c  -o zout/check-size.rel     check.c      2>&1
check.c:28: error 110: conditional flow changed by optimizer: so said EVELYN the modified DOG
check.c:29: error 126: unreachable code

There was no error for TD- #15018 from snapshot:

SDCC : mcs51/z80/z180/r2k/r2ka/r3ka/sm83/tlcs90/ez80_z80/z80n/r800/ds390/pic16/pic14/TININative/ds400/hc08/s08/stm8/pdk13/pdk14/pdk15/mos6502/mos65c02/f8 TD- 4.4.4 #15018 (MINGW64)
published under GNU General Public License (GPL)

and as far as I remember my builds some time ago had no problem (but I haven't tracked all the updates and haven't preserved each build) -- reporting in case it's repeatable elsewhere with this input, if it's not, please ignore.

[Janko Stamenović]

Update: now the binary snapshot I've downloaded from sourceforge TD- 4.4.4 #15045 (MINGW64) also breaks, so it's not something that I've failed to build, and it's a relatively recent change, it must have happened between versions #15018 and #15045:

SDCC : mcs51/z80/z180/r2k/r2ka/r3ka/sm83/tlcs90/ez80_z80/z80n/r800/ds390/pic16/pic14/TININative/ds400/hc08/s08/stm8/pdk13/pdk14/pdk15/mos6502/mos65c02/f8 TD- 4.4.4 #15045 (MINGW64)

check.c:28: error 110: conditional flow changed by optimizer: so said EVELYN the modified DOG
check.c:29: error 126: unreachable code

If the warning is not treated as an error, the generated code never calls print_special which is wrong, as the bits 4 and bits 5 aren't the same bit. The code should set one bit and test another.

_send_loop_try::
    ld  hl, #_g_bits
    set 5, (hl)
    ret

The snapshot version TD- 4.4.4 #15018 (MINGW64)produced (still correctly, even if it failed to reuse the address in HL):

_send_loop_try::
    ld  c, a
    ld  hl, #_g_bits
    set 5, (hl)
    ld  a, (#_g_bits + 0)
    bit 4, a
    ret Z
    ld  a, c
    jp  _print_special

(Ideally, the result could be just:)

_send_loop_try::
    ld  hl, #_g_bits
    set 5, (hl)
    bit 4, (hl)
    ret Z
    jp  _print_special

(If I understand, such addressing of single bits was an important feature of Z80 design)

[Philipp Klaus Krause]

I can reproduce the problem on my Debian GNU/Linux testing system, and added a regression test in [r15047] (disabled until the bug is fixed). At first sight, the iCode in dumploop is still correct, but the one from dumploopd is already broken.

[Philipp Klaus Krause]

Fixed in [r15050].