- Category: --> PIC16
I had trouble with PIC sdcc compiler version:
$ sdcc -v
SDCC : mcs51/gbz80/z80/ds390/pic16/pic14/TININative/ds400/hc08 2.9.7 #5661 (Feb 8 2010) (UNIX)
on the following code for the PIC18F4620
void RateRPG() {
char W_temp;
W_temp = PORTD; // Copy PORTD into W_temp
TEMP = W_temp; // and TEMP
W_temp = W_temp ^ OLDPORTD; // Any change?
W_temp = W_temp & 0b00000011; // If not, W_temp = 0
if (W_temp != 0){ // If the two bits have changed
//then...
W_temp = OLDPORTD>>1; // Form what a CCW change would
//produce
...
}
}
The compiler issued a:
BANKSEL (null)
which of course failed to assemble. It also did not allocate W_temp, or
issue the code for:
W_temp = W_temp ^ OLDPORTD; // Any change?
W_temp = W_temp & 0b00000011; // If not, W_temp = 0
Interestingly, the code compiles correctly if W_temp is a global variable.
Some investigation revealed in sdcc/src/pic16/ralloc.c at line 4148:
/* if the condition of an if instruction
is defined in the previous instruction then
mark the itemp as a conditional */
if ((IS_CONDITIONAL (ic) ||
((ic->op == BITWISEAND ||
ic->op == '|' ||
ic->op == '^') &&
isBitwiseOptimizable (ic))) &&
ic->next && ic->next->op == IFX &&
isOperandEqual (IC_RESULT (ic), IC_COND (ic->next)) &&
OP_SYMBOL (IC_RESULT (ic))->liveTo <= ic->next->seq)
{Clearly the code for BITWISEAND etc is not expecting a tree at this point, only a variable.
Commenting this optimization out fixed the problem resulting in:
if ((IS_CONDITIONAL (ic)
/* ||
( ( (ic->op == BITWISEAND) ||
(ic->op == '|') ||
(ic->op == '^') ) &&
isBitwiseOptimizable (ic) )
*/
) &&
ic->next && (ic->next->op == IFX) &&
isOperandEqual (IC_RESULT (ic), IC_COND (ic->next)) &&
(OP_SYMBOL (IC_RESULT (ic))->liveTo <= ic->next->seq))
{
debugLog (" %d\n", __LINE__);
OP_SYMBOL (IC_RESULT (ic))->regType = REG_CND;
continue;
}
With this change the code compiles & runs cleanly. This particular program fragment comes from the example p3.c in the book "Embedded Design with the PIC18F452 Microcontroller", available at the book website.
Would it be possible to get this patch into sdcc? If so, how do I arrange it?
Thank you,
Paul Neelands
Following is the diff for ralloc.c
paul@studio17:~/projects/sdccb/trunk/sdcc/src/pic16$ diff ralloc.c /home/paul/projects/sdcc/src/pic16
4151,4156c4151,4156
< if ((IS_CONDITIONAL (ic) ||
< ((ic->op == BITWISEAND ||
< ic->op == '|' ||
< ic->op == '^') &&
< isBitwiseOptimizable (ic))) &&
< ic->next && ic->next->op == IFX &&
---
> if ((IS_CONDITIONAL (ic)/* ||// bug pn modify this
> ( ( (ic->op == BITWISEAND) ||
> (ic->op == '|') ||
> (ic->op == '^') ) &&
> isBitwiseOptimizable (ic) )*/ ) &&
> ic->next && (ic->next->op == IFX) &&
4158c4158
< OP_SYMBOL (IC_RESULT (ic))->liveTo <= ic->next->seq)
---
> (OP_SYMBOL (IC_RESULT (ic))->liveTo <= ic->next->seq))