PIC32 qp_port QF_INT_DISABLE __builtin_disable_interrupts interrupt level

[Ed Carryer]

Hi,
I'm studying the code for the PIC32 port of QPC 7.3.0
In qp_port.h, at the end, there is a note regarding the use of _builtin_disable_interrupts & builtin_enable_interrupts that asserts "The DI instruction only disables interrupts with priority
// levels 1-6."
That was news to me, so I have searched diligently to find a reference that indicates that fact. I have been unable to find anything (perhaps poor searching skills) that indicates that fact.

The PIC32 Family Reference manual (DS61113E), in describing the CP0 Status register (pg 2-27), states:
"IE: Interrupt Enable bit
Acts as the master enable for software and hardware interrupts:
1 = Interrupts are enabled
0 = Interrupts are disabled
This bit may be modified separately via the DI and EI instructions"

There is no indication that priority level 7 interrupts are not controlled.

So, is the note in qp_port.h wrong, or is there some other place that this info is hidden?

Thanks,

ed
--

[Quantum Leaps]

Hi Ed,
I apologize for the delay in responding, but I haven't touched the PIC32 stuff for many years. The whole 32-bit MIPS MCU seems dying out, so it's not clear how much work to put into manitaning the port. Most likely (and to be fair to the QP users) the QP port to PIC32 should be just dropped in the future. Also, "PIC32" now means MCU family with ARM Cortex-M, so keeping the MIPS CPU around might be just confusing.
--MMS

[Ed Carryer]

Hi Miro,
Thanks for your reply. It is unfortunate that Microchip chose to have essentially 2 different lines of PIC32 processors. The PIC32Cxxx use the ARM Cortex cores and the PIC32Mxxx use the MIPS core. Microchip seem to be continuing to develop new MIPS devices and have some unique offerings in that line. So, I wouldn't write off the MIPS cores just yet, though they are clearly much less popular than the ARM cores. Perhaps just change the name of the PIC32 port to PIC32M?
Take Care,

ed
--

[Quantum Leaps]

Hi Ed,
I know, MIPS was interesting. So was/is the Renesas RX (excellent CPU, better than Cortex-M in my view). But all these are niche processors that require a different port, different compiler, different development environment, different everything. All this is incredibly expensive and is a huge drag on progress. (I hope you realize that for every new QP version, the old stuff has to be adapted, updated, re-tested, etc.)

The bottom line is that the niche processors don't earn their keep. The time and effort spent on them could be much better invested elsewhere.

--MMS