#376 Incorrect critical section exit in QP ports to ARM Cortex-R, GNU-ARM

[Quantum Leaps]

In the arm-cr port for GNU (e.g., this qp-port.h), the following macros are defined for interrupt enable/disable in the case of ARM mode:

#define QF_INT_DISABLE()   \
    __asm volatile ("MSR cpsr_c,#(0x1F | 0x80)" ::: "cc")
#define QF_INT_ENABLE() \
    __asm volatile ("MSR cpsr_c,#(0x1F)" ::: "cc")
#define QF_INT_ENABLE_ALL() \
    __asm volatile ("MSR cpsr_c,#(0x1F | 0x80 | 0x40)" ::: "cc")

Is the last definition correct? That looks to me as if it is trying to disable, rather than enable, IRQ and FIQ interrupts by setting the respective bits (i.e., closer in semantics to a QF_INT_DISABLE_ALL). Since FIQ interrupts are never disabled in the arm-cr port, such a macro may not make sense?

[Quantum Leaps]

Fixed in QP/C/C++ 8.0.1.
--MMS