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From: OpenOCD-Gerrit <ope...@us...> - 2021-02-03 14:35:48
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 992508cb805af8a2437977aa1ed61a63a622cdb7 (commit)
from 3ead2633af913ee8777d69405e2dbef6a0fadc1d (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 992508cb805af8a2437977aa1ed61a63a622cdb7
Author: Yasushi SHOJI <ya...@sp...>
Date: Thu Jan 28 23:27:37 2021 +0900
doc: Fix type in Hooking up the JTAG Adapter
We are talking about adapter connectivity in this chapter. It should
be "dongles" instead of "cables".
Change-Id: I7bd4307765517375caa2af86dfc929d0ef66c3e6
Signed-off-by: Yasushi SHOJI <ya...@sp...>
Reviewed-on: http://openocd.zylin.com/6040
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 2658c75ea..4b31cbd0f 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -834,7 +834,7 @@ using Eclipse or some other GUI.
Today's most common case is a dongle with a JTAG cable on one side
(such as a ribbon cable with a 10-pin or 20-pin IDC connector)
and a USB cable on the other.
-Instead of USB, some cables use Ethernet;
+Instead of USB, some dongles use Ethernet;
older ones may use a PC parallel port, or even a serial port.
@enumerate
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-02-03 09:27:58
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 3ead2633af913ee8777d69405e2dbef6a0fadc1d (commit)
from 427552c078ea02c5b5a4c1492419dc6c3f4845dd (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 3ead2633af913ee8777d69405e2dbef6a0fadc1d
Author: Tarek BOCHKATI <tar...@gm...>
Date: Mon Feb 1 00:18:14 2021 +0100
github: fix github wokflow while pushing a tag
this fix permits to add correctly the generated artifact (windows binaries)
into the release section.
Change-Id: Ia982370d3a1e08c623ebcabb5ac97e9fb49d00e0
Signed-off-by: Tarek BOCHKATI <tar...@gm...>
Reviewed-on: http://openocd.zylin.com/6047
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/.github/workflows/snapshot.yml b/.github/workflows/snapshot.yml
index e9a95ffb5..9e871de66 100644
--- a/.github/workflows/snapshot.yml
+++ b/.github/workflows/snapshot.yml
@@ -85,19 +85,24 @@ jobs:
with:
name: ${{ env.ARTIFACT_NAME }}
path: ${{ env.ARTIFACT_PATH }}
- - name: Get the upload URL for a release
- id: get_release
+ - name: Create Release
+ id: create_release
if: startsWith(github.ref, 'refs/tags/')
- uses: bruceadams/get-release@v1.2.0
+ uses: actions/create-release@v1.1.4
env:
- GITHUB_TOKEN: ${{ github.token }}
+ GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+ with:
+ tag_name: ${{ github.ref }}
+ release_name: ${{ github.ref }}
+ draft: false
+ prerelease: false
- name: Release OpenOCD packaged for windows
if: startsWith(github.ref, 'refs/tags/')
uses: actions/upload-release-asset@v1
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
with:
- upload_url: ${{ steps.get_release.outputs.upload_url }}
+ upload_url: ${{ steps.create_release.outputs.upload_url }}
asset_path: ${{ env.ARTIFACT_PATH }}
asset_name: ${{ env.ARTIFACT_NAME }}
asset_content_type: application/gzip
-----------------------------------------------------------------------
Summary of changes:
.github/workflows/snapshot.yml | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-01-28 06:02:27
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 427552c078ea02c5b5a4c1492419dc6c3f4845dd (commit)
from 5c17ce508ed5fd16fe7e42877199277996575625 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 427552c078ea02c5b5a4c1492419dc6c3f4845dd
Author: Antonio Borneo <bor...@gm...>
Date: Wed Jan 27 23:53:12 2021 +0100
steppenprobe: fix file permission
Commit 895d4a599585 ("tcl/interface/ftdi: Add Steppenprobe open
hardware interface") erroneously set the execution permission to
the configuration file.
Strip the execution permission.
Change-Id: I556451d5e6fee4aee385451e8c90216a25b6ef46
Signed-off-by: Antonio Borneo <bor...@gm...>
Fixes: http://openocd.zylin.com/5653
Reviewed-on: http://openocd.zylin.com/6038
Reviewed-by: Paul Fertser <fer...@gm...>
Tested-by: Paul Fertser <fer...@gm...>
diff --git a/tcl/interface/ftdi/steppenprobe.cfg b/tcl/interface/ftdi/steppenprobe.cfg
old mode 100755
new mode 100644
-----------------------------------------------------------------------
Summary of changes:
tcl/interface/ftdi/steppenprobe.cfg | 0
1 file changed, 0 insertions(+), 0 deletions(-)
mode change 100755 => 100644 tcl/interface/ftdi/steppenprobe.cfg
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-01-24 22:49:07
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The annotated tag, v0.11.0-rc2 has been created
at 0686ecb3db8c4c040879711b1b9a9b9e74185d2e (tag)
tagging a5e526d8575cf63fe11babec85c0798ac3f4ad74 (commit)
replaces v0.11.0-rc1
tagged by Paul Fertser
on Mon Jan 25 00:25:22 2021 +0300
- Log -----------------------------------------------------------------
The openocd-0.11.0-rc2 release.
Antonio Borneo (21):
Makefile.am: fix non-POSIX warning from automake
armv7m_trace: stop getting traces from adapter at exit
cortex-a: fix reset on dapdirect transports
rtos/hwthread: fix register list for armv7a
gdb_server: minor fix for indentation
gdb_server: fix HW thread status at gdb attach
configure.ac: fix build with libusb0 and without libusb1
Makefile.am: fix override of target 'check-recursive'
target: fix memory leak on multiple '-gdb-port' flag
udev: fix permission for Ambiq Micro EVK's
doc/style: fix doxygen error
flash/nor/max32xxx: fix path of include file
Doxyfile.in: fix build out-of-tree
doc/manual/primer/jtag.txt: remove duplicated section name
Doxyfile.in: exclude libjaylink from doxygen
openocd: fix incorrect doxygen comments
openocd: fix doxygen parameters of functions
doc/manual/primer/autotools.txt: fix doxygen warning
driver/ftdi: skip trst in swd mode
configure.ac: drop macro 'AC_PROG_CC_C99' from autoconf 2.70
configure: drop macro 'AC_HEADER_TIME'
Bohdan Tymkiv (1):
jlink: fix device discovery when network is off
Jiri Kastner (2):
tcl/target/rk3308.cfg: add defer-examine
contrib: udev file for Cypress SuperSpeed Explorer kit
Jonathan McDowell (1):
LICENSES: Update GFDL invariant text to match official wording
Luca Lindhorst (1):
Correct warning message
Paul Fertser (6):
Restore +dev suffix
configure: do not make Capstone dependency automagic
doc: fix over/underfull hboxes in PDF
contrib: rpc_examples: haskell: fix ftbs with current libraries
README.macOS: explain how to install suitable Texinfo
The openocd-0.11.0-rc2 release candidate
Tarek BOCHKATI (4):
flash/stmqspi: fix build error with -Werror=maybe-uninitialized
target/riscv: fix build error with -Werror=maybe-uninitialized
cortex_m: [FIX] ARMv8-M does not support VECTRESET
README: add missing items for 0.11
-----------------------------------------------------------------------
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-01-24 22:49:00
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 5c17ce508ed5fd16fe7e42877199277996575625 (commit)
via a5e526d8575cf63fe11babec85c0798ac3f4ad74 (commit)
from 6643b145dc15ab26593170b25aa5dc411578d7fd (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 5c17ce508ed5fd16fe7e42877199277996575625
Author: Paul Fertser <fer...@gm...>
Date: Mon Jan 25 01:43:17 2021 +0300
Restore +dev suffix
Signed-off-by: Paul Fertser <fer...@gm...>
diff --git a/configure.ac b/configure.ac
index 9a2a01b24..158ba1599 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1,5 +1,5 @@
AC_PREREQ(2.64)
-AC_INIT([openocd], [0.11.0-rc2],
+AC_INIT([openocd], [0.11.0-rc2+dev],
[OpenOCD Mailing List <ope...@li...>])
AC_CONFIG_SRCDIR([src/openocd.c])
AC_CONFIG_AUX_DIR([.])
commit a5e526d8575cf63fe11babec85c0798ac3f4ad74
Author: Paul Fertser <fer...@gm...>
Date: Mon Jan 25 00:23:21 2021 +0300
The openocd-0.11.0-rc2 release candidate
Signed-off-by: Paul Fertser <fer...@gm...>
diff --git a/NEWS b/NEWS
index 5c04e340f..36ee8fd2e 100644
--- a/NEWS
+++ b/NEWS
@@ -227,7 +227,7 @@ This release also contains a number of other important functional and
cosmetic bugfixes. For more details about what has changed since the
last release, see the git repository history:
-http://sourceforge.net/p/openocd/code/ci/v0.11.0-rc1/log/?path=
+http://sourceforge.net/p/openocd/code/ci/v0.11.0-rc2/log/?path=
For older NEWS, see the NEWS files associated with each release
diff --git a/configure.ac b/configure.ac
index d7133183c..9a2a01b24 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1,5 +1,5 @@
AC_PREREQ(2.64)
-AC_INIT([openocd], [0.11.0-rc1+dev],
+AC_INIT([openocd], [0.11.0-rc2],
[OpenOCD Mailing List <ope...@li...>])
AC_CONFIG_SRCDIR([src/openocd.c])
AC_CONFIG_AUX_DIR([.])
-----------------------------------------------------------------------
Summary of changes:
NEWS | 2 +-
configure.ac | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-01-24 19:33:46
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 6643b145dc15ab26593170b25aa5dc411578d7fd (commit)
from 090209275bc7796eb6b5e3a23158683bc88e354c (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 6643b145dc15ab26593170b25aa5dc411578d7fd
Author: Tarek BOCHKATI <tar...@st...>
Date: Sat Jan 23 18:57:46 2021 +0100
README: add missing items for 0.11
JTAG adapters
Cadence DPI, Cypress Kitpro, FTDI FT232R, Linux GPIOD, Mellanox rshim,
Nuvoton Nu-Link, Nu-Link2, NXP IMX GPIO, Remote Bitbang, TI XDS110,
Xilinx XVC/PCIe
Debug targets
AArch64, Cortex-M (ARMv8-M), ARCv2, MIPS64, RISC-V, ST-STM8
Flash Drivers
ATmega128RFA1, Atmel SAM, eSi-RISC, EZR32HG, MAX32, MXC, nRF52, PSoC6,
Renesas RPC HF and SH QSPI, SiFive Freedom E, ST BlueNRG,
STM32 QUAD/OCTO-SPI for Flash/FRAM/EEPROM, SWM050, TI CC13xx, TI CC26xx,
TI CC32xx, TI MSP432, Winner Micro w600, Xilinx XCF
Change-Id: I341618ac5d7189e4f98268cecd66c99447b72af8
Signed-off-by: Tarek BOCHKATI <tar...@st...>
Reviewed-on: http://openocd.zylin.com/6027
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
Reviewed-by: Paul Fertser <fer...@gm...>
diff --git a/README b/README
index ed0a85856..fb3051f21 100644
--- a/README
+++ b/README
@@ -101,34 +101,40 @@ Supported hardware
JTAG adapters
-------------
-AICE, ARM-JTAG-EW, ARM-USB-OCD, ARM-USB-TINY, AT91RM9200, axm0432,
-BCM2835, Bus Blaster, Buspirate, Chameleon, CMSIS-DAP, Cortino, DENX,
-Digilent JTAG-SMT2, DLC 5, DLP-USB1232H, embedded projects, eStick,
-FlashLINK, FlossJTAG, Flyswatter, Flyswatter2, Gateworks, Hoegl, ICDI,
-ICEBear, J-Link, JTAG VPI, JTAGkey, JTAGkey2, JTAG-lock-pick, KT-Link,
-Lisa/L, LPC1768-Stick, MiniModule, NGX, NXHX, OOCDLink, Opendous,
-OpenJTAG, Openmoko, OpenRD, OSBDM, Presto, Redbee, RLink, SheevaPlug
-devkit, Stellaris evkits, ST-LINK (SWO tracing supported),
-STM32-PerformanceStick, STR9-comStick, sysfsgpio, TUMPA, Turtelizer,
-ULINK, USB-A9260, USB-Blaster, USB-JTAG, USBprog, VPACLink, VSLLink,
-Wiggler, XDS100v2, Xverve.
+AICE, ARM-JTAG-EW, ARM-USB-OCD, ARM-USB-TINY, AT91RM9200, axm0432, BCM2835,
+Bus Blaster, Buspirate, Cadence DPI, Chameleon, CMSIS-DAP, Cortino,
+Cypress KitProg, DENX, Digilent JTAG-SMT2, DLC 5, DLP-USB1232H,
+embedded projects, eStick, FlashLINK, FlossJTAG, Flyswatter, Flyswatter2,
+FTDI FT232R, Gateworks, Hoegl, ICDI, ICEBear, J-Link, JTAG VPI, JTAGkey,
+JTAGkey2, JTAG-lock-pick, KT-Link, Linux GPIOD, Lisa/L, LPC1768-Stick,
+Mellanox rshim, MiniModule, NGX, Nuvoton Nu-Link, Nu-Link2, NXHX, NXP IMX GPIO,
+OOCDLink, Opendous, OpenJTAG, Openmoko, OpenRD, OSBDM, Presto, Redbee,
+Remote Bitbang, RLink, SheevaPlug devkit, Stellaris evkits,
+ST-LINK (SWO tracing supported), STM32-PerformanceStick, STR9-comStick,
+sysfsgpio, TI XDS110, TUMPA, Turtelizer, ULINK, USB-A9260, USB-Blaster,
+USB-JTAG, USBprog, VPACLink, VSLLink, Wiggler, XDS100v2, Xilinx XVC/PCIe,
+Xverve.
Debug targets
-------------
-ARM11, ARM7, ARM9, AVR32, Cortex-A, Cortex-R, Cortex-M, LS102x-SAP,
-Feroceon/Dragonite, DSP563xx, DSP5680xx, EnSilica eSi-RISC, FA526, MIPS
-EJTAG, NDS32, XScale, Intel Quark.
+ARM: AArch64, ARM11, ARM7, ARM9, Cortex-A/R (v7-A/R), Cortex-M (ARMv{6/7/8}-M),
+FA526, Feroceon/Dragonite, XScale.
+ARCv2, AVR32, DSP563xx, DSP5680xx, EnSilica eSi-RISC, EJTAG (MIPS32, MIPS64),
+Intel Quark, LS102x-SAP, NDS32, RISC-V, ST STM8.
Flash drivers
-------------
-ADUC702x, AT91SAM, ATH79, AVR, CFI, DSP5680xx, EFM32, EM357, eSi-TSMC, FM3,
-FM4, Freedom E SPI, Kinetis, LPC8xx/LPC1xxx/LPC2xxx/LPC541xx, LPC2900,
-LPCSPIFI, Marvell QSPI, Milandr, NIIET, NuMicro, PIC32mx, PSoC4, PSoC5LP,
-SiM3x, Stellaris, STM32, STMSMI, STR7x, STR9x, nRF51; NAND controllers of
-AT91SAM9, LPC3180, LPC32xx, i.MX31, MXC, NUC910, Orion/Kirkwood, S3C24xx,
-S3C6400, XMC1xxx, XMC4xxx.
+ADUC702x, AT91SAM, AT91SAM9 (NAND), ATH79, ATmega128RFA1, Atmel SAM, AVR, CFI,
+DSP5680xx, EFM32, EM357, eSi-RISC, eSi-TSMC, EZR32HG, FM3, FM4, Freedom E SPI,
+i.MX31, Kinetis, LPC8xx/LPC1xxx/LPC2xxx/LPC541xx, LPC2900, LPC3180, LPC32xx,
+LPCSPIFI, Marvell QSPI, MAX32, Milandr, MXC, NIIET, nRF51, nRF52 , NuMicro,
+NUC910, Orion/Kirkwood, PIC32mx, PSoC4/5LP/6, Renesas RPC HF and SH QSPI,
+S3C24xx, S3C6400, SiM3x, SiFive Freedom E, Stellaris, ST BlueNRG, STM32,
+STM32 QUAD/OCTO-SPI for Flash/FRAM/EEPROM, STMSMI, STR7x, STR9x, SWM050,
+TI CC13xx, TI CC26xx, TI CC32xx, TI MSP432, Winner Micro w600, Xilinx XCF,
+XMC1xxx, XMC4xxx.
==================
-----------------------------------------------------------------------
Summary of changes:
README | 46 ++++++++++++++++++++++++++--------------------
1 file changed, 26 insertions(+), 20 deletions(-)
hooks/post-receive
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From: OpenOCD-Gerrit <ope...@us...> - 2021-01-24 19:33:04
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
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- Log -----------------------------------------------------------------
commit 090209275bc7796eb6b5e3a23158683bc88e354c
Author: Bohdan Tymkiv <boh...@gm...>
Date: Fri Jan 22 17:13:34 2021 +0200
jlink: fix device discovery when network is off
If user specifies a serial number for the jlink device, openocd
extends the search to network jlink devices too, without checking
if the host has a valid and functional network connection. If the
network is not functional, libjaylink returns error. This error
invalidates the discovery on USB, even if it was successful.
Factor-out parts of the jlink_init into separate jlink_open_device
function, use that function to firstly discover and match USB
devices and, if matching device was not found on the USB bus and
serial number was specified, repeat discovery and matching via TCP.
Fixes: https://sourceforge.net/p/openocd/tickets/294/
Change-Id: Iea0de1640d4e5b21ecc7e9c1dd6d36f214d647c2
Signed-off-by: Bohdan Tymkiv <boh...@gm...>
Reviewed-on: http://openocd.zylin.com/6025
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
Reviewed-by: Marc Schink <de...@za...>
diff --git a/src/jtag/drivers/jlink.c b/src/jtag/drivers/jlink.c
index b915707ec..15d252cfb 100644
--- a/src/jtag/drivers/jlink.c
+++ b/src/jtag/drivers/jlink.c
@@ -553,59 +553,17 @@ static bool jlink_usb_location_equal(struct jaylink_device *dev)
}
-static int jlink_init(void)
+static int jlink_open_device(uint32_t ifaces, bool *found_device)
{
- int ret;
- struct jaylink_device **devs;
- unsigned int i;
- bool found_device;
- uint32_t tmp;
- char *firmware_version;
- struct jaylink_hardware_version hwver;
- struct jaylink_hardware_status hwstatus;
- enum jaylink_usb_address address;
- size_t length;
- size_t num_devices;
- uint32_t host_interfaces;
-
- LOG_DEBUG("Using libjaylink %s (compiled with %s).",
- jaylink_version_package_get_string(), JAYLINK_VERSION_PACKAGE_STRING);
-
- if (!jaylink_library_has_cap(JAYLINK_CAP_HIF_USB) && use_usb_address) {
- LOG_ERROR("J-Link driver does not support USB devices.");
- return ERROR_JTAG_INIT_FAILED;
- }
-
- ret = jaylink_init(&jayctx);
-
+ int ret = jaylink_discovery_scan(jayctx, ifaces);
if (ret != JAYLINK_OK) {
- LOG_ERROR("jaylink_init() failed: %s.", jaylink_strerror(ret));
- return ERROR_JTAG_INIT_FAILED;
- }
-
- ret = jaylink_log_set_callback(jayctx, &jaylink_log_handler, NULL);
-
- if (ret != JAYLINK_OK) {
- LOG_ERROR("jaylink_log_set_callback() failed: %s.",
- jaylink_strerror(ret));
- jaylink_exit(jayctx);
- return ERROR_JTAG_INIT_FAILED;
- }
-
- host_interfaces = JAYLINK_HIF_USB;
-
- if (use_serial_number)
- host_interfaces |= JAYLINK_HIF_TCP;
-
- ret = jaylink_discovery_scan(jayctx, host_interfaces);
-
- if (ret != JAYLINK_OK) {
- LOG_ERROR("jaylink_discovery_scan() failed: %s.",
- jaylink_strerror(ret));
+ LOG_ERROR("jaylink_discovery_scan() failed: %s.", jaylink_strerror(ret));
jaylink_exit(jayctx);
return ERROR_JTAG_INIT_FAILED;
}
+ size_t num_devices;
+ struct jaylink_device **devs;
ret = jaylink_get_devices(jayctx, &devs, &num_devices);
if (ret != JAYLINK_OK) {
@@ -623,12 +581,13 @@ static int jlink_init(void)
return ERROR_JTAG_INIT_FAILED;
}
- found_device = false;
+ *found_device = false;
- for (i = 0; devs[i]; i++) {
+ for (size_t i = 0; devs[i]; i++) {
struct jaylink_device *dev = devs[i];
if (use_serial_number) {
+ uint32_t tmp;
ret = jaylink_device_get_serial_number(dev, &tmp);
if (ret == JAYLINK_ERR_NOT_AVAILABLE) {
@@ -644,6 +603,7 @@ static int jlink_init(void)
}
if (use_usb_address) {
+ enum jaylink_usb_address address;
ret = jaylink_device_get_usb_address(dev, &address);
if (ret == JAYLINK_ERR_NOT_SUPPORTED) {
@@ -664,7 +624,7 @@ static int jlink_init(void)
ret = jaylink_open(dev, &devh);
if (ret == JAYLINK_OK) {
- found_device = true;
+ *found_device = true;
break;
}
@@ -672,6 +632,52 @@ static int jlink_init(void)
}
jaylink_free_devices(devs, true);
+ return ERROR_OK;
+}
+
+
+static int jlink_init(void)
+{
+ int ret;
+ char *firmware_version;
+ struct jaylink_hardware_version hwver;
+ struct jaylink_hardware_status hwstatus;
+ size_t length;
+
+ LOG_DEBUG("Using libjaylink %s (compiled with %s).",
+ jaylink_version_package_get_string(), JAYLINK_VERSION_PACKAGE_STRING);
+
+ if (!jaylink_library_has_cap(JAYLINK_CAP_HIF_USB) && use_usb_address) {
+ LOG_ERROR("J-Link driver does not support USB devices.");
+ return ERROR_JTAG_INIT_FAILED;
+ }
+
+ ret = jaylink_init(&jayctx);
+
+ if (ret != JAYLINK_OK) {
+ LOG_ERROR("jaylink_init() failed: %s.", jaylink_strerror(ret));
+ return ERROR_JTAG_INIT_FAILED;
+ }
+
+ ret = jaylink_log_set_callback(jayctx, &jaylink_log_handler, NULL);
+
+ if (ret != JAYLINK_OK) {
+ LOG_ERROR("jaylink_log_set_callback() failed: %s.",
+ jaylink_strerror(ret));
+ jaylink_exit(jayctx);
+ return ERROR_JTAG_INIT_FAILED;
+ }
+
+ bool found_device;
+ ret = jlink_open_device(JAYLINK_HIF_USB, &found_device);
+ if (ret != ERROR_OK)
+ return ret;
+
+ if (!found_device && use_serial_number) {
+ ret = jlink_open_device(JAYLINK_HIF_TCP, &found_device);
+ if (ret != ERROR_OK)
+ return ret;
+ }
if (!found_device) {
LOG_ERROR("No J-Link device found.");
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/jlink.c | 106 +++++++++++++++++++++++++----------------------
1 file changed, 56 insertions(+), 50 deletions(-)
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From: OpenOCD-Gerrit <ope...@us...> - 2021-01-24 19:32:22
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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- Log -----------------------------------------------------------------
commit 047df630187bf5d54731aeaada33c639c57daf66
Author: Paul Fertser <fer...@gm...>
Date: Sat Jan 23 13:54:04 2021 +0300
README.macOS: explain how to install suitable Texinfo
Change-Id: Ic5906111f412eebd906a9be3fd0e133484def3eb
Signed-off-by: Paul Fertser <fer...@gm...>
Reviewed-on: http://openocd.zylin.com/6026
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/Makefile.am b/Makefile.am
index c1de02da0..a6e7ab232 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -48,7 +48,7 @@ EXTRA_DIST += \
HACKING \
NEWTAPS \
README.Windows \
- README.OSX \
+ README.macOS \
$(EXTRA_DIST_NEWS) \
Doxyfile.in \
tools/logger.pl \
diff --git a/README.OSX b/README.macOS
similarity index 81%
rename from README.OSX
rename to README.macOS
index 979c64ba6..c532e67c6 100644
--- a/README.OSX
+++ b/README.macOS
@@ -1,10 +1,10 @@
-Building OpenOCD for OSX
-------------------------
+Building OpenOCD for macOS
+--------------------------
There are a few prerequisites you will need first:
-- Xcode 5 (install from the AppStore)
-- Command Line Tools (install from Xcode 5 -> Preferences -> Downloads)
+- Xcode (install from the AppStore)
+- Command Line Tools (install from Xcode -> Preferences -> Downloads)
- Gentoo Prefix (http://www.gentoo.org/proj/en/gentoo-alt/prefix/bootstrap.xml)
or
- Homebrew (http://mxcl.github.io/homebrew/)
@@ -12,6 +12,11 @@ There are a few prerequisites you will need first:
- MacPorts (http://www.macports.org/install.php)
+If you're building manually you need Texinfo version 5.0 or later. The
+simplest way to get it is to use Homebrew (brew install texinfo) and
+then ``export PATH=/usr/local/opt/texinfo/bin:$PATH``.
+
+
With Gentoo Prefix you can build the release version or the latest
devel version (-9999) the usual way described in the Gentoo
documentation. Alternatively, install the prerequisites and build
-----------------------------------------------------------------------
Summary of changes:
Makefile.am | 2 +-
README.OSX => README.macOS | 13 +++++++++----
2 files changed, 10 insertions(+), 5 deletions(-)
rename README.OSX => README.macOS (81%)
hooks/post-receive
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Main OpenOCD repository
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From: OpenOCD-Gerrit <ope...@us...> - 2021-01-18 15:34:12
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via bd1adcffe7f3e51f490bf57889e7454816661196 (commit)
from 8b7569c2196ea69e72d5daf5c7294d98feb20268 (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit bd1adcffe7f3e51f490bf57889e7454816661196
Author: Antonio Borneo <bor...@gm...>
Date: Fri Jan 8 23:48:43 2021 +0100
configure: drop macro 'AC_HEADER_TIME'
The macro AC_HEADER_TIME has been obsoleted by autoconf 2.70.
Not all systems provide 'sys/time.h', plus some old system didn't
allowed to include both 'time.h' and 'sys/time.h' because 'time.h'
was included by 'sys/time.h' and was not properly protected to
allow multiple inclusion.
The macro AC_HEADER_TIME helps to detect such odd case.
Nowadays all the systems properly protect 'time.h', so its safe to
unconditionally include 'time.h', even if it is also included by
'sys/time.h'.
The case of systems without 'sys/time.h' is already covered by
configure.ac through the directive
AC_CHECK_HEADERS([sys/time.h])
Remove the obsoleted autoconf macro and simplify the code by
including 'time.h' unconditionally and check HAVE_SYS_TIME_H to
include 'sys/time.h'.
Change-Id: Iddb3f3f1d90c22668b97f8e756e1b4f733367a7d
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/6010
Tested-by: jenkins
Reviewed-by: Marc Schink <de...@za...>
diff --git a/configure.ac b/configure.ac
index 6d0c7d096..d7133183c 100644
--- a/configure.ac
+++ b/configure.ac
@@ -81,7 +81,6 @@ AC_CHECK_HEADERS([arpa/inet.h ifaddrs.h netinet/in.h netinet/tcp.h net/if.h], []
AC_HEADER_ASSERT
AC_HEADER_STDBOOL
-AC_HEADER_TIME
AC_C_BIGENDIAN
diff --git a/src/helper/system.h b/src/helper/system.h
index 97b3443be..1aaca3b33 100644
--- a/src/helper/system.h
+++ b/src/helper/system.h
@@ -28,19 +28,11 @@
#include <assert.h>
#include <ctype.h>
#include <errno.h>
+#include <time.h>
-/* +++ AC_HEADER_TIME +++ */
-#ifdef TIME_WITH_SYS_TIME
-# include <sys/time.h>
-# include <time.h>
-#else
-# ifdef HAVE_SYS_TIME_H
-# include <sys/time.h>
-# else
-# include <time.h>
-# endif
+#ifdef HAVE_SYS_TIME_H
+#include <sys/time.h>
#endif
-/* --- AC_HEADER_TIME --- */
/* +++ platform specific headers +++ */
#ifdef _WIN32
diff --git a/src/helper/time_support.h b/src/helper/time_support.h
index 7abbdb24d..a9f2dffad 100644
--- a/src/helper/time_support.h
+++ b/src/helper/time_support.h
@@ -25,15 +25,10 @@
#ifndef OPENOCD_HELPER_TIME_SUPPORT_H
#define OPENOCD_HELPER_TIME_SUPPORT_H
-#ifdef TIME_WITH_SYS_TIME
-# include <sys/time.h>
-# include <time.h>
-#else
-# ifdef HAVE_SYS_TIME_H
-# include <sys/time.h>
-# else
-# include <time.h>
-# endif
+#include <time.h>
+
+#ifdef HAVE_SYS_TIME_H
+#include <sys/time.h>
#endif
int timeval_subtract(struct timeval *result, struct timeval *x, struct timeval *y);
-----------------------------------------------------------------------
Summary of changes:
configure.ac | 1 -
src/helper/system.h | 14 +++-----------
src/helper/time_support.h | 13 ++++---------
3 files changed, 7 insertions(+), 21 deletions(-)
hooks/post-receive
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From: OpenOCD-Gerrit <ope...@us...> - 2021-01-18 15:33:36
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 8b7569c2196ea69e72d5daf5c7294d98feb20268 (commit)
via 0b248e04c1e58b374e82bad0361e42a5e8a96b77 (commit)
from 2dc9c1df81b6458875233fc3710ab9d3e871743d (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit 8b7569c2196ea69e72d5daf5c7294d98feb20268
Author: Antonio Borneo <bor...@gm...>
Date: Sat Jan 9 19:51:42 2021 +0100
configure.ac: drop macro 'AC_PROG_CC_C99' from autoconf 2.70
The macro AC_PROG_CC_C99 has been obsoleted by autoconf 2.70 and
triggers a set of warnings from both 'aclocal' and 'autoconf'.
The test of AC_PROG_CC_C99 is now included in AC_PROG_CC.
For autoconf 2.69 and earlier the macro is still required, so
cannot be simply dropped.
Use a conditional test to avoid the warning on autoconf 2.70 but
still use AC_PROG_CC_C99 on older autoconf.
Change-Id: I5e8437f5a826fb63be6d07bcb5bb824f94683020
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/6009
Tested-by: jenkins
Reviewed-by: Marc Schink <de...@za...>
diff --git a/configure.ac b/configure.ac
index 012486666..6d0c7d096 100644
--- a/configure.ac
+++ b/configure.ac
@@ -25,7 +25,8 @@ AH_BOTTOM([
AC_LANG([C])
AC_PROG_CC
-AC_PROG_CC_C99
+# autoconf 2.70 obsoletes AC_PROG_CC_C99 and includes it in AC_PROG_CC
+m4_version_prereq([2.70],[],[AC_PROG_CC_C99])
AM_PROG_CC_C_O
AC_PROG_RANLIB
PKG_PROG_PKG_CONFIG([0.23])
commit 0b248e04c1e58b374e82bad0361e42a5e8a96b77
Author: Antonio Borneo <bor...@gm...>
Date: Thu Mar 5 17:00:50 2020 +0100
driver/ftdi: skip trst in swd mode
When using the adapter olimex arm-jtag-swd (to convert to SWD a
JTAG-only FTDI adapter), the pin trst on JTAG side is re-used to
control the direction of pin SWDIO on SWD side.
There is a single reset API at adapter driver to assert/deassert
either srst and/or trst. A request to assert/deassert srst can
cause also trst to change value, hanging the SWD communication.
In SWD mode, ignore the value passed to trst.
Change-Id: I5fe1eed851177d405d77ae6079da9642dc1a08f1
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/6006
Tested-by: jenkins
diff --git a/src/jtag/drivers/ftdi.c b/src/jtag/drivers/ftdi.c
index 9d1c85cbd..9e47d3cad 100644
--- a/src/jtag/drivers/ftdi.c
+++ b/src/jtag/drivers/ftdi.c
@@ -524,17 +524,19 @@ static int ftdi_reset(int trst, int srst)
LOG_DEBUG_IO("reset trst: %i srst %i", trst, srst);
- if (trst == 1) {
- if (sig_ntrst)
- ftdi_set_signal(sig_ntrst, '0');
- else
- LOG_ERROR("Can't assert TRST: nTRST signal is not defined");
- } else if (sig_ntrst && jtag_get_reset_config() & RESET_HAS_TRST &&
- trst == 0) {
- if (jtag_get_reset_config() & RESET_TRST_OPEN_DRAIN)
- ftdi_set_signal(sig_ntrst, 'z');
- else
- ftdi_set_signal(sig_ntrst, '1');
+ if (!swd_mode) {
+ if (trst == 1) {
+ if (sig_ntrst)
+ ftdi_set_signal(sig_ntrst, '0');
+ else
+ LOG_ERROR("Can't assert TRST: nTRST signal is not defined");
+ } else if (sig_ntrst && jtag_get_reset_config() & RESET_HAS_TRST &&
+ trst == 0) {
+ if (jtag_get_reset_config() & RESET_TRST_OPEN_DRAIN)
+ ftdi_set_signal(sig_ntrst, 'z');
+ else
+ ftdi_set_signal(sig_ntrst, '1');
+ }
}
if (srst == 1) {
-----------------------------------------------------------------------
Summary of changes:
configure.ac | 3 ++-
src/jtag/drivers/ftdi.c | 24 +++++++++++++-----------
2 files changed, 15 insertions(+), 12 deletions(-)
hooks/post-receive
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Main OpenOCD repository
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From: OpenOCD-Gerrit <ope...@us...> - 2021-01-18 15:32:41
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 2dc9c1df81b6458875233fc3710ab9d3e871743d (commit)
via 404993b29f1304fb53202fb88147298465bfb525 (commit)
via 310c9800c72f37dd50e855513badc908fcfbafcf (commit)
from aaa6110d9b027acd1d027ef27c723ec9cf2381a0 (commit)
Those revisions listed above that are new to this repository have
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- Log -----------------------------------------------------------------
commit 2dc9c1df81b6458875233fc3710ab9d3e871743d
Author: Tarek BOCHKATI <tar...@st...>
Date: Tue Jan 12 11:57:18 2021 +0100
cortex_m: [FIX] ARMv8-M does not support VECTRESET
ref: Arm®v8-M Architecture Reference Manual (DDI0553B.m)
D1.2.3: AIRCR, Application Interrupt and Reset Control Register
Bit [0] is RES0
Change-Id: I6ef451b2c114487e2732852a60e86c292ffa6a50
Signed-off-by: Tarek BOCHKATI <tar...@st...>
Reviewed-on: http://openocd.zylin.com/6014
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tar...@gm...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index ac308b43b..ce2c426ce 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -2011,8 +2011,8 @@ int cortex_m_examine(struct target *target)
}
LOG_DEBUG("cpuid: 0x%8.8" PRIx32 "", cpuid);
- /* VECTRESET is not supported on Cortex-M0, M0+ and M1 */
- cortex_m->vectreset_supported = i > 1;
+ /* VECTRESET is supported only on ARMv7-M cores */
+ cortex_m->vectreset_supported = !armv7m->arm.is_armv8m && !armv7m->arm.is_armv6m;
if (i == 4) {
target_read_u32(target, MVFR0, &mvfr0);
commit 404993b29f1304fb53202fb88147298465bfb525
Author: Tarek BOCHKATI <tar...@st...>
Date: Mon Jan 11 19:23:58 2021 +0100
target/riscv: fix build error with -Werror=maybe-uninitialized
using gcc 9.3 on ubuntu focal fossa with -Werror=maybe-uninitialized
we get this error:
/src/target/riscv/riscv.c: In function âriscv_address_translateâ:
/src/target/riscv/riscv.c:1536:13: error: âpteâ may be used uninitialized
Change-Id: I51e180b43f9b6996e4e4058db49c179b9f81bcdc
Signed-off-by: Tarek BOCHKATI <tar...@st...>
Reviewed-on: http://openocd.zylin.com/6013
Tested-by: jenkins
Reviewed-by: Tim Newsome <ti...@si...>
Reviewed-by: Tarek BOCHKATI <tar...@gm...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c
index 0d1cee1bf..c26e6358f 100644
--- a/src/target/riscv/riscv.c
+++ b/src/target/riscv/riscv.c
@@ -1446,7 +1446,7 @@ static int riscv_address_translate(struct target *target,
uint64_t ppn_value;
target_addr_t table_address;
virt2phys_info_t *info;
- uint64_t pte;
+ uint64_t pte = 0;
int i;
if (riscv_rtos_enabled(target))
commit 310c9800c72f37dd50e855513badc908fcfbafcf
Author: Tarek BOCHKATI <tar...@st...>
Date: Mon Jan 11 19:21:06 2021 +0100
flash/stmqspi: fix build error with -Werror=maybe-uninitialized
using gcc 9.3 on ubuntu focal fossa with -Werror=maybe-uninitialized
we get this error:
/src/flash/nor/stmqspi.c: In function âread_flash_idâ:
/src/flash/nor/stmqspi.c:1948:6: error: âretvalâ may be used uninitialized
Change-Id: Ifd8ae60df847fc61e22ca100c008e3914c9af79b
Signed-off-by: Tarek BOCHKATI <tar...@st...>
Reviewed-on: http://openocd.zylin.com/6012
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tar...@gm...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/flash/nor/stmqspi.c b/src/flash/nor/stmqspi.c
index f54e4975d..a013336a0 100644
--- a/src/flash/nor/stmqspi.c
+++ b/src/flash/nor/stmqspi.c
@@ -1945,7 +1945,7 @@ static int read_flash_id(struct flash_bank *bank, uint32_t *id1, uint32_t *id2)
uint32_t io_base = stmqspi_info->io_base;
uint8_t byte;
unsigned int type, count, len1, len2;
- int retval;
+ int retval = ERROR_OK;
/* invalidate both ids */
*id1 = 0;
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/stmqspi.c | 2 +-
src/target/cortex_m.c | 4 ++--
src/target/riscv/riscv.c | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
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From: OpenOCD-Gerrit <ope...@us...> - 2021-01-13 11:34:58
|
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- Log -----------------------------------------------------------------
commit aaa6110d9b027acd1d027ef27c723ec9cf2381a0
Author: Antonio Borneo <bor...@gm...>
Date: Sat Jan 2 20:42:12 2021 +0100
doc/manual/primer/autotools.txt: fix doxygen warning
Commit ab90b8777855 ("configure: remove AM_MAINTAINER_MODE,
effectively always enabling all the rules") removes the configure
flag '--enable-maintainer-mode' and its documentation, but have
left a reference to the removed subsection 'primermaintainermode'
and this triggers a warning in doxygen:
doc/manual/primer/autotools.txt:21: warning: unable to
resolve reference to 'primermaintainermode' for \ref
command
Remove the obsoleted paragraph.
Change-Id: I56e69ef033d546d159745bed1b47c6105827e7ae
Signed-off-by: Antonio Borneo <bor...@gm...>
Fixes: ab90b8777855 ("configure: remove AM_MAINTAINER_MODE, effectively always enabling all the rules")
Reviewed-on: http://openocd.zylin.com/6003
Tested-by: jenkins
diff --git a/doc/manual/primer/autotools.txt b/doc/manual/primer/autotools.txt
index 3471eacd7..f038f0b2f 100644
--- a/doc/manual/primer/autotools.txt
+++ b/doc/manual/primer/autotools.txt
@@ -15,9 +15,6 @@ autotools in the correct sequence.
When run after a fresh checkout, this script generates the build files
required to compile the project, producing the project configure script.
-After running @c configure, the @ref primermaintainermode settings will
-handle most situations that require running these tools again. In some
-cases, a fresh bootstrap may be still required.
@subsection primerbootstrapcures Problems Solved By Bootstrap
commit 7e64e5a895ecd9bf25c5d2b39ff3119dafa30489
Author: Antonio Borneo <bor...@gm...>
Date: Sat Jan 2 20:35:09 2021 +0100
openocd: fix doxygen parameters of functions
Add to doxygen comment the missing parameters.
Remove from doxygen comment any non-existing parameter.
Fix the parameter names in doxygen comment to match the one in the
function prototype.
Where the parameter name in the doxygen description seems better
than the one in the code, change the code.
Escape the character '<' to prevent doxygen to interpret it as an
xml tag.
Change-Id: I22da723339ac7d7a7a64ac4c1cc4336e2416c2cc
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/6002
Tested-by: jenkins
diff --git a/src/flash/nand/at91sam9.c b/src/flash/nand/at91sam9.c
index 47c050563..234dd70c1 100644
--- a/src/flash/nand/at91sam9.c
+++ b/src/flash/nand/at91sam9.c
@@ -105,7 +105,7 @@ static int at91sam9_init(struct nand_device *nand)
/**
* Enable NAND device attached to a controller.
*
- * @param info NAND controller information for controlling NAND device.
+ * @param nand NAND controller information for controlling NAND device.
* @return Success or failure of the enabling.
*/
static int at91sam9_enable(struct nand_device *nand)
@@ -119,7 +119,7 @@ static int at91sam9_enable(struct nand_device *nand)
/**
* Disable NAND device attached to a controller.
*
- * @param info NAND controller information for controlling NAND device.
+ * @param nand NAND controller information for controlling NAND device.
* @return Success or failure of the disabling.
*/
static int at91sam9_disable(struct nand_device *nand)
diff --git a/src/flash/nor/at91sam4.c b/src/flash/nor/at91sam4.c
index 86abf7005..d4326e43a 100644
--- a/src/flash/nor/at91sam4.c
+++ b/src/flash/nor/at91sam4.c
@@ -1709,6 +1709,9 @@ static int FLASHD_EraseEntireBank(struct sam4_bank_private *pPrivate)
/**
* Erases the entire flash.
* @param pPrivate - the info about the bank.
+ * @param firstPage
+ * @param numPages
+ * @param status
*/
static int FLASHD_ErasePages(struct sam4_bank_private *pPrivate,
int firstPage,
diff --git a/src/flash/nor/core.h b/src/flash/nor/core.h
index 107a1c56e..97a368e8e 100644
--- a/src/flash/nor/core.h
+++ b/src/flash/nor/core.h
@@ -276,7 +276,8 @@ struct flash_bank *get_flash_bank_by_num_noprobe(unsigned int num);
* @param target The target, presumed to contain one or more banks.
* @param addr An address that is within the range of the bank.
* @param check return ERROR_OK and result_bank NULL if the bank does not exist
- * @returns The struct flash_bank located at @a addr, or NULL.
+ * @param result_bank The struct flash_bank located at @a addr, or NULL.
+ * @returns ERROR_OK on success, or an error indicating the problem.
*/
int get_flash_bank_by_addr(struct target *target, target_addr_t addr, bool check,
struct flash_bank **result_bank);
diff --git a/src/flash/nor/lpc2900.c b/src/flash/nor/lpc2900.c
index 6596cde94..4d3d7f758 100644
--- a/src/flash/nor/lpc2900.c
+++ b/src/flash/nor/lpc2900.c
@@ -453,8 +453,8 @@ static int lpc2900_write_index_page(struct flash_bank *bank,
/**
* Calculate FPTR.TR register value for desired program/erase time.
*
- * @param clock System clock in Hz
- * @param time Program/erase time in µs
+ * @param clock_var System clock in Hz
+ * @param time_var Program/erase time in µs
*/
static uint32_t lpc2900_calc_tr(uint32_t clock_var, uint32_t time_var)
{
diff --git a/src/flash/nor/psoc6.c b/src/flash/nor/psoc6.c
index 931404e3e..9c834fde6 100644
--- a/src/flash/nor/psoc6.c
+++ b/src/flash/nor/psoc6.c
@@ -873,7 +873,6 @@ exit:
/** ***********************************************************************************************
* @brief Performs Mass Erase operation
- * @param bank flash bank index to erase
* @return ERROR_OK in case of success, ERROR_XXX code otherwise
*************************************************************************************************/
COMMAND_HANDLER(psoc6_handle_mass_erase_command)
diff --git a/src/jtag/drivers/OpenULINK/src/jtag.c b/src/jtag/drivers/OpenULINK/src/jtag.c
index ecf98a08c..c76f034e8 100644
--- a/src/jtag/drivers/OpenULINK/src/jtag.c
+++ b/src/jtag/drivers/OpenULINK/src/jtag.c
@@ -48,6 +48,7 @@ uint8_t delay_tms;
* Maximum achievable TCK frequency is 182 kHz for ULINK clocked at 24 MHz.
*
* @param out_offset offset in OUT2BUF where payload data starts
+ * @param in_offset
*/
void jtag_scan_in(uint8_t out_offset, uint8_t in_offset)
{
@@ -125,6 +126,7 @@ void jtag_scan_in(uint8_t out_offset, uint8_t in_offset)
* Maximum achievable TCK frequency is 113 kHz for ULINK clocked at 24 MHz.
*
* @param out_offset offset in OUT2BUF where payload data starts
+ * @param in_offset
*/
void jtag_slow_scan_in(uint8_t out_offset, uint8_t in_offset)
{
@@ -373,6 +375,7 @@ void jtag_slow_scan_out(uint8_t out_offset)
* Maximum achievable TCK frequency is 100 kHz for ULINK clocked at 24 MHz.
*
* @param out_offset offset in OUT2BUF where payload data starts
+ * @param in_offset
*/
void jtag_scan_io(uint8_t out_offset, uint8_t in_offset)
{
@@ -465,6 +468,7 @@ void jtag_scan_io(uint8_t out_offset, uint8_t in_offset)
* Maximum achievable TCK frequency is 78 kHz for ULINK clocked at 24 MHz.
*
* @param out_offset offset in OUT2BUF where payload data starts
+ * @param in_offset
*/
void jtag_slow_scan_io(uint8_t out_offset, uint8_t in_offset)
{
diff --git a/src/jtag/drivers/ftdi.c b/src/jtag/drivers/ftdi.c
index 4fa83ae56..9d1c85cbd 100644
--- a/src/jtag/drivers/ftdi.c
+++ b/src/jtag/drivers/ftdi.c
@@ -1062,7 +1062,6 @@ static void ftdi_swd_swdio_en(bool enable)
/**
* Flush the MPSSE queue and process the SWD transaction queue
- * @param dap
* @return
*/
static int ftdi_swd_run_queue(void)
diff --git a/src/jtag/drivers/jtag_vpi.c b/src/jtag/drivers/jtag_vpi.c
index a6609d21e..c5ffe83ba 100644
--- a/src/jtag/drivers/jtag_vpi.c
+++ b/src/jtag/drivers/jtag_vpi.c
@@ -227,8 +227,8 @@ static int jtag_vpi_reset(int trst, int srst)
* @param nb_bits number of TMS bits (between 1 and 8)
*
* Write a series of TMS transitions, where each transition consists in :
- * - writing out TCK=0, TMS=<new_state>, TDI=<???>
- * - writing out TCK=1, TMS=<new_state>, TDI=<???> which triggers the transition
+ * - writing out TCK=0, TMS=\<new_state>, TDI=\<???>
+ * - writing out TCK=1, TMS=\<new_state>, TDI=\<???> which triggers the transition
* The function ensures that at the end of the sequence, the clock (TCK) is put
* low.
*/
@@ -253,8 +253,8 @@ static int jtag_vpi_tms_seq(const uint8_t *bits, int nb_bits)
* @param cmd path transition
*
* Write a series of TMS transitions, where each transition consists in :
- * - writing out TCK=0, TMS=<new_state>, TDI=<???>
- * - writing out TCK=1, TMS=<new_state>, TDI=<???> which triggers the transition
+ * - writing out TCK=0, TMS=\<new_state>, TDI=\<???>
+ * - writing out TCK=1, TMS=\<new_state>, TDI=\<???> which triggers the transition
* The function ensures that at the end of the sequence, the clock (TCK) is put
* low.
*/
@@ -344,6 +344,7 @@ static int jtag_vpi_queue_tdi_xfer(uint8_t *bits, int nb_bits, int tap_shift)
* jtag_vpi_queue_tdi - short description
* @param bits bits to be queued on TDI (or NULL if 0 are to be queued)
* @param nb_bits number of bits
+ * @param tap_shift
*/
static int jtag_vpi_queue_tdi(uint8_t *bits, int nb_bits, int tap_shift)
{
diff --git a/src/jtag/drivers/ulink.c b/src/jtag/drivers/ulink.c
index f473ce39a..ccc023fb8 100644
--- a/src/jtag/drivers/ulink.c
+++ b/src/jtag/drivers/ulink.c
@@ -696,6 +696,7 @@ static int ulink_append_queue(struct ulink *device, struct ulink_cmd *ulink_cmd)
* Sends all queued OpenULINK commands to the ULINK for execution.
*
* @param device pointer to struct ulink identifying ULINK driver instance.
+ * @param timeout
* @return on success: ERROR_OK
* @return on failure: ERROR_FAIL
*/
@@ -1682,6 +1683,7 @@ static int ulink_queue_runtest(struct ulink *device, struct jtag_command *cmd)
/**
* Execute a JTAG_RESET command
*
+ * @param device
* @param cmd pointer to the command that shall be executed.
* @return on success: ERROR_OK
* @return on failure: ERROR_FAIL
diff --git a/src/jtag/drivers/usb_blaster/usb_blaster.c b/src/jtag/drivers/usb_blaster/usb_blaster.c
index 5559bcedb..5002a5f53 100644
--- a/src/jtag/drivers/usb_blaster/usb_blaster.c
+++ b/src/jtag/drivers/usb_blaster/usb_blaster.c
@@ -364,8 +364,8 @@ static void ublast_idle_clock(void)
* @param type scan type (ie. does a readback of TDO is required)
*
* Output a TDI bit and assert clock to push it into the JTAG device :
- * - writing out TCK=0, TMS=<old_state>=0, TDI=<tdi>
- * - writing out TCK=1, TMS=<new_state>, TDI=<tdi> which triggers the JTAG
+ * - writing out TCK=0, TMS=\<old_state>=0, TDI=\<tdi>
+ * - writing out TCK=1, TMS=\<new_state>, TDI=\<tdi> which triggers the JTAG
* device acquiring the data.
*
* If a TDO is to be read back, the required read is requested (bitbang mode),
@@ -448,8 +448,8 @@ static void ublast_queue_bytes(uint8_t *bytes, int nb_bytes)
* @param skip number of TMS bits to skip at the beginning of the series
*
* Write a series of TMS transitions, where each transition consists in :
- * - writing out TCK=0, TMS=<new_state>, TDI=<???>
- * - writing out TCK=1, TMS=<new_state>, TDI=<???> which triggers the transition
+ * - writing out TCK=0, TMS=\<new_state>, TDI=\<???>
+ * - writing out TCK=1, TMS=\<new_state>, TDI=\<???> which triggers the transition
* The function ensures that at the end of the sequence, the clock (TCK) is put
* low.
*/
@@ -478,8 +478,8 @@ static void ublast_tms(struct tms_command *cmd)
* @param cmd path transition
*
* Write a series of TMS transitions, where each transition consists in :
- * - writing out TCK=0, TMS=<new_state>, TDI=<???>
- * - writing out TCK=1, TMS=<new_state>, TDI=<???> which triggers the transition
+ * - writing out TCK=0, TMS=\<new_state>, TDI=\<???>
+ * - writing out TCK=1, TMS=\<new_state>, TDI=\<???> which triggers the transition
* The function ensures that at the end of the sequence, the clock (TCK) is put
* low.
*/
@@ -525,7 +525,7 @@ static void ublast_state_move(tap_state_t state, int skip)
/**
* ublast_read_byteshifted_tdos - read TDO of byteshift writes
* @param buf the buffer to store the bits
- * @param nb_bits the number of bits
+ * @param nb_bytes the number of bytes
*
* Reads back from USB Blaster TDO bits, triggered by a 'byteshift write', ie. eight
* bits per received byte from USB interface, and store them in buffer.
diff --git a/src/rtt/rtt.h b/src/rtt/rtt.h
index 597c83829..bc21bd012 100644
--- a/src/rtt/rtt.h
+++ b/src/rtt/rtt.h
@@ -237,7 +237,7 @@ const struct rtt_control *rtt_get_control(void);
* Read channel information.
*
* @param[in] channel_index Channel index.
- * @param[in] channel_type Channel type.
+ * @param[in] type Channel type.
* @param[out] info Channel information.
*
* @returns ERROR_OK on success, an error code on failure.
diff --git a/src/target/arc.c b/src/target/arc.c
index ffe974532..8e568455e 100644
--- a/src/target/arc.c
+++ b/src/target/arc.c
@@ -924,6 +924,7 @@ exit:
* Finds an actionpoint that triggered last actionpoint event, as specified by
* DEBUG.ASR.
*
+ * @param target
* @param actionpoint Pointer to be set to last active actionpoint. Pointer
* will be set to NULL if DEBUG.AH is 0.
*/
diff --git a/src/target/arc_jtag.c b/src/target/arc_jtag.c
index fd77b37f2..ca1a09649 100644
--- a/src/target/arc_jtag.c
+++ b/src/target/arc_jtag.c
@@ -237,7 +237,7 @@ static void arc_jtag_enque_register_rw(struct arc_jtag *jtag_info, uint32_t *add
* @param type Type of registers to write: core or aux.
* @param addr Array of registers numbers.
* @param count Amount of registers in arrays.
- * @param values Array of register values.
+ * @param buffer Array of register values.
*/
static int arc_jtag_write_registers(struct arc_jtag *jtag_info, uint32_t type,
uint32_t *addr, uint32_t count, const uint32_t *buffer)
@@ -272,7 +272,7 @@ static int arc_jtag_write_registers(struct arc_jtag *jtag_info, uint32_t type,
* @param type Type of registers to read: core or aux.
* @param addr Array of registers numbers.
* @param count Amount of registers in arrays.
- * @param values Array of register values.
+ * @param buffer Array of register values.
*/
static int arc_jtag_read_registers(struct arc_jtag *jtag_info, uint32_t type,
uint32_t *addr, uint32_t count, uint32_t *buffer)
@@ -337,7 +337,7 @@ int arc_jtag_write_core_reg_one(struct arc_jtag *jtag_info, uint32_t addr,
* @param jtag_info
* @param addr Array of registers numbers.
* @param count Amount of registers in arrays.
- * @param values Array of register values.
+ * @param buffer Array of register values.
*/
int arc_jtag_write_core_reg(struct arc_jtag *jtag_info, uint32_t *addr,
uint32_t count, const uint32_t *buffer)
@@ -361,7 +361,7 @@ int arc_jtag_read_core_reg_one(struct arc_jtag *jtag_info, uint32_t addr,
* @param jtag_info
* @param addr Array of core register numbers.
* @param count Amount of registers in arrays.
- * @param values Array of register values.
+ * @param buffer Array of register values.
*/
int arc_jtag_read_core_reg(struct arc_jtag *jtag_info, uint32_t *addr,
uint32_t count, uint32_t *buffer)
@@ -385,7 +385,7 @@ int arc_jtag_write_aux_reg_one(struct arc_jtag *jtag_info, uint32_t addr,
* @param jtag_info
* @param addr Array of registers numbers.
* @param count Amount of registers in arrays.
- * @param values Array of register values.
+ * @param buffer Array of register values.
*/
int arc_jtag_write_aux_reg(struct arc_jtag *jtag_info, uint32_t *addr,
uint32_t count, const uint32_t *buffer)
@@ -409,7 +409,7 @@ int arc_jtag_read_aux_reg_one(struct arc_jtag *jtag_info, uint32_t addr,
* @param jtag_info
* @param addr Array of AUX register numbers.
* @param count Amount of registers in arrays.
- * @param values Array of register values.
+ * @param buffer Array of register values.
*/
int arc_jtag_read_aux_reg(struct arc_jtag *jtag_info, uint32_t *addr,
uint32_t count, uint32_t *buffer)
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index 59bb186c6..8f5ad59c3 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -450,7 +450,7 @@ static int mem_ap_write(struct adiv5_ap *ap, const uint8_t *buffer, uint32_t siz
* @param buffer The data buffer to receive the data. No particular alignment is assumed.
* @param size Which access size to use, in bytes. 1, 2 or 4.
* @param count The number of reads to do (in size units, not bytes).
- * @param address Address to be read; it must be readable by the currently selected MEM-AP.
+ * @param adr Address to be read; it must be readable by the currently selected MEM-AP.
* @param addrinc Whether the target address should be increased after each read or not. This
* should normally be true, except when reading from e.g. a FIFO.
* @return ERROR_OK on success, otherwise an error code.
diff --git a/src/target/dsp5680xx.c b/src/target/dsp5680xx.c
index ec07c2519..62844ea3b 100644
--- a/src/target/dsp5680xx.c
+++ b/src/target/dsp5680xx.c
@@ -1410,27 +1410,21 @@ static int dsp5680xx_write_32(struct target *t, uint32_t a, uint32_t c,
* P: (program) memory or X: (dat) memory.
*
* @param target
- * @param address
+ * @param a address
* @param size Bytes (1), Half words (2), Words (4).
* @param count In bytes.
- * @param buffer
+ * @param b buffer
*
* @return
*/
-static int dsp5680xx_write(struct target *t, target_addr_t a, uint32_t s, uint32_t c,
+static int dsp5680xx_write(struct target *target, target_addr_t a, uint32_t size, uint32_t count,
const uint8_t *b)
{
/* TODO Cannot write 32bit to odd address, will write 0x12345678 as 0x5678 0x0012 */
- struct target *target = t;
-
uint32_t address = a;
- uint32_t count = c;
-
uint8_t const *buffer = b;
- uint32_t size = s;
-
check_halt_and_debug(target);
int retval = 0;
@@ -1479,12 +1473,12 @@ static int dsp5680xx_write_buffer(struct target *t, target_addr_t a, uint32_t si
*
* @return
*/
-static int dsp5680xx_read_buffer(struct target *t, target_addr_t a, uint32_t size,
- uint8_t *buf)
+static int dsp5680xx_read_buffer(struct target *target, target_addr_t address, uint32_t size,
+ uint8_t *buffer)
{
- check_halt_and_debug(t);
+ check_halt_and_debug(target);
/* The "/2" solves the byte/word addressing issue.*/
- return dsp5680xx_read(t, a, 2, size / 2, buf);
+ return dsp5680xx_read(target, address, 2, size / 2, buffer);
}
/**
@@ -1499,19 +1493,19 @@ static int dsp5680xx_read_buffer(struct target *t, target_addr_t a, uint32_t siz
*
* @return
*/
-static int dsp5680xx_checksum_memory(struct target *t, target_addr_t a, uint32_t s,
+static int dsp5680xx_checksum_memory(struct target *target, target_addr_t address, uint32_t size,
uint32_t *checksum)
{
return ERROR_FAIL;
}
/**
- * Calculates a signature over @a word_count words in the data from @a buff16.
+ * Calculates a signature over @a word_count words in the data from @a buff8.
* The algorithm used is the same the FM uses, so the @a return may be used to compare
* with the one generated by the FM module, and check if flashing was successful.
* This algorithm is based on the perl script available from the Freescale website at FAQ 25630.
*
- * @param buff16
+ * @param buff8
* @param word_count
*
* @return
@@ -1609,7 +1603,7 @@ int dsp5680xx_f_protect_check(struct target *target, uint16_t *protected)
* Some commands use the parameters @a address and @a data, others ignore them.
*
* @param target
- * @param command Command to execute.
+ * @param c Command to execute.
* @param address Command parameter.
* @param data Command parameter.
* @param hfm_ustat FM status register.
@@ -1617,21 +1611,10 @@ int dsp5680xx_f_protect_check(struct target *target, uint16_t *protected)
*
* @return
*/
-static int dsp5680xx_f_ex(struct target *t, uint16_t c, uint32_t a, uint32_t d,
- uint16_t *h, int p)
+static int dsp5680xx_f_ex(struct target *target, uint16_t c, uint32_t address, uint32_t data,
+ uint16_t *hfm_ustat, int pmem)
{
- struct target *target = t;
-
uint32_t command = c;
-
- uint32_t address = a;
-
- uint32_t data = d;
-
- uint16_t *hfm_ustat = h;
-
- int pmem = p;
-
int retval;
retval = core_load_TX_RX_high_addr_to_r0(target);
@@ -1799,13 +1782,9 @@ static int set_fm_ck_div(struct target *target)
*
* @return
*/
-static int dsp5680xx_f_signature(struct target *t, uint32_t a, uint32_t words,
+static int dsp5680xx_f_signature(struct target *target, uint32_t address, uint32_t words,
uint16_t *signature)
{
- struct target *target = t;
-
- uint32_t address = a;
-
int retval;
uint16_t hfm_ustat;
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c
index 8558ba891..32a7f0248 100644
--- a/src/target/riscv/riscv-013.c
+++ b/src/target/riscv/riscv-013.c
@@ -547,13 +547,15 @@ static dmi_status_t dmi_scan(struct target *target, uint32_t *address_in,
}
/**
+ * @param target
* @param data_in The data we received from the target.
- * @param dmi_op The operation to perform (read/write/nop).
* @param dmi_busy_encountered
* If non-NULL, will be updated to reflect whether DMI busy was
* encountered while executing this operation or not.
+ * @param dmi_op The operation to perform (read/write/nop).
* @param address The address argument to that operation.
* @param data_out The data to send to the target.
+ * @param timeout_sec
* @param exec When true, this scan will execute something, so extra RTI
* cycles may be added.
* @param ensure_success
diff --git a/src/target/semihosting_common.c b/src/target/semihosting_common.c
index 965055609..61a69d1bd 100644
--- a/src/target/semihosting_common.c
+++ b/src/target/semihosting_common.c
@@ -89,6 +89,8 @@ extern int gdb_actual_connections;
* Initialize common semihosting support.
*
* @param target Pointer to the target to initialize.
+ * @param setup
+ * @param post_result
* @return An error status if there is a problem during initialization.
*/
int semihosting_common_init(struct target *target, void *setup,
diff --git a/src/target/target.c b/src/target/target.c
index c752844b0..fa98c884b 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -803,6 +803,13 @@ static int target_soft_reset_halt(struct target *target)
* algorithm.
*
* @param target used to run the algorithm
+ * @param num_mem_params
+ * @param mem_params
+ * @param num_reg_params
+ * @param reg_param
+ * @param entry_point
+ * @param exit_point
+ * @param timeout_ms
* @param arch_info target-specific description of the algorithm.
*/
int target_run_algorithm(struct target *target,
@@ -838,6 +845,12 @@ done:
* Executes a target-specific native code algorithm and leaves it running.
*
* @param target used to run the algorithm
+ * @param num_mem_params
+ * @param mem_params
+ * @param num_reg_params
+ * @param reg_params
+ * @param entry_point
+ * @param exit_point
* @param arch_info target-specific description of the algorithm.
*/
int target_start_algorithm(struct target *target,
@@ -876,6 +889,12 @@ done:
* Waits for an algorithm started with target_start_algorithm() to complete.
*
* @param target used to run the algorithm
+ * @param num_mem_params
+ * @param mem_params
+ * @param num_reg_params
+ * @param reg_params
+ * @param exit_point
+ * @param timeout_ms
* @param arch_info target-specific description of the algorithm.
*/
int target_wait_algorithm(struct target *target,
@@ -947,6 +966,7 @@ done:
* @param entry_point address on the target to execute to start the algorithm
* @param exit_point address at which to set a breakpoint to catch the
* end of the algorithm; can be 0 if target triggers a breakpoint itself
+ * @param arch_info
*/
int target_run_flash_async_algorithm(struct target *target,
-----------------------------------------------------------------------
Summary of changes:
doc/manual/primer/autotools.txt | 3 --
src/flash/nand/at91sam9.c | 4 +--
src/flash/nor/at91sam4.c | 3 ++
src/flash/nor/core.h | 3 +-
src/flash/nor/lpc2900.c | 4 +--
src/flash/nor/psoc6.c | 1 -
src/jtag/drivers/OpenULINK/src/jtag.c | 4 +++
src/jtag/drivers/ftdi.c | 1 -
src/jtag/drivers/jtag_vpi.c | 9 +++---
src/jtag/drivers/ulink.c | 2 ++
src/jtag/drivers/usb_blaster/usb_blaster.c | 14 ++++-----
src/rtt/rtt.h | 2 +-
src/target/arc.c | 1 +
src/target/arc_jtag.c | 12 ++++----
src/target/arm_adi_v5.c | 2 +-
src/target/dsp5680xx.c | 49 +++++++++---------------------
src/target/riscv/riscv-013.c | 4 ++-
src/target/semihosting_common.c | 2 ++
src/target/target.c | 20 ++++++++++++
19 files changed, 75 insertions(+), 65 deletions(-)
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- Log -----------------------------------------------------------------
commit 4cf5ab614bd830355065bb9400acf5484dc3f2c3
Author: Antonio Borneo <bor...@gm...>
Date: Sat Jan 2 18:17:20 2021 +0100
openocd: fix incorrect doxygen comments
Use '@param' in front of function's parameters and '@a' when the
parameter is recalled in the description.
This fixes doxygen complains:
warning: Found unknown command '@buff16'
While there, fix a minor typo s/occured/occurred/ in a comment and
the typo s/@apram/@param/ in a doxygen comment.
Change-Id: I5cd86a80adef552331310a21c55ec5d11354be21
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/6001
Tested-by: jenkins
diff --git a/src/flash/nor/dsp5680xx_flash.c b/src/flash/nor/dsp5680xx_flash.c
index 6f1eccfeb..49022825e 100644
--- a/src/flash/nor/dsp5680xx_flash.c
+++ b/src/flash/nor/dsp5680xx_flash.c
@@ -193,8 +193,8 @@ static int dsp5680xx_probe(struct flash_bank *bank)
/**
* The flash module (FM) on the dsp5680xx supports both individual sector
* and mass erase of the flash memory.
- * If this function is called with @first == @last == 0 or if @first is the
- * first sector (#0) and @last is the last sector then the mass erase command
+ * If this function is called with @a first == @a last == 0 or if @a first is the
+ * first sector (#0) and @a last is the last sector then the mass erase command
* is executed (much faster than erasing each sector individually).
*
* @param bank
diff --git a/src/helper/bits.h b/src/helper/bits.h
index 464584db8..cdcac9eaf 100644
--- a/src/helper/bits.h
+++ b/src/helper/bits.h
@@ -36,8 +36,8 @@
/**
* bitmap_zero - Clears all the bits in memory
- * @dst: the address of the bitmap
- * @nbits: the number of bits to clear
+ * @param dst the address of the bitmap
+ * @param nbits the number of bits to clear
*/
static inline void bitmap_zero(unsigned long *dst, unsigned int nbits)
{
@@ -47,8 +47,8 @@ static inline void bitmap_zero(unsigned long *dst, unsigned int nbits)
/**
* clear_bit - Clear a bit in memory
- * @nr: the bit to set
- * @addr: the address to start counting from
+ * @param nr the bit to set
+ * @param addr the address to start counting from
*/
static inline void clear_bit(unsigned int nr, volatile unsigned long *addr)
{
@@ -60,8 +60,8 @@ static inline void clear_bit(unsigned int nr, volatile unsigned long *addr)
/**
* set_bit - Set a bit in memory
- * @nr: the bit to set
- * @addr: the address to start counting from
+ * @param nr the bit to set
+ * @param addr the address to start counting from
*/
static inline void set_bit(unsigned int nr, volatile unsigned long *addr)
{
@@ -73,8 +73,8 @@ static inline void set_bit(unsigned int nr, volatile unsigned long *addr)
/**
* test_bit - Determine whether a bit is set
- * @nr: bit number to test
- * @addr: Address to start counting from
+ * @param nr bit number to test
+ * @param addr Address to start counting from
*/
static inline int test_bit(unsigned int nr, const volatile unsigned long *addr)
{
diff --git a/src/helper/list.h b/src/helper/list.h
index 6fd0e7ca7..7f6046441 100644
--- a/src/helper/list.h
+++ b/src/helper/list.h
@@ -64,8 +64,8 @@ extern void __list_add(struct list_head *new,
/**
* list_add - add a new entry
- * @new: new entry to be added
- * @head: list head to add it after
+ * @param new new entry to be added
+ * @param head list head to add it after
*
* Insert a new entry after the specified head.
* This is good for implementing stacks.
@@ -78,8 +78,8 @@ static inline void list_add(struct list_head *new, struct list_head *head)
/**
* list_add_tail - add a new entry
- * @new: new entry to be added
- * @head: list head to add it before
+ * @param new new entry to be added
+ * @param head list head to add it before
*
* Insert a new entry before the specified head.
* This is useful for implementing queues.
@@ -104,7 +104,7 @@ static inline void __list_del(struct list_head *prev, struct list_head *next)
/**
* list_del - deletes entry from list.
- * @entry: the element to delete from the list.
+ * @param entry the element to delete from the list.
* Note: list_empty() on entry does not return true after this, the entry is
* in an undefined state.
*/
@@ -127,10 +127,10 @@ extern void list_del(struct list_head *entry);
/**
* list_replace - replace old entry by new one
- * @old : the element to be replaced
- * @new : the new element to insert
+ * @param old the element to be replaced
+ * @param new the new element to insert
*
- * If @old was empty, it will be overwritten.
+ * If @a old was empty, it will be overwritten.
*/
static inline void list_replace(struct list_head *old,
struct list_head *new)
@@ -150,7 +150,7 @@ static inline void list_replace_init(struct list_head *old,
/**
* list_del_init - deletes entry from list and reinitialize it.
- * @entry: the element to delete from the list.
+ * @param entry the element to delete from the list.
*/
static inline void list_del_init(struct list_head *entry)
{
@@ -160,8 +160,8 @@ static inline void list_del_init(struct list_head *entry)
/**
* list_move - delete from one list and add as another's head
- * @list: the entry to move
- * @head: the head that will precede our entry
+ * @param list the entry to move
+ * @param head the head that will precede our entry
*/
static inline void list_move(struct list_head *list, struct list_head *head)
{
@@ -171,8 +171,8 @@ static inline void list_move(struct list_head *list, struct list_head *head)
/**
* list_move_tail - delete from one list and add as another's tail
- * @list: the entry to move
- * @head: the head that will follow our entry
+ * @param list the entry to move
+ * @param head the head that will follow our entry
*/
static inline void list_move_tail(struct list_head *list,
struct list_head *head)
@@ -182,9 +182,9 @@ static inline void list_move_tail(struct list_head *list,
}
/**
- * list_is_last - tests whether @list is the last entry in list @head
- * @list: the entry to test
- * @head: the head of the list
+ * list_is_last - tests whether @a list is the last entry in list @a head
+ * @param list the entry to test
+ * @param head the head of the list
*/
static inline int list_is_last(const struct list_head *list,
const struct list_head *head)
@@ -194,7 +194,7 @@ static inline int list_is_last(const struct list_head *list,
/**
* list_empty - tests whether a list is empty
- * @head: the list to test.
+ * @param head the list to test.
*/
static inline int list_empty(const struct list_head *head)
{
@@ -203,7 +203,7 @@ static inline int list_empty(const struct list_head *head)
/**
* list_empty_careful - tests whether a list is empty and not being modified
- * @head: the list to test
+ * @param head the list to test
*
* Description:
* tests whether a list is empty _and_ checks that no other CPU might be
@@ -222,7 +222,7 @@ static inline int list_empty_careful(const struct list_head *head)
/**
* list_rotate_left - rotate the list to the left
- * @head: the head of the list
+ * @param head the head of the list
*/
static inline void list_rotate_left(struct list_head *head)
{
@@ -236,7 +236,7 @@ static inline void list_rotate_left(struct list_head *head)
/**
* list_is_singular - tests whether a list has just one entry.
- * @head: the list to test.
+ * @param head the list to test.
*/
static inline int list_is_singular(const struct list_head *head)
{
@@ -257,14 +257,14 @@ static inline void __list_cut_position(struct list_head *list,
/**
* list_cut_position - cut a list into two
- * @list: a new list to add all removed entries
- * @head: a list with entries
- * @entry: an entry within head, could be the head itself
+ * @param list a new list to add all removed entries
+ * @param head a list with entries
+ * @param entry an entry within head, could be the head itself
* and if so we won't cut the list
*
- * This helper moves the initial part of @head, up to and
- * including @entry, from @head to @list. You should
- * pass on @entry an element you know is on @head. @list
+ * This helper moves the initial part of @a head, up to and
+ * including @a entry, from @a head to @a list. You should
+ * pass on @a entry an element you know is on @a head. @a list
* should be an empty list or a list you do not care about
* losing its data.
*
@@ -299,8 +299,8 @@ static inline void __list_splice(const struct list_head *list,
/**
* list_splice - join two lists, this is designed for stacks
- * @list: the new list to add.
- * @head: the place to add it in the first list.
+ * @param list the new list to add.
+ * @param head the place to add it in the first list.
*/
static inline void list_splice(const struct list_head *list,
struct list_head *head)
@@ -311,8 +311,8 @@ static inline void list_splice(const struct list_head *list,
/**
* list_splice_tail - join two lists, each list being a queue
- * @list: the new list to add.
- * @head: the place to add it in the first list.
+ * @param list the new list to add.
+ * @param head the place to add it in the first list.
*/
static inline void list_splice_tail(struct list_head *list,
struct list_head *head)
@@ -323,10 +323,10 @@ static inline void list_splice_tail(struct list_head *list,
/**
* list_splice_init - join two lists and reinitialise the emptied list.
- * @list: the new list to add.
- * @head: the place to add it in the first list.
+ * @param list the new list to add.
+ * @param head the place to add it in the first list.
*
- * The list at @list is reinitialised
+ * The list at @a list is reinitialised
*/
static inline void list_splice_init(struct list_head *list,
struct list_head *head)
@@ -339,11 +339,11 @@ static inline void list_splice_init(struct list_head *list,
/**
* list_splice_tail_init - join two lists and reinitialise the emptied list
- * @list: the new list to add.
- * @head: the place to add it in the first list.
+ * @param list the new list to add.
+ * @param head the place to add it in the first list.
*
* Each of the lists is a queue.
- * The list at @list is reinitialised
+ * The list at @a list is reinitialised
*/
static inline void list_splice_tail_init(struct list_head *list,
struct list_head *head)
@@ -356,18 +356,18 @@ static inline void list_splice_tail_init(struct list_head *list,
/**
* list_entry - get the struct for this entry
- * @ptr: the &struct list_head pointer.
- * @type: the type of the struct this is embedded in.
- * @member: the name of the list_struct within the struct.
+ * @param ptr the &struct list_head pointer.
+ * @param type the type of the struct this is embedded in.
+ * @param member the name of the list_struct within the struct.
*/
#define list_entry(ptr, type, member) \
container_of(ptr, type, member)
/**
* list_first_entry - get the first element from a list
- * @ptr: the list head to take the element from.
- * @type: the type of the struct this is embedded in.
- * @member: the name of the list_struct within the struct.
+ * @param ptr the list head to take the element from.
+ * @param type the type of the struct this is embedded in.
+ * @param member the name of the list_struct within the struct.
*
* Note, that list is expected to be not empty.
*/
@@ -376,8 +376,8 @@ static inline void list_splice_tail_init(struct list_head *list,
/**
* list_for_each - iterate over a list
- * @pos: the &struct list_head to use as a loop cursor.
- * @head: the head for your list.
+ * @param pos the &struct list_head to use as a loop cursor.
+ * @param head the head for your list.
*/
#define list_for_each(pos, head) \
for (pos = (head)->next; prefetch(pos->next), pos != (head); \
@@ -385,8 +385,8 @@ static inline void list_splice_tail_init(struct list_head *list,
/**
* __list_for_each - iterate over a list
- * @pos: the &struct list_head to use as a loop cursor.
- * @head: the head for your list.
+ * @param pos the &struct list_head to use as a loop cursor.
+ * @param head the head for your list.
*
* This variant differs from list_for_each() in that it's the
* simplest possible list iteration code, no prefetching is done.
@@ -398,8 +398,8 @@ static inline void list_splice_tail_init(struct list_head *list,
/**
* list_for_each_prev - iterate over a list backwards
- * @pos: the &struct list_head to use as a loop cursor.
- * @head: the head for your list.
+ * @param pos the &struct list_head to use as a loop cursor.
+ * @param head the head for your list.
*/
#define list_for_each_prev(pos, head) \
for (pos = (head)->prev; prefetch(pos->prev), pos != (head); \
@@ -407,9 +407,9 @@ static inline void list_splice_tail_init(struct list_head *list,
/**
* list_for_each_safe - iterate over a list safe against removal of list entry
- * @pos: the &struct list_head to use as a loop cursor.
- * @n: another &struct list_head to use as temporary storage
- * @head: the head for your list.
+ * @param pos the &struct list_head to use as a loop cursor.
+ * @param n another &struct list_head to use as temporary storage
+ * @param head the head for your list.
*/
#define list_for_each_safe(pos, n, head) \
for (pos = (head)->next, n = pos->next; pos != (head); \
@@ -417,9 +417,9 @@ static inline void list_splice_tail_init(struct list_head *list,
/**
* list_for_each_prev_safe - iterate over a list backwards safe against removal of list entry
- * @pos: the &struct list_head to use as a loop cursor.
- * @n: another &struct list_head to use as temporary storage
- * @head: the head for your list.
+ * @param pos the &struct list_head to use as a loop cursor.
+ * @param n another &struct list_head to use as temporary storage
+ * @param head the head for your list.
*/
#define list_for_each_prev_safe(pos, n, head) \
for (pos = (head)->prev, n = pos->prev; \
@@ -428,9 +428,9 @@ static inline void list_splice_tail_init(struct list_head *list,
/**
* list_for_each_entry - iterate over list of given type
- * @pos: the type * to use as a loop cursor.
- * @head: the head for your list.
- * @member: the name of the list_struct within the struct.
+ * @param pos the type * to use as a loop cursor.
+ * @param head the head for your list.
+ * @param member the name of the list_struct within the struct.
*/
#define list_for_each_entry(pos, head, member) \
for (pos = list_entry((head)->next, typeof(*pos), member); \
@@ -439,9 +439,9 @@ static inline void list_splice_tail_init(struct list_head *list,
/**
* list_for_each_entry_reverse - iterate backwards over list of given type.
- * @pos: the type * to use as a loop cursor.
- * @head: the head for your list.
- * @member: the name of the list_struct within the struct.
+ * @param pos the type * to use as a loop cursor.
+ * @param head the head for your list.
+ * @param member the name of the list_struct within the struct.
*/
#define list_for_each_entry_reverse(pos, head, member) \
for (pos = list_entry((head)->prev, typeof(*pos), member); \
@@ -450,9 +450,9 @@ static inline void list_splice_tail_init(struct list_head *list,
/**
* list_prepare_entry - prepare a pos entry for use in list_for_each_entry_continue()
- * @pos: the type * to use as a start point
- * @head: the head of the list
- * @member: the name of the list_struct within the struct.
+ * @param pos the type * to use as a start point
+ * @param head the head of the list
+ * @param member the name of the list_struct within the struct.
*
* Prepares a pos entry for use as a start point in list_for_each_entry_continue().
*/
@@ -461,9 +461,9 @@ static inline void list_splice_tail_init(struct list_head *list,
/**
* list_for_each_entry_continue - continue iteration over list of given type
- * @pos: the type * to use as a loop cursor.
- * @head: the head for your list.
- * @member: the name of the list_struct within the struct.
+ * @param pos the type * to use as a loop cursor.
+ * @param head the head for your list.
+ * @param member the name of the list_struct within the struct.
*
* Continue to iterate over list of given type, continuing after
* the current position.
@@ -475,9 +475,9 @@ static inline void list_splice_tail_init(struct list_head *list,
/**
* list_for_each_entry_continue_reverse - iterate backwards from the given point
- * @pos: the type * to use as a loop cursor.
- * @head: the head for your list.
- * @member: the name of the list_struct within the struct.
+ * @param pos the type * to use as a loop cursor.
+ * @param head the head for your list.
+ * @param member the name of the list_struct within the struct.
*
* Start to iterate over list of given type backwards, continuing after
* the current position.
@@ -489,9 +489,9 @@ static inline void list_splice_tail_init(struct list_head *list,
/**
* list_for_each_entry_from - iterate over list of given type from the current point
- * @pos: the type * to use as a loop cursor.
- * @head: the head for your list.
- * @member: the name of the list_struct within the struct.
+ * @param pos the type * to use as a loop cursor.
+ * @param head the head for your list.
+ * @param member the name of the list_struct within the struct.
*
* Iterate over list of given type, continuing from current position.
*/
@@ -501,10 +501,10 @@ static inline void list_splice_tail_init(struct list_head *list,
/**
* list_for_each_entry_safe - iterate over list of given type safe against removal of list entry
- * @pos: the type * to use as a loop cursor.
- * @n: another type * to use as temporary storage
- * @head: the head for your list.
- * @member: the name of the list_struct within the struct.
+ * @param pos the type * to use as a loop cursor.
+ * @param n another type * to use as temporary storage
+ * @param head the head for your list.
+ * @param member the name of the list_struct within the struct.
*/
#define list_for_each_entry_safe(pos, n, head, member) \
for (pos = list_entry((head)->next, typeof(*pos), member), \
@@ -514,10 +514,10 @@ static inline void list_splice_tail_init(struct list_head *list,
/**
* list_for_each_entry_safe_continue - continue list iteration safe against removal
- * @pos: the type * to use as a loop cursor.
- * @n: another type * to use as temporary storage
- * @head: the head for your list.
- * @member: the name of the list_struct within the struct.
+ * @param pos the type * to use as a loop cursor.
+ * @param n another type * to use as temporary storage
+ * @param head the head for your list.
+ * @param member the name of the list_struct within the struct.
*
* Iterate over list of given type, continuing after current point,
* safe against removal of list entry.
@@ -530,10 +530,10 @@ static inline void list_splice_tail_init(struct list_head *list,
/**
* list_for_each_entry_safe_from - iterate over list from current point safe against removal
- * @pos: the type * to use as a loop cursor.
- * @n: another type * to use as temporary storage
- * @head: the head for your list.
- * @member: the name of the list_struct within the struct.
+ * @param pos the type * to use as a loop cursor.
+ * @param n another type * to use as temporary storage
+ * @param head the head for your list.
+ * @param member the name of the list_struct within the struct.
*
* Iterate over list of given type from current point, safe against
* removal of list entry.
@@ -545,10 +545,10 @@ static inline void list_splice_tail_init(struct list_head *list,
/**
* list_for_each_entry_safe_reverse - iterate backwards over list safe against removal
- * @pos: the type * to use as a loop cursor.
- * @n: another type * to use as temporary storage
- * @head: the head for your list.
- * @member: the name of the list_struct within the struct.
+ * @param pos the type * to use as a loop cursor.
+ * @param n another type * to use as temporary storage
+ * @param head the head for your list.
+ * @param member the name of the list_struct within the struct.
*
* Iterate backwards over list of given type, safe against removal
* of list entry.
@@ -561,9 +561,9 @@ static inline void list_splice_tail_init(struct list_head *list,
/**
* list_safe_reset_next - reset a stale list_for_each_entry_safe loop
- * @pos: the loop cursor used in the list_for_each_entry_safe loop
- * @n: temporary storage used in list_for_each_entry_safe
- * @member: the name of the list_struct within the struct.
+ * @param pos the loop cursor used in the list_for_each_entry_safe loop
+ * @param n temporary storage used in list_for_each_entry_safe
+ * @param member the name of the list_struct within the struct.
*
* list_safe_reset_next is not safe to use in general if the list may be
* modified concurrently (eg. the lock is dropped in the loop body). An
@@ -686,10 +686,10 @@ static inline void hlist_move_list(struct hlist_head *old,
/**
* hlist_for_each_entry - iterate over list of given type
- * @tpos: the type * to use as a loop cursor.
- * @pos: the &struct hlist_node to use as a loop cursor.
- * @head: the head for your list.
- * @member: the name of the hlist_node within the struct.
+ * @param tpos the type * to use as a loop cursor.
+ * @param pos the &struct hlist_node to use as a loop cursor.
+ * @param head the head for your list.
+ * @param member the name of the hlist_node within the struct.
*/
#define hlist_for_each_entry(tpos, pos, head, member) \
for (pos = (head)->first; \
@@ -699,9 +699,9 @@ static inline void hlist_move_list(struct hlist_head *old,
/**
* hlist_for_each_entry_continue - iterate over a hlist continuing after current point
- * @tpos: the type * to use as a loop cursor.
- * @pos: the &struct hlist_node to use as a loop cursor.
- * @member: the name of the hlist_node within the struct.
+ * @param tpos the type * to use as a loop cursor.
+ * @param pos the &struct hlist_node to use as a loop cursor.
+ * @param member the name of the hlist_node within the struct.
*/
#define hlist_for_each_entry_continue(tpos, pos, member) \
for (pos = (pos)->next; \
@@ -711,9 +711,9 @@ static inline void hlist_move_list(struct hlist_head *old,
/**
* hlist_for_each_entry_from - iterate over a hlist continuing from current point
- * @tpos: the type * to use as a loop cursor.
- * @pos: the &struct hlist_node to use as a loop cursor.
- * @member: the name of the hlist_node within the struct.
+ * @param tpos the type * to use as a loop cursor.
+ * @param pos the &struct hlist_node to use as a loop cursor.
+ * @param member the name of the hlist_node within the struct.
*/
#define hlist_for_each_entry_from(tpos, pos, member) \
for (; pos && ({ prefetch(pos->next); 1; }) && \
@@ -722,11 +722,11 @@ static inline void hlist_move_list(struct hlist_head *old,
/**
* hlist_for_each_entry_safe - iterate over list of given type safe against removal of list entry
- * @tpos: the type * to use as a loop cursor.
- * @pos: the &struct hlist_node to use as a loop cursor.
- * @n: another &struct hlist_node to use as temporary storage
- * @head: the head for your list.
- * @member: the name of the hlist_node within the struct.
+ * @param tpos the type * to use as a loop cursor.
+ * @param pos the &struct hlist_node to use as a loop cursor.
+ * @param n another &struct hlist_node to use as temporary storage
+ * @param head the head for your list.
+ * @param member the name of the hlist_node within the struct.
*/
#define hlist_for_each_entry_safe(tpos, pos, n, head, member) \
for (pos = (head)->first; \
diff --git a/src/jtag/drivers/jtag_dpi.c b/src/jtag/drivers/jtag_dpi.c
index 575c6bce2..7cac20051 100644
--- a/src/jtag/drivers/jtag_dpi.c
+++ b/src/jtag/drivers/jtag_dpi.c
@@ -79,8 +79,8 @@ static int read_sock(char *buf, size_t len)
/**
* jtag_dpi_reset - ask to reset the JTAG device
- * @trst: 1 if TRST is to be asserted
- * @srst: 1 if SRST is to be asserted
+ * @param trst 1 if TRST is to be asserted
+ * @param srst 1 if SRST is to be asserted
*/
static int jtag_dpi_reset(int trst, int srst)
{
@@ -109,11 +109,11 @@ static int jtag_dpi_reset(int trst, int srst)
/**
* jtag_dpi_scan - launches a DR-scan or IR-scan
- * @cmd: the command to launch
+ * @param cmd the command to launch
*
* Launch a JTAG IR-scan or DR-scan
*
- * Returns ERROR_OK if OK, ERROR_xxx if a read/write error occured.
+ * Returns ERROR_OK if OK, ERROR_xxx if a read/write error occurred.
*/
static int jtag_dpi_scan(struct scan_command *cmd)
{
diff --git a/src/jtag/drivers/jtag_vpi.c b/src/jtag/drivers/jtag_vpi.c
index 32a43f8bf..a6609d21e 100644
--- a/src/jtag/drivers/jtag_vpi.c
+++ b/src/jtag/drivers/jtag_vpi.c
@@ -208,8 +208,8 @@ static int jtag_vpi_receive_cmd(struct vpi_cmd *vpi)
/**
* jtag_vpi_reset - ask to reset the JTAG device
- * @trst: 1 if TRST is to be asserted
- * @srst: 1 if SRST is to be asserted
+ * @param trst 1 if TRST is to be asserted
+ * @param srst 1 if SRST is to be asserted
*/
static int jtag_vpi_reset(int trst, int srst)
{
@@ -223,8 +223,8 @@ static int jtag_vpi_reset(int trst, int srst)
/**
* jtag_vpi_tms_seq - ask a TMS sequence transition to JTAG
- * @bits: TMS bits to be written (bit0, bit1 .. bitN)
- * @nb_bits: number of TMS bits (between 1 and 8)
+ * @param bits TMS bits to be written (bit0, bit1 .. bitN)
+ * @param nb_bits number of TMS bits (between 1 and 8)
*
* Write a series of TMS transitions, where each transition consists in :
* - writing out TCK=0, TMS=<new_state>, TDI=<???>
@@ -250,7 +250,7 @@ static int jtag_vpi_tms_seq(const uint8_t *bits, int nb_bits)
/**
* jtag_vpi_path_move - ask a TMS sequence transition to JTAG
- * @cmd: path transition
+ * @param cmd path transition
*
* Write a series of TMS transitions, where each transition consists in :
* - writing out TCK=0, TMS=<new_state>, TDI=<???>
@@ -276,7 +276,7 @@ static int jtag_vpi_path_move(struct pathmove_command *cmd)
/**
* jtag_vpi_tms - ask a tms command
- * @cmd: tms command
+ * @param cmd tms command
*/
static int jtag_vpi_tms(struct tms_command *cmd)
{
@@ -342,8 +342,8 @@ static int jtag_vpi_queue_tdi_xfer(uint8_t *bits, int nb_bits, int tap_shift)
/**
* jtag_vpi_queue_tdi - short description
- * @bits: bits to be queued on TDI (or NULL if 0 are to be queued)
- * @nb_bits: number of bits
+ * @param bits bits to be queued on TDI (or NULL if 0 are to be queued)
+ * @param nb_bits number of bits
*/
static int jtag_vpi_queue_tdi(uint8_t *bits, int nb_bits, int tap_shift)
{
@@ -372,7 +372,7 @@ static int jtag_vpi_queue_tdi(uint8_t *bits, int nb_bits, int tap_shift)
/**
* jtag_vpi_clock_tms - clock a TMS transition
- * @tms: the TMS to be sent
+ * @param tms the TMS to be sent
*
* Triggers a TMS transition (ie. one JTAG TAP state move).
*/
@@ -386,7 +386,7 @@ static int jtag_vpi_clock_tms(int tms)
/**
* jtag_vpi_scan - launches a DR-scan or IR-scan
- * @cmd: the command to launch
+ * @param cmd the command to launch
*
* Launch a JTAG IR-scan or DR-scan
*
diff --git a/src/jtag/drivers/usb_blaster/usb_blaster.c b/src/jtag/drivers/usb_blaster/usb_blaster.c
index de3b5d58b..5559bcedb 100644
--- a/src/jtag/drivers/usb_blaster/usb_blaster.c
+++ b/src/jtag/drivers/usb_blaster/usb_blaster.c
@@ -253,7 +253,7 @@ static void ublast_flush_buffer(void)
/**
* ublast_queue_byte - queue one 'bitbang mode' byte for USB Blaster
- * @abyte: the byte to queue
+ * @param abyte the byte to queue
*
* Queues one byte in 'bitbang mode' to the USB Blaster. The byte is not
* actually sent, but stored in a buffer. The write is performed once
@@ -271,7 +271,7 @@ static void ublast_queue_byte(uint8_t abyte)
/**
* ublast_compute_pin - compute if gpio should be asserted
- * @steer: control (ie. TRST driven, SRST driven, of fixed)
+ * @param steer control (ie. TRST driven, SRST driven, of fixed)
*
* Returns pin value (1 means driven high, 0 mean driven low)
*/
@@ -293,7 +293,7 @@ static bool ublast_compute_pin(enum gpio_steer steer)
/**
* ublast_build_out - build bitbang mode output byte
- * @type: says if reading back TDO is required
+ * @param type says if reading back TDO is required
*
* Returns the compute bitbang mode byte
*/
@@ -313,8 +313,8 @@ static uint8_t ublast_build_out(enum scan_type type)
/**
* ublast_reset - reset the JTAG device is possible
- * @trst: 1 if TRST is to be asserted
- * @srst: 1 if SRST is to be asserted
+ * @param trst 1 if TRST is to be asserted
+ * @param srst 1 if SRST is to be asserted
*/
static void ublast_reset(int trst, int srst)
{
@@ -329,7 +329,7 @@ static void ublast_reset(int trst, int srst)
/**
* ublast_clock_tms - clock a TMS transition
- * @tms: the TMS to be sent
+ * @param tms the TMS to be sent
*
* Triggers a TMS transition (ie. one JTAG TAP state move).
*/
@@ -360,8 +360,8 @@ static void ublast_idle_clock(void)
/**
* ublast_clock_tdi - Output a TDI with bitbang mode
- * @tdi: the TDI bit to be shifted out
- * @type: scan type (ie. does a readback of TDO is required)
+ * @param tdi the TDI bit to be shifted out
+ * @param type scan type (ie. does a readback of TDO is required)
*
* Output a TDI bit and assert clock to push it into the JTAG device :
* - writing out TCK=0, TMS=<old_state>=0, TDI=<tdi>
@@ -387,8 +387,8 @@ static void ublast_clock_tdi(int tdi, enum scan_type type)
/**
* ublast_clock_tdi_flip_tms - Output a TDI with bitbang mode, change JTAG state
- * @tdi: the TDI bit to be shifted out
- * @type: scan type (ie. does a readback of TDO is required)
+ * @param tdi the TDI bit to be shifted out
+ * @param type scan type (ie. does a readback of TDO is required)
*
* This function is the same as ublast_clock_tdi(), but it changes also the TMS
* while output the TDI. This should be the last TDI output of a TDI
@@ -416,8 +416,8 @@ static void ublast_clock_tdi_flip_tms(int tdi, enum scan_type type)
/**
* ublast_queue_bytes - queue bytes for the USB Blaster
- * @bytes: byte array
- * @nb_bytes: number of bytes
+ * @param bytes byte array
+ * @param nb_bytes number of bytes
*
* Queues bytes to be sent to the USB Blaster. The bytes are not
* actually sent, but stored in a buffer. The write is performed once
@@ -443,9 +443,9 @@ static void ublast_queue_bytes(uint8_t *bytes, int nb_bytes)
/**
* ublast_tms_seq - write a TMS sequence transition to JTAG
- * @bits: TMS bits to be written (bit0, bit1 .. bitN)
- * @nb_bits: number of TMS bits (between 1 and 8)
- * @skip: number of TMS bits to skip at the beginning of the series
+ * @param bits TMS bits to be written (bit0, bit1 .. bitN)
+ * @param nb_bits number of TMS bits (between 1 and 8)
+ * @param skip number of TMS bits to skip at the beginning of the series
*
* Write a series of TMS transitions, where each transition consists in :
* - writing out TCK=0, TMS=<new_state>, TDI=<???>
@@ -465,7 +465,7 @@ static void ublast_tms_seq(const uint8_t *bits, int nb_bits, int skip)
/**
* ublast_tms - write a tms command
- * @cmd: tms command
+ * @param cmd tms command
*/
static void ublast_tms(struct tms_command *cmd)
{
@@ -475,7 +475,7 @@ static void ublast_tms(struct tms_command *cmd)
/**
* ublast_path_move - write a TMS sequence transition to JTAG
- * @cmd: path transition
+ * @param cmd path transition
*
* Write a series of TMS transitions, where each transition consists in :
* - writing out TCK=0, TMS=<new_state>, TDI=<???>
@@ -501,8 +501,8 @@ static void ublast_path_move(struct pathmove_command *cmd)
/**
* ublast_state_move - move JTAG state to the target state
- * @state: the target state
- * @skip: number of bits to skip at the beginning of the path
+ * @param state the target state
+ * @param skip number of bits to skip at the beginning of the path
*
* Input the correct TMS sequence to the JTAG TAP so that we end up in the
* target state. This assumes the current state (tap_get_state()) is correct.
@@ -524,8 +524,8 @@ static void ublast_state_move(tap_state_t state, int skip)
/**
* ublast_read_byteshifted_tdos - read TDO of byteshift writes
- * @buf: the buffer to store the bits
- * @nb_bits: the number of bits
+ * @param buf the buffer to store the bits
+ * @param nb_bits the number of bits
*
* Reads back from USB Blaster TDO bits, triggered by a 'byteshift write', ie. eight
* bits per received byte from USB interface, and store them in buffer.
@@ -552,8 +552,8 @@ static int ublast_read_byteshifted_tdos(uint8_t *buf, int nb_bytes)
/**
* ublast_read_bitbang_tdos - read TDO of bitbang writes
- * @buf: the buffer to store the bits
- * @nb_bits: the number of bits
+ * @param buf the buffer to store the bits
+ * @param nb_bits the number of bits
*
* Reads back from USB Blaster TDO bits, triggered by a 'bitbang write', ie. one
* bit per received byte from USB interface, and store them in buffer, where :
@@ -592,9 +592,9 @@ static int ublast_read_bitbang_tdos(uint8_t *buf, int nb_bits)
/**
* ublast_queue_tdi - short description
- * @bits: bits to be queued on TDI (or NULL if 0 are to be queued)
- * @nb_bits: number of bits
- * @scan: scan type (ie. if TDO read back is required or not)
+ * @param bits bits to be queued on TDI (or NULL if 0 are to be queued)
+ * @param nb_bits number of bits
+ * @param scan scan type (ie. if TDO read back is required or not)
*
* Outputs a series of TDI bits on TDI.
* As a side effect, the last TDI bit is sent along a TMS=1, and triggers a JTAG
@@ -703,7 +703,7 @@ static void ublast_stableclocks(int cycles)
/**
* ublast_scan - launches a DR-scan or IR-scan
- * @cmd: the command to launch
+ * @param cmd the command to launch
*
* Launch a JTAG IR-scan or DR-scan
*
diff --git a/src/target/dsp5680xx.c b/src/target/dsp5680xx.c
index ee26d24ac..ec07c2519 100644
--- a/src/target/dsp5680xx.c
+++ b/src/target/dsp5680xx.c
@@ -117,7 +117,7 @@ static int dsp5680xx_drscan(struct target *target, uint8_t *d_in,
* @param target
* @param d_in This is the data that will be shifted into the JTAG IR reg.
* @param d_out The data that will be shifted out of the JTAG IR reg will be stored here.
- * @apram ir_len Length of the data to be shifted to JTAG IR.
+ * @param ir_len Length of the data to be shifted to JTAG IR.
*
*/
static int dsp5680xx_irscan(struct target *target, uint32_t *d_in,
@@ -1070,8 +1070,8 @@ static int dsp5680xx_resume(struct target *target, int current,
}
/**
- * The value of @address determines if it corresponds to P: (program) or X: (dat) memory.
- * If the address is over 0x200000 then it is considered X: memory, and @pmem = 0.
+ * The value of @a address determines if it corresponds to P: (program) or X: (dat) memory.
+ * If the address is over 0x200000 then it is considered X: memory, and @a pmem = 0.
* The special case of 0xFFXXXX is not modified, since it allows to read out the
* memory mapped EOnCE registers.
*
@@ -1405,8 +1405,8 @@ static int dsp5680xx_write_32(struct target *t, uint32_t a, uint32_t c,
}
/**
- * Writes @buffer to memory.
- * The parameter @address determines whether @buffer should be written to
+ * Writes @a buffer to memory.
+ * The parameter @a address determines whether @a buffer should be written to
* P: (program) memory or X: (dat) memory.
*
* @param target
@@ -1506,8 +1506,8 @@ static int dsp5680xx_checksum_memory(struct target *t, target_addr_t a, uint32_t
}
/**
- * Calculates a signature over @word_count words in the data from @buff16.
- * The algorithm used is the same the FM uses, so the @return may be used to compare
+ * Calculates a signature over @a word_count words in the data from @a buff16.
+ * The algorithm used is the same the FM uses, so the @a return may be used to compare
* with the one generated by the FM module, and check if flashing was successful.
* This algorithm is based on the perl script available from the Freescale website at FAQ 25630.
*
@@ -1606,14 +1606,14 @@ int dsp5680xx_f_protect_check(struct target *target, uint16_t *protected)
/**
* Executes a command on the FM module.
- * Some commands use the parameters @address and @data, others ignore them.
+ * Some commands use the parameters @a address and @a data, others ignore them.
*
* @param target
* @param command Command to execute.
* @param address Command parameter.
* @param data Command parameter.
* @param hfm_ustat FM status register.
- * @param pmem Address is P: (program) memory (@pmem == 1) or X: (dat) memory (@pmem == 0)
+ * @param pmem Address is P: (program) memory (@a pmem == 1) or X: (dat) memory (@a pmem == 0)
*
* @return
*/
@@ -1787,9 +1787,9 @@ static int set_fm_ck_div(struct target *target)
/**
* Executes the FM calculate signature command. The FM will calculate over the
- * data from @address to @address + @words -1. The result is written to a
- * register, then read out by this function and returned in @signature. The
- * value @signature may be compared to the one returned by perl_crc to
+ * data from @a address to @a address + @a words -1. The result is written to a
+ * register, then read out by this function and returned in @a signature. The
+ * value @a signature may be compared to the one returned by perl_crc to
* verify the flash was written correctly.
*
* @param target
commit 02bd67db3f85b9764b6c4a3556d070a3345e4103
Author: Antonio Borneo <bor...@gm...>
Date: Sat Jan 2 17:39:57 2021 +0100
Doxyfile.in: exclude libjaylink from doxygen
When build using libjaylink as git submodule, doxygen includes the
libjaylink files and complains for multiple 'mainpage' comment
block, one in OpenOCD and the other in libjaylink:
src/jtag/drivers/libjaylink/libjaylink/core.c:37: warning:
found more than one \mainpage comment block! (first
occurrence: doc/manual/main.txt, line 1), Skipping current
block!
Exclude libjaylink submodule from doxygen.
Change-Id: I5e856817344c9f21f8c26f077a23c00b83cfbcb5
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/6000
Tested-by: jenkins
diff --git a/Doxyfile.in b/Doxyfile.in
index 55ed7f0f1..9be53d0fc 100644
--- a/Doxyfile.in
+++ b/Doxyfile.in
@@ -600,7 +600,7 @@ RECURSIVE = YES
# excluded from the INPUT source files. This way you can easily exclude a
# subdirectory from a directory tree whose root is specified with the INPUT tag.
-EXCLUDE =
+EXCLUDE = @srcdir@/src/jtag/drivers/libjaylink
# The EXCLUDE_SYMLINKS tag can be used select whether or not files or
# directories that are symbolic links (a Unix filesystem feature) are excluded
commit fa476daa60b51881938577d102893e6443ea8bf8
Author: Antonio Borneo <bor...@gm...>
Date: Sat Jan 2 17:32:26 2021 +0100
doc/manual/primer/jtag.txt: remove duplicated section name
The section name 'primerjtag' is used twice, causing doxygen to
complain:
warning: multiple use of section label 'primerjtag',
(first occurrence: doc/manual/primer/jtag.txt, line 107)
Rename one of them.
Change-Id: Id307915dbc51a7f647fab4fb28ab431e65344d61
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/5999
Tested-by: jenkins
diff --git a/doc/manual/primer/jtag.txt b/doc/manual/primer/jtag.txt
index 41eef723d..097e20d10 100644
--- a/doc/manual/primer/jtag.txt
+++ b/doc/manual/primer/jtag.txt
@@ -104,7 +104,7 @@ target chips and work out what the various instruction registers/data
registers do, so you can actually do something useful. That's where it
gets interesting. But in and of itself, JTAG is actually very simple.
-@section primerjtag More Reading
+@section primerjtagmore More Reading
A separate primer contains information about @subpage primerjtagbs for
developers that want to extend OpenOCD for such purposes.
commit f94495154d7b8c15c8e207f76afecbe7d0aac53e
Author: Antonio Borneo <bor...@gm...>
Date: Sat Jan 2 17:13:12 2021 +0100
Doxyfile.in: fix build out-of-tree
When doxygen is built out-of-tree, it fails to find the generated
file startup_tcl.inc:
src/openocd.c:59: warning: include file startup_tcl.inc
not found, perhaps you forgot to add its directory to
INCLUDE_PATH?
Add '@builddir@/src' to INCLUDE_PATH.
Change-Id: I51f2f6fe7224bba0f8b3db7219f9831de4e67139
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/5998
Tested-by: jenkins
diff --git a/Doxyfile.in b/Doxyfile.in
index 6e68b4e37..55ed7f0f1 100644
--- a/Doxyfile.in
+++ b/Doxyfile.in
@@ -1234,7 +1234,7 @@ SEARCH_INCLUDES = YES
# contain include files that are not input files but should be processed by
# the preprocessor.
-INCLUDE_PATH =
+INCLUDE_PATH = @builddir@/src
# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard
# patterns (like *.h and *.hpp) to filter out the header-files in the
commit a16e8ba455c901c9656eebf9f7c06d3dc5844e6b
Author: Antonio Borneo <bor...@gm...>
Date: Sat Jan 2 17:00:59 2021 +0100
flash/nor/max32xxx: fix path of include file
The relative path should have three times '..'.
Issue identified by doxygen:
src/flash/nor/max32xxx.c:85: warning: include file
../../contrib/loaders/flash/max32xxx/max32xxx.inc not
found, perhaps you forgot to add its directory to
INCLUDE_PATH?
Change-Id: Ie7b4948c6770b8acb9eff26e08eea32945ebb219
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/5997
Tested-by: jenkins
diff --git a/src/flash/nor/max32xxx.c b/src/flash/nor/max32xxx.c
index 9a5e83fa0..586a73b1d 100644
--- a/src/flash/nor/max32xxx.c
+++ b/src/flash/nor/max32xxx.c
@@ -82,7 +82,7 @@ struct max32xxx_flash_bank {
/* see contrib/loaders/flash/max32xxx/max32xxx.s for src */
static const uint8_t write_code[] = {
-#include "../../contrib/loaders/flash/max32xxx/max32xxx.inc"
+#include "../../../contrib/loaders/flash/max32xxx/max32xxx.inc"
};
/* Config Command: flash bank name driver base size chip_width bus_width target [driver_option]
commit f83c2b0c7c53770df9771d46a32c045175d02284
Author: Antonio Borneo <bor...@gm...>
Date: Sat Jan 2 16:49:11 2021 +0100
doc/style: fix doxygen error
Doxygen complains about non-closed nested comments:
doc/manual/style.txt:423: warning: Reached end of file
while still inside a (nested) comment. Nesting level 1
(probable line reference: 149)
This is caused by the string '/**' that is interpreted as the
beginning of a comment.
Escape the string to not let doxygen consider it as a comment
While there, replace @code/@endcode with @verbatim/@endverbatim to
properly render the line.
Change-Id: If2a27c4cf659326e317cc4ac8c0b313e97e40432
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/5996
Tested-by: jenkins
diff --git a/doc/manual/style.txt b/doc/manual/style.txt
index 7191a4b0e..dad3bb440 100644
--- a/doc/manual/style.txt
+++ b/doc/manual/style.txt
@@ -186,9 +186,9 @@ comments.
"empty" lines should be removed from the block.
-# Only single spaces should be used; do @b not add mid-line indentation.
-# If the total line length will be less than 72-80 columns, then
- - The @c /**< form can be used on the same line.
+ - The @c /\**< form can be used on the same line.
- This style should be used sparingly; the best use is for fields:
- @code int field; /**< field description */ @endcode
+ @verbatim int field; /**< field description */ @endverbatim
@section styledoxyall Doxygen Style Guide
commit 3fbcb26f988c10286d00d08e488f87cddd4ebe38
Author: Antonio Borneo <bor...@gm...>
Date: Sun Jan 3 12:02:49 2021 +0100
udev: fix permission for Ambiq Micro EVK's
Commit 68e204f1e91a ("udev: Add rules for Ambiq Micro EVK's.") was
initially proposed as http://openocd.zylin.com/3429/ then replaced
by http://openocd.zylin.com/3980/
The initial proposal was for file '99-openocd.rules', in which
MODE="664" was the norm.
After merge of http://openocd.zylin.com/2804/ the new udev rules
in '60-openocd.rules' switched to MODE="660", but the evolution of
the above patch missed this change.
Switch udev rules of Ambiq Micro EVK's to MODE="660" and uniform
them to the rest of the file.
Change-Id: I4b4eea535184ee8569da3264bff4f1fafb5bce4d
Signed-off-by: Antonio Borneo <bor...@gm...>
Fixes: 68e204f1e91a ("udev: Add rules for Ambiq Micro EVK's.")
Reviewed-on: http://openocd.zylin.com/6004
Tested-by: jenkins
diff --git a/contrib/60-openocd.rules b/contrib/60-openocd.rules
index b886df50b..e0864b827 100644
--- a/contrib/60-openocd.rules
+++ b/contrib/60-openocd.rules
@@ -161,9 +161,9 @@ ATTRS{idVendor}=="1cbe", ATTRS{idProduct}=="02a5", MODE="660", GROUP="plugdev",
ATTRS{idVendor}=="1cbe", ATTRS{idProduct}=="00ff", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Ambiq Micro EVK and Debug boards.
-ATTRS{idVendor}=="2aec", ATTRS{idProduct}=="6010", MODE="664", GROUP="plugdev", TAG+="uaccess"
-ATTRS{idVendor}=="2aec", ATTRS{idProduct}=="6011", MODE="664", GROUP="plugdev", TAG+="uaccess"
-ATTRS{idVendor}=="2aec", ATTRS{idProduct}=="1106", MODE="664", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="2aec", ATTRS{idProduct}=="6010", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="2aec", ATTRS{idProduct}=="6011", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="2aec", ATTRS{idProduct}=="1106", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Marvell Sheevaplug
ATTRS{idVendor}=="9e88", ATTRS{idProduct}=="9e8f", MODE="660", GROUP="plugdev", TAG+="uaccess"
-----------------------------------------------------------------------
Summary of changes:
Doxyfile.in | 4 +-
contrib/60-openocd.rules | 6 +-
doc/manual/primer/jtag.txt | 2 +-
doc/manual/style.txt | 4 +-
src/flash/nor/dsp5680xx_flash.c | 4 +-
src/flash/nor/max32xxx.c | 2 +-
src/helper/bits.h | 16 +--
src/helper/list.h | 212 ++++++++++++++---------------
src/jtag/drivers/jtag_dpi.c | 8 +-
src/jtag/drivers/jtag_vpi.c | 20 +--
src/jtag/drivers/usb_blaster/usb_blaster.c | 54 ++++----
src/target/dsp5680xx.c | 24 ++--
12 files changed, 178 insertions(+), 178 deletions(-)
hooks/post-receive
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|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
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- Log -----------------------------------------------------------------
commit c1270bcb38477a0c8a8be32921fccda61f9c06c7
Author: Antonio Borneo <bor...@gm...>
Date: Mon Jan 4 19:24:21 2021 +0100
target: fix memory leak on multiple '-gdb-port' flag
In the odd case of multiple flags '-gdb-port' during 'target
create' or following 'configure', the new strdup()'ed value will
replace the old one without freeing it.
Free the old value (if it exists) before replacing it.
Change-Id: I1673346613ce7023880046e3a9ba473e75f18b8a
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/6005
Tested-by: jenkins
diff --git a/src/target/target.c b/src/target/target.c
index 3c1a6338e..c752844b0 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -5123,6 +5123,7 @@ no_params:
e = Jim_GetOpt_String(goi, &s, NULL);
if (e != JIM_OK)
return e;
+ free(target->gdb_port_override);
target->gdb_port_override = strdup(s);
} else {
if (goi->argc != 0)
commit e22198c1521fdf98c0fc1a524df2af0ef947ec21
Author: Jiri Kastner <cz1...@gm...>
Date: Sun Jan 3 10:10:11 2021 +0100
contrib: udev file for Cypress SuperSpeed Explorer kit
lsusb output:
Bus 003 Device 011: ID 04b4:0007 Cypress Semiconductor Corp.
Couldn't open device, some information will be missing
Device Descriptor:
bLength 18
bDescriptorType 1
bcdUSB 2.00
bDeviceClass 0 (Defined at Interface level)
bDeviceSubClass 0
bDeviceProtocol 0
bMaxPacketSize0 8
idVendor 0x04b4 Cypress Semiconductor Corp.
idProduct 0x0007
bcdDevice 0.00
iManufacturer 1
iProduct 2
iSerial 0
bNumConfigurations 1
Configuration Descriptor:
bLength 9
bDescriptorType 2
wTotalLength 114
bNumInterfaces 4
bConfigurationValue 1
iConfiguration 0
bmAttributes 0xa0
(Bus Powered)
Remote Wakeup
MaxPower 100mA
Interface Association:
bLength 8
bDescriptorType 11
bFirstInterface 0
bInterfaceCount 2
bFunctionClass 2 Communications
bFunctionSubClass 2 Abstract (modem)
bFunctionProtocol 1 AT-commands (v.25ter)
iFunction 0
Interface Descriptor:
bLength 9
bDescriptorType 4
bInterfaceNumber 0
bAlternateSetting 0
bNumEndpoints 1
bInterfaceClass 2 Communications
bInterfaceSubClass 2 Abstract (modem)
bInterfaceProtocol 1 AT-commands (v.25ter)
iInterface 0
CDC Header:
bcdCDC 1.10
CDC ACM:
bmCapabilities 0x02
line coding and serial state
CDC Union:
bMasterInterface 0
bSlaveInterface 1
CDC Call Management:
bmCapabilities 0x00
bDataInterface 1
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x83 EP 3 IN
bmAttributes 3
Transfer Type Interrupt
Synch Type None
Usage Type Data
wMaxPacketSize 0x0040 1x 64 bytes
bInterval 10
Interface Descriptor:
bLength 9
bDescriptorType 4
bInterfaceNumber 1
bAlternateSetting 0
bNumEndpoints 2
bInterfaceClass 10 CDC Data
bInterfaceSubClass 0 Unused
bInterfaceProtocol 0
iInterface 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x01 EP 1 OUT
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0040 1x 64 bytes
bInterval 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x82 EP 2 IN
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0040 1x 64 bytes
bInterval 0
Interface Descriptor:
bLength 9
bDescriptorType 4
bInterfaceNumber 2
bAlternateSetting 0
bNumEndpoints 3
bInterfaceClass 255 Vendor Specific Class
bInterfaceSubClass 4
bInterfaceProtocol 0
iInterface 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x04 EP 4 OUT
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0040 1x 64 bytes
bInterval 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x85 EP 5 IN
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0040 1x 64 bytes
bInterval 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x86 EP 6 IN
bmAttributes 3
Transfer Type Interrupt
Synch Type None
Usage Type Data
wMaxPacketSize 0x0040 1x 64 bytes
bInterval 10
Interface Descriptor:
bLength 9
bDescriptorType 4
bInterfaceNumber 3
bAlternateSetting 0
bNumEndpoints 0
bInterfaceClass 255 Vendor Specific Class
bInterfaceSubClass 5
bInterfaceProtocol 0
iInterface 0
Change-Id: I62f0300199da3551c8774a4a5a4cd106a3ab2904
Signed-off-by: Ricardo Ribalda Delgado <ric...@gm...>
Signed-off-by: Jiri Kastner <cz1...@gm...>
Reviewed-on: http://openocd.zylin.com/3611
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/contrib/60-openocd.rules b/contrib/60-openocd.rules
index fe57364d7..b886df50b 100644
--- a/contrib/60-openocd.rules
+++ b/contrib/60-openocd.rules
@@ -81,6 +81,9 @@ ATTRS{idVendor}=="0483", ATTRS{idProduct}=="374e", MODE="660", GROUP="plugdev",
ATTRS{idVendor}=="0483", ATTRS{idProduct}=="374f", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3753", MODE="660", GROUP="plugdev", TAG+="uaccess"
+# Cypress SuperSpeed Explorer Kit
+ATTRS{idVendor}=="04b4", ATTRS{idProduct}=="0007", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
# Cypress KitProg in KitProg mode
ATTRS{idVendor}=="04b4", ATTRS{idProduct}=="f139", MODE="660", GROUP="plugdev", TAG+="uaccess"
-----------------------------------------------------------------------
Summary of changes:
contrib/60-openocd.rules | 3 +++
src/target/target.c | 1 +
2 files changed, 4 insertions(+)
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From: OpenOCD-Gerrit <ope...@us...> - 2021-01-08 10:24:56
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
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via f67d7a3c48fcb21c735c7d28c060c875adb9b836 (commit)
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commit d4bf20756647c0b74f99ad888bbd65176819248f
Author: Antonio Borneo <bor...@gm...>
Date: Wed Dec 23 19:15:02 2020 +0100
Makefile.am: fix override of target 'check-recursive'
To prevent executing the Jim Tcl tests, the makefile's target
'check-recursive' has been overridden in commit 56d163ce7951
("jimtcl: update to 0.77, the current version, enable only
specific modules").
This causes a runtime warning during build:
Makefile:6332: warning: overriding recipe for target 'check-recursive'
Makefile:5098: warning: ignoring old recipe for target 'check-recursive'
Instead of override the makefile's target 'check-recursive',
prevent the recursion by re-assigning as empty the variable
SUBDIRS for this specific target only.
Change-Id: I03d1c467eba42316a59aeed4612d6bdbe6211282
Signed-off-by: Antonio Borneo <bor...@gm...>
Fixes: 56d163ce7951 ("jimtcl: update to 0.77, the current version, enable only specific modules")
Reviewed-on: http://openocd.zylin.com/5986
Tested-by: jenkins
diff --git a/Makefile.am b/Makefile.am
index 7a718d769..c1de02da0 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -6,8 +6,7 @@ AUTOMAKE_OPTIONS = gnu 1.6
DISTCHECK_CONFIGURE_FLAGS = --disable-install-jim
# do not run Jim Tcl tests (esp. during distcheck)
-check-recursive:
- @true
+check-recursive: SUBDIRS :=
nobase_dist_pkgdata_DATA = \
contrib/libdcc/dcc_stdio.c \
commit f67d7a3c48fcb21c735c7d28c060c875adb9b836
Author: Paul Fertser <fer...@gm...>
Date: Wed Dec 23 23:28:52 2020 +0300
contrib: rpc_examples: haskell: fix ftbs with current libraries
And get rid of some warnings along the way.
Change-Id: I8fdbe1fa304276be6b0f25249b902b3576aa3793
Signed-off-by: Paul Fertser <fer...@gm...>
Reviewed-on: http://openocd.zylin.com/5987
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/contrib/rpc_examples/ocdrpc.hs b/contrib/rpc_examples/ocdrpc.hs
index 9a80cdd84..859864131 100644
--- a/contrib/rpc_examples/ocdrpc.hs
+++ b/contrib/rpc_examples/ocdrpc.hs
@@ -16,13 +16,11 @@
module Main where
import Prelude
-import Control.Applicative
import Network.Socket
import System.IO.Streams.Core hiding (connect)
import System.IO.Streams.Network
import System.IO.Streams.Attoparsec
import Data.Attoparsec.ByteString.Char8
-import Data.Attoparsec.Combinator
import Data.ByteString.Char8 hiding (putStrLn, concat, map)
import Text.Printf
@@ -38,15 +36,14 @@ mdwParser = (manyTill anyChar (string ": ") *>
`sepBy` string " \n"
ocdMdw :: (InputStream ByteString, OutputStream ByteString) -> Integer -> Integer -> IO [Integer]
-ocdMdw s start count = do
- s <- ocdExec s $ "mdw " ++ show start ++ " " ++ show count
- case parseOnly mdwParser (pack s) of
+ocdMdw s start qnt = do
+ res <- ocdExec s $ "mdw " ++ show start ++ " " ++ show qnt
+ case parseOnly mdwParser (pack res) of
Right r -> return $ concat r
main = do
osock <- socket AF_INET Stream defaultProtocol
- haddr <- inet_addr "127.0.0.1"
- connect osock (SockAddrInet 6666 haddr)
+ connect osock (SockAddrInet 6666 $ tupleToHostAddress (127,0,0,1))
ostreams <- socketToStreams osock
putStrLn "Halting the target, full log output captured:"
ocdExec ostreams "capture \"halt\"" >>= putStrLn
-----------------------------------------------------------------------
Summary of changes:
Makefile.am | 3 +--
contrib/rpc_examples/ocdrpc.hs | 11 ++++-------
2 files changed, 5 insertions(+), 9 deletions(-)
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From: OpenOCD-Gerrit <ope...@us...> - 2021-01-08 10:24:22
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commit b5098754cfaa7e58e36816f89e6d219a1d5db54c
Author: Paul Fertser <fer...@gm...>
Date: Fri Jan 1 14:37:56 2021 +0300
doc: fix over/underfull hboxes in PDF
This adds some cosmetic changes to make the PDF User Manual look
proper.
Building it now requires Texinfo 5.0 which shouldn't be problematic
according to [0]. Commit 79fdeb37f486f74658f1eaf658abac8efb3eba6a is
effectively reverted.
[0] https://repology.org/project/texinfo/versions
Change-Id: I990bc23bdb53d24c302b26d74fd770ea738e4096
Signed-off-by: Paul Fertser <fer...@gm...>
Reviewed-on: http://openocd.zylin.com/5995
Reviewed-by: Jonathan McDowell <noo...@ea...>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/README b/README
index 900324ab1..ed0a85856 100644
--- a/README
+++ b/README
@@ -216,7 +216,7 @@ Additionally, for building from git:
- autoconf >= 2.64
- automake >= 1.14
-- texinfo
+- texinfo >= 5.0
USB-based adapters depend on libusb-1.0 and some older drivers require
libusb-0.1 or libusb-compat-0.1. A compatible implementation, such as
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 9e060b383..2658c75ea 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -4547,8 +4547,10 @@ The current implementation supports three JTAG TAP cores:
@end itemize
And two debug interfaces cores:
@itemize @minus
-@item @code{Advanced debug interface} (See: @url{http://opencores.org/project@comma{}adv_debug_sys})
-@item @code{SoC Debug Interface} (See: @url{http://opencores.org/project@comma{}dbg_interface})
+@item @code{Advanced debug interface}
+@*(See: @url{http://opencores.org/project@comma{}adv_debug_sys})
+@item @code{SoC Debug Interface}
+@*(See: @url{http://opencores.org/project@comma{}dbg_interface})
@end itemize
@item @code{quark_d20xx} -- an Intel Quark D20xx core.
@item @code{quark_x10xx} -- an Intel Quark X10xx core.
@@ -5616,8 +5618,10 @@ is attempted. If this fails or gives inappropriate results, manual setting is
required (see 'set' command).
@example
-flash bank $_FLASHNAME stmqspi 0x90000000 0 0 0 $_TARGETNAME 0xA0001000
-flash bank $_FLASHNAME stmqspi 0x70000000 0 0 0 $_TARGETNAME 0xA0001400
+flash bank $_FLASHNAME stmqspi 0x90000000 0 0 0 \
+ $_TARGETNAME 0xA0001000
+flash bank $_FLASHNAME stmqspi 0x70000000 0 0 0 \
+ $_TARGETNAME 0xA0001400
@end example
There are three specific commands
@@ -5655,11 +5659,13 @@ Note the hardware dictated subtle difference of those two cases in dual-flash mo
To check basic communication settings, issue
@example
-stmqspi cmd bank_id 0 0x04; stmqspi cmd bank_id 1 0x05; stmqspi cmd bank_id 0 0x06; stmqspi cmd bank_id 1 0x05
+stmqspi cmd bank_id 0 0x04; stmqspi cmd bank_id 1 0x05
+stmqspi cmd bank_id 0 0x06; stmqspi cmd bank_id 1 0x05
@end example
for single flash mode or
@example
-stmqspi cmd bank_id 0 0x04; stmqspi cmd bank_id 2 0x05; stmqspi cmd bank_id 0 0x06; stmqspi cmd bank_id 2 0x05
+stmqspi cmd bank_id 0 0x04; stmqspi cmd bank_id 2 0x05
+stmqspi cmd bank_id 0 0x06; stmqspi cmd bank_id 2 0x05
@end example
for dual flash mode. This should return the status register contents.
@@ -5717,9 +5723,9 @@ CS1/CS2 is routed to on the given SoC.
@example
flash bank $_FLASHNAME ath79 0xbf000000 0 0 0 $_TARGETNAME
-# When using multiple chipselects the base should be different for each,
-# otherwise the write_image command is not able to distinguish the
-# banks.
+# When using multiple chipselects the base should be different
+# for each, otherwise the write_image command is not able to
+# distinguish the banks.
flash bank flash0 ath79 0xbf000000 0 0 0 $_TARGETNAME cs0
flash bank flash1 ath79 0x10000000 0 0 0 $_TARGETNAME cs1
flash bank flash2 ath79 0x20000000 0 0 0 $_TARGETNAME cs2
@@ -5880,7 +5886,8 @@ reserved-bits are masked out and cannot be changed.
NVMUSERROW: 0xFFFFFC5DD8E0C788
# Write 0xFFFFFC5DD8E0C788 to user row
>at91samd nvmuserrow 0xFFFFFC5DD8E0C788
-# Write 0x12300 to user row but leave other bits and low byte unchanged
+# Write 0x12300 to user row but leave other bits and low
+# byte unchanged
>at91samd nvmuserrow 0x12345 0xFFF00
@end example
@end deffn
@@ -6028,8 +6035,9 @@ The reserved fields are always masked out and cannot be changed.
USER PAGE: 0xAEECFF80FE9A9239
# Write
>atsame5 userpage 0xAEECFF80FE9A9239
-# Write 2 to SEESBLK and 4 to SEEPSZ fields but leave other bits unchanged
-# (setup SmartEEPROM of virtual size 8192 bytes)
+# Write 2 to SEESBLK and 4 to SEEPSZ fields but leave other
+# bits unchanged (setup SmartEEPROM of virtual size 8192
+# bytes)
>atsame5 userpage 0x4200000000 0x7f00000000
@end example
@end deffn
@@ -6788,7 +6796,8 @@ The driver probes for a number of these chips and autoconfigures itself,
apart from the base address.
@example
-flash bank $_CHIPNAME.eeprom psoc5lp_eeprom 0x40008000 0 0 0 $_TARGETNAME
+flash bank $_CHIPNAME.eeprom psoc5lp_eeprom 0x40008000 0 0 0 \
+ $_TARGETNAME
@end example
@end deffn
@@ -6842,19 +6851,31 @@ automatically by parsing data in SPCIF_GEOMETRY register.
PSoC6 is equipped with NOR Flash so erased Flash reads as 0x00.
@example
-flash bank main_flash_cm0 psoc6 0x10000000 0 0 0 $@{TARGET@}.cm0
-flash bank work_flash_cm0 psoc6 0x14000000 0 0 0 $@{TARGET@}.cm0
-flash bank super_flash_user_cm0 psoc6 0x16000800 0 0 0 $@{TARGET@}.cm0
-flash bank super_flash_nar_cm0 psoc6 0x16001A00 0 0 0 $@{TARGET@}.cm0
-flash bank super_flash_key_cm0 psoc6 0x16005A00 0 0 0 $@{TARGET@}.cm0
-flash bank super_flash_toc2_cm0 psoc6 0x16007C00 0 0 0 $@{TARGET@}.cm0
-
-flash bank main_flash_cm4 psoc6 0x10000000 0 0 0 $@{TARGET@}.cm4
-flash bank work_flash_cm4 psoc6 0x14000000 0 0 0 $@{TARGET@}.cm4
-flash bank super_flash_user_cm4 psoc6 0x16000800 0 0 0 $@{TARGET@}.cm4
-flash bank super_flash_nar_cm4 psoc6 0x16001A00 0 0 0 $@{TARGET@}.cm4
-flash bank super_flash_key_cm4 psoc6 0x16005A00 0 0 0 $@{TARGET@}.cm4
-flash bank super_flash_toc2_cm4 psoc6 0x16007C00 0 0 0 $@{TARGET@}.cm4
+flash bank main_flash_cm0 psoc6 0x10000000 0 0 0 \
+ $@{TARGET@}.cm0
+flash bank work_flash_cm0 psoc6 0x14000000 0 0 0 \
+ $@{TARGET@}.cm0
+flash bank super_flash_user_cm0 psoc6 0x16000800 0 0 0 \
+ $@{TARGET@}.cm0
+flash bank super_flash_nar_cm0 psoc6 0x16001A00 0 0 0 \
+ $@{TARGET@}.cm0
+flash bank super_flash_key_cm0 psoc6 0x16005A00 0 0 0 \
+ $@{TARGET@}.cm0
+flash bank super_flash_toc2_cm0 psoc6 0x16007C00 0 0 0 \
+ $@{TARGET@}.cm0
+
+flash bank main_flash_cm4 psoc6 0x10000000 0 0 0 \
+ $@{TARGET@}.cm4
+flash bank work_flash_cm4 psoc6 0x14000000 0 0 0 \
+ $@{TARGET@}.cm4
+flash bank super_flash_user_cm4 psoc6 0x16000800 0 0 0 \
+ $@{TARGET@}.cm4
+flash bank super_flash_nar_cm4 psoc6 0x16001A00 0 0 0 \
+ $@{TARGET@}.cm4
+flash bank super_flash_key_cm4 psoc6 0x16005A00 0 0 0 \
+ $@{TARGET@}.cm4
+flash bank super_flash_toc2_cm4 psoc6 0x16007C00 0 0 0 \
+ $@{TARGET@}.cm4
@end example
psoc6-specific commands
@@ -7110,7 +7131,8 @@ will be touched).
Example usage:
@example
-# swap bank 1 and bank 2 in dual bank devices, by setting SWAP_BANK_OPT bit in OPTSR_PRG
+# swap bank 1 and bank 2 in dual bank devices
+# by setting SWAP_BANK_OPT bit in OPTSR_PRG
stm32h7x option_write 0 0x20 0x8000000 0x8000000
@end example
@end deffn
@@ -10069,7 +10091,7 @@ Perform a 32-bit DMI write of value at address.
Synopsys DesignWare ARC Processors are a family of 32-bit CPUs that SoC
designers can optimize for a wide range of uses, from deeply embedded to
high-performance host applications in a variety of market segments. See more
-at: http://www.synopsys.com/IP/ProcessorIP/ARCProcessors/Pages/default.aspx.
+at: @url{http://www.synopsys.com/IP/ProcessorIP/ARCProcessors/Pages/default.aspx}.
OpenOCD currently supports ARC EM processors.
There is a set ARC-specific OpenOCD commands that allow low-level
access to the core and provide necessary support for ARC extensibility and
@@ -10681,7 +10703,8 @@ target remote localhost:3333
@item
A pipe connection is typically started as follows:
@example
-target extended-remote | openocd -c "gdb_port pipe; log_output openocd.log"
+target extended-remote | \
+ openocd -c "gdb_port pipe; log_output openocd.log"
@end example
This would cause GDB to run OpenOCD and communicate using pipes (stdin/stdout).
Using this method has the advantage of GDB starting/stopping OpenOCD for the debug
@@ -10895,17 +10918,11 @@ Cyg_Thread::thread_list, Cyg_Scheduler_Base::current_thread.
@item ThreadX symbols
_tx_thread_current_ptr, _tx_thread_created_ptr, _tx_thread_created_count.
@item FreeRTOS symbols
-@c The following is taken from recent texinfo to provide compatibility
-@c with ancient versions that do not support @raggedright
-@tex
-\begingroup
-\rightskip0pt plus2em \spaceskip.3333em \xspaceskip.5em\relax
+@raggedright
pxCurrentTCB, pxReadyTasksLists, xDelayedTaskList1, xDelayedTaskList2,
pxDelayedTaskList, pxOverflowDelayedTaskList, xPendingReadyList,
uxCurrentNumberOfTasks, uxTopUsedPriority.
-\par
-\endgroup
-@end tex
+@end raggedright
@item linux symbols
init_task.
@item ChibiOS symbols
@@ -10916,11 +10933,14 @@ Rtos::sListSuspended, Rtos::sMaxPriorities, Rtos::sCurrentTaskCount.
@item mqx symbols
_mqx_kernel_data, MQX_init_struct.
@item uC/OS-III symbols
-OSRunning, OSTCBCurPtr, OSTaskDbgListPtr, OSTaskQty
+OSRunning, OSTCBCurPtr, OSTaskDbgListPtr, OSTaskQty.
@item nuttx symbols
-g_readytorun, g_tasklisttable
+g_readytorun, g_tasklisttable.
@item RIOT symbols
-sched_threads, sched_num_threads, sched_active_pid, max_threads, _tcb_name_offset
+@raggedright
+sched_threads, sched_num_threads, sched_active_pid, max_threads,
+_tcb_name_offset.
+@end raggedright
@end table
For most RTOS supported the above symbols will be exported by default. However for
commit cc79bcd5871669af7070f71c77369492f07cf614
Author: Antonio Borneo <bor...@gm...>
Date: Tue Dec 29 02:04:25 2020 +0100
configure.ac: fix build with libusb0 and without libusb1
Driver 'openjtag' requires both libftdi and libusb1.
The current check is incorrect and the driver is built when
libftdi is present with libusb0 and without libusb1, which causes
the linker to fail resolving the required libusb1 symbols.
Remove the check for libusb0 on driver 'openjtag'.
Create a new adapters group LIBFTDI_USB1_ADAPTERS to hold the
driver 'openjtag'.
Change-Id: I1f5e554b519e51c829d116ede894639cb55a26aa
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/5989
Tested-by: jenkins
diff --git a/configure.ac b/configure.ac
index baa198730..012486666 100644
--- a/configure.ac
+++ b/configure.ac
@@ -138,8 +138,10 @@ m4_define([HIDAPI_USB1_ADAPTERS],
m4_define([LIBFTDI_ADAPTERS],
[[[usb_blaster], [Altera USB-Blaster Compatible], [USB_BLASTER]],
- [[presto], [ASIX Presto Adapter], [PRESTO]],
- [[openjtag], [OpenJTAG Adapter], [OPENJTAG]]])
+ [[presto], [ASIX Presto Adapter], [PRESTO]]])
+
+m4_define([LIBFTDI_USB1_ADAPTERS],
+ [[[openjtag], [OpenJTAG Adapter], [OPENJTAG]]])
m4_define([LIBGPIOD_ADAPTERS],
[[[linuxgpiod], [Linux GPIO bitbang through libgpiod], [LINUXGPIOD]]])
@@ -250,6 +252,7 @@ AC_ARG_ADAPTERS([
HIDAPI_ADAPTERS,
HIDAPI_USB1_ADAPTERS,
LIBFTDI_ADAPTERS,
+ LIBFTDI_USB1_ADAPTERS
LIBGPIOD_ADAPTERS,
LIBJAYLINK_ADAPTERS
],[auto])
@@ -723,16 +726,10 @@ PROCESS_ADAPTERS([USB0_ADAPTERS], ["x$use_libusb0" = "xyes"], [libusb-0.1])
PROCESS_ADAPTERS([HIDAPI_ADAPTERS], ["x$use_hidapi" = "xyes"], [hidapi])
PROCESS_ADAPTERS([HIDAPI_USB1_ADAPTERS], ["x$use_hidapi" = "xyes" -a "x$use_libusb1" = "xyes"], [hidapi and libusb-1.x])
PROCESS_ADAPTERS([LIBFTDI_ADAPTERS], ["x$use_libftdi" = "xyes"], [libftdi])
+PROCESS_ADAPTERS([LIBFTDI_USB1_ADAPTERS], ["x$use_libftdi" = "xyes" -a "x$use_libusb1" = "xyes"], [libftdi and libusb-1.x])
PROCESS_ADAPTERS([LIBGPIOD_ADAPTERS], ["x$use_libgpiod" = "xyes"], [libgpiod])
PROCESS_ADAPTERS([LIBJAYLINK_ADAPTERS], ["x$use_internal_libjaylink" = "xyes" -o "x$use_libjaylink" = "xyes"], [libjaylink-0.2])
-AS_IF([test "x$build_openjtag" = "xyes"], [
- AS_IF([test "x$use_libusb1" != "xyes" -a "x$use_libusb0" != "xyes"], [
- AC_MSG_ERROR([libusb-1.x or libusb-0.1 is required for the OpenJTAG Programmer])
- build_openjtag=no
- ])
-])
-
AS_IF([test "x$enable_linuxgpiod" != "xno"], [
build_bitbang=yes
])
@@ -868,6 +865,7 @@ echo OpenOCD configuration summary
echo --------------------------------------------------
m4_foreach([adapter], [USB1_ADAPTERS, USB0_ADAPTERS,
HIDAPI_ADAPTERS, HIDAPI_USB1_ADAPTERS, LIBFTDI_ADAPTERS,
+ LIBFTDI_USB1_ADAPTERS,
LIBGPIOD_ADAPTERS,
LIBJAYLINK_ADAPTERS, PCIE_ADAPTERS,
OPTIONAL_LIBRARIES],
commit 2c82d9ea7dfdb0fd90e7ac5f303d2189508cd939
Author: Paul Fertser <fer...@gm...>
Date: Wed Dec 23 20:49:56 2020 +0300
configure: do not make Capstone dependency automagic
This adds regular ./configure options to control dependency on the
Capstone disassembly engine. See [0] for the rationale.
[0] https://wiki.gentoo.org/wiki/Project:Quality_Assurance/Automagic_dependencies
Change-Id: I3e16dc5255d650aa1949ccf896b26dc96e522a75
Signed-off-by: Paul Fertser <fer...@gm...>
Reviewed-on: http://openocd.zylin.com/5985
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/configure.ac b/configure.ac
index 236d6bc28..baa198730 100644
--- a/configure.ac
+++ b/configure.ac
@@ -150,6 +150,8 @@ m4_define([LIBJAYLINK_ADAPTERS],
m4_define([PCIE_ADAPTERS],
[[[xlnx_pcie_xvc], [Xilinx XVC/PCIe], [XLNX_PCIE_XVC]]])
+m4_define([OPTIONAL_LIBRARIES],
+ [[[capstone], [Use Capstone disassembly framework], []]])
AC_ARG_ENABLE([doxygen-html],
AS_HELP_STRING([--disable-doxygen-html],
@@ -653,13 +655,24 @@ PKG_CHECK_MODULES([LIBUSB1], [libusb-1.0], [
PKG_CHECK_MODULES([LIBUSB0], [libusb], [use_libusb0=yes], [use_libusb0=no])
-PKG_CHECK_MODULES([CAPSTONE], [capstone], [have_capstone=yes],
- [have_capstone=no])
+AC_ARG_WITH([capstone],
+ AS_HELP_STRING([--with-capstone], [Use Capstone disassembly library (default=auto)])
+ , [
+ enable_capstone=$withval
+ ], [
+ enable_capstone=auto
+])
-AS_IF([test "x$have_capstone" = "xyes"], [
- AC_DEFINE([HAVE_CAPSTONE], [1], [1 if you have captone disassembly framework.])
-], [
- AC_DEFINE([HAVE_CAPSTONE], [0], [0 if you don't have captone disassembly framework.])
+AS_IF([test "x$enable_capstone" != xno], [
+ PKG_CHECK_MODULES([CAPSTONE], [capstone], [
+ AC_DEFINE([HAVE_CAPSTONE], [1], [1 if you have Capstone disassembly framework.])
+ ], [
+ AC_DEFINE([HAVE_CAPSTONE], [0], [0 if you don't have Capstone disassembly framework.])
+ if test "x$enable_capstone" != xauto; then
+ AC_MSG_ERROR([--with-capstone was given, but test for Capstone failed])
+ fi
+ enable_capstone=no
+ ])
])
for hidapi_lib in hidapi hidapi-hidraw hidapi-libusb; do
@@ -785,7 +798,7 @@ AM_CONDITIONAL([USE_LIBGPIOD], [test "x$use_libgpiod" = "xyes"])
AM_CONDITIONAL([USE_HIDAPI], [test "x$use_hidapi" = "xyes"])
AM_CONDITIONAL([USE_LIBJAYLINK], [test "x$use_libjaylink" = "xyes"])
AM_CONDITIONAL([RSHIM], [test "x$build_rshim" = "xyes"])
-AM_CONDITIONAL([HAVE_CAPSTONE], [test "x$have_capstone" = "xyes"])
+AM_CONDITIONAL([HAVE_CAPSTONE], [test "x$enable_capstone" != "xno"])
AM_CONDITIONAL([MINIDRIVER], [test "x$build_minidriver" = "xyes"])
AM_CONDITIONAL([MINIDRIVER_DUMMY], [test "x$build_minidriver_dummy" = "xyes"])
@@ -856,7 +869,8 @@ echo --------------------------------------------------
m4_foreach([adapter], [USB1_ADAPTERS, USB0_ADAPTERS,
HIDAPI_ADAPTERS, HIDAPI_USB1_ADAPTERS, LIBFTDI_ADAPTERS,
LIBGPIOD_ADAPTERS,
- LIBJAYLINK_ADAPTERS, PCIE_ADAPTERS],
+ LIBJAYLINK_ADAPTERS, PCIE_ADAPTERS,
+ OPTIONAL_LIBRARIES],
[s=m4_format(["%-40s"], ADAPTER_DESC([adapter]))
AS_CASE([$ADAPTER_VAR([adapter])],
[auto], [
-----------------------------------------------------------------------
Summary of changes:
README | 2 +-
configure.ac | 46 +++++++++++++++----------
doc/openocd.texi | 100 +++++++++++++++++++++++++++++++++----------------------
3 files changed, 90 insertions(+), 58 deletions(-)
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|
This is an automated email from the git hooks/post-receive script. It was
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- Log -----------------------------------------------------------------
commit c69b4deae36a7bcbab5df80ec2a5dbfd652e25ac
Author: Antonio Borneo <bor...@gm...>
Date: Sat Dec 19 22:31:29 2020 +0100
gdb_server: fix HW thread status at gdb attach
At gdb attach, the event TARGET_EVENT_GDB_ATTACH is in charge of
halting the target.
For HW thread, rtos_update_threads() should be called after the
event to detect and record the new 'halted' status. Instead it is
called immediately before the event, thus reading the status
before the halt.
Move after the event the call to rtos_update_threads().
Change-Id: Iab3480ea0f5283ed6580f0f6c11200083197d1e9
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/5983
Tested-by: jenkins
diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c
index c1e90a04a..9e44287fd 100644
--- a/src/server/gdb_server.c
+++ b/src/server/gdb_server.c
@@ -969,15 +969,6 @@ static int gdb_new_connection(struct connection *connection)
breakpoint_clear_target(target);
watchpoint_clear_target(target);
- if (target->rtos) {
- /* clean previous rtos session if supported*/
- if (target->rtos->type->clean)
- target->rtos->type->clean(target);
-
- /* update threads */
- rtos_update_threads(target);
- }
-
/* remove the initial ACK from the incoming buffer */
retval = gdb_get_char(connection, &initial_ack);
if (retval != ERROR_OK)
@@ -990,6 +981,15 @@ static int gdb_new_connection(struct connection *connection)
gdb_putback_char(connection, initial_ack);
target_call_event_callbacks(target, TARGET_EVENT_GDB_ATTACH);
+ if (target->rtos) {
+ /* clean previous rtos session if supported*/
+ if (target->rtos->type->clean)
+ target->rtos->type->clean(target);
+
+ /* update threads */
+ rtos_update_threads(target);
+ }
+
if (gdb_use_memory_map) {
/* Connect must fail if the memory map can't be set up correctly.
*
commit 7f74906c2d18a2347ec392f9a457963bff3f25b8
Author: Antonio Borneo <bor...@gm...>
Date: Sat Dec 19 16:15:54 2020 +0100
gdb_server: minor fix for indentation
Use a TAB in place of 4 spaces
Change-Id: Ic34b7c3ef24078d2c36a193d4dd079bca5a7ef2e
Signed-off-by: Antonio Borneo <bor...@gm...>
Fixes: a4cdce0129a6 ("gdb_server: prevent false positive valgrind report")
Reviewed-on: http://openocd.zylin.com/5982
Tested-by: jenkins
Reviewed-by: Jonathan McDowell <noo...@ea...>
diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c
index 792bbdcea..c1e90a04a 100644
--- a/src/server/gdb_server.c
+++ b/src/server/gdb_server.c
@@ -2516,7 +2516,7 @@ static int gdb_get_thread_list_chunk(struct target *target, char **thread_list,
transfer_type = 'l';
*chunk = malloc(length + 2 + 3);
- /* Allocating extra 3 bytes prevents false positive valgrind report
+ /* Allocating extra 3 bytes prevents false positive valgrind report
* of strlen(chunk) word access:
* Invalid read of size 4
* Address 0x4479934 is 44 bytes inside a block of size 45 alloc'd */
commit 433e37f02f6a38a3905b84f2aac12fdd66045137
Author: Antonio Borneo <bor...@gm...>
Date: Sat Dec 19 15:44:41 2020 +0100
rtos/hwthread: fix register list for armv7a
The targets armv7a in file cortex_a.c inherit the register list
from file armv4_5.c thus, depending on the core status, some
register get marked as not existing.
For HW threads other than current target, the registers in the
list are not checked for existence and are all forwarded to GDB
that in turns complains for too many data:
Remote 'g' packet reply is too long (expected 68 bytes, got 104 bytes)
Check all the attributes of the registers and pass to GDB only the
valid registers.
To test it, use a SMP cortex-a target (2 cores are enough) and add
-rtos hwthread
to all the cores. Connect GDB to OpenOCD and issue the GDB command
info threads
Change-Id: Ie66119fe83a3c8d53e9d18dda39e60fd97769669
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/5981
Tested-by: jenkins
diff --git a/src/rtos/hwthread.c b/src/rtos/hwthread.c
index 850b93223..e2d1ccf13 100644
--- a/src/rtos/hwthread.c
+++ b/src/rtos/hwthread.c
@@ -237,23 +237,35 @@ static int hwthread_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
if (!target_was_examined(curr))
return ERROR_FAIL;
+ int reg_list_size;
struct reg **reg_list;
- int retval = target_get_gdb_reg_list(curr, ®_list, rtos_reg_list_size,
+ int retval = target_get_gdb_reg_list(curr, ®_list, ®_list_size,
REG_CLASS_GENERAL);
if (retval != ERROR_OK)
return retval;
+ int j = 0;
+ for (int i = 0; i < reg_list_size; i++) {
+ if (reg_list[i] == NULL || reg_list[i]->exist == false || reg_list[i]->hidden)
+ continue;
+ j++;
+ }
+ *rtos_reg_list_size = j;
*rtos_reg_list = calloc(*rtos_reg_list_size, sizeof(struct rtos_reg));
if (*rtos_reg_list == NULL) {
free(reg_list);
return ERROR_FAIL;
}
- for (int i = 0; i < *rtos_reg_list_size; i++) {
- (*rtos_reg_list)[i].number = (*reg_list)[i].number;
- (*rtos_reg_list)[i].size = (*reg_list)[i].size;
- memcpy((*rtos_reg_list)[i].value, (*reg_list)[i].value,
+ j = 0;
+ for (int i = 0; i < reg_list_size; i++) {
+ if (reg_list[i] == NULL || reg_list[i]->exist == false || reg_list[i]->hidden)
+ continue;
+ (*rtos_reg_list)[j].number = (*reg_list)[i].number;
+ (*rtos_reg_list)[j].size = (*reg_list)[i].size;
+ memcpy((*rtos_reg_list)[j].value, (*reg_list)[i].value,
((*reg_list)[i].size + 7) / 8);
+ j++;
}
free(reg_list);
commit 6090390a23158b1463be3ffc8ac5731843b73586
Author: Jiri Kastner <cz1...@gm...>
Date: Wed Dec 16 20:51:06 2020 +0100
tcl/target/rk3308.cfg: add defer-examine
only core0 is brought up by bootloader
Change-Id: I1d6b5e6ba7498beadbf3805f4271f0197e411bd5
Signed-off-by: Jiri Kastner <cz1...@gm...>
Reviewed-on: http://openocd.zylin.com/5980
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
Reviewed-by: Jonathan McDowell <noo...@ea...>
diff --git a/tcl/target/rk3308.cfg b/tcl/target/rk3308.cfg
index b55109312..7f957da06 100644
--- a/tcl/target/rk3308.cfg
+++ b/tcl/target/rk3308.cfg
@@ -28,7 +28,7 @@ swd newdap $_CHIPNAME cpu -expected-id $_DAP_TAPID -ignore-version
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
target create $_CHIPNAME.ahb mem_ap -dap $_CHIPNAME.dap -ap-num 0
-# declare the 8 main application cores
+# declare the 4 main application cores
set _TARGETNAME $_CHIPNAME.core
set _smp_command ""
@@ -53,6 +53,7 @@ for { set _core 0 } { $_core < $_cores } { incr _core 1 } {
if { $_core != 0 } {
set _smp_command "$_smp_command ${_TARGETNAME}$_core"
+ set _command "$_command -defer-examine"
} else {
# uncomment to use hardware threads pseudo rtos
# set _command "$_command -rtos hwthread"
commit ed73398eb0b4ce6db63e5cec447ab052d084261a
Author: Antonio Borneo <bor...@gm...>
Date: Wed Dec 2 22:04:12 2020 +0100
cortex-a: fix reset on dapdirect transports
The target code for assert reset on cortex_a has been patched on
commit b0698501b0e7 ("cortex_a: fix cortex_a_assert_reset() if
srst_gates_jtag") then in cdba6ba0ad63 ("cortex_a: fix reset for
SWD transport") to workaround the mismatch between jtag and swd
implementations. See discussion for the second patch at
http://openocd.zylin.com/3641/
While all of these mismatches should hopefully be cleaned by the
reset framework rework, an extension of the workaround of the
second patch is required for dapdirect transports, either
dapdirect_swd and dapdirect_jtag.
Extend the existing workaround to all non-jtag transports.
Change-Id: Ia6a9d43bab524cbb3de4c37ce24c45f25187353d
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/5979
Tested-by: jenkins
diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index f39fd9b2b..d27c298b6 100644
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -1681,10 +1681,10 @@ static int cortex_a_assert_reset(struct target *target)
*/
/*
- * FIXME: fix reset when transport is SWD. This is a temporary
+ * FIXME: fix reset when transport is not JTAG. This is a temporary
* work-around for release v0.10 that is not intended to stay!
*/
- if (transport_is_swd() ||
+ if (!transport_is_jtag() ||
(target->reset_halt && (jtag_get_reset_config() & RESET_SRST_NO_GATING)))
adapter_assert_reset();
-----------------------------------------------------------------------
Summary of changes:
src/rtos/hwthread.c | 22 +++++++++++++++++-----
src/server/gdb_server.c | 20 ++++++++++----------
src/target/cortex_a.c | 4 ++--
tcl/target/rk3308.cfg | 3 ++-
4 files changed, 31 insertions(+), 18 deletions(-)
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From: OpenOCD-Gerrit <ope...@us...> - 2020-12-26 15:48:45
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This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
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commit 722f5797069bc233c8e1b71bdab283766d6be9b3
Author: Antonio Borneo <bor...@gm...>
Date: Mon Dec 14 17:08:06 2020 +0100
armv7m_trace: stop getting traces from adapter at exit
If OpenOCD is reading trace data from the target, at exit it
should stop the adapter to gather data, but should left the target
still producing them.
Add a helper in armv7m_trace to disable the adapter's trace and
call it during OpenOCD teardown.
This also provides a workaround for an issue in the firmware of
ST-Link V3 till version V3J7. If the SWD connection is closed when
trace is active, at following connection the trace does not work
anymore.
Change-Id: I47ccab61405384938555096c5aca789eaa090d27
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/5978
Reviewed-by: Jonathan McDowell <noo...@ea...>
Tested-by: jenkins
diff --git a/src/target/armv7m_trace.c b/src/target/armv7m_trace.c
index 916d1a164..10f14221d 100644
--- a/src/target/armv7m_trace.c
+++ b/src/target/armv7m_trace.c
@@ -234,6 +234,21 @@ static int trace_connection_closed(struct connection *connection)
return ERROR_OK;
}
+extern struct command_context *global_cmd_ctx;
+
+int armv7m_trace_tpiu_exit(struct target *target)
+{
+ struct armv7m_common *armv7m = target_to_armv7m(target);
+
+ if (global_cmd_ctx->mode == COMMAND_CONFIG ||
+ armv7m->trace_config.config_type == TRACE_CONFIG_TYPE_DISABLED)
+ return ERROR_OK;
+
+ close_trace_channel(armv7m);
+ armv7m->trace_config.config_type = TRACE_CONFIG_TYPE_DISABLED;
+ return armv7m_trace_tpiu_config(target);
+}
+
COMMAND_HANDLER(handle_tpiu_config_command)
{
struct target *target = get_current_target(CMD_CTX);
diff --git a/src/target/armv7m_trace.h b/src/target/armv7m_trace.h
index 076f9d582..cdf79e74c 100644
--- a/src/target/armv7m_trace.h
+++ b/src/target/armv7m_trace.h
@@ -95,6 +95,10 @@ extern const struct command_registration armv7m_trace_command_handlers[];
* Configure hardware accordingly to the current TPIU target settings
*/
int armv7m_trace_tpiu_config(struct target *target);
+/**
+ * Disable TPIU data gathering at exit
+ */
+int armv7m_trace_tpiu_exit(struct target *target);
/**
* Configure hardware accordingly to the current ITM target settings
*/
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 316089c35..ac308b43b 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -1648,6 +1648,8 @@ void cortex_m_deinit_target(struct target *target)
{
struct cortex_m_common *cortex_m = target_to_cm(target);
+ armv7m_trace_tpiu_exit(target);
+
free(cortex_m->fp_comparator_list);
cortex_m_dwt_free(target);
commit 88592cc1a194b48946abc29503c57a6020b791e7
Author: Jonathan McDowell <no...@ea...>
Date: Sun Dec 13 10:28:56 2020 +0000
LICENSES: Update GFDL invariant text to match official wording
This was flagged by lintian against the Debian package; the text stating
there are no invariant sections deviates from the official GNU wording.
Update it to match the text at the bottom of:
https://www.gnu.org/licenses/old-licenses/fdl-1.2.en.html
Change-Id: Ie222237a8eede24c1b71218b05e1513b74208a47
Signed-off-by: Jonathan McDowell <no...@ea...>
Reviewed-on: http://openocd.zylin.com/5974
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 670d97040..9e060b383 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -30,9 +30,9 @@ of the Open On-Chip Debugger (OpenOCD).
Permission is granted to copy, distribute and/or modify this document
under the terms of the GNU Free Documentation License, Version 1.2 or
any later version published by the Free Software Foundation; with no
-Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
-Texts. A copy of the license is included in the section entitled ``GNU
-Free Documentation License''.
+Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. A
+copy of the license is included in the section entitled ``GNU Free
+Documentation License''.
@end quotation
@end copying
commit 4fc0f3530c5133ac76b1659d3da55970a32bea94
Author: Antonio Borneo <bor...@gm...>
Date: Mon Dec 7 22:51:46 2020 +0100
Makefile.am: fix non-POSIX warning from automake
Automake issues a warning
Makefile.am:46: warning: wildcard $(srcdir: non-POSIX variable name
Makefile.am:46: (probably a GNU make extension)
because the GNU make function 'wildcard' is not POSIX.
Also the GNU make function 'shell' triggers a similar warning.
Use the POSIX extension '!=', that executes an arbitrary shell
command, to replace the GNU make 'wildcard'.
Don't include the file 'NEWS' because automake already includes it
by default.
Change-Id: Ice560c3789cec4f3f2197a255d6f5af7b1fde634
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/5965
Tested-by: jenkins
Reviewed-by: Jonathan McDowell <noo...@ea...>
diff --git a/Makefile.am b/Makefile.am
index 930a30733..7a718d769 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -43,13 +43,14 @@ if INTERNAL_JIMTCL
AM_CPPFLAGS += -I$(top_srcdir)/jimtcl \
-I$(top_builddir)/jimtcl
endif
+EXTRA_DIST_NEWS != ls $(srcdir)/NEWS-*
EXTRA_DIST += \
BUGS \
HACKING \
NEWTAPS \
README.Windows \
README.OSX \
- $(wildcard $(srcdir)/NEWS*) \
+ $(EXTRA_DIST_NEWS) \
Doxyfile.in \
tools/logger.pl \
tools/rlink_make_speed_table \
commit 4bc8fd24fb7670065fb4fb0077217d0b8cbcfa45
Author: Luca Lindhorst <l.l...@wu...>
Date: Thu Dec 3 12:34:41 2020 +0100
Correct warning message
The warning message regarding wrong verification checksum for LPC2000, claims that the verification will fail, but the checksum written correctly by openocd. Clarify this in the warning message.
Change-Id: I929ac767f7f9fdad9bace250c8c04a776462800a
Signed-off-by: Luca Lindhorst <l.l...@wu...>
Reviewed-on: http://openocd.zylin.com/5956
Tested-by: jenkins
Reviewed-by: Jonathan McDowell <noo...@ea...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/flash/nor/lpc2000.c b/src/flash/nor/lpc2000.c
index 942ef555c..3ad62d669 100644
--- a/src/flash/nor/lpc2000.c
+++ b/src/flash/nor/lpc2000.c
@@ -1103,9 +1103,9 @@ static int lpc2000_write(struct flash_bank *bank, const uint8_t *buffer, uint32_
uint32_t original_value = buf_get_u32(buffer + (lpc2000_info->checksum_vector * 4), 0, 32);
if (original_value != checksum) {
- LOG_WARNING("Verification will fail since checksum in image (0x%8.8" PRIx32 ") to be written to flash is "
+ LOG_WARNING("Boot verification checksum in image (0x%8.8" PRIx32 ") to be written to flash is "
"different from calculated vector checksum (0x%8.8" PRIx32 ").", original_value, checksum);
- LOG_WARNING("To remove this warning modify build tools on developer PC to inject correct LPC vector "
+ LOG_WARNING("OpenOCD will write the correct checksum. To remove this warning modify build tools on developer PC to inject correct LPC vector "
"checksum.");
}
-----------------------------------------------------------------------
Summary of changes:
Makefile.am | 3 ++-
doc/openocd.texi | 6 +++---
src/flash/nor/lpc2000.c | 4 ++--
src/target/armv7m_trace.c | 15 +++++++++++++++
src/target/armv7m_trace.h | 4 ++++
src/target/cortex_m.c | 2 ++
6 files changed, 28 insertions(+), 6 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2020-12-09 22:47:11
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 0dd3b7fa6c7930446967772832a351e90c426d69 (commit)
via 77f468893ebe908e0b036beae6abedc50e8298ba (commit)
from 9d3f33757030c30c138405dd8a63cef8fd68184c (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 0dd3b7fa6c7930446967772832a351e90c426d69
Author: Paul Fertser <fer...@gm...>
Date: Thu Dec 10 01:43:12 2020 +0300
Restore +dev suffix
Signed-off-by: Paul Fertser <fer...@gm...>
diff --git a/configure.ac b/configure.ac
index 884f0c612..236d6bc28 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1,5 +1,5 @@
AC_PREREQ(2.64)
-AC_INIT([openocd], [0.11.0-rc1],
+AC_INIT([openocd], [0.11.0-rc1+dev],
[OpenOCD Mailing List <ope...@li...>])
AC_CONFIG_SRCDIR([src/openocd.c])
AC_CONFIG_AUX_DIR([.])
commit 77f468893ebe908e0b036beae6abedc50e8298ba
Author: Antonio Borneo <bor...@gm...>
Date: Sat May 30 13:33:27 2020 +0200
The openocd-0.11.0-rc1 release candidate
Change-Id: I111fec1304482f5c0f9d6ee988be8a2ea3de3981
Signed-off-by: Antonio Borneo <bor...@gm...>
diff --git a/NEWS b/NEWS
index 9df165004..5c04e340f 100644
--- a/NEWS
+++ b/NEWS
@@ -2,27 +2,232 @@ This file includes highlights of the changes made in the OpenOCD
source archive release.
JTAG Layer:
+ * add debug level 4 for verbose I/O debug
+ * bitbang, add read buffer to improve performance
+ * Cadence SystemVerilog Direct Programming Interface (DPI) adapter driver
+ * CMSIS-DAP v2 (USB bulk based) adapter driver
+ * Cypress KitProg adapter driver
+ * FTDI FT232R sync bitbang adapter driver
+ * Linux GPIOD bitbang adapter driver through libgpiod
+ * Mellanox rshim USB or PCIe adapter driver
+ * Nuvoton Nu-Link and Nu-Link2 adapter drivers
+ * NXP IMX GPIO mmap based adapter driver
+ * ST-Link consolidate all versions in single config
+ * ST-Link read properly old USB serial numbers
+ * STLink/V3 support (for ST devices only !)
+ * STM8 SWIM transport
+ * TI XDS110 adapter driver
+ * Xilinx XVC/PCIe adapter driver
Boundary Scan:
Target Layer:
+ * 64 bit address support
+ * ARCv2 target support
+ * ARM Cortex-A hypervisor mode support
+ * ARM Cortex-M fast PC sampling support for profiling
+ * ARM generic CTI support
+ * ARM generic mem-ap target support
+ * ARMv7-A MMU tools
+ * ARMv7m traces add TCP stream server
+ * ARMv8 AARCH64 target support and semihosting support
+ * ARMv8 AARCH64 disassembler support through capstone library
+ * ARMv8-M target support
+ * EnSilica eSi-RISC target support, including instruction tracing
+ eSi-Trace support
+ * MIPS64 target support
+ * Motorola SREC S6 record image file support
+ * RISC-V target support
+ * SEGGER Real Time Transfer (RTT) initial support (for single target,
+ Cortex-M only)
+ * ST STM8 target support
+ * Various MIPS32 target improvements
Flash Layer:
+ * Atheros (ath79) SPI interface support
+ * Atmel atmega128rfa1 support
+ * Atmel SAM D21, D51, DA1, E51, E53, E54, G55, R30 support
+ * Atmel SAMC2?N* support
+ * Cypress PSoC5LP, PSoC6 support
+ * EnSilica eSi-RISC support
+ * Foshan Synwit Tech SWM050 support
+ * Maxim Integrated MAX32XXX support
+ * Nordic Semiconductor nRF51822, nRF52810, nRF52832 support
+ * NXP Kinetis K27, K28, KE1x, KEAx, KL28, KL8x, KV5x, KWx support
+ * Renesas RPC HF support
+ * SH QSPI support
+ * SiFive Freedom E support
+ * Silicon Labs EFR-family, EZR32HG support
+ * ST BlueNRG support
+ * ST STM32 QUAD/OCTO-SPI interface support for Flash, FRAM and EEPROM
+ * ST STM32F72x, STM32F4x3, STM32H7xx support
+ * ST STM32G0xx, STM32G4xx, STM32L4x, STM32WB, STM32WL support
+ * ST STM32L5x support (non secure mode)
+ * TI CC13xx, CC26xx, CC32xx support
+ * TI MSP432 support
+ * Winner Micro w600 support
+ * Xilinx XCF platform support
+ * Various discrete SPI NOR flashes support
Board, Target, and Interface Configuration Scripts:
+ * 8devices LIMA board config
+ * Achilles Instant-Development Kit Arria 10 board config
+ * Amazon Kindle 2 and DX board config
+ * Analog Devices ADSP-SC58x, ADSP-SC584-EZBRD board config
+ * Andes Technology ADP-XC7KFF676 board config
+ * Andes Technology Corvette-F1 board config
+ * ARM Musca A board config
+ * Arty Spartan 7 FPGA board config
+ * Atmel SAMD10 Xplained mini board config
+ * Atmel SAMD11 Xplained Pro board config
+ * Atmel SAM G55 Xplained Pro board config
+ * AVNET UltraZED EG StarterKit board config
+ * Blue Pill STM32F103C8 board config
+ * DP Busblaster v4.1a board config
+ * DPTechnics DPT-Board-v1 board config
+ * Emcraft imx8 SOM BSB board config
+ * Globalscale ESPRESSObin board config
+ * Kasli board config
+ * Kintex Ultrascale XCKU040 board config
+ * Knovative KC-100 board config
+ * LeMaker HiKey board config
+ * Microchip (Atmel) SAME54 Xplained Pro board config
+ * Microchip (Atmel) SAML11 Xplained Pro board config
+ * Nordic module NRF52 board config
+ * Numato Lab Mimas A7 board config
+ * NXP Freedom FRDM-LS1012A board config
+ * NXP IMX7SABRE board config
+ * NXP IMX8MP-EVK board config
+ * NXP MC-IMX8M-EVK board config
+ * QuickLogic QuickFeather board config
+ * Renesas R-Car E2, H2, M2 board config
+ * Renesas R-Car Salvator-X(S) board config
+ * Renesas RZ/A1H GR-Peach board config
+ * Rigado BMD-300 board config
+ * Sayma AMC board config
+ * Sifive e31arty, e51arty, hifive1 board config
+ * ST B-L475E-IOT01A board config
+ * ST BlueNRG idb007v1, idb008v1, idb011v1 board config
+ * ST STM32F412g discovery board config
+ * ST STM32F413h discovery board config
+ * ST STM32F469i discovery board config
+ * ST STM32F7 Nucleo board config
+ * ST STM32F723e discovery board config
+ * ST STM32F746g discovery board config
+ * ST STM32F769i discovery board config
+ * ST STM32H735g discovery board config
+ * ST STM32H743zi Nucleo board config
+ * ST STM32H745i discovery board config
+ * ST STM32H747i discovery board config
+ * ST STM32H750b discovery board config
+ * ST STM32H7b3i discovery board config
+ * ST STM32H7x_dual_qspi board config
+ * ST STM32H7x3i Eval boards config
+ * ST STM32L073 Nucleo board config
+ * ST STM32L476g discovery board config
+ * ST STM32L496g discovery board config
+ * ST STM32L4p5g discovery board config
+ * ST STM32L4r9i discovery board config
+ * ST STM32L5 Nucleo board config
+ * ST STM32MP15x DK2 board config
+ * ST STM32WB Nucleo board config
+ * ST STM8L152R8 Nucleo board config
+ * Synopsys DesignWare ARC EM board config
+ * Synopsys DesignWare ARC HSDK board config
+ * TI BeagleBone family boards config
+ * TI CC13xx, CC26xx, CC32xx LaunchPad board config
+ * TI MSP432 LaunchPad board config
+ * Tocoding Poplar board config
+ * TP-Link WDR4300 board config
+ * Allwinner V3s target config
+ * Andes Technology NDS V5 target config
+ * Atmel atmega128rfa1 target config
+ * ARM corelink SSE-200 target config
+ * Atheros_ar9344 target config
+ * Cypress PSoC5LP, PSoC6 target config
+ * EnSilica eSi-RISC target config
+ * Foshan Synwit Tech SWM050 target config
+ * GigaDevice GD32VF103 target config
+ * Hisilicon Hi3798 target config
+ * Hisilicon Hi6220 target config
+ * Infineon TLE987x target config
+ * Marvell Armada 3700 target config
+ * Maxim Integrated MAX32XXX target config
+ * Mellanox BlueField target config
+ * Microchip (Atmel) SAME5x, SAML1x target config
+ * NXP IMX6SX, IMX6UL, IMX7, IMX7ULP, IMX8 target config
+ * NXP Kinetis KE1xZ, KE1xF target config
+ * NXP LPC84x, LPC8Nxx, LS1012A, NHS31xx target config
+ * Qualcomm QCA4531 target config
+ * QuickLogic EOS S3 target config
+ * Renesas R-Car E2, H2, M2 target config
+ * Renesas R-Car Gen3 target config
+ * Renesas RZ/A1H target config
+ * Rockchip RK3308 target config
+ * ST BlueNRG target config
+ * ST STM32G0, STM32G4, STM32H7, STM32L0, STM32L5 target config
+ * ST STM32MP15x target config
+ * ST STM32WBx, STM32WLEx target config
+ * ST STM8L152, S003, S103, S105 target config
+ * Synopsys DesignWare ARC EM target config
+ * Synopsys DesignWare ARC HS Development Kit SoC target config
+ * TI CC13xx, CC26xx, CC32xx target config
+ * TI TNETC4401 target config
+ * Xilinx UltraScale+ target config
+ * Altera 5M570Z (MAXV family) CPLD config
+ * Xilinx Ultrascale, XCF CPLD config
+ * Intel (Altera) Arria10 FPGA config
+ * Cadence SystemVerilog Direct Programming Interface (DPI) interface config
+ * Cypress KitProg interface config
+ * Digilent SMT2 NC interface config
+ * DLN-2 example of Linux GPIOD interface config
+ * FTDI C232HM interface config
+ * HIE JTAG Debugger interface config
+ * In-Circuit's ICprog interface config
+ * isodebug isolated JTAG/SWD+UART interface config
+ * Mellanox rshim USB or PCIe interface config
+ * Nuvoton Nu-Link interface config
+ * NXP IMX GPIO mmap based interface config
+ * Steppenprobe open hardware interface config
+ * TI XDS110 interface config
Server Layer:
+ * 64 bit address support
+ * default bind to IPv4 localhost
+ * gdb: allow multiple connections
+ * gdb: architecture element support
+ * gdb: vCont, vRun support
+ * telnet: handle Ctrl+A, Ctrl+E and Ctrl+K
+
+RTOS:
+ * Chromium-EC rtos support
+ * hwthread pseudo rtos support
+ * NuttX rtos support
+ * RIOT rtos support
Documentation:
+ * Improve STM32 flash driver
+ * Various typo fix and improvements
Build and Release:
+ * Add libutil to support jimtcl version 0.80
+ * Clang warning fixes
+ * GitHub workflow for Win32 snapshot binaries
+ * Handle Tcl return values consistently
+ * Mitigation for CVE-2018-5704: Prevent some forms of Cross
+ Protocol Scripting attacks
+ * Support for libftdi 1.5
+ * Travis-CI basic support
+ * Update libjaylink to version 0.2.0
+ * Update jimtcl to version 0.79
+ * Use external (optional) library capstone for ARM and AARCH64 disassembly
This release also contains a number of other important functional and
cosmetic bugfixes. For more details about what has changed since the
last release, see the git repository history:
-http://sourceforge.net/p/openocd/code/ci/v0.x.0/log/?path=
+http://sourceforge.net/p/openocd/code/ci/v0.11.0-rc1/log/?path=
For older NEWS, see the NEWS files associated with each release
diff --git a/configure.ac b/configure.ac
index c8978b94d..884f0c612 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1,5 +1,5 @@
AC_PREREQ(2.64)
-AC_INIT([openocd], [0.10.0+dev],
+AC_INIT([openocd], [0.11.0-rc1],
[OpenOCD Mailing List <ope...@li...>])
AC_CONFIG_SRCDIR([src/openocd.c])
AC_CONFIG_AUX_DIR([.])
-----------------------------------------------------------------------
Summary of changes:
NEWS | 207 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
configure.ac | 2 +-
2 files changed, 207 insertions(+), 2 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2020-12-09 22:47:04
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The annotated tag, v0.11.0-rc1 has been created
at f8a0eb00215b30ae5517f3f6b35d7f20cc72a587 (tag)
tagging 77f468893ebe908e0b036beae6abedc50e8298ba (commit)
replaces v0.10.0
tagged by Paul Fertser
on Wed Dec 9 20:38:00 2020 +0300
- Log -----------------------------------------------------------------
The openocd-0.11.0-rc1 release.
Adam Bass (2):
tcl/target: Add Renesas R-Car Gen3 targets
tcl/board: Add Renesas R-Car Salvator-X(S) boards.
Adrian Negreanu (2):
drivers/jlink: fix calculate_swo_prescaler formula
semihosting: print the semihosting operation id
Ake Rehnman (8):
stm8 : new target
jtag/drivers/stlink_usb : implemented and repaired SWIM support
stlink_usb: Changes to make connect_under_reset work
Added config files for stm8l152 stm8s003 and stm8s105
stm8: fix compilation warning
STM8 Target relicensing to GPLv2 and later
Entering SWIM mode on ST-LINK does not update swim status word.
stm8 target: make adapter speed settings work
Al Dyrius (1):
Update FTDI C232HM cfg, and add two new cfgs from cable modem research
Alberto GarciÌa Hierro (1):
stm32h7x: Fix reset with non-HLA interfaces on macOS
Aleksey Shargalin (1):
remote_bitbang_sysfsgpio: fix reset handling
Alex J Lennon (1):
stm32l4x: Fix stm32l4x dual bank support
Alexander Kurz (1):
tcl/board: Add config for the Amazon Kindle 2 and DX
Alexandre Bourdiol (1):
tcl/board/st_nucleo_l1.cfg use dualbank configuration
Alexandre Torgue (2):
flash: Add new stm32h7x driver support
Add STM32H7 config files
Alexandru Gagniuc (2):
jtag: jtag_vpi: Add missing 'default' to switch statement
jtag: usb_blaster: Add missing 'default' to switch statement
Alexey Brodkin (1):
gdb-server: Create arch-specific structure type for every feature
Alistair Francis (3):
contrib: Add HiFive1 to udev rules
flash: Add the Freedom E310-G002 SPI Flash
board: Add the HiFive1 revB board configuration
Anders Westrup (1):
flash/nrf5: support for nRF52810
Andrea Merello (1):
flash: efm32: add support for EFR-familty (e.g. bluegecko)
Andreas Bolsch (6):
Support for STM32F722, F723, F413 and F423
Handle improperly build image files gracefully
SPI table updates (some new devices and new info)
Flash driver for STM32G0xx and STM32G4xx
revision id for STM32L4P5/Q5 corrected
Flash, FRAM and EEPROM driver for STM32 QUAD-/OCTOSPI interface
Andreas Fritiofson (15):
nrf51: Remove pointer cast
target: Fix snprintf format string and argument mismatch in md output
mips32: inline functions in headers must be static
log: Add a new debug level (4) for verbose I/O debug
arm: semihosting: set command line arguments
Convert DEBUG_JTAG_IO to LOG_DEBUG_IO
mflash: Remove this broken flash driver
target: Switch to target_read_buffer() in verify_image fallback
nrf5: Fix misuse of flash bank number
gdb_server: Support vRun packet, allow setting cmdline from GDB
CVE-2018-5704: Prevent some forms of Cross Protocol Scripting attacks
tcl: Add interface config for isodebug isolated JTAG/SWD+UART
bitbang: Fix FTBFS with GCC 10
Refer to cross-build script in README
Update user dir config file search path
Andreas Färber (7):
flash/nor: Add PSoC 5LP flash driver
psoc5lp: Add EEPROM flash driver
psoc5lp: Add NV Latch flash driver
target: armv8: Avoid semihosting segfault on halt
tcl: target: Add NXP LS1012A config
tcl: board: Add NXP Freedom FRDM-LS1012A config
tcl/target: Add Infineon TLE987x
Andreas Kemnade (1):
efm32: correct erase address if bank->base != 0
Angus Ainslie (1):
imx8m: add an m4 target to the imx8m
Anton V. Kirilchik (1):
Add target config for STM8S103 chip...
Antonio Borneo (367):
jtag: adapter: fix indentation in handle_interface_command
doc: fix several typos in openocd.texi
doc: fix several typos within manual documents
target: fix syntax in help message
breakpoints: simplify the test to find a breakpoint
flash/nor/psoc5lp: fix compile issue on GCC 8.1.0
target/arm_adi_v5: sync CSW and TAR cache on apreg write
target/arm_adi_v5: keep CSW and TAR cache updated
jtag/drivers/cmsis-dap: fix connect in cmsis_dap_swd_switch_seq()
target/cortex_m: return error if breakpoint address is out of range
target: fix 'bp' command help message
gdb_server: only trigger once the event gdb-detach at gdb quit
gdb_server: set current_target from connection's one
armv7a: read ttbcr and ttb0/1 at every entry in debug state
drivers: cmsis_dap_usb: implement cmd JTAG_TMS
arm_adi_v5: put SWJ-DP back to JTAG mode at exit
target/riscv: fix compile error with gcc 8.1.1
server: explicitly call "shutdown" when catch CTRL-C or a signal
zy1000: fix compile error with gcc 8.1.1
target/arm_adi_v5: add command "dpreg"
target/arm_adi_v5: allow commands apsel and apcsw during init phase
target/cortex_a: allow command dacrfixup during init phase
target/armv7a_cache: add gdb keep-alive and fix a missing dpm finish
adi_v5: enforce check on AP number value
gdb_server: add per target option "-gdb-port"
target/cortex_a: poll all targets in SMP node after halt
arm_adi_v5: remove useless cast to int
doc: fix use of deprecated config file in the example
contrib/60-openocd.rules: provide hint to reload udev rules
gdb_server: avoid gdb server for virtual targets
drivers: cmsis-dap: fix connection in JTAG mode
target/arm_adi_v5: fix sync CSW cache on apreg write
target/cortex_a: fix temporary breakpoint during step
arm_adi_v5: do not deactivate power domains while trying to clear sticky error
target/cortex_a: remove unused code controlled by "fast_reg_read"
target/cortex_a: remove buggy memory AP accesses
target/arm_dpm: uniform names of exported functions
target/cortex_a: remove duplicate code to read target registers
flash/stmsmi: fix byte order for big-endian host
stlink: add usb pid for v2.1 without mass storage device
stlink: check for SWD support
stlink: simplify maintenance of version and features
stlink: add STLINK_F_HAS_TRACE
stlink: add STLINK_F_HAS_TARGET_VOLT
stlink: add STLINK_F_HAS_SWD_SET_FREQ
stlink: add STLINK_F_HAS_JTAG_SET_FREQ
stlink: add STLINK_F_HAS_MEM_16BIT
stlink: simplify api version handling
stlink: remove reset pulse when entering in JTAG
stlink: add STLINK_F_HAS_GETLASTRWSTATUS2
stlink: dump version in the same format of ST firmware upgrade tool
stlink: fix printed version for new STM8 nucleo board
stlink: add support for STLINK-V3
doc: fix some typo about STMicroelectronics name
helper/log: remove dead code in log_forward()
libusb0: add compatibility define for transfer type bulk
armv7a_mmu: s/LOG_ERROR/LOG_WARNING/ on address translation failure
helper/startup.tcl: fix execution stack frame of wrapped commands
target/cortex_a: enable DSCR_HALT_DBG_MODE during examine
target/stm8: add support for multi-architecture gdb
target/arm: add support for multi-architecture gdb
target/aarch64: add support for multi-architecture gdb
libusb0: return oocd error values
jtag/drivers/usb_common: return oocd error values
libusb: add debug message on adapter not found due to wrong serial
drivers/sysfsgpio: fix usage messages
helper/command: check for malloc failure in __command_name
arm_adi_v5: fix and update sequences to spec IHI 0031E
arm_opcode: fix encoding of ARMv5 breakpoint instruction
jtag: cmsis-dap: use macro SWJ_PIN_SRST in place of magic value
command: initialize the command mode for every command
arm_adi_v5: rewrite dap_to_jtag and dap_to_swd
drivers/imx_gpio: fix polarity of srst and trst
command: fix the mode for command "jtag configure"
drivers/bitbang: remove unused extern declaration of jtag_interface
cortex_a: fix a potential memory leak in cortex_a_target_create()
mem_ap: fix a potential memory leak in mem_ap_target_create()
aarch64: fix a potential memory leak in aarch64_target_create()
gdb_server: remove warning for stepi after gdb_sync
gdb_server: fix 'null' pointer passed as 'nonnull' parameter
stlink: remove unused assignment
helper/command: return proper JIM error code
stlink: handle error bad-AP
stlink: handle error GET_IDCODE
drivers/stlink_usb: fix stlink_usb_read_regs() for API v2
drivers/stlink_usb: check error code returned by st-link
drivers/stlink_usb: use command STLINK_DEBUG_APIV2_READ_IDCODES
target/adi_v5_swd: update cached value on write to DP_SELECT
target/adi_v5_swd: improve error check while updating DP_SELECT
smp: replace commands smp_on/smp_off with "smp [on|off]"
smp: move sub-command "smp_gdb" in file smp.c
helper/startup.tcl: remove proc exit
log: add const qualifier to commands struct
target/arm7_9_common: use coherent syntax in struct initialization
target/armv4_5: use coherent syntax in struct initialization
target/openrisc: use coherent syntax in struct initialization
target/riscv: use coherent syntax in struct initialization
flash/kinetis: use coherent indentation in struct initialization
flash/xmc4xxx: use coherent indentation in struct initialization
target/armv7a: simplify help description of command "l2x"
command_registration: add empty usage field to chained commands
drivers/imx_gpio: fix usage messages
drivers/bcm2835gpio: fix usage messages
drivers/vsllink: add help and usage to commands
flash/nor/at91samd: set usage for command "set-security"
flash/nor/str9xpec: fix help and usage for command "part_id"
drivers/at91rm9200: fix help and usage to command "at91rm9200_device"
target/adi_v5_swd: add "usage" field to command "swd"
Set empty usage field for commands that do not need parameters
helper/command: handle empty "usage" with add_help_text/add_usage_text
helper/command: log an error for commands without usage
target/cortex_a: fix waiting for target halted after step
target/cortex_a: check dscr before timeout
target/cortex_a: use extensively cortex_a_wait_dscr_bits()
doc/openocd.texi: fix cross referencing
helper/command: add macro CMD
target: change prototype of target_process_reset()
target: use LOG_USER to print errors in events
target: unify memory read/write commands
target_request: replace command_print() with command_output_text()
helper/command: change prototype of command_print/command_print_sameline
helper/command: remove search for "ocd_" prefix
doc: remove references to "ocd_" prefixed commands
TODO: remove references to "ocd_" prefix in documentation
tcl/psoc4: remove "ocd_" prefixed commands
target: fix output of command "targets"
helper/command: send command output only to the right server
helper/command: fix printing usage for incomplete commands
drivers/bcm2835gpio: fix build for ARM host
helper/command: print the command output in case of error
target: remove unused function target_buffer_get_u8()
helper/command: remove dead code in command_unknown()
HACKING: fix minor typos
guess-rev.sh: fix minor typo
configure.ac: fix minor typo
swd: remove unused API frequency()
jtag: simplify management of non-implemented handlers
helper: add bitmap helper primitives
target/cortex_m: remove dependency from jtag queue
gdb_server: remove call to jtag_execute_queue()
jtag: set default "jtag_only" to uninitialized transports
contrib/rpc_examples: remove 'ocd_' command prefix from haskell example
mem_ap: fix format of logged addresses
target: fix error on TCL command "return" in target event handler
jtag: fix error on TCL command "return" in jtag event handler
target/aarch64: remove dependency from jtag queue
target/cortex_a: remove dependency from jtag queue
helper/options: simplify the code using command_run_linef()
cortex_m: set C_DEBUGEN in soft_reset_halt
target/cortex_a: use aligned accesses for read/write cpu memory slow
drivers/gw16012: remove useless cast on gw16012_port
helper: skip including sys/sysctl.h on Linux
gdb_server: fix string length with semihosting_fileio
gdb_server: fix extended_protocol for multi-target
sysfsgpio: give time to udev to change gpio permission
target/armv4_5: use c99 array designator to init arm_core_regs[]
helper/command: remove unused field in struct command_registration
adapter: add command "adapter [de]assert srst|trst [[de]assert srst|trst]"
jtag: replace command "jtag_reset" with "adapter [de]assert"
tcl: update scripts after "jtag_reset" got deprecated
arm_adi_v5: add API send_sequence() and use it
swd: get rid of jtag queue to assert/deassert srst
bitbang: jtag-only drivers: switch to new reset API
hla: use the new system_reset API
jtag: print an errmsg on using jtag API for non jtag transport
hla: remove empty JTAG execute_queue method
drivers/kitprog: remove unused JTAG execute_queue method
adapter: switch from struct jtag_interface to adapter_driver
TODO: add restructuring of JTAG/adapter layer
adi_v5_dapdirect: add support for adapter drivers that provide DAP API
stlink: add DAP direct driver
stlink: fix handling of DPv1 and DPv2 banked registers
jtag: drivers: xlnx-pcie-xvc: fix build after merge
openocd: fix minor inconsistencies after renaming "adapter" command
tcl: replace command "interface" with "adapter driver"
doc: replace example command "interface" with "adapter driver"
tcl: replace the deprecated commands with "adapter ..."
jtag: drivers: xlnx-pcie-xvc: fix build on Linux pre v4.10
tcl: fix remaining scripts after rework adapter commands
jtag: flush jtag queue after jtag_add_tlr()
stlink: fix max packet size for 8 bit R/W on stlink-v3
target/nds32: fix type of magic number
jtag/startup.tcl: remove trailing whitespaces
coding style: remove unnecessary parentheses
coding style: use ARRAY_SIZE() when possible
armv8: check the core state to pass the correct arch to gdb
stlink: add trace support in DAP direct mode
adi_v5_dapdirect: fix connect under reset
log: let command "log_output" to set back its default
coding style: fix space around pointer's asterisk
coding style: add newline at end of text files
coding style: tools: remove empty lines at end of text files
coding style: testing: remove empty lines at end of text files
coding style: doc: remove empty lines at end of text files
jtag: report API reset as synchronous
target: fix crash with jimtcl 0.78
jimtcl: update to tag 0.79
ftdi: flush mpsse queue after a level change on reset pins
arm: fix reg num for Monitor mode
arm: Use different enum for core_type and core_mode
target/armv4_5: remove unused macro
armv7a: access monitor registers only with security extensions
target/cortex_a: add hypervisor mode
doc: fix texinfo files attributes on Windows
jtag: fix command "adapter [de]assert" with dap direct
sysfsgpio: minor fix for bool types
flash/nor/nrf5: pass unsigned char to isalnum()
stlink: remove only instance of useconds_t
cortex_a: don't wait for target halted in deassert_reset()
cortex_m: remove deprecation for soft_reset_halt
gdb_server: print the target associated to the gdb port
jtag: flush queue after reset for drivers using old reset model
tcl: stm32mp15x: add target and board config files
tools/checkpatch.sh: remove flag --no-tree
coding style: tcl: remove empty lines at end of text files
coding style: src: remove empty lines at end of text files
coding style: contrib: remove empty lines at end of text files
server: set tcp port and bind address before init
jtag: remove unused function adapter_driver_modules_load()
tcl: stm32mp15x: fix "reset halt" on CM4 in engineering boot
helper/command: register all commands through register_commands()
helper/ioutil: silence gcc-8 on strncpy
doc: fix texinfo warning on @deffn not at the line beginning
doc: fix typo and spelling
tcl: fix typo and spelling
tcl: remove trailing whitespace
coding style: remove useless break after a goto or return
coding style: add parenthesis around the argument of sizeof
coding style: avoid unnecessary line continuations
coding style: add missing space when split strings
coding style: prototype of functions with no parameters
coding style: remove useless return statement from void functions
coding style: let "else" follow the close brace
coding style: join consecutive string fragments
coding style: wrap lines longer than 120 chars
coding style: open function's brace at beginning of new line
target/arc: fix build with clang
stlink: reduce use of hla specific enum hl_transports
adapter: expose HLA interface in struct adapter_driver
swim: abstract the transport in stm8 target
swim: fix adapter speed handling
swim: add new transport
stlink: simplify mem R/W with SWIM
stlink: simplify handling of SWIM
Revert "adapter: expose HLA interface in struct adapter_driver"
tcl/board: add board ST nucleo-8l152r8
stlink: default dapdirect to SWD instead of JTAG
stlink: fix incorrectly returned error on v2j28
stlink: fix open AP for v2j37 and v3j7
helper/command: strip replicated command name in log
helper/command: fix check on value returned by jim API
openocd: properly use jim data types
helper/command: remove unused functions and make static local ones
nor/kinetis: add keep-alive during flash write
log: fix kept_alive() and report expired timeout
target/cortex-m: enable C_DEBUGEN during examine
libusb_helper: fix memory leak when no adapter is found
target/mem_ap: fix two memory leaks
target/cortex_a: fix memory leak of register cache
jtag/tcl: fix memory leak in command 'irscan'
coding style: fix multi-line dereferencing
target: do not print an error on shutdown in target events
configure: split build of hla layouts
target/arm926ejs: fix memory leaks
coding style: fix print of hex values as decimal
coding style: fix space separation
coding style: add arguments to function prototypes
gdb_server: suggest user to prefer GDB extended mode
bitbang: document bitbang callbacks
bitbang: remove superfluous switch between jtag and swd
bitbang: split jtag and swd operations
sysfsgpio: enable only the transport specific gpio
imx_gpio: enable only the transport specific gpio
bcm2835gpio: enable only the transport specific gpio
jtag/drivers: add linuxgpiod driver
contrib/60-openocd.rules: add udev rules for Linux gpiod
tcl/interface: add example of linuxgpiod through dln-2
doc: remove duplicated words
jtag/drivers: replace perror() with LOG_ERROR()
cmsis-dap: prevent hidapi to search again for the adapter
cmsis-dap: fix USB interface for NXP LPC-Link2
target: fix memory leaks on targets based on arm9tdmi
target/xscale: fix memory leak of register cache
target/arm7tdmi: fix memory leak of register cache
target/arm720t: fix memory leak of register cache
flash: fix typos and duplicated words
rtos: fix minor typos
server: fix minor typos
transport: fix minor typos
xsvf: fix minor typos
jtag: fix minor typos
contrib: fix minor typos
flash: fix minor typo s/fifo's/fifos/
svf: fix minor typos
drivers/linuxgpiod: add led
drivers/bitbang: blink LED on SWD
target: fix minor typos and duplicated words
nulink: add minimal support for Nu-Link2
target: use one second timeout while halting target at gdb attach
target/arm11: fix memory leaks, including register cache
tcl/target/armada370: remove useless 'init' command
tcl/interface: snps_sdp: fix minor typo s/similiar/similar/
gdb_server: refuse gdb connection if target is not examined
target: fix memory leaks on target_create() fail
log: handle LOG_*() before calling to log_init()
tcl/target: use command 'jtag newtap' to add a boundary scan TAP
hla_transport: split command registration per transport
helper: fix minor typos
adi_v5: use macro DP_APSEL_MAX to allocate struct adiv5_ap
flash: avoid checking for non NULL pointer to free it
openocd: avoid checking for non NULL pointer to free it
jtag/aice: avoid abusing of int32_t type
jtag: use proper format with uint32_t
flash: use proper format with uint32_t
target: use proper format with uint32_t
openocd: use proper format with uint32_t
target/arc: fix command's usage string
jtag/aice: fix command's usage string
openocd: fix command's usage string
jtag: avoid checking for non NULL pointer to free it
drivers/buspirate: remove empty lines at end of file
target: avoid checking for non NULL pointer to free it
drivers/jlink: fix (again) calculate_swo_prescaler formula
target/aarch64: fix use of 'target->private_config'
riscv: fix compile error
tcl/interface/ti-icdi: remove empty lines at end of file
tcl/board: drop 'tcl' prefix in 'find' command
tcl/board: fix changed target config filenames
target/arm_adi_v5: add helper to get mem_ap spot in configure/cget
target/arm_cti: use adiv5_jim_mem_ap_spot_configure()
tcl: replace '-ctibase' with '-baseaddr'
gdb_server: allow multiple GDB connections to selected targets
target: handle command 'target current' when no target is present
configure.ac: stop automake to search for scripts in parent dirs
openocd: add support for libftdi 1.5
flash: declare local symbols as static
rtos: declare local symbols as static
target: declare local symbols as static
jtag: declare local symbols as static
server: declare local functions as static
transport: remove unused function transports_are_declared()
rtos: make private the API rtos_try_next()
cortex_m: declare local functions as static
target/adi_v5_jtag: remove unused global variable
openocd: convert function setup_command_handler() to static
configure.ac: add libutil to the dependency list
doc: remove reference to already dropped tftp support
target/arm7tdmi: remove unused/deprecated function parameter
build: fix build with --enable-minidriver-dummy
drivers/jlink: fix check for max prescaler
stlink: fix max SWV baudrate on stlink v3
stlink: fix computation of trace prescaler
tcl/board: rename board file ST b-l475e-iot01a
flash/stmqspi: minor fixes on coding style
hla: API: specify that read_reg/write_reg use regsel as parameter
stlink: handle read/write FPU registers in HLA API
cortex_m: use the new enum ARMV7M_REGSEL_name
jtag/drivers/cmsis_dap: fix build with gcc 10.1.0
armv4_5: fix segmentation fault in command 'arm reg'
armv4_5: fix output of command 'arm reg'
arm7_9_common: fix host endianness bug in arm7_9_full_context()
mips_mips64: fix minor host endianness bug
target/register: use an array of uint8_t for register's value
jimtcl: switch to github
flash/nor/stmsmi: fix compile error with clang 12.0.0
doc: document adapter drivers linuxgpiod and sysfsgpio
The openocd-0.11.0-rc1 release candidate
Antony Pavlov (1):
tcl/target|board: move common AR9331 code to atheros_ar9331.cfg
Armin van der Togt (3):
Fix flash writing on stm32l0
rtos: Fix XPSR_OFFSET for cortex_m4f stacking
Fix support for single-bank stm32l4 processors
Aurélien Martin (3):
nrf5: Include generated loader code
nrf5: Refresh the watchdog while flashing
nrf5: Comment the flash loader
Austin Morton (1):
stlink: increase trace buffer size to maximum allowed on st-link v2 firmware
Austin Phillips (1):
stlink_usb: Submit multiple USB URBs at once to improve performance
Bas Vermeulen (2):
Only call cmsis_dap_cmd_DAP_SWD_Configure when swd_mode is enabled
target aarch64: rework memory read/write to use 8/16/32 bit operations
Benedikt-Alexander Mokroà (1):
flash/nor/at91sam4: ATSAMG55x19 Rev.B
Bohdan Tymkiv (9):
Add support for Cypress PSoC6 family of devices
psoc6: Run flash algorithm asynchronously to improve performance
flash/nor/core: fix double-free crash with 'virtual' flash banks
flash/nor/virtual: copy missing fields from master flash_bank structure
flash/nor/tcl.c: fix flash bank bounds check in 'flash fill' command handler
target/image: Add support for S6 record in Motorola SREC files
flash/nor/core: Fix chunk size calculation in default_flash_mem_blank_check
gdb_server: fix GDB_BUFFER_SIZE usage, fix unaligned access during bulk transfers
adi_v5_jtag: avoid RAM exhaustion by limiting jtag queue size
Boran Car (1):
jep106: Add new IDs from JEDEC
Brent Roman (1):
server: Improve signal handling under Linux
Brian Brooks (1):
server/telnet: Handle Ctrl+K
Byron Kubert (1):
Added 512K flashing support for em3587
Caleb Szalacinski (1):
flash/nor: flash driver for Synwit SWM050 MCUs
CezaryGapinski (1):
stm32lx: fix dual-bank configuration for Cat.5 and Cat.6 devices
Chengyu Zheng (1):
tools/scripts/checkpatch.pl: fix unescaped brace
Christian Meusel (1):
efm32: use device-specific MSC base for EFM32TG11B
Christopher Head (47):
Cortex-M: fix stale DHCSR cache values
Cortex-M: Delete an unnecessary local variable
Add timeval_compare helper function
Use timeval helpers
Fix incorrect comment
target/cortex_m: constify some variables
flash/nor/stm32: Report errors in wait_status_busy
flash/nor/stm32: Eliminate working area leak
flash/nor/stm32h7: Fix incorrect comment
target/stm32f7x: Clear stuck HSE clock with CSS
target/cortex_m: make a variable local
target/cortex_m: fix incorrect comment
doc: fix typo in cortex_m maskisr command
target/cortex_m: restore C_MASKINTS after reset
target/cortex_m: fix typo
target/stm32: make APCSW cacheable
target/atsamv: make APCSW cacheable
target/stm32h7x: Fix documentation of reset_config
Permit null target on TCL connection
target/stm32f7x: clarify reset_config comment
flash/stm32h7x: remove IWDG1_SW separate variable
Constify struct flash_driver instances
Document the mem_ap target type
Fix incorrect commas in URLs
flash/stm32h7x: include IO_HSLV in user3_options
target/cortex_m: Implement maskisr steponly option
stm32h7x: fix incorrect indentation
stm32f7x: Use CHIPNAME-specific name for ITCM bank
jtag/drivers/jtag_usb_common: fix typo
helper/command: make command_run_line reentrant
helper/command: clear errno before calling parser
target/stm32h7x: Use AP2 to access DBGMCU when non HLA adapter is used
target/target: parse value as proper type
Switch to HTTPS for submodules
flash/nor/stm32h7x: fix incorrect array indexing
flash/nor/stm32h7x: check OPTCHANGEERR
flash/stm32h7x: use alignment infrastructure
flash/nor: check fill pattern fits in word size
doc/target/mips: fix grammar
src/flash/nor/stm32f2x: fix format strings
src/flash/nor/stm32h7x: fix format strings
flash/nor/stm32f2x: clean up data types
src/flash/nor/virtual: handle null pointers
server/gdb_server: fix incorrect condition check
target: allow profiling from running
target/cortex_m: reduce duplication in profiling
target: restore last run state after profiling
Christopher Hoover (1):
Adds SAMD11D14AU flash support.
Cliff L. Biffle (1):
jtag/drivers/stlink_usb: fix SWO prescaler
Cody P Schafer (4):
helper/types: cast to uint32_t,uint16_t to avoid UB by shifting int too far
target/cortex_m: avoid dwt comparator overflow
tcl/board: update all uses of interface/stlink-v2-1 to interface/stlink
armv7m: always set xPSR.T=1 when starting an algorithm
Cody Schafer (2):
target/image: make i/j unsigned to avoid ubsan runtime error
flash/stm32f2x: add stm32f7 revision Z identification
Damyan Mitev (1):
nrf51: Add new HWID 0x008F
Daniel Glöckner (1):
usb_blaster: Don't unnecessarily go through DR-/IR-Pause
Daniel Goehring (1):
ARMv8: Update rtos_reg storage from 8 to 16 bytes
Daniel Krebs (1):
rtos: add support for RIOT
Daniel Kucera (1):
nor/nrf5: added nrf51822 QFAAH2
Daniel Trnka (1):
target/cortex_m.c: vector_catch command checks if a target is examined
Darius Rad (2):
Avoid dereferencing NULL pointer.
Set TCP_NODELAY for local connections to jtag_vpi.
David Ung (7):
server: Allow 64 address to be send over GBD server
arm_dpm: Add new state ARM_STATE_AARCH64
arm_dpm: Add 64bit register handling.
aarch64: Add ARMv8 AARCH64 support files
aarch64: Enable halting debug mode on breakpoint set
aarch64: Enable resuming with address
aarch64: Correct target state for hardware step
Dennis Ostermann (1):
target/aarch64: Call aarch64_init_debug_access() earlier in aarch64_deassert_reset()
Diego Elio Pettenò (1):
Update Autotools Mythbuster link to avoid multiple redirects.
Diego Herranz (3):
tcl/interface/ftdi: improve minimodule config
src/jtag/drivers/ftdi: fix swd pin comment and links
tcl/interface/ftdi: Add Steppenprobe open hardware interface
Dominik Peklo (3):
flash/nor/tcl: Distinguish between sectors and blocks in status messages
tcl/target/stm32f0x: Allow overriding the Flash bank size
flash/nor/stm32f1x: Use of protection blocks, improved option bytes handling
Dongxue Zhang (1):
target: Add 64-bit target address support
EMARD (1):
jtag: drivers: ft232r: unhardcoded
Edward Fewell (20):
jtag/drivers: Add support for TI XDS110 debug probe
flash/nor: Add support for TI CC3220SF internal flash
drivers: xds110: Remove unnecessary and deprecated libusb function.
flash/nor: Add support for TI CC26xx/CC13xx flash
flash/nor: add support for TI MSP432 devices
flash/nor: update CC26xx/CC13xx support
flash/nor: update cc3220sf for issue found in code review
drivers: xds110: Add support for XDS110 stand-alone probe
icepick.cfg: add cancel reset bit to TAP register writes
flash/nor: update support for TI MSP432 devices
drivers: xds110: Fix errors in routine that toggles
drivers: xds110: Add support TCK changes in firmware update
tcl/target: Use sysresetreq for MSP432 targets
drivers: xds110: Clean up command syntax and documentation
drivers: xds110: Add support of alternate XDS110 configurations
tcl/target: Enable using vectreset for CC3320SF targets
flash/nor: Change missing protect_check message from WARN to Info.
tcl/target: Use vectreset for CC13xx/CC26xx targets.
nor/flash: Add keep_alive() during flash write handler
target/icepick.cfg: Add support for Test TAPs in ICEPick C
Erwin Oegema (1):
flash/nor/at91sam4: fix sam4sa16c flash banks and its gpnvms count
Evan Hunter (1):
Cortex-R : Remove commands which are not relevant to Cortex-R
Evgeniy Didin (13):
Introduce ARCv2 architecture related code
target/arc: fix clang static analyzer warnings
target/arc_cmd: Improve argument checks for commands
Introduce ARCv2 tcl config files
Add documentation section for ARCv2
target/arc: remove saving context during reset
target/arc: Add initial stepping functions
target/arc: introduce arc_read/write_instruction functions
target/arc: introduce breakpoint functionality
target/arc: Introduce L1I,L1D,L2 caches support
target/arc: Introduce Actionpoints support
Introduce tcl config files for Synopsys HSDK board
target/arc: introduce watchpoints support
Fabio Utzig (1):
Add missing break
Faisal Shah (1):
ChibiOS thread states: Update thread state to label mapping
Felipe Balbi (6):
target: quark_x10xx: adding missing 'static' keyword
target: lakemon: probemode entry isn't instantaneous
target: type: fix indentation
target: quark_x10xx: miscellaneous cleanups
target: lakemon: implement assert_reset and deassert_reset
stm32l0|l1: don't corrupt RCC registers
Florian Fainelli (7):
armv7a_mmu: Remove warning on va = pa
armv7a_mmu: Check earlier for PAR read
armv7a_mmu: Remove armv7a_mmu_translate_va()
armv7a_mmu: Do not restrict virtual addresses to uint32_t
armv7a_mmu: Add support for decoding Super Sections
target/cortex_a: Extract code to read/write from/to register to/from DCC
Remove BUILD_TARGET64
Forest Crossman (2):
jtag/drivers: Add Cypress KitProg driver
jtag/drivers/kitprog: Enable LOG_DEBUG_IO
Frank Hunleth (1):
efm32: add EFR32ZG13P and EFR32ZG14P parts
Frans-Willem Hardijzer (1):
stlink: Set speed before entering JTAG/SWD mode
Freddie Chopin (2):
Fix GCC7 warnings about switch-case fallthroughs
Fix GCC7 warnings about string truncation
Girts (3):
help/options.c: add error handling for -d arg
helper/options.c: fail if unexpected cmdline arguments are present
help/log.c: better error handling for "log_output"
Girts Folkmanis (2):
arm_dpm: fix dpm setup
Expand target_run_flash_async_algorithm() doc comment.
Grzegorz Kostka (1):
imx_gpio: add mmap based jtag interface for IMX processors
Guido Günther (2):
target: armv8: Ensure target is halted for virt2phys
tcl/board: Add Emcraft imx8 SOM BSB support
Guillaume Revaillot (1):
flash/nor/at91samd: add samr34j18.
Han Hartgers (1):
target/dsp563xx: dsp563xx restore reg support
Hellosun Wu (5):
libusb: Add transfer type filter to get correct ep
nds32: Add jtag scan_chain command
nds32: Avoid detected JTAG clock
spi: add MX25U1635E flash
tcl: Add support for NDS V5 target and xc7/Corvette-F1
Icenowy Zheng (1):
tcl/target: swm050: fix to allow to use with ST-Link
Ilya Kharin (1):
flash/nor/stm32l4x: cast wrpxxr_mask to uint16_to to print
James Jacobsson (1):
nrf5: Add HWID 0x139 (52832 rev E0)
James Marshall (1):
target/arm: Add PLD command to ARM disassembler.
Jan Kowalewski (3):
tcl/interface/ftdi: fix comment in minimodule-swd.cfg
tcl/target: Add QuickLogic EOS S3 MCU configuration
tcl/board: Add QuickLogic QuickFeather configuration
Jan Matyas (6):
jtag_vpi: fixed state transitions in "stableclocks"
jtag/drivers/imx_gpio: fixed calls to command_print
jtag_vpi: ensured constant packet size & endianness
jtag_vpi: multiple improvements
jtag_vpi: added an option to stop simulation on exit
target: added events TARGET_EVENT_STEP_START and _END
Jan Vojtech (1):
flash/nor/stm32f1x: Ability to change user option bytes.
Jan Äapek (1):
tcl STM32L0xx - add support for dual banked targets and for Nucleo-64 STM32L073
Jean-Christian de Rivaz (3):
Add LPC8Nxx and NHS3xx support.
command: Log the failed command name
target start_algorithm: Don't copy the IN mem_params fix uninitialised value.
Jerome Forissier (2):
HACKING: replace refs/publish/master with refs/for/master
HACKING: add note about refs/for/master
Jerome Lambourg (1):
Add support for the ATMEL SAM G55 Xplained Pro board and CPU.
Jim Paris (1):
nrf5: add free_driver_priv
Jimmy (1):
server/tcl_server.c: Fix buffer overrun
Jiri Kastner (9):
configs for Marvell Armada 3700
config for ESPRESSObin from Globalscale Tech. Inc.
ejtag: added missing instructions.
arm_adi_v5: added some partnumbers found in tegra 186 and tegra 210
fix cc32xx related changes
mips_ejtag: there is no DCR.MIPS64 bit
src/target/arm_adi_v5.c: resorted ids
src/target/arm_adi_v5.c: add Cortex-A35 related entries
tcl/target: add Rockchip RK3308 target
Joakim Nohlgård (2):
flash Kinetis: reduce a flash write message severity to info
flash Kinetis: Add support for newer KW series
John Pham (2):
Enable hla_serial for TI ICDI devices
Added comment to ti-icdi.cfg
Jonas Norling (4):
ftdi: Enable SWDIO output before sending data on it
adi_v5_swd: Add error message when SWD fails to connect
efm32: Refactor EFM32 chip family data, add more chips
efm32: Add JTAG definitions to EFM32 target file
Jonathan McDowell (4):
tcl/interface/ftdi/sheevaplug: Fix FTDI channel configuration
tcl/interface/ftdi/openrd: Fix FTDI channel + device description
Correct ZynqMP configuration to be appropriately named
tcl/interface/ftdi: Add HIE JTAG Debugger config
Juha Niskanen (2):
stm32l4: support flashing L496 devices
stm32l4: support flashing L45x/46x devices
JÄnis Skujenieks (1):
flash/nor/nrf5: set correct timeout for nvmc operations
Kai Geissdoerfer (2):
flash/nrf5: time-based timeout waiting for flash controller
flash/nrf5: support for nRF52840 Q1AAC0
Kamal Dasu (1):
target: aarch64: Adding mcr, mrc 32-bit coprocesor read/write support
Karl Palsson (14):
flash/nor: avrf: support atmega128rfa1
udev: Add rules for Ambiq Micro EVK's.
stm32l1: Devid 0x429 only has 8bit flash size register
telnet_server: drop unused options
telnet_server: increase buffer sizes to allow longer commands.
hla_target: allow non-intrusive profiling on cortex-m
profiling: write "correct" sample rate to gmon output
target: atmel samd10 xplained mini
drivers: cmsis-dap: pull up common connect code
drivers: cmsis-dap: Print version info when available
drivers: cmsis-dap: print serial if available
FreeRTOS: properly read on big endian systems.
FreeRTOS: strip duplicate line returns
board: drop open-bldc
Keir Fraser (1):
flash/nor/stm32f2x: Support value line chips with trimmed flash
Kevin Burke (2):
target/armv8: Add ARM target name on halt status
ARM|Driver: Add DPI Driver for emulation
Kevin Gillespie (3):
max32xxx: Support for MAX32XXX devices.
target/target.c: adding keep_alive() to while loop.
doc: makeinfo extra whitespace
Kevin Vermilion (1):
at91samd: Add flash programming support for SAMC2?N* parts
Kevin Yang (3):
target/aarch64: Use apnum setting
target: Examine subsequent targets after failure
target/cortex_m: Change sleep to running state
Khem Raj (2):
Fix libusb-1.0.22 deprecated libusb_set_debug with libusb_set_option
esirisc_flash: Rename PAGE_SIZE to FLASH_PAGE_SIZE
Lars Poeschel (2):
avrf.c: Use extended addressing for flash > 0x20000
avrf.c: Add ATmega256RFR2 to known flash list
Laurent LEMELE (4):
stlink: add JTAG speed selection
stlink: add support for 16 bit memory read/write
stlink: fix speed setting in dap mode
stlink: remove 18 MHz jtag freq for stlink v2
Leonard Crestez (14):
jtag: tcl: Add cget -idcode
target/imx7: Add ahb mem_ap
target/imx6: Add -ignore-version
target/imx6: Fix indentation in DAP_TAPID handling
target/imx6: Update list of supported TAPIDs
target/imx7ulp: Initial support
target/imx6sx: Initial support
target/imx6ul: Initial support
target/imx8m: Cleanup defaults
arm_adi_v5: Split CSW bits into AHB/APB/AXI
jtag: Fix jtag_reset fallback
tcl/interface/ftdi: Add imx8mp-evk internal JTAG interface
tcl/board: Add imx8mp-evk
ftdi: Report an error if no ftdi_vid_pid is specified
Liming Sun (3):
target: armv8: Add TARGET_HALTED check for gdb connect
jtag/drivers: add debugging support for Mellanox BlueField SoC
jtag/drivers/rshim: Disable the driver by default
Liviu Ionescu (4):
Rework/update ARM semihosting
target/target.c: free semihosting member
mips_m4k.c: Fix build with --disable-target64
Avoid null target->semihosting references.
Luca Dariz (1):
Fix ChibiOS FPU detection.
Lucas (1):
aarch64: Add support for debugging in HYP mode on ARMv8-A cores
Mara Bos (1):
Support bitbanging on 64-bit ARM CPUs.
Marc Schink (135):
aarch64: Fix #include guards
target: Fix memory leak
flash/nor/tcl: Fix some format specifiers
flash/nor/tcl: Make verify_bank parameter optional
tcl/board: Add STMicroelectronics STM32F7 Nucleo config
server/server: Remove all exit() calls
server/telnet: Remove exit() call
flash/nor/tcl: Respect flash bank boundary in verify_bank
flash/nor/tcl: Make write_bank parameter optional
flash/nor/tcl: Respect flash bank boundary in write_bank
flash/nor/tcl: Make read_bank parameters optional
helper/options: Add missing #include for MinGW and MSYS2
libjaylink: Update to latest Git version
jlink: Make use of debug level for I/O messages
jlink: Make libusb optional
jlink: Use error description in log messages
jlink: Disable automatic device selection
jlink: Disable TCP/IP discovery
stm32f2x: Fix left shift of negative value
rtos: Use 'bool' as return type for detect_rtos()
target: Constify parameter of is_armv7m()
server/gdb: Use get_target_from_connection()
server/gdb: Use 'bool' instead of 'int' for boolean values
server/telnet: Handle Ctrl+A and Ctrl+E
server/telnet: Use proper data types
Fix Jim interpreter memory leak
server/server: Remove all connections on shutdown
helper/replacements.h: Add missing #include
helper/command.h: Add missing #includes
helper/types.h: Add missing #includes
server/server.h: Add missing #include
helper/command.h: Add missing #include for target_addr_t
configure.ac: Fix required libjaylink version
flash/nor/stm32lx: Add revision 'V' for STM32L1xx Cat.3 devices
target: Fix segfault for 'mem2array'
target/armv7m_trace: Fix typo in enum
target/armv7m_trace: Use prefix for enums
server/server: Add ability to remove services
jlink: Use correct SWD buffer size
target/riscv-011: Fix memory leak in handle_halt_routine()
target: Use proper data types for timer callback
Use enum for target_register_timer_callback()
target: Remove unused variable 'has_percent'
target/cortex_m: Use 'bool' instead of 'int'
target/register: Use 'bool' data type
target/armv4_5: Use 'bool' data type
target/armv7_9_common: Use 'bool' data type
target/arm11: Use 'bool' data type
target/armv7m: Use 'bool' data type
target/armv8: Use 'bool' data type
target/aarch64: Use 'bool' data type
target/arm720t: Use 'bool' data type
target/arm920t: Use 'bool' data type
target/arm926ejs: Use 'bool' data type
target/avr32_ap7k: Use 'bool' data type
target/cortex_a: Use 'bool' data type
target/embeddedice: Use 'bool' data type
target/arm_semihosting: Use 'bool' data type
target/etb: Use 'bool' data type
target/feroceon: Use 'bool' data type
target/lakemont: Use 'bool' data type
target/openrisc/or1k: Use 'bool' data type
target/openrisc/x86_32_common: Use 'bool' data type
target/dsp563xx: Use 'bool' data type
target/xscale: Use 'bool' data type
target/mips: Use 'bool' data type
target/riscv: Free registers to avoid memory leak
target: Fix breakpoint usage
Fix 'adapter usb location' documentation
jtag/drivers/jtag_usb_common: Remove warning
jtag/drivers/jtag_usb_common: Fix variable name
contrib/rpc_examples: Remove 'ocd_' command prefix
target/arm_adiv5: Add type for AHB5-AP
target/cortex_m: Add support for AHB5-AP
tcl/target: Add initial Microchip SAML1x support
tcl/board: Add SAML11 Xplained Pro Evaluation Kit
configure.ac: Fix ST-Link adapter description
contrib/rpc_examples: Adapt to new command line handling
tcl/board: Add Rigado BMD-300 Evaluation Kit
flash/nor/tcl: Fix usage of 'flash erase_sector' command
libjaylink: Update to latest Git version
target/armv7m_trace: Improve SWO frequency auto-detection
contrib/rpc_examples: Add (dis)connect methods
tcl/board: Add config for STM32WB Nucleo board
tcl: Remove executable bit
flash/nor/stm32lx: Minor code cleanups
flash/nor/stm32f1x: Some small code cleanups
flash/nor/stm32h7x: Minor code cleanups
flash/nor/stm32l4x: Minor code cleanups
drivers: libusb1_common code cleanup
drivers: Rename 'libusb1_common' to 'libusb_helper'
flash/nor/stm32f1x: Group and cleanup device list
rtos: Destroy RTOS and fix memory leak
target: Add function to remove all breakpoints
target: Add possibility to remove all breakpoints
flash/nor/cfi: Minor code cleanups
flash/nor/kinetis: Minor code cleanups
flash/nor/avrf: Minor code cleanups
server/telnet: Fix history output
flash/nor/efm32: Some small code cleanups
flash/nor/bluenrg-x: Minor code cleanups
rtos/ChibiOS: Fix some coding styles
flash/nor/sh_qspi: Fix dead assignment
tcl/boards: Rename 'dk-tm4c129.cfg' to 'ti_dk-tm4c129.cfg'
tcl/boards: Rename 'ek-tm4c123gxl.cfg' to 'ti_ek-tm4c123gxl.cfg'
tcl/boards: Rename 'ek-tm4c1294xl.cfg' to 'ti_ek-tm4c1294xl.cfg'
flash/nor/stm32l4x: Fix check for number of arguments
target/armv7m_trace: Calculate prescaler for external capture devices
libjaylink: Update to latest Git version
flash/nor: Use proper data types in driver API
flash/nor/ambiqmicro: Use 'bool' data type
flash/nor/at91sam3: Use 'bool' data type
flash/nor/at91sam4: Use 'bool' data type
flash/nor/ath79: Use 'bool' data type
flash/nor/atsamv: Use 'bool' data type
flash/nor/cfi: Use 'bool' data type
flash/nor/em357: Use 'bool' data type
flash/nor/fespi: Use 'bool' data type
flash/nor/fm3: Use 'bool' data type
flash/nor/jtagspi: Use 'bool' data type
flash/nor/lpcspifi: Use 'bool' data type
flash/nor/max32xxx: Use 'bool' data type
flash/nor/mdr: Use 'bool' data type
flash/nor/mrvlqspi: Use 'bool' data type
flash/nor/pic32mx: Use 'bool' data type
flash/nor/sh_qspi: Use 'bool' data type
flash/nor/stm32h7x: Use 'bool' data type
flash/nor/stmsmi: Use 'bool' data type
flash/nor/w600: Use 'bool' data type
libjaylink: Update to 0.2.0 release
tcl/target: Add initial GigaDevice GD32VF103 support
Use capstone for ARM disassembler
doc: Improve 'jlink usb' description
target/image: Use proper data types
Add initial RTT support
Marek Vasut (31):
tcl/target: Add Renesas R-Car R8A7790 H2 target
tcl/target: Add Renesas R-Car R8A7794 E2 target
tcl/board: Add Renesas R-Car R8A7790 H2 Stout board
tcl/board: Add Renesas R-Car R8A7791 M2W Porter board
tcl/board: Add Renesas R-Car R8A7794 E2 Silk board
tcl/board: Factor out common R-Car Gen2 code
mips32: pracc: Fix UPPER/LOWER macros
mips32: pracc: Fix indent
tcl/board: Add Renesas RZ/A1H GR-Peach board
tcl/target: Add Renesas RZ/A1H target
tcl/target: Fix V3M/V3H SoC chipname
flash/nor: Factor out cfi_spansion_unlock_seq()
flash/nor: Factor out CFI memory read/write functions
flash/nor: Pass flash_bank to memory accessors
flash/nor: Drop size argument of cfi_target_{read,write}_memory()
flash/nor: Allow CFI memory read/write functions be overriden
flash/nor: Rename get_cfi_info() to cfi_get_info()
flash/nor: Rename flash_address() to cfi_flash_address()
flash/nor/sh_qspi: Add SH QSPI driver
flash/nor/nrf5: Fix build error on OSX
flash/nor: Export various functions from the CFI core
flash/nor: Add Renesas RPC HF driver
jtag: Fix copy-paste error in 'irscan' help
tcl/target: Abort on invalid SoC selection on R-Car Gen3
tcl/target: Add unified config for Renesas R-Car Gen2 targets
tcl/target: Switch Renesas R-Car Gen2 boards to new config
tcl/target: Drop old Renesas Gen2 SoC configs
tcl/target: Unify Renesas R-Car JTAG reset config
tcl/target: Fix naming of RZ/A1 SoC
travis: Add .travis.yml
tcl/target: Drop reference to renesas_gen2_common.cfg
Masatoshi Tateishi (1):
rtos: add support for NuttX
Matej Kogovsek (1):
jtag: drivers: add support for FT232R sync bitbang JTAG interfaces
Mateusz Manowiecki (1):
Add SWD protocol support to buspirate (2nd try)
Matthias Bock (1):
added interface config file for In-Circuit's ICprog OpenOCD JTAG adapter
Matthias Welwarsky (120):
aarch64: add symbolic definitions for armv8 opcodes
aarch64: fix reading of MPIDR
target: add -ctibase config option in addition to -dbgbase
aarch64: introduce dpm extension for ARMv8
aarch64: make DCC read/write functions operate on struct armv8_common
aarch64: Implement MA mode for bulk memory reads and writes
aarch64: deconflict debug register names
aarch64: fix context and hybrid hardware breakpoints
aarch64: formalize use of CTI in halt and resume
aarch64: fix error recovery in aarch64_dpm_prepare
aarch64: fix accesses to SCTLR_ELn register
aarch64: use symbolic opcodes instead of hex values
aarch64: fix entry into debug state
aarch64: fix reading of translation table registers
aarch64: fix cache identification
aarch64: correct breakpoint register offset
aarch64: clear breakpoint value register on removal
aarch64: remove armv7-a virt-to-phys code
aarch64: use symbolic constant for register count
aarch64: correct display for aarch64 state
aarch64: fix first examination
aarch64: use correct A64 instructions for cache handling
aarch64: unify armv7-a and armv8 debug entry decoding
aarch64: fix armv8_set_core_reg when destination is cpsr
aarch64: remove references to armv7-r
aarch64: fix stepping from address
aarch64: remove code for AHB-AP support
aarch64: fix duplication of register cache
aarch64: fix register list
aarch64: report the correct reason for halting after singlestep
aarch64: use correct instruction for software breakpoints
aarch64: disable interrupts when stepping [WIP]
aarch64: add cache handling functions
aarch64: add cache handling when setting/deleting soft breakpoints
aarch64: update smp halt and resume to better facilitate CTI
aarch64: add basic Aarch32 support
aarch64: refactor armv8 dpm
aarch64: armv8 cache functions update
aarch64: remove bogus os_border calculation
aarch64: slightly simplify breakpoint set function
aarch64: provide virt2phys command
aarch64: simplify armv8_set_cpsr()
aarch64: allow reading system control register when halted in EL0
aarch64: simplify armv8_read_ttbcr
aarch64: register access rewrite
aarch64: fix mode switching
aarch64: cache identification for aarch32 state
aarch64: handle exceptions taken in debug state
aarch64: make sure to enable HDE for all SMP PEs to be halted
aarch64: allow reading TTBR register when halted in EL0
aarch64: enable aarch32 debugging with arm gdb
aarch64: cleanup context restore
aarch64: discard async aborts on entering debug state
aarch64: consolidate sticky error handling
aarch64: enlarge value buffer of arm_reg to store 64 bit
aarch64: improve debug output
aarch64: remove unused struct components
aarch64: remove "mrs <Xt>, currentel" opcode
aarch64: remove arm command chain from aarch64 target commands
aarch64: use cached value of dscr register where needed
aarch64: don't segfault on reset when target is not examined
aarch64: don't try resuming if target is not halted
aarch64: fix software breakpoints when in aarch32 state
aarch64: refactor SCTLR manipulation
aarch64: remove mrs/msr functions from struct arm
aarch64: reduce debug output to improve legibility
aarch64: optimize core state detection
target: generic ARM CTI function wrapper
aarch64: remove bogus address check before memory access
armv8: load aarch32 register through aarch64 equivalent
armv8: factor out generic bit set/clr for debug registers
aarch64: reset fixes
aarch64: clean up target specific commands
aarch64: clean up struct aarch64_common
aarch64: run control rework
armv8: spelling and formatting updates
armv8_dpm: retrieve only necessary registers on halt
armv8_dpm: fix exception handling
tcl: add Hi6220 target and LeMaker HiKey board config
aarch64: clear CTI halt event early at debug entry
aarch64: add some documentation
board: introduce base config for TI BeagleBone family boards
Fix compile failure on MacOSX
aarch64: fix crash on single-stepping
aarch64: add 'maskisr' command
aarch64: simplify mode and state handling
aarch64: speed up first examination
aarch64: implement mmu on/off for aarch32
aarch64: clean up scan-build errors
cortex_a: faster debug init
icepick-d: extend access to core control register
cortex_a: fix handling of Thumb-2 32bit breakpoints
gdb_server: add support for vCont
rtos: facilitate RTOS SMP handling
rtos: run rtos create hook only once on autodetect
gdb_server: update rtos threads on new connection
rtos: fix rtos no-auto configuration
armv7a: cache ttbcr and ttb0/1 on debug state entry
gdb_server: fix ignored interrupt request from gdb during stepping
gdb_server: fake step if thread is not current rtos thread
aarch64: fix debug entry from EL0
tdesc: bitfields may carry a type
aarch64: add cpsr bitfields to target description
arm_cti: add cti command group
tcl/board: add configuration for the avnet ultrazed-eg starter kit
target: restructure dap support
arm_adi_v5: Add ability to ignore the CSYSPWRUPACK bit
target: free target SMP list on shutdown
tcl/board: add board configuration for NXP IMX7SABRE
target: add configuration for NXP MC-IMX8M-EVK
armv8: valgrind memleak fixes
target: add Cortex-M4 target to VF6xx target
board: add configuration for stm32f103c8 "Blue Pill"
cortex_a: fix virt2phys when mmu is disabled
target/mem_ap: generic mem-ap target
armv7a: ARMv7-A MMU tools
aarch64: support for aarch32 ARM_MODE_SYS
armv8: allow halt on exception
rtos/hwthread: add hardware-thread pseudo rtos
cortex_a: warn on broken debug_base setting
Megan Wachs (1):
jtag_vpi: correct runtest behavior
Mete Balci (3):
target/arm_adi_v5: fix typo
fix for sanitizer errors in left shifts
target/aarch64: a64 disassembler
Michael Betz (1):
nor/spi.c: add N25Q032A flash chip
Michael Hope (1):
flash/nor/atsame5: Fix a timeout when erasing
Michael Schwingen (1):
fix XScale register access
Michael Stoll (1):
Add support for SAMD21E17D device
Michal Potrzebicz (1):
cmsis_dap_usb: Support for Microchip's nEDBG CMSIS-DAP interface
Michele Sardo (2):
Added support for STMicroelectronics BlueNRG-1 and BlueNRG-2 SoC
Fix for warnings detected by clang static analyzer
Mickaël Thomas (1):
Add CMSIS-DAP v2 support
Mikhail Rasputin (2):
jtag/tcl: fix a double free of jim object
target: fix registers reading from non examined target
Mirko Vogt (2):
nrf5: add nrf5 device definition for HWID 0x00E3
nrf5: update links to compatibility matrixes for nrf5x variants
Moritz 'Morty' Strübe (1):
src/flash/startup.tcl: Add preverify to program command
Moritz Fischer (8):
tcl/cpld: add config file for Altera 5M570Z CPLD (MAXV family)
zynq_7000: Add expected id for Zynq 7z100 devices
zynq_7000: Add zynqpl_program command
rtos: Add RTOS task awareness for Chromium-EC
flash: stm32f2/f4/f7: Add One-Time-Porgrammable (OTP) support
jtag: drivers: xlnx-pcie-xvc: Add support for Xilinx XVC/PCIe
jtag: drivers: xlnx-pcie-xvc: Add support for SWD mode.
jtag: xlnx-pcie-xvc: Declare function static
Niklas Söderlund (1):
tcl/target: Add Renesas R-Car R8A7791 M2W target
Oleksandr Redchuk (1):
flash/nor/stm32f1x: fix options reading from locked chip
Oleksij Rempel (28):
board: tp-link_tl-mr3020: add ath79 support
target: add atheros_ar9344.cfg
board: add TP-Link WDR4300 config
target: atheros_ar9344: add simple uart0 test
target: add initial imx7.cfg
armv7a: forward error value in armv7a_cache_auto_flush_all_data
mips_m4k: add optional reset handler
tcl/target: add config for Qualcomm QCA4531
tcl/board: add config for 8devices LIMA board
tcl/target/atheros_ar9331: add DDR2 helper
tcl/target/atheros_ar9331: add documentation and extra helpers
tcl/board: add DPTechnics DPT-Board-v1
fpga/altera-10m50: add all device id
target|board: Add Intel (Altera) Arria 10 target and related board
tcl/target: add Allwinner V3s SoC support
libusb: return oocd error values
ftdi: extend ftdi_location format
flash: nor: ath79: remove base calculation
jtag: drivers: provide initial support for usb path filtering
doc: add documentation for "adapter usb location" command
doc: fix typo in "adapter usb location" command
ftdi: use "adapter usb location" instead of ftdi_location command
libjaylink: Update to latest Git version
jlink: add usb location support
jtag_libusb_bulk_read|write: return error code instead of size
jtag: adapter: rework adapter related commands
move ftdi_location deprecation helper to proper place
remove libusb0_common support
Omair Javaid (9):
Allow generation of nested target defined types in gdb target xml
Support AArch64 SIMD/FP registers read/write
Support for AArch32 SIMD/Floating-point registers
Support for Arm VFP v3 registers read/write
Fix Semihosting FileIO for targets using vcont packet
Add ARM v8 AArch64 semihosting support
GDB fileIO stdout support
Support for debugging on ARMv8-M CPUs
Configs for ARM corelink SSE-200 target and Musca A board
Patrick Stewart (1):
ftdi swd: disable SWD output pin during input
Paul Bartholomew (1):
target/cortex_a: fix compile error for uninitialized variable
Paul Fertser (78):
Restore normal development cycle
flash: nor: ath79: fix build failure due to recent MIPS changes
configure: bring back all default JimTcl extensions
jtag: drivers: st...
[truncated message content] |
|
From: OpenOCD-Gerrit <ope...@us...> - 2020-12-09 14:31:53
|
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- Log -----------------------------------------------------------------
commit 9d3f33757030c30c138405dd8a63cef8fd68184c
Author: Antonio Borneo <bor...@gm...>
Date: Sun Dec 6 18:19:01 2020 +0100
doc: document adapter drivers linuxgpiod and sysfsgpio
Change-Id: If894092a7ae04bb95fa1913d2e3c8465c2d0f75c
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/5961
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tar...@gm...>
diff --git a/doc/openocd.texi b/doc/openocd.texi
index cc7b6b22e..670d97040 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -623,6 +623,13 @@ emulation model of target hardware.
@item @b{xlnx_pcie_xvc}
@* A JTAG driver exposing Xilinx Virtual Cable over PCI Express to OpenOCD as JTAG/SWD interface.
+@item @b{linuxgpiod}
+@* A bitbang JTAG driver using Linux GPIO through library libgpiod.
+
+@item @b{sysfsgpio}
+@* A bitbang JTAG driver using Linux legacy sysfs GPIO.
+This is deprecated from Linux v5.3; prefer using @b{linuxgpiod}.
+
@end itemize
@node About Jim-Tcl
@@ -3240,6 +3247,22 @@ pinout.
@end deffn
+@deffn {Interface Driver} {linuxgpiod}
+Linux provides userspace access to GPIO through libgpiod since Linux kernel version v4.6.
+The driver emulates either JTAG and SWD transport through bitbanging.
+
+See @file{interface/dln-2-gpiod.cfg} for a sample config.
+@end deffn
+
+
+@deffn {Interface Driver} {sysfsgpio}
+Linux legacy userspace access to GPIO through sysfs is deprecated from Linux kernel version v5.3.
+Prefer using @b{linuxgpiod}, instead.
+
+See @file{interface/sysfsgpio-raspberrypi.cfg} for a sample config.
+@end deffn
+
+
@deffn {Interface Driver} {openjtag}
OpenJTAG compatible USB adapter.
This defines some driver-specific commands:
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
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commit 2bbd85a828f0ea43307a0ca92810570c376002d0
Author: Antonio Borneo <bor...@gm...>
Date: Sat Dec 5 23:28:53 2020 +0100
flash/nor/stmsmi: fix compile error with clang 12.0.0
The git preliminarily version of clang 12.0.0_r370171
f067bc3c0ad6 reports an error in the expansion of the macro
SMI_READ_REG():
error: '(' and '{' tokens introducing statement expression
appear in different macro expansion contexts
[-Werror,-Wcompound-token-split-by-macro]
Remove one intermediate macro expansion to make clang happy.
Change-Id: I8ae6d9c18808467ba8044d70cbf0a4f76a18d3e6
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/5958
Tested-by: jenkins
Reviewed-by: Xiaofan <xia...@gm...>
diff --git a/src/flash/nor/stmsmi.c b/src/flash/nor/stmsmi.c
index e73dd22f6..f633e3619 100644
--- a/src/flash/nor/stmsmi.c
+++ b/src/flash/nor/stmsmi.c
@@ -41,9 +41,8 @@
#include <jtag/jtag.h>
#include <helper/time_support.h>
-#define SMI_READ_REG(a) (_SMI_READ_REG(a))
-#define _SMI_READ_REG(a) \
-{ \
+#define SMI_READ_REG(a) \
+({ \
int _ret; \
uint32_t _value; \
\
@@ -51,7 +50,7 @@
if (_ret != ERROR_OK) \
return _ret; \
_value; \
-}
+})
#define SMI_WRITE_REG(a, v) \
{ \
commit 39380318c89990b4661246d367de3fa820c835ca
Author: Åukasz Misek <luk...@us...>
Date: Tue Jan 6 15:53:09 2015 +0300
jtag/drivers/ulink: auto-detect OpenULINK USB endpoints numbers
This should provide greater compatibility with different OpenULINK
targets which might be using various endpoints numbers. Since they're
advertised in the USB descriptor anyway it makes sense to autodetect
them.
Interface is no longer claimed before attempting to load firmware to a
freshly booted device, so I have no idea if this will break on windows
or other uncommon systems (Paul).
Change-Id: Iee10dcb6911dcf46239c430e174d9f98b5bde3c2
Signed-off-by: Paul Fertser <fer...@gm...>
Reviewed-on: http://openocd.zylin.com/2445
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/jtag/drivers/ulink.c b/src/jtag/drivers/ulink.c
index fd08c1661..f473ce39a 100644
--- a/src/jtag/drivers/ulink.c
+++ b/src/jtag/drivers/ulink.c
@@ -25,6 +25,7 @@
#include <jtag/commands.h>
#include <target/image.h>
#include <libusb.h>
+#include "libusb_helper.h"
#include "OpenULINK/include/msgtypes.h"
/** USB Vendor ID of ULINK device in unconfigured state (no firmware loaded
@@ -148,6 +149,9 @@ struct ulink {
struct libusb_device_handle *usb_device_handle;
enum ulink_type type;
+ unsigned int ep_in; /**< IN endpoint number */
+ unsigned int ep_out; /**< OUT endpoint number */
+
int delay_scan_in; /**< Delay value for SCAN_IN commands */
int delay_scan_out; /**< Delay value for SCAN_OUT commands */
int delay_scan_io; /**< Delay value for SCAN_IO commands */
@@ -250,7 +254,7 @@ static struct ulink *ulink_handle;
/**************************** USB helper functions ****************************/
/**
- * Opens the ULINK device and claims its USB interface.
+ * Opens the ULINK device
*
* Currently, only the original ULINK is supported
*
@@ -288,9 +292,6 @@ static int ulink_usb_open(struct ulink **device)
return ERROR_FAIL;
libusb_free_device_list(usb_devices, 1);
- if (libusb_claim_interface(usb_device_handle, 0) != 0)
- return ERROR_FAIL;
-
(*device)->usb_device_handle = usb_device_handle;
(*device)->type = ULINK_1;
@@ -725,7 +726,7 @@ static int ulink_execute_queued_commands(struct ulink *device, int timeout)
}
/* Send packet to ULINK */
- ret = libusb_bulk_transfer(device->usb_device_handle, (2 | LIBUSB_ENDPOINT_OUT),
+ ret = libusb_bulk_transfer(device->usb_device_handle, device->ep_out,
(unsigned char *)buffer, count_out, &transferred, timeout);
if (ret != 0)
return ERROR_FAIL;
@@ -734,7 +735,7 @@ static int ulink_execute_queued_commands(struct ulink *device, int timeout)
/* Wait for response if commands contain IN payload data */
if (count_in > 0) {
- ret = libusb_bulk_transfer(device->usb_device_handle, (2 | LIBUSB_ENDPOINT_IN),
+ ret = libusb_bulk_transfer(device->usb_device_handle, device->ep_in,
(unsigned char *)buffer, 64, &transferred, timeout);
if (ret != 0)
return ERROR_FAIL;
@@ -2156,6 +2157,12 @@ static int ulink_init(void)
} else
LOG_INFO("ULINK device is already running OpenULINK firmware");
+ /* Get OpenULINK USB IN/OUT endpoints and claim the interface */
+ ret = jtag_libusb_choose_interface(ulink_handle->usb_device_handle,
+ &ulink_handle->ep_in, &ulink_handle->ep_out, -1, -1, -1, -1);
+ if (ret != ERROR_OK)
+ return ret;
+
/* Initialize OpenULINK command queue */
ulink_clear_queue(ulink_handle);
@@ -2171,7 +2178,7 @@ static int ulink_init(void)
* shut down by the user via Ctrl-C. Try to retrieve this Bulk IN packet. */
dummy = calloc(64, sizeof(uint8_t));
- ret = libusb_bulk_transfer(ulink_handle->usb_device_handle, (2 | LIBUSB_ENDPOINT_IN),
+ ret = libusb_bulk_transfer(ulink_handle->usb_device_handle, ulink_handle->ep_in,
dummy, 64, &transferred, 200);
free(dummy);
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/stmsmi.c | 7 +++----
src/jtag/drivers/ulink.c | 21 ++++++++++++++-------
2 files changed, 17 insertions(+), 11 deletions(-)
hooks/post-receive
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From: OpenOCD-Gerrit <ope...@us...> - 2020-12-09 14:30:31
|
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commit cc26808136d483e4bf0d1fc0dc3ce199de637f1f
Author: Tarek BOCHKATI <tar...@st...>
Date: Fri Nov 20 20:25:38 2020 +0100
flash/nor/sfdp|stmqspi: fix build issue with clang on mac OS
Change-Id: I3b3aa4236125523ad65fd615ada0f5647d26f526
Signed-off-by: Tarek BOCHKATI <tar...@st...>
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/5940
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tar...@gm...>
diff --git a/src/flash/nor/sfdp.c b/src/flash/nor/sfdp.c
index 2fbc37d1f..2183ac1f1 100644
--- a/src/flash/nor/sfdp.c
+++ b/src/flash/nor/sfdp.c
@@ -90,8 +90,8 @@ int spi_sfdp(struct flash_bank *bank, struct flash_device *dev,
return ERROR_FLASH_BANK_NOT_PROBED;
}
if (((header.revision >> 24) & 0xFF) != SFDP_ACCESS_PROT) {
- LOG_ERROR("access protocol 0x%02" PRIx8 " not implemented",
- (header.revision >> 24) & 0xFF);
+ LOG_ERROR("access protocol 0x%02x not implemented",
+ (header.revision >> 24) & 0xFFU);
return ERROR_FLASH_BANK_NOT_PROBED;
}
diff --git a/src/flash/nor/stmqspi.c b/src/flash/nor/stmqspi.c
index 11529f410..f54e4975d 100644
--- a/src/flash/nor/stmqspi.c
+++ b/src/flash/nor/stmqspi.c
@@ -455,8 +455,8 @@ static int qspi_write_enable(struct flash_bank *bank)
if ((stmqspi_info->saved_cr & (BIT(SPI_DUAL_FLASH) | BIT(SPI_FSEL_FLASH)))
!= BIT(SPI_FSEL_FLASH))
if ((status & (SPIFLASH_WE_BIT | SPIFLASH_BSY_BIT)) != SPIFLASH_WE_BIT) {
- LOG_ERROR("Cannot write enable flash1. Status=0x%02" PRIx8,
- status & 0xFF);
+ LOG_ERROR("Cannot write enable flash1. Status=0x%02x",
+ status & 0xFFU);
return ERROR_FLASH_OPERATION_FAILED;
}
@@ -464,8 +464,8 @@ static int qspi_write_enable(struct flash_bank *bank)
status >>= 8;
if ((stmqspi_info->saved_cr & (BIT(SPI_DUAL_FLASH) | BIT(SPI_FSEL_FLASH))) != 0)
if ((status & (SPIFLASH_WE_BIT | SPIFLASH_BSY_BIT)) != SPIFLASH_WE_BIT) {
- LOG_ERROR("Cannot write enable flash2. Status=0x%02" PRIx8,
- status & 0xFF);
+ LOG_ERROR("Cannot write enable flash2. Status=0x%02x",
+ status & 0xFFU);
return ERROR_FLASH_OPERATION_FAILED;
}
@@ -548,8 +548,8 @@ COMMAND_HANDLER(stmqspi_handle_mass_erase_command)
if (((stmqspi_info->saved_cr & (BIT(SPI_DUAL_FLASH) | BIT(SPI_FSEL_FLASH)))
!= BIT(SPI_FSEL_FLASH)) && ((status & SPIFLASH_BSY_BIT) == 0) &&
((status & SPIFLASH_WE_BIT) != 0)) {
- LOG_ERROR("Mass erase command not accepted by flash1. Status=0x%02" PRIx8,
- status & 0xFF);
+ LOG_ERROR("Mass erase command not accepted by flash1. Status=0x%02x",
+ status & 0xFFU);
retval = ERROR_FLASH_OPERATION_FAILED;
goto err;
}
@@ -559,8 +559,8 @@ COMMAND_HANDLER(stmqspi_handle_mass_erase_command)
if (((stmqspi_info->saved_cr & (BIT(SPI_DUAL_FLASH) | BIT(SPI_FSEL_FLASH))) != 0) &&
((status & SPIFLASH_BSY_BIT) == 0) &&
((status & SPIFLASH_WE_BIT) != 0)) {
- LOG_ERROR("Mass erase command not accepted by flash2. Status=0x%02" PRIx8,
- status & 0xFF);
+ LOG_ERROR("Mass erase command not accepted by flash2. Status=0x%02x",
+ status & 0xFFU);
retval = ERROR_FLASH_OPERATION_FAILED;
goto err;
}
@@ -959,8 +959,8 @@ static int qspi_erase_sector(struct flash_bank *bank, unsigned int sector)
if (((stmqspi_info->saved_cr & (BIT(SPI_DUAL_FLASH) | BIT(SPI_FSEL_FLASH)))
!= BIT(SPI_FSEL_FLASH)) && ((status & SPIFLASH_BSY_BIT) == 0) &&
((status & SPIFLASH_WE_BIT) != 0)) {
- LOG_ERROR("Sector erase command not accepted by flash1. Status=0x%02" PRIx8,
- status & 0xFF);
+ LOG_ERROR("Sector erase command not accepted by flash1. Status=0x%02x",
+ status & 0xFFU);
retval = ERROR_FLASH_OPERATION_FAILED;
goto err;
}
@@ -971,8 +971,8 @@ static int qspi_erase_sector(struct flash_bank *bank, unsigned int sector)
if (((stmqspi_info->saved_cr & (BIT(SPI_DUAL_FLASH) | BIT(SPI_FSEL_FLASH))) != 0) &&
((status & SPIFLASH_BSY_BIT) == 0) &&
((status & SPIFLASH_WE_BIT) != 0)) {
- LOG_ERROR("Sector erase command not accepted by flash2. Status=0x%02" PRIx8,
- status & 0xFF);
+ LOG_ERROR("Sector erase command not accepted by flash2. Status=0x%02x",
+ status & 0xFFU);
retval = ERROR_FLASH_OPERATION_FAILED;
goto err;
}
@@ -1214,7 +1214,7 @@ static int stmqspi_blank_check(struct flash_bank *bank)
/* we need le_32_to_h, but that's the same as h_to_le_32 */
result = h_to_le_32(erase_check_info.result);
bank->sectors[sector + index].is_erased = ((result & 0xFF) == 0xFF);
- LOG_DEBUG("Flash sector %u checked: 0x%04" PRIx16, sector + index, result & 0xFFFF);
+ LOG_DEBUG("Flash sector %u checked: 0x%04x", sector + index, result & 0xFFFFU);
}
keep_alive();
sector += count;
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/sfdp.c | 4 ++--
src/flash/nor/stmqspi.c | 26 +++++++++++++-------------
2 files changed, 15 insertions(+), 15 deletions(-)
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From: OpenOCD-Gerrit <ope...@us...> - 2020-12-05 23:19:43
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commit 861e75f54efbcc1e0717192c6ddb120478d6c226
Author: Antonio Borneo <bor...@gm...>
Date: Thu Nov 5 23:02:55 2020 +0100
jimtcl: switch to github
The 'historically' main repository of jimtcl in repo.or.cz has
lost sync with the github current main repository since July 2020.
The new tag 0.80 is not present in repo.or.cz.
The developer of jimtcl has been in contact with the admins of
repo.or.cz to fix the not better described sync issues and has now
decided to stop any further tentative. A new README has been added
on 2020-11-19 in the old repository to inform that it is abandoned
in favour of github. The old content in repo.or.cz will remain due
to forks that still exists in the same server.
Switch OpenOCD git submodules to fetch jimtcl code from the main
development repository in github.
Change-Id: Ia2d59f1347ccfe374538b38131badfd46054eb91
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/5948
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <and...@gm...>
diff --git a/.gitmodules b/.gitmodules
index 958c5d901..23ffa2543 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -3,7 +3,7 @@
url = https://repo.or.cz/git2cl.git
[submodule "jimtcl"]
path = jimtcl
- url = https://repo.or.cz/jimtcl.git
+ url = https://github.com/msteveb/jimtcl.git
[submodule "src/jtag/drivers/libjaylink"]
path = src/jtag/drivers/libjaylink
url = https://repo.or.cz/libjaylink.git
commit 1d3d87695c62be88d4a87c7d57de6084d654396b
Author: Antonio Borneo <bor...@gm...>
Date: Sun Nov 15 22:10:58 2020 +0100
target/register: use an array of uint8_t for register's value
The use of 'void *' makes the pointer arithmetic incompatible with
standard C, even if this is allowed by GCC extensions.
The use of 'void *' can also hide incorrect pointer assignments.
Switch to 'uint8_t *' and add GCC warning flag to track any use of
pointer arithmetic extension.
Change-Id: Ic4d15a232834cd6b374330f70e2473a359b1607f
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/5937
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <and...@gm...>
diff --git a/configure.ac b/configure.ac
index 9cb20ad89..c8978b94d 100644
--- a/configure.ac
+++ b/configure.ac
@@ -833,6 +833,7 @@ AS_IF([test "x${gcc_wextra}" = "xyes"], [
GCC_WARNINGS="${GCC_WARNINGS} -Wbad-function-cast"
GCC_WARNINGS="${GCC_WARNINGS} -Wcast-align"
GCC_WARNINGS="${GCC_WARNINGS} -Wredundant-decls"
+ GCC_WARNINGS="${GCC_WARNINGS} -Wpointer-arith"
])
AS_IF([test "x${gcc_werror}" = "xyes"], [
GCC_WARNINGS="${GCC_WARNINGS} -Werror"
diff --git a/src/target/arc.c b/src/target/arc.c
index cec6441a5..ffe974532 100644
--- a/src/target/arc.c
+++ b/src/target/arc.c
@@ -305,7 +305,7 @@ static int arc_init_reg(struct target *target, struct reg *reg,
/* Initialize struct reg */
reg->name = reg_desc->name;
reg->size = 32; /* All register in ARC are 32-bit */
- reg->value = ®_desc->reg_value;
+ reg->value = reg_desc->reg_value;
reg->type = &arc_reg_type;
reg->arch_info = reg_desc;
reg->caller_save = true; /* @todo should be configurable. */
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index d992aa78b..797f61c93 100644
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -1393,7 +1393,7 @@ static int arm7_9_full_context(struct target *target)
struct arm *arm = &arm7_9->arm;
struct {
uint32_t value;
- void *reg_p;
+ uint8_t *reg_p;
} read_cache[6 * (16 + 1)];
int read_cache_idx = 0;
diff --git a/src/target/etm.c b/src/target/etm.c
index 93dbd2948..faa941fed 100644
--- a/src/target/etm.c
+++ b/src/target/etm.c
@@ -279,7 +279,7 @@ static void etm_reg_add(unsigned bcd_vers, struct arm_jtag *jtag_info,
reg->name = r->name;
reg->size = r->size;
- reg->value = &ereg->value;
+ reg->value = ereg->value;
reg->arch_info = ereg;
reg->type = &etm_scan6_type;
reg++;
diff --git a/src/target/register.h b/src/target/register.h
index 1bae81183..5f1c25fb4 100644
--- a/src/target/register.h
+++ b/src/target/register.h
@@ -127,7 +127,7 @@ struct reg {
bool caller_save;
/* Pointer to place where the value is stored, in the format understood by
* the binarybuffer.h functions. */
- void *value;
+ uint8_t *value;
/* The stored value needs to be written to the target. */
bool dirty;
/* When true, value is valid. */
diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c
index 53af07ec3..0d1cee1bf 100644
--- a/src/target/riscv/riscv.c
+++ b/src/target/riscv/riscv.c
@@ -4128,7 +4128,7 @@ int riscv_init_registers(struct target *target)
reg_name += strlen(reg_name) + 1;
assert(reg_name < info->reg_names + target->reg_cache->num_regs *
max_reg_name_len);
- r->value = &info->reg_cache_values[number];
+ r->value = info->reg_cache_values[number];
}
return ERROR_OK;
diff --git a/src/target/riscv/riscv.h b/src/target/riscv/riscv.h
index 7e74cf730..d943134e2 100644
--- a/src/target/riscv/riscv.h
+++ b/src/target/riscv/riscv.h
@@ -68,8 +68,8 @@ typedef struct {
/* OpenOCD's register cache points into here. This is not per-hart because
* we just invalidate the entire cache when we change which hart is
- * selected. */
- uint64_t reg_cache_values[RISCV_MAX_REGISTERS];
+ * selected. Use an array of 8 uint8_t per register. */
+ uint8_t reg_cache_values[RISCV_MAX_REGISTERS][8];
/* Single buffer that contains all register names, instead of calling
* malloc for each register. Needs to be freed when reg_list is freed. */
commit b5e015357ad4ae1fbb286f9bf6c22a563ab93eb7
Author: Antonio Borneo <bor...@gm...>
Date: Sun Nov 22 13:02:32 2020 +0100
mips_mips64: fix minor host endianness bug
Commit 80f1a92bd798 ("mips64: Add generic mips64 target support")
adds a log of the target's program counter in function
mips_mips64_debug_entry() by directly casting the little-endian
buffer in pc->value.
This is going to print an incorrect value on big-endian hosts.
Use the function buf_get_u64() to return the register value.
Not tested on real HW. Issue identified with GCC compiler flag
'-Wcast-align=strict' after change http://openocd.zylin.com/5937/
("target/register: use an array of uint8_t for register's value").
Change-Id: Icbda2b54a03fdec287c804e623f5db4252f9cd2a
Signed-off-by: Antonio Borneo <bor...@gm...>
Fixes: 80f1a92bd798 ("mips64: Add generic mips64 target support")
Reviewed-on: http://openocd.zylin.com/5944
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <and...@gm...>
diff --git a/src/target/mips_mips64.c b/src/target/mips_mips64.c
index f941af517..0fc089726 100644
--- a/src/target/mips_mips64.c
+++ b/src/target/mips_mips64.c
@@ -62,7 +62,7 @@ static int mips_mips64_debug_entry(struct target *target)
mips_mips64_examine_debug_reason(target);
LOG_DEBUG("entered debug state at PC 0x%" PRIx64 ", target->state: %s",
- *(uint64_t *)pc->value, target_state_name(target));
+ buf_get_u64(pc->value, 0, 64), target_state_name(target));
return ERROR_OK;
}
commit a56b7291911b4f42718d406dd2de857db4c11e0f
Author: Antonio Borneo <bor...@gm...>
Date: Sun Nov 22 12:29:04 2020 +0100
arm7_9_common: fix host endianness bug in arm7_9_full_context()
The original code passes to ->read_core_regs() and to
->read_xpsr() the pointer to the little-endian buffer reg.value.
This is incorrect because the two functions above require a
pointer to uint32_t, since they already run the conversion with
arm_le_to_h_u32() in the jtag callback.
This causes a mismatch on big-endian host and the registers get
read with the incorrect endianness.
Use an intermediate buffer to read the registers as uint32_t and
to track the destination reg.value pointer, then copy the value in
reg.value after the call to jtag_execute_queue().
Tested with qemu-armeb and an OpenOCD built through buildroot
configured for cortex-a7 big-endian.
Note that if jtag_execute_queue() fails, the openocd register
cache is not updated, so the already modified flags 'valid' and
'dirty' are incorrect. This part should be moved after the call to
jtag_execute_queue() too.
Change-Id: Iba70d964ffbb74bf0860bfd9d299f218e3bc65bf
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/5943
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <and...@gm...>
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index d70d27377..d992aa78b 100644
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -1391,6 +1391,11 @@ static int arm7_9_full_context(struct target *target)
int retval;
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
struct arm *arm = &arm7_9->arm;
+ struct {
+ uint32_t value;
+ void *reg_p;
+ } read_cache[6 * (16 + 1)];
+ int read_cache_idx = 0;
LOG_DEBUG("-");
@@ -1433,10 +1438,12 @@ static int arm7_9_full_context(struct target *target)
for (j = 0; j < 15; j++) {
if (!ARMV4_5_CORE_REG_MODE(arm->core_cache,
armv4_5_number_to_mode(i), j).valid) {
- reg_p[j] = (uint32_t *)ARMV4_5_CORE_REG_MODE(
+ read_cache[read_cache_idx].reg_p = ARMV4_5_CORE_REG_MODE(
arm->core_cache,
armv4_5_number_to_mode(i),
j).value;
+ reg_p[j] = &read_cache[read_cache_idx].value;
+ read_cache_idx++;
mask |= 1 << j;
ARMV4_5_CORE_REG_MODE(arm->core_cache,
armv4_5_number_to_mode(i),
@@ -1454,9 +1461,10 @@ static int arm7_9_full_context(struct target *target)
/* check if the PSR has to be read */
if (!ARMV4_5_CORE_REG_MODE(arm->core_cache, armv4_5_number_to_mode(i),
16).valid) {
- arm7_9->read_xpsr(target,
- (uint32_t *)ARMV4_5_CORE_REG_MODE(arm->core_cache,
- armv4_5_number_to_mode(i), 16).value, 1);
+ read_cache[read_cache_idx].reg_p = ARMV4_5_CORE_REG_MODE(arm->core_cache,
+ armv4_5_number_to_mode(i), 16).value;
+ arm7_9->read_xpsr(target, &read_cache[read_cache_idx].value, 1);
+ read_cache_idx++;
ARMV4_5_CORE_REG_MODE(arm->core_cache, armv4_5_number_to_mode(i),
16).valid = true;
ARMV4_5_CORE_REG_MODE(arm->core_cache, armv4_5_number_to_mode(i),
@@ -1472,6 +1480,14 @@ static int arm7_9_full_context(struct target *target)
retval = jtag_execute_queue();
if (retval != ERROR_OK)
return retval;
+ /*
+ * FIXME: regs in cache should be tagged as 'valid' only now,
+ * not before the jtag_execute_queue()
+ */
+ while (read_cache_idx) {
+ read_cache_idx--;
+ buf_set_u32(read_cache[read_cache_idx].reg_p, 0, 32, read_cache[read_cache_idx].value);
+ }
return ERROR_OK;
}
commit 62686ab161e9c46a620dd592b2767634e9483c20
Author: Antonio Borneo <bor...@gm...>
Date: Sun Nov 22 00:33:59 2020 +0100
armv4_5: fix output of command 'arm reg'
Commit fc2abe63fd3c ("armv7m: use generic arm::core_mode") adds
two special modes for ARMv6M and ARMv7M in struct arm_mode_data[].
While these modes do not have any additional register to be dumped
by command 'arm reg', the command still prints an header for these
modes but not followed by any register.
Detect the special modes for ARMv6M and ARMv7M and skip them to
avoid printing the useless header.
Change-Id: I04145769e5742624f143c910eebf9a6f6d8e3cdc
Signed-off-by: Antonio Borneo <bor...@gm...>
Fixes: fc2abe63fd3c ("armv7m: use generic arm::core_mode")
Reviewed-on: http://openocd.zylin.com/5942
Tested-by: jenkins
diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index 8ac482504..b725853fe 100644
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -856,6 +856,9 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
char *sep = "\n";
char *shadow = "";
+ if (!arm_mode_data[mode].n_indices)
+ continue;
+
/* label this bank of registers (or shadows) */
switch (arm_mode_data[mode].psr) {
case ARM_MODE_SYS:
commit 693b8501e5b1233b87420b1c9d5cbbb3b943b285
Author: Antonio Borneo <bor...@gm...>
Date: Sun Nov 22 00:15:44 2020 +0100
armv4_5: fix segmentation fault in command 'arm reg'
Commit fed713104904 ("armv4_5: support weirdo ARMv6 secure monitor
mode") introduces the secure mode 28 of ARMv6 as a synonymous of
mode 22 (MON), but does not add it in the switch/case in command
'arm reg'.
When command 'arm reg' scans the array arm_mode_data[] on targets
without secure modes, it does not detect the new secure mode as
not supported by the architecture, thus triggers a segmentation
fault when it try to read the register's value from unallocated
memory.
Issue detected with target arm926ejs.
Add the new mode in the switch/case and treat it as the mode MON.
Change-Id: I2b72cc558e097879a7ee6ea601200bfda6b60270
Signed-off-by: Antonio Borneo <bor...@gm...>
Fixes: fed713104904 ("armv4_5: support weirdo ARMv6 secure monitor mode")
Reviewed-on: http://openocd.zylin.com/5941
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tar...@gm...>
diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index 7da28e349..8ac482504 100644
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -869,6 +869,7 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
continue;
/* FALLTHROUGH */
case ARM_MODE_MON:
+ case ARM_MODE_1176_MON:
if (arm->core_type != ARM_CORE_TYPE_SEC_EXT
&& arm->core_type != ARM_CORE_TYPE_VIRT_EXT)
continue;
-----------------------------------------------------------------------
Summary of changes:
.gitmodules | 2 +-
configure.ac | 1 +
src/target/arc.c | 2 +-
src/target/arm7_9_common.c | 24 ++++++++++++++++++++----
src/target/armv4_5.c | 4 ++++
src/target/etm.c | 2 +-
src/target/mips_mips64.c | 2 +-
src/target/register.h | 2 +-
src/target/riscv/riscv.c | 2 +-
src/target/riscv/riscv.h | 4 ++--
10 files changed, 33 insertions(+), 12 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2020-12-05 23:19:00
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via ba58d90f6fed652d94c8c6262a43e1d836241e00 (commit)
from 7b641d3d4e9b0407e5410267459fcbc64f075fde (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit ba58d90f6fed652d94c8c6262a43e1d836241e00
Author: Boran Car <bor...@he...>
Date: Fri Jun 21 18:42:17 2019 +0100
jep106: Add new IDs from JEDEC
From JEP106AZ, released on May 24, 2019.
Change-Id: I768b7077ec6abcd19ae1530b5715c7ea993add67
Signed-off-by: Boran Car <bor...@he...>
Reviewed-on: http://openocd.zylin.com/5244
Tested-by: jenkins
Reviewed-by: Jonathan McDowell <noo...@ea...>
Reviewed-by: Tarek BOCHKATI <tar...@gm...>
Reviewed-by: Tomas Vanek <va...@fb...>
Reviewed-by: Jiri Kastner <cz1...@gm...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/helper/jep106.inc b/src/helper/jep106.inc
index c0295a603..76e6137be 100644
--- a/src/helper/jep106.inc
+++ b/src/helper/jep106.inc
@@ -1,4 +1,9 @@
-/* Autogenerated with update_jep106.pl*/
+/*
+ * Should be autogenerated with update_jep106.pl but latest
+ * file from JEDEC is only available in PDF form. The PDF
+ * also breaks the pdftotext flow due to embedded watermarks.
+ * Created with a mix of scripts and manual editing.
+ */
[0][0x01 - 1] = "AMD",
[0][0x02 - 1] = "AMI",
[0][0x03 - 1] = "Fairchild",
@@ -40,7 +45,7 @@
[0][0x27 - 1] = "Intl. CMOS Technology",
[0][0x28 - 1] = "SSSI",
[0][0x29 - 1] = "MicrochipTechnology",
-[0][0x2a - 1] = "Ricoh Ltd.",
+[0][0x2a - 1] = "Ricoh Ltd",
[0][0x2b - 1] = "VLSI",
[0][0x2c - 1] = "Micron Technology",
[0][0x2d - 1] = "SK Hynix",
@@ -67,7 +72,7 @@
[0][0x42 - 1] = "Macronix",
[0][0x43 - 1] = "Xerox",
[0][0x44 - 1] = "Plus Logic",
-[0][0x45 - 1] = "SanDisk Corporation",
+[0][0x45 - 1] = "Western Digital Technologies Inc",
[0][0x46 - 1] = "Elan Circuit Tech.",
[0][0x47 - 1] = "European Silicon Str.",
[0][0x48 - 1] = "Apple Computer",
@@ -142,7 +147,7 @@
[1][0x0f - 1] = "Robert Bosch",
[1][0x10 - 1] = "Chip Express",
[1][0x11 - 1] = "DATARAM",
-[1][0x12 - 1] = "United Microelectronics Corp.",
+[1][0x12 - 1] = "United Microelectronics Corp",
[1][0x13 - 1] = "TCSI",
[1][0x14 - 1] = "Smart Modular",
[1][0x15 - 1] = "Hughes Aircraft",
@@ -156,7 +161,7 @@
[1][0x1d - 1] = "Integrated Silicon Solution (ISSI)",
[1][0x1e - 1] = "DoD",
[1][0x1f - 1] = "Integ. Memories Tech.",
-[1][0x20 - 1] = "Corollary Inc.",
+[1][0x20 - 1] = "Corollary Inc",
[1][0x21 - 1] = "Dallas Semiconductor",
[1][0x22 - 1] = "Omnivision",
[1][0x23 - 1] = "EIV(Switzerland)",
@@ -171,18 +176,18 @@
[1][0x2c - 1] = "Celestica",
[1][0x2d - 1] = "Century",
[1][0x2e - 1] = "Hal Computers",
-[1][0x2f - 1] = "Rohm Company Ltd.",
+[1][0x2f - 1] = "Rohm Company Ltd",
[1][0x30 - 1] = "Juniper Networks",
[1][0x31 - 1] = "Libit Signal Processing",
[1][0x32 - 1] = "Mushkin Enhanced Memory",
[1][0x33 - 1] = "Tundra Semiconductor",
-[1][0x34 - 1] = "Adaptec Inc.",
+[1][0x34 - 1] = "Adaptec Inc",
[1][0x35 - 1] = "LightSpeed Semi.",
-[1][0x36 - 1] = "ZSP Corp.",
+[1][0x36 - 1] = "ZSP Corp",
[1][0x37 - 1] = "AMIC Technology",
[1][0x38 - 1] = "Adobe Systems",
[1][0x39 - 1] = "Dynachip",
-[1][0x3a - 1] = "PNY Technologies, Inc.",
+[1][0x3a - 1] = "PNY Technologies Inc",
[1][0x3b - 1] = "Newport Digital",
[1][0x3c - 1] = "MMC Networks",
[1][0x3d - 1] = "T Square",
@@ -194,8 +199,8 @@
[1][0x43 - 1] = "Suwa Electronics",
[1][0x44 - 1] = "Transmeta",
[1][0x45 - 1] = "Micron CMS",
-[1][0x46 - 1] = "American Computer & Digital",
-[1][0x47 - 1] = "Enhance 3000 Inc.",
+[1][0x46 - 1] = "American Computer & Digital Components Inc",
+[1][0x47 - 1] = "Enhance 3000 Inc",
[1][0x48 - 1] = "Tower Semiconductor",
[1][0x49 - 1] = "CPU Design",
[1][0x4a - 1] = "Price Point",
@@ -205,19 +210,19 @@
[1][0x4e - 1] = "Unigen Corporation",
[1][0x4f - 1] = "Transcend Information",
[1][0x50 - 1] = "Memory Card Technology",
-[1][0x51 - 1] = "CKD Corporation Ltd.",
-[1][0x52 - 1] = "Capital Instruments, Inc.",
-[1][0x53 - 1] = "Aica Kogyo, Ltd.",
+[1][0x51 - 1] = "CKD Corporation Ltd",
+[1][0x52 - 1] = "Capital Instruments Inc",
+[1][0x53 - 1] = "Aica Kogyo Ltd",
[1][0x54 - 1] = "Linvex Technology",
[1][0x55 - 1] = "MSC Vertriebs GmbH",
-[1][0x56 - 1] = "AKM Company, Ltd.",
-[1][0x57 - 1] = "Dynamem, Inc.",
+[1][0x56 - 1] = "AKM Company Ltd",
+[1][0x57 - 1] = "Dynamem Inc",
[1][0x58 - 1] = "NERA ASA",
[1][0x59 - 1] = "GSI Technology",
[1][0x5a - 1] = "Dane-Elec (C Memory)",
[1][0x5b - 1] = "Acorn Computers",
[1][0x5c - 1] = "Lara Technology",
-[1][0x5d - 1] = "Oak Technology, Inc.",
+[1][0x5d - 1] = "Oak Technology Inc",
[1][0x5e - 1] = "Itec Memory",
[1][0x5f - 1] = "Tanisys Technology",
[1][0x60 - 1] = "Truevision",
@@ -234,7 +239,7 @@
[1][0x6b - 1] = "Goldenram",
[1][0x6c - 1] = "Clear Logic",
[1][0x6d - 1] = "Cimaron Communications",
-[1][0x6e - 1] = "Nippon Steel Semi. Corp.",
+[1][0x6e - 1] = "Nippon Steel Semi. Corp",
[1][0x6f - 1] = "Advantage Memory",
[1][0x70 - 1] = "AMCC",
[1][0x71 - 1] = "LeCroy",
@@ -245,7 +250,7 @@
[1][0x76 - 1] = "Advanced Fibre",
[1][0x77 - 1] = "BF Goodrich Data.",
[1][0x78 - 1] = "Epigram",
-[1][0x79 - 1] = "Acbel Polytech Inc.",
+[1][0x79 - 1] = "Acbel Polytech Inc",
[1][0x7a - 1] = "Apacer Technology",
[1][0x7b - 1] = "Admor Memory",
[1][0x7c - 1] = "FOXCONN",
@@ -260,7 +265,7 @@
[2][0x07 - 1] = "MOSAID Technologies",
[2][0x08 - 1] = "Ardent Technologies",
[2][0x09 - 1] = "Switchcore",
-[2][0x0a - 1] = "Cisco Systems, Inc.",
+[2][0x0a - 1] = "Cisco Systems Inc",
[2][0x0b - 1] = "Allayer Technologies",
[2][0x0c - 1] = "WorkX AG (Wichman)",
[2][0x0d - 1] = "Oasis Semiconductor",
@@ -281,9 +286,9 @@
[2][0x1c - 1] = "Sanmina Corporation",
[2][0x1d - 1] = "HADCO Corporation",
[2][0x1e - 1] = "Corsair",
-[2][0x1f - 1] = "Actrans System Inc.",
+[2][0x1f - 1] = "Actrans System Inc",
[2][0x20 - 1] = "ALPHA Technologies",
-[2][0x21 - 1] = "Silicon Laboratories, Inc. (Cygnal)",
+[2][0x21 - 1] = "Silicon Laboratories Inc (Cygnal)",
[2][0x22 - 1] = "Artesyn Technologies",
[2][0x23 - 1] = "Align Manufacturing",
[2][0x24 - 1] = "Peregrine Semiconductor",
@@ -300,7 +305,7 @@
[2][0x2f - 1] = "Siemens AG",
[2][0x30 - 1] = "Sarnoff Corporation",
[2][0x31 - 1] = "Itautec SA",
-[2][0x32 - 1] = "Radiata Inc.",
+[2][0x32 - 1] = "Radiata Inc",
[2][0x33 - 1] = "Benchmark Elect. (AVEX)",
[2][0x34 - 1] = "Legend",
[2][0x35 - 1] = "SpecTek Incorporated",
@@ -330,7 +335,7 @@
[2][0x4d - 1] = "Element 14",
[2][0x4e - 1] = "Pycon",
[2][0x4f - 1] = "Saifun Semiconductors",
-[2][0x50 - 1] = "Sibyte, Incorporated",
+[2][0x50 - 1] = "Sibyte Incorporated",
[2][0x51 - 1] = "MetaLink Technologies",
[2][0x52 - 1] = "Feiya Technology",
[2][0x53 - 1] = "I & C Technology",
@@ -438,7 +443,7 @@
[3][0x3b - 1] = "Concept Computer",
[3][0x3c - 1] = "SILCOM",
[3][0x3d - 1] = "3Dlabs",
-[3][0x3e - 1] = "cât Magazine",
+[3][0x3e - 1] = "c't Magazine",
[3][0x3f - 1] = "Sanera Systems",
[3][0x40 - 1] = "Silicon Packets",
[3][0x41 - 1] = "Viasystems Group",
@@ -470,7 +475,7 @@
[3][0x5b - 1] = "Nazomi Communications",
[3][0x5c - 1] = "eWave System",
[3][0x5d - 1] = "Rockwell Collins",
-[3][0x5e - 1] = "Picocel Co. Ltd. (Paion)",
+[3][0x5e - 1] = "Picocel Co Ltd (Paion)",
[3][0x5f - 1] = "Alphamosaic Ltd",
[3][0x60 - 1] = "Sandburst",
[3][0x61 - 1] = "SiCon Video",
@@ -521,20 +526,20 @@
[4][0x10 - 1] = "Scaleo Chip",
[4][0x11 - 1] = "Potentia Power Systems",
[4][0x12 - 1] = "C-guys Incorporated",
-[4][0x13 - 1] = "Digital Communications Technology",
+[4][0x13 - 1] = "Digital Communications Technology Inc",
[4][0x14 - 1] = "Silicon-Based Technology",
[4][0x15 - 1] = "Fulcrum Microsystems",
[4][0x16 - 1] = "Positivo Informatica Ltd",
[4][0x17 - 1] = "XIOtech Corporation",
[4][0x18 - 1] = "PortalPlayer",
[4][0x19 - 1] = "Zhiying Software",
-[4][0x1a - 1] = "ParkerVision, Inc.",
+[4][0x1a - 1] = "ParkerVision Inc",
[4][0x1b - 1] = "Phonex Broadband",
[4][0x1c - 1] = "Skyworks Solutions",
[4][0x1d - 1] = "Entropic Communications",
-[4][0x1e - 1] = "IâM Intelligent Memory Ltd.",
+[4][0x1e - 1] = "I'M Intelligent Memory Ltd",
[4][0x1f - 1] = "Zensys A/S",
-[4][0x20 - 1] = "Legend Silicon Corp.",
+[4][0x20 - 1] = "Legend Silicon Corp",
[4][0x21 - 1] = "Sci-worx GmbH",
[4][0x22 - 1] = "SMSC (Standard Microsystems)",
[4][0x23 - 1] = "Renesas Electronics",
@@ -543,7 +548,7 @@
[4][0x26 - 1] = "MediaTek",
[4][0x27 - 1] = "Non-cents Productions",
[4][0x28 - 1] = "US Modular",
-[4][0x29 - 1] = "Wintegra Ltd.",
+[4][0x29 - 1] = "Wintegra Ltd",
[4][0x2a - 1] = "Mathstar",
[4][0x2b - 1] = "StarCore",
[4][0x2c - 1] = "Oplus Technologies",
@@ -559,9 +564,9 @@
[4][0x36 - 1] = "SolusTek",
[4][0x37 - 1] = "Kongsberg Maritime",
[4][0x38 - 1] = "Faraday Technology",
-[4][0x39 - 1] = "Altium Ltd.",
+[4][0x39 - 1] = "Altium Ltd",
[4][0x3a - 1] = "Insyte",
-[4][0x3b - 1] = "ARM Ltd.",
+[4][0x3b - 1] = "ARM Ltd",
[4][0x3c - 1] = "DigiVision",
[4][0x3d - 1] = "Vativ Technologies",
[4][0x3e - 1] = "Endicott Interconnect Technologies",
@@ -583,7 +588,7 @@
[4][0x4e - 1] = "Quanta Computer",
[4][0x4f - 1] = "Yield Microelectronics",
[4][0x50 - 1] = "Afa Technologies",
-[4][0x51 - 1] = "KINGBOX Technology Co. Ltd.",
+[4][0x51 - 1] = "KINGBOX Technology Co Ltd",
[4][0x52 - 1] = "Ceva",
[4][0x53 - 1] = "iStor Networks",
[4][0x54 - 1] = "Advance Modules",
@@ -598,149 +603,149 @@
[4][0x5d - 1] = "Adimos",
[4][0x5e - 1] = "SiGe Semiconductor",
[4][0x5f - 1] = "Fodus Communications",
-[4][0x60 - 1] = "Credence Systems Corp.",
-[4][0x61 - 1] = "Genesis Microchip Inc.",
-[4][0x62 - 1] = "Vihana, Inc.",
+[4][0x60 - 1] = "Credence Systems Corp",
+[4][0x61 - 1] = "Genesis Microchip Inc",
+[4][0x62 - 1] = "Vihana Inc",
[4][0x63 - 1] = "WIS Technologies",
[4][0x64 - 1] = "GateChange Technologies",
[4][0x65 - 1] = "High Density Devices AS",
[4][0x66 - 1] = "Synopsys",
[4][0x67 - 1] = "Gigaram",
-[4][0x68 - 1] = "Enigma Semiconductor Inc.",
-[4][0x69 - 1] = "Century Micro Inc.",
+[4][0x68 - 1] = "Enigma Semiconductor Inc",
+[4][0x69 - 1] = "Century Micro Inc",
[4][0x6a - 1] = "Icera Semiconductor",
[4][0x6b - 1] = "Mediaworks Integrated Systems",
-[4][0x6c - 1] = "OâNeil Product Development",
-[4][0x6d - 1] = "Supreme Top Technology Ltd.",
+[4][0x6c - 1] = "O'Neil Product Development",
+[4][0x6d - 1] = "Supreme Top Technology Ltd",
[4][0x6e - 1] = "MicroDisplay Corporation",
-[4][0x6f - 1] = "Team Group Inc.",
+[4][0x6f - 1] = "Team Group Inc",
[4][0x70 - 1] = "Sinett Corporation",
[4][0x71 - 1] = "Toshiba Corporation",
[4][0x72 - 1] = "Tensilica",
[4][0x73 - 1] = "SiRF Technology",
-[4][0x74 - 1] = "Bacoc Inc.",
+[4][0x74 - 1] = "Bacoc Inc",
[4][0x75 - 1] = "SMaL Camera Technologies",
[4][0x76 - 1] = "Thomson SC",
[4][0x77 - 1] = "Airgo Networks",
-[4][0x78 - 1] = "Wisair Ltd.",
+[4][0x78 - 1] = "Wisair Ltd",
[4][0x79 - 1] = "SigmaTel",
[4][0x7a - 1] = "Arkados",
-[4][0x7b - 1] = "Compete IT gmbH Co. KG",
-[4][0x7c - 1] = "Eudar Technology Inc.",
+[4][0x7b - 1] = "Compete IT gmbH Co KG",
+[4][0x7c - 1] = "Eudar Technology Inc",
[4][0x7d - 1] = "Focus Enhancements",
[4][0x7e - 1] = "Xyratex",
[5][0x01 - 1] = "Specular Networks",
[5][0x02 - 1] = "Patriot Memory (PDP Systems)",
-[5][0x03 - 1] = "U-Chip Technology Corp.",
+[5][0x03 - 1] = "U-Chip Technology Corp",
[5][0x04 - 1] = "Silicon Optix",
[5][0x05 - 1] = "Greenfield Networks",
[5][0x06 - 1] = "CompuRAM GmbH",
-[5][0x07 - 1] = "Stargen, Inc.",
+[5][0x07 - 1] = "Stargen Inc",
[5][0x08 - 1] = "NetCell Corporation",
[5][0x09 - 1] = "Excalibrus Technologies Ltd",
[5][0x0a - 1] = "SCM Microsystems",
-[5][0x0b - 1] = "Xsigo Systems, Inc.",
+[5][0x0b - 1] = "Xsigo Systems Inc",
[5][0x0c - 1] = "CHIPS & Systems Inc",
[5][0x0d - 1] = "Tier 1 Multichip Solutions",
[5][0x0e - 1] = "CWRL Labs",
[5][0x0f - 1] = "Teradici",
-[5][0x10 - 1] = "Gigaram, Inc.",
+[5][0x10 - 1] = "Gigaram Inc",
[5][0x11 - 1] = "g2 Microsystems",
[5][0x12 - 1] = "PowerFlash Semiconductor",
-[5][0x13 - 1] = "P.A. Semi, Inc.",
-[5][0x14 - 1] = "NovaTech Solutions, S.A.",
-[5][0x15 - 1] = "c2 Microsystems, Inc.",
+[5][0x13 - 1] = "P.A. Semi Inc",
+[5][0x14 - 1] = "NovaTech Solutions S.A.",
+[5][0x15 - 1] = "c2 Microsystems Inc",
[5][0x16 - 1] = "Level5 Networks",
[5][0x17 - 1] = "COS Memory AG",
[5][0x18 - 1] = "Innovasic Semiconductor",
-[5][0x19 - 1] = "02IC Co. Ltd",
-[5][0x1a - 1] = "Tabula, Inc.",
+[5][0x19 - 1] = "02IC Co Ltd",
+[5][0x1a - 1] = "Tabula Inc",
[5][0x1b - 1] = "Crucial Technology",
[5][0x1c - 1] = "Chelsio Communications",
[5][0x1d - 1] = "Solarflare Communications",
-[5][0x1e - 1] = "Xambala Inc.",
+[5][0x1e - 1] = "Xambala Inc",
[5][0x1f - 1] = "EADS Astrium",
-[5][0x20 - 1] = "Terra Semiconductor, Inc.",
-[5][0x21 - 1] = "Imaging Works, Inc.",
-[5][0x22 - 1] = "Astute Networks, Inc.",
+[5][0x20 - 1] = "Terra Semiconductor Inc",
+[5][0x21 - 1] = "Imaging Works Inc",
+[5][0x22 - 1] = "Astute Networks Inc",
[5][0x23 - 1] = "Tzero",
[5][0x24 - 1] = "Emulex",
[5][0x25 - 1] = "Power-One",
-[5][0x26 - 1] = "Pulse~LINK Inc.",
+[5][0x26 - 1] = "Pulse~LINK Inc",
[5][0x27 - 1] = "Hon Hai Precision Industry",
-[5][0x28 - 1] = "White Rock Networks Inc.",
-[5][0x29 - 1] = "Telegent Systems USA, Inc.",
-[5][0x2a - 1] = "Atrua Technologies, Inc.",
-[5][0x2b - 1] = "Acbel Polytech Inc.",
-[5][0x2c - 1] = "eRide Inc.",
-[5][0x2d - 1] = "ULi Electronics Inc.",
-[5][0x2e - 1] = "Magnum Semiconductor Inc.",
-[5][0x2f - 1] = "neoOne Technology, Inc.",
-[5][0x30 - 1] = "Connex Technology, Inc.",
-[5][0x31 - 1] = "Stream Processors, Inc.",
+[5][0x28 - 1] = "White Rock Networks Inc",
+[5][0x29 - 1] = "Telegent Systems USA Inc",
+[5][0x2a - 1] = "Atrua Technologies Inc",
+[5][0x2b - 1] = "Acbel Polytech Inc",
+[5][0x2c - 1] = "eRide Inc",
+[5][0x2d - 1] = "ULi Electronics Inc",
+[5][0x2e - 1] = "Magnum Semiconductor Inc",
+[5][0x2f - 1] = "neoOne Technology Inc",
+[5][0x30 - 1] = "Connex Technology Inc",
+[5][0x31 - 1] = "Stream Processors Inc",
[5][0x32 - 1] = "Focus Enhancements",
-[5][0x33 - 1] = "Telecis Wireless, Inc.",
+[5][0x33 - 1] = "Telecis Wireless Inc",
[5][0x34 - 1] = "uNav Microelectronics",
-[5][0x35 - 1] = "Tarari, Inc.",
-[5][0x36 - 1] = "Ambric, Inc.",
-[5][0x37 - 1] = "Newport Media, Inc.",
+[5][0x35 - 1] = "Tarari Inc",
+[5][0x36 - 1] = "Ambric Inc",
+[5][0x37 - 1] = "Newport Media Inc",
[5][0x38 - 1] = "VMTS",
-[5][0x39 - 1] = "Enuclia Semiconductor, Inc.",
-[5][0x3a - 1] = "Virtium Technology Inc.",
-[5][0x3b - 1] = "Solid State System Co., Ltd.",
+[5][0x39 - 1] = "Enuclia Semiconductor Inc",
+[5][0x3a - 1] = "Virtium Technology Inc",
+[5][0x3b - 1] = "Solid State System Co Ltd",
[5][0x3c - 1] = "Kian Tech LLC",
[5][0x3d - 1] = "Artimi",
[5][0x3e - 1] = "Power Quotient International",
[5][0x3f - 1] = "Avago Technologies",
[5][0x40 - 1] = "ADTechnology",
[5][0x41 - 1] = "Sigma Designs",
-[5][0x42 - 1] = "SiCortex, Inc.",
+[5][0x42 - 1] = "SiCortex Inc",
[5][0x43 - 1] = "Ventura Technology Group",
[5][0x44 - 1] = "eASIC",
[5][0x45 - 1] = "M.H.S. SAS",
[5][0x46 - 1] = "Micro Star International",
-[5][0x47 - 1] = "Rapport Inc.",
+[5][0x47 - 1] = "Rapport Inc",
[5][0x48 - 1] = "Makway International",
-[5][0x49 - 1] = "Broad Reach Engineering Co.",
+[5][0x49 - 1] = "Broad Reach Engineering Co",
[5][0x4a - 1] = "Semiconductor Mfg Intl Corp",
[5][0x4b - 1] = "SiConnect",
-[5][0x4c - 1] = "FCI USA Inc.",
+[5][0x4c - 1] = "FCI USA Inc",
[5][0x4d - 1] = "Validity Sensors",
-[5][0x4e - 1] = "Coney Technology Co. Ltd.",
+[5][0x4e - 1] = "Coney Technology Co Ltd",
[5][0x4f - 1] = "Spans Logic",
-[5][0x50 - 1] = "Neterion Inc.",
+[5][0x50 - 1] = "Neterion Inc",
[5][0x51 - 1] = "Qimonda",
-[5][0x52 - 1] = "New Japan Radio Co. Ltd.",
+[5][0x52 - 1] = "New Japan Radio Co Ltd",
[5][0x53 - 1] = "Velogix",
[5][0x54 - 1] = "Montalvo Systems",
-[5][0x55 - 1] = "iVivity Inc.",
+[5][0x55 - 1] = "iVivity Inc",
[5][0x56 - 1] = "Walton Chaintech",
[5][0x57 - 1] = "AENEON",
-[5][0x58 - 1] = "Lorom Industrial Co. Ltd.",
+[5][0x58 - 1] = "Lorom Industrial Co Ltd",
[5][0x59 - 1] = "Radiospire Networks",
-[5][0x5a - 1] = "Sensio Technologies, Inc.",
+[5][0x5a - 1] = "Sensio Technologies Inc",
[5][0x5b - 1] = "Nethra Imaging",
[5][0x5c - 1] = "Hexon Technology Pte Ltd",
[5][0x5d - 1] = "CompuStocx (CSX)",
-[5][0x5e - 1] = "Methode Electronics, Inc.",
-[5][0x5f - 1] = "Connect One Ltd.",
+[5][0x5e - 1] = "Methode Electronics Inc",
+[5][0x5f - 1] = "Connect One Ltd",
[5][0x60 - 1] = "Opulan Technologies",
[5][0x61 - 1] = "Septentrio NV",
-[5][0x62 - 1] = "Goldenmars Technology Inc.",
+[5][0x62 - 1] = "Goldenmars Technology Inc",
[5][0x63 - 1] = "Kreton Corporation",
-[5][0x64 - 1] = "Cochlear Ltd.",
+[5][0x64 - 1] = "Cochlear Ltd",
[5][0x65 - 1] = "Altair Semiconductor",
-[5][0x66 - 1] = "NetEffect, Inc.",
-[5][0x67 - 1] = "Spansion, Inc.",
+[5][0x66 - 1] = "NetEffect Inc",
+[5][0x67 - 1] = "Spansion Inc",
[5][0x68 - 1] = "Taiwan Semiconductor Mfg",
-[5][0x69 - 1] = "Emphany Systems Inc.",
+[5][0x69 - 1] = "Emphany Systems Inc",
[5][0x6a - 1] = "ApaceWave Technologies",
[5][0x6b - 1] = "Mobilygen Corporation",
[5][0x6c - 1] = "Tego",
[5][0x6d - 1] = "Cswitch Corporation",
-[5][0x6e - 1] = "Haier (Beijing) IC Design Co.",
+[5][0x6e - 1] = "Haier (Beijing) IC Design Co",
[5][0x6f - 1] = "MetaRAM",
-[5][0x70 - 1] = "Axel Electronics Co. Ltd.",
+[5][0x70 - 1] = "Axel Electronics Co Ltd",
[5][0x71 - 1] = "Tilera Corporation",
[5][0x72 - 1] = "Aquantia",
[5][0x73 - 1] = "Vivace Semiconductor",
@@ -748,197 +753,197 @@
[5][0x75 - 1] = "Octalica",
[5][0x76 - 1] = "InterDigital Communications",
[5][0x77 - 1] = "Avant Technology",
-[5][0x78 - 1] = "Asrock, Inc.",
+[5][0x78 - 1] = "Asrock Inc",
[5][0x79 - 1] = "Availink",
-[5][0x7a - 1] = "Quartics, Inc.",
+[5][0x7a - 1] = "Quartics Inc",
[5][0x7b - 1] = "Element CXI",
[5][0x7c - 1] = "Innovaciones Microelectronicas",
[5][0x7d - 1] = "VeriSilicon Microelectronics",
[5][0x7e - 1] = "W5 Networks",
[6][0x01 - 1] = "MOVEKING",
-[6][0x02 - 1] = "Mavrix Technology, Inc.",
-[6][0x03 - 1] = "CellGuide Ltd.",
+[6][0x02 - 1] = "Mavrix Technology Inc",
+[6][0x03 - 1] = "CellGuide Ltd",
[6][0x04 - 1] = "Faraday Technology",
-[6][0x05 - 1] = "Diablo Technologies, Inc.",
+[6][0x05 - 1] = "Diablo Technologies Inc",
[6][0x06 - 1] = "Jennic",
[6][0x07 - 1] = "Octasic",
[6][0x08 - 1] = "Molex Incorporated",
[6][0x09 - 1] = "3Leaf Networks",
[6][0x0a - 1] = "Bright Micron Technology",
[6][0x0b - 1] = "Netxen",
-[6][0x0c - 1] = "NextWave Broadband Inc.",
+[6][0x0c - 1] = "NextWave Broadband Inc",
[6][0x0d - 1] = "DisplayLink",
[6][0x0e - 1] = "ZMOS Technology",
[6][0x0f - 1] = "Tec-Hill",
-[6][0x10 - 1] = "Multigig, Inc.",
+[6][0x10 - 1] = "Multigig Inc",
[6][0x11 - 1] = "Amimon",
-[6][0x12 - 1] = "Euphonic Technologies, Inc.",
+[6][0x12 - 1] = "Euphonic Technologies Inc",
[6][0x13 - 1] = "BRN Phoenix",
[6][0x14 - 1] = "InSilica",
[6][0x15 - 1] = "Ember Corporation",
[6][0x16 - 1] = "Avexir Technologies Corporation",
[6][0x17 - 1] = "Echelon Corporation",
[6][0x18 - 1] = "Edgewater Computer Systems",
-[6][0x19 - 1] = "XMOS Semiconductor Ltd.",
-[6][0x1a - 1] = "GENUSION, Inc.",
+[6][0x19 - 1] = "XMOS Semiconductor Ltd",
+[6][0x1a - 1] = "GENUSION Inc",
[6][0x1b - 1] = "Memory Corp NV",
[6][0x1c - 1] = "SiliconBlue Technologies",
-[6][0x1d - 1] = "Rambus Inc.",
+[6][0x1d - 1] = "Rambus Inc",
[6][0x1e - 1] = "Andes Technology Corporation",
[6][0x1f - 1] = "Coronis Systems",
[6][0x20 - 1] = "Achronix Semiconductor",
-[6][0x21 - 1] = "Siano Mobile Silicon Ltd.",
+[6][0x21 - 1] = "Siano Mobile Silicon Ltd",
[6][0x22 - 1] = "Semtech Corporation",
-[6][0x23 - 1] = "Pixelworks Inc.",
+[6][0x23 - 1] = "Pixelworks Inc",
[6][0x24 - 1] = "Gaisler Research AB",
[6][0x25 - 1] = "Teranetics",
-[6][0x26 - 1] = "Toppan Printing Co. Ltd.",
+[6][0x26 - 1] = "Toppan Printing Co Ltd",
[6][0x27 - 1] = "Kingxcon",
[6][0x28 - 1] = "Silicon Integrated Systems",
-[6][0x29 - 1] = "I-O Data Device, Inc.",
-[6][0x2a - 1] = "NDS Americas Inc.",
+[6][0x29 - 1] = "I-O Data Device Inc",
+[6][0x2a - 1] = "NDS Americas Inc",
[6][0x2b - 1] = "Solomon Systech Limited",
[6][0x2c - 1] = "On Demand Microelectronics",
-[6][0x2d - 1] = "Amicus Wireless Inc.",
+[6][0x2d - 1] = "Amicus Wireless Inc",
[6][0x2e - 1] = "SMARDTV SNC",
-[6][0x2f - 1] = "Comsys Communication Ltd.",
-[6][0x30 - 1] = "Movidia Ltd.",
-[6][0x31 - 1] = "Javad GNSS, Inc.",
+[6][0x2f - 1] = "Comsys Communication Ltd",
+[6][0x30 - 1] = "Movidia Ltd",
+[6][0x31 - 1] = "Javad GNSS Inc",
[6][0x32 - 1] = "Montage Technology Group",
[6][0x33 - 1] = "Trident Microsystems",
[6][0x34 - 1] = "Super Talent",
-[6][0x35 - 1] = "Optichron, Inc.",
-[6][0x36 - 1] = "Future Waves UK Ltd.",
-[6][0x37 - 1] = "SiBEAM, Inc.",
-[6][0x38 - 1] = "Inicore,Inc.",
+[6][0x35 - 1] = "Optichron Inc",
+[6][0x36 - 1] = "Future Waves UK Ltd",
+[6][0x37 - 1] = "SiBEAM Inc",
+[6][0x38 - 1] = "InicoreInc",
[6][0x39 - 1] = "Virident Systems",
-[6][0x3a - 1] = "M2000, Inc.",
-[6][0x3b - 1] = "ZeroG Wireless, Inc.",
-[6][0x3c - 1] = "Gingle Technology Co. Ltd.",
-[6][0x3d - 1] = "Space Micro Inc.",
+[6][0x3a - 1] = "M2000 Inc",
+[6][0x3b - 1] = "ZeroG Wireless Inc",
+[6][0x3c - 1] = "Gingle Technology Co Ltd",
+[6][0x3d - 1] = "Space Micro Inc",
[6][0x3e - 1] = "Wilocity",
-[6][0x3f - 1] = "Novafora, Inc.",
+[6][0x3f - 1] = "Novafora Inc",
[6][0x40 - 1] = "iKoa Corporation",
[6][0x41 - 1] = "ASint Technology",
[6][0x42 - 1] = "Ramtron",
-[6][0x43 - 1] = "Plato Networks Inc.",
+[6][0x43 - 1] = "Plato Networks Inc",
[6][0x44 - 1] = "IPtronics AS",
[6][0x45 - 1] = "Infinite-Memories",
-[6][0x46 - 1] = "Parade Technologies Inc.",
+[6][0x46 - 1] = "Parade Technologies Inc",
[6][0x47 - 1] = "Dune Networks",
[6][0x48 - 1] = "GigaDevice Semiconductor",
-[6][0x49 - 1] = "Modu Ltd.",
+[6][0x49 - 1] = "Modu Ltd",
[6][0x4a - 1] = "CEITEC",
[6][0x4b - 1] = "Northrop Grumman",
[6][0x4c - 1] = "XRONET Corporation",
[6][0x4d - 1] = "Sicon Semiconductor AB",
-[6][0x4e - 1] = "Atla Electronics Co. Ltd.",
+[6][0x4e - 1] = "Atla Electronics Co Ltd",
[6][0x4f - 1] = "TOPRAM Technology",
-[6][0x50 - 1] = "Silego Technology Inc.",
+[6][0x50 - 1] = "Silego Technology Inc",
[6][0x51 - 1] = "Kinglife",
-[6][0x52 - 1] = "Ability Industries Ltd.",
-[6][0x53 - 1] = "Silicon Power Computer &",
-[6][0x54 - 1] = "Augusta Technology, Inc.",
+[6][0x52 - 1] = "Ability Industries Ltd",
+[6][0x53 - 1] = "Silicon Power Computer & Communications",
+[6][0x54 - 1] = "Augusta Technology Inc",
[6][0x55 - 1] = "Nantronics Semiconductors",
[6][0x56 - 1] = "Hilscher Gesellschaft",
-[6][0x57 - 1] = "Quixant Ltd.",
-[6][0x58 - 1] = "Percello Ltd.",
-[6][0x59 - 1] = "NextIO Inc.",
-[6][0x5a - 1] = "Scanimetrics Inc.",
-[6][0x5b - 1] = "FS-Semi Company Ltd.",
+[6][0x57 - 1] = "Quixant Ltd",
+[6][0x58 - 1] = "Percello Ltd",
+[6][0x59 - 1] = "NextIO Inc",
+[6][0x5a - 1] = "Scanimetrics Inc",
+[6][0x5b - 1] = "FS-Semi Company Ltd",
[6][0x5c - 1] = "Infinera Corporation",
-[6][0x5d - 1] = "SandForce Inc.",
+[6][0x5d - 1] = "SandForce Inc",
[6][0x5e - 1] = "Lexar Media",
-[6][0x5f - 1] = "Teradyne Inc.",
-[6][0x60 - 1] = "Memory Exchange Corp.",
+[6][0x5f - 1] = "Teradyne Inc",
+[6][0x60 - 1] = "Memory Exchange Corp",
[6][0x61 - 1] = "Suzhou Smartek Electronics",
[6][0x62 - 1] = "Avantium Corporation",
-[6][0x63 - 1] = "ATP Electronics Inc.",
+[6][0x63 - 1] = "ATP Electronics Inc",
[6][0x64 - 1] = "Valens Semiconductor Ltd",
-[6][0x65 - 1] = "Agate Logic, Inc.",
+[6][0x65 - 1] = "Agate Logic Inc",
[6][0x66 - 1] = "Netronome",
-[6][0x67 - 1] = "Zenverge, Inc.",
+[6][0x67 - 1] = "Zenverge Inc",
[6][0x68 - 1] = "N-trig Ltd",
-[6][0x69 - 1] = "SanMax Technologies Inc.",
-[6][0x6a - 1] = "Contour Semiconductor Inc.",
+[6][0x69 - 1] = "SanMax Technologies Inc",
+[6][0x6a - 1] = "Contour Semiconductor Inc",
[6][0x6b - 1] = "TwinMOS",
-[6][0x6c - 1] = "Silicon Systems, Inc.",
-[6][0x6d - 1] = "V-Color Technology Inc.",
+[6][0x6c - 1] = "Silicon Systems Inc",
+[6][0x6d - 1] = "V-Color Technology Inc",
[6][0x6e - 1] = "Certicom Corporation",
[6][0x6f - 1] = "JSC ICC Milandr",
-[6][0x70 - 1] = "PhotoFast Global Inc.",
+[6][0x70 - 1] = "PhotoFast Global Inc",
[6][0x71 - 1] = "InnoDisk Corporation",
[6][0x72 - 1] = "Muscle Power",
[6][0x73 - 1] = "Energy Micro",
[6][0x74 - 1] = "Innofidei",
[6][0x75 - 1] = "CopperGate Communications",
-[6][0x76 - 1] = "Holtek Semiconductor Inc.",
-[6][0x77 - 1] = "Myson Century, Inc.",
+[6][0x76 - 1] = "Holtek Semiconductor Inc",
+[6][0x77 - 1] = "Myson Century Inc",
[6][0x78 - 1] = "FIDELIX",
[6][0x79 - 1] = "Red Digital Cinema",
[6][0x7a - 1] = "Densbits Technology",
[6][0x7b - 1] = "Zempro",
[6][0x7c - 1] = "MoSys",
[6][0x7d - 1] = "Provigent",
-[6][0x7e - 1] = "Triad Semiconductor, Inc.",
-[7][0x01 - 1] = "Siklu Communication Ltd.",
-[7][0x02 - 1] = "A Force Manufacturing Ltd.",
+[6][0x7e - 1] = "Triad Semiconductor Inc",
+[7][0x01 - 1] = "Siklu Communication Ltd",
+[7][0x02 - 1] = "A Force Manufacturing Ltd",
[7][0x03 - 1] = "Strontium",
[7][0x04 - 1] = "ALi Corp (Abilis Systems)",
-[7][0x05 - 1] = "Siglead, Inc.",
-[7][0x06 - 1] = "Ubicom, Inc.",
+[7][0x05 - 1] = "Siglead Inc",
+[7][0x06 - 1] = "Ubicom Inc",
[7][0x07 - 1] = "Unifosa Corporation",
-[7][0x08 - 1] = "Stretch, Inc.",
+[7][0x08 - 1] = "Stretch Inc",
[7][0x09 - 1] = "Lantiq Deutschland GmbH",
[7][0x0a - 1] = "Visipro.",
[7][0x0b - 1] = "EKMemory",
[7][0x0c - 1] = "Microelectronics Institute ZTE",
[7][0x0d - 1] = "u-blox AG",
-[7][0x0e - 1] = "Carry Technology Co. Ltd.",
+[7][0x0e - 1] = "Carry Technology Co Ltd",
[7][0x0f - 1] = "Nokia",
[7][0x10 - 1] = "King Tiger Technology",
[7][0x11 - 1] = "Sierra Wireless",
[7][0x12 - 1] = "HT Micron",
-[7][0x13 - 1] = "Albatron Technology Co. Ltd.",
+[7][0x13 - 1] = "Albatron Technology Co Ltd",
[7][0x14 - 1] = "Leica Geosystems AG",
[7][0x15 - 1] = "BroadLight",
[7][0x16 - 1] = "AEXEA",
-[7][0x17 - 1] = "ClariPhy Communications, Inc.",
+[7][0x17 - 1] = "ClariPhy Communications Inc",
[7][0x18 - 1] = "Green Plug",
[7][0x19 - 1] = "Design Art Networks",
-[7][0x1a - 1] = "Mach Xtreme Technology Ltd.",
-[7][0x1b - 1] = "ATO Solutions Co. Ltd.",
+[7][0x1a - 1] = "Mach Xtreme Technology Ltd",
+[7][0x1b - 1] = "ATO Solutions Co Ltd",
[7][0x1c - 1] = "Ramsta",
-[7][0x1d - 1] = "Greenliant Systems, Ltd.",
+[7][0x1d - 1] = "Greenliant Systems Ltd",
[7][0x1e - 1] = "Teikon",
[7][0x1f - 1] = "Antec Hadron",
-[7][0x20 - 1] = "NavCom Technology, Inc.",
+[7][0x20 - 1] = "NavCom Technology Inc",
[7][0x21 - 1] = "Shanghai Fudan Microelectronics",
-[7][0x22 - 1] = "Calxeda, Inc.",
+[7][0x22 - 1] = "Calxeda Inc",
[7][0x23 - 1] = "JSC EDC Electronics",
-[7][0x24 - 1] = "Kandit Technology Co. Ltd.",
+[7][0x24 - 1] = "Kandit Technology Co Ltd",
[7][0x25 - 1] = "Ramos Technology",
[7][0x26 - 1] = "Goldenmars Technology",
-[7][0x27 - 1] = "XeL Technology Inc.",
+[7][0x27 - 1] = "XeL Technology Inc",
[7][0x28 - 1] = "Newzone Corporation",
[7][0x29 - 1] = "ShenZhen MercyPower Tech",
[7][0x2a - 1] = "Nanjing Yihuo Technology",
-[7][0x2b - 1] = "Nethra Imaging Inc.",
+[7][0x2b - 1] = "Nethra Imaging Inc",
[7][0x2c - 1] = "SiTel Semiconductor BV",
[7][0x2d - 1] = "SolidGear Corporation",
-[7][0x2e - 1] = "Topower Computer Ind Co Ltd.",
+[7][0x2e - 1] = "Topower Computer Ind Co Ltd",
[7][0x2f - 1] = "Wilocity",
[7][0x30 - 1] = "Profichip GmbH",
[7][0x31 - 1] = "Gerad Technologies",
[7][0x32 - 1] = "Ritek Corporation",
[7][0x33 - 1] = "Gomos Technology Limited",
[7][0x34 - 1] = "Memoright Corporation",
-[7][0x35 - 1] = "D-Broad, Inc.",
+[7][0x35 - 1] = "D-Broad Inc",
[7][0x36 - 1] = "HiSilicon Technologies",
-[7][0x37 - 1] = "Syndiant Inc..",
-[7][0x38 - 1] = "Enverv Inc.",
+[7][0x37 - 1] = "Syndiant Inc.",
+[7][0x38 - 1] = "Enverv Inc",
[7][0x39 - 1] = "Cognex",
-[7][0x3a - 1] = "Xinnova Technology Inc.",
+[7][0x3a - 1] = "Xinnova Technology Inc",
[7][0x3b - 1] = "Ultron AG",
[7][0x3c - 1] = "Concord Idea Corporation",
[7][0x3d - 1] = "AIM Corporation",
@@ -948,20 +953,20 @@
[7][0x41 - 1] = "Haotian Jinshibo Science Tech",
[7][0x42 - 1] = "Being Advanced Memory",
[7][0x43 - 1] = "Adesto Technologies",
-[7][0x44 - 1] = "Giantec Semiconductor, Inc.",
+[7][0x44 - 1] = "Giantec Semiconductor Inc",
[7][0x45 - 1] = "HMD Electronics AG",
[7][0x46 - 1] = "Gloway International (HK)",
[7][0x47 - 1] = "Kingcore",
[7][0x48 - 1] = "Anucell Technology Holding",
-[7][0x49 - 1] = "Accord Software & Systems Pvt. Ltd.",
-[7][0x4a - 1] = "Active-Semi Inc.",
+[7][0x49 - 1] = "Accord Software & Systems Pvt. Ltd",
+[7][0x4a - 1] = "Active-Semi Inc",
[7][0x4b - 1] = "Denso Corporation",
-[7][0x4c - 1] = "TLSI Inc.",
+[7][0x4c - 1] = "TLSI Inc",
[7][0x4d - 1] = "Qidan",
[7][0x4e - 1] = "Mustang",
[7][0x4f - 1] = "Orca Systems",
[7][0x50 - 1] = "Passif Semiconductor",
-[7][0x51 - 1] = "GigaDevice Semiconductor (Beijing)",
+[7][0x51 - 1] = "GigaDevice Semiconductor (Beijing) Inc",
[7][0x52 - 1] = "Memphis Electronic",
[7][0x53 - 1] = "Beckhoff Automation GmbH",
[7][0x54 - 1] = "Harmony Semiconductor Corp",
@@ -970,23 +975,23 @@
[7][0x57 - 1] = "Eorex Corporation",
[7][0x58 - 1] = "Xingtera",
[7][0x59 - 1] = "Netsol",
-[7][0x5a - 1] = "Bestdon Technology Co. Ltd.",
-[7][0x5b - 1] = "Baysand Inc.",
-[7][0x5c - 1] = "Uroad Technology Co. Ltd.",
+[7][0x5a - 1] = "Bestdon Technology Co Ltd",
+[7][0x5b - 1] = "Baysand Inc",
+[7][0x5c - 1] = "Uroad Technology Co Ltd",
[7][0x5d - 1] = "Wilk Elektronik S.A.",
[7][0x5e - 1] = "AAI",
[7][0x5f - 1] = "Harman",
-[7][0x60 - 1] = "Berg Microelectronics Inc.",
-[7][0x61 - 1] = "ASSIA, Inc.",
+[7][0x60 - 1] = "Berg Microelectronics Inc",
+[7][0x61 - 1] = "ASSIA Inc",
[7][0x62 - 1] = "Visiontek Products LLC",
[7][0x63 - 1] = "OCMEMORY",
-[7][0x64 - 1] = "Welink Solution Inc.",
+[7][0x64 - 1] = "Welink Solution Inc",
[7][0x65 - 1] = "Shark Gaming",
[7][0x66 - 1] = "Avalanche Technology",
[7][0x67 - 1] = "R&D Center ELVEES OJSC",
-[7][0x68 - 1] = "KingboMars Technology Co. Ltd.",
-[7][0x69 - 1] = "High Bridge Solutions Industria",
-[7][0x6a - 1] = "Transcend Technology Co. Ltd.",
+[7][0x68 - 1] = "KingboMars Technology Co Ltd",
+[7][0x69 - 1] = "High Bridge Solutions Industria Eletronica",
+[7][0x6a - 1] = "Transcend Technology Co Ltd",
[7][0x6b - 1] = "Everspin Technologies",
[7][0x6c - 1] = "Hon-Hai Precision",
[7][0x6d - 1] = "Smart Storage Systems",
@@ -997,54 +1002,54 @@
[7][0x72 - 1] = "LITE-ON IT Corporation",
[7][0x73 - 1] = "Inuitive",
[7][0x74 - 1] = "HMicro",
-[7][0x75 - 1] = "BittWare, Inc.",
+[7][0x75 - 1] = "BittWare Inc",
[7][0x76 - 1] = "GLOBALFOUNDRIES",
-[7][0x77 - 1] = "ACPI Digital Co. Ltd.",
+[7][0x77 - 1] = "ACPI Digital Co Ltd",
[7][0x78 - 1] = "Annapurna Labs",
[7][0x79 - 1] = "AcSiP Technology Corporation",
[7][0x7a - 1] = "Idea! Electronic Systems",
-[7][0x7b - 1] = "Gowe Technology Co. Ltd.",
-[7][0x7c - 1] = "Hermes Testing Solutions, Inc.",
+[7][0x7b - 1] = "Gowe Technology Co Ltd",
+[7][0x7c - 1] = "Hermes Testing Solutions Inc",
[7][0x7d - 1] = "Positivo BGH",
[7][0x7e - 1] = "Intelligence Silicon Technology",
[8][0x01 - 1] = "3D PLUS",
[8][0x02 - 1] = "Diehl Aerospace",
[8][0x03 - 1] = "Fairchild",
[8][0x04 - 1] = "Mercury Systems",
-[8][0x05 - 1] = "Sonics, Inc.",
-[8][0x06 - 1] = "GE Intelligent Platforms GmbH & Co.",
-[8][0x07 - 1] = "Shenzhen Jinge Information Co. Ltd.",
+[8][0x05 - 1] = "Sonics Inc",
+[8][0x06 - 1] = "ICC Intelligent Platforms GmbH",
+[8][0x07 - 1] = "Shenzhen Jinge Information Co Ltd",
[8][0x08 - 1] = "SCWW",
-[8][0x09 - 1] = "Silicon Motion Inc.",
+[8][0x09 - 1] = "Silicon Motion Inc",
[8][0x0a - 1] = "Anurag",
[8][0x0b - 1] = "King Kong",
-[8][0x0c - 1] = "FROM30 Co. Ltd.",
+[8][0x0c - 1] = "FROM30 Co Ltd",
[8][0x0d - 1] = "Gowin Semiconductor Corp",
-[8][0x0e - 1] = "Fremont Micro Devices Ltd.",
+[8][0x0e - 1] = "Fremont Micro Devices Ltd",
[8][0x0f - 1] = "Ericsson Modems",
[8][0x10 - 1] = "Exelis",
-[8][0x11 - 1] = "Satixfy Ltd.",
-[8][0x12 - 1] = "Galaxy Microsystems Ltd.",
-[8][0x13 - 1] = "Gloway International Co. Ltd.",
+[8][0x11 - 1] = "Satixfy Ltd",
+[8][0x12 - 1] = "Galaxy Microsystems Ltd",
+[8][0x13 - 1] = "Gloway International Co Ltd",
[8][0x14 - 1] = "Lab",
[8][0x15 - 1] = "Smart Energy Instruments",
[8][0x16 - 1] = "Approved Memory Corporation",
[8][0x17 - 1] = "Axell Corporation",
[8][0x18 - 1] = "Essencore Limited",
[8][0x19 - 1] = "Phytium",
-[8][0x1a - 1] = "Xiâan SinoChip Semiconductor",
+[8][0x1a - 1] = "Xi'an UniIC Semiconductors Co Ltd",
[8][0x1b - 1] = "Ambiq Micro",
-[8][0x1c - 1] = "eveRAM Technology, Inc.",
+[8][0x1c - 1] = "eveRAM Technology Inc",
[8][0x1d - 1] = "Infomax",
-[8][0x1e - 1] = "Butterfly Network, Inc.",
+[8][0x1e - 1] = "Butterfly Network Inc",
[8][0x1f - 1] = "Shenzhen City Gcai Electronics",
[8][0x20 - 1] = "Stack Devices Corporation",
[8][0x21 - 1] = "ADK Media Group",
-[8][0x22 - 1] = "TSP Global Co., Ltd.",
+[8][0x22 - 1] = "TSP Global Co Ltd",
[8][0x23 - 1] = "HighX",
[8][0x24 - 1] = "Shenzhen Elicks Technology",
[8][0x25 - 1] = "ISSI/Chingis",
-[8][0x26 - 1] = "Google, Inc.",
+[8][0x26 - 1] = "Google Inc",
[8][0x27 - 1] = "Dasima International Development",
[8][0x28 - 1] = "Leahkinn Technology Limited",
[8][0x29 - 1] = "HIMA Paul Hildebrandt GmbH Co KG",
@@ -1052,98 +1057,98 @@
[8][0x2b - 1] = "Techcomp International (Fastable)",
[8][0x2c - 1] = "Ancore Technology Corporation",
[8][0x2d - 1] = "Nuvoton",
-[8][0x2e - 1] = "Korea Uhbele International Group Ltd.",
-[8][0x2f - 1] = "Ikegami Tsushinki Co Ltd.",
-[8][0x30 - 1] = "RelChip, Inc.",
+[8][0x2e - 1] = "Korea Uhbele International Group Ltd",
+[8][0x2f - 1] = "Ikegami Tsushinki Co Ltd",
+[8][0x30 - 1] = "RelChip Inc",
[8][0x31 - 1] = "Baikal Electronics",
-[8][0x32 - 1] = "Nemostech Inc.",
+[8][0x32 - 1] = "Nemostech Inc",
[8][0x33 - 1] = "Memorysolution GmbH",
[8][0x34 - 1] = "Silicon Integrated Systems Corporation",
[8][0x35 - 1] = "Xiede",
-[8][0x36 - 1] = "Multilaser Components",
+[8][0x36 - 1] = "BRC",
[8][0x37 - 1] = "Flash Chi",
[8][0x38 - 1] = "Jone",
-[8][0x39 - 1] = "GCT Semiconductor Inc.",
+[8][0x39 - 1] = "GCT Semiconductor Inc",
[8][0x3a - 1] = "Hong Kong Zetta Device Technology",
-[8][0x3b - 1] = "Unimemory Technology(s) Pte Ltd.",
+[8][0x3b - 1] = "Unimemory Technology(s) Pte Ltd",
[8][0x3c - 1] = "Cuso",
[8][0x3d - 1] = "Kuso",
-[8][0x3e - 1] = "Uniquify Inc.",
+[8][0x3e - 1] = "Uniquify Inc",
[8][0x3f - 1] = "Skymedi Corporation",
-[8][0x40 - 1] = "Core Chance Co. Ltd.",
-[8][0x41 - 1] = "Tekism Co. Ltd.",
+[8][0x40 - 1] = "Core Chance Co Ltd",
+[8][0x41 - 1] = "Tekism Co Ltd",
[8][0x42 - 1] = "Seagate Technology PLC",
-[8][0x43 - 1] = "Hong Kong Gaia Group Co. Limited",
+[8][0x43 - 1] = "Hong Kong Gaia Group Co Limited",
[8][0x44 - 1] = "Gigacom Semiconductor LLC",
[8][0x45 - 1] = "V2 Technologies",
[8][0x46 - 1] = "TLi",
[8][0x47 - 1] = "Neotion",
[8][0x48 - 1] = "Lenovo",
-[8][0x49 - 1] = "Shenzhen Zhongteng Electronic Corp. Ltd.",
+[8][0x49 - 1] = "Shenzhen Zhongteng Electronic Corp Ltd",
[8][0x4a - 1] = "Compound Photonics",
[8][0x4b - 1] = "in2H2 inc",
-[8][0x4c - 1] = "Shenzhen Pango Microsystems Co. Ltd",
+[8][0x4c - 1] = "Shenzhen Pango Microsystems Co Ltd",
[8][0x4d - 1] = "Vasekey",
[8][0x4e - 1] = "Cal-Comp Industria de Semicondutores",
-[8][0x4f - 1] = "Eyenix Co., Ltd.",
+[8][0x4f - 1] = "Eyenix Co Ltd",
[8][0x50 - 1] = "Heoriady",
-[8][0x51 - 1] = "Accelerated Memory Production Inc.",
-[8][0x52 - 1] = "INVECAS, Inc.",
+[8][0x51 - 1] = "Accelerated Memory Production Inc",
+[8][0x52 - 1] = "INVECAS Inc",
[8][0x53 - 1] = "AP Memory",
[8][0x54 - 1] = "Douqi Technology",
-[8][0x55 - 1] = "Etron Technology, Inc.",
+[8][0x55 - 1] = "Etron Technology Inc",
[8][0x56 - 1] = "Indie Semiconductor",
-[8][0x57 - 1] = "Socionext Inc.",
+[8][0x57 - 1] = "Socionext Inc",
[8][0x58 - 1] = "HGST",
[8][0x59 - 1] = "EVGA",
-[8][0x5a - 1] = "Audience Inc.",
+[8][0x5a - 1] = "Audience Inc",
[8][0x5b - 1] = "EpicGear",
-[8][0x5c - 1] = "Vitesse Enterprise Co.",
+[8][0x5c - 1] = "Vitesse Enterprise Co",
[8][0x5d - 1] = "Foxtronn International Corporation",
-[8][0x5e - 1] = "Bretelon Inc.",
+[8][0x5e - 1] = "Bretelon Inc",
[8][0x5f - 1] = "Graphcore",
[8][0x60 - 1] = "Eoplex Inc",
-[8][0x61 - 1] = "MaxLinear, Inc.",
+[8][0x61 - 1] = "MaxLinear Inc",
[8][0x62 - 1] = "ETA Devices",
[8][0x63 - 1] = "LOKI",
-[8][0x64 - 1] = "IMS Electronics Co., Ltd.",
-[8][0x65 - 1] = "Dosilicon Co., Ltd.",
+[8][0x64 - 1] = "IMS Electronics Co Ltd",
+[8][0x65 - 1] = "Dosilicon Co Ltd",
[8][0x66 - 1] = "Dolphin Integration",
-[8][0x67 - 1] = "Shenzhen Mic Electronics Technology",
-[8][0x68 - 1] = "Boya Microelectronics Inc.",
+[8][0x67 - 1] = "Shenzhen Mic Electronics Technolog",
+[8][0x68 - 1] = "Boya Microelectronics Inc",
[8][0x69 - 1] = "Geniachip (Roche)",
[8][0x6a - 1] = "Axign",
-[8][0x6b - 1] = "Kingred Electronic Technology Ltd.",
+[8][0x6b - 1] = "Kingred Electronic Technology Ltd",
[8][0x6c - 1] = "Chao Yue Zhuo Computer Business Dept.",
[8][0x6d - 1] = "Guangzhou Si Nuo Electronic Technology.",
-[8][0x6e - 1] = "Crocus Technology Inc.",
+[8][0x6e - 1] = "Crocus Technology Inc",
[8][0x6f - 1] = "Creative Chips GmbH",
[8][0x70 - 1] = "GE Aviation Systems LLC.",
[8][0x71 - 1] = "Asgard",
-[8][0x72 - 1] = "Good Wealth Technology Ltd.",
+[8][0x72 - 1] = "Good Wealth Technology Ltd",
[8][0x73 - 1] = "TriCor Technologies",
[8][0x74 - 1] = "Nova-Systems GmbH",
[8][0x75 - 1] = "JUHOR",
-[8][0x76 - 1] = "Zhuhai Douke Commerce Co. Ltd.",
+[8][0x76 - 1] = "Zhuhai Douke Commerce Co Ltd",
[8][0x77 - 1] = "DSL Memory",
[8][0x78 - 1] = "Anvo-Systems Dresden GmbH",
[8][0x79 - 1] = "Realtek",
[8][0x7a - 1] = "AltoBeam",
[8][0x7b - 1] = "Wave Computing",
-[8][0x7c - 1] = "Beijing TrustNet Technology Co. Ltd.",
-[8][0x7d - 1] = "Innovium, Inc.",
+[8][0x7c - 1] = "Beijing TrustNet Technology Co Ltd",
+[8][0x7d - 1] = "Innovium Inc",
[8][0x7e - 1] = "Starsway Technology Limited",
-[9][0x01 - 1] = "Weltronics Co. LTD",
-[9][0x02 - 1] = "VMware, Inc.",
+[9][0x01 - 1] = "Weltronics Co LTD",
+[9][0x02 - 1] = "VMware Inc",
[9][0x03 - 1] = "Hewlett Packard Enterprise",
[9][0x04 - 1] = "INTENSO",
[9][0x05 - 1] = "Puya Semiconductor",
[9][0x06 - 1] = "MEMORFI",
[9][0x07 - 1] = "MSC Technologies GmbH",
[9][0x08 - 1] = "Txrui",
-[9][0x09 - 1] = "SiFive, Inc.",
+[9][0x09 - 1] = "SiFive Inc",
[9][0x0a - 1] = "Spreadtrum Communications",
-[9][0x0b - 1] = "Paragon Technology (Shenzhen) Ltd.",
+[9][0x0b - 1] = "XTX Technology Limited",
[9][0x0c - 1] = "UMAX Technology",
[9][0x0d - 1] = "Shenzhen Yong Sheng Technology",
[9][0x0e - 1] = "SNOAMOO (Shenzhen Kai Zhuo Yue)",
@@ -1151,6 +1156,261 @@
[9][0x10 - 1] = "Shenzhen XinRuiYan Electronics",
[9][0x11 - 1] = "Eta Compute",
[9][0x12 - 1] = "Energous",
-[9][0x13 - 1] = "Raspberry Pi Trading Ltd.",
-[9][0x14 - 1] = "Shenzhen Chixingzhe Tech Co. Ltd.",
+[9][0x13 - 1] = "Raspberry Pi Trading Ltd",
+[9][0x14 - 1] = "Shenzhen Chixingzhe Tech Co Ltd",
+[9][0x15 - 1] = "Silicon Mobility",
+[9][0x16 - 1] = "IQ-Analog Corporation",
+[9][0x17 - 1] = "Uhnder Inc",
+[9][0x18 - 1] = "Impinj",
+[9][0x19 - 1] = "DEPO Computers",
+[9][0x1a - 1] = "Nespeed Sysems",
+[9][0x1b - 1] = "Yangtze Memory Technologies Co Ltd",
+[9][0x1c - 1] = "MemxPro Inc",
+[9][0x1d - 1] = "Tammuz Co Ltd",
+[9][0x1e - 1] = "Allwinner Technology",
+[9][0x1f - 1] = "Shenzhen City Futian District Qing Xuan Tong Computer Trading Firm",
+[9][0x20 - 1] = "XMC",
+[9][0x21 - 1] = "Teclast",
+[9][0x22 - 1] = "Maxsun",
+[9][0x23 - 1] = "Haiguang Integrated Circuit Design",
+[9][0x24 - 1] = "RamCENTER Technology",
+[9][0x25 - 1] = "Phison Electronics Corporation",
+[9][0x26 - 1] = "Guizhou Huaxintong Semi-Conductor",
+[9][0x27 - 1] = "Network Intelligence",
+[9][0x28 - 1] = "Continental Technology (Holdings)",
+[9][0x29 - 1] = "Guangzhou Huayan Suning Electronic",
+[9][0x2a - 1] = "Guangzhou Zhouji Electronic Co Ltd",
+[9][0x2b - 1] = "Shenzhen Giant Hui Kang Tech Co Ltd",
+[9][0x2c - 1] = "Shenzhen Yilong Innovative Co Ltd",
+[9][0x2d - 1] = "Neo Forza",
+[9][0x2e - 1] = "Lyontek Inc",
+[9][0x2f - 1] = "Shanghai Kuxin Microelectronics Ltd",
+[9][0x30 - 1] = "Shenzhen Larix Technology Co Ltd",
+[9][0x31 - 1] = "Qbit Semiconductor Ltd",
+[9][0x32 - 1] = "Insignis Technology Corporation",
+[9][0x33 - 1] = "Lanson Memory Co Ltd",
+[9][0x34 - 1] = "Shenzhen Superway Electronics Co Ltd",
+[9][0x35 - 1] = "Canaan-Creative Co Ltd",
+[9][0x36 - 1] = "Black Diamond Memory",
+[9][0x37 - 1] = "Shenzhen City Parker Baking Electronics",
+[9][0x38 - 1] = "Shenzhen Baihong Technology Co Ltd",
+[9][0x39 - 1] = "GEO Semiconductors",
+[9][0x3a - 1] = "OCPC",
+[9][0x3b - 1] = "Artery Technology Co Ltd",
+[9][0x3c - 1] = "Jinyu",
+[9][0x3d - 1] = "ShenzhenYing Chi Technology Development",
+[9][0x3e - 1] = "Shenzhen Pengcheng Xin Technology",
+[9][0x3f - 1] = "Pegasus Semiconductor (Shanghai) Co",
+[9][0x40 - 1] = "Mythic Inc",
+[9][0x41 - 1] = "Elmos Semiconductor AG",
+[9][0x42 - 1] = "Kllisre",
+[9][0x43 - 1] = "Shenzhen Winconway Technology",
+[9][0x44 - 1] = "Shenzhen Xingmem Technology Corp",
+[9][0x45 - 1] = "Gold Key Technology Co Ltd",
+[9][0x46 - 1] = "Habana Labs Ltd",
+[9][0x47 - 1] = "Hoodisk Electronics Co Ltd",
+[9][0x48 - 1] = "SemsoTai (SZ) Technology Co Ltd",
+[9][0x49 - 1] = "OM Nanotech Pvt. Ltd",
+[9][0x4a - 1] = "Shenzhen Zhifeng Weiye Technology",
+[9][0x4b - 1] = "Xinshirui (Shenzhen) Electronics Co",
+[9][0x4c - 1] = "Guangzhou Zhong Hao Tian Electronic",
+[9][0x4d - 1] = "Shenzhen Longsys Electronics Co Ltd",
+[9][0x4e - 1] = "Deciso B.V.",
+[9][0x4f - 1] = "Puya Semiconductor (Shenzhen)",
+[9][0x50 - 1] = "Shenzhen Veineda Technology Co Ltd",
+[9][0x51 - 1] = "Antec Memory",
+[9][0x52 - 1] = "Cortus SAS",
+[9][0x53 - 1] = "Dust Leopard",
+[9][0x54 - 1] = "MyWo AS",
+[9][0x55 - 1] = "J&A Information Inc",
+[9][0x56 - 1] = "Shenzhen JIEPEI Technology Co Ltd",
+[9][0x57 - 1] = "Heidelberg University",
+[9][0x58 - 1] = "Flexxon PTE Ltd",
+[9][0x59 - 1] = "Wiliot",
+[9][0x5a - 1] = "Raysun Electronics International Ltd",
+[9][0x5b - 1] = "Aquarius Production Company LLC",
+[9][0x5c - 1] = "MACNICA DHW LTDA",
+[9][0x5d - 1] = "Intelimem",
+[9][0x5e - 1] = "Zbit Semiconductor Inc",
+[9][0x5f - 1] = "Shenzhen Technology Co Ltd",
+[9][0x60 - 1] = "Signalchip",
+[9][0x61 - 1] = "Shenzen Recadata Storage Technology",
+[9][0x62 - 1] = "Hyundai Technology",
+[9][0x63 - 1] = "Shanghai Fudi Investment Development",
+[9][0x64 - 1] = "Aixi Technology",
+[9][0x65 - 1] = "Tecon MT",
+[9][0x66 - 1] = "Onda Electric Co Ltd",
+[9][0x67 - 1] = "Jinshen",
+[9][0x68 - 1] = "Kimtigo Semiconductor (HK) Limited",
+[9][0x69 - 1] = "IIT Madras",
+[9][0x6a - 1] = "Shenshan (Shenzhen) Electronic",
+[9][0x6b - 1] = "Hefei Core Storage Electronic Limited",
+[9][0x6c - 1] = "Colorful Technology Ltd",
+[9][0x6d - 1] = "Visenta (Xiamen) Technology Co Ltd",
+[9][0x6e - 1] = "Roa Logic BV",
+[9][0x6f - 1] = "NSITEXE Inc",
+[9][0x70 - 1] = "Hong Kong Hyunion Electronics",
+[9][0x71 - 1] = "ASK Technology Group Limited",
+[9][0x72 - 1] = "GIGA-BYTE Technology Co Ltd",
+[9][0x73 - 1] = "Terabyte Co Ltd",
+[9][0x74 - 1] = "Hyundai Inc",
+[9][0x75 - 1] = "EXCELERAM",
+[9][0x76 - 1] = "PsiKick",
+[9][0x77 - 1] = "Netac Technology Co Ltd",
+[9][0x78 - 1] = "PCCOOLER",
+[9][0x79 - 1] = "Jiangsu Huacun Electronic Technology",
+[9][0x7a - 1] = "Shenzhen Micro Innovation Industry",
+[9][0x7b - 1] = "Beijing Tongfang Microelectronics Co",
+[9][0x7c - 1] = "XZN Storage Technology",
+[9][0x7d - 1] = "ChipCraft Sp. z.o.o.",
+[9][0x7e - 1] = "ALLFLASH Technology Limited",
+[10][0x01 - 1] = "Foerd Technology Co Ltd",
+[10][0x02 - 1] = "KingSpec",
+[10][0x03 - 1] = "Codasip GmbH",
+[10][0x04 - 1] = "SL Link Co Ltd",
+[10][0x05 - 1] = "Shenzhen Kefu Technology Co Limited",
+[10][0x06 - 1] = "Shenzhen ZST Electronics Technology",
+[10][0x07 - 1] = "Kyokuto Electronic Inc",
+[10][0x08 - 1] = "Warrior Technology",
+[10][0x09 - 1] = "TRINAMIC Motion Control GmbH & Co",
+[10][0x0a - 1] = "PixelDisplay Inc",
+[10][0x0b - 1] = "Shenzhen Futian District Bo Yueda Elec",
+[10][0x0c - 1] = "Richtek Power",
+[10][0x0d - 1] = "Shenzhen LianTeng Electronics Co Ltd",
+[10][0x0e - 1] = "AITC Memory",
+[10][0x0f - 1] = "UNIC Memory Technology Co Ltd",
+[10][0x10 - 1] = "Shenzhen Huafeng Science Technology",
+[10][0x11 - 1] = "ChangXin Memory Technologies Inc",
+[10][0x12 - 1] = "Guangzhou Xinyi Heng Computer Trading Firm",
+[10][0x13 - 1] = "SambaNova Systems",
+[10][0x14 - 1] = "V-GEN",
+[10][0x15 - 1] = "Jump Trading",
+[10][0x16 - 1] = "Ampere Computing",
+[10][0x17 - 1] = "Shenzhen Zhongshi Technology Co Ltd",
+[10][0x18 - 1] = "Shenzhen Zhongtian Bozhong Technology",
+[10][0x19 - 1] = "Tri-Tech International",
+[10][0x1a - 1] = "Silicon Intergrated Systems Corporation",
+[10][0x1b - 1] = "Shenzhen HongDingChen Information",
+[10][0x1c - 1] = "Plexton Holdings Limited",
+[10][0x1d - 1] = "AMS (Jiangsu Advanced Memory Semi)",
+[10][0x1e - 1] = "Wuhan Jing Tian Interconnected Tech Co",
+[10][0x1f - 1] = "Axia Memory Technology",
+[10][0x20 - 1] = "Chipset Technology Holding Limited",
+[10][0x21 - 1] = "Shenzhen Xinshida Technology Co Ltd",
+[10][0x22 - 1] = "Shenzhen Chuangshifeida Technology",
+[10][0x23 - 1] = "Guangzhou MiaoYuanJi Technology",
+[10][0x24 - 1] = "ADVAN Inc",
+[10][0x25 - 1] = "Shenzhen Qianhai Weishengda Electronic Commerce Company Ltd",
+[10][0x26 - 1] = "Guangzhou Guang Xie Cheng Trading",
+[10][0x27 - 1] = "StarRam International Co Ltd",
+[10][0x28 - 1] = "Shen Zhen XinShenHua Tech Co Ltd",
+[10][0x29 - 1] = "UltraMemory Inc",
+[10][0x2a - 1] = "New Coastline Global Tech Industry Co",
+[10][0x2b - 1] = "Sinker",
+[10][0x2c - 1] = "Diamond",
+[10][0x2d - 1] = "PUSKILL",
+[10][0x2e - 1] = "Guangzhou Hao Jia Ye Technology Co",
+[10][0x2f - 1] = "Ming Xin Limited",
+[10][0x30 - 1] = "Barefoot Networks",
+[10][0x31 - 1] = "Biwin Semiconductor (HK) Co Ltd",
+[10][0x32 - 1] = "UD INFO Corporation",
+[10][0x33 - 1] = "Trek Technology (S) PTE Ltd",
+[10][0x34 - 1] = "Xiamen Kingblaze Technology Co Ltd",
+[10][0x35 - 1] = "Shenzhen Lomica Technology Co Ltd",
+[10][0x36 - 1] = "Nuclei System Technology Co Ltd",
+[10][0x37 - 1] = "Wuhan Xun Zhan Electronic Technology",
+[10][0x38 - 1] = "Shenzhen Ingacom Semiconductor Ltd",
+[10][0x39 - 1] = "Zotac Technology Ltd",
+[10][0x3a - 1] = "Foxline",
+[10][0x3b - 1] = "Shenzhen Farasia Science Technology",
+[10][0x3c - 1] = "Efinix Inc",
+[10][0x3d - 1] = "Hua Nan San Xian Technology Co Ltd",
+[10][0x3e - 1] = "Goldtech Electronics Co Ltd",
+[10][0x3f - 1] = "Shanghai Han Rong Microelectronics Co",
+[10][0x40 - 1] = "Shenzhen Zhongguang Yunhe Trading",
+[10][0x41 - 1] = "Smart Shine(QingDao) Microelectronics",
+[10][0x42 - 1] = "Thermaltake Technology Co Ltd",
+[10][0x43 - 1] = "Shenzhen O'Yang Maile Technology Ltd",
+[10][0x44 - 1] = "UPMEM",
+[10][0x45 - 1] = "Chun Well Technology Holding Limited",
+[10][0x46 - 1] = "Astera Labs Inc",
+[10][0x47 - 1] = "VMEMORY Co Ltd",
+[10][0x48 - 1] = "Advantech Co Ltd",
+[10][0x49 - 1] = "Chengdu Fengcai Electronic Technology",
+[10][0x4a - 1] = "The Boeing Company",
+[10][0x4b - 1] = "ThinCI Inc",
+[10][0x4c - 1] = "Ramonster Technology Co Ltd",
+[10][0x4d - 1] = "Wuhan Naonongmai Technology Co Ltd",
+[10][0x4e - 1] = "Shenzhen Hui ShingTong Technology",
+[10][0x4f - 1] = "Yourlyon",
+[10][0x50 - 1] = "Fabu Technology",
+[10][0x51 - 1] = "Shenzhen Yikesheng Technology Co Ltd",
+[10][0x52 - 1] = "NOR-MEM",
+[10][0x53 - 1] = "Cervoz Co Ltd",
+[10][0x54 - 1] = "Bitmain Technologies Inc.",
+[10][0x55 - 1] = "Facebook Inc",
+[10][0x56 - 1] = "Shenzhen Longsys Electronics Co Ltd",
+[10][0x57 - 1] = "Guangzhou Siye Electronic Technology",
+[10][0x58 - 1] = "Silergy",
+[10][0x59 - 1] = "Adamway",
+[10][0x5a - 1] = "PZG",
+[10][0x5b - 1] = "Shenzhen King Power Electronics",
+[10][0x5c - 1] = "Guangzhou ZiaoFu Tranding Co Ltd",
+[10][0x5d - 1] = "Shenzhen SKIHOTAR Semiconductor",
+[10][0x5e - 1] = "PulseRain Technology",
+[10][0x5f - 1] = "Seeker Technology Limited",
+[10][0x60 - 1] = "Shenzhen OSCOO Tech Co Ltd",
+[10][0x61 - 1] = "Shenzhen Yze Technology Co Ltd",
+[10][0x62 - 1] = "Shenzhen Jieshuo Electronic Commerce",
+[10][0x63 - 1] = "Gazda",
+[10][0x64 - 1] = "Hua Wei Technology Co Ltd",
+[10][0x65 - 1] = "Esperanto Technologies",
+[10][0x66 - 1] = "JinSheng Electronic (Shenzhen) Co Ltd",
+[10][0x67 - 1] = "Shenzhen Shi Bolunshuai Technology",
+[10][0x68 - 1] = "Shanghai Rei Zuan Information Tech",
+[10][0x69 - 1] = "Fraunhofer IIS",
+[10][0x6a - 1] = "Kandou Bus SA",
+[10][0x6b - 1] = "Acer",
+[10][0x6c - 1] = "Artmem Technology Co Ltd",
+[10][0x6d - 1] = "Gstar Semiconductor Co Ltd",
+[10][0x6e - 1] = "ShineDisk",
+[10][0x6f - 1] = "Shenzhen CHN Technology Co Ltd",
+[10][0x70 - 1] = "UnionChip Semiconductor Co Ltd",
+[10][0x71 - 1] = "Tanbassh",
+[10][0x72 - 1] = "Shenzhen Tianyu Jieyun Intl Logistics",
+[10][0x73 - 1] = "MCLogic Inc",
+[10][0x74 - 1] = "Eorex Corporation",
+[10][0x75 - 1] = "Arm Technology (China) Co Ltd",
+[10][0x76 - 1] = "Lexar Co Limited",
+[10][0x77 - 1] = "QinetiQ Group plc",
+[10][0x78 - 1] = "Exascend",
+[10][0x79 - 1] = "Hong Kong Hyunion Electronics Co Ltd",
+[10][0x7a - 1] = "Shenzhen Banghong Electronics Co Ltd",
+[10][0x7b - 1] = "MBit Wireless Inc",
+[10][0x7c - 1] = "Hex Five Security Inc",
+[10][0x7d - 1] = "ShenZhen Juhor Precision Tech Co Ltd",
+[10][0x7e - 1] = "Shenzhen Reeinno Technology Co Ltd",
+[11][0x01 - 1] = "ABIT Electronics (Shenzhen) Co Ltd",
+[11][0x02 - 1] = "Semidrive",
+[11][0x03 - 1] = "MyTek Electronics Corp",
+[11][0x04 - 1] = "Wxilicon Technology Co Ltd",
+[11][0x05 - 1] = "Shenzhen Meixin Electronics Ltd",
+[11][0x06 - 1] = "Ghost Wolf",
+[11][0x07 - 1] = "LiSion Technologies Inc",
+[11][0x08 - 1] = "Power Active Co Ltd",
+[11][0x09 - 1] = "Pioneer High Fidelity Taiwan Co. Ltd",
+[11][0x0a - 1] = "LuoSilk",
+[11][0x0b - 1] = "Shenzhen Chuangshifeida Technology",
+[11][0x0c - 1] = "Black Sesame Technologies Inc",
+[11][0x0d - 1] = "Jiangsu Xinsheng Intelligent Technology",
+[11][0x0e - 1] = "MLOONG",
+[11][0x0f - 1] = "Quadratica LLC",
+[11][0x10 - 1] = "Anpec Electronics",
+[11][0x11 - 1] = "Xi'an Morebeck Semiconductor Tech Co",
+[11][0x12 - 1] = "Kingbank Technology Co Ltd",
+[11][0x13 - 1] = "ITRenew Inc",
+[11][0x14 - 1] = "Shenzhen Eaget Innovation Tech Ltd",
+[11][0x15 - 1] = "Jazer",
+[11][0x16 - 1] = "Xiamen Semiconductor Investment Group",
+[11][0x17 - 1] = "Guangzhou Longdao Network Tech Co",
/* EOF */
-----------------------------------------------------------------------
Summary of changes:
src/helper/jep106.inc | 746 ++++++++++++++++++++++++++++++++++----------------
1 file changed, 503 insertions(+), 243 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
