Menu
▾
▴
openocd-commit — OpenOCD commit maling list - read only
You can subscribe to this list here.
| 2008 |
Jan
|
Feb
|
Mar
|
Apr
|
May
|
Jun
|
Jul
|
Aug
|
Sep
|
Oct
|
Nov
|
Dec
(75) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2009 |
Jan
(70) |
Feb
(20) |
Mar
(52) |
Apr
(149) |
May
(387) |
Jun
(466) |
Jul
(133) |
Aug
(87) |
Sep
(122) |
Oct
(140) |
Nov
(185) |
Dec
(105) |
| 2010 |
Jan
(85) |
Feb
(45) |
Mar
(75) |
Apr
(17) |
May
(41) |
Jun
(52) |
Jul
(33) |
Aug
(29) |
Sep
(36) |
Oct
(15) |
Nov
(26) |
Dec
(34) |
| 2011 |
Jan
(26) |
Feb
(25) |
Mar
(26) |
Apr
(29) |
May
(20) |
Jun
(27) |
Jul
(15) |
Aug
(32) |
Sep
(13) |
Oct
(64) |
Nov
(60) |
Dec
(10) |
| 2012 |
Jan
(64) |
Feb
(63) |
Mar
(39) |
Apr
(43) |
May
(54) |
Jun
(11) |
Jul
(30) |
Aug
(45) |
Sep
(11) |
Oct
(70) |
Nov
(24) |
Dec
(23) |
| 2013 |
Jan
(17) |
Feb
(8) |
Mar
(35) |
Apr
(40) |
May
(20) |
Jun
(24) |
Jul
(36) |
Aug
(25) |
Sep
(42) |
Oct
(40) |
Nov
(9) |
Dec
(21) |
| 2014 |
Jan
(29) |
Feb
(24) |
Mar
(60) |
Apr
(22) |
May
(22) |
Jun
(46) |
Jul
(11) |
Aug
(23) |
Sep
(26) |
Oct
(10) |
Nov
(14) |
Dec
(2) |
| 2015 |
Jan
(28) |
Feb
(47) |
Mar
(33) |
Apr
(58) |
May
(5) |
Jun
(1) |
Jul
|
Aug
(8) |
Sep
(12) |
Oct
(25) |
Nov
(58) |
Dec
(21) |
| 2016 |
Jan
(12) |
Feb
(40) |
Mar
(2) |
Apr
(1) |
May
(67) |
Jun
(2) |
Jul
(5) |
Aug
(36) |
Sep
|
Oct
(24) |
Nov
(17) |
Dec
(50) |
| 2017 |
Jan
(14) |
Feb
(16) |
Mar
(2) |
Apr
(35) |
May
(14) |
Jun
(16) |
Jul
(3) |
Aug
(3) |
Sep
|
Oct
(19) |
Nov
|
Dec
(16) |
| 2018 |
Jan
(55) |
Feb
(11) |
Mar
(34) |
Apr
(14) |
May
(4) |
Jun
(20) |
Jul
(39) |
Aug
(16) |
Sep
(17) |
Oct
(16) |
Nov
(20) |
Dec
(30) |
| 2019 |
Jan
(29) |
Feb
(24) |
Mar
(37) |
Apr
(26) |
May
(19) |
Jun
(21) |
Jul
(2) |
Aug
(3) |
Sep
(9) |
Oct
(12) |
Nov
(12) |
Dec
(12) |
| 2020 |
Jan
(47) |
Feb
(36) |
Mar
(54) |
Apr
(44) |
May
(37) |
Jun
(19) |
Jul
(32) |
Aug
(13) |
Sep
(16) |
Oct
(24) |
Nov
(32) |
Dec
(11) |
| 2021 |
Jan
(14) |
Feb
(5) |
Mar
(40) |
Apr
(32) |
May
(42) |
Jun
(31) |
Jul
(29) |
Aug
(47) |
Sep
(38) |
Oct
(17) |
Nov
(74) |
Dec
(33) |
| 2022 |
Jan
(11) |
Feb
(15) |
Mar
(40) |
Apr
(21) |
May
(39) |
Jun
(44) |
Jul
(19) |
Aug
(46) |
Sep
(79) |
Oct
(35) |
Nov
(21) |
Dec
(15) |
| 2023 |
Jan
(56) |
Feb
(13) |
Mar
(43) |
Apr
(28) |
May
(60) |
Jun
(15) |
Jul
(29) |
Aug
(28) |
Sep
(32) |
Oct
(21) |
Nov
(42) |
Dec
(39) |
| 2024 |
Jan
(35) |
Feb
(17) |
Mar
(28) |
Apr
(7) |
May
(14) |
Jun
(35) |
Jul
(30) |
Aug
(35) |
Sep
(30) |
Oct
(28) |
Nov
(38) |
Dec
(18) |
| 2025 |
Jan
(21) |
Feb
(28) |
Mar
(36) |
Apr
(35) |
May
(34) |
Jun
(58) |
Jul
(9) |
Aug
(37) |
Sep
|
Oct
|
Nov
|
Dec
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-03-10 21:48:41
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 4c00f96fc2e32397da5b46ca3428a992333548da (commit)
from 266a945ad3e8b421f175910c21f385c5508c849a (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 4c00f96fc2e32397da5b46ca3428a992333548da
Author: Antonio Borneo <bor...@gm...>
Date: Fri Jan 8 13:15:14 2021 +0100
configure.ac: switch to autoconf 2.69
OpenOCD file configure.ac requires autoconf equal or newer then
2.64, which is quite old.
These are the release dates so far:
- autoconf-2.64 2009-07-26
- autoconf-2.65 2009-11-21
- autoconf-2.66 2010-07-02
- autoconf-2.67 2010-08-02
- autoconf-2.68 2010-09-22
- autoconf-2.69 2012-04-24
- autoconf-2.70 2020-12-08
Switch to autoconf 2.69, which is old enough to be the standard in
current systems.
This should reduce the effort on configure.ac compatibility.
Change-Id: Ia7c78d2fa34c50ed5ccf4fb66ad3484369cf3b4a
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/6008
Tested-by: jenkins
diff --git a/configure.ac b/configure.ac
index b6723a396..a8c2e9daf 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1,4 +1,4 @@
-AC_PREREQ(2.64)
+AC_PREREQ([2.69])
AC_INIT([openocd], [0.11.0+dev],
[OpenOCD Mailing List <ope...@li...>])
AC_CONFIG_SRCDIR([src/openocd.c])
-----------------------------------------------------------------------
Summary of changes:
configure.ac | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-03-10 21:38:38
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 266a945ad3e8b421f175910c21f385c5508c849a (commit)
from 06990a1a9e9ace74fc6e79a78b5405bb63cee6b0 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 266a945ad3e8b421f175910c21f385c5508c849a
Author: Antonio Borneo <bor...@gm...>
Date: Sun Nov 29 22:25:37 2020 +0100
jimtcl: update to version 0.80 (2020-10-29)
Update jimtcl to version 0.80.
Add a workaround in Makefile.am to allow 'make distcheck' with the
new jimtcl. A fix is already merged upstream but will be part of
the future release 0.81 of jimtcl.
Change-Id: I1cebfb9c17179114960dc771e0b31836b4b9b058
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/5949
Tested-by: jenkins
diff --git a/Makefile.am b/Makefile.am
index 75f0c0993..85287c50f 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -115,6 +115,8 @@ uninstall-hook:
distclean-local:
rm -rf Doxyfile doxygen
rm -f $(srcdir)/jimtcl/configure.gnu
+# FIXME: workaround for jimtcl 0.80 only. Remove from jimtcl 0.81
+ rm -f jimtcl/examples.api/Makefile
DISTCLEANFILES = doxygen.log
diff --git a/jimtcl b/jimtcl
index 0aa0fb4e3..fb923fab4 160000
--- a/jimtcl
+++ b/jimtcl
@@ -1 +1 @@
-Subproject commit 0aa0fb4e3a38d38a49de9eb585d93d63a370dcf6
+Subproject commit fb923fab4f0cf276c336d98692d00df6a943791d
-----------------------------------------------------------------------
Summary of changes:
Makefile.am | 2 ++
jimtcl | 2 +-
2 files changed, 3 insertions(+), 1 deletion(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-03-10 21:38:09
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 06990a1a9e9ace74fc6e79a78b5405bb63cee6b0 (commit)
via 77e1841f6420715953628c39ee6e4f515331e5ae (commit)
via f9b5e34e39fd7497fe9dfc965e2e3fa7e78616c1 (commit)
via a909df7088c32ef455ad3f78041ea17ffde41795 (commit)
from 210b7d2d1644c5c3dd1e59ffa684af56e3be498f (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 06990a1a9e9ace74fc6e79a78b5405bb63cee6b0
Author: Tarek BOCHKATI <tar...@gm...>
Date: Thu Feb 18 00:35:48 2021 +0100
tcl/target: add BCM2711 configuration file
The Broadcom BCM2711 used in Raspberry Pi 4
No documentation was found on Broadcom website
Partial information is available in raspberry pi website:
https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2711/
Change-Id: I3db6c9af520af8ab4c21ad35ff0f2db28efc0325
Signed-off-by: Tarek BOCHKATI <tar...@gm...>
Reviewed-on: http://openocd.zylin.com/6066
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/target/bcm2711.cfg b/tcl/target/bcm2711.cfg
new file mode 100644
index 000000000..f8d2b3a65
--- /dev/null
+++ b/tcl/target/bcm2711.cfg
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# The Broadcom BCM2711 used in Raspberry Pi 4
+# No documentation was found on Broadcom website
+
+# Partial information is available in raspberry pi website:
+# https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2711/
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME bcm2711
+}
+
+if { [info exists CHIPCORES] } {
+ set _cores $CHIPCORES
+} else {
+ set _cores 4
+}
+
+if { [info exists USE_SMP] } {
+ set _USE_SMP $USE_SMP
+} else {
+ set _USE_SMP 0
+}
+
+if { [info exists DAP_TAPID] } {
+ set _DAP_TAPID $DAP_TAPID
+} else {
+ set _DAP_TAPID 0x4ba00477
+}
+
+jtag newtap $_CHIPNAME cpu -expected-id $_DAP_TAPID -irlen 4
+adapter speed 4000
+
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+# MEM-AP for direct access
+target create $_CHIPNAME.ap mem_ap -dap $_CHIPNAME.dap -ap-num 0
+
+# these addresses are obtained from the ROM table via 'dap info 0' command
+set _DBGBASE {0x80410000 0x80510000 0x80610000 0x80710000}
+set _CTIBASE {0x80420000 0x80520000 0x80620000 0x80720000}
+
+set _smp_command "target smp"
+
+for { set _core 0 } { $_core < $_cores } { incr _core } {
+ set _CTINAME $_CHIPNAME.cti$_core
+ set _TARGETNAME $_CHIPNAME.cpu$_core
+
+ cti create $_CTINAME -dap $_CHIPNAME.dap -ap-num 0 -baseaddr [lindex $_CTIBASE $_core]
+ target create $_TARGETNAME aarch64 -dap $_CHIPNAME.dap -ap-num 0 -dbgbase [lindex $_DBGBASE $_core] -cti $_CTINAME
+
+ set _smp_command "$_smp_command $_TARGETNAME"
+}
+
+if {$_USE_SMP} {
+ eval $_smp_command
+}
+
+# default target is cpu0
+targets $_CHIPNAME.cpu0
commit 77e1841f6420715953628c39ee6e4f515331e5ae
Author: Tarek BOCHKATI <tar...@gm...>
Date: Sat Feb 20 23:40:56 2021 +0100
tcl/target: add BCM2837 configuration file
This is the Broadcom chip used in the Raspberry Pi 3,
and in later models of the Raspberry Pi 2.
Partial information is available in raspberry pi website:
https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2837
https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2837b0
Change-Id: I1188a7866304c59f670a543809aca3927174786e
Signed-off-by: Tarek BOCHKATI <tar...@gm...>
Reviewed-on: http://openocd.zylin.com/6069
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/target/bcm2837.cfg b/tcl/target/bcm2837.cfg
new file mode 100644
index 000000000..749de3103
--- /dev/null
+++ b/tcl/target/bcm2837.cfg
@@ -0,0 +1,64 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# This is the Broadcom chip used in the Raspberry Pi 3,
+# and in later models of the Raspberry Pi 2.
+
+# Partial information is available in raspberry pi website:
+# https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2837
+# https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2837b0
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME bcm2837
+}
+
+if { [info exists CHIPCORES] } {
+ set _cores $CHIPCORES
+} else {
+ set _cores 4
+}
+
+if { [info exists USE_SMP] } {
+ set _USE_SMP $USE_SMP
+} else {
+ set _USE_SMP 0
+}
+
+if { [info exists DAP_TAPID] } {
+ set _DAP_TAPID $DAP_TAPID
+} else {
+ set _DAP_TAPID 0x4ba00477
+}
+
+jtag newtap $_CHIPNAME cpu -expected-id $_DAP_TAPID -irlen 4
+adapter speed 4000
+
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+# MEM-AP for direct access
+target create $_CHIPNAME.ap mem_ap -dap $_CHIPNAME.dap -ap-num 0
+
+# these addresses are obtained from the ROM table via 'dap info 0' command
+set _DBGBASE {0x80010000 0x80012000 0x80014000 0x80016000}
+set _CTIBASE {0x80018000 0x80019000 0x8001a000 0x8001b000}
+
+set _smp_command "target smp"
+
+for { set _core 0 } { $_core < $_cores } { incr _core } {
+ set _CTINAME $_CHIPNAME.cti$_core
+ set _TARGETNAME $_CHIPNAME.cpu$_core
+
+ cti create $_CTINAME -dap $_CHIPNAME.dap -ap-num 0 -baseaddr [lindex $_CTIBASE $_core]
+ target create $_TARGETNAME aarch64 -dap $_CHIPNAME.dap -ap-num 0 -dbgbase [lindex $_DBGBASE $_core] -cti $_CTINAME
+ $_TARGETNAME configure -event reset-assert-post { aarch64 dbginit }
+
+ set _smp_command "$_smp_command $_TARGETNAME"
+}
+
+if {$_USE_SMP} {
+ eval $_smp_command
+}
+
+# default target is cpu0
+targets $_CHIPNAME.cpu0
commit f9b5e34e39fd7497fe9dfc965e2e3fa7e78616c1
Author: Tarek BOCHKATI <tar...@gm...>
Date: Sat Feb 20 23:21:53 2021 +0100
tcl/target: add BCM2836 configuration file
The Broadcom chip used in the Raspberry Pi 2 Model B
Partial information is available in raspberry pi website:
https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2836
Change-Id: I50b040db213c5b72f63d5f5534c552426c7376f9
Signed-off-by: Tarek BOCHKATI <tar...@gm...>
Reviewed-on: http://openocd.zylin.com/6068
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/target/bcm2836.cfg b/tcl/target/bcm2836.cfg
new file mode 100644
index 000000000..04921315e
--- /dev/null
+++ b/tcl/target/bcm2836.cfg
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# The Broadcom chip used in the Raspberry Pi 2 Model B
+
+# Partial information is available in raspberry pi website:
+# https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2836
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME bcm2836
+}
+
+if { [info exists CHIPCORES] } {
+ set _cores $CHIPCORES
+} else {
+ set _cores 4
+}
+
+if { [info exists USE_SMP] } {
+ set _USE_SMP $USE_SMP
+} else {
+ set _USE_SMP 0
+}
+
+if { [info exists DAP_TAPID] } {
+ set _DAP_TAPID $DAP_TAPID
+} else {
+ set _DAP_TAPID 0x4ba00477
+}
+
+jtag newtap $_CHIPNAME cpu -expected-id $_DAP_TAPID -irlen 4
+adapter speed 4000
+
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+# MEM-AP for direct access
+target create $_CHIPNAME.ap mem_ap -dap $_CHIPNAME.dap -ap-num 0
+
+# these addresses are obtained from the ROM table via 'dap info 0' command
+set _DBGBASE {0x80010000 0x80012000 0x80014000 0x80016000}
+
+set _smp_command "target smp"
+
+for { set _core 0 } { $_core < $_cores } { incr _core } {
+ set _TARGETNAME $_CHIPNAME.cpu$_core
+
+ target create $_TARGETNAME cortex_a -dap $_CHIPNAME.dap -coreid $_core -dbgbase [lindex $_DBGBASE $_core]
+ $_TARGETNAME configure -event reset-assert-post { cortex_a dbginit }
+
+ set _smp_command "$_smp_command $_CHIPNAME.cpu$_core"
+}
+
+if {$_USE_SMP} {
+ eval $_smp_command
+}
+
+# default target is cpu0
+targets $_CHIPNAME.cpu0
commit a909df7088c32ef455ad3f78041ea17ffde41795
Author: Tarek BOCHKATI <tar...@gm...>
Date: Fri Feb 19 15:23:34 2021 +0100
tcl/target: add BCM2835 configuration file
This is the Broadcom chip used in the Raspberry Pi Model A, B, B+,
the Compute Module, and the Raspberry Pi Zero.
Partial information is available in raspberry pi website:
https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2835
Change-Id: Ifeb012952473d624327e8c010ac5c886d9473aa0
Signed-off-by: Tarek BOCHKATI <tar...@gm...>
Reviewed-on: http://openocd.zylin.com/6067
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/target/bcm2835.cfg b/tcl/target/bcm2835.cfg
new file mode 100644
index 000000000..32a03666c
--- /dev/null
+++ b/tcl/target/bcm2835.cfg
@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# This is the Broadcom chip used in the Raspberry Pi Model A, B, B+,
+# the Compute Module, and the Raspberry Pi Zero.
+
+# Partial information is available in raspberry pi website:
+# https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2835
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME bcm2835
+}
+
+if { [info exists DAP_TAPID] } {
+ set _DAP_TAPID $DAP_TAPID
+} else {
+ set _DAP_TAPID 0x07b7617F
+}
+
+jtag newtap $_CHIPNAME cpu -expected-id $_DAP_TAPID -irlen 5
+adapter speed 4000
+
+target create $_CHIPNAME.cpu0 arm11 -chain-position $_CHIPNAME.cpu
-----------------------------------------------------------------------
Summary of changes:
tcl/target/bcm2711.cfg | 62 ++++++++++++++++++++++++++++++++++++++++++++++++
tcl/target/bcm2835.cfg | 24 +++++++++++++++++++
tcl/target/bcm2836.cfg | 59 ++++++++++++++++++++++++++++++++++++++++++++++
tcl/target/bcm2837.cfg | 64 ++++++++++++++++++++++++++++++++++++++++++++++++++
4 files changed, 209 insertions(+)
create mode 100644 tcl/target/bcm2711.cfg
create mode 100644 tcl/target/bcm2835.cfg
create mode 100644 tcl/target/bcm2836.cfg
create mode 100644 tcl/target/bcm2837.cfg
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-03-10 21:37:18
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 210b7d2d1644c5c3dd1e59ffa684af56e3be498f (commit)
via 8132b77d612e88167e8f0c7bdc6aa9df3661fd4e (commit)
via a2569438380566a8eee339006f1923d4c147850d (commit)
from bc0c9907d6ba9a39a953482a2bb2195504999427 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 210b7d2d1644c5c3dd1e59ffa684af56e3be498f
Author: Marc Schink <de...@za...>
Date: Mon Feb 1 21:23:35 2021 +0100
flash/nor/stmqspi: Replace macros with static inline functions
There is no good reason to use macros instead of static inline functions. The
current code is hard maintain. For example, it changes variables outside of the
macro scope. Also, it is conflicting with the C coding style.
Change-Id: I5ac9d2ae076ef73c176d4e32b2e7e0a99fa875ab
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: http://openocd.zylin.com/6046
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/flash/nor/stmqspi.c b/src/flash/nor/stmqspi.c
index a013336a0..11aa43898 100644
--- a/src/flash/nor/stmqspi.c
+++ b/src/flash/nor/stmqspi.c
@@ -52,14 +52,6 @@
#undef SPIFLASH_READ
#undef SPIFLASH_PAGE_PROGRAM
-#define READ_REG(a) \
-({ \
- uint32_t _result; \
- \
- retval = target_read_u32(target, io_base + (a), &_result); \
- (retval == ERROR_OK) ? _result : 0x0; \
-})
-
/* saved mode settings */
#define QSPI_MODE (stmqspi_info->saved_ccr & \
(0xF0000000U | QSPI_DCYC_MASK | QSPI_4LINE_MODE | QSPI_ALTB_MODE | QSPI_ADDR4))
@@ -156,23 +148,6 @@
#define OPI_CMD(cmd) ((OPI_MODE ? ((((uint16_t)(cmd)) << 8) | (~(cmd) & 0xFFU)) : (cmd)))
-#define OCTOSPI_CMD(mode, ccr, ir) \
-({ \
- retval = target_write_u32(target, io_base + OCTOSPI_CR, \
- OCTOSPI_MODE | (mode)); \
- if (retval == ERROR_OK) \
- retval = target_write_u32(target, io_base + OCTOSPI_TCR, \
- (stmqspi_info->saved_tcr & ~OCTOSPI_DCYC_MASK) | \
- ((OPI_MODE && ((mode) == OCTOSPI_READ_MODE)) ? \
- (OPI_DUMMY << OCTOSPI_DCYC_POS) : 0)); \
- if (retval == ERROR_OK) \
- retval = target_write_u32(target, io_base + OCTOSPI_CCR, ccr); \
- if (retval == ERROR_OK) \
- retval = target_write_u32(target, io_base + OCTOSPI_IR, \
- OPI_CMD(ir)); \
- retval; \
-})
-
/* convert uint32_t into 4 uint8_t in little endian byte order */
static inline uint32_t h_to_le_32(uint32_t val)
{
@@ -208,6 +183,35 @@ struct stmqspi_flash_bank {
unsigned int sfdp_dummy2; /* number of dummy bytes for SFDP read for flash2 */
};
+static inline int octospi_cmd(struct flash_bank *bank, uint32_t mode,
+ uint32_t ccr, uint32_t ir)
+{
+ struct target *target = bank->target;
+ const struct stmqspi_flash_bank *stmqspi_info = bank->driver_priv;
+ const uint32_t io_base = stmqspi_info->io_base;
+
+ int retval = target_write_u32(target, io_base + OCTOSPI_CR,
+ OCTOSPI_MODE | mode);
+
+ if (retval != ERROR_OK)
+ return retval;
+
+ retval = target_write_u32(target, io_base + OCTOSPI_TCR,
+ (stmqspi_info->saved_tcr & ~OCTOSPI_DCYC_MASK) |
+ ((OPI_MODE && (mode == OCTOSPI_READ_MODE)) ?
+ (OPI_DUMMY << OCTOSPI_DCYC_POS) : 0));
+
+ if (retval != ERROR_OK)
+ return retval;
+
+ retval = target_write_u32(target, io_base + OCTOSPI_CCR, ccr);
+
+ if (retval != ERROR_OK)
+ return retval;
+
+ return target_write_u32(target, io_base + OCTOSPI_IR, OPI_CMD(ir));
+}
+
FLASH_BANK_COMMAND_HANDLER(stmqspi_flash_bank_command)
{
struct stmqspi_flash_bank *stmqspi_info;
@@ -242,19 +246,19 @@ static int poll_busy(struct flash_bank *bank, int timeout)
struct target *target = bank->target;
struct stmqspi_flash_bank *stmqspi_info = bank->driver_priv;
uint32_t io_base = stmqspi_info->io_base;
- uint32_t spi_sr;
- int retval;
long long endtime;
endtime = timeval_ms() + timeout;
do {
- spi_sr = READ_REG(SPI_SR);
- if ((spi_sr & BIT(SPI_BUSY)) == 0) {
- if (retval == ERROR_OK) {
- /* Clear transmit finished flag */
- retval = target_write_u32(target, io_base + SPI_FCR, BIT(SPI_TCF));
- }
+ uint32_t spi_sr;
+ int retval = target_read_u32(target, io_base + SPI_SR, &spi_sr);
+
+ if (retval != ERROR_OK)
return retval;
+
+ if ((spi_sr & BIT(SPI_BUSY)) == 0) {
+ /* Clear transmit finished flag */
+ return target_write_u32(target, io_base + SPI_FCR, BIT(SPI_TCF));
} else
LOG_DEBUG("busy: 0x%08X", spi_sr);
alive_sleep(1);
@@ -264,6 +268,21 @@ static int poll_busy(struct flash_bank *bank, int timeout)
return ERROR_FLASH_OPERATION_FAILED;
}
+static int stmqspi_abort(struct flash_bank *bank)
+{
+ struct target *target = bank->target;
+ const struct stmqspi_flash_bank *stmqspi_info = bank->driver_priv;
+ const uint32_t io_base = stmqspi_info->io_base;
+ uint32_t cr;
+
+ int retval = target_read_u32(target, io_base + SPI_CR, &cr);
+
+ if (retval != ERROR_OK)
+ cr = 0;
+
+ return target_write_u32(target, io_base + SPI_CR, cr | BIT(SPI_ABORT));
+}
+
/* Set to memory-mapped mode, e.g. after an error */
static int set_mm_mode(struct flash_bank *bank)
{
@@ -278,8 +297,7 @@ static int set_mm_mode(struct flash_bank *bank)
return retval;
/* Abort any previous operation */
- retval = target_write_u32(target, io_base + SPI_CR,
- READ_REG(SPI_CR) | BIT(SPI_ABORT));
+ retval = stmqspi_abort(bank);
if (retval != ERROR_OK)
return retval;
@@ -321,8 +339,7 @@ static int read_status_reg(struct flash_bank *bank, uint16_t *status)
int count, retval;
/* Abort any previous operation */
- retval = target_write_u32(target, io_base + SPI_CR,
- READ_REG(SPI_CR) | BIT(SPI_ABORT));
+ retval = stmqspi_abort(bank);
if (retval != ERROR_OK)
return retval;
@@ -340,7 +357,8 @@ static int read_status_reg(struct flash_bank *bank, uint16_t *status)
/* Read status */
if (IS_OCTOSPI) {
- retval = OCTOSPI_CMD(OCTOSPI_READ_MODE, OCTOSPI_CCR_READ_STATUS, SPIFLASH_READ_STATUS);
+ retval = octospi_cmd(bank, OCTOSPI_READ_MODE, OCTOSPI_CCR_READ_STATUS,
+ SPIFLASH_READ_STATUS);
if (OPI_MODE) {
/* Dummy address 0, only required for 8-line mode */
retval = target_write_u32(target, io_base + SPI_AR, 0);
@@ -355,7 +373,8 @@ static int read_status_reg(struct flash_bank *bank, uint16_t *status)
*status = 0;
/* for debugging only */
- (void)READ_REG(SPI_SR);
+ uint32_t dummy;
+ (void)target_read_u32(target, io_base + SPI_SR, &dummy);
for ( ; count > 0; --count) {
if ((stmqspi_info->saved_cr & (BIT(SPI_DUAL_FLASH) | BIT(SPI_FSEL_FLASH)))
@@ -416,8 +435,7 @@ static int qspi_write_enable(struct flash_bank *bank)
int retval;
/* Abort any previous operation */
- retval = target_write_u32(target, io_base + SPI_CR,
- READ_REG(SPI_CR) | BIT(SPI_ABORT));
+ retval = stmqspi_abort(bank);
if (retval != ERROR_OK)
return retval;
@@ -428,7 +446,8 @@ static int qspi_write_enable(struct flash_bank *bank)
/* Send write enable command */
if (IS_OCTOSPI) {
- retval = OCTOSPI_CMD(OCTOSPI_WRITE_MODE, OCTOSPI_CCR_WRITE_ENABLE, SPIFLASH_WRITE_ENABLE);
+ retval = octospi_cmd(bank, OCTOSPI_WRITE_MODE, OCTOSPI_CCR_WRITE_ENABLE,
+ SPIFLASH_WRITE_ENABLE);
if (OPI_MODE) {
/* Dummy address 0, only required for 8-line mode */
retval = target_write_u32(target, io_base + SPI_AR, 0);
@@ -527,7 +546,7 @@ COMMAND_HANDLER(stmqspi_handle_mass_erase_command)
/* Send Mass Erase command */
if (IS_OCTOSPI)
- retval = OCTOSPI_CMD(OCTOSPI_WRITE_MODE, OCTOSPI_CCR_MASS_ERASE,
+ retval = octospi_cmd(bank, OCTOSPI_WRITE_MODE, OCTOSPI_CCR_MASS_ERASE,
stmqspi_info->dev.chip_erase_cmd);
else
retval = target_write_u32(target, io_base + QSPI_CCR, QSPI_CCR_MASS_ERASE);
@@ -714,10 +733,15 @@ COMMAND_HANDLER(stmqspi_handle_set)
bank->size = stmqspi_info->dev.size_in_bytes << dual;
io_base = stmqspi_info->io_base;
- fsize = (READ_REG(SPI_DCR) >> SPI_FSIZE_POS) & (BIT(SPI_FSIZE_LEN) - 1);
+
+ uint32_t dcr;
+ retval = target_read_u32(target, io_base + SPI_DCR, &dcr);
+
if (retval != ERROR_OK)
return retval;
+ fsize = (dcr >> SPI_FSIZE_POS) & (BIT(SPI_FSIZE_LEN) - 1);
+
LOG_DEBUG("FSIZE = 0x%04x", fsize);
if (bank->size == BIT(fsize + 1))
LOG_DEBUG("FSIZE in DCR(1) matches actual capacity. Beware of silicon bug in H7, L4+, MP1.");
@@ -823,8 +847,7 @@ COMMAND_HANDLER(stmqspi_handle_cmd)
}
/* Abort any previous operation */
- retval = target_write_u32(target, io_base + SPI_CR,
- READ_REG(SPI_CR) | BIT(SPI_ABORT));
+ retval = stmqspi_abort(bank);
if (retval != ERROR_OK)
return retval;
@@ -842,7 +865,7 @@ COMMAND_HANDLER(stmqspi_handle_cmd)
goto err;
if (IS_OCTOSPI)
- retval = OCTOSPI_CMD(OCTOSPI_WRITE_MODE,
+ retval = octospi_cmd(bank, OCTOSPI_WRITE_MODE,
(OCTOSPI_MODE_CCR & OCTOSPI_NO_ALTB & OCTOSPI_NO_ADDR &
((num_write == 1) ? OCTOSPI_NO_DATA : ~0U)), cmd_byte);
else
@@ -879,7 +902,7 @@ COMMAND_HANDLER(stmqspi_handle_cmd)
if (retval != ERROR_OK)
goto err;
if (IS_OCTOSPI)
- retval = OCTOSPI_CMD(OCTOSPI_READ_MODE,
+ retval = octospi_cmd(bank, OCTOSPI_READ_MODE,
(OCTOSPI_MODE_CCR & OCTOSPI_NO_DDTR & OCTOSPI_NO_ALTB & ~OCTOSPI_ADDR4 &
((num_write == 1) ? OCTOSPI_NO_ADDR : ~0U)) |
(((num_write - 2) & 0x3U) << SPI_ADSIZE_POS), cmd_byte);
@@ -930,7 +953,7 @@ static int qspi_erase_sector(struct flash_bank *bank, unsigned int sector)
/* Send Sector Erase command */
if (IS_OCTOSPI)
- retval = OCTOSPI_CMD(OCTOSPI_WRITE_MODE, OCTOSPI_CCR_SECTOR_ERASE,
+ retval = octospi_cmd(bank, OCTOSPI_WRITE_MODE, OCTOSPI_CCR_SECTOR_ERASE,
stmqspi_info->dev.erase_cmd);
else
retval = target_write_u32(target, io_base + QSPI_CCR, QSPI_CCR_SECTOR_ERASE);
@@ -1059,7 +1082,6 @@ static int stmqspi_blank_check(struct flash_bank *bank)
{
struct target *target = bank->target;
struct stmqspi_flash_bank *stmqspi_info = bank->driver_priv;
- uint32_t io_base = stmqspi_info->io_base;
struct duration bench;
struct reg_param reg_params[2];
struct armv7m_algorithm armv7m_info;
@@ -1082,8 +1104,7 @@ static int stmqspi_blank_check(struct flash_bank *bank)
}
/* Abort any previous operation */
- retval = target_write_u32(target, io_base + SPI_CR,
- READ_REG(SPI_CR) | BIT(SPI_ABORT));
+ retval = stmqspi_abort(bank);
if (retval != ERROR_OK)
return retval;
@@ -1568,7 +1589,6 @@ static int stmqspi_read(struct flash_bank *bank, uint8_t *buffer,
{
struct target *target = bank->target;
struct stmqspi_flash_bank *stmqspi_info = bank->driver_priv;
- uint32_t io_base = stmqspi_info->io_base;
int retval;
LOG_DEBUG("%s: offset=0x%08" PRIx32 " count=0x%08" PRIx32,
@@ -1590,8 +1610,7 @@ static int stmqspi_read(struct flash_bank *bank, uint8_t *buffer,
}
/* Abort any previous operation */
- retval = target_write_u32(target, io_base + SPI_CR,
- READ_REG(SPI_CR) | BIT(SPI_ABORT));
+ retval = stmqspi_abort(bank);
if (retval != ERROR_OK)
return retval;
@@ -1608,7 +1627,6 @@ static int stmqspi_write(struct flash_bank *bank, const uint8_t *buffer,
{
struct target *target = bank->target;
struct stmqspi_flash_bank *stmqspi_info = bank->driver_priv;
- uint32_t io_base = stmqspi_info->io_base;
unsigned int dual, sector;
bool octal_dtr;
int retval;
@@ -1653,8 +1671,7 @@ static int stmqspi_write(struct flash_bank *bank, const uint8_t *buffer,
}
/* Abort any previous operation */
- retval = target_write_u32(target, io_base + SPI_CR,
- READ_REG(SPI_CR) | BIT(SPI_ABORT));
+ retval = stmqspi_abort(bank);
if (retval != ERROR_OK)
return retval;
@@ -1671,7 +1688,6 @@ static int stmqspi_verify(struct flash_bank *bank, const uint8_t *buffer,
{
struct target *target = bank->target;
struct stmqspi_flash_bank *stmqspi_info = bank->driver_priv;
- uint32_t io_base = stmqspi_info->io_base;
unsigned int dual;
bool octal_dtr;
int retval;
@@ -1704,8 +1720,7 @@ static int stmqspi_verify(struct flash_bank *bank, const uint8_t *buffer,
}
/* Abort any previous operation */
- retval = target_write_u32(target, io_base + SPI_CR,
- READ_REG(SPI_CR) | BIT(SPI_ABORT));
+ retval = stmqspi_abort(bank);
if (retval != ERROR_OK)
return retval;
@@ -1757,8 +1772,8 @@ static int find_sfdp_dummy(struct flash_bank *bank, int len)
/* Read SFDP block */
if (IS_OCTOSPI)
- retval = OCTOSPI_CMD(OCTOSPI_READ_MODE, OCTOSPI_CCR_READ_SFDP(len),
- SPIFLASH_READ_SFDP);
+ retval = octospi_cmd(bank, OCTOSPI_READ_MODE,
+ OCTOSPI_CCR_READ_SFDP(len), SPIFLASH_READ_SFDP);
else
retval = target_write_u32(target, io_base + QSPI_CCR, QSPI_CCR_READ_SFDP);
if (retval != ERROR_OK)
@@ -1804,8 +1819,7 @@ static int find_sfdp_dummy(struct flash_bank *bank, int len)
err:
/* Abort operation */
- retval = target_write_u32(target, io_base + SPI_CR,
- READ_REG(SPI_CR) | BIT(SPI_ABORT));
+ retval = stmqspi_abort(bank);
return retval;
}
@@ -1880,8 +1894,8 @@ static int read_sfdp_block(struct flash_bank *bank, uint32_t addr,
/* Read SFDP block */
if (IS_OCTOSPI)
- retval = OCTOSPI_CMD(OCTOSPI_READ_MODE, OCTOSPI_CCR_READ_SFDP(len),
- SPIFLASH_READ_SFDP);
+ retval = octospi_cmd(bank, OCTOSPI_READ_MODE,
+ OCTOSPI_CCR_READ_SFDP(len), SPIFLASH_READ_SFDP);
else
retval = target_write_u32(target, io_base + QSPI_CCR, QSPI_CCR_READ_SFDP);
if (retval != ERROR_OK)
@@ -1959,8 +1973,7 @@ static int read_flash_id(struct flash_bank *bank, uint32_t *id1, uint32_t *id2)
/* SPIFLASH_READ_MID causes device in octal mode to go berserk, so don't use in this case */
for (type = (IS_OCTOSPI && OPI_MODE) ? 1 : 0; type < 2 ; type++) {
/* Abort any previous operation */
- retval = target_write_u32(target, io_base + SPI_CR,
- READ_REG(SPI_CR) | BIT(SPI_ABORT));
+ retval = stmqspi_abort(bank);
if (retval != ERROR_OK)
goto err;
@@ -1986,14 +1999,16 @@ static int read_flash_id(struct flash_bank *bank, uint32_t *id1, uint32_t *id2)
switch (type) {
case 0:
if (IS_OCTOSPI)
- retval = OCTOSPI_CMD(OCTOSPI_READ_MODE, OCTOSPI_CCR_READ_MID, SPIFLASH_READ_MID);
+ retval = octospi_cmd(bank, OCTOSPI_READ_MODE,
+ OCTOSPI_CCR_READ_MID, SPIFLASH_READ_MID);
else
retval = target_write_u32(target, io_base + QSPI_CCR, QSPI_CCR_READ_MID);
break;
case 1:
if (IS_OCTOSPI)
- retval = OCTOSPI_CMD(OCTOSPI_READ_MODE, OCTOSPI_CCR_READ_ID, SPIFLASH_READ_ID);
+ retval = octospi_cmd(bank, OCTOSPI_READ_MODE,
+ OCTOSPI_CCR_READ_ID, SPIFLASH_READ_ID);
else
retval = target_write_u32(target, io_base + QSPI_CCR, QSPI_CCR_READ_ID);
break;
@@ -2013,7 +2028,8 @@ static int read_flash_id(struct flash_bank *bank, uint32_t *id1, uint32_t *id2)
}
/* for debugging only */
- (void)READ_REG(SPI_SR);
+ uint32_t dummy;
+ (void)target_read_u32(target, io_base + SPI_SR, &dummy);
/* Read ID from Data Register */
for (len1 = 0, len2 = 0; count > 0; --count) {
@@ -2092,8 +2108,7 @@ static int stmqspi_probe(struct flash_bank *bank)
}
/* Abort any previous operation */
- retval = target_write_u32(target, io_base + SPI_CR,
- READ_REG(SPI_CR) | BIT(SPI_ABORT));
+ retval = stmqspi_abort(bank);
if (retval != ERROR_OK)
return retval;
@@ -2112,43 +2127,59 @@ static int stmqspi_probe(struct flash_bank *bank)
if (data == magic) {
LOG_DEBUG("QSPI_ABR register present");
stmqspi_info->octo = false;
- } else if (READ_REG(OCTOSPI_MAGIC) == OCTO_MAGIC_ID) {
- LOG_DEBUG("OCTOSPI_MAGIC present");
- stmqspi_info->octo = true;
} else {
- LOG_ERROR("No QSPI, no OCTOSPI at 0x%08" PRIx32, io_base);
- stmqspi_info->probed = false;
- stmqspi_info->dev.name = "none";
- return ERROR_FAIL;
+ uint32_t magic_id;
+
+ retval = target_read_u32(target, io_base + OCTOSPI_MAGIC, &magic_id);
+
+ if (retval == ERROR_OK && magic_id == OCTO_MAGIC_ID) {
+ LOG_DEBUG("OCTOSPI_MAGIC present");
+ stmqspi_info->octo = true;
+ } else {
+ LOG_ERROR("No QSPI, no OCTOSPI at 0x%08" PRIx32, io_base);
+ stmqspi_info->probed = false;
+ stmqspi_info->dev.name = "none";
+ return ERROR_FAIL;
+ }
}
/* save current FSEL and DFM bits in QSPI/OCTOSPI_CR, current QSPI/OCTOSPI_CCR value */
- stmqspi_info->saved_cr = READ_REG(SPI_CR);
+ retval = target_read_u32(target, io_base + SPI_CR, &stmqspi_info->saved_cr);
if (retval == ERROR_OK)
- stmqspi_info->saved_ccr = READ_REG(SPI_CCR);
+ retval = target_read_u32(target, io_base + SPI_CCR, &stmqspi_info->saved_ccr);
if (IS_OCTOSPI) {
- uint32_t mtyp;
+ uint32_t dcr1;
+
+ retval = target_read_u32(target, io_base + OCTOSPI_DCR1, &dcr1);
- mtyp = ((READ_REG(OCTOSPI_DCR1) & OCTOSPI_MTYP_MASK)) >> OCTOSPI_MTYP_POS;
if (retval == ERROR_OK)
- stmqspi_info->saved_tcr = READ_REG(OCTOSPI_TCR);
+ retval = target_read_u32(target, io_base + OCTOSPI_TCR,
+ &stmqspi_info->saved_tcr);
+
if (retval == ERROR_OK)
- stmqspi_info->saved_ir = READ_REG(OCTOSPI_IR);
+ retval = target_read_u32(target, io_base + OCTOSPI_IR,
+ &stmqspi_info->saved_ir);
+
+ if (retval != ERROR_OK) {
+ LOG_ERROR("No OCTOSPI at io_base 0x%08" PRIx32, io_base);
+ stmqspi_info->probed = false;
+ stmqspi_info->dev.name = "none";
+ return ERROR_FAIL;
+ }
+
+ const uint32_t mtyp = (dcr1 & OCTOSPI_MTYP_MASK) >> OCTOSPI_MTYP_POS;
+
if ((mtyp != 0x0) && (mtyp != 0x1)) {
- retval = ERROR_FAIL;
LOG_ERROR("Only regular SPI protocol supported in OCTOSPI");
- }
- if (retval == ERROR_OK) {
- LOG_DEBUG("OCTOSPI at 0x%08" PRIx64 ", io_base at 0x%08" PRIx32 ", OCTOSPI_CR 0x%08"
- PRIx32 ", OCTOSPI_CCR 0x%08" PRIx32 ", %d-byte addr", bank->base, io_base,
- stmqspi_info->saved_cr, stmqspi_info->saved_ccr, SPI_ADSIZE);
- } else {
- LOG_ERROR("No OCTOSPI at io_base 0x%08" PRIx32, io_base);
stmqspi_info->probed = false;
stmqspi_info->dev.name = "none";
return ERROR_FAIL;
}
+
+ LOG_DEBUG("OCTOSPI at 0x%08" PRIx64 ", io_base at 0x%08" PRIx32 ", OCTOSPI_CR 0x%08"
+ PRIx32 ", OCTOSPI_CCR 0x%08" PRIx32 ", %d-byte addr", bank->base, io_base,
+ stmqspi_info->saved_cr, stmqspi_info->saved_ccr, SPI_ADSIZE);
} else {
if (retval == ERROR_OK) {
LOG_DEBUG("QSPI at 0x%08" PRIx64 ", io_base at 0x%08" PRIx32 ", QSPI_CR 0x%08"
@@ -2301,10 +2332,14 @@ static int stmqspi_probe(struct flash_bank *bank)
/* Set correct size value */
bank->size = stmqspi_info->dev.size_in_bytes << dual;
- fsize = ((READ_REG(SPI_DCR) >> SPI_FSIZE_POS) & (BIT(SPI_FSIZE_LEN) - 1));
+ uint32_t dcr;
+ retval = target_read_u32(target, io_base + SPI_DCR, &dcr);
+
if (retval != ERROR_OK)
goto err;
+ fsize = (dcr >> SPI_FSIZE_POS) & (BIT(SPI_FSIZE_LEN) - 1);
+
LOG_DEBUG("FSIZE = 0x%04x", fsize);
if (bank->size == BIT((fsize + 1)))
LOG_DEBUG("FSIZE in DCR(1) matches actual capacity. Beware of silicon bug in H7, L4+, MP1.");
commit 8132b77d612e88167e8f0c7bdc6aa9df3661fd4e
Author: Antonio Borneo <bor...@gm...>
Date: Sat Feb 13 23:28:16 2021 +0100
stlink: swo: use completely the available buffer
The buffer passed to stlink_usb_trace_read() is allocated of size
*size and does not need to be zero-terminated. There is no reason
to not fill its last byte.
When checking the bytes available on swo, limit the retrieved byte
length to *size.
Change-Id: Iade0f8963118695931f13a8a3f1ab204911236b6
Signed-off-by: Antonio Borneo <bor...@gm...>
Reported-by: Adrian Negreanu <adr...@nx...>
Reviewed-on: http://openocd.zylin.com/6061
Tested-by: jenkins
Reviewed-by: Adrian M Negreanu <adr...@nx...>
Reviewed-by: Tarek BOCHKATI <tar...@gm...>
diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c
index 73169e1e4..a5f8bdff1 100644
--- a/src/jtag/drivers/stlink_usb.c
+++ b/src/jtag/drivers/stlink_usb.c
@@ -1967,7 +1967,7 @@ static int stlink_usb_trace_read(void *handle, uint8_t *buf, size_t *size)
return res;
size_t bytes_avail = le_to_h_u16(h->databuf);
- *size = bytes_avail < *size ? bytes_avail : *size - 1;
+ *size = bytes_avail < *size ? bytes_avail : *size;
if (*size > 0) {
res = stlink_usb_read_trace(handle, buf, *size);
commit a2569438380566a8eee339006f1923d4c147850d
Author: Antonio Borneo <bor...@gm...>
Date: Sat Feb 13 14:40:18 2021 +0100
jtag/nulink: add a space after PRIx32
Missing the space cause the hex value to be printed together with
the following field.
Add a space after PRIx32.
Change-Id: I95824a9a8b8c0ad911d6c31f732d926cb3e0c068
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/6060
Tested-by: jenkins
Reviewed-by: Jonathan McDowell <noo...@ea...>
diff --git a/src/jtag/drivers/nulink_usb.c b/src/jtag/drivers/nulink_usb.c
index 00738ee4e..48a5c792e 100644
--- a/src/jtag/drivers/nulink_usb.c
+++ b/src/jtag/drivers/nulink_usb.c
@@ -253,7 +253,7 @@ static int nulink_usb_write_debug_reg(void *handle, uint32_t addr, uint32_t val)
{
struct nulink_usb_handle_s *h = handle;
- LOG_DEBUG("nulink_usb_write_debug_reg 0x%08" PRIX32 "0x%08" PRIX32, addr, val);
+ LOG_DEBUG("nulink_usb_write_debug_reg 0x%08" PRIX32 " 0x%08" PRIX32, addr, val);
nulink_usb_init_buffer(handle, 8 + 12 * 1);
/* set command ID */
@@ -503,7 +503,7 @@ static int nulink_usb_read_mem8(void *handle, uint32_t addr, uint16_t len,
aligned_addr = aligned_addr * 4;
offset = addr - aligned_addr;
LOG_DEBUG("nulink_usb_read_mem8: unaligned address addr 0x%08" PRIx32
- "/aligned addr 0x%08" PRIx32 "offset %" PRIu32,
+ "/aligned addr 0x%08" PRIx32 " offset %" PRIu32,
addr, aligned_addr, offset);
addr = aligned_addr;
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/stmqspi.c | 227 ++++++++++++++++++++++++------------------
src/jtag/drivers/nulink_usb.c | 4 +-
src/jtag/drivers/stlink_usb.c | 2 +-
3 files changed, 134 insertions(+), 99 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-03-10 21:36:20
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via bc0c9907d6ba9a39a953482a2bb2195504999427 (commit)
from 5e57090203b36465c2f0560b92ca58cafb2c9e0b (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit bc0c9907d6ba9a39a953482a2bb2195504999427
Author: Tarek BOCHKATI <tar...@gm...>
Date: Fri Feb 12 21:12:43 2021 +0100
cortex_m: avoid reading and writing non-existent registers
Change-Id: Iedc24352c8d3444372da06d00fcec9603540f950
Signed-off-by: Tarek BOCHKATI <tar...@gm...>
Reviewed-on: http://openocd.zylin.com/6059
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index f14ce0d88..101094a97 100644
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -166,10 +166,10 @@ int armv7m_restore_context(struct target *target)
* packing of ARMV7M_PMSK_BPRI_FLTMSK_CTRL!
* See also comments in the register table above */
for (i = cache->num_regs - 1; i >= 0; i--) {
- if (cache->reg_list[i].dirty) {
- armv7m->arm.write_core_reg(target, &cache->reg_list[i], i,
- ARM_MODE_ANY, cache->reg_list[i].value);
- }
+ struct reg *r = &cache->reg_list[i];
+
+ if (r->exist && r->dirty)
+ armv7m->arm.write_core_reg(target, r, i, ARM_MODE_ANY, r->value);
}
return ERROR_OK;
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index b998b7ac7..2a973e1f6 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -521,7 +521,7 @@ static int cortex_m_debug_entry(struct target *target)
for (i = 0; i < num_regs; i++) {
r = &armv7m->arm.core_cache->reg_list[i];
- if (!r->valid)
+ if (r->exist && !r->valid)
arm->read_core_reg(target, r, i, ARM_MODE_ANY);
}
diff --git a/src/target/hla_target.c b/src/target/hla_target.c
index ca8b5874a..9ac344245 100644
--- a/src/target/hla_target.c
+++ b/src/target/hla_target.c
@@ -226,7 +226,7 @@ static int adapter_load_context(struct target *target)
for (int i = 0; i < num_regs; i++) {
struct reg *r = &armv7m->arm.core_cache->reg_list[i];
- if (!r->valid)
+ if (r->exist && !r->valid)
armv7m->arm.read_core_reg(target, r, i, ARM_MODE_ANY);
}
-----------------------------------------------------------------------
Summary of changes:
src/target/armv7m.c | 8 ++++----
src/target/cortex_m.c | 2 +-
src/target/hla_target.c | 2 +-
3 files changed, 6 insertions(+), 6 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-03-10 21:35:41
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 5e57090203b36465c2f0560b92ca58cafb2c9e0b (commit)
from cb8e3fb2d925c6563c3520391c3b1c7e71d1b817 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 5e57090203b36465c2f0560b92ca58cafb2c9e0b
Author: Felipe Balbi <ba...@ke...>
Date: Thu Feb 4 14:50:15 2021 +0200
Add configuration file for Olimex H405
Change-Id: I34a030f65ebe041408655ea9792346b146bd1092
Signed-off-by: Felipe Balbi <ba...@ke...>
Reviewed-on: http://openocd.zylin.com/6049
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/board/olimex_stm32_h405.cfg b/tcl/board/olimex_stm32_h405.cfg
new file mode 100644
index 000000000..f2f1d7f24
--- /dev/null
+++ b/tcl/board/olimex_stm32_h405.cfg
@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Olimex STM32-H405 eval board
+# https://www.olimex.com/Products/ARM/ST/STM32-H405/
+
+# Work-area size (RAM size) = 128kB for STM32F405RG device
+set WORKAREASIZE 0x20000
+
+source [find target/stm32f4x.cfg]
-----------------------------------------------------------------------
Summary of changes:
tcl/board/olimex_stm32_h405.cfg | 8 ++++++++
1 file changed, 8 insertions(+)
create mode 100644 tcl/board/olimex_stm32_h405.cfg
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-03-10 21:35:07
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via cb8e3fb2d925c6563c3520391c3b1c7e71d1b817 (commit)
via dc7b32ea4a00a425a71b3309f3fceb07b8467592 (commit)
via c945d6e6160598894319860a92b602a192c2c268 (commit)
from 184724d14e120a9901fedfe05692bcd270f5eb57 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit cb8e3fb2d925c6563c3520391c3b1c7e71d1b817
Author: Antonio Borneo <bor...@gm...>
Date: Fri Nov 13 23:39:26 2020 +0100
server: revert commit 7e6556b3cad8
With the removal of old tpiu code, commit 7e6556b3cad8 ("server:
permit the add_service function to return the created service")
http://openocd.zylin.com/5717/ can be reverted.
Fix also the new calls to add_service().
Change-Id: Ib7f2dfc6a9e829239e20313e0f121911085fdc00
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/6031
Tested-by: jenkins
Reviewed-by: Adrian M Negreanu <adr...@nx...>
diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c
index 9e44287fd..fc58971a7 100644
--- a/src/server/gdb_server.c
+++ b/src/server/gdb_server.c
@@ -3509,7 +3509,7 @@ static int gdb_target_start(struct target *target, const char *port)
ret = add_service("gdb",
port, target->gdb_max_connections, &gdb_new_connection, &gdb_input,
- &gdb_connection_closed, gdb_service, NULL);
+ &gdb_connection_closed, gdb_service);
/* initialize all targets gdb service with the same pointer */
{
struct target_list *head;
diff --git a/src/server/rtt_server.c b/src/server/rtt_server.c
index 3c885cce0..d49e4d000 100644
--- a/src/server/rtt_server.c
+++ b/src/server/rtt_server.c
@@ -126,7 +126,7 @@ COMMAND_HANDLER(handle_rtt_start_command)
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], service->channel);
ret = add_service("rtt", CMD_ARGV[0], CONNECTION_LIMIT_UNLIMITED,
- rtt_new_connection, rtt_input, rtt_connection_closed, service, NULL);
+ rtt_new_connection, rtt_input, rtt_connection_closed, service);
if (ret != ERROR_OK) {
free(service);
diff --git a/src/server/server.c b/src/server/server.c
index 114af7632..e53f37d0b 100644
--- a/src/server/server.c
+++ b/src/server/server.c
@@ -210,8 +210,7 @@ int add_service(char *name,
new_connection_handler_t new_connection_handler,
input_handler_t input_handler,
connection_closed_handler_t connection_closed_handler,
- void *priv,
- struct service **new_service)
+ void *priv)
{
struct service *c, **p;
struct hostent *hp;
@@ -347,10 +346,6 @@ int add_service(char *name,
;
*p = c;
- /* if new_service is not NULL, return the created service into it */
- if (new_service)
- *new_service = c;
-
return ERROR_OK;
}
diff --git a/src/server/server.h b/src/server/server.h
index 99f5fe2ed..ff2ada9cb 100644
--- a/src/server/server.h
+++ b/src/server/server.h
@@ -77,7 +77,7 @@ struct service {
int add_service(char *name, const char *port,
int max_connections, new_connection_handler_t new_connection_handler,
input_handler_t in_handler, connection_closed_handler_t close_handler,
- void *priv, struct service **new_service);
+ void *priv);
int remove_service(const char *name, const char *port);
int server_host_os_entry(void);
diff --git a/src/server/tcl_server.c b/src/server/tcl_server.c
index 07213ae79..1ecb827a1 100644
--- a/src/server/tcl_server.c
+++ b/src/server/tcl_server.c
@@ -285,7 +285,7 @@ int tcl_init(void)
return add_service("tcl", tcl_port, CONNECTION_LIMIT_UNLIMITED,
&tcl_new_connection, &tcl_input,
- &tcl_closed, NULL, NULL);
+ &tcl_closed, NULL);
}
COMMAND_HANDLER(handle_tcl_port_command)
diff --git a/src/server/telnet_server.c b/src/server/telnet_server.c
index 4f88d3a54..407ab68ae 100644
--- a/src/server/telnet_server.c
+++ b/src/server/telnet_server.c
@@ -694,7 +694,7 @@ int telnet_init(char *banner)
int ret = add_service("telnet", telnet_port, CONNECTION_LIMIT_UNLIMITED,
telnet_new_connection, telnet_input, telnet_connection_closed,
- telnet_service, NULL);
+ telnet_service);
if (ret != ERROR_OK) {
free(telnet_service);
diff --git a/src/target/arm_tpiu_swo.c b/src/target/arm_tpiu_swo.c
index b492438d4..2da52e892 100644
--- a/src/target/arm_tpiu_swo.c
+++ b/src/target/arm_tpiu_swo.c
@@ -697,7 +697,7 @@ static int jim_arm_tpiu_swo_enable(Jim_Interp *interp, int argc, Jim_Obj *const
retval = add_service("tpiu_swo_trace", &obj->out_filename[1],
CONNECTION_LIMIT_UNLIMITED, arm_tpiu_swo_service_new_connection,
arm_tpiu_swo_service_input, arm_tpiu_swo_service_connection_closed,
- priv, NULL);
+ priv);
if (retval != ERROR_OK) {
LOG_ERROR("Can't configure trace TCP port %s", &obj->out_filename[1]);
return JIM_ERR;
diff --git a/src/target/openrisc/jsp_server.c b/src/target/openrisc/jsp_server.c
index b4b25665d..4dbe63527 100644
--- a/src/target/openrisc/jsp_server.c
+++ b/src/target/openrisc/jsp_server.c
@@ -207,8 +207,7 @@ int jsp_init(struct or1k_jtag *jtag_info, char *banner)
jsp_new_connection,
jsp_input,
jsp_connection_closed,
- jsp_service,
- NULL);
+ jsp_service);
}
COMMAND_HANDLER(handle_jsp_port_command)
commit dc7b32ea4a00a425a71b3309f3fceb07b8467592
Author: Antonio Borneo <bor...@gm...>
Date: Fri Nov 13 23:36:24 2020 +0100
armv7m_trace: get rid of the old tpiu code
Remove all the old tpiu code and replace it with a wrapper that
uses the new commands, prints-out the new commands and informs
about the deprecation.
All the code that handles the deprecated tpiu commands is enclosed
between the comments
/* START_DEPRECATED_TPIU */
and
/* END_DEPRECATED_TPIU */
so will be easy to remove it in the future.
Change-Id: I70b0486770128203b923346382d9a90b8ec08439
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/6030
Tested-by: jenkins
Reviewed-by: Adrian M Negreanu <adr...@nx...>
diff --git a/doc/openocd.texi b/doc/openocd.texi
index bd4380a2b..0c1714e49 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -9642,54 +9642,6 @@ Disable the TPIU or the SWO, terminating the receiving of the trace data.
@end deffn
-TODO: remove the old tpiu commands
-
-@deffn Command {tpiu config} (@option{disable} | ((@option{external} | @option{internal (@var{filename} | @var{:port} | -)}) @
- (@option{sync @var{port_width}} | ((@option{manchester} | @option{uart}) @var{formatter_enable})) @
- @var{TRACECLKIN_freq} [@var{trace_freq}]))
-
-ARMv7-M architecture provides several modules to generate debugging
-information internally (ITM, DWT and ETM). Their output is directed
-through TPIU to be captured externally either on an SWO pin (this
-configuration is called SWV) or on a synchronous parallel trace port.
-
-This command configures the TPIU module of the target and, if internal
-capture mode is selected, starts to capture trace output by using the
-debugger adapter features.
-
-Some targets require additional actions to be performed in the
-@b{trace-config} handler for trace port to be activated.
-
-Command options:
-@itemize @minus
-@item @option{disable} disable TPIU handling;
-@item @option{external} configure TPIU to let user capture trace
-output externally (with an additional UART or logic analyzer hardware).
-@item @option{internal (@var{filename} | @var{:port} | -)} configure TPIU and debug adapter to
-gather trace data then:
-
-@itemize @minus
-@item append it to a regular file or a named pipe if @var{filename} is specified.
-@item listen to a TCP/IP port if @var{:port} is specified, then broadcast the trace data over this port.
-@item if '-' is specified, OpenOCD will forward trace data to @command{tcl_trace} command.
-@*@b{Note:} while broadcasting to file or TCP, the forwarding to @command{tcl_trace} will remain active.
-@end itemize
-
-@item @option{sync @var{port_width}} use synchronous parallel trace output
-mode, and set port width to @var{port_width}.
-@item @option{manchester} use asynchronous SWO mode with Manchester
-coding.
-@item @option{uart} use asynchronous SWO mode with NRZ (same as
-regular UART 8N1) coding.
-@item @var{formatter_enable} is @option{on} or @option{off} to enable
-or disable TPIU formatter which needs to be used when both ITM and ETM
-data is to be output via SWO.
-@item @var{TRACECLKIN_freq} this should be specified to match target's
-current TRACECLKIN frequency (usually the same as HCLK).
-@item @var{trace_freq} trace port frequency. Can be omitted in
-internal mode to let the adapter driver select the maximum supported
-rate automatically.
-@end itemize
Example usage:
@enumerate
@@ -9725,7 +9677,6 @@ openocd -f interface/stlink.cfg \
-c "stm32l1.tpiu enable"
@end example
@end enumerate
-@end deffn
@subsection ARMv7-M specific commands
@cindex tracing
diff --git a/src/jtag/interface.h b/src/jtag/interface.h
index 0884868a8..58bfd02b0 100644
--- a/src/jtag/interface.h
+++ b/src/jtag/interface.h
@@ -27,7 +27,7 @@
#include <jtag/jtag.h>
#include <jtag/swim.h>
-#include <target/armv7m_trace.h>
+#include <target/arm_tpiu_swo.h>
/* @file
* The "Cable Helper API" is what the cable drivers can use to help
diff --git a/src/target/arm_tpiu_swo.c b/src/target/arm_tpiu_swo.c
index 61891cb57..b492438d4 100644
--- a/src/target/arm_tpiu_swo.c
+++ b/src/target/arm_tpiu_swo.c
@@ -38,6 +38,12 @@
#include <transport/transport.h>
#include "arm_tpiu_swo.h"
+/* START_DEPRECATED_TPIU */
+#include <target/cortex_m.h>
+#include <target/target_type.h>
+#define MSG "DEPRECATED \'tpiu config\' command: "
+/* END_DEPRECATED_TPIU */
+
#define TCP_SERVICE_NAME "tpiu_swo_trace"
/* default for Cortex-M3 and Cortex-M4 specific TPIU */
@@ -53,9 +59,9 @@
#define TPIU_DEVID_OFFSET 0xfc8
#define TPIU_ACPR_MAX_PRESCALER 0x1fff
-#define TPIU_SPPR_PROTOCOL_SYNC 0x0 /**< synchronous trace output */
-#define TPIU_SPPR_PROTOCOL_MANCHESTER 0x1 /**< asynchronous output with NRZ coding */
-#define TPIU_SPPR_PROTOCOL_UART 0x2 /**< asynchronous output with Manchester coding */
+#define TPIU_SPPR_PROTOCOL_SYNC (TPIU_PIN_PROTOCOL_SYNC)
+#define TPIU_SPPR_PROTOCOL_MANCHESTER (TPIU_PIN_PROTOCOL_ASYNC_MANCHESTER)
+#define TPIU_SPPR_PROTOCOL_UART (TPIU_PIN_PROTOCOL_ASYNC_UART)
#define TPIU_DEVID_NOSUPPORT_SYNC BIT(9)
#define TPIU_DEVID_SUPPORT_MANCHESTER BIT(10)
#define TPIU_DEVID_SUPPORT_UART BIT(11)
@@ -106,6 +112,9 @@ struct arm_tpiu_swo_object {
char *out_filename;
/** track TCP connections */
struct list_head connections;
+ /* START_DEPRECATED_TPIU */
+ bool recheck_ap_cur_target;
+ /* END_DEPRECATED_TPIU */
};
struct arm_tpiu_swo_connection {
@@ -612,6 +621,31 @@ static int jim_arm_tpiu_swo_enable(Jim_Interp *interp, int argc, Jim_Obj *const
struct target *target = get_current_target(cmd_ctx);
+ /* START_DEPRECATED_TPIU */
+ if (obj->recheck_ap_cur_target) {
+ if (strcmp(target->type->name, "cortex_m") &&
+ strcmp(target->type->name, "hla_target")) {
+ LOG_ERROR(MSG "Current target is not a Cortex-M nor a HLA");
+ return JIM_ERR;
+ }
+ if (!target_was_examined(target)) {
+ LOG_ERROR(MSG "Current target not examined yet");
+ return JIM_ERR;
+ }
+ struct cortex_m_common *cm = target_to_cm(target);
+ obj->recheck_ap_cur_target = false;
+ obj->spot.ap_num = cm->armv7m.debug_ap->ap_num;
+ tpiu_ap = dap_ap(obj->spot.dap, obj->spot.ap_num);
+ if (obj->spot.ap_num == 0)
+ LOG_INFO(MSG "Confirmed TPIU %s is on AP 0", obj->name);
+ else
+ LOG_INFO(MSG "Target %s is on AP %d. Revised command is "
+ "\'tpiu create %s -dap %s -ap-num %d\'",
+ target_name(target), obj->spot.ap_num,
+ obj->name, adiv5_dap_name(obj->spot.dap), obj->spot.ap_num);
+ }
+ /* END_DEPRECATED_TPIU */
+
/* trigger the event before any attempt to R/W in the TPIU/SWO */
arm_tpiu_swo_handle_event(obj, TPIU_SWO_EVENT_PRE_ENABLE);
@@ -951,6 +985,163 @@ static int jim_arm_tpiu_swo_init(Jim_Interp *interp, int argc, Jim_Obj *const *a
return retval;
}
+/* START_DEPRECATED_TPIU */
+/* DEPRECATED: emulation of old command 'tpiu config' */
+COMMAND_HANDLER(handle_tpiu_deprecated_config_command)
+{
+ struct target *target = get_current_target(CMD_CTX);
+ struct arm_tpiu_swo_object *obj = NULL;
+ int retval;
+
+ if (strcmp(target->type->name, "cortex_m") &&
+ strcmp(target->type->name, "hla_target")) {
+ LOG_ERROR(MSG "Current target is not a Cortex-M nor a HLA");
+ return ERROR_FAIL;
+ }
+
+ if (!list_empty(&all_tpiu_swo)) {
+ obj = list_first_entry(&all_tpiu_swo, typeof(*obj), lh);
+ LOG_INFO(MSG "Using %s", obj->name);
+ } else {
+ struct cortex_m_common *cm = target_to_cm(target);
+ struct adiv5_private_config *pc = target->private_config;
+ struct adiv5_dap *dap = pc->dap;
+ int ap_num = pc->ap_num;
+ bool set_recheck_ap_cur_target = false;
+
+ LOG_INFO(MSG "Adding a TPIU \'%s.tpiu\' in the configuration", target_name(target));
+
+ if (ap_num == DP_APSEL_INVALID && transport_is_hla())
+ ap_num = 0; /* HLA should only support AP 0 */
+
+ if (ap_num == DP_APSEL_INVALID && target_was_examined(target))
+ ap_num = cm->armv7m.debug_ap->ap_num;
+
+ if (ap_num == DP_APSEL_INVALID) {
+ LOG_INFO(MSG "Target %s uses AP autodetection. Adding TPIU on AP 0; can be revised later",
+ target_name(target));
+ ap_num = 0;
+ set_recheck_ap_cur_target = true;
+ }
+
+ LOG_INFO(MSG "Running: \'tpiu create %s.tpiu -dap %s -ap-num %d\'",
+ target_name(target), adiv5_dap_name(dap), ap_num);
+
+ retval = command_run_linef(CMD_CTX, "tpiu create %s.tpiu -dap %s -ap-num %d",
+ target_name(target), adiv5_dap_name(dap), ap_num);
+ if (retval != ERROR_OK)
+ return retval;
+
+ obj = list_first_entry(&all_tpiu_swo, typeof(*obj), lh);
+ if (set_recheck_ap_cur_target)
+ obj->recheck_ap_cur_target = true;
+ }
+
+ unsigned int cmd_idx = 0;
+ if (CMD_ARGC == cmd_idx)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ if (!strcmp(CMD_ARGV[cmd_idx], "disable")) {
+ if (CMD_ARGC != cmd_idx + 1)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ LOG_INFO(MSG "Running: \'%s disable\'", obj->name);
+ return command_run_linef(CMD_CTX, "%s disable", obj->name);
+ }
+
+ const char *output = NULL;
+ const char *protocol;
+ const char *formatter = NULL;
+ const char *port_width = NULL;
+ const char *trace_clk;
+ const char *pin_clk = NULL;
+ if (!strcmp(CMD_ARGV[cmd_idx], "internal")) {
+ cmd_idx++;
+ if (CMD_ARGC == cmd_idx)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ output = CMD_ARGV[cmd_idx];
+ } else if (strcmp(CMD_ARGV[cmd_idx], "external"))
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ cmd_idx++;
+ if (CMD_ARGC == cmd_idx)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ if (!strcmp(CMD_ARGV[cmd_idx], "sync")) {
+ protocol = CMD_ARGV[cmd_idx];
+ cmd_idx++;
+ if (CMD_ARGC == cmd_idx)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ port_width = CMD_ARGV[cmd_idx];
+ } else {
+ if (strcmp(CMD_ARGV[cmd_idx], "manchester") && strcmp(CMD_ARGV[cmd_idx], "uart"))
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ protocol = CMD_ARGV[cmd_idx];
+ cmd_idx++;
+ if (CMD_ARGC == cmd_idx)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ formatter = CMD_ARGV[cmd_idx];
+ }
+ cmd_idx++;
+ if (CMD_ARGC == cmd_idx)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ trace_clk = CMD_ARGV[cmd_idx];
+ cmd_idx++;
+ if (CMD_ARGC != cmd_idx) {
+ pin_clk = CMD_ARGV[cmd_idx];
+ cmd_idx++;
+ }
+ if (CMD_ARGC != cmd_idx)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ LOG_INFO(MSG "Running: \'%s configure -protocol %s -traceclk %s" "%s%s" "%s%s" "%s%s" "%s%s\'",
+ obj->name, protocol, trace_clk,
+ pin_clk ? " -pin-freq " : "", pin_clk ? pin_clk : "",
+ output ? " -output " : "", output ? output : "",
+ formatter ? " -formatter " : "", formatter ? formatter : "",
+ port_width ? " -port-width " : "", port_width ? port_width : "");
+
+ retval = command_run_linef(CMD_CTX,
+ "%s configure -protocol %s -traceclk %s" "%s%s" "%s%s" "%s%s" "%s%s",
+ obj->name, protocol, trace_clk,
+ pin_clk ? " -pin-freq " : "", pin_clk ? pin_clk : "",
+ output ? " -output " : "", output ? output : "",
+ formatter ? " -formatter " : "", formatter ? formatter : "",
+ port_width ? " -port-width " : "", port_width ? port_width : "");
+ if (retval != ERROR_OK)
+ return retval;
+
+ LOG_INFO(MSG "Running: \'%s enable\'", obj->name);
+ retval = command_run_linef(CMD_CTX, "%s enable", obj->name);
+ if (retval != ERROR_OK)
+ return retval;
+
+ target_handle_event(target, TARGET_EVENT_TRACE_CONFIG);
+ return ERROR_OK;
+}
+
+static const struct command_registration arm_tpiu_deprecated_subcommand_handlers[] = {
+ {
+ .name = "config",
+ .handler = handle_tpiu_deprecated_config_command,
+ .mode = COMMAND_ANY,
+ .help = "Configure TPIU features, DEPRECATED, use \'tpiu create\'",
+ .usage = "(disable | "
+ "((external | internal (<filename> | <:port> | -)) "
+ "(sync <port width> | ((manchester | uart) <formatter enable>)) "
+ "<TRACECLKIN freq> [<trace freq>]))",
+ },
+ COMMAND_REGISTRATION_DONE
+};
+
+const struct command_registration arm_tpiu_deprecated_command_handlers[] = {
+ {
+ .name = "tpiu",
+ .chain = arm_tpiu_deprecated_subcommand_handlers,
+ .usage = "",
+ .help = "tpiu command group",
+ },
+ COMMAND_REGISTRATION_DONE
+};
+/* END_DEPRECATED_TPIU */
+
static const struct command_registration arm_tpiu_swo_subcommand_handlers[] = {
{
.name = "create",
diff --git a/src/target/arm_tpiu_swo.h b/src/target/arm_tpiu_swo.h
index e0aed71cb..5904ce291 100644
--- a/src/target/arm_tpiu_swo.h
+++ b/src/target/arm_tpiu_swo.h
@@ -3,6 +3,18 @@
#ifndef OPENOCD_TARGET_ARM_TPIU_SWO_H
#define OPENOCD_TARGET_ARM_TPIU_SWO_H
+/* Values should match TPIU_SPPR_PROTOCOL_xxx */
+enum tpiu_pin_protocol {
+ TPIU_PIN_PROTOCOL_SYNC = 0, /**< synchronous trace output */
+ TPIU_PIN_PROTOCOL_ASYNC_MANCHESTER = 1, /**< asynchronous output with Manchester coding */
+ TPIU_PIN_PROTOCOL_ASYNC_UART = 2, /**< asynchronous output with NRZ coding */
+};
+
+/* START_DEPRECATED_TPIU */
+/* DEPRECATED: emulation of old command 'tpiu config' */
+extern const struct command_registration arm_tpiu_deprecated_command_handlers[];
+/* END_DEPRECATED_TPIU */
+
int arm_tpiu_swo_register_commands(struct command_context *cmd_ctx);
int arm_tpiu_swo_cleanup_all(void);
diff --git a/src/target/armv7m_trace.c b/src/target/armv7m_trace.c
index 02f3f1061..74ffaf5a4 100644
--- a/src/target/armv7m_trace.c
+++ b/src/target/armv7m_trace.c
@@ -26,133 +26,6 @@
#include <jtag/interface.h>
#include <helper/time_support.h>
-#define TRACE_BUF_SIZE 4096
-
-static int armv7m_poll_trace(void *target)
-{
- struct armv7m_common *armv7m = target_to_armv7m(target);
- uint8_t buf[TRACE_BUF_SIZE];
- size_t size = sizeof(buf);
- int retval;
-
- retval = adapter_poll_trace(buf, &size);
- if (retval != ERROR_OK || !size)
- return retval;
-
- target_call_trace_callbacks(target, size, buf);
-
- switch (armv7m->trace_config.internal_channel) {
- case TRACE_INTERNAL_CHANNEL_FILE:
- if (armv7m->trace_config.trace_file != NULL) {
- if (fwrite(buf, 1, size, armv7m->trace_config.trace_file) == size)
- fflush(armv7m->trace_config.trace_file);
- else {
- LOG_ERROR("Error writing to the trace destination file");
- return ERROR_FAIL;
- }
- }
- break;
- case TRACE_INTERNAL_CHANNEL_TCP:
- if (armv7m->trace_config.trace_service != NULL) {
- /* broadcast to all service connections */
- struct connection *connection = armv7m->trace_config.trace_service->connections;
- retval = ERROR_OK;
- while (connection) {
- if (connection_write(connection, buf, size) != (int) size)
- retval = ERROR_FAIL;
-
- connection = connection->next;
- }
-
- if (retval != ERROR_OK) {
- LOG_ERROR("Error streaming the trace to TCP/IP port");
- return ERROR_FAIL;
- }
- }
- break;
- case TRACE_INTERNAL_CHANNEL_TCL_ONLY:
- /* nothing to do :
- * the trace data is sent to TCL by calling the target_call_trace_callbacks
- **/
- break;
- default:
- LOG_ERROR("unsupported trace internal channel");
- return ERROR_FAIL;
- }
-
- return ERROR_OK;
-}
-
-int armv7m_trace_tpiu_config(struct target *target)
-{
- struct armv7m_common *armv7m = target_to_armv7m(target);
- struct armv7m_trace_config *trace_config = &armv7m->trace_config;
- uint16_t prescaler = TPIU_ACPR_MAX_SWOSCALER + 1;
- int retval;
-
- target_unregister_timer_callback(armv7m_poll_trace, target);
-
- retval = adapter_config_trace(trace_config->config_type == TRACE_CONFIG_TYPE_INTERNAL,
- trace_config->pin_protocol, trace_config->port_size,
- &trace_config->trace_freq, trace_config->traceclkin_freq, &prescaler);
-
- if (retval != ERROR_OK)
- return retval;
-
- if (trace_config->config_type == TRACE_CONFIG_TYPE_EXTERNAL) {
- prescaler = trace_config->traceclkin_freq / trace_config->trace_freq;
-
- if (trace_config->traceclkin_freq % trace_config->trace_freq) {
- prescaler++;
-
- int trace_freq = trace_config->traceclkin_freq / prescaler;
- LOG_INFO("Can not obtain %u trace port frequency from %u "
- "TRACECLKIN frequency, using %u instead",
- trace_config->trace_freq, trace_config->traceclkin_freq,
- trace_freq);
-
- trace_config->trace_freq = trace_freq;
- }
- }
-
- if (!trace_config->trace_freq) {
- LOG_ERROR("Trace port frequency is 0, can't enable TPIU");
- return ERROR_FAIL;
- }
-
- retval = target_write_u32(target, TPIU_CSPSR, 1 << trace_config->port_size);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, TPIU_ACPR, prescaler - 1);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, TPIU_SPPR, trace_config->pin_protocol);
- if (retval != ERROR_OK)
- return retval;
-
- uint32_t ffcr;
- retval = target_read_u32(target, TPIU_FFCR, &ffcr);
- if (retval != ERROR_OK)
- return retval;
- if (trace_config->formatter)
- ffcr |= (1 << 1);
- else
- ffcr &= ~(1 << 1);
- retval = target_write_u32(target, TPIU_FFCR, ffcr);
- if (retval != ERROR_OK)
- return retval;
-
- if (trace_config->config_type == TRACE_CONFIG_TYPE_INTERNAL)
- target_register_timer_callback(armv7m_poll_trace, 1,
- TARGET_TIMER_TYPE_PERIODIC, target);
-
- target_call_event_callbacks(target, TARGET_EVENT_TRACE_CONFIG);
-
- return ERROR_OK;
-}
-
int armv7m_trace_itm_config(struct target *target)
{
struct armv7m_common *armv7m = target_to_armv7m(target);
@@ -210,182 +83,6 @@ int armv7m_trace_itm_config(struct target *target)
return ERROR_OK;
}
-static void close_trace_channel(struct armv7m_common *armv7m)
-{
- switch (armv7m->trace_config.internal_channel) {
- case TRACE_INTERNAL_CHANNEL_FILE:
- if (armv7m->trace_config.trace_file)
- fclose(armv7m->trace_config.trace_file);
- armv7m->trace_config.trace_file = NULL;
- break;
- case TRACE_INTERNAL_CHANNEL_TCP:
- if (armv7m->trace_config.trace_service)
- remove_service(armv7m->trace_config.trace_service->name, armv7m->trace_config.trace_service->port);
- armv7m->trace_config.trace_service = NULL;
- break;
- case TRACE_INTERNAL_CHANNEL_TCL_ONLY:
- /* nothing to do:
- * the trace polling is disabled in the beginning of armv7m_trace_tpiu_config
- **/
- break;
- default:
- LOG_ERROR("unsupported trace internal channel");
- }
-}
-
-static int trace_new_connection(struct connection *connection)
-{
- /* nothing to do */
- return ERROR_OK;
-}
-
-static int trace_input(struct connection *connection)
-{
- /* create a dummy buffer to check if the connection is still active */
- const int buf_len = 100;
- unsigned char buf[buf_len];
- int bytes_read = connection_read(connection, buf, buf_len);
-
- if (bytes_read == 0)
- return ERROR_SERVER_REMOTE_CLOSED;
- else if (bytes_read == -1) {
- LOG_ERROR("error during read: %s", strerror(errno));
- return ERROR_SERVER_REMOTE_CLOSED;
- }
-
- return ERROR_OK;
-}
-
-static int trace_connection_closed(struct connection *connection)
-{
- /* nothing to do, no connection->priv to free */
- return ERROR_OK;
-}
-
-extern struct command_context *global_cmd_ctx;
-
-int armv7m_trace_tpiu_exit(struct target *target)
-{
- struct armv7m_common *armv7m = target_to_armv7m(target);
-
- if (global_cmd_ctx->mode == COMMAND_CONFIG ||
- armv7m->trace_config.config_type == TRACE_CONFIG_TYPE_DISABLED)
- return ERROR_OK;
-
- close_trace_channel(armv7m);
- armv7m->trace_config.config_type = TRACE_CONFIG_TYPE_DISABLED;
- return armv7m_trace_tpiu_config(target);
-}
-
-COMMAND_HANDLER(handle_tpiu_config_command)
-{
- struct target *target = get_current_target(CMD_CTX);
- struct armv7m_common *armv7m = target_to_armv7m(target);
-
- unsigned int cmd_idx = 0;
-
- if (CMD_ARGC == cmd_idx)
- return ERROR_COMMAND_SYNTAX_ERROR;
- if (!strcmp(CMD_ARGV[cmd_idx], "disable")) {
- if (CMD_ARGC == cmd_idx + 1) {
- close_trace_channel(armv7m);
-
- armv7m->trace_config.config_type = TRACE_CONFIG_TYPE_DISABLED;
- if (CMD_CTX->mode == COMMAND_EXEC)
- return armv7m_trace_tpiu_config(target);
- else
- return ERROR_OK;
- }
- } else if (!strcmp(CMD_ARGV[cmd_idx], "external") ||
- !strcmp(CMD_ARGV[cmd_idx], "internal")) {
- close_trace_channel(armv7m);
-
- armv7m->trace_config.config_type = TRACE_CONFIG_TYPE_EXTERNAL;
- if (!strcmp(CMD_ARGV[cmd_idx], "internal")) {
- cmd_idx++;
- if (CMD_ARGC == cmd_idx)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- armv7m->trace_config.config_type = TRACE_CONFIG_TYPE_INTERNAL;
- armv7m->trace_config.internal_channel = TRACE_INTERNAL_CHANNEL_TCL_ONLY;
-
- if (strcmp(CMD_ARGV[cmd_idx], "-") != 0) {
- if (CMD_ARGV[cmd_idx][0] == ':') {
- armv7m->trace_config.internal_channel = TRACE_INTERNAL_CHANNEL_TCP;
-
- int ret = add_service("armv7m_trace", &(CMD_ARGV[cmd_idx][1]),
- CONNECTION_LIMIT_UNLIMITED, trace_new_connection, trace_input,
- trace_connection_closed, NULL, &armv7m->trace_config.trace_service);
- if (ret != ERROR_OK) {
- LOG_ERROR("Can't configure trace TCP port");
- return ERROR_FAIL;
- }
- } else {
- armv7m->trace_config.internal_channel = TRACE_INTERNAL_CHANNEL_FILE;
- armv7m->trace_config.trace_file = fopen(CMD_ARGV[cmd_idx], "ab");
- if (!armv7m->trace_config.trace_file) {
- LOG_ERROR("Can't open trace destination file");
- return ERROR_FAIL;
- }
- }
- }
- }
- cmd_idx++;
- if (CMD_ARGC == cmd_idx)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- if (!strcmp(CMD_ARGV[cmd_idx], "sync")) {
- armv7m->trace_config.pin_protocol = TPIU_PIN_PROTOCOL_SYNC;
-
- cmd_idx++;
- if (CMD_ARGC == cmd_idx)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[cmd_idx], armv7m->trace_config.port_size);
- } else {
- if (!strcmp(CMD_ARGV[cmd_idx], "manchester"))
- armv7m->trace_config.pin_protocol = TPIU_PIN_PROTOCOL_ASYNC_MANCHESTER;
- else if (!strcmp(CMD_ARGV[cmd_idx], "uart"))
- armv7m->trace_config.pin_protocol = TPIU_PIN_PROTOCOL_ASYNC_UART;
- else
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- cmd_idx++;
- if (CMD_ARGC == cmd_idx)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- COMMAND_PARSE_ON_OFF(CMD_ARGV[cmd_idx], armv7m->trace_config.formatter);
- }
-
- cmd_idx++;
- if (CMD_ARGC == cmd_idx)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[cmd_idx], armv7m->trace_config.traceclkin_freq);
-
- cmd_idx++;
- if (CMD_ARGC != cmd_idx) {
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[cmd_idx], armv7m->trace_config.trace_freq);
- cmd_idx++;
- } else {
- if (armv7m->trace_config.config_type != TRACE_CONFIG_TYPE_INTERNAL) {
- LOG_ERROR("Trace port frequency can't be omitted in external capture mode");
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
- armv7m->trace_config.trace_freq = 0;
- }
-
- if (CMD_ARGC == cmd_idx) {
- if (CMD_CTX->mode == COMMAND_EXEC)
- return armv7m_trace_tpiu_config(target);
- else
- return ERROR_OK;
- }
- }
-
- return ERROR_COMMAND_SYNTAX_ERROR;
-}
-
COMMAND_HANDLER(handle_itm_port_command)
{
struct target *target = get_current_target(CMD_CTX);
@@ -433,20 +130,6 @@ COMMAND_HANDLER(handle_itm_ports_command)
return ERROR_OK;
}
-static const struct command_registration tpiu_command_handlers[] = {
- {
- .name = "config",
- .handler = handle_tpiu_config_command,
- .mode = COMMAND_ANY,
- .help = "Configure TPIU features",
- .usage = "(disable | "
- "((external | internal (<filename> | <:port> | -)) "
- "(sync <port width> | ((manchester | uart) <formatter enable>)) "
- "<TRACECLKIN freq> [<trace freq>]))",
- },
- COMMAND_REGISTRATION_DONE
-};
-
static const struct command_registration itm_command_handlers[] = {
{
.name = "port",
@@ -466,13 +149,6 @@ static const struct command_registration itm_command_handlers[] = {
};
const struct command_registration armv7m_trace_command_handlers[] = {
- {
- .name = "tpiu",
- .mode = COMMAND_ANY,
- .help = "tpiu command group",
- .usage = "",
- .chain = tpiu_command_handlers,
- },
{
.name = "itm",
.mode = COMMAND_ANY,
diff --git a/src/target/armv7m_trace.h b/src/target/armv7m_trace.h
index 61142b1e3..eaee6a48f 100644
--- a/src/target/armv7m_trace.h
+++ b/src/target/armv7m_trace.h
@@ -18,33 +18,14 @@
#ifndef OPENOCD_TARGET_ARMV7M_TRACE_H
#define OPENOCD_TARGET_ARMV7M_TRACE_H
-#include <server/server.h>
#include <target/target.h>
#include <command.h>
/**
* @file
- * Holds the interface to TPIU, ITM and DWT configuration functions.
+ * Holds the interface to ITM and DWT configuration functions.
*/
-enum trace_config_type {
- TRACE_CONFIG_TYPE_DISABLED, /**< tracing is disabled */
- TRACE_CONFIG_TYPE_EXTERNAL, /**< trace output is captured externally */
- TRACE_CONFIG_TYPE_INTERNAL /**< trace output is handled by OpenOCD adapter driver */
-};
-
-enum trace_internal_channel {
- TRACE_INTERNAL_CHANNEL_TCL_ONLY, /** trace data is sent only to 'tcl_trace' */
- TRACE_INTERNAL_CHANNEL_FILE, /** trace data is appended to a file */
- TRACE_INTERNAL_CHANNEL_TCP /** trace data is appended to a TCP/IP port*/
-};
-
-enum tpiu_pin_protocol {
- TPIU_PIN_PROTOCOL_SYNC, /**< synchronous trace output */
- TPIU_PIN_PROTOCOL_ASYNC_MANCHESTER, /**< asynchronous output with Manchester coding */
- TPIU_PIN_PROTOCOL_ASYNC_UART /**< asynchronous output with NRZ coding */
-};
-
enum itm_ts_prescaler {
ITM_TS_PRESCALE1, /**< no prescaling for the timestamp counter */
ITM_TS_PRESCALE4, /**< refclock divided by 4 for the timestamp counter */
@@ -53,19 +34,6 @@ enum itm_ts_prescaler {
};
struct armv7m_trace_config {
- /** Currently active trace capture mode */
- enum trace_config_type config_type;
-
- /** The used channel when internal mode is selected */
- enum trace_internal_channel internal_channel;
-
- /** Currently active trace output mode */
- enum tpiu_pin_protocol pin_protocol;
- /** TPIU formatter enable/disable (in async mode) */
- bool formatter;
- /** Synchronous output port width */
- uint32_t port_size;
-
/** Bitmask of currently enabled ITM stimuli */
uint32_t itm_ter[8];
/** Identifier for multi-source trace stream formatting */
@@ -80,27 +48,10 @@ struct armv7m_trace_config {
bool itm_synchro_packets;
/** Config ITM after target examine */
bool itm_deferred_config;
-
- /** Current frequency of TRACECLKIN (usually matches HCLK) */
- unsigned int traceclkin_freq;
- /** Current frequency of trace port */
- unsigned int trace_freq;
- /** Handle to output trace data in INTERNAL capture mode via file */
- FILE *trace_file;
- /** Handle to output trace data in INTERNAL capture mode via tcp */
- struct service *trace_service;
};
extern const struct command_registration armv7m_trace_command_handlers[];
-/**
- * Configure hardware accordingly to the current TPIU target settings
- */
-int armv7m_trace_tpiu_config(struct target *target);
-/**
- * Disable TPIU data gathering at exit
- */
-int armv7m_trace_tpiu_exit(struct target *target);
/**
* Configure hardware accordingly to the current ITM target settings
*/
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 4580c10ff..b998b7ac7 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -1648,8 +1648,6 @@ void cortex_m_deinit_target(struct target *target)
{
struct cortex_m_common *cortex_m = target_to_cm(target);
- armv7m_trace_tpiu_exit(target);
-
free(cortex_m->fp_comparator_list);
cortex_m_dwt_free(target);
@@ -2082,9 +2080,6 @@ int cortex_m_examine(struct target *target)
if (retval != ERROR_OK)
return retval;
- if (armv7m->trace_config.config_type != TRACE_CONFIG_TYPE_DISABLED)
- armv7m_trace_tpiu_config(target);
-
if (armv7m->trace_config.itm_deferred_config)
armv7m_trace_itm_config(target);
@@ -2486,6 +2481,11 @@ static const struct command_registration cortex_m_command_handlers[] = {
{
.chain = armv7m_trace_command_handlers,
},
+ /* START_DEPRECATED_TPIU */
+ {
+ .chain = arm_tpiu_deprecated_command_handlers,
+ },
+ /* END_DEPRECATED_TPIU */
{
.name = "cortex_m",
.mode = COMMAND_EXEC,
diff --git a/src/target/hla_target.c b/src/target/hla_target.c
index 3d41387fd..ca8b5874a 100644
--- a/src/target/hla_target.c
+++ b/src/target/hla_target.c
@@ -630,6 +630,11 @@ static const struct command_registration adapter_command_handlers[] = {
{
.chain = rtt_target_command_handlers,
},
+ /* START_DEPRECATED_TPIU */
+ {
+ .chain = arm_tpiu_deprecated_command_handlers,
+ },
+ /* END_DEPRECATED_TPIU */
COMMAND_REGISTRATION_DONE
};
diff --git a/src/target/target.c b/src/target/target.c
index fe519f2ab..eb83daebb 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -4945,6 +4945,11 @@ no_params:
}
if (goi->isconfigure) {
+ /* START_DEPRECATED_TPIU */
+ if (n->value == TARGET_EVENT_TRACE_CONFIG)
+ LOG_INFO("DEPRECATED target event %s", n->name);
+ /* END_DEPRECATED_TPIU */
+
bool replace = true;
if (teap == NULL) {
/* create new */
commit c945d6e6160598894319860a92b602a192c2c268
Author: Antonio Borneo <bor...@gm...>
Date: Mon Oct 12 00:12:05 2020 +0200
tcl/target: start using the new TPIU/SWO support
Create the TPIU and SWO device in target config file.
Replace the target event 'trace-config' with the TPIU/SWO event
'post-enable'.
Extend the existing code in the event handler to properly set the
gpio mode and speed to permit synchronous trace.
This patch is not exhaustive of all the targets that have SWO, but
has to be considered as an initial example.
Change-Id: If4bbf364c0d2aef3ae49951e76507a3b1cfd58e7
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/5859
Tested-by: jenkins
Reviewed-by: Adrian M Negreanu <adr...@nx...>
diff --git a/tcl/target/stm32f4x.cfg b/tcl/target/stm32f4x.cfg
index 15875336e..e94837f83 100644
--- a/tcl/target/stm32f4x.cfg
+++ b/tcl/target/stm32f4x.cfg
@@ -38,6 +38,8 @@ if { [info exists CPUTAPID] } {
swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+tpiu create $_CHIPNAME.tpiu -dap stm32f4x.dap -ap-num 0 -baseaddr 0xE0040000
+
if {[using_jtag]} {
jtag newtap $_CHIPNAME bs -irlen 5
}
@@ -89,13 +91,37 @@ $_TARGETNAME configure -event examine-end {
mmw 0xE0042008 0x00001800 0
}
-$_TARGETNAME configure -event trace-config {
- # Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
- # change this value accordingly to configure trace pins
- # assignment
- mmw 0xE0042004 0x00000020 0
+proc proc_post_enable {_chipname} {
+ targets $_chipname.cpu
+
+ if { [$_chipname.tpiu cget -protocol] eq "sync" } {
+ switch [$_chipname.tpiu cget -port-width] {
+ 1 {
+ mmw 0xE0042004 0x00000060 0x000000c0
+ mmw 0x40021020 0x00000000 0x0000ff00
+ mmw 0x40021000 0x000000a0 0x000000f0
+ mmw 0x40021008 0x000000f0 0x00000000
+ }
+ 2 {
+ mmw 0xE0042004 0x000000a0 0x000000c0
+ mmw 0x40021020 0x00000000 0x000fff00
+ mmw 0x40021000 0x000002a0 0x000003f0
+ mmw 0x40021008 0x000003f0 0x00000000
+ }
+ 4 {
+ mmw 0xE0042004 0x000000e0 0x000000c0
+ mmw 0x40021020 0x00000000 0x0fffff00
+ mmw 0x40021000 0x00002aa0 0x00003ff0
+ mmw 0x40021008 0x00003ff0 0x00000000
+ }
+ }
+ } else {
+ mmw 0xE0042004 0x00000020 0x000000c0
+ }
}
+$_CHIPNAME.tpiu configure -event post-enable "proc_post_enable $_CHIPNAME"
+
$_TARGETNAME configure -event reset-init {
# Configure PLL to boost clock to HSI x 4 (64 MHz)
mww 0x40023804 0x08012008 ;# RCC_PLLCFGR 16 Mhz /8 (M) * 128 (N) /4(P)
diff --git a/tcl/target/stm32h7x.cfg b/tcl/target/stm32h7x.cfg
index 8258e5031..26d0d9301 100644
--- a/tcl/target/stm32h7x.cfg
+++ b/tcl/target/stm32h7x.cfg
@@ -77,6 +77,8 @@ if {![using_hla]} {
# STM32H7 provides an APB-AP at access port 2, which allows the access to
# the debug and trace features on the system APB System Debug Bus (APB-D).
target create $_CHIPNAME.ap2 mem_ap -dap $_CHIPNAME.dap -ap-num 2
+ swo create $_CHIPNAME.swo -dap $_CHIPNAME.dap -ap-num 2 -baseaddr 0xE00E3000
+ tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 2 -baseaddr 0xE00F5000
}
target create $_CHIPNAME.cpu0 cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 0
@@ -178,13 +180,20 @@ $_CHIPNAME.cpu0 configure -event examine-end {
stm32h7x_dbgmcu_mmw 0x03C 0x00000800 0
# DBGMCU_APB4FZ1 |= WDGLSD1 | WDGLSD2
stm32h7x_dbgmcu_mmw 0x054 0x000C0000 0
-}
-$_CHIPNAME.cpu0 configure -event trace-config {
- # Set TRACECLKEN; TRACE_MODE is set to async; when using sync
- # change this value accordingly to configure trace pins
- # assignment
+ # Enable clock for tracing
+ # DBGMCU_CR |= TRACECLKEN
stm32h7x_dbgmcu_mmw 0x004 0x00100000 0
+
+ # RM0399 (id 0x450) M7+M4 with SWO Funnel
+ # RM0433 (id 0x450) M7 with SWO Funnel
+ # RM0455 (id 0x480) M7 without SWO Funnel
+ # RM0468 (id 0x483) M7 without SWO Funnel
+ # Enable CM7 and CM4 slave ports in SWO trace Funnel
+ # Works ok also on devices single core and without SWO funnel
+ # Hack, use stm32h7x_dbgmcu_mmw with big offset to control SWTF
+ # SWTF_CTRL |= ENS0 | ENS1
+ stm32h7x_dbgmcu_mmw 0x3000 0x00000003 0
}
$_CHIPNAME.cpu0 configure -event reset-init {
diff --git a/tcl/target/stm32mp15x.cfg b/tcl/target/stm32mp15x.cfg
index 4a8bc866c..1b2ae7d5e 100644
--- a/tcl/target/stm32mp15x.cfg
+++ b/tcl/target/stm32mp15x.cfg
@@ -64,6 +64,9 @@ cti create $_CHIPNAME.cti.cpu0 -dap $_CHIPNAME.dap -ap-num 1 -baseaddr 0xE00D800
cti create $_CHIPNAME.cti.cpu1 -dap $_CHIPNAME.dap -ap-num 1 -baseaddr 0xE00D9000
cti create $_CHIPNAME.cti.cm4 -dap $_CHIPNAME.dap -ap-num 2 -baseaddr 0xE0043000
+swo create $_CHIPNAME.swo -dap $_CHIPNAME.dap -ap-num 1 -baseaddr 0xE0083000
+tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 1 -baseaddr 0xE0093000
+
# interface does not work while srst is asserted
# this is target specific, valid for every board
# Errata "2.3.5 Incorrect reset of glitch-free kernel clock switch" requires
@@ -108,9 +111,13 @@ proc detect_cpu1 {} {
if {! $dual_core} {$::_CHIPNAME.cpu1 configure -defer-examine}
}
+proc rcc_enable_traceclk {} {
+ $::_CHIPNAME.ap2 mww 0x5000080c 0x301
+}
+
# FIXME: most of handler below will be removed once reset framework get merged
$_CHIPNAME.ap1 configure -event reset-deassert-pre {adapter deassert srst deassert trst;dap init;catch {$::_CHIPNAME.dap apid 1}}
-$_CHIPNAME.ap2 configure -event reset-deassert-pre {dbgmcu_enable_debug}
+$_CHIPNAME.ap2 configure -event reset-deassert-pre {dbgmcu_enable_debug;rcc_enable_traceclk}
$_CHIPNAME.cpu0 configure -event reset-deassert-pre {$::_CHIPNAME.cpu0 arp_examine}
$_CHIPNAME.cpu1 configure -event reset-deassert-pre {$::_CHIPNAME.cpu1 arp_examine allow-defer}
$_CHIPNAME.cpu0 configure -event reset-deassert-post {toggle_cpu0_dbg_claim0}
@@ -118,4 +125,4 @@ $_CHIPNAME.cm4 configure -event reset-deassert-post {$::_CHIPNAME.cm4 arp_exami
$_CHIPNAME.ap1 configure -event examine-start {dap init}
$_CHIPNAME.ap2 configure -event examine-start {dbgmcu_enable_debug}
$_CHIPNAME.cpu0 configure -event examine-end {detect_cpu1}
-$_CHIPNAME.ap2 configure -event examine-end {$::_CHIPNAME.cm4 arp_examine}
+$_CHIPNAME.ap2 configure -event examine-end {rcc_enable_traceclk;$::_CHIPNAME.cm4 arp_examine}
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 49 ------
src/jtag/interface.h | 2 +-
src/server/gdb_server.c | 2 +-
src/server/rtt_server.c | 2 +-
src/server/server.c | 7 +-
src/server/server.h | 2 +-
src/server/tcl_server.c | 2 +-
src/server/telnet_server.c | 2 +-
src/target/arm_tpiu_swo.c | 199 +++++++++++++++++++++++-
src/target/arm_tpiu_swo.h | 12 ++
src/target/armv7m_trace.c | 324 ---------------------------------------
src/target/armv7m_trace.h | 51 +-----
src/target/cortex_m.c | 10 +-
src/target/hla_target.c | 5 +
src/target/openrisc/jsp_server.c | 3 +-
src/target/target.c | 5 +
tcl/target/stm32f4x.cfg | 36 ++++-
tcl/target/stm32h7x.cfg | 19 ++-
tcl/target/stm32mp15x.cfg | 11 +-
19 files changed, 285 insertions(+), 458 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-03-10 21:34:14
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 184724d14e120a9901fedfe05692bcd270f5eb57 (commit)
via f9509c92dba370be363f5641d3fefe2250bee10c (commit)
from faaa42283f5c06830fe997b80d6c64f6469c6cf0 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 184724d14e120a9901fedfe05692bcd270f5eb57
Author: Antonio Borneo <bor...@gm...>
Date: Mon Oct 12 00:11:46 2020 +0200
arm_tpiu_swo: add support for independent TPIU and SWO
This is supposed to replace big part of armv7m_trace.[ch], since
TPIU is not only the one implemented in Cortex-M3 and M4.
Change-Id: I7588d16cbefe9cdb371c52fb0aa5cdfb48518804
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/5858
Tested-by: jenkins
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 34f1bb653..bd4380a2b 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -9503,13 +9503,146 @@ Selects whether interrupts will be processed when single stepping
@end deffn
-@subsection ARMv7-M specific commands
+@subsection ARM CoreSight TPIU and SWO specific commands
@cindex tracing
@cindex SWO
@cindex SWV
@cindex TPIU
-@cindex ITM
-@cindex ETM
+
+ARM CoreSight provides several modules to generate debugging
+information internally (ITM, DWT and ETM). Their output is directed
+through TPIU or SWO modules to be captured externally either on an SWO pin (this
+configuration is called SWV) or on a synchronous parallel trace port.
+
+ARM CoreSight provides independent HW blocks named TPIU and SWO each with its
+own functionality. Embedded in Cortex-M3 and M4, ARM provides an optional HW
+block that includes both TPIU and SWO functionalities and is again named TPIU,
+which causes quite some confusion.
+The registers map of all the TPIU and SWO implementations allows using a single
+driver that detects at runtime the features available.
+
+The @command{tpiu} is used for either TPIU or SWO.
+A convenient alias @command{swo} is available to help distinguish, in scripts,
+the commands for SWO from the commands for TPIU.
+
+@deffn Command {swo} ...
+Alias of @command{tpiu ...}. Can be used in scripts to distinguish the commands
+for SWO from the commands for TPIU.
+@end deffn
+
+@deffn Command {tpiu create} tpiu_name configparams...
+Creates a TPIU or a SWO object. The two commands are equivalent.
+Add the object in a list and add new commands (@command{@var{tpiu_name}})
+which are used for various purposes including additional configuration.
+
+@itemize @bullet
+@item @var{tpiu_name} -- the name of the TPIU or SWO object.
+This name is also used to create the object's command, referred to here
+as @command{$tpiu_name}, and in other places where the TPIU or SWO needs to be identified.
+@item @var{configparams} -- all parameters accepted by @command{$tpiu_name configure} are permitted.
+
+You @emph{must} set here the AP and MEM_AP base_address through @code{-dap @var{dap_name}},
+@code{-ap-num @var{ap_number}} and @code{-baseaddr @var{base_address}}.
+@end itemize
+@end deffn
+
+@deffn Command {tpiu names}
+Lists all the TPIU or SWO objects created so far. The two commands are equivalent.
+@end deffn
+
+@deffn Command {tpiu init}
+Initialize all registered TPIU and SWO. The two commands are equivalent.
+These commands are used internally during initialization. They can be issued
+at any time after the initialization, too.
+@end deffn
+
+@deffn Command {$tpiu_name cget} queryparm
+Each configuration parameter accepted by @command{$tpiu_name configure} can be
+individually queried, to return its current value.
+The @var{queryparm} is a parameter name accepted by that command, such as @code{-dap}.
+@end deffn
+
+@deffn Command {$tpiu_name configure} configparams...
+The options accepted by this command may also be specified as parameters
+to @command{tpiu create}. Their values can later be queried one at a time by
+using the @command{$tpiu_name cget} command.
+
+@itemize @bullet
+@item @code{-dap} @var{dap_name} -- names the DAP used to access this
+TPIU. @xref{dapdeclaration,,DAP declaration}, on how to create and manage DAP instances.
+
+@item @code{-ap-num} @var{ap_number} -- sets DAP access port for TPIU,
+@var{ap_number} is the numeric index of the DAP AP the TPIU is connected to.
+
+@item @code{-baseaddr} @var{base_address} -- sets the TPIU @var{base_address} where
+to access the TPIU in the DAP AP memory space.
+
+@item @code{-protocol} (@option{sync}|@option{uart}|@option{manchester}) -- sets the
+protocol used for trace data:
+@itemize @minus
+@item @option{sync} -- synchronous parallel trace output mode, using @var{port_width}
+ data bits (default);
+@item @option{uart} -- use asynchronous SWO mode with NRZ (same as regular UART 8N1) coding;
+@item @option{manchester} -- use asynchronous SWO mode with Manchester coding.
+@end itemize
+
+@item @code{-event} @var{event_name} @var{event_body} -- assigns an event handler,
+a TCL string which is evaluated when the event is triggered. The events
+@code{pre-enable}, @code{post-enable}, @code{pre-disable} and @code{post-disable}
+are defined for TPIU/SWO.
+A typical use case for the event @code{pre-enable} is to enable the trace clock
+of the TPIU.
+
+@item @code{-output} (@option{external}|@option{:}@var{port}|@var{filename}|@option{-}) -- specifies
+the destination of the trace data:
+@itemize @minus
+@item @option{external} -- configure TPIU/SWO to let user capture trace
+output externally, either with an additional UART or with a logic analyzer (default);
+@item @option{-} -- configure TPIU/SWO and debug adapter to gather trace data
+and forward it to @command{tcl_trace} command;
+@item @option{:}@var{port} -- configure TPIU/SWO and debug adapter to gather
+trace data, open a TCP server at port @var{port} and send the trace data to
+each connected client;
+@item @var{filename} -- configure TPIU/SWO and debug adapter to
+gather trace data and append it to @var{filename}, which can be
+either a regular file or a named pipe.
+@end itemize
+
+@item @code{-traceclk} @var{TRACECLKIN_freq} -- mandatory parameter.
+Specifies the frequency in Hz of the trace clock. For the TPIU embedded in
+Cortex-M3 or M4, this is usually the same frequency as HCLK. For protocol
+@option{sync} this is twice the frequency of the pin data rate.
+
+@item @code{-pin-freq} @var{trace_freq} -- specifies the expected data rate
+in Hz of the SWO pin. Parameter used only on protocols @option{uart} and
+@option{manchester}. Can be omitted to let the adapter driver select the
+maximum supported rate automatically.
+
+@item @code{-port-width} @var{port_width} -- sets to @var{port_width} the width
+of the synchronous parallel port used for trace output. Parameter used only on
+protocol @option{sync}. If not specified, default value is @var{1}.
+
+@item @code{-formatter} (@option{0}|@option{1}) -- specifies if the formatter
+should be enabled. Parameter used only on protocol @option{sync}. If not specified,
+default value is @var{0}.
+@end itemize
+@end deffn
+
+@deffn Command {$tpiu_name enable}
+Uses the parameters specified by the previous @command{$tpiu_name configure}
+to configure and enable the TPIU or the SWO.
+If required, the adapter is also configured and enabled to receive the trace
+data.
+This command can be used before @command{init}, but it will take effect only
+after the @command{init}.
+@end deffn
+
+@deffn Command {$tpiu_name disable}
+Disable the TPIU or the SWO, terminating the receiving of the trace data.
+@end deffn
+
+
+TODO: remove the old tpiu commands
@deffn Command {tpiu config} (@option{disable} | ((@option{external} | @option{internal (@var{filename} | @var{:port} | -)}) @
(@option{sync @var{port_width}} | ((@option{manchester} | @option{uart}) @var{formatter_enable})) @
@@ -9585,13 +9718,22 @@ baud with our custom divisor to get 12MHz)
@item OpenOCD invocation line:
@example
openocd -f interface/stlink.cfg \
- -c "transport select hla_swd" \
- -f target/stm32l1.cfg \
- -c "tpiu config external uart off 24000000 12000000"
+-c "transport select hla_swd" \
+-f target/stm32l1.cfg \
+-c "stm32l1.tpiu configure -protocol uart" \
+-c "stm32l1.tpiu configure -traceclk 24000000 -pin-freq 12000000" \
+-c "stm32l1.tpiu enable"
@end example
@end enumerate
@end deffn
+@subsection ARMv7-M specific commands
+@cindex tracing
+@cindex SWO
+@cindex SWV
+@cindex ITM
+@cindex ETM
+
@deffn Command {itm port} @var{port} (@option{0}|@option{1}|@option{on}|@option{off})
Enable or disable trace output for ITM stimulus @var{port} (counting
from 0). Port 0 is enabled on target creation automatically.
diff --git a/src/openocd.c b/src/openocd.c
index 83c35458b..4fec56338 100644
--- a/src/openocd.c
+++ b/src/openocd.c
@@ -38,6 +38,7 @@
#include <pld/pld.h>
#include <target/arm_cti.h>
#include <target/arm_adi_v5.h>
+#include <target/arm_tpiu_swo.h>
#include <rtt/rtt.h>
#include <server/server.h>
@@ -173,6 +174,10 @@ COMMAND_HANDLER(handle_init_command)
return ERROR_FAIL;
command_context_mode(CMD_CTX, COMMAND_EXEC);
+ /* in COMMAND_EXEC, after target_examine(), only tpiu or only swo */
+ if (command_run_line(CMD_CTX, "tpiu init") != ERROR_OK)
+ return ERROR_FAIL;
+
/* initialize telnet subsystem */
gdb_target_add_all(all_targets);
@@ -255,6 +260,7 @@ static struct command_context *setup_command_handler(Jim_Interp *interp)
&pld_register_commands,
&cti_register_commands,
&dap_register_commands,
+ &arm_tpiu_swo_register_commands,
NULL
};
for (unsigned i = 0; NULL != command_registrants[i]; i++) {
@@ -355,6 +361,7 @@ int openocd_main(int argc, char *argv[])
flash_free_all_banks();
gdb_service_free();
+ arm_tpiu_swo_cleanup_all();
server_free();
unregister_all_commands(cmd_ctx, NULL);
diff --git a/src/target/Makefile.am b/src/target/Makefile.am
index 1d30747b6..6605b678b 100644
--- a/src/target/Makefile.am
+++ b/src/target/Makefile.am
@@ -113,6 +113,7 @@ ARM_DEBUG_SRC = \
%D%/etm.c \
$(OOCD_TRACE_FILES) \
%D%/etm_dummy.c \
+ %D%/arm_tpiu_swo.c \
%D%/arm_cti.c
AVR32_SRC = \
@@ -214,6 +215,7 @@ ARC_SRC = \
%D%/etb.h \
%D%/etm.h \
%D%/etm_dummy.h \
+ %D%/arm_tpiu_swo.h \
%D%/image.h \
%D%/mips32.h \
%D%/mips64.h \
diff --git a/src/target/arm_tpiu_swo.c b/src/target/arm_tpiu_swo.c
new file mode 100644
index 000000000..61891cb57
--- /dev/null
+++ b/src/target/arm_tpiu_swo.c
@@ -0,0 +1,998 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+/**
+ * @file
+ * This file implements support for the ARM CoreSight components Trace Port
+ * Interface Unit (TPIU) and Serial Wire Output (SWO). It also supports the
+ * CoreSight TPIU-Lite and the special TPIU version present with Cortex-M3
+ * and Cortex-M4 (that includes SWO).
+ */
+
+/*
+ * Relevant specifications from ARM include:
+ *
+ * CoreSight(tm) Components Technical Reference Manual ARM DDI 0314H
+ * CoreSight(tm) TPIU-Lite Technical Reference Manual ARM DDI 0317A
+ * Cortex(tm)-M3 Technical Reference Manual ARM DDI 0337G
+ * Cortex(tm)-M4 Technical Reference Manual ARM DDI 0439B
+ * CoreSight(tm) SoC-400 Technical Reference Manual ARM DDI 0480F
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <stdlib.h>
+#include <jim.h>
+
+#include <helper/bits.h>
+#include <helper/command.h>
+#include <helper/jim-nvp.h>
+#include <helper/list.h>
+#include <helper/log.h>
+#include <helper/types.h>
+#include <jtag/interface.h>
+#include <server/server.h>
+#include <target/arm_adi_v5.h>
+#include <target/target.h>
+#include <transport/transport.h>
+#include "arm_tpiu_swo.h"
+
+#define TCP_SERVICE_NAME "tpiu_swo_trace"
+
+/* default for Cortex-M3 and Cortex-M4 specific TPIU */
+#define TPIU_SWO_DEFAULT_BASE 0xE0040000
+
+#define TPIU_SSPSR_OFFSET 0x000
+#define TPIU_CSPSR_OFFSET 0x004
+#define TPIU_ACPR_OFFSET 0x010
+#define TPIU_SPPR_OFFSET 0x0F0
+#define TPIU_FFSR_OFFSET 0x300
+#define TPIU_FFCR_OFFSET 0x304
+#define TPIU_FSCR_OFFSET 0x308
+#define TPIU_DEVID_OFFSET 0xfc8
+
+#define TPIU_ACPR_MAX_PRESCALER 0x1fff
+#define TPIU_SPPR_PROTOCOL_SYNC 0x0 /**< synchronous trace output */
+#define TPIU_SPPR_PROTOCOL_MANCHESTER 0x1 /**< asynchronous output with NRZ coding */
+#define TPIU_SPPR_PROTOCOL_UART 0x2 /**< asynchronous output with Manchester coding */
+#define TPIU_DEVID_NOSUPPORT_SYNC BIT(9)
+#define TPIU_DEVID_SUPPORT_MANCHESTER BIT(10)
+#define TPIU_DEVID_SUPPORT_UART BIT(11)
+
+enum arm_tpiu_swo_event {
+ TPIU_SWO_EVENT_PRE_ENABLE,
+ TPIU_SWO_EVENT_POST_ENABLE,
+ TPIU_SWO_EVENT_PRE_DISABLE,
+ TPIU_SWO_EVENT_POST_DISABLE,
+};
+
+static const Jim_Nvp nvp_arm_tpiu_swo_event[] = {
+ { .value = TPIU_SWO_EVENT_PRE_ENABLE, .name = "pre-enable" },
+ { .value = TPIU_SWO_EVENT_POST_ENABLE, .name = "post-enable" },
+ { .value = TPIU_SWO_EVENT_PRE_DISABLE, .name = "pre-disable" },
+ { .value = TPIU_SWO_EVENT_POST_DISABLE, .name = "post-disable" },
+};
+
+struct arm_tpiu_swo_event_action {
+ enum arm_tpiu_swo_event event;
+ Jim_Interp *interp;
+ Jim_Obj *body;
+ struct arm_tpiu_swo_event_action *next;
+};
+
+struct arm_tpiu_swo_object {
+ struct list_head lh;
+ struct adiv5_mem_ap_spot spot;
+ char *name;
+ struct arm_tpiu_swo_event_action *event_action;
+ /* record enable before init */
+ bool deferred_enable;
+ bool enabled;
+ bool en_capture;
+ /** Handle to output trace data in INTERNAL capture mode */
+ /** Synchronous output port width */
+ uint32_t port_width;
+ FILE *file;
+ /** output mode */
+ unsigned int pin_protocol;
+ /** Enable formatter */
+ bool en_formatter;
+ /** frequency of TRACECLKIN (usually matches HCLK) */
+ unsigned int traceclkin_freq;
+ /** SWO pin frequency */
+ unsigned int swo_pin_freq;
+ /** where to dump the captured output trace data */
+ char *out_filename;
+ /** track TCP connections */
+ struct list_head connections;
+};
+
+struct arm_tpiu_swo_connection {
+ struct list_head lh;
+ struct connection *connection;
+};
+
+struct arm_tpiu_swo_priv_connection {
+ struct arm_tpiu_swo_object *obj;
+};
+
+static LIST_HEAD(all_tpiu_swo);
+
+#define ARM_TPIU_SWO_TRACE_BUF_SIZE 4096
+
+static int arm_tpiu_swo_poll_trace(void *priv)
+{
+ struct arm_tpiu_swo_object *obj = priv;
+ uint8_t buf[ARM_TPIU_SWO_TRACE_BUF_SIZE];
+ size_t size = sizeof(buf);
+ struct arm_tpiu_swo_connection *c;
+
+ int retval = adapter_poll_trace(buf, &size);
+ if (retval != ERROR_OK || !size)
+ return retval;
+
+ target_call_trace_callbacks(/*target*/NULL, size, buf);
+
+ if (obj->file) {
+ if (fwrite(buf, 1, size, obj->file) == size) {
+ fflush(obj->file);
+ } else {
+ LOG_ERROR("Error writing to the SWO trace destination file");
+ return ERROR_FAIL;
+ }
+ }
+
+ if (obj->out_filename && obj->out_filename[0] == ':')
+ list_for_each_entry(c, &obj->connections, lh)
+ if (connection_write(c->connection, buf, size) != (int)size)
+ retval = ERROR_FAIL;
+
+ return ERROR_OK;
+}
+
+static void arm_tpiu_swo_handle_event(struct arm_tpiu_swo_object *obj, enum arm_tpiu_swo_event event)
+{
+ for (struct arm_tpiu_swo_event_action *ea = obj->event_action; ea; ea = ea->next) {
+ if (ea->event != event)
+ continue;
+
+ LOG_DEBUG("TPIU/SWO: %s event: %s (%d) action : %s",
+ obj->name,
+ Jim_Nvp_value2name_simple(nvp_arm_tpiu_swo_event, event)->name,
+ event,
+ Jim_GetString(ea->body, NULL));
+
+ /* prevent event execution to change current target */
+ struct command_context *cmd_ctx = current_command_context(ea->interp);
+ struct target *saved_target = cmd_ctx->current_target;
+ int retval = Jim_EvalObj(ea->interp, ea->body);
+ cmd_ctx->current_target = saved_target;
+
+ if (retval == JIM_RETURN)
+ retval = ea->interp->returnCode;
+ if (retval == JIM_OK || retval == ERROR_COMMAND_CLOSE_CONNECTION)
+ return;
+
+ Jim_MakeErrorMessage(ea->interp);
+ LOG_USER("Error executing event %s on TPIU/SWO %s:\n%s",
+ Jim_Nvp_value2name_simple(nvp_arm_tpiu_swo_event, event)->name,
+ obj->name,
+ Jim_GetString(Jim_GetResult(ea->interp), NULL));
+ /* clean both error code and stacktrace before return */
+ Jim_Eval(ea->interp, "error \"\" \"\"");
+ return;
+ }
+}
+
+static void arm_tpiu_swo_close_output(struct arm_tpiu_swo_object *obj)
+{
+ if (obj->file) {
+ fclose(obj->file);
+ obj->file = NULL;
+ }
+ if (obj->out_filename && obj->out_filename[0] == ':')
+ remove_service(TCP_SERVICE_NAME, &obj->out_filename[1]);
+}
+
+int arm_tpiu_swo_cleanup_all(void)
+{
+ struct arm_tpiu_swo_object *obj, *tmp;
+
+ list_for_each_entry_safe(obj, tmp, &all_tpiu_swo, lh) {
+ if (obj->enabled)
+ arm_tpiu_swo_handle_event(obj, TPIU_SWO_EVENT_PRE_DISABLE);
+
+ arm_tpiu_swo_close_output(obj);
+
+ if (obj->en_capture) {
+ target_unregister_timer_callback(arm_tpiu_swo_poll_trace, obj);
+
+ int retval = adapter_config_trace(false, 0, 0, NULL, 0, NULL);
+ if (retval != ERROR_OK)
+ LOG_ERROR("Failed to stop adapter's trace");
+ }
+
+ if (obj->enabled)
+ arm_tpiu_swo_handle_event(obj, TPIU_SWO_EVENT_POST_DISABLE);
+
+ struct arm_tpiu_swo_event_action *ea = obj->event_action;
+ while (ea) {
+ struct arm_tpiu_swo_event_action *next = ea->next;
+ Jim_DecrRefCount(ea->interp, ea->body);
+ free(ea);
+ ea = next;
+ }
+
+ free(obj->name);
+ free(obj->out_filename);
+ free(obj);
+ }
+
+ return ERROR_OK;
+}
+
+static int arm_tpiu_swo_service_new_connection(struct connection *connection)
+{
+ struct arm_tpiu_swo_priv_connection *priv = connection->service->priv;
+ struct arm_tpiu_swo_object *obj = priv->obj;
+ struct arm_tpiu_swo_connection *c = malloc(sizeof(*c));
+ if (!c) {
+ LOG_ERROR("Out of memory");
+ return ERROR_FAIL;
+ }
+ c->connection = connection;
+ list_add(&c->lh, &obj->connections);
+ return ERROR_OK;
+}
+
+static int arm_tpiu_swo_service_input(struct connection *connection)
+{
+ /* read a dummy buffer to check if the connection is still active */
+ long dummy;
+ int bytes_read = connection_read(connection, &dummy, sizeof(dummy));
+
+ if (bytes_read == 0) {
+ return ERROR_SERVER_REMOTE_CLOSED;
+ } else if (bytes_read == -1) {
+ LOG_ERROR("error during read: %s", strerror(errno));
+ return ERROR_SERVER_REMOTE_CLOSED;
+ }
+
+ return ERROR_OK;
+}
+
+static int arm_tpiu_swo_service_connection_closed(struct connection *connection)
+{
+ struct arm_tpiu_swo_priv_connection *priv = connection->service->priv;
+ struct arm_tpiu_swo_object *obj = priv->obj;
+ struct arm_tpiu_swo_connection *c, *tmp;
+
+ list_for_each_entry_safe(c, tmp, &obj->connections, lh)
+ if (c->connection == connection) {
+ list_del(&c->lh);
+ free(c);
+ return ERROR_OK;
+ }
+ LOG_ERROR("Failed to find connection to close!");
+ return ERROR_FAIL;
+}
+
+COMMAND_HANDLER(handle_arm_tpiu_swo_event_list)
+{
+ struct arm_tpiu_swo_object *obj = CMD_DATA;
+
+ command_print(CMD, "Event actions for TPIU/SWO %s\n", obj->name);
+ command_print(CMD, "%-25s | Body", "Event");
+ command_print(CMD, "------------------------- | "
+ "----------------------------------------");
+
+ for (struct arm_tpiu_swo_event_action *ea = obj->event_action; ea; ea = ea->next) {
+ Jim_Nvp *opt = Jim_Nvp_value2name_simple(nvp_arm_tpiu_swo_event, ea->event);
+ command_print(CMD, "%-25s | %s",
+ opt->name, Jim_GetString(ea->body, NULL));
+ }
+ command_print(CMD, "***END***");
+ return ERROR_OK;
+}
+
+enum arm_tpiu_swo_cfg_param {
+ CFG_PORT_WIDTH,
+ CFG_PROTOCOL,
+ CFG_FORMATTER,
+ CFG_TRACECLKIN,
+ CFG_BITRATE,
+ CFG_OUTFILE,
+ CFG_EVENT,
+};
+
+static const Jim_Nvp nvp_arm_tpiu_swo_config_opts[] = {
+ { .name = "-port-width", .value = CFG_PORT_WIDTH },
+ { .name = "-protocol", .value = CFG_PROTOCOL },
+ { .name = "-formatter", .value = CFG_FORMATTER },
+ { .name = "-traceclk", .value = CFG_TRACECLKIN },
+ { .name = "-pin-freq", .value = CFG_BITRATE },
+ { .name = "-output", .value = CFG_OUTFILE },
+ { .name = "-event", .value = CFG_EVENT },
+ /* handled by mem_ap_spot, added for Jim_GetOpt_NvpUnknown() */
+ { .name = "-dap", .value = -1 },
+ { .name = "-ap-num", .value = -1 },
+ { .name = "-baseaddr", .value = -1 },
+ { .name = NULL, .value = -1 },
+};
+
+static const Jim_Nvp nvp_arm_tpiu_swo_protocol_opts[] = {
+ { .name = "sync", .value = TPIU_SPPR_PROTOCOL_SYNC },
+ { .name = "uart", .value = TPIU_SPPR_PROTOCOL_UART },
+ { .name = "manchester", .value = TPIU_SPPR_PROTOCOL_MANCHESTER },
+ { .name = NULL, .value = -1 },
+};
+
+static const Jim_Nvp nvp_arm_tpiu_swo_bool_opts[] = {
+ { .name = "on", .value = 1 },
+ { .name = "yes", .value = 1 },
+ { .name = "1", .value = 1 },
+ { .name = "true", .value = 1 },
+ { .name = "off", .value = 0 },
+ { .name = "no", .value = 0 },
+ { .name = "0", .value = 0 },
+ { .name = "false", .value = 0 },
+ { .name = NULL, .value = -1 },
+};
+
+static int arm_tpiu_swo_configure(Jim_GetOptInfo *goi, struct arm_tpiu_swo_object *obj)
+{
+ assert(obj != NULL);
+
+ if (goi->isconfigure && obj->enabled) {
+ Jim_SetResultFormatted(goi->interp, "Cannot configure TPIU/SWO; %s is enabled!", obj->name);
+ return JIM_ERR;
+ }
+
+ /* parse config or cget options ... */
+ while (goi->argc > 0) {
+ Jim_SetEmptyResult(goi->interp);
+
+ int e = adiv5_jim_mem_ap_spot_configure(&obj->spot, goi);
+ if (e == JIM_OK)
+ continue;
+ if (e == JIM_ERR)
+ return e;
+
+ Jim_Nvp *n;
+ e = Jim_GetOpt_Nvp(goi, nvp_arm_tpiu_swo_config_opts, &n);
+ if (e != JIM_OK) {
+ Jim_GetOpt_NvpUnknown(goi, nvp_arm_tpiu_swo_config_opts, 0);
+ return e;
+ }
+
+ switch (n->value) {
+ case CFG_PORT_WIDTH:
+ if (goi->isconfigure) {
+ jim_wide port_width;
+ e = Jim_GetOpt_Wide(goi, &port_width);
+ if (e != JIM_OK)
+ return e;
+ if (port_width < 1 || port_width > 32) {
+ Jim_SetResultString(goi->interp, "Invalid port width!", -1);
+ return JIM_ERR;
+ }
+ obj->port_width = (uint32_t)port_width;
+ } else {
+ if (goi->argc)
+ goto err_no_params;
+ Jim_SetResult(goi->interp, Jim_NewIntObj(goi->interp, obj->port_width));
+ }
+ break;
+ case CFG_PROTOCOL:
+ if (goi->isconfigure) {
+ Jim_Nvp *p;
+ e = Jim_GetOpt_Nvp(goi, nvp_arm_tpiu_swo_protocol_opts, &p);
+ if (e != JIM_OK)
+ return e;
+ obj->pin_protocol = p->value;
+ } else {
+ if (goi->argc)
+ goto err_no_params;
+ Jim_Nvp *p;
+ e = Jim_Nvp_value2name(goi->interp, nvp_arm_tpiu_swo_protocol_opts, obj->pin_protocol, &p);
+ if (e != JIM_OK) {
+ Jim_SetResultString(goi->interp, "protocol error", -1);
+ return JIM_ERR;
+ }
+ Jim_SetResult(goi->interp, Jim_NewStringObj(goi->interp, p->name, -1));
+ }
+ break;
+ case CFG_FORMATTER:
+ if (goi->isconfigure) {
+ Jim_Nvp *p;
+ e = Jim_GetOpt_Nvp(goi, nvp_arm_tpiu_swo_bool_opts, &p);
+ if (e != JIM_OK)
+ return e;
+ obj->en_formatter = p->value;
+ } else {
+ if (goi->argc)
+ goto err_no_params;
+ Jim_Nvp *p;
+ e = Jim_Nvp_value2name(goi->interp, nvp_arm_tpiu_swo_bool_opts, obj->en_formatter, &p);
+ if (e != JIM_OK) {
+ Jim_SetResultString(goi->interp, "formatter error", -1);
+ return JIM_ERR;
+ }
+ Jim_SetResult(goi->interp, Jim_NewStringObj(goi->interp, p->name, -1));
+ }
+ break;
+ case CFG_TRACECLKIN:
+ if (goi->isconfigure) {
+ jim_wide clk;
+ e = Jim_GetOpt_Wide(goi, &clk);
+ if (e != JIM_OK)
+ return e;
+ obj->traceclkin_freq = clk;
+ } else {
+ if (goi->argc)
+ goto err_no_params;
+ Jim_SetResult(goi->interp, Jim_NewIntObj(goi->interp, obj->traceclkin_freq));
+ }
+ break;
+ case CFG_BITRATE:
+ if (goi->isconfigure) {
+ jim_wide clk;
+ e = Jim_GetOpt_Wide(goi, &clk);
+ if (e != JIM_OK)
+ return e;
+ obj->swo_pin_freq = clk;
+ } else {
+ if (goi->argc)
+ goto err_no_params;
+ Jim_SetResult(goi->interp, Jim_NewIntObj(goi->interp, obj->swo_pin_freq));
+ }
+ break;
+ case CFG_OUTFILE:
+ if (goi->isconfigure) {
+ const char *s;
+ e = Jim_GetOpt_String(goi, &s, NULL);
+ if (e != JIM_OK)
+ return e;
+ if (s[0] == ':') {
+ char *end;
+ long port = strtol(s + 1, &end, 0);
+ if (port <= 0 || port > UINT16_MAX || *end != '\0') {
+ Jim_SetResultFormatted(goi->interp, "Invalid TCP port \'%s\'", s + 1);
+ return JIM_ERR;
+ }
+ }
+ free(obj->out_filename);
+ obj->out_filename = strdup(s);
+ if (!obj->out_filename) {
+ LOG_ERROR("Out of memory");
+ return JIM_ERR;
+ }
+ } else {
+ if (goi->argc)
+ goto err_no_params;
+ if (obj->out_filename)
+ Jim_SetResult(goi->interp, Jim_NewStringObj(goi->interp, obj->out_filename, -1));
+ }
+ break;
+ case CFG_EVENT:
+ if (goi->isconfigure) {
+ if (goi->argc < 2) {
+ Jim_WrongNumArgs(goi->interp, goi->argc, goi->argv, "-event ?event-name? ?EVENT-BODY?");
+ return JIM_ERR;
+ }
+ } else {
+ if (goi->argc != 1) {
+ Jim_WrongNumArgs(goi->interp, goi->argc, goi->argv, "-event ?event-name?");
+ return JIM_ERR;
+ }
+ }
+
+ {
+ Jim_Nvp *p;
+ Jim_Obj *o;
+ struct arm_tpiu_swo_event_action *ea = obj->event_action;
+
+ e = Jim_GetOpt_Nvp(goi, nvp_arm_tpiu_swo_event, &p);
+ if (e != JIM_OK) {
+ Jim_GetOpt_NvpUnknown(goi, nvp_arm_tpiu_swo_event, 1);
+ return e;
+ }
+
+ while (ea) {
+ /* replace existing? */
+ if (ea->event == (enum arm_tpiu_swo_event)p->value)
+ break;
+ ea = ea->next;
+ }
+
+ if (goi->isconfigure) {
+ if (!ea) {
+ ea = calloc(1, sizeof(*ea));
+ if (!ea) {
+ LOG_ERROR("Out of memory");
+ return JIM_ERR;
+ }
+ ea->next = obj->event_action;
+ obj->event_action = ea;
+ }
+ if (ea->body)
+ Jim_DecrRefCount(ea->interp, ea->body);
+ ea->event = p->value;
+ ea->interp = goi->interp;
+ Jim_GetOpt_Obj(goi, &o);
+ ea->body = Jim_DuplicateObj(goi->interp, o);
+ Jim_IncrRefCount(ea->body);
+ } else {
+ if (ea)
+ Jim_SetResult(goi->interp, Jim_DuplicateObj(goi->interp, ea->body));
+ }
+ }
+ break;
+ }
+ }
+
+ return JIM_OK;
+
+err_no_params:
+ Jim_WrongNumArgs(goi->interp, goi->argc, goi->argv, "NO PARAMS");
+ return JIM_ERR;
+}
+
+static int jim_arm_tpiu_swo_configure(Jim_Interp *interp, int argc, Jim_Obj * const *argv)
+{
+ Jim_GetOptInfo goi;
+
+ Jim_GetOpt_Setup(&goi, interp, argc - 1, argv + 1);
+ goi.isconfigure = !strcmp(Jim_GetString(argv[0], NULL), "configure");
+ if (goi.argc < 1) {
+ Jim_WrongNumArgs(goi.interp, goi.argc, goi.argv,
+ "missing: -option ...");
+ return JIM_ERR;
+ }
+ struct arm_tpiu_swo_object *obj = Jim_CmdPrivData(interp);
+ return arm_tpiu_swo_configure(&goi, obj);
+}
+
+static int wrap_write_u32(struct target *target, struct adiv5_ap *tpiu_ap,
+ target_addr_t address, uint32_t value)
+{
+ if (transport_is_hla())
+ return target_write_u32(target, address, value);
+ else
+ return mem_ap_write_atomic_u32(tpiu_ap, address, value);
+}
+
+static int wrap_read_u32(struct target *target, struct adiv5_ap *tpiu_ap,
+ target_addr_t address, uint32_t *value)
+{
+ if (transport_is_hla())
+ return target_read_u32(target, address, value);
+ else
+ return mem_ap_read_atomic_u32(tpiu_ap, address, value);
+}
+
+static int jim_arm_tpiu_swo_enable(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
+{
+ struct arm_tpiu_swo_object *obj = Jim_CmdPrivData(interp);
+ struct command_context *cmd_ctx = current_command_context(interp);
+ struct adiv5_ap *tpiu_ap = dap_ap(obj->spot.dap, obj->spot.ap_num);
+ uint32_t value;
+ int retval;
+
+ if (argc != 1) {
+ Jim_WrongNumArgs(interp, 1, argv, "Too many parameters");
+ return JIM_ERR;
+ }
+
+ if (cmd_ctx->mode == COMMAND_CONFIG) {
+ LOG_DEBUG("%s: enable deferred", obj->name);
+ obj->deferred_enable = true;
+ return JIM_OK;
+ }
+
+ if (obj->enabled)
+ return JIM_OK;
+
+ if (transport_is_hla() && obj->spot.ap_num > 0) {
+ LOG_ERROR("Invalid access port %d. Only AP#0 allowed with hla transport", obj->spot.ap_num);
+ return JIM_ERR;
+ }
+
+ if (!obj->traceclkin_freq) {
+ LOG_ERROR("Trace clock-in frequency not set");
+ return JIM_ERR;
+ }
+
+ if (obj->pin_protocol == TPIU_SPPR_PROTOCOL_MANCHESTER || obj->pin_protocol == TPIU_SPPR_PROTOCOL_UART)
+ if (!obj->swo_pin_freq) {
+ LOG_ERROR("SWO pin frequency not set");
+ return JIM_ERR;
+ }
+
+ struct target *target = get_current_target(cmd_ctx);
+
+ /* trigger the event before any attempt to R/W in the TPIU/SWO */
+ arm_tpiu_swo_handle_event(obj, TPIU_SWO_EVENT_PRE_ENABLE);
+
+ retval = wrap_read_u32(target, tpiu_ap, obj->spot.base + TPIU_DEVID_OFFSET, &value);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Unable to read %s", obj->name);
+ return JIM_ERR;
+ }
+ switch (obj->pin_protocol) {
+ case TPIU_SPPR_PROTOCOL_SYNC:
+ value = !(value & TPIU_DEVID_NOSUPPORT_SYNC);
+ break;
+ case TPIU_SPPR_PROTOCOL_UART:
+ value &= TPIU_DEVID_SUPPORT_UART;
+ break;
+ case TPIU_SPPR_PROTOCOL_MANCHESTER:
+ value &= TPIU_DEVID_SUPPORT_MANCHESTER;
+ break;
+ default:
+ value = 0;
+ }
+ if (!value) {
+ Jim_Nvp *p;
+ Jim_Nvp_value2name(interp, nvp_arm_tpiu_swo_protocol_opts, obj->pin_protocol, &p);
+ LOG_ERROR("%s does not support protocol %s", obj->name, p->name);
+ return JIM_ERR;
+ }
+
+ if (obj->pin_protocol == TPIU_SPPR_PROTOCOL_SYNC) {
+ retval = wrap_read_u32(target, tpiu_ap, obj->spot.base + TPIU_SSPSR_OFFSET, &value);
+ if (!(value & BIT(obj->port_width - 1))) {
+ LOG_ERROR("TPIU does not support port-width of %d bits", obj->port_width);
+ return JIM_ERR;
+ }
+ }
+
+ uint16_t prescaler = 1; /* dummy value */
+ unsigned int swo_pin_freq = obj->swo_pin_freq; /* could be replaced */
+
+ if (obj->out_filename && strcmp(obj->out_filename, "external") && obj->out_filename[0]) {
+ if (obj->out_filename[0] == ':') {
+ struct arm_tpiu_swo_priv_connection *priv = malloc(sizeof(*priv));
+ if (!priv) {
+ LOG_ERROR("Out of memory");
+ return JIM_ERR;
+ }
+ priv->obj = obj;
+ LOG_INFO("starting trace server for %s on %s", obj->name, &obj->out_filename[1]);
+ retval = add_service("tpiu_swo_trace", &obj->out_filename[1],
+ CONNECTION_LIMIT_UNLIMITED, arm_tpiu_swo_service_new_connection,
+ arm_tpiu_swo_service_input, arm_tpiu_swo_service_connection_closed,
+ priv, NULL);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Can't configure trace TCP port %s", &obj->out_filename[1]);
+ return JIM_ERR;
+ }
+ } else if (strcmp(obj->out_filename, "-")) {
+ obj->file = fopen(obj->out_filename, "ab");
+ if (!obj->file) {
+ LOG_ERROR("Can't open trace destination file \"%s\"", obj->out_filename);
+ return JIM_ERR;
+ }
+ }
+
+ retval = adapter_config_trace(true, obj->pin_protocol, obj->port_width,
+ &swo_pin_freq, obj->traceclkin_freq, &prescaler);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Failed to start adapter's trace");
+ arm_tpiu_swo_close_output(obj);
+ return JIM_ERR;
+ }
+
+ if (obj->swo_pin_freq != swo_pin_freq)
+ LOG_INFO("SWO pin data rate adjusted by adapter to %d Hz", swo_pin_freq);
+ obj->swo_pin_freq = swo_pin_freq;
+
+ target_register_timer_callback(arm_tpiu_swo_poll_trace, 1,
+ TARGET_TIMER_TYPE_PERIODIC, obj);
+
+ obj->en_capture = true;
+ } else if (obj->pin_protocol == TPIU_SPPR_PROTOCOL_MANCHESTER || obj->pin_protocol == TPIU_SPPR_PROTOCOL_UART) {
+ prescaler = (obj->traceclkin_freq + obj->swo_pin_freq / 2) / obj->swo_pin_freq;
+ if (prescaler > TPIU_ACPR_MAX_PRESCALER)
+ prescaler = TPIU_ACPR_MAX_PRESCALER;
+ swo_pin_freq = obj->traceclkin_freq / prescaler;
+
+ if (obj->swo_pin_freq != swo_pin_freq)
+ LOG_INFO("SWO pin data rate adjusted to %d Hz", swo_pin_freq);
+ obj->swo_pin_freq = swo_pin_freq;
+ }
+
+ retval = wrap_write_u32(target, tpiu_ap, obj->spot.base + TPIU_CSPSR_OFFSET, BIT(obj->port_width - 1));
+ if (retval != ERROR_OK)
+ goto error_exit;
+
+ retval = wrap_write_u32(target, tpiu_ap, obj->spot.base + TPIU_ACPR_OFFSET, prescaler - 1);
+ if (retval != ERROR_OK)
+ goto error_exit;
+
+ retval = wrap_write_u32(target, tpiu_ap, obj->spot.base + TPIU_SPPR_OFFSET, obj->pin_protocol);
+ if (retval != ERROR_OK)
+ goto error_exit;
+
+ retval = wrap_read_u32(target, tpiu_ap, obj->spot.base + TPIU_FFCR_OFFSET, &value);
+ if (retval != ERROR_OK)
+ goto error_exit;
+ if (obj->en_formatter)
+ value |= BIT(1);
+ else
+ value &= ~BIT(1);
+ retval = wrap_write_u32(target, tpiu_ap, obj->spot.base + TPIU_FFCR_OFFSET, value);
+ if (retval != ERROR_OK)
+ goto error_exit;
+
+ arm_tpiu_swo_handle_event(obj, TPIU_SWO_EVENT_POST_ENABLE);
+
+ obj->enabled = true;
+ return JIM_OK;
+
+error_exit:
+ LOG_ERROR("Error!");
+
+ if (obj->en_capture) {
+ obj->en_capture = false;
+
+ arm_tpiu_swo_close_output(obj);
+
+ target_unregister_timer_callback(arm_tpiu_swo_poll_trace, obj);
+
+ retval = adapter_config_trace(false, 0, 0, NULL, 0, NULL);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Failed to stop adapter's trace");
+ return JIM_ERR;
+ }
+ }
+ return JIM_ERR;
+}
+
+static int jim_arm_tpiu_swo_disable(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
+{
+ struct arm_tpiu_swo_object *obj = Jim_CmdPrivData(interp);
+
+ if (argc != 1) {
+ Jim_WrongNumArgs(interp, 1, argv, "Too many parameters");
+ return JIM_ERR;
+ }
+
+ if (!obj->enabled)
+ return JIM_OK;
+ obj->enabled = false;
+
+ arm_tpiu_swo_handle_event(obj, TPIU_SWO_EVENT_PRE_DISABLE);
+
+ if (obj->en_capture) {
+ obj->en_capture = false;
+
+ arm_tpiu_swo_close_output(obj);
+
+ target_unregister_timer_callback(arm_tpiu_swo_poll_trace, obj);
+
+ int retval = adapter_config_trace(false, 0, 0, NULL, 0, NULL);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Failed to stop adapter's trace");
+ return JIM_ERR;
+ }
+ }
+
+ arm_tpiu_swo_handle_event(obj, TPIU_SWO_EVENT_POST_DISABLE);
+ return JIM_OK;
+}
+
+static const struct command_registration arm_tpiu_swo_instance_command_handlers[] = {
+ {
+ .name = "configure",
+ .mode = COMMAND_ANY,
+ .jim_handler = jim_arm_tpiu_swo_configure,
+ .help = "configure a new TPIU/SWO for use",
+ .usage = "[attribute value ...]",
+ },
+ {
+ .name = "cget",
+ .mode = COMMAND_ANY,
+ .jim_handler = jim_arm_tpiu_swo_configure,
+ .help = "returns the specified TPIU/SWO attribute",
+ .usage = "attribute",
+ },
+ {
+ .name = "eventlist",
+ .mode = COMMAND_ANY,
+ .handler = handle_arm_tpiu_swo_event_list,
+ .help = "displays a table of events defined for this TPIU/SWO",
+ .usage = "",
+ },
+ {
+ .name = "enable",
+ .mode = COMMAND_ANY,
+ .jim_handler = jim_arm_tpiu_swo_enable,
+ .usage = "",
+ .help = "Enables the TPIU/SWO output",
+ },
+ {
+ .name = "disable",
+ .mode = COMMAND_EXEC,
+ .jim_handler = jim_arm_tpiu_swo_disable,
+ .usage = "",
+ .help = "Disables the TPIU/SWO output",
+ },
+ COMMAND_REGISTRATION_DONE
+};
+
+static int arm_tpiu_swo_create(Jim_Interp *interp, struct arm_tpiu_swo_object *obj)
+{
+ struct command_context *cmd_ctx;
+ Jim_Cmd *cmd;
+ int e;
+
+ cmd_ctx = current_command_context(interp);
+ assert(cmd_ctx != NULL);
+
+ /* does this command exist? */
+ cmd = Jim_GetCommand(interp, Jim_NewStringObj(interp, obj->name, -1), JIM_ERRMSG);
+ if (cmd) {
+ Jim_SetResultFormatted(interp, "Command: %s Exists", obj->name);
+ return JIM_ERR;
+ }
+
+ /* now - create the new tpiu/swo name command */
+ const struct command_registration obj_commands[] = {
+ {
+ .name = obj->name,
+ .mode = COMMAND_ANY,
+ .help = "tpiu/swo instance command group",
+ .usage = "",
+ .chain = arm_tpiu_swo_instance_command_handlers,
+ },
+ COMMAND_REGISTRATION_DONE
+ };
+ e = register_commands(cmd_ctx, NULL, obj_commands);
+ if (ERROR_OK != e)
+ return JIM_ERR;
+
+ struct command *c = command_find_in_context(cmd_ctx, obj->name);
+ assert(c);
+ command_set_handler_data(c, obj);
+
+ list_add_tail(&obj->lh, &all_tpiu_swo);
+
+ return JIM_OK;
+}
+
+static int jim_arm_tpiu_swo_create(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
+{
+ Jim_GetOptInfo goi;
+ Jim_GetOpt_Setup(&goi, interp, argc - 1, argv + 1);
+ if (goi.argc < 1) {
+ Jim_WrongNumArgs(goi.interp, 1, goi.argv, "?name? ..options...");
+ return JIM_ERR;
+ }
+
+ struct arm_tpiu_swo_object *obj = calloc(1, sizeof(struct arm_tpiu_swo_object));
+ if (!obj) {
+ LOG_ERROR("Out of memory");
+ return JIM_ERR;
+ }
+ INIT_LIST_HEAD(&obj->connections);
+ adiv5_mem_ap_spot_init(&obj->spot);
+ obj->spot.base = TPIU_SWO_DEFAULT_BASE;
+ obj->port_width = 1;
+
+ Jim_Obj *n;
+ Jim_GetOpt_Obj(&goi, &n);
+ obj->name = strdup(Jim_GetString(n, NULL));
+ if (!obj->name) {
+ LOG_ERROR("Out of memory");
+ free(obj);
+ return JIM_ERR;
+ }
+
+ /* Do the rest as "configure" options */
+ goi.isconfigure = 1;
+ int e = arm_tpiu_swo_configure(&goi, obj);
+ if (e != JIM_OK)
+ goto err_exit;
+
+ if (!obj->spot.dap || obj->spot.ap_num == DP_APSEL_INVALID) {
+ Jim_SetResultString(goi.interp, "-dap and -ap-num required when creating TPIU", -1);
+ goto err_exit;
+ }
+
+ e = arm_tpiu_swo_create(goi.interp, obj);
+ if (e != JIM_OK)
+ goto err_exit;
+
+ return JIM_OK;
+
+err_exit:
+ free(obj->name);
+ free(obj->out_filename);
+ free(obj);
+ return JIM_ERR;
+}
+
+static int jim_arm_tpiu_swo_names(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
+{
+ struct arm_tpiu_swo_object *obj;
+
+ if (argc != 1) {
+ Jim_WrongNumArgs(interp, 1, argv, "Too many parameters");
+ return JIM_ERR;
+ }
+ Jim_SetResult(interp, Jim_NewListObj(interp, NULL, 0));
+ list_for_each_entry(obj, &all_tpiu_swo, lh) {
+ Jim_ListAppendElement(interp, Jim_GetResult(interp),
+ Jim_NewStringObj(interp, obj->name, -1));
+ }
+ return JIM_OK;
+}
+
+static int jim_arm_tpiu_swo_init(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
+{
+ struct command_context *cmd_ctx = current_command_context(interp);
+ struct arm_tpiu_swo_object *obj;
+ int retval = JIM_OK;
+
+ if (argc != 1) {
+ Jim_WrongNumArgs(interp, 1, argv, "Too many parameters");
+ return JIM_ERR;
+ }
+ list_for_each_entry(obj, &all_tpiu_swo, lh) {
+ if (!obj->deferred_enable)
+ continue;
+ LOG_DEBUG("%s: running enable during init", obj->name);
+ int retval2 = command_run_linef(cmd_ctx, "%s enable", obj->name);
+ if (retval2 != ERROR_OK)
+ retval = JIM_ERR;
+ }
+ return retval;
+}
+
+static const struct command_registration arm_tpiu_swo_subcommand_handlers[] = {
+ {
+ .name = "create",
+ .mode = COMMAND_ANY,
+ .jim_handler = jim_arm_tpiu_swo_create,
+ .usage = "name [-dap dap] [-ap-num num] [-address baseaddr]",
+ .help = "Creates a new TPIU or SWO object",
+ },
+ {
+ .name = "names",
+ .mode = COMMAND_ANY,
+ .jim_handler = jim_arm_tpiu_swo_names,
+ .usage = "",
+ .help = "Lists all registered TPIU and SWO objects by name",
+ },
+ {
+ .name = "init",
+ .mode = COMMAND_EXEC,
+ .jim_handler = jim_arm_tpiu_swo_init,
+ .usage = "",
+ .help = "Initialize TPIU and SWO",
+ },
+ COMMAND_REGISTRATION_DONE
+};
+
+static const struct command_registration arm_tpiu_swo_command_handlers[] = {
+ {
+ .name = "tpiu",
+ .chain = arm_tpiu_swo_subcommand_handlers,
+ .usage = "",
+ .help = "tpiu command group",
+ },
+ {
+ .name = "swo",
+ .chain = arm_tpiu_swo_subcommand_handlers,
+ .usage = "",
+ .help = "swo command group",
+ },
+ COMMAND_REGISTRATION_DONE
+};
+
+int arm_tpiu_swo_register_commands(struct command_context *cmd_ctx)
+{
+ return register_commands(cmd_ctx, NULL, arm_tpiu_swo_command_handlers);
+}
diff --git a/src/target/arm_tpiu_swo.h b/src/target/arm_tpiu_swo.h
new file mode 100644
index 000000000..e0aed71cb
--- /dev/null
+++ b/src/target/arm_tpiu_swo.h
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef OPENOCD_TARGET_ARM_TPIU_SWO_H
+#define OPENOCD_TARGET_ARM_TPIU_SWO_H
+
+int arm_tpiu_swo_register_commands(struct command_context *cmd_ctx);
+int arm_tpiu_swo_cleanup_all(void);
+
+#endif /* OPENOCD_TARGET_ARM_TPIU_SWO_H */
commit f9509c92dba370be363f5641d3fefe2250bee10c
Author: Antonio Borneo <bor...@gm...>
Date: Fri Nov 13 19:41:41 2020 +0100
itm: rework itm commands before 'init'
If the command 'itm port[s]' is issued before 'init', the ITM can
not be programmed because OpenOCD cannot access the target yet.
The configuration is recorded and applied after target examine.
The current test to trigger the ITM delayed-programming is based
on the TPIU configuration. This is allowed because the only use of
ITM it so send data through TPIU.
In case of system TPIU, not belonging anymore to the target, there
is no more association between target ITM and system TPIU.
Add a flag to record the pending ITM configuration requested
before 'init' and test the flag to trigger the delayed-programming
of the ITM.
Change-Id: I101eb97a116d7925cd2ff068f3e8813fc008b08e
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/6029
Tested-by: jenkins
diff --git a/src/target/armv7m_trace.c b/src/target/armv7m_trace.c
index adfef2e9b..02f3f1061 100644
--- a/src/target/armv7m_trace.c
+++ b/src/target/armv7m_trace.c
@@ -408,8 +408,9 @@ COMMAND_HANDLER(handle_itm_port_command)
if (CMD_CTX->mode == COMMAND_EXEC)
return armv7m_trace_itm_config(target);
- else
- return ERROR_OK;
+
+ armv7m->trace_config.itm_deferred_config = true;
+ return ERROR_OK;
}
COMMAND_HANDLER(handle_itm_ports_command)
@@ -427,8 +428,9 @@ COMMAND_HANDLER(handle_itm_ports_command)
if (CMD_CTX->mode == COMMAND_EXEC)
return armv7m_trace_itm_config(target);
- else
- return ERROR_OK;
+
+ armv7m->trace_config.itm_deferred_config = true;
+ return ERROR_OK;
}
static const struct command_registration tpiu_command_handlers[] = {
diff --git a/src/target/armv7m_trace.h b/src/target/armv7m_trace.h
index cdf79e74c..61142b1e3 100644
--- a/src/target/armv7m_trace.h
+++ b/src/target/armv7m_trace.h
@@ -78,6 +78,8 @@ struct armv7m_trace_config {
bool itm_async_timestamps;
/** Enable synchronisation packet transmission (for sync port only) */
bool itm_synchro_packets;
+ /** Config ITM after target examine */
+ bool itm_deferred_config;
/** Current frequency of TRACECLKIN (usually matches HCLK) */
unsigned int traceclkin_freq;
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index ce2c426ce..4580c10ff 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -2082,10 +2082,11 @@ int cortex_m_examine(struct target *target)
if (retval != ERROR_OK)
return retval;
- if (armv7m->trace_config.config_type != TRACE_CONFIG_TYPE_DISABLED) {
+ if (armv7m->trace_config.config_type != TRACE_CONFIG_TYPE_DISABLED)
armv7m_trace_tpiu_config(target);
+
+ if (armv7m->trace_config.itm_deferred_config)
armv7m_trace_itm_config(target);
- }
/* NOTE: FPB and DWT are both optional. */
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 154 ++++++-
src/openocd.c | 7 +
src/target/Makefile.am | 2 +
src/target/arm_tpiu_swo.c | 998 ++++++++++++++++++++++++++++++++++++++++++++++
src/target/arm_tpiu_swo.h | 9 +
src/target/armv7m_trace.c | 10 +-
src/target/armv7m_trace.h | 2 +
src/target/cortex_m.c | 5 +-
8 files changed, 1175 insertions(+), 12 deletions(-)
create mode 100644 src/target/arm_tpiu_swo.c
create mode 100644 src/target/arm_tpiu_swo.h
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-03-10 21:33:41
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via faaa42283f5c06830fe997b80d6c64f6469c6cf0 (commit)
from 47fa000193a6de7c374b4cae075ddaae3917a0e4 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit faaa42283f5c06830fe997b80d6c64f6469c6cf0
Author: Antonio Borneo <bor...@gm...>
Date: Thu Nov 12 15:27:01 2020 +0100
stlink: fix execution order in stlink_config_trace()
The change [1] guarantees that the value pointed by 'prescaler'
gets always set, even when the adapter does not support the
specific mode requested (e.g. sync), or during trace disabling.
This works fine with the code in armv7m_trace_tpiu_config(), but
requires all the parameters to be valid also to disable the trace
(with 'enable==false'), otherwise returns error on incorrect
parameters or even causes segmentation fault if pointers
'trace_freq' or 'prescaler' are NULL.
Another problem in stlink_config_trace(), not linked with [1], is
caused by a tentative to change the settings on an already enabled
trace; the trace is disabled before the new parameters are fully
validated and in case of invalid parameters the trace is not
re-enabled.
It would be more logical to first check all the parameters, then
disable the trace, change the settings and re-enable the trace.
Practically revert [1] by checking 'enable==false' at function
entry, then disable trace and exit without any further check on
the other parameters.
For the case 'enable==true', validate all the function parameters
then disable the trace, update the trace settings and re-enable
the trace.
Modify the caller armv7m_trace_tpiu_config() to initialize the
variable 'prescaler' to a safe value to avoid the issue targeted
by [1].
[1] commit 38277fa75280 ("jtag/drivers/stlink_usb: fix SWO prescaler")
Change-Id: Ia6530682162ca2c9f5ac64301f2456f70cc07ed2
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/5934
Tested-by: jenkins
Reviewed-by: Adrian M Negreanu <adr...@nx...>
diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c
index 813af5578..73169e1e4 100644
--- a/src/jtag/drivers/stlink_usb.c
+++ b/src/jtag/drivers/stlink_usb.c
@@ -3528,8 +3528,20 @@ static int stlink_config_trace(void *handle, bool enabled,
{
struct stlink_usb_handle_s *h = handle;
- if (enabled && (!(h->version.flags & STLINK_F_HAS_TRACE) ||
- pin_protocol != TPIU_PIN_PROTOCOL_ASYNC_UART)) {
+ if (!(h->version.flags & STLINK_F_HAS_TRACE)) {
+ LOG_ERROR("The attached ST-LINK version doesn't support trace");
+ return ERROR_FAIL;
+ }
+
+ if (!enabled) {
+ stlink_usb_trace_disable(h);
+ return ERROR_OK;
+ }
+
+ assert(trace_freq != NULL);
+ assert(prescaler != NULL);
+
+ if (pin_protocol != TPIU_PIN_PROTOCOL_ASYNC_UART) {
LOG_ERROR("The attached ST-LINK version doesn't support this trace mode");
return ERROR_FAIL;
}
@@ -3538,14 +3550,12 @@ static int stlink_config_trace(void *handle, bool enabled,
STLINK_V3_TRACE_MAX_HZ : STLINK_TRACE_MAX_HZ;
/* Only concern ourselves with the frequency if the STlink is processing it. */
- if (enabled && *trace_freq > max_trace_freq) {
+ if (*trace_freq > max_trace_freq) {
LOG_ERROR("ST-LINK doesn't support SWO frequency higher than %u",
max_trace_freq);
return ERROR_FAIL;
}
- stlink_usb_trace_disable(h);
-
if (!*trace_freq)
*trace_freq = max_trace_freq;
@@ -3567,8 +3577,7 @@ static int stlink_config_trace(void *handle, bool enabled,
*prescaler = presc;
- if (!enabled)
- return ERROR_OK;
+ stlink_usb_trace_disable(h);
h->trace.source_hz = *trace_freq;
diff --git a/src/target/armv7m_trace.c b/src/target/armv7m_trace.c
index 32b48a7c5..adfef2e9b 100644
--- a/src/target/armv7m_trace.c
+++ b/src/target/armv7m_trace.c
@@ -87,7 +87,7 @@ int armv7m_trace_tpiu_config(struct target *target)
{
struct armv7m_common *armv7m = target_to_armv7m(target);
struct armv7m_trace_config *trace_config = &armv7m->trace_config;
- uint16_t prescaler;
+ uint16_t prescaler = TPIU_ACPR_MAX_SWOSCALER + 1;
int retval;
target_unregister_timer_callback(armv7m_poll_trace, target);
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/stlink_usb.c | 23 ++++++++++++++++-------
src/target/armv7m_trace.c | 2 +-
2 files changed, 17 insertions(+), 8 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-03-10 21:32:53
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 47fa000193a6de7c374b4cae075ddaae3917a0e4 (commit)
from 169e5bf1862ab52c4ba28a26f15124293d2bf443 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 47fa000193a6de7c374b4cae075ddaae3917a0e4
Author: Antonio Borneo <bor...@gm...>
Date: Tue Dec 29 01:26:15 2020 +0100
drivers/rlink: switch to libusb1
Convert the driver from libusb0 to libusb1.
Change-Id: I17d14522db18b4050d462d23151ec97d3a315a7f
Signed-off-by: Antonio Borneo <bor...@gm...>
Reviewed-on: http://openocd.zylin.com/5991
Tested-by: jenkins
Reviewed-by: Marc Schink <de...@za...>
diff --git a/configure.ac b/configure.ac
index a74f319ba..b6723a396 100644
--- a/configure.ac
+++ b/configure.ac
@@ -122,11 +122,11 @@ m4_define([USB1_ADAPTERS],
[[cmsis_dap_v2], [CMSIS-DAP v2 Compliant Debugger], [CMSIS_DAP_USB]],
[[osbdm], [OSBDM (JTAG only) Programmer], [OSBDM]],
[[opendous], [eStick/opendous JTAG Programmer], [OPENDOUS]],
+ [[rlink], [Raisonance RLink JTAG Programmer], [RLINK]],
[[aice], [Andes JTAG Programmer], [AICE]]])
m4_define([USB0_ADAPTERS],
[[[usbprog], [USBProg JTAG Programmer], [USBPROG]],
- [[rlink], [Raisonance RLink JTAG Programmer], [RLINK]],
[[armjtagew], [Olimex ARM-JTAG-EW Programmer], [ARMJTAGEW]]])
m4_define([HIDAPI_ADAPTERS],
diff --git a/src/jtag/drivers/rlink.c b/src/jtag/drivers/rlink.c
index be4ad08bf..006e7c5c7 100644
--- a/src/jtag/drivers/rlink.c
+++ b/src/jtag/drivers/rlink.c
@@ -33,7 +33,7 @@
#include "rlink_st7.h"
#include "rlink_ep1_cmd.h"
#include "rlink_dtc_cmd.h"
-#include "usb_common.h"
+#include "libusb_helper.h"
/* This feature is made useless by running the DTC all the time. When automatic, the LED is on
*whenever the DTC is running. Otherwise, USB messages are sent to turn it on and off. */
@@ -96,19 +96,20 @@
#define ST7_PC_TDO ST7_PC_IO9
#define ST7_PA_DBGACK ST7_PA_IO10
-static usb_dev_handle *pHDev;
+static libusb_device_handle *pHDev;
/*
* ep1 commands are up to USB_EP1OUT_SIZE bytes in length.
* This function takes care of zeroing the unused bytes before sending the packet.
* Any reply packet is not handled by this function.
*/
-static int ep1_generic_commandl(usb_dev_handle *pHDev_param, size_t length, ...)
+static int ep1_generic_commandl(libusb_device_handle *pHDev_param, size_t length, ...)
{
uint8_t usb_buffer[USB_EP1OUT_SIZE];
uint8_t *usb_buffer_p;
va_list ap;
int usb_ret;
+ int transferred;
if (length > sizeof(usb_buffer))
length = sizeof(usb_buffer);
@@ -127,25 +128,29 @@ static int ep1_generic_commandl(usb_dev_handle *pHDev_param, size_t length, ...)
sizeof(usb_buffer) - (usb_buffer_p - usb_buffer)
);
- usb_ret = usb_bulk_write(
+ usb_ret = jtag_libusb_bulk_write(
pHDev_param,
USB_EP1OUT_ADDR,
(char *)usb_buffer, sizeof(usb_buffer),
- USB_TIMEOUT_MS
+ USB_TIMEOUT_MS,
+ &transferred
);
- return usb_ret;
+ if (usb_ret != ERROR_OK)
+ return usb_ret;
+ return transferred;
}
#if 0
static ssize_t ep1_memory_read(
- usb_dev_handle *pHDev, uint16_t addr,
+ libusb_device_handle *pHDev_param, uint16_t addr,
size_t length, uint8_t *buffer)
{
uint8_t usb_buffer[USB_EP1OUT_SIZE];
int usb_ret;
size_t remain;
ssize_t count;
+ int transferred;
usb_buffer[0] = EP1_CMD_MEMORY_READ;
memset(
@@ -167,22 +172,24 @@ static ssize_t ep1_memory_read(
usb_buffer[2] = addr;
usb_buffer[3] = length;
- usb_ret = usb_bulk_write(
- pHDev, USB_EP1OUT_ADDR,
- usb_buffer, sizeof(usb_buffer),
- USB_TIMEOUT_MS
+ usb_ret = jtag_libusb_bulk_write(
+ pHDev_param, USB_EP1OUT_ADDR,
+ (char *)usb_buffer, sizeof(usb_buffer),
+ USB_TIMEOUT_MS,
+ &transferred
);
- if (usb_ret < sizeof(usb_buffer))
+ if (usb_ret != ERROR_OK || transferred < (int)sizeof(usb_buffer))
break;
- usb_ret = usb_bulk_read(
- pHDev, USB_EP1IN_ADDR,
- buffer, length,
- USB_TIMEOUT_MS
+ usb_ret = jtag_libusb_bulk_read(
+ pHDev_param, USB_EP1IN_ADDR,
+ (char *)buffer, length,
+ USB_TIMEOUT_MS,
+ &transferred
);
- if (usb_ret < length)
+ if (usb_ret != ERROR_OK || transferred < (int)length)
break;
addr += length;
@@ -195,7 +202,7 @@ static ssize_t ep1_memory_read(
}
#endif
-static ssize_t ep1_memory_write(usb_dev_handle *pHDev_param, uint16_t addr,
+static ssize_t ep1_memory_write(libusb_device_handle *pHDev_param, uint16_t addr,
size_t length, uint8_t const *buffer)
{
uint8_t usb_buffer[USB_EP1OUT_SIZE];
@@ -228,13 +235,16 @@ static ssize_t ep1_memory_write(usb_dev_handle *pHDev_param, uint16_t addr,
sizeof(usb_buffer) - 4 - length
);
- usb_ret = usb_bulk_write(
+ int transferred;
+
+ usb_ret = jtag_libusb_bulk_write(
pHDev_param, USB_EP1OUT_ADDR,
(char *)usb_buffer, sizeof(usb_buffer),
- USB_TIMEOUT_MS
+ USB_TIMEOUT_MS,
+ &transferred
);
- if ((size_t)usb_ret < sizeof(usb_buffer))
+ if (usb_ret != ERROR_OK || transferred < (int)sizeof(usb_buffer))
break;
addr += length;
@@ -248,7 +258,7 @@ static ssize_t ep1_memory_write(usb_dev_handle *pHDev_param, uint16_t addr,
#if 0
-static ssize_t ep1_memory_writel(usb_dev_handle *pHDev, uint16_t addr,
+static ssize_t ep1_memory_writel(libusb_device_handle *pHDev_param, uint16_t addr,
size_t length, ...)
{
uint8_t buffer[USB_EP1OUT_SIZE - 4];
@@ -268,7 +278,7 @@ static ssize_t ep1_memory_writel(usb_dev_handle *pHDev, uint16_t addr,
remain--;
}
- return ep1_memory_write(pHDev, addr, length, buffer);
+ return ep1_memory_write(pHDev_param, addr, length, buffer);
}
#endif
@@ -285,7 +295,7 @@ static ssize_t ep1_memory_writel(usb_dev_handle *pHDev, uint16_t addr,
static uint8_t dtc_entry_download;
/* The buffer is specially formatted to represent a valid image to load into the DTC. */
-static int dtc_load_from_buffer(usb_dev_handle *pHDev_param, const uint8_t *buffer,
+static int dtc_load_from_buffer(libusb_device_handle *pHDev_param, const uint8_t *buffer,
size_t length)
{
struct header_s {
@@ -400,6 +410,7 @@ static int dtc_start_download(void)
{
int usb_err;
uint8_t ep2txr;
+ int transferred;
/* set up for download mode and make sure EP2 is set up to transmit */
usb_err = ep1_generic_commandl(
@@ -417,12 +428,13 @@ static int dtc_start_download(void)
return usb_err;
/* read back ep2txr */
- usb_err = usb_bulk_read(
+ usb_err = jtag_libusb_bulk_read(
pHDev, USB_EP1IN_ADDR,
(char *)&ep2txr, 1,
- USB_TIMEOUT_MS
+ USB_TIMEOUT_MS,
+ &transferred
);
- if (usb_err < 0)
+ if (usb_err != ERROR_OK)
return usb_err;
usb_err = ep1_generic_commandl(
@@ -446,17 +458,18 @@ static int dtc_start_download(void)
return usb_err;
/* wait for completion */
- usb_err = usb_bulk_read(
+ usb_err = jtag_libusb_bulk_read(
pHDev, USB_EP1IN_ADDR,
(char *)&ep2txr, 1,
- USB_TIMEOUT_MS
+ USB_TIMEOUT_MS,
+ &transferred
);
return usb_err;
}
static int dtc_run_download(
- usb_dev_handle *pHDev_param,
+ libusb_device_handle *pHDev_param,
uint8_t *command_buffer,
int command_buffer_size,
uint8_t *reply_buffer,
@@ -466,14 +479,16 @@ static int dtc_run_download(
char dtc_status;
int usb_err;
int i;
+ int transferred;
LOG_DEBUG("%d/%d", command_buffer_size, reply_buffer_size);
- usb_err = usb_bulk_write(
+ usb_err = jtag_libusb_bulk_write(
pHDev_param,
USB_EP2OUT_ADDR,
(char *)command_buffer, USB_EP2BANK_SIZE,
- USB_TIMEOUT_MS
+ USB_TIMEOUT_MS,
+ &transferred
);
if (usb_err < 0)
return usb_err;
@@ -492,11 +507,12 @@ static int dtc_run_download(
if (usb_err < 0)
return usb_err;
- usb_err = usb_bulk_read(
+ usb_err = jtag_libusb_bulk_read(
pHDev_param,
USB_EP1IN_ADDR,
&dtc_status, 1,
- USB_TIMEOUT_MS
+ USB_TIMEOUT_MS,
+ &transferred
);
if (usb_err < 0)
return usb_err;
@@ -506,20 +522,21 @@ static int dtc_run_download(
if (!--i) {
LOG_ERROR("too many retries waiting for DTC status");
- return -ETIMEDOUT;
+ return LIBUSB_ERROR_TIMEOUT;
}
}
if (reply_buffer && reply_buffer_size) {
- usb_err = usb_bulk_read(
+ usb_err = jtag_libusb_bulk_read(
pHDev_param,
USB_EP2IN_ADDR,
(char *)reply_buffer, reply_buffer_size,
- USB_TIMEOUT_MS
+ USB_TIMEOUT_MS,
+ &transferred
);
- if (usb_err < reply_buffer_size) {
+ if (usb_err != ERROR_OK || transferred < reply_buffer_size) {
LOG_ERROR("Read of endpoint 2 returned %d, expected %d",
usb_err, reply_buffer_size
);
@@ -643,7 +660,7 @@ static int dtc_queue_run(void)
reply_buffer, sizeof(reply_buffer)
);
if (usb_err < 0) {
- LOG_ERROR("dtc_run_download: %s", usb_strerror());
+ LOG_ERROR("dtc_run_download: %s", libusb_error_name(usb_err));
exit(1);
}
@@ -918,6 +935,7 @@ static void rlink_reset(int trst, int srst)
{
uint8_t bitmap;
int usb_err;
+ int transferred;
/* Read port A for bit op */
usb_err = ep1_generic_commandl(
@@ -928,17 +946,18 @@ static void rlink_reset(int trst, int srst)
1
);
if (usb_err < 0) {
- LOG_ERROR("%s", usb_strerror());
+ LOG_ERROR("%s", libusb_error_name(usb_err));
exit(1);
}
- usb_err = usb_bulk_read(
+ usb_err = jtag_libusb_bulk_read(
pHDev, USB_EP1IN_ADDR,
(char *)&bitmap, 1,
- USB_TIMEOUT_MS
+ USB_TIMEOUT_MS,
+ &transferred
);
- if (usb_err < 1) {
- LOG_ERROR("%s", usb_strerror());
+ if (usb_err != ERROR_OK || transferred < 1) {
+ LOG_ERROR("%s", libusb_error_name(usb_err));
exit(1);
}
@@ -963,17 +982,18 @@ static void rlink_reset(int trst, int srst)
1
);
if (usb_err < 0) {
- LOG_ERROR("%s", usb_strerror());
+ LOG_ERROR("%s", libusb_error_name(usb_err));
exit(1);
}
- usb_err = usb_bulk_read(
+ usb_err = jtag_libusb_bulk_read(
pHDev, USB_EP1IN_ADDR,
(char *)&bitmap, 1,
- USB_TIMEOUT_MS
+ USB_TIMEOUT_MS,
+ &transferred
);
- if (usb_err < 1) {
- LOG_ERROR("%s", usb_strerror());
+ if (usb_err != ERROR_OK || transferred < 1) {
+ LOG_ERROR("%s", libusb_error_name(usb_err));
exit(1);
}
@@ -993,17 +1013,18 @@ static void rlink_reset(int trst, int srst)
EP1_CMD_DTC_GET_CACHED_STATUS
);
if (usb_err < 0) {
- LOG_ERROR("%s", usb_strerror());
+ LOG_ERROR("%s", libusb_error_name(usb_err));
exit(1);
}
- usb_err = usb_bulk_read(
+ usb_err = jtag_libusb_bulk_read(
pHDev, USB_EP1IN_ADDR,
(char *)&bitmap, 1,
- USB_TIMEOUT_MS
+ USB_TIMEOUT_MS,
+ &transferred
);
- if (usb_err < 1) {
- LOG_ERROR("%s", usb_strerror());
+ if (usb_err != ERROR_OK || transferred < 1) {
+ LOG_ERROR("%s", libusb_error_name(usb_err));
exit(1);
}
}
@@ -1390,8 +1411,9 @@ static int rlink_speed(int speed)
exit(1);
}
- if (dtc_start_download() < 0) {
- LOG_ERROR("starting DTC: %s", usb_strerror());
+ int ret = dtc_start_download();
+ if (ret < 0) {
+ LOG_ERROR("starting DTC: %s", libusb_error_name(ret));
exit(1);
}
@@ -1443,19 +1465,28 @@ static int rlink_init(void)
{
int i, j, retries;
uint8_t reply_buffer[USB_EP1IN_SIZE];
+ int transferred;
- usb_init();
const uint16_t vids[] = { USB_IDVENDOR, 0 };
const uint16_t pids[] = { USB_IDPRODUCT, 0 };
- if (jtag_usb_open(vids, pids, &pHDev) != ERROR_OK)
+ if (jtag_libusb_open(vids, pids, NULL, &pHDev, NULL) != ERROR_OK)
return ERROR_FAIL;
- struct usb_device *dev = usb_device(pHDev);
- if (dev->descriptor.bNumConfigurations > 1) {
+ struct libusb_device_descriptor descriptor;
+ struct libusb_device *usb_dev = libusb_get_device(pHDev);
+ int r = libusb_get_device_descriptor(usb_dev, &descriptor);
+ if (r < 0) {
+ LOG_ERROR("error %d getting device descriptor", r);
+ return ERROR_FAIL;
+ }
+
+ if (descriptor.bNumConfigurations > 1) {
LOG_ERROR("Whoops! NumConfigurations is not 1, don't know what to do...");
return ERROR_FAIL;
}
- if (dev->config->bNumInterfaces > 1) {
+ struct libusb_config_descriptor *config;
+ libusb_get_config_descriptor(usb_dev, 0, &config);
+ if (config->bNumInterfaces > 1) {
LOG_ERROR("Whoops! NumInterfaces is not 1, don't know what to do...");
return ERROR_FAIL;
}
@@ -1463,29 +1494,27 @@ static int rlink_init(void)
LOG_DEBUG("Opened device, pHDev = %p", pHDev);
/* usb_set_configuration required under win32 */
- usb_set_configuration(pHDev, dev->config[0].bConfigurationValue);
+ libusb_set_configuration(pHDev, config->bConfigurationValue);
retries = 3;
do {
- i = usb_claim_interface(pHDev, 0);
- if (i) {
- LOG_ERROR("usb_claim_interface: %s", usb_strerror());
-#ifdef LIBUSB_HAS_DETACH_KERNEL_DRIVER_NP
- j = usb_detach_kernel_driver_np(pHDev, 0);
- if (j)
- LOG_ERROR("detach kernel driver: %s", usb_strerror());
-#endif
+ i = libusb_claim_interface(pHDev, 0);
+ if (i != LIBUSB_SUCCESS) {
+ LOG_ERROR("usb_claim_interface: %s", libusb_error_name(i));
+ j = libusb_detach_kernel_driver(pHDev, 0);
+ if (j != LIBUSB_SUCCESS)
+ LOG_ERROR("detach kernel driver: %s", libusb_error_name(j));
} else {
LOG_DEBUG("interface claimed!");
break;
}
} while (--retries);
- if (i) {
+ if (i != LIBUSB_SUCCESS) {
LOG_ERROR("Initialisation failed.");
return ERROR_FAIL;
}
- if (usb_set_altinterface(pHDev, 0) != 0) {
+ if (libusb_set_interface_alt_setting(pHDev, 0, 0) != LIBUSB_SUCCESS) {
LOG_ERROR("Failed to set interface.");
return ERROR_FAIL;
}
@@ -1505,20 +1534,21 @@ static int rlink_init(void)
EP1_CMD_GET_FWREV
);
if (j < USB_EP1OUT_SIZE) {
- LOG_ERROR("USB write error: %s", usb_strerror());
+ LOG_ERROR("USB write error: %s", libusb_error_name(j));
return ERROR_FAIL;
}
- j = usb_bulk_read(
+ j = jtag_libusb_bulk_read(
pHDev, USB_EP1IN_ADDR,
(char *)reply_buffer, sizeof(reply_buffer),
- 200
+ 200,
+ &transferred
);
- if (j != -ETIMEDOUT)
+ if (j != LIBUSB_ERROR_TIMEOUT)
break;
}
- if (j < (int)sizeof(reply_buffer)) {
- LOG_ERROR("USB read error: %s", usb_strerror());
+ if (j != ERROR_OK || transferred != (int)sizeof(reply_buffer)) {
+ LOG_ERROR("USB read error: %s", libusb_error_name(j));
return ERROR_FAIL;
}
LOG_DEBUG(INTERFACE_NAME " firmware version: %d.%d.%d",
@@ -1551,10 +1581,11 @@ static int rlink_init(void)
ST7_PE_ADAPTER_SENSE_OUT
);
- usb_bulk_read(
+ jtag_libusb_bulk_read(
pHDev, USB_EP1IN_ADDR,
(char *)reply_buffer, 1,
- USB_TIMEOUT_MS
+ USB_TIMEOUT_MS,
+ &transferred
);
if ((reply_buffer[0] & ST7_PE_ADAPTER_SENSE_IN) != 0)
@@ -1575,10 +1606,11 @@ static int rlink_init(void)
0x00 /* OR */
);
- usb_bulk_read(
+ jtag_libusb_bulk_read(
pHDev, USB_EP1IN_ADDR,
(char *)reply_buffer, 1,
- USB_TIMEOUT_MS
+ USB_TIMEOUT_MS,
+ &transferred
);
@@ -1654,8 +1686,8 @@ static int rlink_quit(void)
~0
);
- usb_release_interface(pHDev, 0);
- usb_close(pHDev);
+ libusb_release_interface(pHDev, 0);
+ libusb_close(pHDev);
return ERROR_OK;
}
-----------------------------------------------------------------------
Summary of changes:
configure.ac | 2 +-
src/jtag/drivers/rlink.c | 200 +++++++++++++++++++++++++++--------------------
2 files changed, 117 insertions(+), 85 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-03-10 21:32:11
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 169e5bf1862ab52c4ba28a26f15124293d2bf443 (commit)
via fa76e036b92b22e07c9e7b70fa9c4cf504170a45 (commit)
from 547fa6eeb737b349b463269c3baea726e69662b4 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 169e5bf1862ab52c4ba28a26f15124293d2bf443
Author: Adrian Negreanu <adr...@nx...>
Date: Fri Nov 20 18:53:51 2020 +0200
armv7m_trace_itm_config: wait for ITMBusy to be cleared
pg315 of CoreSight Components:
It is recommended that the ITMEn bit is cleared and waits for the
ITMBusy bit to be cleared, before changing any fields in the
Control Register, otherwise the behavior can be unpredictable.
Change-Id: Ie9a2b842825c98ee5edc9a35776320c668047769
Signed-off-by: Adrian Negreanu <adr...@nx...>
Reviewed-on: http://openocd.zylin.com/6043
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/armv7m_trace.c b/src/target/armv7m_trace.c
index 10f14221d..32b48a7c5 100644
--- a/src/target/armv7m_trace.c
+++ b/src/target/armv7m_trace.c
@@ -24,6 +24,7 @@
#include <target/cortex_m.h>
#include <target/armv7m_trace.h>
#include <jtag/interface.h>
+#include <helper/time_support.h>
#define TRACE_BUF_SIZE 4096
@@ -162,6 +163,33 @@ int armv7m_trace_itm_config(struct target *target)
if (retval != ERROR_OK)
return retval;
+ /* pg315 of CoreSight Components
+ * It is recommended that the ITMEn bit is cleared and waits for the
+ * ITMBusy bit to be cleared, before changing any fields in the
+ * Control Register, otherwise the behavior can be unpredictable.
+ */
+ uint32_t itm_tcr;
+ retval = target_read_u32(target, ITM_TCR, &itm_tcr);
+ if (retval != ERROR_OK)
+ return retval;
+ retval = target_write_u32(target,
+ ITM_TCR,
+ itm_tcr & ~ITM_TCR_ITMENA_BIT
+ );
+ if (retval != ERROR_OK)
+ return retval;
+
+ int64_t then = timeval_ms() + 1000;
+ do {
+ retval = target_read_u32(target, ITM_TCR, &itm_tcr);
+ if (retval != ERROR_OK)
+ return retval;
+ if (timeval_ms() > then) {
+ LOG_ERROR("timeout waiting for ITM_TCR_BUSY_BIT");
+ return ERROR_FAIL;
+ }
+ } while (itm_tcr & ITM_TCR_BUSY_BIT);
+
/* Enable ITM, TXENA, set TraceBusID and other parameters */
retval = target_write_u32(target, ITM_TCR, (1 << 0) | (1 << 3) |
(trace_config->itm_diff_timestamps << 1) |
diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h
index b470fbd70..1e2197b1a 100644
--- a/src/target/cortex_m.h
+++ b/src/target/cortex_m.h
@@ -35,6 +35,8 @@
#define ITM_TER0 0xE0000E00
#define ITM_TPR 0xE0000E40
#define ITM_TCR 0xE0000E80
+#define ITM_TCR_ITMENA_BIT BIT(0)
+#define ITM_TCR_BUSY_BIT BIT(23)
#define ITM_LAR 0xE0000FB0
#define ITM_LAR_KEY 0xC5ACCE55
commit fa76e036b92b22e07c9e7b70fa9c4cf504170a45
Author: Adrian Negreanu <adr...@nx...>
Date: Mon Dec 7 14:54:05 2020 +0200
cmsis_dap: remove DAP_MAX_CLOCK
Discussed here:
https://sourceforge.net/p/openocd/mailman/message/35466010/
Change-Id: Ic4d38a872f4b13b794ad0a8a2abdbe5bb21eced3
Signed-off-by: Adrian Negreanu <adr...@nx...>
Reviewed-on: http://openocd.zylin.com/5964
Tested-by: jenkins
Reviewed-by: Bohdan Tymkiv <bh...@cy...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/jtag/drivers/cmsis_dap.c b/src/jtag/drivers/cmsis_dap.c
index 16480ae1e..fd565398f 100644
--- a/src/jtag/drivers/cmsis_dap.c
+++ b/src/jtag/drivers/cmsis_dap.c
@@ -169,10 +169,6 @@ static const char * const info_caps_str[] = {
"JTAG Supported"
};
-/* max clock speed (kHz) */
-#define DAP_MAX_CLOCK 5000
-
-
struct pending_transfer_result {
uint8_t cmd;
uint32_t data;
@@ -1544,9 +1540,6 @@ static int cmsis_dap_execute_queue(void)
static int cmsis_dap_speed(int speed)
{
- if (speed > DAP_MAX_CLOCK)
- LOG_INFO("High speed (adapter speed %d) may be limited by adapter firmware.", speed);
-
if (speed == 0) {
LOG_ERROR("RTCK not supported. Set nonzero \"adapter speed\".");
return ERROR_JTAG_NOT_IMPLEMENTED;
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/cmsis_dap.c | 7 -------
src/target/armv7m_trace.c | 28 ++++++++++++++++++++++++++++
src/target/cortex_m.h | 2 ++
3 files changed, 30 insertions(+), 7 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-03-10 21:31:26
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 547fa6eeb737b349b463269c3baea726e69662b4 (commit)
from 02abae8cdf339d18b441ed152d8a8d17209341b1 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 547fa6eeb737b349b463269c3baea726e69662b4
Author: Yasushi SHOJI <ya...@sp...>
Date: Thu Jan 28 23:25:26 2021 +0900
target: Remove redundant initialization of endianness
target->endianness is initialized to TARGET_ENDIAN_UNKNOWN at 34 lines
below, before calling target_configure. This initialization is
redundant and not needed.
Change-Id: Iea2d5e17a13c1a8b0b209ba7c20043736b520ef6
Signed-off-by: Yasushi SHOJI <ya...@sp...>
Reviewed-on: http://openocd.zylin.com/6039
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/target.c b/src/target/target.c
index cab84b06b..fe519f2ab 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -5721,9 +5721,6 @@ static int target_create(Jim_GetOptInfo *goi)
memcpy(target->type, target_types[x], sizeof(struct target_type));
- /* will be set by "-endian" */
- target->endianness = TARGET_ENDIAN_UNKNOWN;
-
/* default to first core, override with -coreid */
target->coreid = 0;
-----------------------------------------------------------------------
Summary of changes:
src/target/target.c | 3 ---
1 file changed, 3 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-03-10 21:30:45
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 02abae8cdf339d18b441ed152d8a8d17209341b1 (commit)
via 5fd78b0523d81c00100e02e1aed0990624ff56c8 (commit)
via a8b88acd994f758a02a48e2f6fb372caff887e75 (commit)
from 307fe3730f1e8e48f41501b7f631e95f9dfc2a0d (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 02abae8cdf339d18b441ed152d8a8d17209341b1
Author: Marc Schink <de...@za...>
Date: Tue Jan 26 09:15:47 2021 +0100
target/mips: Remove typedef'd struct
The C style guide forbids typedef'd structs, see 'Naming Rules'.
Change-Id: I449590251056c478c05105cdc18014ab4eb77ed8
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: http://openocd.zylin.com/6033
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <li...@re...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c
index d6bd1c58a..f8643fa2d 100644
--- a/src/target/mips32_pracc.c
+++ b/src/target/mips32_pracc.c
@@ -317,7 +317,7 @@ void pracc_add(struct pracc_queue_info *ctx, uint32_t addr, uint32_t instr)
if (ctx->retval != ERROR_OK) /* On previous out of memory, return */
return;
if (ctx->code_count == ctx->max_code) {
- void *p = realloc(ctx->pracc_list, sizeof(pa_list) * (ctx->max_code + PRACC_BLOCK));
+ void *p = realloc(ctx->pracc_list, sizeof(struct pa_list) * (ctx->max_code + PRACC_BLOCK));
if (p) {
ctx->max_code += PRACC_BLOCK;
ctx->pracc_list = p;
diff --git a/src/target/mips32_pracc.h b/src/target/mips32_pracc.h
index 911a69c5b..30edaec0a 100644
--- a/src/target/mips32_pracc.h
+++ b/src/target/mips32_pracc.h
@@ -47,10 +47,10 @@
#define PRACC_BLOCK 128 /* 1 Kbyte */
-typedef struct {
+struct pa_list {
uint32_t instr;
uint32_t addr;
-} pa_list;
+};
struct pracc_queue_info {
struct mips_ejtag *ejtag_info;
@@ -59,7 +59,7 @@ struct pracc_queue_info {
int code_count;
int store_count;
int max_code; /* max instructions with currently allocated memory */
- pa_list *pracc_list; /* Code and store addresses at dmseg */
+ struct pa_list *pracc_list; /* Code and store addresses at dmseg */
};
void pracc_queue_init(struct pracc_queue_info *ctx);
diff --git a/src/target/mips64_pracc.c b/src/target/mips64_pracc.c
index 3080046f3..dbad248fc 100644
--- a/src/target/mips64_pracc.c
+++ b/src/target/mips64_pracc.c
@@ -24,7 +24,7 @@
#define STACK_DEPTH 32
-typedef struct {
+struct mips64_pracc_context {
uint64_t *local_iparam;
unsigned num_iparam;
uint64_t *local_oparam;
@@ -34,7 +34,7 @@ typedef struct {
uint64_t stack[STACK_DEPTH];
unsigned stack_offset;
struct mips_ejtag *ejtag_info;
-} mips64_pracc_context;
+};
static int wait_for_pracc_rw(struct mips_ejtag *ejtag_info, uint32_t *ctrl)
{
@@ -61,7 +61,7 @@ static int wait_for_pracc_rw(struct mips_ejtag *ejtag_info, uint32_t *ctrl)
return ERROR_OK;
}
-static int mips64_pracc_exec_read(mips64_pracc_context *ctx, uint64_t address)
+static int mips64_pracc_exec_read(struct mips64_pracc_context *ctx, uint64_t address)
{
struct mips_ejtag *ejtag_info = ctx->ejtag_info;
unsigned offset;
@@ -149,7 +149,7 @@ static int mips64_pracc_exec_read(mips64_pracc_context *ctx, uint64_t address)
return jtag_execute_queue();
}
-static int mips64_pracc_exec_write(mips64_pracc_context *ctx, uint64_t address)
+static int mips64_pracc_exec_write(struct mips64_pracc_context *ctx, uint64_t address)
{
uint32_t ejtag_ctrl;
uint64_t data;
@@ -214,7 +214,7 @@ int mips64_pracc_exec(struct mips_ejtag *ejtag_info,
{
uint32_t ejtag_ctrl;
uint64_t address = 0, address_prev = 0, data;
- mips64_pracc_context ctx;
+ struct mips64_pracc_context ctx;
int retval;
int pass = 0;
bool first_time_call = true;
diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index 4b049fb4e..d4c019fbe 100644
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -268,7 +268,7 @@ error:
int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info)
{
- pa_list pracc_list = {.instr = MIPS32_DRET(ejtag_info->isa), .addr = 0};
+ struct pa_list pracc_list = {.instr = MIPS32_DRET(ejtag_info->isa), .addr = 0};
struct pracc_queue_info ctx = {.max_code = 1, .pracc_list = &pracc_list, .code_count = 1, .store_count = 0};
/* execute our dret instruction */
commit 5fd78b0523d81c00100e02e1aed0990624ff56c8
Author: Marc Schink <de...@za...>
Date: Tue Jan 26 09:04:57 2021 +0100
flash/nand/lpc32xx: Remove typedef'd struct
The C style guide forbids typedef'd structs, see 'Naming Rules'.
Change-Id: I983dd52307136d1b5adb58d8c44c0c14422d31e2
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: http://openocd.zylin.com/6032
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/flash/nand/lpc32xx.c b/src/flash/nand/lpc32xx.c
index d516522f3..6443beb39 100644
--- a/src/flash/nand/lpc32xx.c
+++ b/src/flash/nand/lpc32xx.c
@@ -60,14 +60,14 @@ static const int lp_ooblayout[] = {
58, 59, 60, 61, 62, 63
};
-typedef struct {
+struct dmac_ll {
volatile uint32_t dma_src;
volatile uint32_t dma_dest;
volatile uint32_t next_lli;
volatile uint32_t next_ctrl;
-} dmac_ll_t;
+};
-static dmac_ll_t dmalist[(2048/256) * 2 + 1];
+static struct dmac_ll dmalist[(2048/256) * 2 + 1];
/* nand device lpc32xx <target#> <oscillator_frequency>
*/
@@ -867,14 +867,14 @@ static int lpc32xx_make_dma_list(uint32_t target_mem_base, uint32_t page_size,
dmalist[i*2].dma_src = (do_read ? dmasrc : (dmasrc + i * 256));
dmalist[i*2].dma_dest = (do_read ? (dmadst + i * 256) : dmadst);
dmalist[i*2].next_lli =
- target_mem_base + (i*2 + 1) * sizeof(dmac_ll_t);
+ target_mem_base + (i*2 + 1) * sizeof(struct dmac_ll);
dmalist[i*2].next_ctrl = ctrl;
dmalist[(i*2) + 1].dma_src = 0x20020034;/* SLC_ECC */
dmalist[(i*2) + 1].dma_dest =
target_mem_base + ECC_OFFS + i * 4;
dmalist[(i*2) + 1].next_lli =
- target_mem_base + (i*2 + 2) * sizeof(dmac_ll_t);
+ target_mem_base + (i*2 + 2) * sizeof(struct dmac_ll);
dmalist[(i*2) + 1].next_ctrl = ecc_ctrl;
}
@@ -1063,7 +1063,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
XXX: Assumes host and target have same byte sex.
*/
retval = target_write_memory(target, target_mem_base, 4,
- nll * sizeof(dmac_ll_t) / 4,
+ nll * sizeof(struct dmac_ll) / 4,
(uint8_t *)dmalist);
if (ERROR_OK != retval) {
LOG_ERROR("Could not write DMA descriptors to IRAM");
@@ -1104,7 +1104,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
/* Write first descriptor to DMA controller */
retval = target_write_memory(target, 0x31000100, 4,
- sizeof(dmac_ll_t) / 4,
+ sizeof(struct dmac_ll) / 4,
(uint8_t *)dmalist);
if (ERROR_OK != retval) {
LOG_ERROR("Could not write DMA descriptor to DMAC");
@@ -1161,7 +1161,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
/* Write OOB descriptor to DMA controller */
retval = target_write_memory(target, 0x31000100, 4,
- sizeof(dmac_ll_t) / 4,
+ sizeof(struct dmac_ll) / 4,
(uint8_t *)(&dmalist[nll-1]));
if (ERROR_OK != retval) {
LOG_ERROR("Could not write OOB DMA descriptor to DMAC");
@@ -1460,7 +1460,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand,
XXX: Assumes host and target have same byte sex.
*/
retval = target_write_memory(target, target_mem_base, 4,
- nll * sizeof(dmac_ll_t) / 4,
+ nll * sizeof(struct dmac_ll) / 4,
(uint8_t *)dmalist);
if (ERROR_OK != retval) {
LOG_ERROR("Could not write DMA descriptors to IRAM");
@@ -1489,7 +1489,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand,
/* Write first descriptor to DMA controller */
retval = target_write_memory(target, 0x31000100, 4,
- sizeof(dmac_ll_t) / 4, (uint8_t *)dmalist);
+ sizeof(struct dmac_ll) / 4, (uint8_t *)dmalist);
if (ERROR_OK != retval) {
LOG_ERROR("Could not write DMA descriptor to DMAC");
return retval;
commit a8b88acd994f758a02a48e2f6fb372caff887e75
Author: Marc Schink <de...@za...>
Date: Mon Jan 25 11:28:59 2021 +0100
rtos: Remove typedef'd struct
The C style guide forbids typedef'd structs, see 'Naming Rules'.
Change-Id: Ia7c8218fb61ff0c74b6dd0d10fb51a77cf059c14
Signed-off-by: Marc Schink <de...@za...>
Reviewed-on: http://openocd.zylin.com/6028
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <and...@gm...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/rtos/FreeRTOS.c b/src/rtos/FreeRTOS.c
index ee9b48bb9..4d520b9b4 100644
--- a/src/rtos/FreeRTOS.c
+++ b/src/rtos/FreeRTOS.c
@@ -109,7 +109,7 @@ static int FreeRTOS_create(struct target *target);
static int FreeRTOS_update_threads(struct rtos *rtos);
static int FreeRTOS_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
struct rtos_reg **reg_list, int *num_regs);
-static int FreeRTOS_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[]);
+static int FreeRTOS_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]);
struct rtos_type FreeRTOS_rtos = {
.name = "FreeRTOS",
@@ -474,11 +474,11 @@ static int FreeRTOS_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
return rtos_generic_stack_read(rtos->target, param->stacking_info_cm3, stack_ptr, reg_list, num_regs);
}
-static int FreeRTOS_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[])
+static int FreeRTOS_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[])
{
unsigned int i;
*symbol_list = calloc(
- ARRAY_SIZE(FreeRTOS_symbol_list), sizeof(symbol_table_elem_t));
+ ARRAY_SIZE(FreeRTOS_symbol_list), sizeof(struct symbol_table_elem));
for (i = 0; i < ARRAY_SIZE(FreeRTOS_symbol_list); i++) {
(*symbol_list)[i].symbol_name = FreeRTOS_symbol_list[i].name;
diff --git a/src/rtos/ThreadX.c b/src/rtos/ThreadX.c
index 7d58725c4..0b3fef07e 100644
--- a/src/rtos/ThreadX.c
+++ b/src/rtos/ThreadX.c
@@ -39,7 +39,7 @@ static bool ThreadX_detect_rtos(struct target *target);
static int ThreadX_create(struct target *target);
static int ThreadX_update_threads(struct rtos *rtos);
static int ThreadX_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, struct rtos_reg **reg_list, int *num_regs);
-static int ThreadX_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[]);
+static int ThreadX_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]);
@@ -479,11 +479,11 @@ static int ThreadX_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
return rtos_generic_stack_read(rtos->target, stacking_info, stack_ptr, reg_list, num_regs);
}
-static int ThreadX_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[])
+static int ThreadX_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[])
{
unsigned int i;
*symbol_list = calloc(
- ARRAY_SIZE(ThreadX_symbol_list), sizeof(symbol_table_elem_t));
+ ARRAY_SIZE(ThreadX_symbol_list), sizeof(struct symbol_table_elem));
for (i = 0; i < ARRAY_SIZE(ThreadX_symbol_list); i++)
(*symbol_list)[i].symbol_name = ThreadX_symbol_list[i];
diff --git a/src/rtos/chibios.c b/src/rtos/chibios.c
index a56d3ce05..29abede80 100644
--- a/src/rtos/chibios.c
+++ b/src/rtos/chibios.c
@@ -107,7 +107,7 @@ static int chibios_create(struct target *target);
static int chibios_update_threads(struct rtos *rtos);
static int chibios_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
struct rtos_reg **reg_list, int *num_regs);
-static int chibios_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[]);
+static int chibios_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]);
struct rtos_type chibios_rtos = {
.name = "chibios",
@@ -131,7 +131,7 @@ enum chibios_symbol_values {
CHIBIOS_VAL_CH_DEBUG = 2
};
-static symbol_table_elem_t chibios_symbol_list[] = {
+static struct symbol_table_elem chibios_symbol_list[] = {
{ "rlist", 0, true}, /* Thread ready list */
{ "ch", 0, true}, /* System data structure */
{ "ch_debug", 0, false}, /* Memory Signature containing offsets of fields in rlist */
@@ -497,7 +497,7 @@ static int chibios_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
return rtos_generic_stack_read(rtos->target, param->stacking_info, stack_ptr, reg_list, num_regs);
}
-static int chibios_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[])
+static int chibios_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[])
{
*symbol_list = malloc(sizeof(chibios_symbol_list));
diff --git a/src/rtos/chromium-ec.c b/src/rtos/chromium-ec.c
index ae12a3bf5..1476f1969 100644
--- a/src/rtos/chromium-ec.c
+++ b/src/rtos/chromium-ec.c
@@ -360,12 +360,12 @@ static int chromium_ec_get_thread_reg_list(struct rtos *rtos,
stack_ptr, reg_list, num_regs);
}
-static int chromium_ec_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[])
+static int chromium_ec_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[])
{
size_t s;
*symbol_list = calloc(ARRAY_SIZE(chromium_ec_symbol_list),
- sizeof(symbol_table_elem_t));
+ sizeof(struct symbol_table_elem));
if (!(*symbol_list)) {
LOG_ERROR("Chromium-EC: out of memory");
return ERROR_FAIL;
diff --git a/src/rtos/eCos.c b/src/rtos/eCos.c
index e6b70730b..9501a5522 100644
--- a/src/rtos/eCos.c
+++ b/src/rtos/eCos.c
@@ -31,7 +31,7 @@ static bool eCos_detect_rtos(struct target *target);
static int eCos_create(struct target *target);
static int eCos_update_threads(struct rtos *rtos);
static int eCos_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, struct rtos_reg **reg_list, int *num_regs);
-static int eCos_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[]);
+static int eCos_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]);
struct eCos_thread_state {
int value;
@@ -351,11 +351,11 @@ static int eCos_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
return -1;
}
-static int eCos_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[])
+static int eCos_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[])
{
unsigned int i;
*symbol_list = calloc(
- ARRAY_SIZE(eCos_symbol_list), sizeof(symbol_table_elem_t));
+ ARRAY_SIZE(eCos_symbol_list), sizeof(struct symbol_table_elem));
for (i = 0; i < ARRAY_SIZE(eCos_symbol_list); i++)
(*symbol_list)[i].symbol_name = eCos_symbol_list[i];
diff --git a/src/rtos/embKernel.c b/src/rtos/embKernel.c
index 2f04963b4..994cbc091 100644
--- a/src/rtos/embKernel.c
+++ b/src/rtos/embKernel.c
@@ -36,7 +36,7 @@ static int embKernel_create(struct target *target);
static int embKernel_update_threads(struct rtos *rtos);
static int embKernel_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
struct rtos_reg **reg_list, int *num_regs);
-static int embKernel_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[]);
+static int embKernel_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]);
struct rtos_type embKernel_rtos = {
.name = "embKernel",
@@ -330,10 +330,10 @@ static int embKernel_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
return rtos_generic_stack_read(rtos->target, param->stacking_info, stack_ptr, reg_list, num_regs);
}
-static int embKernel_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[])
+static int embKernel_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[])
{
unsigned int i;
- *symbol_list = calloc(ARRAY_SIZE(embKernel_symbol_list), sizeof(symbol_table_elem_t));
+ *symbol_list = calloc(ARRAY_SIZE(embKernel_symbol_list), sizeof(struct symbol_table_elem));
for (i = 0; i < ARRAY_SIZE(embKernel_symbol_list); i++)
(*symbol_list)[i].symbol_name = embKernel_symbol_list[i];
diff --git a/src/rtos/hwthread.c b/src/rtos/hwthread.c
index e2d1ccf13..ce2408635 100644
--- a/src/rtos/hwthread.c
+++ b/src/rtos/hwthread.c
@@ -35,7 +35,7 @@ static int hwthread_get_thread_reg(struct rtos *rtos, int64_t thread_id,
uint32_t reg_num, struct rtos_reg *rtos_reg);
static int hwthread_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
struct rtos_reg **reg_list, int *num_regs);
-static int hwthread_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[]);
+static int hwthread_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]);
static int hwthread_smp_init(struct target *target);
static int hwthread_set_reg(struct rtos *rtos, uint32_t reg_num, uint8_t *reg_value);
@@ -328,10 +328,10 @@ static int hwthread_set_reg(struct rtos *rtos, uint32_t reg_num, uint8_t *reg_va
return reg->type->set(reg, reg_value);
}
-static int hwthread_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[])
+static int hwthread_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[])
{
/* return an empty list, we don't have any symbols to look up */
- *symbol_list = calloc(1, sizeof(symbol_table_elem_t));
+ *symbol_list = calloc(1, sizeof(struct symbol_table_elem));
(*symbol_list)[0].symbol_name = NULL;
return 0;
}
diff --git a/src/rtos/linux.c b/src/rtos/linux.c
index 0cb4b54c8..4b96a931d 100644
--- a/src/rtos/linux.c
+++ b/src/rtos/linux.c
@@ -246,11 +246,11 @@ static const char * const linux_symbol_list[] = {
NULL
};
-static int linux_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[])
+static int linux_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[])
{
unsigned int i;
- *symbol_list = (symbol_table_elem_t *)
- calloc(ARRAY_SIZE(linux_symbol_list), sizeof(symbol_table_elem_t));
+ *symbol_list = (struct symbol_table_elem *)
+ calloc(ARRAY_SIZE(linux_symbol_list), sizeof(struct symbol_table_elem));
for (i = 0; i < ARRAY_SIZE(linux_symbol_list); i++)
(*symbol_list)[i].symbol_name = linux_symbol_list[i];
diff --git a/src/rtos/mqx.c b/src/rtos/mqx.c
index f45c15d23..0914e3104 100644
--- a/src/rtos/mqx.c
+++ b/src/rtos/mqx.c
@@ -540,9 +540,9 @@ static int mqx_get_thread_reg_list(
}
/* API function, export list of required symbols */
-static int mqx_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[])
+static int mqx_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[])
{
- *symbol_list = calloc(ARRAY_SIZE(mqx_symbol_list), sizeof(symbol_table_elem_t));
+ *symbol_list = calloc(ARRAY_SIZE(mqx_symbol_list), sizeof(struct symbol_table_elem));
if (NULL == *symbol_list)
return ERROR_FAIL;
/* export required symbols */
diff --git a/src/rtos/nuttx.c b/src/rtos/nuttx.c
index 19b93bad1..6569e38f2 100644
--- a/src/rtos/nuttx.c
+++ b/src/rtos/nuttx.c
@@ -380,12 +380,12 @@ static int nuttx_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
(uint32_t)thread_id + xcpreg_offset, reg_list, num_regs);
}
-static int nuttx_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[])
+static int nuttx_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[])
{
unsigned int i;
- *symbol_list = (symbol_table_elem_t *) calloc(1,
- sizeof(symbol_table_elem_t) * ARRAY_SIZE(nuttx_symbol_list));
+ *symbol_list = (struct symbol_table_elem *) calloc(1,
+ sizeof(struct symbol_table_elem) * ARRAY_SIZE(nuttx_symbol_list));
for (i = 0; i < ARRAY_SIZE(nuttx_symbol_list); i++)
(*symbol_list)[i].symbol_name = nuttx_symbol_list[i];
diff --git a/src/rtos/riot.c b/src/rtos/riot.c
index 15cbb0f85..dcba8381c 100644
--- a/src/rtos/riot.c
+++ b/src/rtos/riot.c
@@ -35,7 +35,7 @@ static int riot_create(struct target *target);
static int riot_update_threads(struct rtos *rtos);
static int riot_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
struct rtos_reg **reg_list, int *num_regs);
-static int riot_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[]);
+static int riot_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[]);
struct riot_thread_state {
int value;
@@ -360,9 +360,9 @@ static int riot_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
num_regs);
}
-static int riot_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[])
+static int riot_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[])
{
- *symbol_list = calloc(ARRAY_SIZE(riot_symbol_list), sizeof(symbol_table_elem_t));
+ *symbol_list = calloc(ARRAY_SIZE(riot_symbol_list), sizeof(struct symbol_table_elem));
if (*symbol_list == NULL) {
LOG_ERROR("RIOT: out of memory");
diff --git a/src/rtos/rtos.c b/src/rtos/rtos.c
index d9ba735f2..91d9379f3 100644
--- a/src/rtos/rtos.c
+++ b/src/rtos/rtos.c
@@ -176,9 +176,9 @@ int gdb_thread_packet(struct connection *connection, char const *packet, int pac
return target->rtos->gdb_thread_packet(connection, packet, packet_size);
}
-static symbol_table_elem_t *next_symbol(struct rtos *os, char *cur_symbol, uint64_t cur_addr)
+static struct symbol_table_elem *next_symbol(struct rtos *os, char *cur_symbol, uint64_t cur_addr)
{
- symbol_table_elem_t *s;
+ struct symbol_table_elem *s;
if (!os->symbols)
os->type->get_symbol_list_to_lookup(&os->symbols);
@@ -200,7 +200,7 @@ static symbol_table_elem_t *next_symbol(struct rtos *os, char *cur_symbol, uint6
* if 'symbol' is not declared optional */
static bool is_symbol_mandatory(const struct rtos *os, const char *symbol)
{
- for (symbol_table_elem_t *s = os->symbols; s->symbol_name; ++s) {
+ for (struct symbol_table_elem *s = os->symbols; s->symbol_name; ++s) {
if (!strcmp(s->symbol_name, symbol))
return !s->optional;
}
@@ -232,7 +232,7 @@ int rtos_qsymbol(struct connection *connection, char const *packet, int packet_s
uint64_t addr = 0;
size_t reply_len;
char reply[GDB_BUFFER_SIZE + 1], cur_sym[GDB_BUFFER_SIZE / 2 + 1] = ""; /* Extra byte for null-termination */
- symbol_table_elem_t *next_sym = NULL;
+ struct symbol_table_elem *next_sym = NULL;
struct target *target = get_target_from_connection(connection);
struct rtos *os = target->rtos;
diff --git a/src/rtos/rtos.h b/src/rtos/rtos.h
index b437be0dd..b3fd01fca 100644
--- a/src/rtos/rtos.h
+++ b/src/rtos/rtos.h
@@ -31,11 +31,11 @@ struct reg;
/**
* Table should be terminated by an element with NULL in symbol_name
*/
-typedef struct symbol_table_elem_struct {
+struct symbol_table_elem {
const char *symbol_name;
symbol_address_t address;
bool optional;
-} symbol_table_elem_t;
+};
struct thread_detail {
threadid_t threadid;
@@ -47,7 +47,7 @@ struct thread_detail {
struct rtos {
const struct rtos_type *type;
- symbol_table_elem_t *symbols;
+ struct symbol_table_elem *symbols;
struct target *target;
/* add a context variable instead of global variable */
/* The thread currently selected by gdb. */
@@ -78,7 +78,7 @@ struct rtos_type {
struct rtos_reg **reg_list, int *num_regs);
int (*get_thread_reg)(struct rtos *rtos, int64_t thread_id,
uint32_t reg_num, struct rtos_reg *reg);
- int (*get_symbol_list_to_lookup)(symbol_table_elem_t *symbol_list[]);
+ int (*get_symbol_list_to_lookup)(struct symbol_table_elem *symbol_list[]);
int (*clean)(struct target *target);
char * (*ps_command)(struct target *target);
int (*set_reg)(struct rtos *rtos, uint32_t reg_num, uint8_t *reg_value);
diff --git a/src/rtos/uCOS-III.c b/src/rtos/uCOS-III.c
index 304d07c59..d62a2199b 100644
--- a/src/rtos/uCOS-III.c
+++ b/src/rtos/uCOS-III.c
@@ -508,9 +508,9 @@ static int uCOS_III_get_thread_reg_list(struct rtos *rtos, threadid_t threadid,
num_regs);
}
-static int uCOS_III_get_symbol_list_to_lookup(symbol_table_elem_t *symbol_list[])
+static int uCOS_III_get_symbol_list_to_lookup(struct symbol_table_elem *symbol_list[])
{
- *symbol_list = calloc(ARRAY_SIZE(uCOS_III_symbol_list), sizeof(symbol_table_elem_t));
+ *symbol_list = calloc(ARRAY_SIZE(uCOS_III_symbol_list), sizeof(struct symbol_table_elem));
if (*symbol_list == NULL) {
LOG_ERROR("uCOS-III: out of memory");
return ERROR_FAIL;
-----------------------------------------------------------------------
Summary of changes:
src/flash/nand/lpc32xx.c | 20 ++++++++++----------
src/rtos/FreeRTOS.c | 6 +++---
src/rtos/ThreadX.c | 6 +++---
src/rtos/chibios.c | 6 +++---
src/rtos/chromium-ec.c | 4 ++--
src/rtos/eCos.c | 6 +++---
src/rtos/embKernel.c | 6 +++---
src/rtos/hwthread.c | 6 +++---
src/rtos/linux.c | 6 +++---
src/rtos/mqx.c | 4 ++--
src/rtos/nuttx.c | 6 +++---
src/rtos/riot.c | 6 +++---
src/rtos/rtos.c | 8 ++++----
src/rtos/rtos.h | 8 ++++----
src/rtos/uCOS-III.c | 4 ++--
src/target/mips32_pracc.c | 2 +-
src/target/mips32_pracc.h | 6 +++---
src/target/mips64_pracc.c | 10 +++++-----
src/target/mips_ejtag.c | 2 +-
19 files changed, 61 insertions(+), 61 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-03-10 21:29:58
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 307fe3730f1e8e48f41501b7f631e95f9dfc2a0d (commit)
via 4c0c6ebf02bbeeb7f6c6811a512f68b0594277c0 (commit)
from 75d512bb973c1397a1f100626d44835274b216ea (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 307fe3730f1e8e48f41501b7f631e95f9dfc2a0d
Author: Jiri Kastner <cz1...@gm...>
Date: Fri Jan 1 23:27:11 2021 +0100
tcl/target: add Rockchip RK3399 target
Change-Id: I28f404b1e53fc9dbb04b3f939294ae248bbde183
Signed-off-by: Jiri Kastner <cz1...@gm...>
Reviewed-on: http://openocd.zylin.com/5994
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/target/rk3399.cfg b/tcl/target/rk3399.cfg
new file mode 100644
index 000000000..1e90414fd
--- /dev/null
+++ b/tcl/target/rk3399.cfg
@@ -0,0 +1,79 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Rockchip RK3399 Target
+# https://rockchip.fr/RK3399%20datasheet%20V1.8.pdf
+# https://rockchip.fr/Rockchip%20RK3399%20TRM%20V1.4%20Part1.pdf
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME rk3399
+}
+
+#
+# Main DAP
+#
+if { [info exists DAP_TAPID] } {
+ set _DAP_TAPID $DAP_TAPID
+} else {
+ set _DAP_TAPID 0x5ba02477
+}
+
+adapter speed 12000
+
+transport select swd
+
+# declare the one SWD tap to access the DAP
+swd newdap $_CHIPNAME cpu -expected-id $_DAP_TAPID -ignore-version
+
+# create the DAP
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+target create $_CHIPNAME.ahb mem_ap -dap $_CHIPNAME.dap -ap-num 0
+set _TARGETNAME $_CHIPNAME.lcore
+# declare the 6 main application cores
+set _smp_command ""
+
+set $_TARGETNAME.base(0) 0x80030000
+set $_TARGETNAME.base(1) 0x80032000
+set $_TARGETNAME.base(2) 0x80034000
+set $_TARGETNAME.base(3) 0x80036000
+set $_TARGETNAME.cti(0) 0x80038000
+set $_TARGETNAME.cti(1) 0x80039000
+set $_TARGETNAME.cti(2) 0x8003a000
+set $_TARGETNAME.cti(3) 0x8003b000
+
+
+set _TARGETNAME $_CHIPNAME.bcore
+set $_TARGETNAME.base(4) 0x80210000
+set $_TARGETNAME.base(5) 0x80310000
+set $_TARGETNAME.cti(4) 0x80220000
+set $_TARGETNAME.cti(5) 0x80320000
+
+set _cores 6
+for { set _core 0 } { $_core < $_cores } { incr _core 1 } {
+ if {$_core < 4} {
+ set _TARGETNAME $_CHIPNAME.lcore
+ } else {
+ set _TARGETNAME $_CHIPNAME.bcore
+ }
+
+
+ cti create cti$_core -dap $_CHIPNAME.dap -baseaddr [set $_TARGETNAME.cti($_core)] -ap-num 1
+
+ target create ${_TARGETNAME}$_core aarch64 \
+ -dap $_CHIPNAME.dap -coreid $_core -cti cti$_core \
+ -dbgbase [set $_TARGETNAME.base($_core)]
+
+ if { $_core != 0 } {
+ ${_TARGETNAME}$_core configure -defer-examine
+ } else {
+ # uncomment to use hardware threads pseudo rtos
+ # ${_TARGETNAME}$_core configure -rtos hwthread"
+ ${_TARGETNAME}$_core configure -work-area-size 0x30000 -work-area-phys 0xff8c0000 \
+ -work-area-backup 0
+ }
+ set _smp_command "$_smp_command ${_TARGETNAME}$_core"
+}
+
+target smp $_smp_command
+
+targets rk3399.lcore0
commit 4c0c6ebf02bbeeb7f6c6811a512f68b0594277c0
Author: Tarek BOCHKATI <tar...@gm...>
Date: Tue Jan 12 23:58:53 2021 +0100
stlink: support of ST-LINK TCP server using stlink-dap and hla
Quote: The ST-LINK TCP server is an application to share the debug
interface of a single ST-LINK board among several host applications,
typically a debugging tool and a monitoring tool.
Note: ST-Link TCP server does not support the SWIM transport.
ST-LINK TCP server allows several applications to connect to the same
ST-Link through sockets (TCP).
To use ST-LINK TCP server:
- using stlink-dap : use 'st-link backend tcp [port]'
- using hla : use 'hla_stlink_backend tcp [port]'
the default port value is 7184
Change-Id: I9b79f65267f04b1e978709934892160e65bd2d6d
Signed-off-by: Tarek BOCHKATI <tar...@gm...>
Reviewed-on: http://openocd.zylin.com/5633
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/doc/openocd.texi b/doc/openocd.texi
index a5b94362f..34f1bb653 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -3126,6 +3126,15 @@ Specifies the adapter layout to use.
Pairs of vendor IDs and product IDs of the device.
@end deffn
+@deffn {Config Command} {hla_stlink_backend} (usb | tcp [port])
+@emph{ST-Link only:} Choose between 'exclusive' USB communication (the default backend) or
+'shared' mode using ST-Link TCP server (the default port is 7184).
+
+@emph{Note:} ST-Link TCP server is a binary application provided by ST
+available from @url{https://www.st.com/en/development-tools/st-link-server.html,
+ST-LINK server software module}.
+@end deffn
+
@deffn {Command} {hla_command} command
Execute a custom adapter-specific command. The @var{command} string is
passed as is to the underlying adapter layout handler.
@@ -3146,6 +3155,17 @@ An error is returned for any AP number above the maximum allowed value.
@emph{Note:} Either these same adapters and their older versions are
also supported by @ref{hla_interface, the hla interface driver}.
+@deffn {Config Command} {st-link backend} (usb | tcp [port])
+Choose between 'exclusive' USB communication (the default backend) or
+'shared' mode using ST-Link TCP server (the default port is 7184).
+
+@emph{Note:} ST-Link TCP server is a binary application provided by ST
+available from @url{https://www.st.com/en/development-tools/st-link-server.html,
+ST-LINK server software module}.
+
+@emph{Note:} ST-Link TCP server does not support the SWIM transport.
+@end deffn
+
@deffn {Config Command} {st-link serial} serial
Specifies the serial number of the adapter.
@end deffn
diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c
index 6224070cb..813af5578 100644
--- a/src/jtag/drivers/stlink_usb.c
+++ b/src/jtag/drivers/stlink_usb.c
@@ -45,6 +45,16 @@
#include <target/cortex_m.h>
+#include <helper/system.h>
+
+#ifdef HAVE_ARPA_INET_H
+#include <arpa/inet.h>
+#endif
+
+#ifdef HAVE_NETINET_TCP_H
+#include <netinet/tcp.h>
+#endif
+
#include "libusb_helper.h"
#ifdef HAVE_LIBUSB1
@@ -129,6 +139,21 @@ struct stlink_usb_priv_s {
struct libusb_transfer *trans;
};
+struct stlink_tcp_priv_s {
+ /** */
+ int fd;
+ /** */
+ bool connected;
+ /** */
+ uint32_t device_id;
+ /** */
+ uint32_t connect_id;
+ /** */
+ uint8_t *send_buf;
+ /** */
+ uint8_t *recv_buf;
+};
+
struct stlink_backend_s {
/** */
int (*open)(void *handle, struct hl_interface_param_s *param);
@@ -147,6 +172,7 @@ struct stlink_usb_handle_s {
/** */
union {
struct stlink_usb_priv_s usb_backend_priv;
+ struct stlink_tcp_priv_s tcp_backend_priv;
};
/** */
uint8_t rx_ep;
@@ -155,13 +181,13 @@ struct stlink_usb_handle_s {
/** */
uint8_t trace_ep;
/** */
- uint8_t cmdbuf[STLINK_SG_SIZE];
+ uint8_t *cmdbuf;
/** */
uint8_t cmdidx;
/** */
uint8_t direction;
/** */
- uint8_t databuf[STLINK_DATA_SIZE];
+ uint8_t *databuf;
/** */
uint32_t max_mem_packet;
/** */
@@ -349,6 +375,39 @@ static inline int stlink_usb_xfer_noerrcheck(void *handle, const uint8_t *buf, i
#define REQUEST_SENSE 0x03
#define REQUEST_SENSE_LENGTH 18
+/* STLINK TCP commands */
+#define STLINK_TCP_CMD_REFRESH_DEVICE_LIST 0x00
+#define STLINK_TCP_CMD_GET_NB_DEV 0x01
+#define STLINK_TCP_CMD_GET_DEV_INFO 0x02
+#define STLINK_TCP_CMD_OPEN_DEV 0x03
+#define STLINK_TCP_CMD_CLOSE_DEV 0x04
+#define STLINK_TCP_CMD_SEND_USB_CMD 0x05
+#define STLINK_TCP_CMD_GET_SERVER_VERSION 0x06
+#define STLINK_TCP_CMD_GET_NB_OF_DEV_CLIENTS 0x07
+
+/* STLINK TCP constants */
+#define OPENOCD_STLINK_TCP_API_VERSION 1
+#define STLINK_TCP_REQUEST_WRITE 0
+#define STLINK_TCP_REQUEST_READ 1
+#define STLINK_TCP_REQUEST_READ_SWO 3
+#define STLINK_TCP_SS_SIZE 4
+#define STLINK_TCP_USB_CMD_SIZE 32
+#define STLINK_TCP_SERIAL_SIZE 32
+#define STLINK_TCP_SEND_BUFFER_SIZE 10240
+#define STLINK_TCP_RECV_BUFFER_SIZE 10240
+
+/* STLINK TCP command status */
+#define STLINK_TCP_SS_OK 0x00000001
+#define STLINK_TCP_SS_MEMORY_PROBLEM 0x00001000
+#define STLINK_TCP_SS_TIMEOUT 0x00001001
+#define STLINK_TCP_SS_BAD_PARAMETER 0x00001002
+#define STLINK_TCP_SS_OPEN_ERR 0x00001003
+#define STLINK_TCP_SS_TRUNCATED_DATA 0x00001052
+#define STLINK_TCP_SS_CMD_NOT_AVAILABLE 0x00001053
+#define STLINK_TCP_SS_TCP_ERROR 0x00002001
+#define STLINK_TCP_SS_TCP_CANT_CONNECT 0x00002002
+#define STLINK_TCP_SS_WIN32_ERROR 0x00010000
+
/*
* Map the relevant features, quirks and workaround for specific firmware
* version of stlink
@@ -763,6 +822,117 @@ static int stlink_usb_usb_xfer_noerrcheck(void *handle, const uint8_t *buf, int
return ERROR_OK;
}
+
+static int stlink_tcp_send_cmd(void *handle, int send_size, int recv_size, bool check_tcp_status)
+{
+ struct stlink_usb_handle_s *h = handle;
+
+ assert(handle != NULL);
+
+ /* send the TCP command */
+ int sent_size = send(h->tcp_backend_priv.fd, (void *)h->tcp_backend_priv.send_buf, send_size, 0);
+ if (sent_size != send_size) {
+ LOG_ERROR("failed to send USB CMD");
+ if (sent_size == -1)
+ LOG_DEBUG("socket send error: %s (errno %d)", strerror(errno), errno);
+ else
+ LOG_DEBUG("sent size %d (expected %d)", sent_size, send_size);
+ return ERROR_FAIL;
+ }
+
+ keep_alive();
+
+ /* read the TCP response */
+ int received_size = recv(h->tcp_backend_priv.fd, (void *)h->tcp_backend_priv.recv_buf, recv_size, 0);
+ if (received_size != recv_size) {
+ LOG_ERROR("failed to receive USB CMD response");
+ if (received_size == -1)
+ LOG_DEBUG("socket recv error: %s (errno %d)", strerror(errno), errno);
+ else
+ LOG_DEBUG("received size %d (expected %d)", received_size, recv_size);
+ return ERROR_FAIL;
+ }
+
+ if (check_tcp_status) {
+ uint32_t tcp_ss = le_to_h_u32(h->tcp_backend_priv.recv_buf);
+ if (tcp_ss != STLINK_TCP_SS_OK) {
+ LOG_ERROR("TCP error status 0x%X", tcp_ss);
+ return ERROR_FAIL;
+ }
+ }
+
+ return ERROR_OK;
+}
+
+/** */
+static int stlink_tcp_xfer_noerrcheck(void *handle, const uint8_t *buf, int size)
+{
+ struct stlink_usb_handle_s *h = handle;
+
+ int send_size = STLINK_TCP_USB_CMD_SIZE;
+ int recv_size = STLINK_TCP_SS_SIZE;
+
+ assert(handle != NULL);
+
+ /* prepare the TCP command */
+ h->tcp_backend_priv.send_buf[0] = STLINK_TCP_CMD_SEND_USB_CMD;
+ memset(&h->tcp_backend_priv.send_buf[1], 0, 3); /* reserved for alignment and future use, must be zero */
+ h_u32_to_le(&h->tcp_backend_priv.send_buf[4], h->tcp_backend_priv.connect_id);
+ /* tcp_backend_priv.send_buf[8..23] already contains the constructed stlink command */
+ h->tcp_backend_priv.send_buf[24] = h->direction;
+ memset(&h->tcp_backend_priv.send_buf[25], 0, 3); /* reserved for alignment and future use, must be zero */
+
+ h_u32_to_le(&h->tcp_backend_priv.send_buf[28], size);
+
+ /*
+ * if the xfer is a write request (tx_ep)
+ * > then buf content will be copied
+ * into &cmdbuf[32].
+ * else : the xfer is a read or trace read request (rx_ep or trace_ep)
+ * > the buf content will be filled from &databuf[4].
+ *
+ * note : if h->direction is trace_ep, h->cmdbuf is zeros.
+ */
+
+ if (h->direction == h->tx_ep) { /* STLINK_TCP_REQUEST_WRITE */
+ send_size += size;
+ if (send_size > STLINK_TCP_SEND_BUFFER_SIZE) {
+ LOG_ERROR("STLINK_TCP command buffer overflow");
+ return ERROR_FAIL;
+ }
+ memcpy(&h->tcp_backend_priv.send_buf[32], buf, size);
+ } else { /* STLINK_TCP_REQUEST_READ or STLINK_TCP_REQUEST_READ_SWO */
+ recv_size += size;
+ if (recv_size > STLINK_TCP_RECV_BUFFER_SIZE) {
+ LOG_ERROR("STLINK_TCP data buffer overflow");
+ return ERROR_FAIL;
+ }
+ }
+
+ int ret = stlink_tcp_send_cmd(h, send_size, recv_size, true);
+ if (ret != ERROR_OK)
+ return ret;
+
+ if (h->direction != h->tx_ep) {
+ /* the read data is located in tcp_backend_priv.recv_buf[4] */
+ /* most of the case it will be copying the data from tcp_backend_priv.recv_buf[4]
+ * to handle->cmd_buff which are the same, so let's avoid unnecessary copying */
+ if (buf != &h->tcp_backend_priv.recv_buf[4])
+ memcpy((uint8_t *)buf, &h->tcp_backend_priv.recv_buf[4], size);
+ }
+
+ return ERROR_OK;
+}
+
+/** */
+static int stlink_tcp_read_trace(void *handle, const uint8_t *buf, int size)
+{
+ struct stlink_usb_handle_s *h = handle;
+
+ stlink_usb_init_buffer(h, h->trace_ep, 0);
+ return stlink_tcp_xfer_noerrcheck(handle, buf, size);
+}
+
/**
Converts an STLINK status code held in the first byte of a response
to an openocd error, logs any error/wait status as debug output.
@@ -2768,16 +2938,54 @@ static int stlink_usb_usb_close(void *handle)
{
struct stlink_usb_handle_s *h = handle;
- if (h && h->usb_backend_priv.fd) {
+ if (!h)
+ return ERROR_OK;
+
+ if (h->usb_backend_priv.fd) {
stlink_usb_exit_mode(h);
/* do not check return code, it prevent
us from closing jtag_libusb */
jtag_libusb_close(h->usb_backend_priv.fd);
}
+ free(h->cmdbuf);
+ free(h->databuf);
+
return ERROR_OK;
}
+/** */
+static int stlink_tcp_close(void *handle)
+{
+ struct stlink_usb_handle_s *h = handle;
+
+ if (!h)
+ return ERROR_OK;
+
+ int ret = ERROR_OK;
+ if (h->tcp_backend_priv.connected) {
+ if (h->tcp_backend_priv.connect_id) {
+ stlink_usb_exit_mode(h);
+
+ /* close the stlink */
+ h->tcp_backend_priv.send_buf[0] = STLINK_TCP_CMD_CLOSE_DEV;
+ memset(&h->tcp_backend_priv.send_buf[1], 0, 4); /* reserved */
+ h_u32_to_le(&h->tcp_backend_priv.send_buf[4], h->tcp_backend_priv.connect_id);
+ ret = stlink_tcp_send_cmd(h, 8, 4, true);
+ if (ret != ERROR_OK)
+ LOG_ERROR("cannot close the STLINK");
+ }
+
+ if (close_socket(h->tcp_backend_priv.fd) != 0)
+ LOG_ERROR("error closing the socket, errno: %s", strerror(errno));
+ }
+
+ free(h->tcp_backend_priv.send_buf);
+ free(h->tcp_backend_priv.recv_buf);
+
+ return ret;
+}
+
/** */
static int stlink_close(void *handle)
{
@@ -2877,6 +3085,12 @@ static int stlink_usb_usb_open(void *handle, struct hl_interface_param_s *param)
struct stlink_usb_handle_s *h = handle;
int err, retry_count = 1;
+ h->cmdbuf = malloc(STLINK_SG_SIZE);
+ h->databuf = malloc(STLINK_DATA_SIZE);
+
+ if (h->cmdbuf == NULL || h->databuf == NULL)
+ return ERROR_FAIL;
+
/*
On certain host USB configurations(e.g. MacBook Air)
STLINKv2 dongle seems to have its FW in a funky state if,
@@ -2973,6 +3187,217 @@ static int stlink_usb_usb_open(void *handle, struct hl_interface_param_s *param)
return ERROR_OK;
}
+/** */
+static int stlink_tcp_open(void *handle, struct hl_interface_param_s *param)
+{
+ struct stlink_usb_handle_s *h = handle;
+ int ret;
+
+ /* SWIM is not supported using stlink-server */
+ if (h->st_mode == STLINK_MODE_DEBUG_SWIM) {
+ LOG_ERROR("stlink-server does not support SWIM mode");
+ return ERROR_FAIL;
+ }
+
+ h->tcp_backend_priv.send_buf = malloc(STLINK_TCP_SEND_BUFFER_SIZE);
+ h->tcp_backend_priv.recv_buf = malloc(STLINK_TCP_RECV_BUFFER_SIZE);
+
+ if (h->tcp_backend_priv.send_buf == NULL || h->tcp_backend_priv.recv_buf == NULL)
+ return ERROR_FAIL;
+
+ h->cmdbuf = &h->tcp_backend_priv.send_buf[8];
+ h->databuf = &h->tcp_backend_priv.recv_buf[4];
+
+ /* configure directions */
+ h->rx_ep = STLINK_TCP_REQUEST_READ;
+ h->tx_ep = STLINK_TCP_REQUEST_WRITE;
+ h->trace_ep = STLINK_TCP_REQUEST_READ_SWO;
+
+ h->tcp_backend_priv.fd = socket(AF_INET, SOCK_STREAM, IPPROTO_TCP);
+ h->tcp_backend_priv.connected = false;
+ h->tcp_backend_priv.device_id = 0;
+ h->tcp_backend_priv.connect_id = 0;
+
+ if (h->tcp_backend_priv.fd == -1) {
+ LOG_ERROR("error creating the socket, errno: %s", strerror(errno));
+ return ERROR_FAIL;
+ }
+
+ struct sockaddr_in serv;
+ memset(&serv, 0, sizeof(struct sockaddr_in));
+ serv.sin_family = AF_INET;
+ serv.sin_port = htons(param->stlink_tcp_port);
+ serv.sin_addr.s_addr = inet_addr("127.0.0.1");
+
+ LOG_DEBUG("socket : %x", h->tcp_backend_priv.fd);
+
+ int optval = 1;
+ if (setsockopt(h->tcp_backend_priv.fd, IPPROTO_TCP, TCP_NODELAY, (const void *)&optval, sizeof(int)) == -1) {
+ LOG_ERROR("cannot set sock option 'TCP_NODELAY', errno: %s", strerror(errno));
+ return ERROR_FAIL;
+ }
+
+ optval = STLINK_TCP_RECV_BUFFER_SIZE;
+ if (setsockopt(h->tcp_backend_priv.fd, SOL_SOCKET, SO_RCVBUF, (const void *)&optval, sizeof(int)) == -1) {
+ LOG_ERROR("cannot set sock option 'SO_RCVBUF', errno: %s", strerror(errno));
+ return ERROR_FAIL;
+ }
+
+ optval = STLINK_TCP_SEND_BUFFER_SIZE;
+ if (setsockopt(h->tcp_backend_priv.fd, SOL_SOCKET, SO_SNDBUF, (const void *)&optval, sizeof(int)) == -1) {
+ LOG_ERROR("cannot set sock option 'SO_SNDBUF', errno: %s", strerror(errno));
+ return ERROR_FAIL;
+ }
+
+ if (connect(h->tcp_backend_priv.fd, (const struct sockaddr *)&serv, sizeof(serv)) == -1) {
+ LOG_ERROR("cannot connect to stlink server, errno: %s", strerror(errno));
+ return ERROR_FAIL;
+ }
+
+ h->tcp_backend_priv.connected = true;
+
+ LOG_INFO("connected to stlink-server");
+
+ /* print stlink-server version */
+ h->tcp_backend_priv.send_buf[0] = STLINK_TCP_CMD_GET_SERVER_VERSION;
+ h->tcp_backend_priv.send_buf[1] = OPENOCD_STLINK_TCP_API_VERSION;
+ memset(&h->tcp_backend_priv.send_buf[2], 0, 2); /* reserved */
+ ret = stlink_tcp_send_cmd(h, 4, 16, false);
+ if (ret != ERROR_OK) {
+ LOG_ERROR("cannot get the stlink-server version");
+ return ERROR_FAIL;
+ }
+
+ uint32_t api_ver = le_to_h_u32(&h->tcp_backend_priv.recv_buf[0]);
+ uint32_t ver_major = le_to_h_u32(&h->tcp_backend_priv.recv_buf[4]);
+ uint32_t ver_minor = le_to_h_u32(&h->tcp_backend_priv.recv_buf[8]);
+ uint32_t ver_build = le_to_h_u32(&h->tcp_backend_priv.recv_buf[12]);
+ LOG_INFO("stlink-server API v%d, version %d.%d.%d",
+ api_ver, ver_major, ver_minor, ver_build);
+
+ /* in stlink-server API v1 sending more than 1428 bytes will cause stlink-server
+ * to crash in windows: select a safe default value (1K) */
+ if (api_ver < 2)
+ h->max_mem_packet = (1 << 10);
+
+ /* refresh stlink list (re-enumerate) */
+ h->tcp_backend_priv.send_buf[0] = STLINK_TCP_CMD_REFRESH_DEVICE_LIST;
+ h->tcp_backend_priv.send_buf[1] = 0; /* don't clear the list, just refresh it */
+ ret = stlink_tcp_send_cmd(h, 2, 4, true);
+ if (ret != ERROR_OK)
+ return ret;
+
+ /* get the number of connected stlinks */
+ h->tcp_backend_priv.send_buf[0] = STLINK_TCP_CMD_GET_NB_DEV;
+ ret = stlink_tcp_send_cmd(h, 1, 4, false);
+ if (ret != ERROR_OK)
+ return ret;
+
+ uint32_t connected_stlinks = le_to_h_u32(h->tcp_backend_priv.recv_buf);
+
+ if (connected_stlinks == 0) {
+ LOG_ERROR("no ST-LINK detected");
+ return ERROR_FAIL;
+ }
+
+ LOG_DEBUG("%d ST-LINK detected", connected_stlinks);
+
+ if (connected_stlinks > 255) {
+ LOG_WARNING("STLink server cannot handle more than 255 ST-LINK connected");
+ connected_stlinks = 255;
+ }
+
+ /* list all connected ST-Link and seek for the requested vid:pid and serial */
+ char serial[STLINK_TCP_SERIAL_SIZE + 1] = {0};
+ uint8_t stlink_used;
+ bool stlink_id_matched = false;
+ bool stlink_serial_matched = (param->serial == NULL);
+
+ for (uint32_t stlink_id = 0; stlink_id < connected_stlinks; stlink_id++) {
+ /* get the stlink info */
+ h->tcp_backend_priv.send_buf[0] = STLINK_TCP_CMD_GET_DEV_INFO;
+ h->tcp_backend_priv.send_buf[1] = (uint8_t)stlink_id;
+ memset(&h->tcp_backend_priv.send_buf[2], 0, 2); /* reserved */
+ h_u32_to_le(&h->tcp_backend_priv.send_buf[4], 41); /* size of TDeviceInfo2 */
+ ret = stlink_tcp_send_cmd(h, 8, 45, true);
+ if (ret != ERROR_OK)
+ return ret;
+
+ h->tcp_backend_priv.device_id = le_to_h_u32(&h->tcp_backend_priv.recv_buf[4]);
+ memcpy(serial, &h->tcp_backend_priv.recv_buf[8], STLINK_TCP_SERIAL_SIZE);
+ h->vid = le_to_h_u16(&h->tcp_backend_priv.recv_buf[40]);
+ h->pid = le_to_h_u16(&h->tcp_backend_priv.recv_buf[42]);
+ stlink_used = h->tcp_backend_priv.recv_buf[44];
+
+ /* check the vid:pid */
+ for (int i = 0; param->vid[i]; i++) {
+ if (param->vid[i] == h->vid && param->pid[i] == h->pid) {
+ stlink_id_matched = true;
+ break;
+ }
+ }
+
+ if (!stlink_id_matched)
+ continue;
+
+ /* check the serial if specified */
+ if (param->serial) {
+ /* ST-Link server fixes the buggy serial returned by old ST-Link DFU
+ * for further details refer to stlink_usb_get_alternate_serial
+ * so if the user passes the buggy serial, we need to fix it before
+ * comparing with the serial returned by ST-Link server */
+ if (strlen(param->serial) == STLINK_SERIAL_LEN / 2) {
+ char fixed_serial[STLINK_SERIAL_LEN + 1];
+
+ for (unsigned int i = 0; i < STLINK_SERIAL_LEN; i += 2)
+ sprintf(fixed_serial + i, "%02X", param->serial[i / 2]);
+
+ fixed_serial[STLINK_SERIAL_LEN] = '\0';
+
+ stlink_serial_matched = strcmp(fixed_serial, serial) == 0;
+ } else
+ stlink_serial_matched = strcmp(param->serial, serial) == 0;
+ }
+
+ if (!stlink_serial_matched)
+ LOG_DEBUG("Device serial number '%s' doesn't match requested serial '%s'",
+ serial, param->serial);
+ else /* exit the search loop if there is match */
+ break;
+ }
+
+ if (!stlink_id_matched) {
+ LOG_ERROR("ST-LINK open failed (vid/pid mismatch)");
+ return ERROR_FAIL;
+ }
+
+ if (!stlink_serial_matched) {
+ LOG_ERROR("ST-LINK open failed (serial mismatch)");
+ return ERROR_FAIL;
+ }
+
+ /* check if device is 'exclusively' used by another application */
+ if (stlink_used) {
+ LOG_ERROR("the selected device is already used");
+ return ERROR_FAIL;
+ }
+
+ LOG_DEBUG("transport: vid: 0x%04x pid: 0x%04x serial: %s", h->vid, h->pid, serial);
+
+ /* now let's open the stlink */
+ h->tcp_backend_priv.send_buf[0] = STLINK_TCP_CMD_OPEN_DEV;
+ memset(&h->tcp_backend_priv.send_buf[1], 0, 4); /* reserved */
+ h_u32_to_le(&h->tcp_backend_priv.send_buf[4], h->tcp_backend_priv.device_id);
+ ret = stlink_tcp_send_cmd(h, 8, 8, true);
+ if (ret != ERROR_OK)
+ return ret;
+
+ h->tcp_backend_priv.connect_id = le_to_h_u32(&h->tcp_backend_priv.recv_buf[4]);
+
+ /* get stlink version */
+ return stlink_usb_version(h);
+}
+
static struct stlink_backend_s stlink_usb_backend = {
.open = stlink_usb_usb_open,
.close = stlink_usb_usb_close,
@@ -2980,6 +3405,13 @@ static struct stlink_backend_s stlink_usb_backend = {
.read_trace = stlink_usb_usb_read_trace,
};
+static struct stlink_backend_s stlink_tcp_backend = {
+ .open = stlink_tcp_open,
+ .close = stlink_tcp_close,
+ .xfer_noerrcheck = stlink_tcp_xfer_noerrcheck,
+ .read_trace = stlink_tcp_read_trace,
+};
+
static int stlink_open(struct hl_interface_param_s *param, enum stlink_mode mode, void **fd)
{
struct stlink_usb_handle_s *h;
@@ -3001,7 +3433,10 @@ static int stlink_open(struct hl_interface_param_s *param, enum stlink_mode mode
param->serial ? param->serial : "");
}
- h->backend = &stlink_usb_backend;
+ if (param->use_stlink_tcp)
+ h->backend = &stlink_tcp_backend;
+ else
+ h->backend = &stlink_usb_backend;
if (stlink_usb_open(h, param) != ERROR_OK)
goto error_open;
@@ -3051,23 +3486,26 @@ static int stlink_open(struct hl_interface_param_s *param, enum stlink_mode mode
return ERROR_OK;
}
- /* get cpuid, so we can determine the max page size
- * start with a safe default */
- h->max_mem_packet = (1 << 10);
+ /* set max_mem_packet if it was not set by the low-level interface */
+ if (h->max_mem_packet == 0) {
+ /* get cpuid, so we can determine the max page size
+ * start with a safe default */
+ h->max_mem_packet = (1 << 10);
- uint8_t buffer[4];
- stlink_usb_open_ap(h, 0);
- err = stlink_usb_read_mem32(h, CPUID, 4, buffer);
- if (err == ERROR_OK) {
- uint32_t cpuid = le_to_h_u32(buffer);
- int i = (cpuid >> 4) & 0xf;
- if (i == 4 || i == 3) {
- /* Cortex-M3/M4 has 4096 bytes autoincrement range */
- h->max_mem_packet = (1 << 12);
+ uint8_t buffer[4];
+ stlink_usb_open_ap(h, 0);
+ err = stlink_usb_read_mem32(h, CPUID, 4, buffer);
+ if (err == ERROR_OK) {
+ uint32_t cpuid = le_to_h_u32(buffer);
+ int i = (cpuid >> 4) & 0xf;
+ if (i == 4 || i == 3) {
+ /* Cortex-M3/M4 has 4096 bytes autoincrement range */
+ h->max_mem_packet = (1 << 12);
+ }
}
- }
- LOG_DEBUG("Using TAR autoincrement: %" PRIu32, h->max_mem_packet);
+ LOG_DEBUG("Using TAR autoincrement: %" PRIu32, h->max_mem_packet);
+ }
*fd = h;
@@ -3749,6 +4187,32 @@ COMMAND_HANDLER(stlink_dap_vid_pid)
return ERROR_OK;
}
+/** */
+COMMAND_HANDLER(stlink_dap_backend_command)
+{
+ /* default values */
+ bool use_stlink_tcp = false;
+ uint16_t stlink_tcp_port = 7184;
+
+ if (CMD_ARGC == 0 || CMD_ARGC > 2)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ else if (strcmp(CMD_ARGV[0], "usb") == 0) {
+ if (CMD_ARGC > 1)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ /* else use_stlink_tcp = false (already the case ) */
+ } else if (strcmp(CMD_ARGV[0], "tcp") == 0) {
+ use_stlink_tcp = true;
+ if (CMD_ARGC == 2)
+ COMMAND_PARSE_NUMBER(u16, CMD_ARGV[1], stlink_tcp_port);
+ } else
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ stlink_dap_param.use_stlink_tcp = use_stlink_tcp;
+ stlink_dap_param.stlink_tcp_port = stlink_tcp_port;
+
+ return ERROR_OK;
+}
+
/** */
static const struct command_registration stlink_dap_subcommand_handlers[] = {
{
@@ -3765,6 +4229,13 @@ static const struct command_registration stlink_dap_subcommand_handlers[] = {
.help = "USB VID and PID of the adapter",
.usage = "(vid pid)+",
},
+ {
+ .name = "backend",
+ .handler = &stlink_dap_backend_command,
+ .mode = COMMAND_CONFIG,
+ .help = "select which ST-Link backend to use",
+ .usage = "usb | tcp [port]",
+ },
COMMAND_REGISTRATION_DONE
};
diff --git a/src/jtag/hla/hla_interface.c b/src/jtag/hla/hla_interface.c
index 6691a9a32..04e01d252 100644
--- a/src/jtag/hla/hla_interface.c
+++ b/src/jtag/hla/hla_interface.c
@@ -35,7 +35,7 @@
#include <target/target.h>
-static struct hl_interface_s hl_if = { {0, 0, { 0 }, { 0 }, HL_TRANSPORT_UNKNOWN, false, -1}, 0, 0 };
+static struct hl_interface_s hl_if = { {0, 0, { 0 }, { 0 }, HL_TRANSPORT_UNKNOWN, false, -1, false, 7184}, 0, 0 };
int hl_interface_open(enum hl_transports tr)
{
@@ -292,6 +292,31 @@ COMMAND_HANDLER(hl_interface_handle_vid_pid_command)
return ERROR_OK;
}
+COMMAND_HANDLER(hl_interface_handle_stlink_backend_command)
+{
+ /* default values */
+ bool use_stlink_tcp = false;
+ uint16_t stlink_tcp_port = 7184;
+
+ if (CMD_ARGC == 0 || CMD_ARGC > 2)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ else if (strcmp(CMD_ARGV[0], "usb") == 0) {
+ if (CMD_ARGC > 1)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ /* else use_stlink_tcp = false (already the case ) */
+ } else if (strcmp(CMD_ARGV[0], "tcp") == 0) {
+ use_stlink_tcp = true;
+ if (CMD_ARGC == 2)
+ COMMAND_PARSE_NUMBER(u16, CMD_ARGV[1], stlink_tcp_port);
+ } else
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ hl_if.param.use_stlink_tcp = use_stlink_tcp;
+ hl_if.param.stlink_tcp_port = stlink_tcp_port;
+
+ return ERROR_OK;
+}
+
COMMAND_HANDLER(interface_handle_hla_command)
{
if (CMD_ARGC != 1)
@@ -336,6 +361,13 @@ static const struct command_registration hl_interface_command_handlers[] = {
.help = "the vendor and product ID of the adapter",
.usage = "(vid pid)* ",
},
+ {
+ .name = "hla_stlink_backend",
+ .handler = &hl_interface_handle_stlink_backend_command,
+ .mode = COMMAND_CONFIG,
+ .help = "select which ST-Link backend to use",
+ .usage = "usb | tcp [port]",
+ },
{
.name = "hla_command",
.handler = &interface_handle_hla_command,
diff --git a/src/jtag/hla/hla_interface.h b/src/jtag/hla/hla_interface.h
index b6e4a8b92..a1c95cde1 100644
--- a/src/jtag/hla/hla_interface.h
+++ b/src/jtag/hla/hla_interface.h
@@ -46,6 +46,10 @@ struct hl_interface_param_s {
bool connect_under_reset;
/** Initial interface clock clock speed */
int initial_interface_speed;
+ /** */
+ bool use_stlink_tcp;
+ /** */
+ uint16_t stlink_tcp_port;
};
struct hl_interface_s {
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 20 ++
src/jtag/drivers/stlink_usb.c | 507 ++++++++++++++++++++++++++++++++++++++++--
src/jtag/hla/hla_interface.c | 34 ++-
src/jtag/hla/hla_interface.h | 4 +
tcl/target/rk3399.cfg | 79 +++++++
5 files changed, 625 insertions(+), 19 deletions(-)
create mode 100644 tcl/target/rk3399.cfg
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-03-10 21:29:27
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 75d512bb973c1397a1f100626d44835274b216ea (commit)
from cc9e3c2f7b04ba6da7e3b69161d78896c58503bd (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 75d512bb973c1397a1f100626d44835274b216ea
Author: Tarek BOCHKATI <tar...@gm...>
Date: Sun May 24 17:55:44 2020 +0100
stlink: separate stlink core from USB functions
the introduced stlink_backend_s struct provides an API to separate USB
internals from stlink core.
this separation aims to ease:
- stlink-server integration [1]
- stlink driver split into modules:
- stlink_core
- stlink_usb
- stlink_tcp [1]
[1] refer to http://openocd.zylin.com/#/c/5633/
Change-Id: Iff6790942612ce1769ec4c75990914534e5e9e24
Signed-off-by: Tarek BOCHKATI <tar...@gm...>
Reviewed-on: http://openocd.zylin.com/5632
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c
index 4545bcba0..6224070cb 100644
--- a/src/jtag/drivers/stlink_usb.c
+++ b/src/jtag/drivers/stlink_usb.c
@@ -1,4 +1,7 @@
/***************************************************************************
+ * Copyright (C) 2020 by Tarek Bochkati *
+ * Tarek Bochkati <tar...@gm...> *
+ * *
* SWIM contributions by Ake Rehnman *
* Copyright (C) 2017 Ake Rehnman *
* ake.rehnman(at)gmail.com *
@@ -119,12 +122,32 @@ struct stlink_usb_version {
uint32_t flags;
};
-/** */
-struct stlink_usb_handle_s {
+struct stlink_usb_priv_s {
/** */
struct libusb_device_handle *fd;
/** */
struct libusb_transfer *trans;
+};
+
+struct stlink_backend_s {
+ /** */
+ int (*open)(void *handle, struct hl_interface_param_s *param);
+ /** */
+ int (*close)(void *handle);
+ /** */
+ int (*xfer_noerrcheck)(void *handle, const uint8_t *buf, int size);
+ /** */
+ int (*read_trace)(void *handle, const uint8_t *buf, int size);
+};
+
+/** */
+struct stlink_usb_handle_s {
+ /** */
+ struct stlink_backend_s *backend;
+ /** */
+ union {
+ struct stlink_usb_priv_s usb_backend_priv;
+ };
/** */
uint8_t rx_ep;
/** */
@@ -161,6 +184,26 @@ struct stlink_usb_handle_s {
bool reconnect_pending;
};
+/** */
+static inline int stlink_usb_open(void *handle, struct hl_interface_param_s *param)
+{
+ struct stlink_usb_handle_s *h = handle;
+ return h->backend->open(handle, param);
+}
+
+/** */
+static inline int stlink_usb_close(void *handle)
+{
+ struct stlink_usb_handle_s *h = handle;
+ return h->backend->close(handle);
+}
+/** */
+static inline int stlink_usb_xfer_noerrcheck(void *handle, const uint8_t *buf, int size)
+{
+ struct stlink_usb_handle_s *h = handle;
+ return h->backend->xfer_noerrcheck(handle, buf, size);
+}
+
#define STLINK_SWIM_ERR_OK 0x00
#define STLINK_SWIM_BUSY 0x01
#define STLINK_DEBUG_ERR_OK 0x80
@@ -380,8 +423,6 @@ static unsigned int stlink_usb_block(void *handle)
return STLINK_MAX_RW8;
}
-
-
#ifdef USE_LIBUSB_ASYNCIO
static LIBUSB_CALL void sync_transfer_cb(struct libusb_transfer *transfer)
@@ -545,7 +586,7 @@ static int stlink_usb_xfer_v1_get_status(void *handle)
/* read status */
memset(h->cmdbuf, 0, STLINK_SG_SIZE);
- ret = jtag_libusb_bulk_read(h->fd, h->rx_ep, (char *)h->cmdbuf, 13,
+ ret = jtag_libusb_bulk_read(h->usb_backend_priv.fd, h->rx_ep, (char *)h->cmdbuf, 13,
STLINK_READ_TIMEOUT, &tr);
if (ret || tr != 13)
return ERROR_FAIL;
@@ -602,7 +643,7 @@ static int stlink_usb_xfer_rw(void *handle, int cmdsize, const uint8_t *buf, int
}
return jtag_libusb_bulk_transfer_n(
- h->fd,
+ h->usb_backend_priv.fd,
transfers,
n_transfers,
STLINK_WRITE_TIMEOUT);
@@ -615,20 +656,20 @@ static int stlink_usb_xfer_rw(void *handle, int cmdsize, const uint8_t *buf, int
assert(handle != NULL);
- ret = jtag_libusb_bulk_write(h->fd, h->tx_ep, (char *)h->cmdbuf,
+ ret = jtag_libusb_bulk_write(h->usb_backend_priv.fd, h->tx_ep, (char *)h->cmdbuf,
cmdsize, STLINK_WRITE_TIMEOUT, &tr);
if (ret || tr != cmdsize)
return ERROR_FAIL;
if (h->direction == h->tx_ep && size) {
- ret = jtag_libusb_bulk_write(h->fd, h->tx_ep, (char *)buf,
+ ret = jtag_libusb_bulk_write(h->usb_backend_priv.fd, h->tx_ep, (char *)buf,
size, STLINK_WRITE_TIMEOUT, &tr);
if (ret || tr != size) {
LOG_DEBUG("bulk write failed");
return ERROR_FAIL;
}
} else if (h->direction == h->rx_ep && size) {
- ret = jtag_libusb_bulk_read(h->fd, h->rx_ep, (char *)buf,
+ ret = jtag_libusb_bulk_read(h->usb_backend_priv.fd, h->rx_ep, (char *)buf,
size, STLINK_READ_TIMEOUT, &tr);
if (ret || tr != size) {
LOG_DEBUG("bulk read failed");
@@ -667,13 +708,29 @@ static int stlink_usb_xfer_v1_get_sense(void *handle)
return ERROR_OK;
}
+/** */
+static int stlink_usb_usb_read_trace(void *handle, const uint8_t *buf, int size)
+{
+ struct stlink_usb_handle_s *h = handle;
+ int tr, ret;
+
+ ret = jtag_libusb_bulk_read(h->usb_backend_priv.fd, h->trace_ep, (char *)buf, size,
+ STLINK_READ_TIMEOUT, &tr);
+ if (ret || tr != size) {
+ LOG_ERROR("bulk trace read failed");
+ return ERROR_FAIL;
+ }
+
+ return ERROR_OK;
+}
+
/*
transfers block in cmdbuf
<size> indicates number of bytes in the following
data phase.
Ignore the (eventual) error code in the received packet.
*/
-static int stlink_usb_xfer_noerrcheck(void *handle, const uint8_t *buf, int size)
+static int stlink_usb_usb_xfer_noerrcheck(void *handle, const uint8_t *buf, int size)
{
int err, cmdsize = STLINK_CMD_SIZE_V2;
struct stlink_usb_handle_s *h = handle;
@@ -852,20 +909,12 @@ static int stlink_cmd_allow_retry(void *handle, const uint8_t *buf, int size)
static int stlink_usb_read_trace(void *handle, const uint8_t *buf, int size)
{
struct stlink_usb_handle_s *h = handle;
- int tr, ret;
assert(handle != NULL);
assert(h->version.flags & STLINK_F_HAS_TRACE);
- ret = jtag_libusb_bulk_read(h->fd, h->trace_ep, (char *)buf, size,
- STLINK_READ_TIMEOUT, &tr);
- if (ret || tr != size) {
- LOG_ERROR("bulk trace read failed");
- return ERROR_FAIL;
- }
-
- return ERROR_OK;
+ return h->backend->read_trace(handle, buf, size);
}
/*
@@ -2715,18 +2764,30 @@ static int stlink_speed(void *handle, int khz, bool query)
}
/** */
-static int stlink_usb_close(void *handle)
+static int stlink_usb_usb_close(void *handle)
{
struct stlink_usb_handle_s *h = handle;
- if (h && h->fd) {
+ if (h && h->usb_backend_priv.fd) {
stlink_usb_exit_mode(h);
/* do not check return code, it prevent
us from closing jtag_libusb */
- jtag_libusb_close(h->fd);
+ jtag_libusb_close(h->usb_backend_priv.fd);
}
- free(h);
+ return ERROR_OK;
+}
+
+/** */
+static int stlink_close(void *handle)
+{
+ if (handle != NULL) {
+ struct stlink_usb_handle_s *h = handle;
+
+ stlink_usb_close(handle);
+
+ free(h);
+ }
return ERROR_OK;
}
@@ -2811,27 +2872,10 @@ static char *stlink_usb_get_alternate_serial(libusb_device_handle *device,
}
/** */
-static int stlink_usb_open(struct hl_interface_param_s *param, enum stlink_mode mode, void **fd)
+static int stlink_usb_usb_open(void *handle, struct hl_interface_param_s *param)
{
+ struct stlink_usb_handle_s *h = handle;
int err, retry_count = 1;
- struct stlink_usb_handle_s *h;
-
- LOG_DEBUG("stlink_usb_open");
-
- h = calloc(1, sizeof(struct stlink_usb_handle_s));
-
- if (h == 0) {
- LOG_DEBUG("malloc failed");
- return ERROR_FAIL;
- }
-
- h->st_mode = mode;
-
- for (unsigned i = 0; param->vid[i]; i++) {
- LOG_DEBUG("transport: %d vid: 0x%04x pid: 0x%04x serial: %s",
- h->st_mode, param->vid[i], param->pid[i],
- param->serial ? param->serial : "");
- }
/*
On certain host USB configurations(e.g. MacBook Air)
@@ -2844,25 +2888,25 @@ static int stlink_usb_open(struct hl_interface_param_s *param, enum stlink_mode
*/
do {
if (jtag_libusb_open(param->vid, param->pid, param->serial,
- &h->fd, stlink_usb_get_alternate_serial) != ERROR_OK) {
+ &h->usb_backend_priv.fd, stlink_usb_get_alternate_serial) != ERROR_OK) {
LOG_ERROR("open failed");
- goto error_open;
+ return ERROR_FAIL;
}
- jtag_libusb_set_configuration(h->fd, 0);
+ jtag_libusb_set_configuration(h->usb_backend_priv.fd, 0);
- if (libusb_claim_interface(h->fd, 0) != ERROR_OK) {
+ if (libusb_claim_interface(h->usb_backend_priv.fd, 0) != ERROR_OK) {
LOG_DEBUG("claim interface failed");
- goto error_open;
+ return ERROR_FAIL;
}
/* RX EP is common for all versions */
h->rx_ep = STLINK_RX_EP;
uint16_t pid;
- if (jtag_libusb_get_pid(libusb_get_device(h->fd), &pid) != ERROR_OK) {
+ if (jtag_libusb_get_pid(libusb_get_device(h->usb_backend_priv.fd), &pid) != ERROR_OK) {
LOG_DEBUG("libusb_get_pid failed");
- goto error_open;
+ return ERROR_FAIL;
}
/* wrap version for first read */
@@ -2902,21 +2946,21 @@ static int stlink_usb_open(struct hl_interface_param_s *param, enum stlink_mode
} else if (h->version.stlink == 1 ||
retry_count == 0) {
LOG_ERROR("read version failed");
- goto error_open;
+ return ERROR_FAIL;
} else {
- err = libusb_release_interface(h->fd, 0);
+ err = libusb_release_interface(h->usb_backend_priv.fd, 0);
if (err != ERROR_OK) {
LOG_ERROR("release interface failed");
- goto error_open;
+ return ERROR_FAIL;
}
- err = libusb_reset_device(h->fd);
+ err = libusb_reset_device(h->usb_backend_priv.fd);
if (err != ERROR_OK) {
LOG_ERROR("reset device failed");
- goto error_open;
+ return ERROR_FAIL;
}
- jtag_libusb_close(h->fd);
+ jtag_libusb_close(h->usb_backend_priv.fd);
/*
Give the device one second to settle down and
reenumerate.
@@ -2926,8 +2970,44 @@ static int stlink_usb_open(struct hl_interface_param_s *param, enum stlink_mode
}
} while (1);
+ return ERROR_OK;
+}
+
+static struct stlink_backend_s stlink_usb_backend = {
+ .open = stlink_usb_usb_open,
+ .close = stlink_usb_usb_close,
+ .xfer_noerrcheck = stlink_usb_usb_xfer_noerrcheck,
+ .read_trace = stlink_usb_usb_read_trace,
+};
+
+static int stlink_open(struct hl_interface_param_s *param, enum stlink_mode mode, void **fd)
+{
+ struct stlink_usb_handle_s *h;
+
+ LOG_DEBUG("stlink_open");
+
+ h = calloc(1, sizeof(struct stlink_usb_handle_s));
+
+ if (h == 0) {
+ LOG_DEBUG("malloc failed");
+ return ERROR_FAIL;
+ }
+
+ h->st_mode = mode;
+
+ for (unsigned i = 0; param->vid[i]; i++) {
+ LOG_DEBUG("transport: %d vid: 0x%04x pid: 0x%04x serial: %s",
+ h->st_mode, param->vid[i], param->pid[i],
+ param->serial ? param->serial : "");
+ }
+
+ h->backend = &stlink_usb_backend;
+
+ if (stlink_usb_open(h, param) != ERROR_OK)
+ goto error_open;
+
/* check if mode is supported */
- err = ERROR_OK;
+ int err = ERROR_OK;
switch (h->st_mode) {
case STLINK_MODE_DEBUG_SWD:
@@ -2994,14 +3074,13 @@ static int stlink_usb_open(struct hl_interface_param_s *param, enum stlink_mode
return ERROR_OK;
error_open:
- stlink_usb_close(h);
-
+ stlink_close(h);
return ERROR_FAIL;
}
static int stlink_usb_hl_open(struct hl_interface_param_s *param, void **fd)
{
- return stlink_usb_open(param, stlink_get_mode(param->transport), fd);
+ return stlink_open(param, stlink_get_mode(param->transport), fd);
}
static int stlink_config_trace(void *handle, bool enabled,
@@ -3151,7 +3230,7 @@ struct hl_layout_api_s stlink_usb_layout_api = {
/** */
.open = stlink_usb_hl_open,
/** */
- .close = stlink_usb_close,
+ .close = stlink_close,
/** */
.idcode = stlink_usb_idcode,
/** */
@@ -3728,7 +3807,7 @@ static int stlink_dap_init(void)
return ERROR_FAIL;
}
- retval = stlink_usb_open(&stlink_dap_param, mode, (void **)&stlink_dap_handle);
+ retval = stlink_open(&stlink_dap_param, mode, (void **)&stlink_dap_handle);
if (retval != ERROR_OK)
return retval;
@@ -3748,7 +3827,7 @@ static int stlink_dap_quit(void)
free((void *)stlink_dap_param.serial);
stlink_dap_param.serial = NULL;
- return stlink_usb_close(stlink_dap_handle);
+ return stlink_close(stlink_dap_handle);
}
/** */
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/stlink_usb.c | 203 +++++++++++++++++++++++++++++-------------
1 file changed, 141 insertions(+), 62 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-03-10 21:27:46
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via cc9e3c2f7b04ba6da7e3b69161d78896c58503bd (commit)
from 7e16194828a38382d4cf80604cd547b884f4ad97 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit cc9e3c2f7b04ba6da7e3b69161d78896c58503bd
Author: Anthony Ferranti <fer...@os...>
Date: Wed Apr 1 15:46:30 2020 -0400
eMAG: Add Ampere eMAG config files
Add board and target configuration files for
Ampere eMAG8180 board and Ampere eMAG processor.
Tested on an Ampere eMAG8180 development platform.
Change-Id: I222653f0fc12d25202a7e469db3594076cbc38ed
Signed-off-by: Anthony Ferranti <fer...@os...>
Signed-off-by: Daniel Goehring <dgo...@os...>
Reviewed-on: http://openocd.zylin.com/5569
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/tcl/board/ampere_emag8180.cfg b/tcl/board/ampere_emag8180.cfg
new file mode 100644
index 000000000..a122e0288
--- /dev/null
+++ b/tcl/board/ampere_emag8180.cfg
@@ -0,0 +1,38 @@
+#
+# OpenOCD Board Configuration for eMAG Development Platform
+#
+# Copyright (c) 2019-2021, Ampere Computing LLC
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program;
+#
+#
+
+#
+# Configure JTAG speed
+#
+
+adapter speed 2000
+
+#
+# Configure Resets
+#
+
+jtag_ntrst_delay 100
+reset_config trst_only
+
+#
+# Configure Targets
+#
+
+source [find target/ampere_emag.cfg]
diff --git a/tcl/target/ampere_emag.cfg b/tcl/target/ampere_emag.cfg
new file mode 100644
index 000000000..7115a839d
--- /dev/null
+++ b/tcl/target/ampere_emag.cfg
@@ -0,0 +1,112 @@
+#
+# OpenOCD Target Configuration for eMAG ARMv8 Processor
+#
+# Copyright (c) 2019-2021, Ampere Computing LLC
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program;
+#
+#
+
+#
+# Configure defaults for target
+# Can be overriden in board configuration file
+#
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME emag
+}
+
+if { [info exists NUMCORES] } {
+ set _NUMCORES $NUMCORES
+} else {
+ set _NUMCORES 32
+}
+
+if { [info exists ENDIAN] } {
+ set _ENDIAN $ENDIAN
+} else {
+ set _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x4BA00477
+}
+
+#
+# Configure JTAG TAP
+#
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x3 -expected-id $_CPUTAPID
+set _TAPNAME $_CHIPNAME.cpu
+
+set _DAPNAME ${_TAPNAME}_dap
+set _APNUM 1
+dap create $_DAPNAME -chain-position $_TAPNAME
+$_DAPNAME apsel $_APNUM
+
+# Create the DAP AP0 MEM-AP AHB-AP target
+target create AHB mem_ap -endian $_ENDIAN -dap $_DAPNAME -ap-num 0
+
+# Create the DAP AP1 MEM-AP APB-AP target
+target create APB mem_ap -endian $_ENDIAN -dap $_DAPNAME -ap-num 1
+
+#
+# Configure target CPUs
+#
+
+# Build string used to enable smp mode
+set _SMP_STR "target smp"
+
+for {set _i 0} {$_i < $_NUMCORES} {incr _i} {
+ # Format a string to reference which CPU target to use
+ set _TARGETNAME [format "${_TAPNAME}_%02d" $_i]
+
+ # Create and configure Cross Trigger Interface (CTI) - required for halt and resume
+ set _CTINAME $_TARGETNAME.cti
+ cti create $_CTINAME -dap $_DAPNAME -ap-num $_APNUM -baseaddr [expr 0xFC020000 + ($_i << 20)]
+
+ # Create the target
+ target create $_TARGETNAME aarch64 -endian $_ENDIAN -dap $_DAPNAME -ap-num $_APNUM -cti $_CTINAME -coreid $_i
+ set _SMP_STR "$_SMP_STR $_TARGETNAME"
+
+ # Clear CTI output/input enables that are not configured by OpenOCD for aarch64
+ $_TARGETNAME configure -event examine-start [subst {
+ $_CTINAME write INEN0 0x00000000
+ $_CTINAME write INEN1 0x00000000
+ $_CTINAME write INEN2 0x00000000
+ $_CTINAME write INEN3 0x00000000
+ $_CTINAME write INEN4 0x00000000
+ $_CTINAME write INEN5 0x00000000
+ $_CTINAME write INEN6 0x00000000
+ $_CTINAME write INEN7 0x00000000
+ $_CTINAME write INEN8 0x00000000
+
+ $_CTINAME write OUTEN2 0x00000000
+ $_CTINAME write OUTEN3 0x00000000
+ $_CTINAME write OUTEN4 0x00000000
+ $_CTINAME write OUTEN5 0x00000000
+ $_CTINAME write OUTEN6 0x00000000
+ $_CTINAME write OUTEN7 0x00000000
+ $_CTINAME write OUTEN8 0x00000000
+ }]
+
+ # Enable OpenOCD HWTHREAD RTOS feature for GDB thread (CPU) selection support
+ # This feature presents CPU cores ("hardware threads") in an SMP system as threads to GDB
+ $_TARGETNAME configure -rtos hwthread
+}
+eval $_SMP_STR
-----------------------------------------------------------------------
Summary of changes:
.../jtag_dpi.cfg => board/ampere_emag8180.cfg} | 34 +++----
tcl/target/ampere_emag.cfg | 112 +++++++++++++++++++++
2 files changed, 129 insertions(+), 17 deletions(-)
copy tcl/{interface/jtag_dpi.cfg => board/ampere_emag8180.cfg} (57%)
create mode 100644 tcl/target/ampere_emag.cfg
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-03-10 21:25:26
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 7e16194828a38382d4cf80604cd547b884f4ad97 (commit)
via fe09811ea4d34c2ed50a38a956facf45be197214 (commit)
via e8c7689c61686489bf273f5d61b0b257e6aa52f1 (commit)
from 39f8327639f005353e905002abd492e9616b217d (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 7e16194828a38382d4cf80604cd547b884f4ad97
Author: Nishanth Menon <nm...@ti...>
Date: Mon Nov 30 08:18:32 2020 -0600
tcl/board: Add AM642 EVM basic support
Add basic connection details with AM642 EVM
Change-Id: I95dcf6afadb61bfd8456b79274eae863b834167d
Signed-off-by: Nishanth Menon <nm...@ti...>
Reviewed-on: http://openocd.zylin.com/5952
Reviewed-by: Antonio Borneo <bor...@gm...>
Reviewed-by: Vignesh Raghavendra
Tested-by: jenkins
diff --git a/tcl/board/ti_am642evm.cfg b/tcl/board/ti_am642evm.cfg
new file mode 100644
index 000000000..e97fdcf13
--- /dev/null
+++ b/tcl/board/ti_am642evm.cfg
@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Copyright (C) 2019-2021 Texas Instruments Incorporated - http://www.ti.com/
+#
+# Texas Instruments AM642 EVM
+#
+
+# AM642 EVM has an xds110 onboard.
+source [find interface/xds110.cfg]
+
+transport select jtag
+
+# default JTAG configuration has only SRST and no TRST
+reset_config srst_only srst_push_pull
+
+# delay after SRST goes inactive
+adapter srst delay 20
+
+if { ![info exists SOC] } {
+ set SOC am642
+}
+
+source [find target/ti_k3.cfg]
+
+adapter speed 250
commit fe09811ea4d34c2ed50a38a956facf45be197214
Author: Nishanth Menon <nm...@ti...>
Date: Sun Nov 29 21:01:24 2020 -0600
tcl/board: Add J7200 EVM basic support
Add basic connection details with J7200 EVM
Change-Id: Ia8fa5033a693ac09849d33693c81b8cb206f17c1
Signed-off-by: Nishanth Menon <nm...@ti...>
Reviewed-on: http://openocd.zylin.com/5951
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/tcl/board/ti_j7200evm.cfg b/tcl/board/ti_j7200evm.cfg
new file mode 100644
index 000000000..cc70056fb
--- /dev/null
+++ b/tcl/board/ti_j7200evm.cfg
@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Copyright (C) 2019-2021 Texas Instruments Incorporated - http://www.ti.com/
+#
+# Texas Instruments J7200 EVM
+#
+
+# J7200 EVM has an xds110 onboard.
+source [find interface/xds110.cfg]
+
+transport select jtag
+
+# default JTAG configuration has only SRST and no TRST
+reset_config srst_only srst_push_pull
+
+# delay after SRST goes inactive
+adapter srst delay 20
+
+if { ![info exists SOC] } {
+ set SOC j7200
+}
+
+source [find target/ti_k3.cfg]
+
+adapter speed 2500
commit e8c7689c61686489bf273f5d61b0b257e6aa52f1
Author: Nishanth Menon <nm...@ti...>
Date: Sat May 11 03:15:39 2019 -0500
tcl/board: Add J721E EVM basic support
Add basic connection details with J721E EVM
Change-Id: I0c2d25252432914d8e371e81761a59c05924bd8e
Signed-off-by: Nishanth Menon <nm...@ti...>
Reviewed-on: http://openocd.zylin.com/5185
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/tcl/board/ti_j721evm.cfg b/tcl/board/ti_j721evm.cfg
new file mode 100644
index 000000000..d0c4b7496
--- /dev/null
+++ b/tcl/board/ti_j721evm.cfg
@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Copyright (C) 2019-2021 Texas Instruments Incorporated - http://www.ti.com/
+#
+# Texas Instruments J721E EVM
+#
+
+# J721E EVM has an xds110 onboard.
+source [find interface/xds110.cfg]
+
+transport select jtag
+
+# default JTAG configuration has only SRST and no TRST
+reset_config srst_only srst_push_pull
+
+# delay after SRST goes inactive
+adapter srst delay 20
+
+if { ![info exists SOC] } {
+ set SOC j721e
+}
+
+source [find target/ti_k3.cfg]
+
+adapter speed 2500
-----------------------------------------------------------------------
Summary of changes:
tcl/board/{ti_am654evm.cfg => ti_am642evm.cfg} | 10 +++++-----
tcl/board/{ti_am654evm.cfg => ti_j7200evm.cfg} | 8 ++++----
tcl/board/{ti_am654evm.cfg => ti_j721evm.cfg} | 8 ++++----
3 files changed, 13 insertions(+), 13 deletions(-)
copy tcl/board/{ti_am654evm.cfg => ti_am642evm.cfg} (73%)
copy tcl/board/{ti_am654evm.cfg => ti_j7200evm.cfg} (77%)
copy tcl/board/{ti_am654evm.cfg => ti_j721evm.cfg} (77%)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-03-10 21:24:40
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 39f8327639f005353e905002abd492e9616b217d (commit)
via 431dd885368ec90fe2f74ba50bbe70577844615b (commit)
from 4307d93eb00ac27373c62f08b8547b993b66fe82 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 39f8327639f005353e905002abd492e9616b217d
Author: Nishanth Menon <nm...@ti...>
Date: Fri Jun 8 16:48:27 2018 -0500
tcl/board: Add AM654 EVM basic support
Add basic connection details with AM654 evm
Change-Id: Iea2240860e50ae42cf6f1617a10e24f63c6dd988
Signed-off-by: Nishanth Menon <nm...@ti...>
Reviewed-on: http://openocd.zylin.com/5183
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/tcl/board/ti_am654evm.cfg b/tcl/board/ti_am654evm.cfg
new file mode 100644
index 000000000..a661f6068
--- /dev/null
+++ b/tcl/board/ti_am654evm.cfg
@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Copyright (C) 2019-2021 Texas Instruments Incorporated - http://www.ti.com/
+#
+# Texas Instruments AM654 EVM/IDK Base Board
+#
+
+# AM654 EVM has an xds110 onboard.
+source [find interface/xds110.cfg]
+
+transport select jtag
+
+# default JTAG configuration has only SRST and no TRST
+reset_config srst_only srst_push_pull
+
+# delay after SRST goes inactive
+adapter srst delay 70
+
+if { ![info exists SOC] } {
+ set SOC am654
+}
+
+source [find target/ti_k3.cfg]
+
+adapter speed 2500
commit 431dd885368ec90fe2f74ba50bbe70577844615b
Author: Nishanth Menon <nm...@ti...>
Date: Fri Jun 8 16:48:27 2018 -0500
tcl/target: Add K3 basic support
Add basic connection details for AM654 and J721E SoCs from TI.
See AM65x Technical Reference Manual (SPRUID7, April 2018)
for further details: https://www.ti.com/lit/pdf/spruid7
See J721E Technical Reference Manual (SPRUIL1, May 2019)
for further details: https://www.ti.com/lit/pdf/spruil1
See J7200 Technical Reference Manual (SPRUIU1, June 2020)
for further details: https://www.ti.com/lit/pdf/spruiu1
See AM64X Technical Reference Manual (SPRUIM2, Nov 2020)
for further details: https://www.ti.com/lit/pdf/spruim2
Change-Id: Ie5108c6ad6f1304a6bf5b9f81aa9ebd33b8a559d
Signed-off-by: Nishanth Menon <nm...@ti...>
Reviewed-on: http://openocd.zylin.com/5182
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/tcl/target/ti_k3.cfg b/tcl/target/ti_k3.cfg
new file mode 100644
index 000000000..d2aa53160
--- /dev/null
+++ b/tcl/target/ti_k3.cfg
@@ -0,0 +1,256 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Copyright (C) 2019-2021 Texas Instruments Incorporated - http://www.ti.com/
+#
+# Texas Instruments K3 devices:
+# * AM654x: https://www.ti.com/lit/pdf/spruid7
+# Has 4 ARMV8 Cores and 2 R5 Cores and an M3
+# * J721E: https://www.ti.com/lit/pdf/spruil1
+# Has 2 ARMV8 Cores and 6 R5 Cores and an M3
+# * J7200: https://www.ti.com/lit/pdf/spruiu1
+# Has 2 ARMV8 Cores and 4 R5 Cores and an M3
+# * AM642: https://www.ti.com/lit/pdf/spruim2
+# Has 2 ARMV8 Cores and 4 R5 Cores, M4F and an M3
+#
+
+if { [info exists SOC] } {
+ set _soc $SOC
+} else {
+ set _soc am654
+}
+
+# set V8_SMP_DEBUG to non 0 value in board if you'd like to use SMP debug
+if { [info exists V8_SMP_DEBUG] } {
+ set _v8_smp_debug $V8_SMP_DEBUG
+} else {
+ set _v8_smp_debug 0
+}
+
+# Common Definitions
+
+# CM3 the very first processor - all current SoCs have it.
+set CM3_CTIBASE {0x3C016000}
+
+# M3 power-ap unlock offsets
+set _m3_ap_unlock_offsets {0xf0 0x44}
+
+# All the ARMV8s are the next processors.
+# CL0,CORE0 CL0,CORE1 CL1,CORE0 CL1,CORE1
+set ARMV8_DBGBASE {0x90410000 0x90510000 0x90810000 0x90910000}
+set ARMV8_CTIBASE {0x90420000 0x90520000 0x90820000 0x90920000}
+
+# And we add up the R5s
+# (0)MCU 0 (1)MCU 1 (2)MAIN_0_0 (3)MAIN_0_1 (4)MAIN_1_0 (5)MAIN_1_1
+set R5_DBGBASE {0x9d010000 0x9d012000 0x9d410000 0x9d412000 0x9d510000 0x9d512000}
+set R5_CTIBASE {0x9d018000 0x9d019000 0x9d418000 0x9d419000 0x9d518000 0x9d519000}
+
+# Finally an M4F
+set CM4_CTIBASE {0x20001000}
+
+# M4 may be present on some very few SoCs
+set _mcu_m4_cores 0
+# M4 power-ap unlock offsets
+set _m4_ap_unlock_offsets {0xf0 0x60}
+
+# Set configuration overrides for each SOC
+switch $_soc {
+ am654 {
+ set _CHIPNAME am654
+ set _K3_DAP_TAPID 0x0bb5a02f
+
+ # AM654 has 2 clusters of 2 A53 cores each.
+ set _armv8_cpu_name a53
+ set _armv8_cores 4
+
+ # AM654 has 1 cluster of 2 R5s cores.
+ set _r5_cores 2
+ set _mcu_r5_cores 2
+ set _mcu_base_core_id 0
+ set _main0_r5_cores 0
+ set _main0_base_core_id 0
+ set _main1_r5_cores 0
+ set _main1_base_core_id 0
+
+ # M3 power-ap unlock offsets
+ set _m3_ap_unlock_offsets {0xf0 0x50}
+ }
+ am642 {
+ set _CHIPNAME am642
+ set _K3_DAP_TAPID 0x0bb3802f
+
+ # AM642 has 1 clusters of 2 A53 cores each.
+ set _armv8_cpu_name a53
+ set _armv8_cores 2
+ set ARMV8_DBGBASE {0x90010000 0x90110000}
+ set ARMV8_CTIBASE {0x90020000 0x90120000}
+
+ # AM642 has 2 cluster of 2 R5s cores.
+ set _r5_cores 4
+ set _mcu_r5_cores 0
+ set _mcu_base_core_id 0
+ set _main0_r5_cores 2
+ set _main0_base_core_id 0
+ set _main1_r5_cores 2
+ set _main1_base_core_id 2
+ set R5_DBGBASE {0x9d410000 0x9d412000 0x9d510000 0x9d512000}
+ set R5_CTIBASE {0x9d418000 0x9d419000 0x9d518000 0x9d519000}
+
+ # M4 processor
+ set _mcu_m4_cores 1
+ }
+ j721e {
+ set _CHIPNAME j721e
+ set _K3_DAP_TAPID 0x0bb6402f
+ # J721E has 1 cluster of 2 A72 cores.
+ set _armv8_cpu_name a72
+ set _armv8_cores 2
+
+ # J721E has 3 clusters of 2 R5 cores each.
+ set _r5_cores 6
+ set _mcu_r5_cores 2
+ set _mcu_base_core_id 0
+ set _main0_r5_cores 2
+ set _main0_base_core_id 2
+ set _main1_r5_cores 2
+ set _main1_base_core_id 4
+ }
+ j7200 {
+ set _CHIPNAME j7200
+ set _K3_DAP_TAPID 0x0bb6d02f
+
+ # J7200 has 1 cluster of 2 A72 cores.
+ set _armv8_cpu_name a72
+ set _armv8_cores 2
+
+ # J7200 has 2 clusters of 2 R5 cores each.
+ set _r5_cores 4
+ set _mcu_r5_cores 2
+ set _mcu_base_core_id 0
+ set _main0_r5_cores 2
+ set _main0_base_core_id 2
+ set _main1_r5_cores 0
+ set _main1_base_core_id 0
+ set R5_DBGBASE {0x9d010000 0x9d012000 0x9d110000 0x9d112000}
+ set R5_CTIBASE {0x9d018000 0x9d019000 0x9d118000 0x9d119000}
+
+ # M3 CTI base
+ set CM3_CTIBASE {0x20001000}
+ }
+ default {
+ echo "'$_soc' is invalid!"
+ }
+}
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_K3_DAP_TAPID -ignore-version
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+set _TARGETNAME $_CHIPNAME.cpu
+
+set _CTINAME $_CHIPNAME.cti
+
+# M3 is always present
+cti create $_CTINAME.m3 -dap $_CHIPNAME.dap -ap-num 7 -baseaddr [lindex $CM3_CTIBASE 0]
+target create $_TARGETNAME.m3 cortex_m -dap $_CHIPNAME.dap -ap-num 7 -defer-examine
+$_TARGETNAME.m3 configure -event reset-assert { }
+
+proc m3_up { args } {
+ # To access M3, we need to enable the JTAG access for the same.
+ # Ensure Power-AP unlocked
+ $::_CHIPNAME.dap apreg 3 [lindex $::_m3_ap_unlock_offsets 0] 0x00190000
+ $::_CHIPNAME.dap apreg 3 [lindex $::_m3_ap_unlock_offsets 1] 0x00102098
+
+ $::_TARGETNAME.m3 arp_examine
+}
+
+set _v8_smp_targets ""
+
+for { set _core 0 } { $_core < $_armv8_cores } { incr _core } {
+
+ cti create $_CTINAME.$_armv8_cpu_name.$_core -dap $_CHIPNAME.dap -ap-num 1 \
+ -baseaddr [lindex $ARMV8_CTIBASE $_core]
+
+ target create $_TARGETNAME.$_armv8_cpu_name.$_core aarch64 -dap $_CHIPNAME.dap \
+ -dbgbase [lindex $ARMV8_DBGBASE $_core] -cti $_CTINAME.$_armv8_cpu_name.$_core -defer-examine
+
+ set _v8_smp_targets "$_v8_smp_targets $_TARGETNAME.$_armv8_cpu_name.$_core"
+}
+
+# Setup ARMV8 proc commands based on CPU to prevent people confusing SoCs
+set _armv8_up_cmd "$_armv8_cpu_name"_up
+# Available if V8_SMP_DEBUG is set to non-zero value
+set _armv8_smp_cmd "$_armv8_cpu_name"_smp
+
+if { $_v8_smp_debug == 0 } {
+ proc $_armv8_up_cmd { args } {
+ foreach { _core } [set args] {
+ $::_TARGETNAME.$::_armv8_cpu_name.$_core arp_examine
+ $::_TARGETNAME.$::_armv8_cpu_name.$_core aarch64 dbginit
+ }
+ }
+} else {
+ proc $_armv8_smp_cmd { args } {
+ for { set _core 0 } { $_core < $::_armv8_cores } { incr _core } {
+ $::_TARGETNAME.$::_armv8_cpu_name.$_core arp_examine
+ $::_TARGETNAME.$::_armv8_cpu_name.$_core aarch64 dbginit
+ $::_TARGETNAME.$::_armv8_cpu_name.$_core aarch64 smp on
+ }
+ # Set Default target are core 0
+ targets $::_TARGETNAME.$::_armv8_cpu_name.0
+ }
+
+ # Declare SMP
+ target smp $:::_v8_smp_targets
+}
+
+for { set _core 0 } { $_core < $_r5_cores } { incr _core } {
+ cti create $_CTINAME.r5.$_core -dap $_CHIPNAME.dap -ap-num 1 \
+ -baseaddr [lindex $R5_CTIBASE $_core]
+
+ # inactive core examination will fail - wait till startup of additional core
+ target create $_TARGETNAME.r5.$_core cortex_r4 -dap $_CHIPNAME.dap \
+ -dbgbase [lindex $R5_DBGBASE $_core] -ap-num 1 -defer-examine
+}
+
+if { $_mcu_r5_cores != 0 } {
+ proc mcu_r5_up { args } {
+ foreach { _core } [set args] {
+ set _core [expr {$_core + $::_mcu_base_core_id}]
+ $::_TARGETNAME.r5.$_core arp_examine
+ $::_TARGETNAME.r5.$_core cortex_r4 dbginit
+ }
+ }
+}
+
+if { $_main0_r5_cores != 0 } {
+ proc main0_r5_up { args } {
+ foreach { _core } [set args] {
+ set _core [expr {$_core + $::_main0_base_core_id}]
+ $::_TARGETNAME.r5.$_core arp_examine
+ $::_TARGETNAME.r5.$_core cortex_r4 dbginit
+ }
+ }
+}
+
+if { $_main1_r5_cores != 0 } {
+ proc main1_r5_up { args } {
+ foreach { _core } [set args] {
+ set _core [expr {$_core + $::_main1_base_core_id}]
+ $::_TARGETNAME.r5.$_core arp_examine
+ $::_TARGETNAME.r5.$_core cortex_r4 dbginit
+ }
+ }
+}
+
+if { $_mcu_m4_cores != 0 } {
+ cti create $_CTINAME.m4 -dap $_CHIPNAME.dap -ap-num 8 -baseaddr [lindex $CM4_CTIBASE 0]
+ target create $_TARGETNAME.m4 cortex_m -dap $_CHIPNAME.dap -ap-num 8 -defer-examine
+ $_TARGETNAME.m4 configure -event reset-assert { }
+
+ proc m4_up { args } {
+ # To access M4, we need to enable the JTAG access for the same.
+ # Ensure Power-AP unlocked
+ $::_CHIPNAME.dap apreg 3 [lindex $::_m4_ap_unlock_offsets 0] 0x00190000
+ $::_CHIPNAME.dap apreg 3 [lindex $::_m4_ap_unlock_offsets 1] 0x00102098
+
+ $::_TARGETNAME.m4 arp_examine
+ }
+}
-----------------------------------------------------------------------
Summary of changes:
tcl/board/ti_am654evm.cfg | 24 +++++
tcl/target/ti_k3.cfg | 256 ++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 280 insertions(+)
create mode 100644 tcl/board/ti_am654evm.cfg
create mode 100644 tcl/target/ti_k3.cfg
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-03-07 12:50:16
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The annotated tag, v0.11.0 has been created
at 1b0194713f20b1fd6e3f52fc831d1452b2edb823 (tag)
tagging f342aac0845a69d591ad39a025d74e9c765f6420 (commit)
replaces v0.11.0-rc2
tagged by Paul Fertser
on Sun Mar 7 13:37:41 2021 +0300
- Log -----------------------------------------------------------------
The openocd-0.11.0 release.
Antonio Borneo (4):
steppenprobe: fix file permission
autotools: generate list of NEWS-xx file during configure
target: avoid polling during 'resumed' event handler
tcl/target/eos_s3: fix variable's expansion typo
Krzysztof Hockuba (1):
Fix jtag_usb_location_equal for path members > 9
Paul Fertser (2):
Restore +dev suffix
The openocd-0.11.0 release
Peter Mamonov (1):
target: use proper macro for parsing watchpoint address
Tarek BOCHKATI (1):
github: fix github wokflow while pushing a tag
Yasushi SHOJI (3):
doc: Fix type in Hooking up the JTAG Adapter
doc/manual: Fix @subpage handling
doc/manual: Fix function name typo
-----------------------------------------------------------------------
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-03-07 12:50:04
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 4307d93eb00ac27373c62f08b8547b993b66fe82 (commit)
via f342aac0845a69d591ad39a025d74e9c765f6420 (commit)
from 5f3bc3b279c648f5c751fcd4724206c6ce3e38c6 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 4307d93eb00ac27373c62f08b8547b993b66fe82
Author: Paul Fertser <fer...@gm...>
Date: Sun Mar 7 15:44:45 2021 +0300
Restore normal development cycle
Signed-off-by: Paul Fertser <fer...@gm...>
diff --git a/NEWS b/NEWS
index 4542aa28f..9db6c5fee 100644
--- a/NEWS
+++ b/NEWS
@@ -2,232 +2,29 @@ This file includes highlights of the changes made in the OpenOCD
source archive release.
JTAG Layer:
- * add debug level 4 for verbose I/O debug
- * bitbang, add read buffer to improve performance
- * Cadence SystemVerilog Direct Programming Interface (DPI) adapter driver
- * CMSIS-DAP v2 (USB bulk based) adapter driver
- * Cypress KitProg adapter driver
- * FTDI FT232R sync bitbang adapter driver
- * Linux GPIOD bitbang adapter driver through libgpiod
- * Mellanox rshim USB or PCIe adapter driver
- * Nuvoton Nu-Link and Nu-Link2 adapter drivers
- * NXP IMX GPIO mmap based adapter driver
- * ST-Link consolidate all versions in single config
- * ST-Link read properly old USB serial numbers
- * STLink/V3 support (for ST devices only !)
- * STM8 SWIM transport
- * TI XDS110 adapter driver
- * Xilinx XVC/PCIe adapter driver
Boundary Scan:
Target Layer:
- * 64 bit address support
- * ARCv2 target support
- * ARM Cortex-A hypervisor mode support
- * ARM Cortex-M fast PC sampling support for profiling
- * ARM generic CTI support
- * ARM generic mem-ap target support
- * ARMv7-A MMU tools
- * ARMv7m traces add TCP stream server
- * ARMv8 AARCH64 target support and semihosting support
- * ARMv8 AARCH64 disassembler support through capstone library
- * ARMv8-M target support
- * EnSilica eSi-RISC target support, including instruction tracing
- eSi-Trace support
- * MIPS64 target support
- * Motorola SREC S6 record image file support
- * RISC-V target support
- * SEGGER Real Time Transfer (RTT) initial support (for single target,
- Cortex-M only)
- * ST STM8 target support
- * Various MIPS32 target improvements
Flash Layer:
- * Atheros (ath79) SPI interface support
- * Atmel atmega128rfa1 support
- * Atmel SAM D21, D51, DA1, E51, E53, E54, G55, R30 support
- * Atmel SAMC2?N* support
- * Cypress PSoC5LP, PSoC6 support
- * EnSilica eSi-RISC support
- * Foshan Synwit Tech SWM050 support
- * Maxim Integrated MAX32XXX support
- * Nordic Semiconductor nRF51822, nRF52810, nRF52832 support
- * NXP Kinetis K27, K28, KE1x, KEAx, KL28, KL8x, KV5x, KWx support
- * Renesas RPC HF support
- * SH QSPI support
- * SiFive Freedom E support
- * Silicon Labs EFR-family, EZR32HG support
- * ST BlueNRG support
- * ST STM32 QUAD/OCTO-SPI interface support for Flash, FRAM and EEPROM
- * ST STM32F72x, STM32F4x3, STM32H7xx support
- * ST STM32G0xx, STM32G4xx, STM32L4x, STM32WB, STM32WL support
- * ST STM32L5x support (non secure mode)
- * TI CC13xx, CC26xx, CC32xx support
- * TI MSP432 support
- * Winner Micro w600 support
- * Xilinx XCF platform support
- * Various discrete SPI NOR flashes support
Board, Target, and Interface Configuration Scripts:
- * 8devices LIMA board config
- * Achilles Instant-Development Kit Arria 10 board config
- * Amazon Kindle 2 and DX board config
- * Analog Devices ADSP-SC58x, ADSP-SC584-EZBRD board config
- * Andes Technology ADP-XC7KFF676 board config
- * Andes Technology Corvette-F1 board config
- * ARM Musca A board config
- * Arty Spartan 7 FPGA board config
- * Atmel SAMD10 Xplained mini board config
- * Atmel SAMD11 Xplained Pro board config
- * Atmel SAM G55 Xplained Pro board config
- * AVNET UltraZED EG StarterKit board config
- * Blue Pill STM32F103C8 board config
- * DP Busblaster v4.1a board config
- * DPTechnics DPT-Board-v1 board config
- * Emcraft imx8 SOM BSB board config
- * Globalscale ESPRESSObin board config
- * Kasli board config
- * Kintex Ultrascale XCKU040 board config
- * Knovative KC-100 board config
- * LeMaker HiKey board config
- * Microchip (Atmel) SAME54 Xplained Pro board config
- * Microchip (Atmel) SAML11 Xplained Pro board config
- * Nordic module NRF52 board config
- * Numato Lab Mimas A7 board config
- * NXP Freedom FRDM-LS1012A board config
- * NXP IMX7SABRE board config
- * NXP IMX8MP-EVK board config
- * NXP MC-IMX8M-EVK board config
- * QuickLogic QuickFeather board config
- * Renesas R-Car E2, H2, M2 board config
- * Renesas R-Car Salvator-X(S) board config
- * Renesas RZ/A1H GR-Peach board config
- * Rigado BMD-300 board config
- * Sayma AMC board config
- * Sifive e31arty, e51arty, hifive1 board config
- * ST B-L475E-IOT01A board config
- * ST BlueNRG idb007v1, idb008v1, idb011v1 board config
- * ST STM32F412g discovery board config
- * ST STM32F413h discovery board config
- * ST STM32F469i discovery board config
- * ST STM32F7 Nucleo board config
- * ST STM32F723e discovery board config
- * ST STM32F746g discovery board config
- * ST STM32F769i discovery board config
- * ST STM32H735g discovery board config
- * ST STM32H743zi Nucleo board config
- * ST STM32H745i discovery board config
- * ST STM32H747i discovery board config
- * ST STM32H750b discovery board config
- * ST STM32H7b3i discovery board config
- * ST STM32H7x_dual_qspi board config
- * ST STM32H7x3i Eval boards config
- * ST STM32L073 Nucleo board config
- * ST STM32L476g discovery board config
- * ST STM32L496g discovery board config
- * ST STM32L4p5g discovery board config
- * ST STM32L4r9i discovery board config
- * ST STM32L5 Nucleo board config
- * ST STM32MP15x DK2 board config
- * ST STM32WB Nucleo board config
- * ST STM8L152R8 Nucleo board config
- * Synopsys DesignWare ARC EM board config
- * Synopsys DesignWare ARC HSDK board config
- * TI BeagleBone family boards config
- * TI CC13xx, CC26xx, CC32xx LaunchPad board config
- * TI MSP432 LaunchPad board config
- * Tocoding Poplar board config
- * TP-Link WDR4300 board config
- * Allwinner V3s target config
- * Andes Technology NDS V5 target config
- * Atmel atmega128rfa1 target config
- * ARM corelink SSE-200 target config
- * Atheros_ar9344 target config
- * Cypress PSoC5LP, PSoC6 target config
- * EnSilica eSi-RISC target config
- * Foshan Synwit Tech SWM050 target config
- * GigaDevice GD32VF103 target config
- * Hisilicon Hi3798 target config
- * Hisilicon Hi6220 target config
- * Infineon TLE987x target config
- * Marvell Armada 3700 target config
- * Maxim Integrated MAX32XXX target config
- * Mellanox BlueField target config
- * Microchip (Atmel) SAME5x, SAML1x target config
- * NXP IMX6SX, IMX6UL, IMX7, IMX7ULP, IMX8 target config
- * NXP Kinetis KE1xZ, KE1xF target config
- * NXP LPC84x, LPC8Nxx, LS1012A, NHS31xx target config
- * Qualcomm QCA4531 target config
- * QuickLogic EOS S3 target config
- * Renesas R-Car E2, H2, M2 target config
- * Renesas R-Car Gen3 target config
- * Renesas RZ/A1H target config
- * Rockchip RK3308 target config
- * ST BlueNRG target config
- * ST STM32G0, STM32G4, STM32H7, STM32L0, STM32L5 target config
- * ST STM32MP15x target config
- * ST STM32WBx, STM32WLEx target config
- * ST STM8L152, S003, S103, S105 target config
- * Synopsys DesignWare ARC EM target config
- * Synopsys DesignWare ARC HS Development Kit SoC target config
- * TI CC13xx, CC26xx, CC32xx target config
- * TI TNETC4401 target config
- * Xilinx UltraScale+ target config
- * Altera 5M570Z (MAXV family) CPLD config
- * Xilinx Ultrascale, XCF CPLD config
- * Intel (Altera) Arria10 FPGA config
- * Cadence SystemVerilog Direct Programming Interface (DPI) interface config
- * Cypress KitProg interface config
- * Digilent SMT2 NC interface config
- * DLN-2 example of Linux GPIOD interface config
- * FTDI C232HM interface config
- * HIE JTAG Debugger interface config
- * In-Circuit's ICprog interface config
- * isodebug isolated JTAG/SWD+UART interface config
- * Mellanox rshim USB or PCIe interface config
- * Nuvoton Nu-Link interface config
- * NXP IMX GPIO mmap based interface config
- * Steppenprobe open hardware interface config
- * TI XDS110 interface config
Server Layer:
- * 64 bit address support
- * default bind to IPv4 localhost
- * gdb: allow multiple connections
- * gdb: architecture element support
- * gdb: vCont, vRun support
- * telnet: handle Ctrl+A, Ctrl+E and Ctrl+K
RTOS:
- * Chromium-EC rtos support
- * hwthread pseudo rtos support
- * NuttX rtos support
- * RIOT rtos support
Documentation:
- * Improve STM32 flash driver
- * Various typo fix and improvements
Build and Release:
- * Add libutil to support jimtcl version 0.80
- * Clang warning fixes
- * GitHub workflow for Win32 snapshot binaries
- * Handle Tcl return values consistently
- * Mitigation for CVE-2018-5704: Prevent some forms of Cross
- Protocol Scripting attacks
- * Support for libftdi 1.5
- * Travis-CI basic support
- * Update libjaylink to version 0.2.0
- * Update jimtcl to version 0.79
- * Use external (optional) library capstone for ARM and AARCH64 disassembly
This release also contains a number of other important functional and
cosmetic bugfixes. For more details about what has changed since the
last release, see the git repository history:
-http://sourceforge.net/p/openocd/code/ci/v0.11.0/log/?path=
+http://sourceforge.net/p/openocd/code/ci/v0.x.0/log/?path=
For older NEWS, see the NEWS files associated with each release
diff --git a/NEWS b/NEWS-0.11.0
similarity index 100%
copy from NEWS
copy to NEWS-0.11.0
diff --git a/configure.ac b/configure.ac
index a5c9c9276..a74f319ba 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1,5 +1,5 @@
AC_PREREQ(2.64)
-AC_INIT([openocd], [0.11.0],
+AC_INIT([openocd], [0.11.0+dev],
[OpenOCD Mailing List <ope...@li...>])
AC_CONFIG_SRCDIR([src/openocd.c])
AC_CONFIG_AUX_DIR([.])
commit f342aac0845a69d591ad39a025d74e9c765f6420
Author: Paul Fertser <fer...@gm...>
Date: Sun Mar 7 13:36:49 2021 +0300
The openocd-0.11.0 release
Signed-off-by: Paul Fertser <fer...@gm...>
diff --git a/NEWS b/NEWS
index 36ee8fd2e..4542aa28f 100644
--- a/NEWS
+++ b/NEWS
@@ -227,7 +227,7 @@ This release also contains a number of other important functional and
cosmetic bugfixes. For more details about what has changed since the
last release, see the git repository history:
-http://sourceforge.net/p/openocd/code/ci/v0.11.0-rc2/log/?path=
+http://sourceforge.net/p/openocd/code/ci/v0.11.0/log/?path=
For older NEWS, see the NEWS files associated with each release
diff --git a/configure.ac b/configure.ac
index f1fa5875f..a5c9c9276 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1,5 +1,5 @@
AC_PREREQ(2.64)
-AC_INIT([openocd], [0.11.0-rc2+dev],
+AC_INIT([openocd], [0.11.0],
[OpenOCD Mailing List <ope...@li...>])
AC_CONFIG_SRCDIR([src/openocd.c])
AC_CONFIG_AUX_DIR([.])
-----------------------------------------------------------------------
Summary of changes:
NEWS | 205 +---------------------------------------------------
NEWS => NEWS-0.11.0 | 2 +-
configure.ac | 2 +-
3 files changed, 3 insertions(+), 206 deletions(-)
copy NEWS => NEWS-0.11.0 (99%)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-03-04 15:00:44
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 5f3bc3b279c648f5c751fcd4724206c6ce3e38c6 (commit)
from 23d8831391bbd167e0061388c87e7ecf7b9891a7 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 5f3bc3b279c648f5c751fcd4724206c6ce3e38c6
Author: Antonio Borneo <bor...@gm...>
Date: Wed Mar 3 21:57:33 2021 +0100
tcl/target/eos_s3: fix variable's expansion typo
TCL expands the variables only if preceded by a dollar sign.
Add the missing dollar before the variable's name '_CPUTAPID'.
Change-Id: Icc5d0dddf24f75d12ee63fee69e1b265e842ca43
Signed-off-by: Antonio Borneo <bor...@gm...>
Reported-by: Wes Cilldhaire <we...@so...>
Fixes: c3166b43e415 ("tcl/target: Add QuickLogic EOS S3 MCU configuration")
Reviewed-on: http://openocd.zylin.com/6079
Tested-by: jenkins
Reviewed-by: TM <tom...@ho...>
diff --git a/tcl/target/eos_s3.cfg b/tcl/target/eos_s3.cfg
index f6016fb30..150ef4e31 100644
--- a/tcl/target/eos_s3.cfg
+++ b/tcl/target/eos_s3.cfg
@@ -26,7 +26,7 @@ if { [info exists CPUTAPID] } {
}
}
-swj_newdap $_CHIPNAME cpu -irlen 4 -irmask 0xf -expected-id _CPUTAPID
+swj_newdap $_CHIPNAME cpu -irlen 4 -irmask 0xf -expected-id $_CPUTAPID
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
set _TARGETNAME $_CHIPNAME.cpu
-----------------------------------------------------------------------
Summary of changes:
tcl/target/eos_s3.cfg | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-03-04 14:59:45
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 23d8831391bbd167e0061388c87e7ecf7b9891a7 (commit)
from ba0f382137749b78b27ac58238735cc20a6fa847 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 23d8831391bbd167e0061388c87e7ecf7b9891a7
Author: Antonio Borneo <bor...@gm...>
Date: Fri Feb 26 22:35:39 2021 +0100
target: avoid polling during 'resumed' event handler
OpenOCD is based on a single main loop that schedules all the
activities.
At the execution of a TCL command, the timestamp is checked to
eventually trigger the polling of the targets. This means that by
executing a TCL command the polling can be triggered and detect a
change of target's state.
When openocd 'resumes' a target, the target can halt again by
hitting a breakpoint.
The 'resumed' event handler is started just after the target has
been resumed, but it triggers a polling before the execution of
its very first instruction.
If the polling finds the target halted, it will run the 'halted'
event handler, that will then be executed 'before' the pending
'resumed' handler.
In case of gdb, a 'continue' command will restart the target but,
polling (and halt detection) executed before the end of the resume
process will hide the halt. As a consequence, the gdb will not be
informed of the halt and will remains waiting as if the target is
still running without showing the prompt.
This can be verified by running on the target a firmware with a
loop, run openocd with a dummy 'resumed' event, and let gdb to set
a breakpoint in the loop. A 'continue' command will cause the
target to halt again by hitting the breakpoint at the next loop
iteration, but gdb will loose it and will not return the prompt.
openocd -f board/st_nucleo_f4.cfg -c \
'stm32f4x.cpu configure -event resumed {echo hello}'
arm-none-eabi-gdb -ex 'target remote :3333' -ex 'b *$pc' -ex c
Disable the polling while executing target's resume().
Document it and provide hints to developers to cope with future
implementation.
Change-Id: I3be830a8e7c2ef6278617cb4547a4d676b0ddeb5
Signed-off-by: Antonio Borneo <bor...@gm...>
Reported-by: ÐабиÑов ÐлекÑÐ°Ð½Ð´Ñ Ð¤Ð°ÑиÑÐ¾Ð²Ð¸Ñ <ga...@pl...>
Reviewed-on: http://openocd.zylin.com/6074
Reviewed-by: Tomas Vanek <va...@fb...>
Tested-by: jenkins
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 4b31cbd0f..a5b94362f 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -5035,6 +5035,19 @@ when reset disables PLLs needed to use a fast clock.
@* After target hardware trace configuration was changed
@end itemize
+@quotation Note
+OpenOCD events are not supposed to be preempt by another event, but this
+is not enforced in current code. Only the target event @b{resumed} is
+executed with polling disabled; this avoids polling to trigger the event
+@b{halted}, reversing the logical order of execution of their handlers.
+Future versions of OpenOCD will prevent the event preemption and will
+disable the schedule of polling during the event execution. Do not rely
+on polling in any event handler; this means, don't expect the status of
+a core to change during the execution of the handler. The event handler
+will have to enable polling or use @command{$target_name arp_poll} to
+check if the core has changed status.
+@end quotation
+
@node Flash Commands
@chapter Flash Commands
diff --git a/src/target/target.c b/src/target/target.c
index 033fc0714..cab84b06b 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -637,7 +637,18 @@ int target_resume(struct target *target, int current, target_addr_t address,
* we poll. The CPU can even halt at the current PC as a result of
* a software breakpoint being inserted by (a bug?) the application.
*/
+ /*
+ * resume() triggers the event 'resumed'. The execution of TCL commands
+ * in the event handler causes the polling of targets. If the target has
+ * already halted for a breakpoint, polling will run the 'halted' event
+ * handler before the pending 'resumed' handler.
+ * Disable polling during resume() to guarantee the execution of handlers
+ * in the correct order.
+ */
+ bool save_poll = jtag_poll_get_enabled();
+ jtag_poll_set_enabled(false);
retval = target->type->resume(target, current, address, handle_breakpoints, debug_execution);
+ jtag_poll_set_enabled(save_poll);
if (retval != ERROR_OK)
return retval;
-----------------------------------------------------------------------
Summary of changes:
doc/openocd.texi | 13 +++++++++++++
src/target/target.c | 11 +++++++++++
2 files changed, 24 insertions(+)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-02-13 13:09:50
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via ba0f382137749b78b27ac58238735cc20a6fa847 (commit)
via 54ef790149918df40e6bc2220ffd52ade1b9669b (commit)
from 84a2302af790d28f5dd7e03620703710300305f1 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit ba0f382137749b78b27ac58238735cc20a6fa847
Author: Antonio Borneo <bor...@gm...>
Date: Thu Feb 11 19:47:46 2021 +0100
autotools: generate list of NEWS-xx file during configure
Commit 4fc0f3530c51 ("Makefile.am: fix non-POSIX warning from
automake") uses the BSD make extension '!=' to generate the list
of files NEWS-xx, but it's not POSIX (yet), it's not backward
compatible with GNU make 3.82 (used in CentOS 7, EOL scheduled for
2024) and depending on automake evolution it could trigger again
the warning 'apparently' just fixed.
Move in configure the generation of the file list.
The only drawback is that when a developer adds a new NEWS-xx
file, he/she has to run configure again before 'make distcheck',
otherwise will get failure.
Change-Id: Ia97e7f4e612655a97702f95e8451040539659b85
Signed-off-by: Antonio Borneo <bor...@gm...>
Reported-by: Jan Matyáš <jm...@co...>
Reviewed-on: http://openocd.zylin.com/6054
Tested-by: jenkins
Reviewed-by: Jan Matyas <ma...@co...>
Reviewed-by: Andreas Fritiofson <and...@gm...>
diff --git a/Makefile.am b/Makefile.am
index a6e7ab232..75f0c0993 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -42,7 +42,6 @@ if INTERNAL_JIMTCL
AM_CPPFLAGS += -I$(top_srcdir)/jimtcl \
-I$(top_builddir)/jimtcl
endif
-EXTRA_DIST_NEWS != ls $(srcdir)/NEWS-*
EXTRA_DIST += \
BUGS \
HACKING \
diff --git a/configure.ac b/configure.ac
index 158ba1599..f1fa5875f 100644
--- a/configure.ac
+++ b/configure.ac
@@ -854,6 +854,8 @@ AS_IF([test "x$gcc_warnings" = "xyes"], [
AC_SUBST([GCC_WARNINGS], [$GCC_WARNINGS])
])
+AC_SUBST(EXTRA_DIST_NEWS, ["$(echo $srcdir/NEWS-*)"])
+
AC_CONFIG_FILES([
Makefile
])
commit 54ef790149918df40e6bc2220ffd52ade1b9669b
Author: Peter Mamonov <pma...@gm...>
Date: Mon Oct 12 15:02:44 2020 +0300
target: use proper macro for parsing watchpoint address
Currently wp/rwp commands fail on 64-bit targets:
> wp 0xffffffff80001400 4
addr option value ('0xffffffff80001400') is not valid
Change-Id: I94d4af906b02b7bd463c8d79a6235a3646dfc434
Signed-off-by: Peter Mamonov <pma...@gm...>
Reviewed-on: http://openocd.zylin.com/6058
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <and...@gm...>
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/target/target.c b/src/target/target.c
index fa98c884b..033fc0714 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -4056,7 +4056,7 @@ COMMAND_HANDLER(handle_wp_command)
}
enum watchpoint_rw type = WPT_ACCESS;
- uint32_t addr = 0;
+ target_addr_t addr = 0;
uint32_t length = 0;
uint32_t data_value = 0x0;
uint32_t data_mask = 0xffffffff;
@@ -4086,7 +4086,7 @@ COMMAND_HANDLER(handle_wp_command)
/* fall through */
case 2:
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], length);
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], addr);
+ COMMAND_PARSE_ADDRESS(CMD_ARGV[0], addr);
break;
default:
@@ -4106,8 +4106,8 @@ COMMAND_HANDLER(handle_rwp_command)
if (CMD_ARGC != 1)
return ERROR_COMMAND_SYNTAX_ERROR;
- uint32_t addr;
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], addr);
+ target_addr_t addr;
+ COMMAND_PARSE_ADDRESS(CMD_ARGV[0], addr);
struct target *target = get_current_target(CMD_CTX);
watchpoint_remove(target, addr);
-----------------------------------------------------------------------
Summary of changes:
Makefile.am | 1 -
configure.ac | 2 ++
src/target/target.c | 8 ++++----
3 files changed, 6 insertions(+), 5 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-02-13 13:09:13
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via 84a2302af790d28f5dd7e03620703710300305f1 (commit)
from f68ade529a9ec68032e23c8d3c75c36179b4103f (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 84a2302af790d28f5dd7e03620703710300305f1
Author: Krzysztof Hockuba <krz...@it...>
Date: Wed Feb 3 23:01:29 2021 +0100
Fix jtag_usb_location_equal for path members > 9
In case an USB location path contains path members
larger than 9. The string_length variable is regardless
decremented by 2 with assumption that the member is
one digit length. For exmaple 1-12.2 will fail.
This patch uses strlen to calculate
digits in a path member.
Change-Id: I9c26a04d0c6af13fec65157f222599497294e2b2
Signed-off-by: Krzysztof Hockuba <krz...@ho...>
Reviewed-on: http://openocd.zylin.com/6048
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/src/jtag/drivers/jtag_usb_common.c b/src/jtag/drivers/jtag_usb_common.c
index 969ea8406..309f8c462 100644
--- a/src/jtag/drivers/jtag_usb_common.c
+++ b/src/jtag/drivers/jtag_usb_common.c
@@ -50,7 +50,7 @@ bool jtag_usb_location_equal(uint8_t dev_bus, uint8_t *port_path,
goto done;
}
- string_length -= 1;
+ string_length -= strnlen(ptr, string_length);
/* check bus mismatch */
if (atoi(ptr) != dev_bus)
goto done;
@@ -68,7 +68,7 @@ bool jtag_usb_location_equal(uint8_t dev_bus, uint8_t *port_path,
break;
path_step++;
- string_length -= 2;
+ string_length -= strnlen(ptr, string_length) + 1;
};
/* walked the full path, all elements match */
-----------------------------------------------------------------------
Summary of changes:
src/jtag/drivers/jtag_usb_common.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
|
From: OpenOCD-Gerrit <ope...@us...> - 2021-02-03 17:19:56
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".
The branch, master has been updated
via f68ade529a9ec68032e23c8d3c75c36179b4103f (commit)
via 8a2f2993da3601b22640f9e53ed4c586d0f9db20 (commit)
from 992508cb805af8a2437977aa1ed61a63a622cdb7 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit f68ade529a9ec68032e23c8d3c75c36179b4103f
Author: Yasushi SHOJI <ya...@sp...>
Date: Thu Jan 28 23:40:52 2021 +0900
doc/manual: Fix function name typo
We have both the singular form, register_command(), and the plural form
register_commands().
Change-Id: I905ea83988b8ac70dd809b02d53b646aa4d66697
Signed-off-by: Yasushi SHOJI <ya...@sp...>
Reviewed-on: http://openocd.zylin.com/6042
Reviewed-by: Antonio Borneo <bor...@gm...>
Tested-by: jenkins
diff --git a/doc/manual/helper.txt b/doc/manual/helper.txt
index 1b01b2e6b..d5710ddde 100644
--- a/doc/manual/helper.txt
+++ b/doc/manual/helper.txt
@@ -89,7 +89,7 @@ mode(s) of execution, and strings that provide usage and help text.
A single handler may be registered using multiple names, but any name
may have only one handler associated with it.
-The @c register_commands() and @c register_commands() functions provide
+The @c register_command() and @c register_commands() functions provide
registration, while the @c unregister_command() and
@c unregister_all_commands() functions will remove existing commands.
These may be called at any time, allowing the command set to change in
commit 8a2f2993da3601b22640f9e53ed4c586d0f9db20
Author: Yasushi SHOJI <ya...@sp...>
Date: Thu Jan 28 23:31:41 2021 +0900
doc/manual: Fix @subpage handling
The subpage "thelist" used to have a title "Pending and Open Tasks"
but the commit c41db358a0100ab changed it to "The List". With
@subpage, it now renders:
"The List of The List enumerates opportunities for"
instead of
"The List of Pending and Open Tasks enumerates opportunities for"
This commit fix it to
"The List enumerates opportunities for"
Change-Id: Ifee0dcd9b3c9f7e651a8748a7afda99eedea3c5c
Signed-off-by: Yasushi SHOJI <ya...@sp...>
Reviewed-on: http://openocd.zylin.com/6041
Tested-by: jenkins
Reviewed-by: Antonio Borneo <bor...@gm...>
diff --git a/doc/manual/main.txt b/doc/manual/main.txt
index c14096b57..14c64c2e7 100644
--- a/doc/manual/main.txt
+++ b/doc/manual/main.txt
@@ -9,7 +9,7 @@ and processes that have been developed by and for the OpenOCD community.
Developers that want to contribute to OpenOCD should read the following
sections before starting work:
-- The List of @subpage thelist enumerates opportunities for improving or
+- @subpage thelist enumerates opportunities for improving or
extending the OpenOCD platform. If your ideas are on The List, you might
check the mailing list archives to find the status of your feature (or bug).
- The @subpage styleguide provides rules that developers should
-----------------------------------------------------------------------
Summary of changes:
doc/manual/helper.txt | 2 +-
doc/manual/main.txt | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
hooks/post-receive
--
Main OpenOCD repository
|
