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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.11.0-158-gd3a859cc4

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- Log -----------------------------------------------------------------
commit d3a859cc448441a0220287bfeecd0fab72cb31ca
Author: Antonio Borneo <bor...@gm...>
Date:   Sun May 16 01:43:44 2021 +0200

    cmsis_dap: fix build on macOS
    
    Compile fails with error:
            src/jtag/drivers/cmsis_dap.c:683:28: error: format specifies type
                'unsigned char' but the argument has type 'int' [-Werror,-Wformat]
                                     " received 0x%" PRIx8, CMD_DAP_TFER, resp[0]);
            ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~
    
    Fix the format specifier.
    
    Change-Id: I0a5a1a35452d634019989d14d849501fb8a7e93a
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: http://openocd.zylin.com/6255
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/jtag/drivers/cmsis_dap.c b/src/jtag/drivers/cmsis_dap.c
index 26e576b8e..927b33bd7 100644
--- a/src/jtag/drivers/cmsis_dap.c
+++ b/src/jtag/drivers/cmsis_dap.c
@@ -679,8 +679,8 @@ static void cmsis_dap_swd_read_process(struct cmsis_dap *dap, int timeout_ms)
 
 	uint8_t *resp = dap->response;
 	if (resp[0] != CMD_DAP_TFER) {
-		LOG_ERROR("CMSIS-DAP command mismatch. Expected 0x%" PRIx8
-			 " received 0x%" PRIx8, CMD_DAP_TFER, resp[0]);
+		LOG_ERROR("CMSIS-DAP command mismatch. Expected 0x%x received 0x%" PRIx8,
+			CMD_DAP_TFER, resp[0]);
 		queued_retval = ERROR_FAIL;
 		goto skip;
 	}

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/cmsis_dap.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)


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- Log -----------------------------------------------------------------
commit d7558e2ed67000afc2fa344e3acf67899fc3cebf
Author: Tomas Vanek <va...@fb...>
Date:   Sun May 16 10:05:02 2021 +0200

    target/armv7m: fix static analyzer warning
    
    Despite of assert(is_packed) clang static analyser complains on use
    of the uninitialized offset variable.
    
    Cross compiling with latest x86_64-w64-mingw32-gcc hits warnings
            src/target/armv7m.c: In function ‘armv7m_read_core_reg’:
            src/target/armv7m.c:337:54: error: ‘reg32_id’ may be used
                uninitialized in this function [-Werror=maybe-uninitialized]
    
    It happens because mingw32 defines assert() without the attribute
    "noreturn", whatever NDEBUG is defined or not.
    
    Replace assert(is_packed) by if (is_packed) conditional and call
    assert(false) in the else branch.
    
    Change-Id: Id3c7dcccb65106e28be200b9a4d2b642f4d31019
    Signed-off-by: Tomas Vanek <va...@fb...>
    Reviewed-on: http://openocd.zylin.com/6256
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Reviewed-by: Tarek BOCHKATI <tar...@gm...>
    Reviewed-by: Andrzej Sierżęga <as...@gm...>

diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index 2bcb8abae..11770b5b5 100644
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -329,11 +329,17 @@ static int armv7m_read_core_reg(struct target *target, struct reg *r,
 
 	if (r->size <= 8) {
 		/* any 8-bit or shorter register is packed */
-		uint32_t offset = 0;	/* silence false gcc warning */
+		uint32_t offset;
 		unsigned int reg32_id;
 
 		bool is_packed = armv7m_map_reg_packing(num, &reg32_id, &offset);
-		assert(is_packed);
+		if (!is_packed) {
+			/* We should not get here as all 8-bit or shorter registers
+			 * are packed */
+			assert(false);
+			/* assert() does nothing if NDEBUG is defined */
+			return ERROR_FAIL;
+		}
 		struct reg *r32 = &armv7m->arm.core_cache->reg_list[reg32_id];
 
 		/* Read 32-bit container register if not cached */
@@ -394,11 +400,17 @@ static int armv7m_write_core_reg(struct target *target, struct reg *r,
 
 	if (r->size <= 8) {
 		/* any 8-bit or shorter register is packed */
-		uint32_t offset = 0;	/* silence false gcc warning */
+		uint32_t offset;
 		unsigned int reg32_id;
 
 		bool is_packed = armv7m_map_reg_packing(num, &reg32_id, &offset);
-		assert(is_packed);
+		if (!is_packed) {
+			/* We should not get here as all 8-bit or shorter registers
+			 * are packed */
+			assert(false);
+			/* assert() does nothing if NDEBUG is defined */
+			return ERROR_FAIL;
+		}
 		struct reg *r32 = &armv7m->arm.core_cache->reg_list[reg32_id];
 
 		if (!r32->valid) {

-----------------------------------------------------------------------

Summary of changes:
 src/target/armv7m.c | 20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)


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- Log -----------------------------------------------------------------
commit bbbfddc3efd4a93b0c9489c2537efbaa117bcfb0
Author: Antonio Borneo <bor...@gm...>
Date:   Thu May 13 16:03:22 2021 +0200

    jimtcl: restrict memory leak workaround on Linux only
    
    The workaround for jimtcl 0.80 in commit 36ae487ed04b ("jimtcl:
    add temporary workaround for memory leak in jimtcl 0.80") issues a
    compile time error on macOS:
            ../src/helper/command.c:157:22: error: aliases are not
            supported on darwin
            __attribute__((weak, alias("workaround_createcommand")));
    The OS is x86_64-apple-darwin19.6.0 and the compiler used is
    x86_64-apple-darwin13.4.0-clang.
    
    Restrict the workaround on Linux host only. The fix for 'expr'
    syntax change is already merged and the workaround will be dropped
    soon.
    
    Change-Id: I925109a9c57c05f8c95b70bc7d6604eb1172cd79
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reported-by: Adam Jeliński <aje...@us...>
    Fixes: 36ae487ed04b ("jimtcl: add temporary workaround for memory leak in jimtcl 0.80")
    Fixes: https://sourceforge.net/p/openocd/tickets/304/
    Reviewed-on: http://openocd.zylin.com/6241
    Tested-by: jenkins

diff --git a/src/helper/command.c b/src/helper/command.c
index 0c6e785f2..3a931b5a7 100644
--- a/src/helper/command.c
+++ b/src/helper/command.c
@@ -144,12 +144,13 @@ static void command_log_capture_finish(struct log_capture_state *state)
  * Use the internal jimtcl API Jim_CreateCommandObj, not exported by jim.h,
  * and override the bugged API through preprocessor's macro.
  * This workaround works only when jimtcl is compiled as OpenOCD submodule.
+ * It's broken on macOS, so it's currently restricted on Linux only.
  * If jimtcl is linked-in from a precompiled library, either static or dynamic,
  * the symbol Jim_CreateCommandObj is not exported and the build will use the
  * bugged API.
  * To be removed when OpenOCD will switch to jimtcl 0.81
  */
-#if JIM_VERSION == 80
+#if JIM_VERSION == 80 && defined __linux__
 static int workaround_createcommand(Jim_Interp *interp, const char *cmdName,
 	Jim_CmdProc *cmdProc, void *privData, Jim_DelCmdProc *delProc);
 int Jim_CreateCommandObj(Jim_Interp *interp, Jim_Obj *cmdNameObj,
@@ -168,7 +169,7 @@ static int workaround_createcommand(Jim_Interp *interp, const char *cmdName,
 	return retval;
 }
 #define Jim_CreateCommand workaround_createcommand
-#endif /* JIM_VERSION == 80 */
+#endif /* JIM_VERSION == 80 && defined __linux__*/
 /* FIXME: end of workaround for memory leak in jimtcl 0.80 */
 
 static int command_retval_set(Jim_Interp *interp, int retval)

-----------------------------------------------------------------------

Summary of changes:
 src/helper/command.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)


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commit b392ba466c98642f6e470dcbfdf0339c827fd06d
Author: Yasushi SHOJI <ya...@sp...>
Date:   Thu May 13 21:07:02 2021 +0900

    server: gdb_server: Add colon for target extended-remote
    
    Both GDB commands "target remote" and "target extended-remote" require
    to have ":" right before port number.
    
    e.g.
        (gdb) target extended-remote :3333
    
    Add ":" to the warning message so that users can copy & past it.
    
    Change-Id: Id6d8ec1e4dfd3c12cb7f3b314064f2c35fa7ab55
    Signed-off-by: Yasushi SHOJI <ya...@sp...>
    Reviewed-on: http://openocd.zylin.com/6237
    Reviewed-by: Tarek BOCHKATI <tar...@gm...>
    Tested-by: jenkins
    Reviewed-by: Marc Schink <de...@za...>
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c
index 002b5873b..00c04e363 100644
--- a/src/server/gdb_server.c
+++ b/src/server/gdb_server.c
@@ -3315,7 +3315,7 @@ static int gdb_input_inner(struct connection *connection)
 					/* '?' is sent after the eventual '!' */
 					if (!warn_use_ext && !gdb_con->extended_protocol) {
 						warn_use_ext = true;
-						LOG_WARNING("Prefer GDB command \"target extended-remote %s\" instead of \"target remote %s\"",
+						LOG_WARNING("Prefer GDB command \"target extended-remote :%s\" instead of \"target remote :%s\"",
 									connection->service->port, connection->service->port);
 					}
 					break;

-----------------------------------------------------------------------

Summary of changes:
 src/server/gdb_server.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)


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commit d624da96a96287e6e4a192c3bfecd2d45d4c0a82
Author: Tarek BOCHKATI <tar...@gm...>
Date:   Mon May 10 10:46:20 2021 +0100

    target/armv7m.h: [style] replace tab with space between variable type and name
    
    Change-Id: I9740c25857295a2a655d3046322a3f23f0ee7f78
    Signed-off-by: Tarek BOCHKATI <tar...@gm...>
    Reviewed-on: http://openocd.zylin.com/6230
    Reviewed-by: Marc Schink <de...@za...>
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/target/armv7m.h b/src/target/armv7m.h
index 588470f11..f3445e152 100644
--- a/src/target/armv7m.h
+++ b/src/target/armv7m.h
@@ -228,7 +228,7 @@ enum {
 #define ARMV7M_COMMON_MAGIC 0x2A452A45
 
 struct armv7m_common {
-	struct arm	arm;
+	struct arm arm;
 
 	int common_magic;
 	int exception_number;

-----------------------------------------------------------------------

Summary of changes:
 src/target/armv7m.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)


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commit 77b28ced14321fbedb9493729a377856bab28144
Author: Evgeniy Didin <di...@sy...>
Date:   Tue Feb 16 21:53:41 2021 +0300

    rtos: Add support for Zephyr RTOS
    
    With this patch, the Zephyr[1] RTOS is supported by OpenOCD.
    
    As usual with support for other RTOSes, Zephyr must be compiled with
    the DEBUG_THREAD_INFO option. This will generate some symbols
    with information needed in order to build the list of threads.
    
    The current implementation is limited to Zephyr running on ARM
    Cortex-M processors. This is the only ARM variant supported by Zephyr
    at the moment and is used on most of the officially supported boards.
    
    [1] https://www.zephyrproject.org/
    
    Change-Id: I22afdbec91562f3a22cf5b88cd4ea3a7a59ba0b4
    Signed-off-by: Evgeniy Didin <di...@sy...>
    Signed-off-by: Leandro Pereira <lea...@in...>
    Signed-off-by: Daniel Glöckner <dg...@em...>
    Reviewed-on: http://openocd.zylin.com/4988
    Tested-by: jenkins
    Reviewed-by: Oleksij Rempel <li...@re...>
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 6614f4832..fc448339f 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -4681,7 +4681,7 @@ The value should normally correspond to a static mapping for the
 @var{rtos_type} can be one of @option{auto}, @option{eCos},
 @option{ThreadX}, @option{FreeRTOS}, @option{linux}, @option{ChibiOS},
 @option{embKernel}, @option{mqx}, @option{uCOS-III}, @option{nuttx},
-@option{RIOT}
+@option{RIOT}, @option{Zephyr}
 @xref{gdbrtossupport,,RTOS Support}.
 
 @item @code{-defer-examine} -- skip target examination at initial JTAG chain
@@ -10950,6 +10950,7 @@ Currently supported rtos's include:
 @item @option{nuttx}
 @item @option{RIOT}
 @item @option{hwthread} (This is not an actual RTOS. @xref{usingopenocdsmpwithgdb,,Using OpenOCD SMP with GDB}.)
+@item @option{Zephyr}
 @end itemize
 
 Before an RTOS can be detected, it must export certain symbols; otherwise, it cannot
@@ -10984,12 +10985,17 @@ g_readytorun, g_tasklisttable.
 sched_threads, sched_num_threads, sched_active_pid, max_threads,
 _tcb_name_offset.
 @end raggedright
+@item Zephyr symbols
+_kernel, _kernel_openocd_offsets, _kernel_openocd_size_t_size
 @end table
 
 For most RTOS supported the above symbols will be exported by default. However for
-some, eg. FreeRTOS and uC/OS-III, extra steps must be taken.
+some, eg. FreeRTOS, uC/OS-III and Zephyr, extra steps must be taken.
 
-These RTOSes may require additional OpenOCD-specific file to be linked
+Zephyr must be compiled with the DEBUG_THREAD_INFO option. This will generate some symbols
+with information needed in order to build the list of threads.
+
+FreeRTOS and uC/OS-III RTOSes may require additional OpenOCD-specific file to be linked
 along with the project:
 
 @table @code
diff --git a/src/rtos/Makefile.am b/src/rtos/Makefile.am
index de54596cd..49cb830e5 100644
--- a/src/rtos/Makefile.am
+++ b/src/rtos/Makefile.am
@@ -19,6 +19,7 @@ noinst_LTLIBRARIES += %D%/librtos.la
 	%D%/uCOS-III.c \
 	%D%/nuttx.c \
 	%D%/hwthread.c \
+	%D%/zephyr.c \
 	%D%/riot.c \
 	%D%/rtos.h \
 	%D%/rtos_standard_stackings.h \
diff --git a/src/rtos/rtos.c b/src/rtos/rtos.c
index 91d9379f3..fdb3862d8 100644
--- a/src/rtos/rtos.c
+++ b/src/rtos/rtos.c
@@ -39,6 +39,7 @@ extern struct rtos_type uCOS_III_rtos;
 extern struct rtos_type nuttx_rtos;
 extern struct rtos_type hwthread_rtos;
 extern struct rtos_type riot_rtos;
+extern struct rtos_type zephyr_rtos;
 
 static struct rtos_type *rtos_types[] = {
 	&ThreadX_rtos,
@@ -52,6 +53,7 @@ static struct rtos_type *rtos_types[] = {
 	&uCOS_III_rtos,
 	&nuttx_rtos,
 	&riot_rtos,
+	&zephyr_rtos,
 	/* keep this as last, as it always matches with rtos auto */
 	&hwthread_rtos,
 	NULL
diff --git a/src/rtos/zephyr.c b/src/rtos/zephyr.c
new file mode 100644
index 000000000..e5d683507
--- /dev/null
+++ b/src/rtos/zephyr.c
@@ -0,0 +1,788 @@
+/***************************************************************************
+ *   Copyright (C) 2017 by Intel Corporation
+ *   Leandro Pereira <lea...@in...>
+ *   Daniel Glöckner <dg...@em...>*
+ *   Copyright (C) 2021 by Synopsys, Inc.
+ *   Evgeniy Didin <di...@sy...>
+ *                                                                         *
+ *   SPDX-License-Identifier: GPL-2.0-or-later                             *
+ ***************************************************************************/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <helper/time_support.h>
+#include <jtag/jtag.h>
+
+#include "helper/log.h"
+#include "helper/types.h"
+#include "rtos.h"
+#include "rtos_standard_stackings.h"
+#include "target/target.h"
+#include "target/target_type.h"
+#include "target/armv7m.h"
+#include "target/arc.h"
+
+#define UNIMPLEMENTED 0xFFFFFFFFU
+
+/* ARC specific defines */
+#define ARC_AUX_SEC_BUILD_REG 0xdb
+#define ARC_REG_NUM 38
+
+/* ARM specific defines */
+#define ARM_XPSR_OFFSET 28
+
+struct zephyr_thread {
+	uint32_t ptr, next_ptr;
+	uint32_t entry;
+	uint32_t stack_pointer;
+	uint8_t state;
+	uint8_t user_options;
+	int8_t prio;
+	char name[64];
+};
+
+enum zephyr_offsets {
+	OFFSET_VERSION,
+	OFFSET_K_CURR_THREAD,
+	OFFSET_K_THREADS,
+	OFFSET_T_ENTRY,
+	OFFSET_T_NEXT_THREAD,
+	OFFSET_T_STATE,
+	OFFSET_T_USER_OPTIONS,
+	OFFSET_T_PRIO,
+	OFFSET_T_STACK_POINTER,
+	OFFSET_T_NAME,
+	OFFSET_T_ARCH,
+	OFFSET_T_PREEMPT_FLOAT,
+	OFFSET_T_COOP_FLOAT,
+	OFFSET_MAX
+};
+
+struct zephyr_params {
+	const char *target_name;
+	uint8_t size_width;
+	uint8_t pointer_width;
+	uint32_t num_offsets;
+	uint32_t offsets[OFFSET_MAX];
+	const struct rtos_register_stacking *callee_saved_stacking;
+	const struct rtos_register_stacking *cpu_saved_nofp_stacking;
+	const struct rtos_register_stacking *cpu_saved_fp_stacking;
+	int (*get_cpu_state)(struct rtos *rtos, target_addr_t *addr,
+			struct zephyr_params *params,
+			struct rtos_reg *callee_saved_reg_list,
+			struct rtos_reg **reg_list, int *num_regs);
+};
+
+static const struct stack_register_offset arm_callee_saved[] = {
+	{ ARMV7M_R13, 32, 32 },
+	{ ARMV7M_R4,  0,  32 },
+	{ ARMV7M_R5,  4,  32 },
+	{ ARMV7M_R6,  8,  32 },
+	{ ARMV7M_R7,  12, 32 },
+	{ ARMV7M_R8,  16, 32 },
+	{ ARMV7M_R9,  20, 32 },
+	{ ARMV7M_R10, 24, 32 },
+	{ ARMV7M_R11, 28, 32 },
+};
+
+static const struct stack_register_offset arc_callee_saved[] = {
+	{ ARC_R13,  0,  32 },
+	{ ARC_R14,  4,  32 },
+	{ ARC_R15,  8,  32 },
+	{ ARC_R16,  12,  32 },
+	{ ARC_R17,  16,  32 },
+	{ ARC_R18,  20,  32 },
+	{ ARC_R19,  24,  32 },
+	{ ARC_R20,  28,  32 },
+	{ ARC_R21,  32,  32 },
+	{ ARC_R22,  36,  32 },
+	{ ARC_R23,  40,  32 },
+	{ ARC_R24,  44,  32 },
+	{ ARC_R25,  48,  32 },
+	{ ARC_GP,  52,  32 },
+	{ ARC_FP,  56,  32 },
+	{ ARC_R30,  60,  32 }
+};
+static const struct rtos_register_stacking arm_callee_saved_stacking = {
+	.stack_registers_size = 36,
+	.stack_growth_direction = -1,
+	.num_output_registers = ARRAY_SIZE(arm_callee_saved),
+	.register_offsets = arm_callee_saved,
+};
+
+static const struct rtos_register_stacking arc_callee_saved_stacking = {
+	.stack_registers_size = 64,
+	.stack_growth_direction = -1,
+	.num_output_registers = ARRAY_SIZE(arc_callee_saved),
+	.register_offsets = arc_callee_saved,
+};
+
+static const struct stack_register_offset arm_cpu_saved[] = {
+	{ ARMV7M_R0,   0,  32 },
+	{ ARMV7M_R1,   4,  32 },
+	{ ARMV7M_R2,   8,  32 },
+	{ ARMV7M_R3,   12, 32 },
+	{ ARMV7M_R4,   -1, 32 },
+	{ ARMV7M_R5,   -1, 32 },
+	{ ARMV7M_R6,   -1, 32 },
+	{ ARMV7M_R7,   -1, 32 },
+	{ ARMV7M_R8,   -1, 32 },
+	{ ARMV7M_R9,   -1, 32 },
+	{ ARMV7M_R10,  -1, 32 },
+	{ ARMV7M_R11,  -1, 32 },
+	{ ARMV7M_R12,  16, 32 },
+	{ ARMV7M_R13,  -2, 32 },
+	{ ARMV7M_R14,  20, 32 },
+	{ ARMV7M_PC,   24, 32 },
+	{ ARMV7M_xPSR, 28, 32 },
+};
+
+static struct stack_register_offset arc_cpu_saved[] = {
+	{ ARC_R0,		-1,  32 },
+	{ ARC_R1,		-1,  32 },
+	{ ARC_R2,		-1,  32 },
+	{ ARC_R3,		-1,  32 },
+	{ ARC_R4,		-1,  32 },
+	{ ARC_R5,		-1,  32 },
+	{ ARC_R6,		-1,  32 },
+	{ ARC_R7,		-1,  32 },
+	{ ARC_R8,		-1,  32 },
+	{ ARC_R9,		-1,  32	},
+	{ ARC_R10,		-1,  32	},
+	{ ARC_R11,		-1,  32 },
+	{ ARC_R12,		-1,  32 },
+	{ ARC_R13,		-1,  32 },
+	{ ARC_R14,		-1,  32 },
+	{ ARC_R15,		-1,  32 },
+	{ ARC_R16,		-1,  32 },
+	{ ARC_R17,		-1,  32 },
+	{ ARC_R18,		-1,  32 },
+	{ ARC_R19,		-1,  32 },
+	{ ARC_R20,		-1,  32 },
+	{ ARC_R21,		-1,  32 },
+	{ ARC_R22,		-1,  32 },
+	{ ARC_R23,		-1,  32 },
+	{ ARC_R24,		-1,  32 },
+	{ ARC_R25,		-1,  32 },
+	{ ARC_GP,		-1,  32 },
+	{ ARC_FP,		-1,  32 },
+	{ ARC_SP,		-1,  32 },
+	{ ARC_ILINK,		-1,  32 },
+	{ ARC_R30,		-1,  32 },
+	{ ARC_BLINK,		 0,  32 },
+	{ ARC_LP_COUNT,		-1,  32 },
+	{ ARC_PCL,		-1,  32 },
+	{ ARC_PC,		-1,  32 },
+	{ ARC_LP_START,		-1,  32 },
+	{ ARC_LP_END,		-1,  32 },
+	{ ARC_STATUS32,		 4,  32 }
+};
+
+
+enum zephyr_symbol_values {
+	ZEPHYR_VAL__KERNEL,
+	ZEPHYR_VAL__KERNEL_OPENOCD_OFFSETS,
+	ZEPHYR_VAL__KERNEL_OPENOCD_SIZE_T_SIZE,
+	ZEPHYR_VAL__KERNEL_OPENOCD_NUM_OFFSETS,
+	ZEPHYR_VAL_COUNT
+};
+
+static int64_t zephyr_cortex_m_stack_align(struct target *target,
+		const uint8_t *stack_data,
+		const struct rtos_register_stacking *stacking, int64_t stack_ptr)
+{
+	return rtos_Cortex_M_stack_align(target, stack_data, stacking,
+			stack_ptr, ARM_XPSR_OFFSET);
+}
+
+static const struct rtos_register_stacking arm_cpu_saved_nofp_stacking = {
+	.stack_registers_size = 32,
+	.stack_growth_direction = -1,
+	.num_output_registers = ARRAY_SIZE(arm_cpu_saved),
+	.calculate_process_stack = zephyr_cortex_m_stack_align,
+	.register_offsets = arm_cpu_saved,
+};
+
+static const struct rtos_register_stacking arm_cpu_saved_fp_stacking = {
+	.stack_registers_size = 32 + 18 * 4,
+	.stack_growth_direction = -1,
+	.num_output_registers = ARRAY_SIZE(arm_cpu_saved),
+	.calculate_process_stack = zephyr_cortex_m_stack_align,
+	.register_offsets = arm_cpu_saved,
+};
+
+/* stack_registers_size is 8 because besides caller registers
+ * there are only blink and Status32 registers on stack left */
+static struct rtos_register_stacking arc_cpu_saved_stacking = {
+	.stack_registers_size = 8,
+	.stack_growth_direction = -1,
+	.num_output_registers = ARRAY_SIZE(arc_cpu_saved),
+	.register_offsets = arc_cpu_saved,
+};
+
+/* ARCv2 specific implementation */
+static int zephyr_get_arc_state(struct rtos *rtos, target_addr_t *addr,
+			 struct zephyr_params *params,
+			 struct rtos_reg *callee_saved_reg_list,
+			 struct rtos_reg **reg_list, int *num_regs)
+{
+
+	uint32_t real_stack_addr;
+	int retval = 0;
+	int num_callee_saved_regs;
+	const struct rtos_register_stacking *stacking;
+
+	/* Getting real stack address from Kernel thread struct */
+	retval = target_read_u32(rtos->target, *addr, &real_stack_addr);
+	if (retval != ERROR_OK)
+		return retval;
+
+	/* Getting callee registers */
+	retval = rtos_generic_stack_read(rtos->target,
+			params->callee_saved_stacking,
+			real_stack_addr, &callee_saved_reg_list,
+			&num_callee_saved_regs);
+	if (retval != ERROR_OK)
+		return retval;
+
+	stacking = params->cpu_saved_nofp_stacking;
+
+	/* Getting blink and status32 registers */
+	retval = rtos_generic_stack_read(rtos->target, stacking,
+			real_stack_addr + num_callee_saved_regs * 4,
+			reg_list, num_regs);
+	if (retval != ERROR_OK)
+		return retval;
+
+	for (int i = 0; i < num_callee_saved_regs; i++)
+		buf_cpy(callee_saved_reg_list[i].value,
+			(*reg_list)[callee_saved_reg_list[i].number].value,
+			callee_saved_reg_list[i].size);
+
+	/* The blink, sp, pc offsets in arc_cpu_saved structure may be changed,
+	 * but the registers number shall not. So the next code searches the
+	 * offsetst of these registers in arc_cpu_saved structure. */
+	unsigned short blink_offset = 0, pc_offset = 0, sp_offset = 0;
+	for (size_t i = 0; i < ARRAY_SIZE(arc_cpu_saved); i++) {
+		if (arc_cpu_saved[i].number == ARC_BLINK)
+			blink_offset = i;
+		if (arc_cpu_saved[i].number == ARC_SP)
+			sp_offset = i;
+		if (arc_cpu_saved[i].number == ARC_PC)
+			pc_offset = i;
+	}
+
+	if (blink_offset == 0 || sp_offset == 0 || pc_offset == 0) {
+		LOG_ERROR("Basic registers offsets are missing, check <arc_cpu_saved> struct");
+		return ERROR_FAIL;
+	}
+
+	/* Put blink value into PC */
+	buf_cpy((*reg_list)[blink_offset].value,
+		(*reg_list)[pc_offset].value, sizeof((*reg_list)[blink_offset].value));
+
+	/* Put address after callee/caller in SP. */
+	int64_t stack_top;
+
+	stack_top = real_stack_addr + num_callee_saved_regs * 4
+			+ arc_cpu_saved_stacking.stack_registers_size;
+	buf_cpy(&stack_top, (*reg_list)[sp_offset].value, sizeof(stack_top));
+
+	return retval;
+}
+
+/* ARM Cortex-M-specific implementation */
+static int zephyr_get_arm_state(struct rtos *rtos, target_addr_t *addr,
+			 struct zephyr_params *params,
+			 struct rtos_reg *callee_saved_reg_list,
+			 struct rtos_reg **reg_list, int *num_regs)
+{
+
+	int retval = 0;
+	int num_callee_saved_regs;
+	const struct rtos_register_stacking *stacking;
+
+	retval = rtos_generic_stack_read(rtos->target,
+			params->callee_saved_stacking,
+			*addr, &callee_saved_reg_list,
+			&num_callee_saved_regs);
+	if (retval != ERROR_OK)
+		return retval;
+
+	*addr = target_buffer_get_u32(rtos->target,
+			callee_saved_reg_list[0].value);
+
+	if (params->offsets[OFFSET_T_PREEMPT_FLOAT] != UNIMPLEMENTED)
+		stacking = params->cpu_saved_fp_stacking;
+	else
+		stacking = params->cpu_saved_nofp_stacking;
+
+	retval = rtos_generic_stack_read(rtos->target, stacking, *addr, reg_list,
+			num_regs);
+	if (retval != ERROR_OK)
+		return retval;
+
+	for (int i = 1; i < num_callee_saved_regs; i++)
+		buf_cpy(callee_saved_reg_list[i].value,
+			(*reg_list)[callee_saved_reg_list[i].number].value,
+			callee_saved_reg_list[i].size);
+	return 0;
+}
+
+static struct zephyr_params zephyr_params_list[] = {
+	{
+		.target_name = "cortex_m",
+		.pointer_width = 4,
+		.callee_saved_stacking = &arm_callee_saved_stacking,
+		.cpu_saved_nofp_stacking = &arm_cpu_saved_nofp_stacking,
+		.cpu_saved_fp_stacking = &arm_cpu_saved_fp_stacking,
+		.get_cpu_state = &zephyr_get_arm_state,
+	},
+	{
+		.target_name = "hla_target",
+		.pointer_width = 4,
+		.callee_saved_stacking = &arm_callee_saved_stacking,
+		.cpu_saved_nofp_stacking = &arm_cpu_saved_nofp_stacking,
+		.cpu_saved_fp_stacking = &arm_cpu_saved_fp_stacking,
+		.get_cpu_state = &zephyr_get_arm_state,
+
+	},
+	{
+		.target_name = "arcv2",
+		.pointer_width = 4,
+		.callee_saved_stacking = &arc_callee_saved_stacking,
+		.cpu_saved_nofp_stacking = &arc_cpu_saved_stacking,
+		.get_cpu_state = &zephyr_get_arc_state,
+	},
+	{
+		.target_name = NULL
+	}
+};
+
+static const struct symbol_table_elem zephyr_symbol_list[] = {
+	{
+		.symbol_name = "_kernel",
+		.optional = false
+	},
+	{
+		.symbol_name = "_kernel_openocd_offsets",
+		.optional = false
+	},
+	{
+		.symbol_name = "_kernel_openocd_size_t_size",
+		.optional = false
+	},
+	{
+		.symbol_name = "_kernel_openocd_num_offsets",
+		.optional = true
+	},
+	{
+		.symbol_name = NULL
+	}
+};
+
+static bool zephyr_detect_rtos(struct target *target)
+{
+	if (target->rtos->symbols == NULL) {
+		LOG_INFO("Zephyr: no symbols while detecting RTOS");
+		return false;
+	}
+
+	for (enum zephyr_symbol_values symbol = ZEPHYR_VAL__KERNEL;
+					symbol != ZEPHYR_VAL_COUNT; symbol++) {
+		LOG_INFO("Zephyr: does it have symbol %d (%s)?", symbol,
+			target->rtos->symbols[symbol].optional ? "optional" : "mandatory");
+
+		if (target->rtos->symbols[symbol].optional)
+			continue;
+		if (target->rtos->symbols[symbol].address == 0)
+			return false;
+	}
+
+	LOG_INFO("Zephyr: all mandatory symbols found");
+
+	return true;
+}
+
+static int zephyr_create(struct target *target)
+{
+	const char *name;
+
+	name = target_type_name(target);
+
+	LOG_INFO("Zephyr: looking for target: %s", name);
+
+	/* ARC specific, check if EM target has security subsystem
+	 * In case of ARC_HAS_SECURE zephyr option enabled
+	 * the thread stack contains blink,sec_stat,status32 register
+	 * values. If ARC_HAS_SECURE is disabled, only blink and status32
+	 * register values are saved on stack. */
+	if (!strcmp(name, "arcv2")) {
+		uint32_t value;
+		struct arc_common *arc = target_to_arc(target);
+		/* Reading SEC_BUILD bcr */
+		CHECK_RETVAL(arc_jtag_read_aux_reg_one(&arc->jtag_info, ARC_AUX_SEC_BUILD_REG, &value));
+		if (value != 0) {
+			LOG_DEBUG("ARC EM board has security subsystem, changing offsets");
+			arc_cpu_saved[ARC_REG_NUM - 1].offset = 8;
+			/* After reading callee registers in stack
+			 * now blink,sec_stat,status32 registers
+			 * are located. */
+			arc_cpu_saved_stacking.stack_registers_size = 12;
+		}
+	}
+
+	for (struct zephyr_params *p = zephyr_params_list; p->target_name; p++) {
+		if (!strcmp(p->target_name, name)) {
+			LOG_INFO("Zephyr: target known, params at %p", p);
+			target->rtos->rtos_specific_params = p;
+			return ERROR_OK;
+		}
+	}
+
+	LOG_ERROR("Could not find target in Zephyr compatibility list");
+	return ERROR_FAIL;
+}
+
+struct zephyr_array {
+	void *ptr;
+	size_t elements;
+};
+
+static void zephyr_array_init(struct zephyr_array *array)
+{
+	array->ptr = NULL;
+	array->elements = 0;
+}
+
+static void zephyr_array_free(struct zephyr_array *array)
+{
+	free(array->ptr);
+	zephyr_array_init(array);
+}
+
+static void *zephyr_array_append(struct zephyr_array *array, size_t size)
+{
+	if (!(array->elements % 16)) {
+		void *ptr = realloc(array->ptr, (array->elements + 16) * size);
+
+		if (!ptr) {
+			LOG_ERROR("Out of memory");
+			return NULL;
+		}
+
+		array->ptr = ptr;
+	}
+
+	return (unsigned char *)array->ptr + (array->elements++) * size;
+}
+
+static void *zephyr_array_detach_ptr(struct zephyr_array *array)
+{
+	void *ptr = array->ptr;
+
+	zephyr_array_init(array);
+
+	return ptr;
+}
+
+static uint32_t zephyr_kptr(const struct rtos *rtos, enum zephyr_offsets off)
+{
+	const struct zephyr_params *params = rtos->rtos_specific_params;
+
+	return rtos->symbols[ZEPHYR_VAL__KERNEL].address + params->offsets[off];
+}
+
+static int zephyr_fetch_thread(const struct rtos *rtos,
+				struct zephyr_thread *thread, uint32_t ptr)
+{
+	const struct zephyr_params *param = rtos->rtos_specific_params;
+	int retval;
+
+	thread->ptr = ptr;
+
+	retval = target_read_u32(rtos->target, ptr + param->offsets[OFFSET_T_ENTRY],
+				 &thread->entry);
+	if (retval != ERROR_OK)
+		return retval;
+
+	retval = target_read_u32(rtos->target,
+				 ptr + param->offsets[OFFSET_T_NEXT_THREAD],
+				 &thread->next_ptr);
+	if (retval != ERROR_OK)
+		return retval;
+
+	retval = target_read_u32(rtos->target,
+				 ptr + param->offsets[OFFSET_T_STACK_POINTER],
+				 &thread->stack_pointer);
+	if (retval != ERROR_OK)
+		return retval;
+
+	retval = target_read_u8(rtos->target, ptr + param->offsets[OFFSET_T_STATE],
+				&thread->state);
+	if (retval != ERROR_OK)
+		return retval;
+
+	retval = target_read_u8(rtos->target,
+				ptr + param->offsets[OFFSET_T_USER_OPTIONS],
+				&thread->user_options);
+	if (retval != ERROR_OK)
+		return retval;
+
+	uint8_t prio;
+	retval = target_read_u8(rtos->target,
+				ptr + param->offsets[OFFSET_T_PRIO], &prio);
+	if (retval != ERROR_OK)
+		return retval;
+	thread->prio = prio;
+
+	thread->name[0] = '\0';
+	if (param->offsets[OFFSET_T_NAME] != UNIMPLEMENTED) {
+		retval = target_read_buffer(rtos->target,
+					ptr + param->offsets[OFFSET_T_NAME],
+					sizeof(thread->name) - 1, (uint8_t *)thread->name);
+		if (retval != ERROR_OK)
+			return retval;
+
+		thread->name[sizeof(thread->name) - 1] = '\0';
+	}
+
+	LOG_DEBUG("Fetched thread%" PRIx32 ": {entry@0x%" PRIx32
+		", state=%" PRIu8 ", useropts=%" PRIu8 ", prio=%" PRId8 "}",
+		ptr, thread->entry, thread->state, thread->user_options, thread->prio);
+
+	return ERROR_OK;
+}
+
+static int zephyr_fetch_thread_list(struct rtos *rtos, uint32_t current_thread)
+{
+	struct zephyr_array thread_array;
+	struct zephyr_thread thread;
+	struct thread_detail *td;
+	int64_t curr_id = -1;
+	uint32_t curr;
+	int retval;
+
+	retval = target_read_u32(rtos->target, zephyr_kptr(rtos, OFFSET_K_THREADS),
+		&curr);
+	if (retval != ERROR_OK) {
+		LOG_ERROR("Could not fetch current thread pointer");
+		return retval;
+	}
+
+	zephyr_array_init(&thread_array);
+
+	for (; curr; curr = thread.next_ptr) {
+		retval = zephyr_fetch_thread(rtos, &thread, curr);
+		if (retval != ERROR_OK)
+			goto error;
+
+		td = zephyr_array_append(&thread_array, sizeof(*td));
+		if (!td)
+			goto error;
+
+		td->threadid = thread.ptr;
+		td->exists = true;
+
+		if (thread.name[0])
+			td->thread_name_str = strdup(thread.name);
+		else
+			td->thread_name_str = alloc_printf("thr_%" PRIx32 "_%" PRIx32,
+							   thread.entry, thread.ptr);
+		td->extra_info_str = alloc_printf("prio:%" PRId8 ",useropts:%" PRIu8,
+						  thread.prio, thread.user_options);
+		if (!td->thread_name_str || !td->extra_info_str)
+			goto error;
+
+		if (td->threadid == current_thread)
+			curr_id = (int64_t)thread_array.elements - 1;
+	}
+
+	LOG_DEBUG("Got information for %zu threads", thread_array.elements);
+
+	rtos_free_threadlist(rtos);
+
+	rtos->thread_count = (int)thread_array.elements;
+	rtos->thread_details = zephyr_array_detach_ptr(&thread_array);
+
+	rtos->current_threadid = curr_id;
+	rtos->current_thread = current_thread;
+
+	return ERROR_OK;
+
+error:
+	td = thread_array.ptr;
+	for (size_t i = 0; i < thread_array.elements; i++) {
+		free(td[i].thread_name_str);
+		free(td[i].extra_info_str);
+	}
+
+	zephyr_array_free(&thread_array);
+
+	return ERROR_FAIL;
+}
+
+static int zephyr_update_threads(struct rtos *rtos)
+{
+	struct zephyr_params *param;
+	int retval;
+
+	if (!rtos->rtos_specific_params)
+		return ERROR_FAIL;
+
+	param = (struct zephyr_params *)rtos->rtos_specific_params;
+
+	if (!rtos->symbols) {
+		LOG_ERROR("No symbols for Zephyr");
+		return ERROR_FAIL;
+	}
+
+	if (rtos->symbols[ZEPHYR_VAL__KERNEL].address == 0) {
+		LOG_ERROR("Can't obtain kernel struct from Zephyr");
+		return ERROR_FAIL;
+	}
+
+	if (rtos->symbols[ZEPHYR_VAL__KERNEL_OPENOCD_OFFSETS].address == 0) {
+		LOG_ERROR("Please build Zephyr with CONFIG_OPENOCD option set");
+		return ERROR_FAIL;
+	}
+
+	retval = target_read_u8(rtos->target,
+		rtos->symbols[ZEPHYR_VAL__KERNEL_OPENOCD_SIZE_T_SIZE].address,
+		&param->size_width);
+	if (retval != ERROR_OK) {
+		LOG_ERROR("Couldn't determine size of size_t from host");
+		return retval;
+	}
+
+	if (param->size_width != 4) {
+		LOG_ERROR("Only size_t of 4 bytes are supported");
+		return ERROR_FAIL;
+	}
+
+	if (rtos->symbols[ZEPHYR_VAL__KERNEL_OPENOCD_NUM_OFFSETS].address) {
+		retval = target_read_u32(rtos->target,
+				rtos->symbols[ZEPHYR_VAL__KERNEL_OPENOCD_NUM_OFFSETS].address,
+				&param->num_offsets);
+		if (retval != ERROR_OK) {
+			LOG_ERROR("Couldn't not fetch number of offsets from Zephyr");
+			return retval;
+		}
+
+		if (param->num_offsets <= OFFSET_T_STACK_POINTER) {
+			LOG_ERROR("Number of offsets too small");
+			return ERROR_FAIL;
+		}
+	} else {
+		retval = target_read_u32(rtos->target,
+				rtos->symbols[ZEPHYR_VAL__KERNEL_OPENOCD_OFFSETS].address,
+				&param->offsets[OFFSET_VERSION]);
+		if (retval != ERROR_OK) {
+			LOG_ERROR("Couldn't not fetch offsets from Zephyr");
+			return retval;
+		}
+
+		if (param->offsets[OFFSET_VERSION] > 1) {
+			LOG_ERROR("Unexpected OpenOCD support version %" PRIu32,
+					param->offsets[OFFSET_VERSION]);
+			return ERROR_FAIL;
+		}
+		switch (param->offsets[OFFSET_VERSION]) {
+		case 0:
+			param->num_offsets = OFFSET_T_STACK_POINTER + 1;
+			break;
+		case 1:
+			param->num_offsets = OFFSET_T_COOP_FLOAT + 1;
+			break;
+		}
+	}
+	/* We can fetch the whole array for version 0, as they're supposed
+	 * to grow only */
+	uint32_t address;
+	address  = rtos->symbols[ZEPHYR_VAL__KERNEL_OPENOCD_OFFSETS].address;
+	for (size_t i = 0; i < OFFSET_MAX; i++, address += param->size_width) {
+		if (i >= param->num_offsets) {
+			param->offsets[i] = UNIMPLEMENTED;
+			continue;
+		}
+
+		retval = target_read_u32(rtos->target, address, &param->offsets[i]);
+		if (retval != ERROR_OK) {
+			LOG_ERROR("Could not fetch offsets from Zephyr");
+			return ERROR_FAIL;
+		}
+	}
+
+	LOG_DEBUG("Zephyr OpenOCD support version %" PRId32,
+			  param->offsets[OFFSET_VERSION]);
+
+	uint32_t current_thread;
+	retval = target_read_u32(rtos->target,
+		zephyr_kptr(rtos, OFFSET_K_CURR_THREAD), &current_thread);
+	if (retval != ERROR_OK) {
+		LOG_ERROR("Could not obtain current thread ID");
+		return retval;
+	}
+
+	retval = zephyr_fetch_thread_list(rtos, current_thread);
+	if (retval != ERROR_OK) {
+		LOG_ERROR("Could not obtain thread list");
+		return retval;
+	}
+
+	return ERROR_OK;
+}
+
+static int zephyr_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
+		struct rtos_reg **reg_list, int *num_regs)
+{
+	struct zephyr_params *params;
+	struct rtos_reg *callee_saved_reg_list = NULL;
+	target_addr_t addr;
+	int retval;
+
+	LOG_INFO("Getting thread %" PRId64 " reg list", thread_id);
+
+	if (rtos == NULL)
+		return ERROR_FAIL;
+
+	if (thread_id == 0)
+		return ERROR_FAIL;
+
+	params = rtos->rtos_specific_params;
+	if (params == NULL)
+		return ERROR_FAIL;
+
+	addr = thread_id + params->offsets[OFFSET_T_STACK_POINTER]
+		 - params->callee_saved_stacking->register_offsets[0].offset;
+
+	retval = params->get_cpu_state(rtos, &addr, params, callee_saved_reg_list, reg_list, num_regs);
+
+	free(callee_saved_reg_list);
+
+	return retval;
+}
+
+static int zephyr_get_symbol_list_to_lookup(struct symbol_table_elem **symbol_list)
+{
+	*symbol_list = malloc(sizeof(zephyr_symbol_list));
+	if (!*symbol_list) {
+		LOG_ERROR("Out of memory");
+		return ERROR_FAIL;
+	}
+
+	memcpy(*symbol_list, zephyr_symbol_list, sizeof(zephyr_symbol_list));
+	return ERROR_OK;
+}
+
+struct rtos_type zephyr_rtos = {
+	.name = "Zephyr",
+
+	.detect_rtos = zephyr_detect_rtos,
+	.create = zephyr_create,
+	.update_threads = zephyr_update_threads,
+	.get_thread_reg_list = zephyr_get_thread_reg_list,
+	.get_symbol_list_to_lookup = zephyr_get_symbol_list_to_lookup,
+};

-----------------------------------------------------------------------

Summary of changes:
 doc/openocd.texi     |  12 +-
 src/rtos/Makefile.am |   1 +
 src/rtos/rtos.c      |   2 +
 src/rtos/zephyr.c    | 788 +++++++++++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 800 insertions(+), 3 deletions(-)
 create mode 100644 src/rtos/zephyr.c


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- Log -----------------------------------------------------------------
commit 5d9de1c40090d81288adc85d06c734984b2c5de1
Author: Tarek BOCHKATI <tar...@gm...>
Date:   Tue Jan 12 20:11:11 2021 +0100

    cortex_m: add armv8m special registers
    
    Change-Id: I1942f375a5f4282ad1fe4a2ff3b8f3cbc64d8f7f
    Signed-off-by: Tarek BOCHKATI <tar...@gm...>
    Reviewed-on: http://openocd.zylin.com/6016
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index 101094a97..2bcb8abae 100644
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -125,6 +125,29 @@ static const struct {
 	{ ARMV7M_FAULTMASK, "faultmask", 1, REG_TYPE_INT8, "system", "org.gnu.gdb.arm.m-system" },
 	{ ARMV7M_CONTROL, "control", 3, REG_TYPE_INT8, "system", "org.gnu.gdb.arm.m-system" },
 
+	/* ARMv8-M specific registers */
+	{ ARMV8M_MSP_NS, "msp_ns", 32, REG_TYPE_DATA_PTR, "stack", "v8-m.sp" },
+	{ ARMV8M_PSP_NS, "psp_ns", 32, REG_TYPE_DATA_PTR, "stack", "v8-m.sp" },
+	{ ARMV8M_MSP_S, "msp_s", 32, REG_TYPE_DATA_PTR, "stack", "v8-m.sp" },
+	{ ARMV8M_PSP_S, "psp_s", 32, REG_TYPE_DATA_PTR, "stack", "v8-m.sp" },
+	{ ARMV8M_MSPLIM_S, "msplim_s", 32, REG_TYPE_DATA_PTR, "stack", "v8-m.sp" },
+	{ ARMV8M_PSPLIM_S, "psplim_s", 32, REG_TYPE_DATA_PTR, "stack", "v8-m.sp" },
+	{ ARMV8M_MSPLIM_NS, "msplim_ns", 32, REG_TYPE_DATA_PTR, "stack", "v8-m.sp" },
+	{ ARMV8M_PSPLIM_NS, "psplim_ns", 32, REG_TYPE_DATA_PTR, "stack", "v8-m.sp" },
+
+	{ ARMV8M_PMSK_BPRI_FLTMSK_CTRL_S, "pmsk_bpri_fltmsk_ctrl_s", 32, REG_TYPE_INT, NULL, NULL },
+	{ ARMV8M_PRIMASK_S, "primask_s", 1, REG_TYPE_INT8, "system", "org.gnu.gdb.arm.m-system" },
+	{ ARMV8M_BASEPRI_S, "basepri_s", 8, REG_TYPE_INT8, "system", "org.gnu.gdb.arm.m-system" },
+	{ ARMV8M_FAULTMASK_S, "faultmask_s", 1, REG_TYPE_INT8, "system", "org.gnu.gdb.arm.m-system" },
+	{ ARMV8M_CONTROL_S, "control_s", 3, REG_TYPE_INT8, "system", "org.gnu.gdb.arm.m-system" },
+
+	{ ARMV8M_PMSK_BPRI_FLTMSK_CTRL_NS, "pmsk_bpri_fltmsk_ctrl_ns", 32, REG_TYPE_INT, NULL, NULL },
+	{ ARMV8M_PRIMASK_NS, "primask_ns", 1, REG_TYPE_INT8, "system", "org.gnu.gdb.arm.m-system" },
+	{ ARMV8M_BASEPRI_NS, "basepri_ns", 8, REG_TYPE_INT8, "system", "org.gnu.gdb.arm.m-system" },
+	{ ARMV8M_FAULTMASK_NS, "faultmask_ns", 1, REG_TYPE_INT8, "system", "org.gnu.gdb.arm.m-system" },
+	{ ARMV8M_CONTROL_NS, "control_ns", 3, REG_TYPE_INT8, "system", "org.gnu.gdb.arm.m-system" },
+
+	/* FPU registers */
 	{ ARMV7M_D0, "d0", 64, REG_TYPE_IEEE_DOUBLE, "float", "org.gnu.gdb.arm.vfp" },
 	{ ARMV7M_D1, "d1", 64, REG_TYPE_IEEE_DOUBLE, "float", "org.gnu.gdb.arm.vfp" },
 	{ ARMV7M_D2, "d2", 64, REG_TYPE_IEEE_DOUBLE, "float", "org.gnu.gdb.arm.vfp" },
@@ -243,6 +266,15 @@ static uint32_t armv7m_map_id_to_regsel(unsigned int arm_reg_id)
 	case ARMV7M_PMSK_BPRI_FLTMSK_CTRL:
 		return ARMV7M_REGSEL_PMSK_BPRI_FLTMSK_CTRL;
 
+	case ARMV8M_MSP_NS...ARMV8M_PSPLIM_NS:
+		return arm_reg_id - ARMV8M_MSP_NS + ARMV8M_REGSEL_MSP_NS;
+
+	case ARMV8M_PMSK_BPRI_FLTMSK_CTRL_S:
+		return ARMV8M_REGSEL_PMSK_BPRI_FLTMSK_CTRL_S;
+
+	case ARMV8M_PMSK_BPRI_FLTMSK_CTRL_NS:
+		return ARMV8M_REGSEL_PMSK_BPRI_FLTMSK_CTRL_NS;
+
 	case ARMV7M_FPSCR:
 		return ARMV7M_REGSEL_FPSCR;
 
@@ -258,28 +290,26 @@ static uint32_t armv7m_map_id_to_regsel(unsigned int arm_reg_id)
 static bool armv7m_map_reg_packing(unsigned int arm_reg_id,
 					unsigned int *reg32_id, uint32_t *offset)
 {
+
 	switch (arm_reg_id) {
 
-	case ARMV7M_PRIMASK:
+	case ARMV7M_PRIMASK...ARMV7M_CONTROL:
 		*reg32_id = ARMV7M_PMSK_BPRI_FLTMSK_CTRL;
-		*offset = 0;
+		*offset = arm_reg_id - ARMV7M_PRIMASK;
 		return true;
-	case ARMV7M_BASEPRI:
-		*reg32_id = ARMV7M_PMSK_BPRI_FLTMSK_CTRL;
-		*offset = 1;
+	case ARMV8M_PRIMASK_S...ARMV8M_CONTROL_S:
+		*reg32_id = ARMV8M_PMSK_BPRI_FLTMSK_CTRL_S;
+		*offset = arm_reg_id - ARMV8M_PRIMASK_S;
 		return true;
-	case ARMV7M_FAULTMASK:
-		*reg32_id = ARMV7M_PMSK_BPRI_FLTMSK_CTRL;
-		*offset = 2;
-		return true;
-	case ARMV7M_CONTROL:
-		*reg32_id = ARMV7M_PMSK_BPRI_FLTMSK_CTRL;
-		*offset = 3;
+	case ARMV8M_PRIMASK_NS...ARMV8M_CONTROL_NS:
+		*reg32_id = ARMV8M_PMSK_BPRI_FLTMSK_CTRL_NS;
+		*offset = arm_reg_id - ARMV8M_PRIMASK_NS;
 		return true;
 
 	default:
 		return false;
 	}
+
 }
 
 static int armv7m_read_core_reg(struct target *target, struct reg *r,
@@ -743,7 +773,8 @@ struct reg_cache *armv7m_build_reg_cache(struct target *target)
 		reg_list[i].value = arch_info[i].value;
 		reg_list[i].dirty = false;
 		reg_list[i].valid = false;
-		reg_list[i].hidden = i == ARMV7M_PMSK_BPRI_FLTMSK_CTRL;
+		reg_list[i].hidden = (i == ARMV7M_PMSK_BPRI_FLTMSK_CTRL ||
+				i == ARMV8M_PMSK_BPRI_FLTMSK_CTRL_NS || i == ARMV8M_PMSK_BPRI_FLTMSK_CTRL_S);
 		reg_list[i].type = &armv7m_reg_type;
 		reg_list[i].arch_info = &arch_info[i];
 
diff --git a/src/target/armv7m.h b/src/target/armv7m.h
index 652dbe798..588470f11 100644
--- a/src/target/armv7m.h
+++ b/src/target/armv7m.h
@@ -60,7 +60,18 @@ enum {
 	ARMV7M_REGSEL_MSP,
 	ARMV7M_REGSEL_PSP,
 
+	ARMV8M_REGSEL_MSP_NS = 0x18,
+	ARMV8M_REGSEL_PSP_NS,
+	ARMV8M_REGSEL_MSP_S,
+	ARMV8M_REGSEL_PSP_S,
+	ARMV8M_REGSEL_MSPLIM_S,
+	ARMV8M_REGSEL_PSPLIM_S,
+	ARMV8M_REGSEL_MSPLIM_NS,
+	ARMV8M_REGSEL_PSPLIM_NS,
+
 	ARMV7M_REGSEL_PMSK_BPRI_FLTMSK_CTRL = 0x14,
+	ARMV8M_REGSEL_PMSK_BPRI_FLTMSK_CTRL_S = 0x22,
+	ARMV8M_REGSEL_PMSK_BPRI_FLTMSK_CTRL_NS = 0x23,
 	ARMV7M_REGSEL_FPSCR = 0x21,
 
 	/* 32bit Floating-point registers */
@@ -129,6 +140,8 @@ enum {
 
 	/* following indices are arbitrary, do not match DCRSR.REGSEL selectors */
 
+	/* A block of container and contained registers follows:
+	 * THE ORDER IS IMPORTANT to the end of the block ! */
 	/* working register for packing/unpacking special regs, hidden from gdb */
 	ARMV7M_PMSK_BPRI_FLTMSK_CTRL,
 
@@ -142,6 +155,35 @@ enum {
 	ARMV7M_BASEPRI,
 	ARMV7M_FAULTMASK,
 	ARMV7M_CONTROL,
+	/* The end of block of container and contained registers */
+
+	/* ARMv8-M specific registers */
+	ARMV8M_MSP_NS,
+	ARMV8M_PSP_NS,
+	ARMV8M_MSP_S,
+	ARMV8M_PSP_S,
+	ARMV8M_MSPLIM_S,
+	ARMV8M_PSPLIM_S,
+	ARMV8M_MSPLIM_NS,
+	ARMV8M_PSPLIM_NS,
+
+	/* A block of container and contained registers follows:
+	 * THE ORDER IS IMPORTANT to the end of the block ! */
+	ARMV8M_PMSK_BPRI_FLTMSK_CTRL_S,
+	ARMV8M_PRIMASK_S,
+	ARMV8M_BASEPRI_S,
+	ARMV8M_FAULTMASK_S,
+	ARMV8M_CONTROL_S,
+	/* The end of block of container and contained registers */
+
+	/* A block of container and contained registers follows:
+	 * THE ORDER IS IMPORTANT to the end of the block ! */
+	ARMV8M_PMSK_BPRI_FLTMSK_CTRL_NS,
+	ARMV8M_PRIMASK_NS,
+	ARMV8M_BASEPRI_NS,
+	ARMV8M_FAULTMASK_NS,
+	ARMV8M_CONTROL_NS,
+	/* The end of block of container and contained registers */
 
 	/* 64bit Floating-point registers */
 	ARMV7M_D0,
@@ -170,6 +212,8 @@ enum {
 	ARMV7M_CORE_LAST_REG = ARMV7M_xPSR,
 	ARMV7M_FPU_FIRST_REG = ARMV7M_D0,
 	ARMV7M_FPU_LAST_REG = ARMV7M_FPSCR,
+	ARMV8M_FIRST_REG = ARMV8M_MSP_NS,
+	ARMV8M_LAST_REG = ARMV8M_CONTROL_NS,
 };
 
 enum {
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 982f55081..e35cdbe2f 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -2069,6 +2069,9 @@ int cortex_m_examine(struct target *target)
 			for (size_t idx = ARMV7M_FPU_FIRST_REG; idx <= ARMV7M_FPU_LAST_REG; idx++)
 				armv7m->arm.core_cache->reg_list[idx].exist = false;
 
+		if (!armv7m->arm.is_armv8m)
+			for (size_t idx = ARMV8M_FIRST_REG; idx <= ARMV8M_LAST_REG; idx++)
+				armv7m->arm.core_cache->reg_list[idx].exist = false;
 
 		if (!armv7m->stlink) {
 			if (core == 3 || core == 4)

-----------------------------------------------------------------------

Summary of changes:
 src/target/armv7m.c   | 57 +++++++++++++++++++++++++++++++++++++++------------
 src/target/armv7m.h   | 44 +++++++++++++++++++++++++++++++++++++++
 src/target/cortex_m.c |  3 +++
 3 files changed, 91 insertions(+), 13 deletions(-)


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- Log -----------------------------------------------------------------
commit aa952a1b773b65e8f469a5c04600b46e4f37a701
Author: Marc Schink <de...@za...>
Date:   Sat May 1 16:22:51 2021 +0200

    flash/nor/xcf: Do not use 'Yoda conditions'
    
    Change-Id: I17308f5237338ce468e5b86289a0634429deaaa9
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: http://openocd.zylin.com/6201
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/flash/nor/xcf.c b/src/flash/nor/xcf.c
index 0cef43b93..01329f47a 100644
--- a/src/flash/nor/xcf.c
+++ b/src/flash/nor/xcf.c
@@ -169,7 +169,7 @@ static int isc_enter(struct flash_bank *bank)
 		jtag_execute_queue();
 
 		status = read_status(bank);
-		if (false == status.isc_mode) {
+		if (!status.isc_mode) {
 			LOG_ERROR("*** XCF: FAILED to enter ISC mode");
 			return ERROR_FLASH_OPERATION_FAILED;
 		}
@@ -183,7 +183,7 @@ static int isc_leave(struct flash_bank *bank)
 
 	struct xcf_status status = read_status(bank);
 
-	if (false == status.isc_mode)
+	if (!status.isc_mode)
 		return ERROR_OK;
 	else {
 		struct scan_field scan;
@@ -199,7 +199,7 @@ static int isc_leave(struct flash_bank *bank)
 		alive_sleep(1);	/* device needs 50 uS to leave ISC mode */
 
 		status = read_status(bank);
-		if (true == status.isc_mode) {
+		if (status.isc_mode) {
 			LOG_ERROR("*** XCF: FAILED to leave ISC mode");
 			return ERROR_FLASH_OPERATION_FAILED;
 		}
@@ -280,7 +280,7 @@ static int isc_set_register(struct flash_bank *bank, const uint8_t *cmd,
 	scan.in_value = NULL;
 	jtag_add_dr_scan(bank->target->tap, 1, &scan, TAP_IDLE);
 
-	if (0 == timeout_ms)
+	if (timeout_ms == 0)
 		return jtag_execute_queue();
 	else
 		return isc_wait_erase_program(bank, timeout_ms);
@@ -311,7 +311,7 @@ static int isc_program_register(struct flash_bank *bank, const uint8_t *cmd,
 	scan.in_value = NULL;
 	jtag_add_ir_scan(bank->target->tap, &scan, TAP_IDLE);
 
-	if (0 == timeout_ms)
+	if (timeout_ms == 0)
 		return jtag_execute_queue();
 	else
 		return isc_wait_erase_program(bank, timeout_ms);
@@ -409,7 +409,7 @@ static bool need_bit_reverse(const uint8_t *buffer)
 	reference[18] = 0xAA;
 	reference[19] = 0x66;
 
-	if (0 == memcmp(reference, buffer, L))
+	if (memcmp(reference, buffer, L) == 0)
 		return false;
 	else
 		return true;
@@ -444,7 +444,7 @@ static int read_write_data(struct flash_bank *bank, const uint8_t *w_buffer,
 		goto EXIT;
 	}
 
-	if ((write_flag) && (0 == offset) && (count >= XCF_PAGE_SIZE))
+	if ((write_flag) && (offset == 0) && (count >= XCF_PAGE_SIZE))
 		revbit = need_bit_reverse(w_buffer);
 
 	while (count > 0) {
@@ -585,7 +585,7 @@ static int xcf_info(struct flash_bank *bank, char *buf, int buf_size)
 {
 	const struct xcf_priv *priv = bank->driver_priv;
 
-	if (false == priv->probed) {
+	if (!priv->probed) {
 		snprintf(buf, buf_size, "\nXCF flash bank not probed yet\n");
 		return ERROR_OK;
 	}
@@ -598,7 +598,7 @@ static int xcf_probe(struct flash_bank *bank)
 	struct xcf_priv *priv = bank->driver_priv;
 	uint32_t id;
 
-	if (true == priv->probed)
+	if (priv->probed)
 		free(bank->sectors);
 	priv->probed = false;
 
@@ -629,7 +629,7 @@ static int xcf_probe(struct flash_bank *bank)
 	}
 
 	bank->sectors = malloc(bank->num_sectors * sizeof(struct flash_sector));
-	if (NULL == bank->sectors) {
+	if (bank->sectors == NULL) {
 		LOG_ERROR("No memory for sector table");
 		return ERROR_FAIL;
 	}
@@ -652,7 +652,7 @@ static int xcf_auto_probe(struct flash_bank *bank)
 {
 	struct xcf_priv *priv = bank->driver_priv;
 
-	if (true == priv->probed)
+	if (priv->probed)
 		return ERROR_OK;
 	else
 		return xcf_probe(bank);

-----------------------------------------------------------------------

Summary of changes:
 src/flash/nor/xcf.c | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)


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- Log -----------------------------------------------------------------
commit e05cbb4e4feed04c44c71e4a86fa37f310515b15
Author: Daniel Anselmi <dan...@gm...>
Date:   Sun Oct 11 15:13:05 2020 +0200

    Add IPDBG JtagHost functionality to OpenOCD
    
    IPDBG are utilities to debug IP-cores. It uses JTAG for
    transport to/from the FPGA. The different UIs use TCP/IP
    as transport. The JtagHost makes the bridge between these
    two.
    
    Comparable to the bridge between GDB and the in-circuit-
    debugging-unit of a micro controller.
    
    Change-Id: Ib1bc10dcbd4ea426e492bb7b2d85c1ed1b7a8d5a
    Signed-off-by: Daniel Anselmi <dan...@gm...>
    Reviewed-on: http://openocd.zylin.com/5938
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/doc/openocd.texi b/doc/openocd.texi
index a8a413c4f..6614f4832 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -10585,6 +10585,49 @@ If @emph{xsvfdump} shows a file is using those opcodes, it
 probably will not be usable with other XSVF tools.
 
 
+@section IPDBG: JTAG-Host server
+@cindex IPDBG JTAG-Host server
+@cindex IPDBG
+
+IPDBG is a set of tools to debug IP-Cores. It comprises, among others, a logic analyzer and an arbitrary
+waveform generator. These are synthesize-able hardware descriptions of
+logic circuits in addition to software for control, visualization and further analysis.
+In a session using JTAG for its transport protocol, OpenOCD supports the function
+of a JTAG-Host. The JTAG-Host is needed to connect the circuit over JTAG to the
+control-software. For more details see @url{http://ipdbg.org}.
+
+@deffn {Command} {ipdbg} [@option{-start|-stop}] @option{-tap @var{tapname}} @option{-hub @var{ir_value} [@var{dr_length}]} [@option{-port @var{number}}] [@option{-tool @var{number}}] [@option{-vir [@var{vir_value} [@var{length} [@var{instr_code}]]]}]
+Starts or stops a IPDBG JTAG-Host server. Arguments can be specified in any order.
+
+Command options:
+@itemize @bullet
+@item @option{-start|-stop} starts or stops a IPDBG JTAG-Host server (default: start).
+@item @option{-tap @var{tapname}} targeting the TAP @var{tapname}.
+@item @option{-hub @var{ir_value}} states that the JTAG hub is
+reachable with dr-scans while the JTAG instruction register has the value @var{ir_value}.
+@item @option{-port @var{number}} tcp port number where the JTAG-Host is listening.
+@item @option{-tool @var{number}} number of the tool/feature. These corresponds to the ports "data_(up/down)_(0..6)" at the JtagHub.
+@item @option{-vir [@var{vir_value} [@var{length} [@var{instr_code}]]]} On some devices, the user data-register is only reachable if there is a
+specific value in a second dr. This second dr is called vir (virtual ir). With this parameter given, the IPDBG satisfies this condition prior an
+access to the IPDBG-Hub. The value shifted into the vir is given by the first parameter @var{vir_value} (default: 0x11). The second
+parameter @var{length} is the length of the vir data register (default: 5). With the @var{instr_code} (default: 0x00e) parameter the ir value to
+shift data through vir can be configured.
+@end itemize
+@end deffn
+
+Examples:
+@example
+ipdbg -start -tap xc6s.tap -hub 0x02 -port 4242 -tool 4
+@end example
+Starts a server listening on tcp-port 4242 which connects to tool 4.
+The connection is through the TAP of a Xilinx Spartan 6 on USER1 instruction (tested with a papillion pro board).
+
+@example
+ipdbg -start -tap 10m50.tap -hub 0x00C -vir -port 60000 -tool 1
+@end example
+Starts a server listening on tcp-port 60000 which connects to tool 1 (data_up_1/data_down_1).
+The connection is through the TAP of a Intel MAX10 virtual jtag component (sld_instance_index is 0; sld_ir_width is smaller than 5).
+
 @node Utility Commands
 @chapter Utility Commands
 @cindex Utility Commands
diff --git a/src/helper/command.h b/src/helper/command.h
index 68f4c14fe..068df9d0e 100644
--- a/src/helper/command.h
+++ b/src/helper/command.h
@@ -426,6 +426,48 @@ DECLARE_PARSE_WRAPPER(_target_addr, target_addr_t);
 #define COMMAND_PARSE_ADDRESS(in, out) \
 	COMMAND_PARSE_NUMBER(target_addr, in, out)
 
+/**
+ * @brief parses the command argument at position @a argn into @a out
+ * as a @a type, or prints a command error referring to @a name_str
+ * and passes the error code to the caller. @a argn will be incremented
+ * if no error occurred. Otherwise the calling function will return
+ * the error code produced by the parsing function.
+ *
+ * This function may cause the calling function to return immediately,
+ * so it should be used carefully to avoid leaking resources.  In most
+ * situations, parsing should be completed in full before proceeding
+ * to allocate resources, and this strategy will most prevents leaks.
+ */
+#define COMMAND_PARSE_ADDITIONAL_NUMBER(type, argn, out, name_str) \
+	do { \
+		if (argn+1 >= CMD_ARGC || CMD_ARGV[argn+1][0] == '-') { \
+			command_print(CMD, "no " name_str " given"); \
+			return ERROR_FAIL; \
+		} \
+		++argn; \
+		COMMAND_PARSE_NUMBER(type, CMD_ARGV[argn], out); \
+	} while (0)
+
+/**
+ * @brief parses the command argument at position @a argn into @a out
+ * as a @a type if the argument @a argn does not start with '-'.
+ * and passes the error code to the caller. @a argn will be incremented
+ * if no error occurred. Otherwise the calling function will return
+ * the error code produced by the parsing function.
+ *
+ * This function may cause the calling function to return immediately,
+ * so it should be used carefully to avoid leaking resources.  In most
+ * situations, parsing should be completed in full before proceeding
+ * to allocate resources, and this strategy will most prevents leaks.
+ */
+#define COMMAND_PARSE_OPTIONAL_NUMBER(type, argn, out) \
+	do { \
+		if (argn+1 < CMD_ARGC && CMD_ARGV[argn+1][0] != '-') { \
+			++argn; \
+			COMMAND_PARSE_NUMBER(type, CMD_ARGV[argn], out); \
+		} \
+	} while (0)
+
 /**
  * Parse the string @c as a binary parameter, storing the boolean value
  * in @c out.  The strings @c on and @c off are used to match different
diff --git a/src/jtag/core.c b/src/jtag/core.c
index 37924aad0..147df2854 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -45,6 +45,9 @@
 #include "svf/svf.h"
 #include "xsvf/xsvf.h"
 
+/* ipdbg are utilities to debug IP-cores. It uses JTAG for transport. */
+#include "server/ipdbg.h"
+
 /** The number of JTAG queue flushes (for profiling and debugging purposes). */
 static int jtag_flush_queue_count;
 
@@ -1975,7 +1978,12 @@ static int jtag_select(struct command_context *ctx)
 	if (retval != ERROR_OK)
 		return retval;
 
-	return xsvf_register_commands(ctx);
+	retval = xsvf_register_commands(ctx);
+
+	if (retval != ERROR_OK)
+		return retval;
+
+	return ipdbg_register_commands(ctx);
 }
 
 static struct transport jtag_transport = {
diff --git a/src/server/Makefile.am b/src/server/Makefile.am
index d270ee281..5f7469a84 100644
--- a/src/server/Makefile.am
+++ b/src/server/Makefile.am
@@ -10,7 +10,9 @@ noinst_LTLIBRARIES += %D%/libserver.la
 	%D%/tcl_server.c \
 	%D%/tcl_server.h \
 	%D%/rtt_server.c \
-	%D%/rtt_server.h
+	%D%/rtt_server.h \
+	%D%/ipdbg.c \
+	%D%/ipdbg.h
 
 %C%_libserver_la_CFLAGS = $(AM_CFLAGS)
 if IS_MINGW
diff --git a/src/server/ipdbg.c b/src/server/ipdbg.c
new file mode 100644
index 000000000..ec2fae8c0
--- /dev/null
+++ b/src/server/ipdbg.c
@@ -0,0 +1,782 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/* Copyright (C) 2020 by Daniel Anselmi <dan...@gm...> */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <helper/bits.h>
+#include <helper/time_support.h>
+#include <jtag/jtag.h>
+#include <server/server.h>
+#include <target/target.h>
+
+#include "ipdbg.h"
+
+#define IPDBG_BUFFER_SIZE 16384
+#define IPDBG_MIN_NUM_OF_OPTIONS 4
+#define IPDBG_MAX_NUM_OF_OPTIONS 14
+#define IPDBG_MIN_DR_LENGTH 11
+#define IPDBG_MAX_DR_LENGTH 13
+#define IPDBG_TCP_PORT_STR_MAX_LENGTH 6
+
+/* private connection data for IPDBG */
+struct ipdbg_fifo {
+	size_t count;
+	size_t rd_idx;
+	char buffer[IPDBG_BUFFER_SIZE];
+};
+
+struct ipdbg_connection {
+	struct ipdbg_fifo dn_fifo;
+	struct ipdbg_fifo up_fifo;
+	bool closed;
+};
+
+struct ipdbg_service {
+	struct ipdbg_hub *hub;
+	struct ipdbg_service *next;
+	uint16_t port;
+	struct ipdbg_connection connection;
+	uint8_t tool;
+};
+
+struct ipdbg_virtual_ir_info {
+	uint32_t instruction;
+	uint32_t length;
+	uint32_t value;
+};
+
+struct ipdbg_hub {
+	uint32_t user_instruction;
+	uint32_t max_tools;
+	uint32_t active_connections;
+	uint32_t active_services;
+	uint32_t valid_mask;
+	uint32_t xoff_mask;
+	uint32_t tool_mask;
+	uint32_t last_dn_tool;
+	struct ipdbg_hub *next;
+	struct jtag_tap *tap;
+	struct connection **connections;
+	uint8_t data_register_length;
+	uint8_t dn_xoff;
+	struct ipdbg_virtual_ir_info *virtual_ir;
+};
+
+static struct ipdbg_hub *ipdbg_first_hub;
+
+static struct ipdbg_service *ipdbg_first_service;
+
+static void ipdbg_init_fifo(struct ipdbg_fifo *fifo)
+{
+	fifo->count = 0;
+	fifo->rd_idx = 0;
+}
+
+static bool ipdbg_fifo_is_empty(struct ipdbg_fifo *fifo)
+{
+	return fifo->count == 0;
+}
+
+static bool ipdbg_fifo_is_full(struct ipdbg_fifo *fifo)
+{
+	return fifo->count == IPDBG_BUFFER_SIZE;
+}
+
+static void ipdbg_zero_rd_idx(struct ipdbg_fifo *fifo)
+{
+	if (fifo->rd_idx == 0)
+		return;
+
+	size_t ri = fifo->rd_idx;
+	for (size_t idx = 0 ; idx < fifo->count ; ++idx)
+		fifo->buffer[idx] = fifo->buffer[ri++];
+	fifo->rd_idx = 0;
+}
+
+static void ipdbg_append_to_fifo(struct ipdbg_fifo *fifo, char data)
+{
+	if (ipdbg_fifo_is_full(fifo))
+		return;
+
+	ipdbg_zero_rd_idx(fifo);
+	fifo->buffer[fifo->count++] = data;
+}
+
+static char ipdbg_get_from_fifo(struct ipdbg_fifo *fifo)
+{
+	if (ipdbg_fifo_is_empty(fifo))
+		return 0;
+
+	fifo->count--;
+	return fifo->buffer[fifo->rd_idx++];
+}
+
+static int ipdbg_move_buffer_to_connection(struct connection *conn, struct ipdbg_fifo *fifo)
+{
+	if (ipdbg_fifo_is_empty(fifo))
+		return ERROR_OK;
+
+	struct ipdbg_connection *connection = conn->priv;
+	if (connection->closed)
+		return ERROR_SERVER_REMOTE_CLOSED;
+
+	ipdbg_zero_rd_idx(fifo);
+	size_t bytes_written = connection_write(conn, fifo->buffer, fifo->count);
+	if (bytes_written != fifo->count) {
+		LOG_ERROR("error during write: %zu != %zu", bytes_written, fifo->count);
+		connection->closed = true;
+		return ERROR_SERVER_REMOTE_CLOSED;
+	}
+
+	fifo->count -= bytes_written;
+
+	return ERROR_OK;
+}
+
+static int ipdbg_max_tools_from_data_register_length(uint8_t data_register_length)
+{
+	int max_tools = 1;
+	data_register_length -= 10; /* 8 bit payload, 1 xoff-flag, 1 valid-flag; remaining bits used to select tool*/
+	while (data_register_length--)
+		max_tools *= 2;
+
+	/* last tool is used to reset JtagCDC and transfer "XON" to host*/
+	return max_tools - 1;
+}
+
+static struct ipdbg_service *ipdbg_find_service(struct ipdbg_hub *hub, uint8_t tool)
+{
+	struct ipdbg_service *service;
+	for (service = ipdbg_first_service ; service ; service = service->next) {
+		if (service->hub == hub && service->tool == tool)
+			break;
+	}
+	return service;
+}
+
+static void ipdbg_add_service(struct ipdbg_service *service)
+{
+	struct ipdbg_service *iservice;
+	if (ipdbg_first_service) {
+		for (iservice = ipdbg_first_service ; iservice->next; iservice = iservice->next)
+			;
+		iservice->next = service;
+	} else
+		ipdbg_first_service = service;
+}
+
+static int ipdbg_create_service(struct ipdbg_hub *hub, uint8_t tool, struct ipdbg_service **service, uint16_t port)
+{
+	*service = calloc(1, sizeof(struct ipdbg_service));
+	if (!*service) {
+		LOG_ERROR("Out of memory");
+		return ERROR_FAIL;
+	}
+
+	(*service)->hub = hub;
+	(*service)->tool = tool;
+	(*service)->port = port;
+
+	return ERROR_OK;
+}
+
+static int ipdbg_remove_service(struct ipdbg_service *service)
+{
+	if (!ipdbg_first_service)
+		return ERROR_FAIL;
+
+	if (service == ipdbg_first_service) {
+		ipdbg_first_service = ipdbg_first_service->next;
+		return ERROR_OK;
+	}
+
+	for (struct ipdbg_service *iservice = ipdbg_first_service ; iservice->next ; iservice = iservice->next) {
+		if (service == iservice->next) {
+			iservice->next = service->next;
+			return ERROR_OK;
+		}
+	}
+	return ERROR_FAIL;
+}
+
+static struct ipdbg_hub *ipdbg_find_hub(struct jtag_tap *tap,
+				uint32_t user_instruction, struct ipdbg_virtual_ir_info *virtual_ir)
+{
+	struct ipdbg_hub *hub = NULL;
+	for (hub = ipdbg_first_hub ; hub ; hub = hub->next) {
+		if (hub->tap == tap && hub->user_instruction == user_instruction) {
+			if ((!virtual_ir && !hub->virtual_ir) ||
+				 (virtual_ir && hub->virtual_ir &&
+				  virtual_ir->instruction == hub->virtual_ir->instruction &&
+				  virtual_ir->length == hub->virtual_ir->length &&
+				  virtual_ir->value == hub->virtual_ir->value)) {
+				break;
+			}
+		}
+	}
+	return hub;
+}
+
+static void ipdbg_add_hub(struct ipdbg_hub *hub)
+{
+	struct ipdbg_hub *ihub;
+	if (ipdbg_first_hub) {
+		for (ihub = ipdbg_first_hub ; ihub->next; ihub = ihub->next)
+			;
+		ihub->next = hub;
+	} else
+		ipdbg_first_hub = hub;
+}
+
+static int ipdbg_create_hub(struct jtag_tap *tap, uint32_t user_instruction, uint8_t data_register_length,
+					  struct ipdbg_virtual_ir_info *virtual_ir, struct ipdbg_hub **hub)
+{
+	*hub = NULL;
+	struct ipdbg_hub *new_hub = calloc(1, sizeof(struct ipdbg_hub));
+	if (!new_hub) {
+		free(virtual_ir);
+		LOG_ERROR("Out of memory");
+		return ERROR_FAIL;
+	}
+
+	new_hub->max_tools = ipdbg_max_tools_from_data_register_length(data_register_length);
+	new_hub->connections = calloc(new_hub->max_tools, sizeof(struct connection *));
+	if (!new_hub->connections) {
+		free(virtual_ir);
+		free(new_hub);
+		LOG_ERROR("Out of memory");
+		return ERROR_FAIL;
+	}
+	new_hub->tap                  = tap;
+	new_hub->user_instruction     = user_instruction;
+	new_hub->data_register_length = data_register_length;
+	new_hub->valid_mask           = BIT(data_register_length - 1);
+	new_hub->xoff_mask            = BIT(data_register_length - 2);
+	new_hub->tool_mask            = (new_hub->xoff_mask - 1) >> 8;
+	new_hub->last_dn_tool         = new_hub->tool_mask;
+	new_hub->virtual_ir           = virtual_ir;
+
+	*hub = new_hub;
+
+	return ERROR_OK;
+}
+
+static void ipdbg_free_hub(struct ipdbg_hub *hub)
+{
+	if (!hub)
+		return;
+	free(hub->connections);
+	free(hub->virtual_ir);
+	free(hub);
+}
+
+static int ipdbg_remove_hub(struct ipdbg_hub *hub)
+{
+	if (!ipdbg_first_hub)
+		return ERROR_FAIL;
+	if (hub == ipdbg_first_hub) {
+		ipdbg_first_hub = ipdbg_first_hub->next;
+		return ERROR_OK;
+	}
+
+	for (struct ipdbg_hub *ihub = ipdbg_first_hub ; ihub->next ; ihub = ihub->next) {
+		if (hub == ihub->next) {
+			ihub->next = hub->next;
+			return ERROR_OK;
+		}
+	}
+
+	return ERROR_FAIL;
+}
+
+static void ipdbg_init_scan_field(struct scan_field *fields, uint8_t *in_value, int num_bits, const uint8_t *out_value)
+{
+	fields->check_mask = NULL;
+	fields->check_value = NULL;
+	fields->in_value = in_value;
+	fields->num_bits = num_bits;
+	fields->out_value = out_value;
+}
+
+static int ipdbg_shift_instr(struct ipdbg_hub *hub, uint32_t instr)
+{
+	if (!hub)
+		return ERROR_FAIL;
+
+	struct jtag_tap *tap = hub->tap;
+	if (!tap)
+		return ERROR_FAIL;
+
+	if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) == instr) {
+		/* there is already the requested instruction in the ir */
+		return ERROR_OK;
+	}
+
+	uint8_t *ir_out_val = calloc(DIV_ROUND_UP(tap->ir_length, 8), 1);
+	buf_set_u32(ir_out_val, 0, tap->ir_length, instr);
+
+	struct scan_field fields;
+	ipdbg_init_scan_field(&fields, NULL, tap->ir_length, ir_out_val);
+	jtag_add_ir_scan(tap, &fields, TAP_IDLE);
+	int retval = jtag_execute_queue();
+
+	free(ir_out_val);
+
+	return retval;
+}
+
+static int ipdbg_shift_vir(struct ipdbg_hub *hub)
+{
+	if (!hub)
+		return ERROR_FAIL;
+
+	if (!hub->virtual_ir)
+		return ERROR_OK;
+
+	int retval = ipdbg_shift_instr(hub, hub->virtual_ir->instruction);
+	if (retval != ERROR_OK)
+		return retval;
+
+	struct jtag_tap *tap = hub->tap;
+	if (!tap)
+		return ERROR_FAIL;
+
+	uint8_t *dr_out_val = calloc(DIV_ROUND_UP(hub->virtual_ir->length, 8), 1);
+	buf_set_u32(dr_out_val, 0, hub->virtual_ir->length, hub->virtual_ir->value);
+
+	struct scan_field fields;
+	ipdbg_init_scan_field(&fields, NULL, hub->virtual_ir->length, dr_out_val);
+	jtag_add_dr_scan(tap, 1, &fields, TAP_IDLE);
+	retval = jtag_execute_queue();
+
+	free(dr_out_val);
+
+	return retval;
+}
+
+static int ipdbg_shift_data(struct ipdbg_hub *hub, uint32_t dn_data, uint32_t *up_data)
+{
+	if (!hub)
+		return ERROR_FAIL;
+
+	struct jtag_tap *tap = hub->tap;
+	if (!tap)
+		return ERROR_FAIL;
+
+	uint8_t *dr_out_val = calloc(DIV_ROUND_UP(hub->data_register_length, 8), 1);
+	buf_set_u32(dr_out_val, 0, hub->data_register_length, dn_data);
+	uint8_t *dr_in_val = up_data ? calloc(DIV_ROUND_UP(hub->data_register_length, 8), 1) : NULL;
+
+	struct scan_field fields;
+	ipdbg_init_scan_field(&fields, dr_in_val, hub->data_register_length, dr_out_val);
+	jtag_add_dr_scan(tap, 1, &fields, TAP_IDLE);
+	int retval = jtag_execute_queue();
+
+	if (up_data && retval == ERROR_OK)
+		*up_data = buf_get_u32(dr_in_val, 0, hub->data_register_length);
+
+	free(dr_out_val);
+	free(dr_in_val);
+
+	return retval;
+}
+
+static int ipdbg_distribute_data_from_hub(struct ipdbg_hub *hub, uint32_t up)
+{
+	const bool valid_up_data = up & hub->valid_mask;
+	if (!valid_up_data)
+		return ERROR_OK;
+
+	const size_t tool = (up >> 8) & hub->tool_mask;
+	if (tool == hub->tool_mask) {
+		const uint8_t xon_cmd = up & 0x00ff;
+		hub->dn_xoff &= ~xon_cmd;
+		LOG_INFO("received xon cmd: %d\n", xon_cmd);
+		return ERROR_OK;
+	}
+
+	struct connection *conn = hub->connections[tool];
+	if (conn) {
+		struct ipdbg_connection *connection = conn->priv;
+		if (ipdbg_fifo_is_full(&connection->up_fifo)) {
+			int retval = ipdbg_move_buffer_to_connection(conn, &connection->up_fifo);
+			if (retval != ERROR_OK)
+				return retval;
+		}
+		ipdbg_append_to_fifo(&connection->up_fifo, up);
+	}
+	return ERROR_OK;
+}
+
+static int ipdbg_jtag_transfer_byte(struct ipdbg_hub *hub, size_t tool, struct ipdbg_connection *connection)
+{
+	uint32_t dn = hub->valid_mask | ((tool & hub->tool_mask) << 8) |
+				(0x00fful & ipdbg_get_from_fifo(&connection->dn_fifo));
+	uint32_t up = 0;
+	int ret = ipdbg_shift_data(hub, dn, &up);
+	if (ret != ERROR_OK)
+		return ret;
+
+	ret = ipdbg_distribute_data_from_hub(hub, up);
+	if (ret != ERROR_OK)
+		return ret;
+
+	if ((up & hub->xoff_mask) && (hub->last_dn_tool != hub->max_tools)) {
+		hub->dn_xoff |= BIT(hub->last_dn_tool);
+		LOG_INFO("tool %d sent xoff", hub->last_dn_tool);
+	}
+
+	hub->last_dn_tool = tool;
+
+	return ERROR_OK;
+}
+
+static int ipdbg_polling_callback(void *priv)
+{
+	struct ipdbg_hub *hub = priv;
+
+	int ret = ipdbg_shift_vir(hub);
+	if (ret != ERROR_OK)
+		return ret;
+
+	ret = ipdbg_shift_instr(hub, hub->user_instruction);
+	if (ret != ERROR_OK)
+		return ret;
+
+	/* transfer dn buffers to jtag-hub */
+	unsigned int num_transfers = 0;
+	for (size_t tool = 0 ; tool < hub->max_tools ; ++tool) {
+		struct connection *conn = hub->connections[tool];
+		if (conn && conn->priv) {
+			struct ipdbg_connection *connection = conn->priv;
+			while (((hub->dn_xoff & BIT(tool)) == 0) && !ipdbg_fifo_is_empty(&connection->dn_fifo)) {
+				ret = ipdbg_jtag_transfer_byte(hub, tool, connection);
+				if (ret != ERROR_OK)
+					return ret;
+				++num_transfers;
+			}
+		}
+	}
+
+	/* some transfers to get data from jtag-hub in case there is no dn data */
+	while (num_transfers++ < hub->max_tools) {
+		uint32_t dn = 0;
+		uint32_t up = 0;
+
+		int retval = ipdbg_shift_data(hub, dn, &up);
+		if (retval != ERROR_OK)
+			return ret;
+
+		retval = ipdbg_distribute_data_from_hub(hub, up);
+		if (retval != ERROR_OK)
+			return ret;
+	}
+
+	/* write from up fifos to sockets */
+	for (size_t tool = 0 ; tool < hub->max_tools ; ++tool) {
+		struct connection *conn = hub->connections[tool];
+		if (conn && conn->priv) {
+			struct ipdbg_connection *connection = conn->priv;
+			int retval = ipdbg_move_buffer_to_connection(conn, &connection->up_fifo);
+			if (retval != ERROR_OK)
+				return retval;
+		}
+	}
+
+	return ERROR_OK;
+}
+
+static int ipdbg_start_polling(struct ipdbg_service *service, struct connection *connection)
+{
+	struct ipdbg_hub *hub = service->hub;
+	hub->connections[service->tool] = connection;
+	hub->active_connections++;
+	if (hub->active_connections > 1) {
+		/* hub is already initialized */
+		return ERROR_OK;
+	}
+
+	const uint32_t reset_hub = hub->valid_mask | ((hub->max_tools) << 8);
+
+	int ret = ipdbg_shift_vir(hub);
+	if (ret != ERROR_OK)
+		return ret;
+
+	ret = ipdbg_shift_instr(hub, hub->user_instruction);
+	if (ret != ERROR_OK)
+		return ret;
+
+	ret = ipdbg_shift_data(hub, reset_hub, NULL);
+	hub->last_dn_tool = hub->tool_mask;
+	hub->dn_xoff = 0;
+	if (ret != ERROR_OK)
+		return ret;
+
+	LOG_INFO("IPDBG start_polling");
+
+	const int time_ms = 20;
+	const int periodic = 1;
+	return target_register_timer_callback(ipdbg_polling_callback, time_ms, periodic, hub);
+}
+
+static int ipdbg_stop_polling(struct ipdbg_service *service)
+{
+	struct ipdbg_hub *hub = service->hub;
+	hub->connections[service->tool] = NULL;
+	hub->active_connections--;
+	if (hub->active_connections == 0) {
+		LOG_INFO("IPDBG stop_polling");
+
+		return target_unregister_timer_callback(ipdbg_polling_callback, hub);
+	}
+
+	return ERROR_OK;
+}
+
+static int ipdbg_on_new_connection(struct connection *connection)
+{
+	struct ipdbg_service *service = connection->service->priv;
+	connection->priv = &service->connection;
+	/* initialize ipdbg connection information */
+	ipdbg_init_fifo(&service->connection.up_fifo);
+	ipdbg_init_fifo(&service->connection.dn_fifo);
+
+	int retval = ipdbg_start_polling(service, connection);
+	if (retval != ERROR_OK) {
+		LOG_ERROR("BUG: ipdbg_start_polling failed");
+		return retval;
+	}
+
+	struct ipdbg_connection *conn = connection->priv;
+	conn->closed = false;
+
+	LOG_INFO("New IPDBG Connection");
+
+	return ERROR_OK;
+}
+
+static int ipdbg_on_connection_input(struct connection *connection)
+{
+	struct ipdbg_connection *conn = connection->priv;
+	struct ipdbg_fifo *fifo = &conn->dn_fifo;
+
+	if (ipdbg_fifo_is_full(fifo))
+		return ERROR_OK;
+
+	ipdbg_zero_rd_idx(fifo);
+	int bytes_read = connection_read(connection, fifo->buffer + fifo->count, IPDBG_BUFFER_SIZE - fifo->count);
+	if (bytes_read <= 0) {
+		if (bytes_read < 0)
+			LOG_ERROR("error during read: %s", strerror(errno));
+		return ERROR_SERVER_REMOTE_CLOSED;
+	}
+
+	fifo->count += bytes_read;
+
+	return ERROR_OK;
+}
+
+static int ipdbg_on_connection_closed(struct connection *connection)
+{
+	struct ipdbg_connection *conn = connection->priv;
+	conn->closed = true;
+	LOG_INFO("Closed IPDBG Connection");
+
+	return ipdbg_stop_polling(connection->service->priv);
+}
+
+static int ipdbg_start(uint16_t port, struct jtag_tap *tap, uint32_t user_instruction,
+					uint8_t data_register_length, struct ipdbg_virtual_ir_info *virtual_ir, uint8_t tool)
+{
+	LOG_INFO("starting ipdbg service on port %d for tool %d", port, tool);
+
+	struct ipdbg_hub *hub = ipdbg_find_hub(tap, user_instruction, virtual_ir);
+	if (hub) {
+		free(virtual_ir);
+		if (hub->data_register_length != data_register_length) {
+			LOG_DEBUG("hub must have the same data_register_length for all tools");
+			return ERROR_FAIL;
+		}
+	} else {
+		int retval = ipdbg_create_hub(tap, user_instruction, data_register_length, virtual_ir, &hub);
+		if (retval != ERROR_OK) {
+			free(virtual_ir);
+			return retval;
+		}
+	}
+
+	struct ipdbg_service *service = NULL;
+	int retval = ipdbg_create_service(hub, tool, &service, port);
+
+	if (retval != ERROR_OK || !service) {
+		if (hub->active_services == 0 && hub->active_connections == 0)
+			ipdbg_free_hub(hub);
+		return ERROR_FAIL;
+	}
+
+	char port_str_buffer[IPDBG_TCP_PORT_STR_MAX_LENGTH];
+	snprintf(port_str_buffer, IPDBG_TCP_PORT_STR_MAX_LENGTH, "%u", port);
+	retval = add_service("ipdbg", port_str_buffer, 1, &ipdbg_on_new_connection,
+		&ipdbg_on_connection_input, &ipdbg_on_connection_closed, service);
+	if (retval == ERROR_OK) {
+		ipdbg_add_service(service);
+		if (hub->active_services == 0 && hub->active_connections == 0)
+			ipdbg_add_hub(hub);
+		hub->active_services++;
+	} else {
+		if (hub->active_services == 0 && hub->active_connections == 0)
+			ipdbg_free_hub(hub);
+		free(service);
+	}
+
+	return retval;
+}
+
+static int ipdbg_stop(struct jtag_tap *tap, uint32_t user_instruction,
+			struct ipdbg_virtual_ir_info *virtual_ir, uint8_t tool)
+{
+	struct ipdbg_hub *hub = ipdbg_find_hub(tap, user_instruction, virtual_ir);
+	free(virtual_ir);
+	if (!hub)
+		return ERROR_FAIL;
+
+	struct ipdbg_service *service = ipdbg_find_service(hub, tool);
+	if (!service)
+		return ERROR_FAIL;
+
+	int retval = ipdbg_remove_service(service);
+	if (retval != ERROR_OK) {
+		LOG_ERROR("BUG: ipdbg_remove_service failed");
+		return retval;
+	}
+
+	char port_str_buffer[IPDBG_TCP_PORT_STR_MAX_LENGTH];
+	snprintf(port_str_buffer, IPDBG_TCP_PORT_STR_MAX_LENGTH, "%u", service->port);
+	retval = remove_service("ipdbg", port_str_buffer);
+	/* The ipdbg_service structure is freed by server.c:remove_service().
+	   There the "priv" pointer is freed.*/
+	if (retval != ERROR_OK) {
+		LOG_ERROR("BUG: remove_service failed");
+		return retval;
+	}
+	hub->active_services--;
+	if (hub->active_connections == 0 && hub->active_services == 0) {
+		retval = ipdbg_remove_hub(hub);
+		if (retval != ERROR_OK) {
+			LOG_ERROR("BUG: ipdbg_remove_hub failed");
+			return retval;
+		}
+		ipdbg_free_hub(hub);
+	}
+	return ERROR_OK;
+}
+
+COMMAND_HANDLER(handle_ipdbg_command)
+{
+	struct jtag_tap *tap = NULL;
+	uint16_t port = 4242;
+	uint8_t tool = 1;
+	uint32_t user_instruction = 0x00;
+	uint8_t data_register_length = IPDBG_MAX_DR_LENGTH;
+	bool start = true;
+	bool hub_configured = false;
+	bool has_virtual_ir = false;
+	uint32_t virtual_ir_instruction = 0x00e;
+	uint32_t virtual_ir_length = 5;
+	uint32_t virtual_ir_value = 0x11;
+	struct ipdbg_virtual_ir_info *virtual_ir = NULL;
+
+	if ((CMD_ARGC < IPDBG_MIN_NUM_OF_OPTIONS) || (CMD_ARGC > IPDBG_MAX_NUM_OF_OPTIONS))
+		return ERROR_COMMAND_SYNTAX_ERROR;
+
+	for (unsigned int i = 0; i < CMD_ARGC; ++i) {
+		if (strcmp(CMD_ARGV[i], "-tap") == 0) {
+			if (i + 1 >= CMD_ARGC || CMD_ARGV[i + 1][0] == '-') {
+				command_print(CMD, "no TAP given");
+				return ERROR_FAIL;
+			}
+			tap = jtag_tap_by_string(CMD_ARGV[i + 1]);
+			if (!tap) {
+				command_print(CMD, "Tap %s unknown", CMD_ARGV[i + 1]);
+				return ERROR_FAIL;
+			}
+			++i;
+		} else if (strcmp(CMD_ARGV[i], "-hub") == 0) {
+			COMMAND_PARSE_ADDITIONAL_NUMBER(u32, i, user_instruction, "ir_value to select hub");
+			hub_configured = true;
+			COMMAND_PARSE_OPTIONAL_NUMBER(u8, i, data_register_length);
+			if (data_register_length < IPDBG_MIN_DR_LENGTH ||
+				data_register_length > IPDBG_MAX_DR_LENGTH) {
+				command_print(CMD, "length of \"user\"-data register must be at least %d and at most %d.",
+							IPDBG_MIN_DR_LENGTH, IPDBG_MAX_DR_LENGTH);
+				return ERROR_FAIL;
+			}
+		} else if (strcmp(CMD_ARGV[i], "-vir") == 0) {
+			COMMAND_PARSE_OPTIONAL_NUMBER(u32, i, virtual_ir_value);
+			COMMAND_PARSE_OPTIONAL_NUMBER(u32, i, virtual_ir_length);
+			COMMAND_PARSE_OPTIONAL_NUMBER(u32, i, virtual_ir_instruction);
+			has_virtual_ir = true;
+		} else if (strcmp(CMD_ARGV[i], "-port") == 0) {
+			COMMAND_PARSE_ADDITIONAL_NUMBER(u16, i, port, "port number");
+		} else if (strcmp(CMD_ARGV[i], "-tool") == 0) {
+			COMMAND_PARSE_ADDITIONAL_NUMBER(u8, i, tool, "tool");
+		} else if (strcmp(CMD_ARGV[i], "-stop") == 0) {
+			start = false;
+		} else if (strcmp(CMD_ARGV[i], "-start") == 0) {
+			start = true;
+		} else {
+			command_print(CMD, "Unknown argument: %s", CMD_ARGV[i]);
+			return ERROR_FAIL;
+		}
+	}
+
+	if (!tap) {
+		command_print(CMD, "no valid tap selected");
+		return ERROR_FAIL;
+	}
+
+	if (!hub_configured) {
+		command_print(CMD, "hub not configured correctly");
+		return ERROR_FAIL;
+	}
+
+	if (tool >= ipdbg_max_tools_from_data_register_length(data_register_length)) {
+		command_print(CMD, "Tool: %d is invalid", tool);
+		return ERROR_FAIL;
+	}
+
+	if (has_virtual_ir) {
+		virtual_ir = calloc(1, sizeof(struct ipdbg_virtual_ir_info));
+		if (!virtual_ir) {
+			LOG_ERROR("Out of memory");
+			return ERROR_FAIL;
+		}
+		virtual_ir->instruction = virtual_ir_instruction;
+		virtual_ir->length      = virtual_ir_length;
+		virtual_ir->value       = virtual_ir_value;
+	}
+
+	if (start)
+		return ipdbg_start(port, tap, user_instruction, data_register_length, virtual_ir, tool);
+	else
+		return ipdbg_stop(tap, user_instruction, virtual_ir, tool);
+}
+
+static const struct command_registration ipdbg_command_handlers[] = {
+	{
+		.name = "ipdbg",
+		.handler = handle_ipdbg_command,
+		.mode = COMMAND_EXEC,
+		.help = "Starts or stops an IPDBG JTAG-Host server.",
+		.usage = "[-start|-stop] -tap device.tap -hub ir_value [dr_length]"
+				 " [-port number] [-tool number] [-vir [vir_value [length [instr_code]]]]",
+	},
+	COMMAND_REGISTRATION_DONE
+};
+
+int ipdbg_register_commands(struct command_context *cmd_ctx)
+{
+	return register_commands(cmd_ctx, NULL, ipdbg_command_handlers);
+}
diff --git a/src/server/ipdbg.h b/src/server/ipdbg.h
new file mode 100644
index 000000000..6b7054584
--- /dev/null
+++ b/src/server/ipdbg.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/* Copyright (C) 2020 by Daniel Anselmi <dan...@gm...> */
+
+#ifndef OPENOCD_IPDBG_IPDBG_H
+#define OPENOCD_IPDBG_IPDBG_H
+
+#include <helper/command.h>
+
+int ipdbg_register_commands(struct command_context *cmd_ctx);
+
+#endif /* OPENOCD_IPDBG_IPDBG_H */

commit 3d46346e07893fe6495a6c17fc06c710196f95e1
Author: Antonio Borneo <bor...@gm...>
Date:   Sun May 2 23:03:33 2021 +0200

    coding-style: additional style for C code
    
    To improve readability and to push more uniform code style.
    
    Prefer 'if (false) {...}' for unused code so it get checked by the
    compiler.
    Define preferred indentation for 'switch' statement.
    Require balanced brackets in 'if/else'.
    Report the max line length.
    Report the formatting strings for stdint/inttypes types.
    Report the type 'target_addr_t'.
    Prefer 'unsigned int' to 'unsigned'.
    
    Change-Id: I0192a4ed298f6c6c432764fdd156cffd4b13fc89
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: http://openocd.zylin.com/6203
    Reviewed-by: Tomas Vanek <va...@fb...>
    Tested-by: jenkins
    Reviewed-by: Oleksij Rempel <li...@re...>
    Reviewed-by: Tarek BOCHKATI <tar...@gm...>
    Reviewed-by: Marc Schink <de...@za...>

diff --git a/doc/manual/style.txt b/doc/manual/style.txt
index 755709fb0..91088994f 100644
--- a/doc/manual/style.txt
+++ b/doc/manual/style.txt
@@ -48,9 +48,55 @@ OpenOCD project.
 - use Unix line endings ('\\n'); do NOT use DOS endings ('\\r\\n')
 - limit adjacent empty lines to at most two (2).
 - remove any trailing empty lines at the end of source files
-- do not "comment out" code from the tree; instead, one should either:
-  -# remove it entirely (git can retrieve the old version), or
-  -# use an @c \#if/\#endif block.
+- do not "comment out" code from the tree nor put it within a block
+  @code
+  #if 0
+  ...
+  #endif
+  @endcode
+  otherwise it would never be checked at compile time and when new
+  patches get merged it could be not compilable anymore.
+  Code that is not fully working nor ready for submission should
+  instead be removed entirely (git can retrieve the old version).
+  For exceptional cases that require keeping some unused code, let
+  the compiler check it by putting it in a block
+  @code
+  if (false) {
+      /* explain why this code should be kept here */
+      ...
+  }
+  @endcode
+- in a @c switch statement align the @c switch with the @c case label
+  @code
+  switch (dev_id) {
+  case 0x0123:
+      size = 0x10000;
+      break;
+  case 0x0412:
+      size = 0x20000;
+      break;
+  default:
+      size = 0x40000;
+      break;
+  }
+  @endcode
+- in an <tt> if / then / else </tt> statement, if only one of the conditions
+  require curly brackets due to multi-statement block, put the curly brackets
+  also to the other condition
+  @code
+  if (x > 0)
+      a = 12 + x;
+  else
+      a = 24;
+  @endcode
+  @code
+  if (x > 0) {
+      a = 12 + x;
+  } else {
+      a = 24;
+      x = 0;
+  }
+  @endcode
 
 Finally, try to avoid lines of code that are longer than 72-80 columns:
 
@@ -60,6 +106,7 @@ Finally, try to avoid lines of code that are longer than 72-80 columns:
 - a few lines may be wider than this limit (typically format strings), but:
   - all C compilers will concatenate series of string constants.
   - all long string constants should be split across multiple lines.
+  - do never exceed 120 columns.
 
 @section stylenames Naming Rules
 
@@ -104,11 +151,15 @@ or variable length arrays on the stack. non-MMU hosts(uClinux) and
 pthreads require modest and predictable stack usage.
 
 @section styletypes Type Guidelines
-- use native types (@c int or @c unsigned) if the type is not important
+- use native types (@c int or <tt> unsigned int </tt>) if the type is not important
   - if size matters, use the types from \<stdint.h\> or \<inttypes.h\>:
     - @c int8_t, @c int16_t, @c int32_t, or @c int64_t: signed types of specified size
     - @c uint8_t, @c uint16_t, @c uint32_t, or @c uint64_t: unsigned types of specified size
+    - use the associated @c printf and @c scanf formatting strings for these types
+      (e.g. @c PRId8, PRIx16, SCNu8, ...)
   - do @b NOT redefine @c uN types from "types.h"
+  - use type @c target_addr_t for target's address values
+  - prefer type <tt> unsigned int </tt> to type @c unsigned
 
 @section stylefunc Functions
 
@@ -143,6 +194,20 @@ More directly, do @b not combine these kinds of statements:
 // Combined statements should be avoided
 if ((result = foo()) != ERROR_OK)
 	return result;
+@endcode
+- Do not compare @c bool values with @c true or @c false but use the
+  value directly
+@code
+if (!is_enabled)
+    ...
+@endcode
+- Avoid comparing pointers with @c NULL
+@code
+buf = malloc(buf_size);
+if (!buf) {
+    LOG_ERROR("Out of memory");
+    return ERROR_FAIL;
+}
 @endcode
 
  */

-----------------------------------------------------------------------

Summary of changes:
 doc/manual/style.txt   |  73 ++++-
 doc/openocd.texi       |  43 +++
 src/helper/command.h   |  42 +++
 src/jtag/core.c        |  10 +-
 src/server/Makefile.am |   4 +-
 src/server/ipdbg.c     | 782 +++++++++++++++++++++++++++++++++++++++++++++++++
 src/server/ipdbg.h     |  11 +
 7 files changed, 959 insertions(+), 6 deletions(-)
 create mode 100644 src/server/ipdbg.c
 create mode 100644 src/server/ipdbg.h


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- Log -----------------------------------------------------------------
commit c5c2a8300136d2c7d536aae3cfad7324372e5dfc
Author: R. Diez <rdi...@ya...>
Date:   Mon Apr 5 11:13:52 2021 +0200

    Enable adapter "Bus Pirate" by default.
    
    The Bus Pirate is now listed in the "OpenOCD configuration summary" too.
    
    Change-Id: Ieb7bf9134af456ebe9803f3108a243204fb2a62d
    Signed-off-by: R. Diez <rdi...@ya...>
    Reviewed-on: http://openocd.zylin.com/5637
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/configure.ac b/configure.ac
index 58be79039..e343875d8 100644
--- a/configure.ac
+++ b/configure.ac
@@ -148,6 +148,9 @@ m4_define([LIBJAYLINK_ADAPTERS],
 m4_define([PCIE_ADAPTERS],
 	[[[xlnx_pcie_xvc], [Xilinx XVC/PCIe], [XLNX_PCIE_XVC]]])
 
+m4_define([SERIAL_PORT_ADAPTERS],
+	[[[buspirate], [Bus Pirate], [BUS_PIRATE]]])
+
 m4_define([OPTIONAL_LIBRARIES],
 	[[[capstone], [Use Capstone disassembly framework], []]])
 
@@ -249,6 +252,7 @@ AC_ARG_ADAPTERS([
   LIBFTDI_ADAPTERS,
   LIBFTDI_USB1_ADAPTERS
   LIBGPIOD_ADAPTERS,
+  SERIAL_PORT_ADAPTERS,
   LIBJAYLINK_ADAPTERS
   ],[auto])
 
@@ -311,10 +315,6 @@ AC_ARG_ENABLE([gw16012],
   AS_HELP_STRING([--enable-gw16012], [Enable building support for the Gateworks GW16012 JTAG Programmer]),
   [build_gw16012=$enableval], [build_gw16012=no])
 
-AC_ARG_ENABLE([buspirate],
-  AS_HELP_STRING([--enable-buspirate], [Enable building support for the Buspirate]),
-  [build_buspirate=$enableval], [build_buspirate=no])
-
 AC_ARG_ENABLE([sysfsgpio],
   AS_HELP_STRING([--enable-sysfsgpio], [Enable building support for programming driven via sysfs gpios.]),
   [build_sysfsgpio=$enableval], [build_sysfsgpio=no])
@@ -399,10 +399,13 @@ AS_CASE([$host],
     ])
     parport_use_giveio=yes
 
-    AS_IF([test "x$build_buspirate" = "xyes"], [
+    AS_IF([test "x$enable_buspirate" = "xyes"], [
       AC_MSG_ERROR([buspirate currently not supported by MinGW32 hosts])
     ])
 
+    # In case enable_buspirate=auto, make sure it will not be built.
+    enable_buspirate=no
+
     AC_SUBST([HOST_CPPFLAGS], [-D__USE_MINGW_ANSI_STDIO])
   ],
   [*darwin*], [
@@ -529,7 +532,7 @@ AS_IF([test "x$build_gw16012" = "xyes"], [
   AC_DEFINE([BUILD_GW16012], [0], [0 if you don't want the Gateworks GW16012 driver.])
 ])
 
-AS_IF([test "x$build_buspirate" = "xyes"], [
+AS_IF([test "x$enable_buspirate" != "xno"], [
   AC_DEFINE([BUILD_BUSPIRATE], [1], [1 if you want the Buspirate JTAG driver.])
 ], [
   AC_DEFINE([BUILD_BUSPIRATE], [0], [0 if you don't want the Buspirate JTAG driver.])
@@ -693,7 +696,7 @@ AM_CONDITIONAL([USB_BLASTER_DRIVER], [test "x$enable_usb_blaster" != "xno" -o "x
 AM_CONDITIONAL([AMTJTAGACCEL], [test "x$build_amtjtagaccel" = "xyes"])
 AM_CONDITIONAL([GW16012], [test "x$build_gw16012" = "xyes"])
 AM_CONDITIONAL([REMOTE_BITBANG], [test "x$build_remote_bitbang" = "xyes"])
-AM_CONDITIONAL([BUSPIRATE], [test "x$build_buspirate" = "xyes"])
+AM_CONDITIONAL([BUSPIRATE], [test "x$enable_buspirate" != "xno"])
 AM_CONDITIONAL([SYSFSGPIO], [test "x$build_sysfsgpio" = "xyes"])
 AM_CONDITIONAL([XLNX_PCIE_XVC], [test "x$build_xlnx_pcie_xvc" = "xyes"])
 AM_CONDITIONAL([USE_LIBUSB1], [test "x$use_libusb1" = "xyes"])
@@ -778,7 +781,7 @@ m4_foreach([adapter], [USB1_ADAPTERS,
 	HIDAPI_ADAPTERS, HIDAPI_USB1_ADAPTERS, LIBFTDI_ADAPTERS,
 	LIBFTDI_USB1_ADAPTERS,
 	LIBGPIOD_ADAPTERS,
-	LIBJAYLINK_ADAPTERS, PCIE_ADAPTERS,
+	LIBJAYLINK_ADAPTERS, PCIE_ADAPTERS, SERIAL_PORT_ADAPTERS,
 	OPTIONAL_LIBRARIES],
 	[s=m4_format(["%-40s"], ADAPTER_DESC([adapter]))
 	AS_CASE([$ADAPTER_VAR([adapter])],

commit 40dd1e5284a9d4bb07fdbba5c8e7c5772b06b44f
Author: Marc Schink <de...@za...>
Date:   Fri Apr 30 10:51:35 2021 +0200

    target/riscv: Change 'authdata_read' output
    
    Use a constant output length and remove the line break to make the
    authentication data easier to parse.
    
    Change-Id: Iebbf1f171947ef89b0f360a2cb286a4ea15c6ba5
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: http://openocd.zylin.com/6199
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Reviewed-by: Tim Newsome <ti...@si...>

diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c
index c883b4203..1e93ded9e 100644
--- a/src/target/riscv/riscv.c
+++ b/src/target/riscv/riscv.c
@@ -2372,7 +2372,7 @@ COMMAND_HANDLER(riscv_authdata_read)
 		uint32_t value;
 		if (r->authdata_read(target, &value) != ERROR_OK)
 			return ERROR_FAIL;
-		command_print(CMD, "0x%" PRIx32, value);
+		command_print_sameline(CMD, "0x%08" PRIx32, value);
 		return ERROR_OK;
 	} else {
 		LOG_ERROR("authdata_read is not implemented for this target.");

-----------------------------------------------------------------------

Summary of changes:
 configure.ac             | 19 +++++++++++--------
 src/target/riscv/riscv.c |  2 +-
 2 files changed, 12 insertions(+), 9 deletions(-)


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- Log -----------------------------------------------------------------
commit 167adaf841bbf33e9a08ffcc34bc66e8158e6373
Author: Marc Schink <de...@za...>
Date:   Fri Apr 30 12:01:34 2021 +0200

    target/stm8: Make 'stm8_command_handlers' static
    
    Change-Id: I5237a8f2a1ecba9383672e37bd56f8ccd17598b6
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: http://openocd.zylin.com/6200
    Tested-by: jenkins
    Reviewed-by: Tarek BOCHKATI <tar...@gm...>
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/target/stm8.c b/src/target/stm8.c
index e99b3c21b..2a34ff6fa 100644
--- a/src/target/stm8.c
+++ b/src/target/stm8.c
@@ -2159,7 +2159,7 @@ static const struct command_registration stm8_exec_command_handlers[] = {
 	COMMAND_REGISTRATION_DONE
 };
 
-const struct command_registration stm8_command_handlers[] = {
+static const struct command_registration stm8_command_handlers[] = {
 	{
 		.name = "stm8",
 		.mode = COMMAND_ANY,
diff --git a/src/target/stm8.h b/src/target/stm8.h
index da7f1f119..b18ff58f9 100644
--- a/src/target/stm8.h
+++ b/src/target/stm8.h
@@ -70,6 +70,4 @@ target_to_stm8(struct target *target)
 	return target->arch_info;
 }
 
-const struct command_registration stm8_command_handlers[];
-
 #endif /* OPENOCD_TARGET_STM8_H */

commit 64d89d5ee1a554fbae8eb0a7231ccb2dc4428c1a
Author: Antonio Borneo <bor...@gm...>
Date:   Sat Apr 10 18:28:52 2021 +0200

    tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change
    
    Jimtcl commit 1843b79a03dd ("expr: TIP 526, only support a single
    arg") drops the support for multi-argument syntax for the TCL
    command 'expr'.
    
    Fix manually the remaining lines that don't match simple patterns
    and would require dedicated boring scripting.
    Remove the 'expr' command where appropriate.
    
    Change-Id: Ia75210c8447f88d38515addab4a836af9103096d
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: http://openocd.zylin.com/6161
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/tcl/bitsbytes.tcl b/tcl/bitsbytes.tcl
index 5f9cae114..01cc50926 100644
--- a/tcl/bitsbytes.tcl
+++ b/tcl/bitsbytes.tcl
@@ -36,7 +36,7 @@ proc create_mask { MSB LSB } {
 # Result:  0x02340000
 
 proc extract_bitfield { VALUE MSB LSB } {
-    return [expr [create_mask $MSB $LSB] & $VALUE]
+    return [expr {[create_mask $MSB $LSB] & $VALUE}]
 }
 
 
@@ -47,7 +47,7 @@ proc extract_bitfield { VALUE MSB LSB } {
 # Result:  0x00000234
 #
 proc normalize_bitfield { VALUE MSB LSB } {
-    return [expr [extract_bitfield $VALUE $MSB $LSB ] >> $LSB]
+    return [expr {[extract_bitfield $VALUE $MSB $LSB ] >> $LSB}]
 }
 
 proc show_normalize_bitfield { VALUE MSB LSB } {
diff --git a/tcl/board/at91sam9261-ek.cfg b/tcl/board/at91sam9261-ek.cfg
index d6e8c2d15..1f3de48b8 100644
--- a/tcl/board/at91sam9261-ek.cfg
+++ b/tcl/board/at91sam9261-ek.cfg
@@ -29,9 +29,9 @@ proc at91sam9261ek_reset_init { } {
 	;# set master_pll_div	1
 	;# set master_pll_mul	13
 
-	set val	[expr $::AT91_WDT_WDV]			;# Counter Value
-	set val	[expr {$val | $::AT91_WDT_WDDIS}]	;# Watchdog Disable
-	set val	[expr {$val | $::AT91_WDT_WDD}]		;# Delta Value
+	set val	$::AT91_WDT_WDV							;# Counter Value
+	set val	[expr {$val | $::AT91_WDT_WDDIS}]		;# Watchdog Disable
+	set val	[expr {$val | $::AT91_WDT_WDD}]			;# Delta Value
 	set val	[expr {$val | $::AT91_WDT_WDDBGHLT}]	;# Debug Halt
 	set val	[expr {$val | $::AT91_WDT_WDIDLEHLT}]	;# Idle Halt
 
@@ -42,7 +42,7 @@ proc at91sam9261ek_reset_init { } {
 	set config(matrix_ebicsa_val) [expr {$::AT91_MATRIX_DBPUC | $::AT91_MATRIX_CS1A_SDRAMC}]
 
 	;# SDRAMC_CR - Configuration register
-	set val [expr $::AT91_SDRAMC_NC_9]
+	set val $::AT91_SDRAMC_NC_9
 	set val [expr {$val | $::AT91_SDRAMC_NR_13}]
 	set val [expr {$val | $::AT91_SDRAMC_NB_4}]
 	set val [expr {$val | $::AT91_SDRAMC_CAS_3}]
diff --git a/tcl/board/at91sam9263-ek.cfg b/tcl/board/at91sam9263-ek.cfg
index b88efa971..ab04228ce 100644
--- a/tcl/board/at91sam9263-ek.cfg
+++ b/tcl/board/at91sam9263-ek.cfg
@@ -24,9 +24,9 @@ proc at91sam9263ek_reset_init { } {
 	set config(master_pll_div)	14
 	set config(master_pll_mul)	171
 
-	set val	[expr $::AT91_WDT_WDV]			;# Counter Value
-	set val	[expr {$val | $::AT91_WDT_WDDIS}]	;# Watchdog Disable
-	set val	[expr {$val | $::AT91_WDT_WDD}]		;# Delta Value
+	set val	$::AT91_WDT_WDV							;# Counter Value
+	set val	[expr {$val | $::AT91_WDT_WDDIS}]		;# Watchdog Disable
+	set val	[expr {$val | $::AT91_WDT_WDD}]			;# Delta Value
 	set val	[expr {$val | $::AT91_WDT_WDDBGHLT}]	;# Debug Halt
 	set val	[expr {$val | $::AT91_WDT_WDIDLEHLT}]	;# Idle Halt
 
@@ -36,13 +36,13 @@ proc at91sam9263ek_reset_init { } {
 	;# EBI_CSA, no pull-ups for D[15:0], CS1 SDRAM, CS3 NAND Flash
 	set config(matrix_ebicsa_addr)	$::AT91_MATRIX_EBI0CSA
 
-	set val	[expr $::AT91_MATRIX_EBI0_DBPUC]
+	set val	$::AT91_MATRIX_EBI0_DBPUC
 	set val [expr {$val | $::AT91_MATRIX_EBI0_VDDIOMSEL_3_3V}]
 	set val [expr {$val | $::AT91_MATRIX_EBI0_CS1A_SDRAMC}]
 	set config(matrix_ebicsa_val) $val
 
 	;# SDRAMC_CR - Configuration register
-	set val [expr $::AT91_SDRAMC_NC_9]
+	set val $::AT91_SDRAMC_NC_9
 	set val [expr {$val | $::AT91_SDRAMC_NR_13}]
 	set val [expr {$val | $::AT91_SDRAMC_NB_4}]
 	set val [expr {$val | $::AT91_SDRAMC_CAS_3}]
diff --git a/tcl/board/at91sam9g20-ek.cfg b/tcl/board/at91sam9g20-ek.cfg
index 03296c50e..59ee4d2a3 100644
--- a/tcl/board/at91sam9g20-ek.cfg
+++ b/tcl/board/at91sam9g20-ek.cfg
@@ -77,25 +77,25 @@ proc at91sam9g20_reset_init { } {
 	# Wait for MOSCS in PMC_SR to assert indicating oscillator is again stable after change to CKGR_MOR.
 
 	mww 0xfffffc20 0x00004001
-	while { [expr [read_register 0xfffffc68] & 0x01] != 1 } { sleep 1 }
+	while { [expr {[read_register 0xfffffc68] & 0x01}] != 1 } { sleep 1 }
 
 	# Set PLLA Register for 792.576 MHz (divider: bypass, multiplier: 43).
 	# Wait for LOCKA signal in PMC_SR to assert indicating PLLA is stable.
 
 	mww 0xfffffc28 0x202a3f01
-	while { [expr [read_register 0xfffffc68] & 0x02] != 2 } { sleep 1 }
+	while { [expr {[read_register 0xfffffc68] & 0x02}] != 2 } { sleep 1 }
 
 	# Set master system clock prescaler divide by 6 and processor clock divide by 2 in PMC_MCKR.
 	# Wait for MCKRDY signal from PMC_SR to assert.
 
 	mww 0xfffffc30 0x00000101
-	while { [expr [read_register 0xfffffc68] & 0x08] != 8 } { sleep 1 }
+	while { [expr {[read_register 0xfffffc68] & 0x08}] != 8 } { sleep 1 }
 
 	# Now change PMC_MCKR register to select PLLA.
 	# Wait for MCKRDY signal from PMC_SR to assert.
 
 	mww 0xfffffc30 0x00001302
-	while { [expr [read_register 0xfffffc68] & 0x08] != 8 } { sleep 1 }
+	while { [expr {[read_register 0xfffffc68] & 0x08}] != 8 } { sleep 1 }
 
 	# Processor and master clocks are now operating and stable at maximum frequency possible:
 	#	-> MCLK = 132.096 MHz
diff --git a/tcl/board/dm355evm.cfg b/tcl/board/dm355evm.cfg
index 1e35b68fa..bf5659ccc 100644
--- a/tcl/board/dm355evm.cfg
+++ b/tcl/board/dm355evm.cfg
@@ -87,7 +87,7 @@ proc dm355evm_init {} {
 	mmw $addr 0x2000 0
 
 	# wait for READY
-        while { [expr [mrw $addr] & 0x8000] == 0 } { sleep 1 }
+        while { [expr {[mrw $addr] & 0x8000}] == 0 } { sleep 1 }
 
 	# set IO_READY; then LOCK and PWRSAVE; then PWRDN
 	mmw $addr 0x4000 0
diff --git a/tcl/board/embedded-artists_lpc2478-32.cfg b/tcl/board/embedded-artists_lpc2478-32.cfg
index abf0a5f22..38f5e1b8e 100644
--- a/tcl/board/embedded-artists_lpc2478-32.cfg
+++ b/tcl/board/embedded-artists_lpc2478-32.cfg
@@ -125,7 +125,7 @@ proc init_board {} {
 #
 proc enable_pll {} {
     # Disconnect PLL in case it is already connected
-    if {[expr [read_register 0xE01FC080] & 0x03] == 3} {
+    if {[expr {[read_register 0xE01FC080] & 0x03}] == 3} {
         # Disconnect it, but leave it enabled
         # (This MUST be done in two steps)
         mww 0xE01FC080 0x00000001       ;# PLLCON: disconnect PLL
diff --git a/tcl/board/hilscher_nxhx10.cfg b/tcl/board/hilscher_nxhx10.cfg
index add424d4e..1875dacc0 100644
--- a/tcl/board/hilscher_nxhx10.cfg
+++ b/tcl/board/hilscher_nxhx10.cfg
@@ -34,7 +34,7 @@ proc mread32 {addr} {
 proc init_clocks { } {
   puts "Enabling all clocks "
   set accesskey [mread32 0x101c0070]
-  mww  0x101c0070 [expr $accesskey]
+  mww  0x101c0070 $accesskey
 
   mww  0x101c0028 0x00007511
 }
@@ -42,7 +42,7 @@ proc init_clocks { } {
 proc init_sdrambus { } {
   puts "Initializing external SDRAM Bus 16 Bit "
   set accesskey [mread32 0x101c0070]
-  mww  0x101c0070 [expr $accesskey]
+  mww  0x101c0070 $accesskey
   mww  0x101c0C40 0x00000050
 
   puts "Configuring SDRAM controller for K4S561632E (32MB) "
diff --git a/tcl/board/icnova_imx53_sodimm.cfg b/tcl/board/icnova_imx53_sodimm.cfg
index 0a161f6cd..363d7b4f3 100644
--- a/tcl/board/icnova_imx53_sodimm.cfg
+++ b/tcl/board/icnova_imx53_sodimm.cfg
@@ -69,7 +69,7 @@ proc init_l2cc { } {
 	set tR [arm mrc 15 0 1 0 1]
 	; #bic r0, r0, #0x2
 	; #mcr 15, 0, r0, c1, c0, 1
-	arm mcr 15 0 1 0 1 [expr $tR & ~(1<<2)]
+	arm mcr 15 0 1 0 1 [expr {$tR & ~(1 << 2)}]
 
 	; #/* reconfigure L2 cache aux control reg */
 	; #mov r0, #0xC0                   /* tag RAM */
@@ -139,7 +139,7 @@ proc init_clock { } {
 	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CBCMR}] 0x00016154
 
 	; # change uart clk parent to pll2
-	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CSCMR1}] [expr [mrw [expr {$CCM_BASE_ADDR + $CLKCTL_CSCMR1}]] & 0xfcffffff | 0x01000000]
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CSCMR1}] [expr {[mrw [expr {$CCM_BASE_ADDR + $CLKCTL_CSCMR1}]] & 0xfcffffff | 0x01000000}]
 
 	; # make sure change is effective
 	while {[mrw [expr {$CCM_BASE_ADDR + $CLKCTL_CDHIPR}]] != 0} { sleep 1 }
@@ -157,7 +157,7 @@ proc init_clock { } {
 	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CCSR}] 0x0
 
 	; # make uart div=6
-	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CSCDR1}] [expr [mrw [expr {$CCM_BASE_ADDR + $CLKCTL_CSCDR1}]] & 0xffffffc0 | 0x0a]
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CSCDR1}] [expr {[mrw [expr {$CCM_BASE_ADDR + $CLKCTL_CSCDR1}]] & 0xffffffc0 | 0x0a}]
 
 	; # Restore the default values in the Gate registers
 	mww [expr {$CCM_BASE_ADDR + 0x68}] 0xFFFFFFFF
@@ -243,7 +243,7 @@ proc setup_pll { PLL_ADDR CLK } {
 	mww [expr {$PLL_ADDR + $PLL_DP_HFS_MFN}] $DP_MFN
 
 	mww [expr {$PLL_ADDR + $PLL_DP_CTL}] 0x00001232
-	while {[expr [mrw [expr {$PLL_ADDR + $PLL_DP_CTL}]] & 0x1] == 0} { sleep 1 }
+	while {[expr {[mrw [expr {$PLL_ADDR + $PLL_DP_CTL}]] & 0x1}] == 0} { sleep 1 }
 }
 
 
diff --git a/tcl/board/icnova_sam9g45_sodimm.cfg b/tcl/board/icnova_sam9g45_sodimm.cfg
index 30dc34748..8a0736b1f 100644
--- a/tcl/board/icnova_sam9g45_sodimm.cfg
+++ b/tcl/board/icnova_sam9g45_sodimm.cfg
@@ -89,27 +89,27 @@ proc at91sam9g45_init { } {
 	# Wait for MOSCS in PMC_SR to assert indicating oscillator is again stable after change to CKGR_MOR.
 
 	mww 0xfffffc20 0x00004001
-	while { [expr [read_register 0xfffffc68] & 0x01] != 1 } { sleep 1 }
+	while { [expr {[read_register 0xfffffc68] & 0x01}] != 1 } { sleep 1 }
 
 	# Set PLLA Register for 792.576 MHz (divider: bypass, multiplier: 43).
 	# Wait for LOCKA signal in PMC_SR to assert indicating PLLA is stable.
 
 	#mww 0xfffffc28 0x202a3f01
 	mww 0xfffffc28 0x20c73f03
-	while { [expr [read_register 0xfffffc68] & 0x02] != 2 } { sleep 1 }
+	while { [expr {[read_register 0xfffffc68] & 0x02}] != 2 } { sleep 1 }
 
 	# Set master system clock prescaler divide by 6 and processor clock divide by 2 in PMC_MCKR.
 	# Wait for MCKRDY signal from PMC_SR to assert.
 
 	#mww 0xfffffc30 0x00000101
 	mww 0xfffffc30 0x00001301
-	while { [expr [read_register 0xfffffc68] & 0x08] != 8 } { sleep 1 }
+	while { [expr {[read_register 0xfffffc68] & 0x08}] != 8 } { sleep 1 }
 
 	# Now change PMC_MCKR register to select PLLA.
 	# Wait for MCKRDY signal from PMC_SR to assert.
 
 	mww 0xfffffc30 0x00001302
-	while { [expr [read_register 0xfffffc68] & 0x08] != 8 } { sleep 1 }
+	while { [expr {[read_register 0xfffffc68] & 0x08}] != 8 } { sleep 1 }
 
 	# Processor and master clocks are now operating and stable at maximum frequency possible:
 	#	-> MCLK = 132.096 MHz
@@ -214,7 +214,7 @@ proc at91sam9g45_init { } {
 	sleep 1
 
 	# 9. Enable DLL Reset (set DLL bit)
-	set CR  [expr [read_register 0xffffe608] | 0x80]
+	set CR  [expr {[read_register 0xffffe608] | 0x80}]
 	mww 0xffffe608 $CR
 
 	# 10. mode register cycle to reset the DLL
@@ -236,7 +236,7 @@ proc at91sam9g45_init { } {
 	# 12.3 delay 10 cycles
 
 	# 13. disable DLL reset (clear DLL bit)
-	set CR  [expr [read_register 0xffffe608] & 0xffffff7f]
+	set CR  [expr {[read_register 0xffffe608] & 0xffffff7f}]
 	mww 0xffffe608 $CR
 
 	# 14. mode register set cycle
@@ -244,7 +244,7 @@ proc at91sam9g45_init { } {
 	mww 0x70000000 0x1
 
 	# 15. program OCD field (set OCD bits)
-	set CR  [expr [read_register 0xffffe608] | 0x7000]
+	set CR  [expr {[read_register 0xffffe608] | 0x7000}]
 	mww 0xffffe608 $CR
 
 	# 16. (EMRS1)
@@ -253,7 +253,7 @@ proc at91sam9g45_init { } {
 	# 16.1 delay 2 cycles
 
 	# 17. disable OCD field (clear OCD bits)
-	set CR  [expr [read_register 0xffffe608] & 0xffff8fff]
+	set CR  [expr {[read_register 0xffffe608] & 0xffff8fff}]
 	mww 0xffffe608 $CR
 
 	# 18. (EMRS1)
diff --git a/tcl/board/imx53-m53evk.cfg b/tcl/board/imx53-m53evk.cfg
index 6f4964e3d..04f0f9f15 100644
--- a/tcl/board/imx53-m53evk.cfg
+++ b/tcl/board/imx53-m53evk.cfg
@@ -65,7 +65,7 @@ proc init_l2cc { } {
 	set tR [arm mrc 15 0 1 0 1]
 	; #bic r0, r0, #0x2
 	; #mcr 15, 0, r0, c1, c0, 1
-	arm mcr 15 0 1 0 1 [expr $tR & ~(1<<2)]
+	arm mcr 15 0 1 0 1 [expr {$tR & ~(1 << 2)}]
 
 	; #/* reconfigure L2 cache aux control reg */
 	; #mov r0, #0xC0                   /* tag RAM */
@@ -135,7 +135,7 @@ proc init_clock { } {
 	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CBCMR}] 0x00016154
 
 	; # change uart clk parent to pll2
-	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CSCMR1}] [expr [mrw [expr {$CCM_BASE_ADDR + $CLKCTL_CSCMR1}]] & 0xfcffffff | 0x01000000]
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CSCMR1}] [expr {[mrw [expr {$CCM_BASE_ADDR + $CLKCTL_CSCMR1}]] & 0xfcffffff | 0x01000000}]
 
 	; # make sure change is effective
 	while {[mrw [expr {$CCM_BASE_ADDR + $CLKCTL_CDHIPR}]] != 0} { sleep 1 }
@@ -153,7 +153,7 @@ proc init_clock { } {
 	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CCSR}] 0x0
 
 	; # make uart div=6
-	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CSCDR1}] [expr [mrw [expr {$CCM_BASE_ADDR + $CLKCTL_CSCDR1}]] & 0xffffffc0 | 0x0a]
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CSCDR1}] [expr {[mrw [expr {$CCM_BASE_ADDR + $CLKCTL_CSCDR1}]] & 0xffffffc0 | 0x0a}]
 
 	; # Restore the default values in the Gate registers
 	mww [expr {$CCM_BASE_ADDR + 0x68}] 0xFFFFFFFF
@@ -239,7 +239,7 @@ proc setup_pll { PLL_ADDR CLK } {
 	mww [expr {$PLL_ADDR + $PLL_DP_HFS_MFN}] $DP_MFN
 
 	mww [expr {$PLL_ADDR + $PLL_DP_CTL}] 0x00001232
-	while {[expr [mrw [expr {$PLL_ADDR + $PLL_DP_CTL}]] & 0x1] == 0} { sleep 1 }
+	while {[expr {[mrw [expr {$PLL_ADDR + $PLL_DP_CTL}]] & 0x1}] == 0} { sleep 1 }
 }
 
 
diff --git a/tcl/board/imx53loco.cfg b/tcl/board/imx53loco.cfg
index e1bc44da3..d4ec06079 100644
--- a/tcl/board/imx53loco.cfg
+++ b/tcl/board/imx53loco.cfg
@@ -70,7 +70,7 @@ proc init_l2cc { } {
 	set tR [arm mrc 15 0 1 0 1]
 	; #bic r0, r0, #0x2
 	; #mcr 15, 0, r0, c1, c0, 1
-	arm mcr 15 0 1 0 1 [expr $tR & ~(1<<2)]
+	arm mcr 15 0 1 0 1 [expr {$tR & ~(1 << 2)}]
 
 	; #/* reconfigure L2 cache aux control reg */
 	; #mov r0, #0xC0                   /* tag RAM */
@@ -140,7 +140,7 @@ proc init_clock { } {
 	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CBCMR}] 0x00016154
 
 	; # change uart clk parent to pll2
-	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CSCMR1}] [expr [mrw [expr {$CCM_BASE_ADDR + $CLKCTL_CSCMR1}]] & 0xfcffffff | 0x01000000]
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CSCMR1}] [expr {[mrw [expr {$CCM_BASE_ADDR + $CLKCTL_CSCMR1}]] & 0xfcffffff | 0x01000000}]
 
 	; # make sure change is effective
 	while {[mrw [expr {$CCM_BASE_ADDR + $CLKCTL_CDHIPR}]] != 0} { sleep 1 }
@@ -158,7 +158,7 @@ proc init_clock { } {
 	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CCSR}] 0x0
 
 	; # make uart div=6
-	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CSCDR1}] [expr [mrw [expr {$CCM_BASE_ADDR + $CLKCTL_CSCDR1}]] & 0xffffffc0 | 0x0a]
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CSCDR1}] [expr {[mrw [expr {$CCM_BASE_ADDR + $CLKCTL_CSCDR1}]] & 0xffffffc0 | 0x0a}]
 
 	; # Restore the default values in the Gate registers
 	mww [expr {$CCM_BASE_ADDR + 0x68}] 0xFFFFFFFF
@@ -244,7 +244,7 @@ proc setup_pll { PLL_ADDR CLK } {
 	mww [expr {$PLL_ADDR + $PLL_DP_HFS_MFN}] $DP_MFN
 
 	mww [expr {$PLL_ADDR + $PLL_DP_CTL}] 0x00001232
-	while {[expr [mrw [expr {$PLL_ADDR + $PLL_DP_CTL}]] & 0x1] == 0} { sleep 1 }
+	while {[expr {[mrw [expr {$PLL_ADDR + $PLL_DP_CTL}]] & 0x1}] == 0} { sleep 1 }
 }
 
 
diff --git a/tcl/board/nxp_imx7sabre.cfg b/tcl/board/nxp_imx7sabre.cfg
index c595e3a67..789fc5b62 100644
--- a/tcl/board/nxp_imx7sabre.cfg
+++ b/tcl/board/nxp_imx7sabre.cfg
@@ -27,7 +27,7 @@ proc imx7_uart_dbgconf { } {
 }
 
 proc check_bits_set_32 { addr mask } {
-    while { [expr [mrw $addr] & $mask == 0] } { }
+    while { [expr {[mrw $addr] & $mask} == 0] } { }
 }
 
 proc apply_dcd { } {
diff --git a/tcl/chip/atmel/at91/at91_pmc.cfg b/tcl/chip/atmel/at91/at91_pmc.cfg
index 0233cb4c1..dd554ce81 100644
--- a/tcl/chip/atmel/at91/at91_pmc.cfg
+++ b/tcl/chip/atmel/at91/at91_pmc.cfg
@@ -87,7 +87,7 @@ set			AT91_PMC_USBS_PLLA		[expr {0 << 0}]
 set			AT91_PMC_USBS_UPLL		[expr {1 << 0}]
 set		AT91_PMC_OHCIUSBDIV	[expr {0xF <<  8}]		;# Divider for USB OHCI Clock
 
-;# set	AT91_PMC_PCKR(n)	[expr ($AT91_PMC + 0x40 + ((n) * 4))]	;# Programmable Clock 0-N Registers
+;# set	AT91_PMC_PCKR(n)	[expr {$AT91_PMC + 0x40 + ((n) * 4)}]	;# Programmable Clock 0-N Registers
 set		AT91_PMC_CSSMCK		[expr {0x1 <<  8}]		;# CSS or Master Clock Selection
 set			AT91_PMC_CSSMCK_CSS		[expr {0 << 8}]
 set			AT91_PMC_CSSMCK_MCK		[expr {1 << 8}]
diff --git a/tcl/chip/atmel/at91/at91sam9_init.cfg b/tcl/chip/atmel/at91/at91sam9_init.cfg
index 688cb1f4c..27611eb5e 100644
--- a/tcl/chip/atmel/at91/at91sam9_init.cfg
+++ b/tcl/chip/atmel/at91/at91sam9_init.cfg
@@ -11,7 +11,7 @@ proc at91sam9_reset_start { } {
 	jtag_rclk 8
 	halt
 	wait_halt 10000
-	set rstc_mr_val [expr $::AT91_RSTC_KEY]
+	set rstc_mr_val $::AT91_RSTC_KEY
 	set rstc_mr_val [expr {$rstc_mr_val | (5 << 8)}]
 	set rstc_mr_val [expr {$rstc_mr_val | $::AT91_RSTC_URSTEN}]
 	mww $::AT91_RSTC_MR $rstc_mr_val	;# RSTC_MR : enable user reset.
@@ -24,25 +24,25 @@ proc at91sam9_reset_init { config } {
 	set ckgr_mor [expr {$::AT91_PMC_MOSCEN | (255 << 8)}]
 
 	mww $::AT91_CKGR_MOR $ckgr_mor	;# CKGR_MOR - enable main osc.
-	while { [expr [mrw $::AT91_PMC_SR] & $::AT91_PMC_MOSCS] != $::AT91_PMC_MOSCS } { sleep 1 }
+	while { [expr {[mrw $::AT91_PMC_SR] & $::AT91_PMC_MOSCS}] != $::AT91_PMC_MOSCS } { sleep 1 }
 
-	set pllar_val	[expr $::AT91_PMC_PLLA_WR_ERRATA] ;# Bit 29 must be 1 when prog
+	set pllar_val	$::AT91_PMC_PLLA_WR_ERRATA ;# Bit 29 must be 1 when prog
 	set pllar_val	[expr {$pllar_val | $::AT91_PMC_OUT}]
 	set pllar_val	[expr {$pllar_val | $::AT91_PMC_PLLCOUNT}]
-	set pllar_val	[expr ($pllar_val | ($config(master_pll_mul) - 1) << 16)]
-	set pllar_val	[expr ($pllar_val | $config(master_pll_div))]
+	set pllar_val	[expr {$pllar_val | ($config(master_pll_mul) - 1) << 16}]
+	set pllar_val	[expr {$pllar_val | $config(master_pll_div)}]
 
 	mww $::AT91_CKGR_PLLAR $pllar_val	 ;# CKGR_PLLA - (18.432MHz/13)*141 = 199.9 MHz
-	while { [expr [mrw $::AT91_PMC_SR] & $::AT91_PMC_LOCKA] != $::AT91_PMC_LOCKA } { sleep 1 }
+	while { [expr {[mrw $::AT91_PMC_SR] & $::AT91_PMC_LOCKA}] != $::AT91_PMC_LOCKA } { sleep 1 }
 
 	;# PCK/2 = MCK Master Clock from PLLA
-	set mckr_val	[expr $::AT91_PMC_CSS_PLLA]
+	set mckr_val	$::AT91_PMC_CSS_PLLA
 	set mckr_val	[expr {$mckr_val | $::AT91_PMC_PRES_1}]
 	set mckr_val	[expr {$mckr_val | $::AT91SAM9_PMC_MDIV_2}]
 	set mckr_val	[expr {$mckr_val | $::AT91_PMC_PDIV_1}]
 
 	mww $::AT91_PMC_MCKR $mckr_val	;# PMC_MCKR (MCLK: 0x102 - (CLK/2)MHZ, 0x202 - (CLK/3)MHz)
-	while { [expr [mrw $::AT91_PMC_SR] & $::AT91_PMC_MCKRDY] != $::AT91_PMC_MCKRDY } { sleep 1 }
+	while { [expr {[mrw $::AT91_PMC_SR] & $::AT91_PMC_MCKRDY}] != $::AT91_PMC_MCKRDY } { sleep 1 }
 
 	## switch JTAG clock to highspeed clock
 	jtag_rclk 0
@@ -50,7 +50,7 @@ proc at91sam9_reset_init { config } {
 	arm7_9 dcc_downloads enable	;# Enable faster DCC downloads
 	arm7_9 fast_memory_access enable
 
-	set rstc_mr_val [expr ($::AT91_RSTC_KEY)]
+	set rstc_mr_val $::AT91_RSTC_KEY
 	set rstc_mr_val [expr {$rstc_mr_val | $::AT91_RSTC_URSTEN}]
 	mww $::AT91_RSTC_MR $rstc_mr_val	;# user reset enable
 
diff --git a/tcl/chip/atmel/at91/usarts.tcl b/tcl/chip/atmel/at91/usarts.tcl
index f840b78c3..253b7fbfc 100644
--- a/tcl/chip/atmel/at91/usarts.tcl
+++ b/tcl/chip/atmel/at91/usarts.tcl
@@ -63,7 +63,7 @@ proc show_mmr_USx_MR_helper { NAME ADDR VAL } {
     }
     echo [format "\tParity: %s " $s]
 
-    set x [expr 5 + [show_normalize_bitfield $VAL 7 6]]
+    set x [expr {5 + [show_normalize_bitfield $VAL 7 6]}]
     echo [format "\tDatabits: %d" $x]
 
     set x [show_normalize_bitfield $VAL 13 12]
diff --git a/tcl/chip/st/spear/quirk_no_srst.tcl b/tcl/chip/st/spear/quirk_no_srst.tcl
index 515fb5824..551df061d 100644
--- a/tcl/chip/st/spear/quirk_no_srst.tcl
+++ b/tcl/chip/st/spear/quirk_no_srst.tcl
@@ -24,7 +24,7 @@ set sp_reset_mode ""
 proc sp_is_halted {} {
 	global sp_target_name
 
-	return [expr [string compare [$sp_target_name curstate] "halted" ] == 0]
+	return [expr {[string compare [$sp_target_name curstate] "halted" ] == 0}]
 }
 
 # wait for reset button to be pressed, causing CPU to get halted
diff --git a/tcl/chip/st/spear/spear3xx.tcl b/tcl/chip/st/spear/spear3xx.tcl
index ef3884137..86f2a1d24 100644
--- a/tcl/chip/st/spear/spear3xx.tcl
+++ b/tcl/chip/st/spear/spear3xx.tcl
@@ -19,7 +19,7 @@ proc sp3xx_clock_default {} {
 	mww 0xfca00014 0x0ffffff8	;# set pll timeout to minimum (100us ?!?)
 
 	# DDRCORE disable to change frequency
-	set val [expr ([mrw 0xfca8002c] & ~0x20000000) | 0x40000000]
+	set val [expr {([mrw 0xfca8002c] & ~0x20000000) | 0x40000000}]
 	mww 0xfca8002c $val
 	mww 0xfca8002c $val ;# Yes, write twice!
 
@@ -29,7 +29,7 @@ proc sp3xx_clock_default {} {
 	mww 0xfca80008 0x00001c0e	;# enable
 	mww 0xfca80008 0x00001c06	;# strobe
 	mww 0xfca80008 0x00001c0e
-	while { [expr [mrw 0xfca80008] & 0x01] == 0x00 } { sleep 1 }
+	while { [expr {[mrw 0xfca80008] & 0x01}] == 0x00 } { sleep 1 }
 
 	# programming PLL2
 	mww 0xfca80018 0xa600010c	;# M=166, P=1, N=12
@@ -37,13 +37,13 @@ proc sp3xx_clock_default {} {
 	mww 0xfca80014 0x00001c0e	;# enable
 	mww 0xfca80014 0x00001c06	;# strobe
 	mww 0xfca80014 0x00001c0e
-	while { [expr [mrw 0xfca80014] & 0x01] == 0x00 } { sleep 1 }
+	while { [expr {[mrw 0xfca80014] & 0x01}] == 0x00 } { sleep 1 }
 
 	mww 0xfca80028 0x00000082	;# enable plltimeen
 	mww 0xfca80024 0x00000511	;# set hclkdiv="/2" & pclkdiv="/2"
 
 	mww 0xfca00000 0x00000004	;# setting SYSCTL to NORMAL mode
-	while { [expr [mrw 0xfca00000] & 0x20] != 0x20 } { sleep 1 }
+	while { [expr {[mrw 0xfca00000] & 0x20}] != 0x20 } { sleep 1 }
 
 	# Select source of DDR clock
 	#mmw 0xfca80020 0x10000000 0x70000000 ;# PLL1
diff --git a/tcl/fpga/xilinx-xadc.cfg b/tcl/fpga/xilinx-xadc.cfg
index c451ca2f2..250879ec9 100644
--- a/tcl/fpga/xilinx-xadc.cfg
+++ b/tcl/fpga/xilinx-xadc.cfg
@@ -16,7 +16,7 @@ proc xadc_cmd {cmd addr data} {
 		READ 0x01
 		WRITE 0x02
 	}
-	return [expr ($cmds($cmd) << 26) | ($addr << 16) | ($data << 0)]
+	return [expr {($cmds($cmd) << 26) | ($addr << 16) | ($data << 0)}]
 }
 
 # XADC register addresses
diff --git a/tcl/memory.tcl b/tcl/memory.tcl
index c1e012d8d..8d50ba853 100644
--- a/tcl/memory.tcl
+++ b/tcl/memory.tcl
@@ -58,7 +58,7 @@ set ACCESS_WIDTH_ANY  [expr {$ACCESS_WIDTH_8 + $ACCESS_WIDTH_16 + $ACCESS_WIDTH_
 set UNKNOWN(0,ACCESS_WIDTH) $ACCESS_WIDTH_NONE
 
 proc iswithin { ADDRESS BASE LEN } {
-    return [expr ((($ADDRESS - $BASE) >= 0) && (($BASE + $LEN - $ADDRESS) > 0))]
+    return [expr {(($ADDRESS - $BASE) >= 0) && (($BASE + $LEN - $ADDRESS) > 0)}]
 }
 
 proc address_info { ADDRESS } {
diff --git a/tcl/mmr_helpers.tcl b/tcl/mmr_helpers.tcl
index 6b2c1476e..d9b6e6383 100644
--- a/tcl/mmr_helpers.tcl
+++ b/tcl/mmr_helpers.tcl
@@ -2,7 +2,7 @@
 proc proc_exists { NAME } {
     set n [info commands $NAME]
     set l [string length $n]
-    return [expr $l != 0]
+    return [expr {$l != 0}]
 }
 
 # Give: REGISTER name - must be a global variable.
@@ -52,7 +52,7 @@ proc show_mmr32_bits { NAMES VAL } {
 
 	echo -n "  "
 	for { set y 7 } { $y >= 0 } { incr y -1 } {
-	    echo -n [format "    %d%*s | " [expr !!($VAL & (1 << ($x + $y)))] [expr {$w -1}] ""]
+	    echo -n [format "    %d%*s | " [expr {!!($VAL & (1 << ($x + $y)))}] [expr {$w -1}] ""]
 	}
 	echo ""
     }
diff --git a/tcl/target/am335x.cfg b/tcl/target/am335x.cfg
index efc773d42..cb3e06c95 100644
--- a/tcl/target/am335x.cfg
+++ b/tcl/target/am335x.cfg
@@ -103,10 +103,10 @@ proc disable_watchdog { } {
 		# Empty body to make sure this executes as fast as possible.
 		# We don't want any delays here otherwise romcode might start
 		# executing and end up changing state of certain IPs.
-		while { [expr [mrw $WDT1_W_PEND_WSPR] & 0x10] } { }
+		while { [expr {[mrw $WDT1_W_PEND_WSPR] & 0x10}] } { }
 
 		mww phys $WDT1_WSPR $WDT_DISABLE_SEQ2
-		while { [expr [mrw $WDT1_W_PEND_WSPR] & 0x10] } { }
+		while { [expr {[mrw $WDT1_W_PEND_WSPR] & 0x10}] } { }
 	}
 }
 $_TARGETNAME configure -event reset-end { disable_watchdog }
diff --git a/tcl/target/am437x.cfg b/tcl/target/am437x.cfg
index e0813ca52..e954fd23b 100644
--- a/tcl/target/am437x.cfg
+++ b/tcl/target/am437x.cfg
@@ -512,10 +512,10 @@ proc disable_watchdog { } {
 		# Empty body to make sure this executes as fast as possible.
 		# We don't want any delays here otherwise romcode might start
 		# executing and end up changing state of certain IPs.
-		while { [expr [mrw $WDT1_W_PEND_WSPR] & 0x10] } { }
+		while { [expr {[mrw $WDT1_W_PEND_WSPR] & 0x10}] } { }
 
 		mww phys $WDT1_WSPR $WDT_DISABLE_SEQ2
-		while { [expr [mrw $WDT1_W_PEND_WSPR] & 0x10] } { }
+		while { [expr {[mrw $WDT1_W_PEND_WSPR] & 0x10}] } { }
 	}
 }
 
@@ -725,13 +725,13 @@ proc emif_prcm_clk_enable { } {
 proc vtp_enable { } {
 	global VTP_CTRL_REG
 
-	set vtp [ expr [ mrw $VTP_CTRL_REG ] | 0x40 ]
+	set vtp [ expr {[ mrw $VTP_CTRL_REG ] | 0x40 }]
 	mww $VTP_CTRL_REG $vtp
 
-	set vtp [ expr [ mrw $VTP_CTRL_REG ] & ~0x01 ]
+	set vtp [ expr {[ mrw $VTP_CTRL_REG ] & ~0x01 }]
 	mww $VTP_CTRL_REG $vtp
 
-	set vtp [ expr [ mrw $VTP_CTRL_REG ] | 0x01 ]
+	set vtp [ expr {[ mrw $VTP_CTRL_REG ] | 0x01 }]
 	mww $VTP_CTRL_REG $vtp
 
 }
@@ -948,7 +948,7 @@ proc config_ddr3 { SDRAM_CONFIG } {
 	emif_prcm_clk_enable
 	vtp_enable
 
-	set dll [ expr [ mrw $CM_DLL_CTRL ] & ~0x01 ]
+	set dll [ expr {[ mrw $CM_DLL_CTRL ] & ~0x01 }]
 	mww $CM_DLL_CTRL $dll
 	while { !([ mrw $CM_DLL_CTRL ] & 0x04) } { }
 
@@ -978,7 +978,7 @@ proc config_ddr3 { SDRAM_CONFIG } {
 
 	sleep 10
 
-	set tmp [ expr [ mrw $EXT_PHY_CTRL_36 ] | 0x0100 ]
+	set tmp [ expr {[ mrw $EXT_PHY_CTRL_36 ] | 0x0100 }]
 	mww $EXT_PHY_CTRL_36		$tmp
 	mww $EXT_PHY_CTRL_36_SHDW	$tmp
 
diff --git a/tcl/target/bluenrg-x.cfg b/tcl/target/bluenrg-x.cfg
index 66473251f..ea94be962 100644
--- a/tcl/target/bluenrg-x.cfg
+++ b/tcl/target/bluenrg-x.cfg
@@ -65,7 +65,7 @@ $_TARGETNAME configure -event resumed {
     global WDOG_VALUE_SET
     set _JTAG_IDCODE [mrw 0x40000004]
     if {$_JTAG_IDCODE != 0x0201E041} {
-        if [expr $WDOG_VALUE_SET] {
+        if {$WDOG_VALUE_SET} {
             # Restore watchdog enable value after resume. Only Bluenrg-1/2
             mww 0x40700008 $WDOG_VALUE
             set WDOG_VALUE_SET 0
diff --git a/tcl/target/c100config.tcl b/tcl/target/c100config.tcl
index 17639fd58..f252360c5 100644
--- a/tcl/target/c100config.tcl
+++ b/tcl/target/c100config.tcl
@@ -26,14 +26,14 @@ proc configC100 {} {
     dict set configC100 w_amba 1
     dict set configC100 x_amba 1
     # y = amba_clk * (w+1)*(x+1)*2/xtal_clk
-    dict set configC100 y_amba [expr ([dict get $configC100 CONFIG_SYS_HZ_CLOCK] * ( ([dict get $configC100 w_amba]+1 ) * ([dict get $configC100 x_amba]+1 ) *2 ) / [dict get $configC100 CFG_REFCLKFREQ]) ]
+    dict set configC100 y_amba [expr {[dict get $configC100 CONFIG_SYS_HZ_CLOCK] * ( ([dict get $configC100 w_amba]+1 ) * ([dict get $configC100 x_amba]+1 ) *2 ) / [dict get $configC100 CFG_REFCLKFREQ]} ]
 
     # Arm Clk 450MHz, must be a multiple of 25 MHz
     dict set configC100 CFG_ARM_CLOCK      450000000
     dict set configC100 w_arm 0
     dict set configC100 x_arm 1
     # y = arm_clk * (w+1)*(x+1)*2/xtal_clk
-    dict set configC100 y_arm [expr ([dict get $configC100 CFG_ARM_CLOCK] * ( ([dict get $configC100 w_arm]+1 ) * ([dict get $configC100 x_arm]+1 ) *2 ) / [dict get $configC100 CFG_REFCLKFREQ]) ]
+    dict set configC100 y_arm [expr {[dict get $configC100 CFG_ARM_CLOCK] * ( ([dict get $configC100 w_arm]+1 ) * ([dict get $configC100 x_arm]+1 ) *2 ) / [dict get $configC100 CFG_REFCLKFREQ]} ]
 
 
 }
@@ -362,7 +362,7 @@ proc putcUART0 {char} {
     # convert the 'char' to digit
     set tmp [ scan $char %c ]
     # /* wait for room in the tx FIFO on FFUART */
-    while {[expr [mrw $UART0_LSR] & $LSR_TEMT] == 0} { sleep 1 }
+    while {[expr {[mrw $UART0_LSR] & $LSR_TEMT}] == 0} { sleep 1 }
     mww $UART0_THR $tmp
     if { $char == "\n" } { putcUART0 \r }
 }
diff --git a/tcl/target/c100helper.tcl b/tcl/target/c100helper.tcl
index 9b8256d7e..2199b7afd 100644
--- a/tcl/target/c100helper.tcl
+++ b/tcl/target/c100helper.tcl
@@ -119,17 +119,17 @@ proc showAmbaClk {} {
     echo [format "CLKCORE_AHB_CLK_CNTRL       (0x%x): 0x%x" $CLKCORE_AHB_CLK_CNTRL [mrw $CLKCORE_AHB_CLK_CNTRL]]
     mem2array value 32 $CLKCORE_AHB_CLK_CNTRL 1
     # see if the PLL is in bypass mode
-    set bypass [expr ($value(0) & $PLL_CLK_BYPASS) >> 24 ]
+    set bypass [expr {($value(0) & $PLL_CLK_BYPASS) >> 24}]
     echo [format "PLL bypass bit: %d" $bypass]
     if {$bypass == 1} {
 	echo [format "Amba Clk is set to REFCLK: %d (MHz)" [expr {$CFG_REFCLKFREQ/1000000}]]
     } else {
 	# nope, extract x,y,w and compute the PLL output freq.
-	set x [expr ($value(0) & 0x0001F0000) >> 16]
+	set x [expr {($value(0) & 0x0001F0000) >> 16}]
 	echo [format "x: %d" $x]
-	set y [expr ($value(0) & 0x00000007F)]
+	set y [expr {($value(0) & 0x00000007F)}]
 	echo [format "y: %d" $y]
-	set w [expr ($value(0) & 0x000000300) >> 8]
+	set w [expr {($value(0) & 0x000000300) >> 8}]
 	echo [format "w: %d" $w]
 	echo [format "Amba PLL Clk: %d (MHz)" [expr {($CFG_REFCLKFREQ * $y / (($w + 1) * ($x + 1) * 2))/1000000}]]
     }
@@ -177,7 +177,7 @@ proc setupAmbaClk {} {
     mmw $CLKCORE_AHB_CLK_CNTRL [expr {($x << 16) + ($w << 8) + $y}] 0x0
     # wait for PLL to lock
     echo "Waiting for Amba PLL to lock"
-    while {[expr [mrw $CLKCORE_PLL_STATUS] & $AHBCLK_PLL_LOCK] == 0} { sleep 1 }
+    while {[expr {[mrw $CLKCORE_PLL_STATUS] & $AHBCLK_PLL_LOCK]} == 0} { sleep 1 }
     # remove the internal PLL bypass
     mmw $CLKCORE_AHB_CLK_CNTRL 0x0 $AHB_PLL_BY_CTRL
     # remove PLL from BYPASS mode using MUX
@@ -194,17 +194,17 @@ proc showArmClk {} {
     echo [format "CLKCORE_ARM_CLK_CNTRL       (0x%x): 0x%x" $CLKCORE_ARM_CLK_CNTRL [mrw $CLKCORE_ARM_CLK_CNTRL]]
     mem2array value 32 $CLKCORE_ARM_CLK_CNTRL 1
     # see if the PLL is in bypass mode
-    set bypass [expr ($value(0) & $PLL_CLK_BYPASS) >> 24 ]
+    set bypass [expr {($value(0) & $PLL_CLK_BYPASS) >> 24}]
     echo [format "PLL bypass bit: %d" $bypass]
     if {$bypass == 1} {
 	echo [format "Amba Clk is set to REFCLK: %d (MHz)" [expr {$CFG_REFCLKFREQ/1000000}]]
     } else {
 	# nope, extract x,y,w and compute the PLL output freq.
-	set x [expr ($value(0) & 0x0001F0000) >> 16]
+	set x [expr {($value(0) & 0x0001F0000) >> 16}]
 	echo [format "x: %d" $x]
-	set y [expr ($value(0) & 0x00000007F)]
+	set y [expr {($value(0) & 0x00000007F)}]
 	echo [format "y: %d" $y]
-	set w [expr ($value(0) & 0x000000300) >> 8]
+	set w [expr {($value(0) & 0x000000300) >> 8}]
 	echo [format "w: %d" $w]
 	echo [format "Arm PLL Clk: %d (MHz)" [expr {($CFG_REFCLKFREQ * $y / (($w + 1) * ($x + 1) * 2))/1000000}]]
     }
@@ -251,7 +251,7 @@ proc setupArmClk {} {
     mmw $CLKCORE_ARM_CLK_CNTRL [expr {($x << 16) + ($w << 8) + $y}] 0x0
     # wait for PLL to lock
     echo "Waiting for Amba PLL to lock"
-    while {[expr [mrw $CLKCORE_PLL_STATUS] & $FCLK_PLL_LOCK] == 0} { sleep 1 }
+    while {[expr {[mrw $CLKCORE_PLL_STATUS] & $FCLK_PLL_LOCK]} == 0} { sleep 1 }
     # remove the internal PLL bypass
     mmw $CLKCORE_ARM_CLK_CNTRL 0x0 $ARM_PLL_BY_CTRL
     # remove PLL from BYPASS mode using MUX
@@ -442,7 +442,7 @@ proc initC100 {} {
     # APB init
     #    	// Setting APB Bus Wait states to 1, set post write
     #	(*(volatile u32*)(APB_ACCESS_WS_REG)) = 0x40;
-    mww [expr $APB_ACCESS_WS_REG] 0x40
+    mww $APB_ACCESS_WS_REG 0x40
     # AHB init
     #	// enable all 6 masters for ARAM
     mmw $ASA_ARAM_TC_CR_REG [expr {$ASA_TC_REQIDMAEN | $ASA_TC_REQTDMEN | $ASA_TC_REQIPSECUSBEN | $ASA_TC_REQARM0EN | $ASA_TC_REQARM1EN | $ASA_TC_REQMDMAEN}] 0x0
diff --git a/tcl/target/davinci.cfg b/tcl/target/davinci.cfg
index ef07856d2..d2ed5928b 100644
--- a/tcl/target/davinci.cfg
+++ b/tcl/target/davinci.cfg
@@ -4,7 +4,7 @@
 
 # davinci_pinmux: assigns PINMUX$reg <== $value
 proc davinci_pinmux {soc reg value} {
-	mww [expr [dict get $soc sysbase] + 4 * $reg] $value
+	mww [expr {[dict get $soc sysbase] + 4 * $reg}] $value
 }
 
 source [find mem_helper.tcl]
@@ -110,7 +110,7 @@ proc pll_v02_setup {pll_addr mult config} {
 		# write pllcmd.GO; poll pllstat.GO
 		mww [expr {$pll_addr + 0x0138}] 0x01
 		set pllstat [expr {$pll_addr + 0x013c}]
-		while {[expr [mrw $pllstat] & 0x01] != 0} { sleep 1 }
+		while {[expr {[mrw $pllstat] & 0x01}] != 0} { sleep 1 }
 	}
 	mww [expr {$pll_addr + 0x0138}] 0x00
 
@@ -272,11 +272,11 @@ proc pll_v03_setup {pll_addr mult config} {
 		# write pllcmd.GO; poll pllstat.GO
 		mww [expr {$pll_addr + 0x0138}] 0x01
 		set pllstat [expr {$pll_addr + 0x013c}]
-		while {[expr [mrw $pllstat] & 0x01] != 0} { sleep 1 }
+		while {[expr {[mrw $pllstat] & 0x01}] != 0} { sleep 1 }
 	}
 	mww [expr {$pll_addr + 0x0138}] 0x00
 	set addr [dict get $config ctladdr]
-	while {[expr [mrw $addr] & 0x0e000000] != 0x0e000000} { sleep 1 }
+	while {[expr {[mrw $addr] & 0x0e000000}] != 0x0e000000} { sleep 1 }
 
 	# 12 - set PLLEN (bit 0) ... leave bypass mode
 	set pll_ctrl [expr {$pll_ctrl | 0x0001}]
@@ -306,13 +306,13 @@ proc psc_go {} {
 	set ptstat_addr [expr {$psc_addr + 0x0128}]
 
 	# just in case PTSTAT.go isn't clear
-	while { [expr [mrw $ptstat_addr] & 0x01] != 0 } { sleep 1 }
+	while { [expr {[mrw $ptstat_addr] & 0x01}] != 0 } { sleep 1 }
 
 	# write PTCMD.go ... ignoring any DSP power domain
 	mww [expr {$psc_addr + 0x0120}] 1
 
 	# wait for PTSTAT.go to clear (again ignoring DSP power domain)
-	while { [expr [mrw $ptstat_addr] & 0x01] != 0 } { sleep 1 }
+	while { [expr {[mrw $ptstat_addr] & 0x01}] != 0 } { sleep 1 }
 }
 
 #
diff --git a/tcl/target/hilscher_netx500.cfg b/tcl/target/hilscher_netx500.cfg
index 93375fd81..6d919f9dd 100644
--- a/tcl/target/hilscher_netx500.cfg
+++ b/tcl/target/hilscher_netx500.cfg
@@ -36,10 +36,10 @@ proc mread32 {addr} {
 proc sdram_fix { } {
 
   set accesskey [mread32 0x00100070]
-  mww 0x00100070 [expr $accesskey]
+  mww 0x00100070 $accesskey
   mww 0x0010002c 0x00000001
 
-  if {[expr [mread32 0x0010002c] & 0x07] == 0x07} {
+  if {[expr {[mread32 0x0010002c] & 0x07}] == 0x07} {
 	 puts "SDRAM Fix was not executed. Probably your CPU halted too late and the register is already locked!"
   } else {
 	 puts "SDRAM Fix succeeded!"
diff --git a/tcl/target/icepick.cfg b/tcl/target/icepick.cfg
index cdf4f24f4..cc824ad0e 100644
--- a/tcl/target/icepick.cfg
+++ b/tcl/target/icepick.cfg
@@ -54,8 +54,8 @@ proc icepick_c_disconnect {jrc} {
 proc icepick_c_router {jrc rw block register payload} {
 
 	set new_dr_value \
-		[expr ( ($rw & 0x1) << 31)        | ( ($block & 0x7) << 28) | \
-			( ($register & 0xF) << 24)  | ( $payload & 0xFFFFFF ) ]
+		[expr { ( ($rw & 0x1) << 31)        | ( ($block & 0x7) << 28) | \
+				( ($register & 0xF) << 24)  | ( $payload & 0xFFFFFF ) } ]
 
 #	echo "\tNew router value:\t0x[format %x $new_dr_value]"
 
diff --git a/tcl/target/psoc4.cfg b/tcl/target/psoc4.cfg
index b56828207..d4ee79ff2 100644
--- a/tcl/target/psoc4.cfg
+++ b/tcl/target/psoc4.cfg
@@ -78,18 +78,18 @@ proc psoc4_get_family_id {} {
 	if { $err } {
 		return 0
 	}
-	if { [expr $romtable_pid(0) & 0xffffff00 ]
-	  || [expr $romtable_pid(1) & 0xffffff00 ]
-	  || [expr $romtable_pid(2) & 0xffffff00 ] } {
+	if { [expr {$romtable_pid(0) & 0xffffff00 }]
+	  || [expr {$romtable_pid(1) & 0xffffff00 }]
+	  || [expr {$romtable_pid(2) & 0xffffff00 }] } {
 		echo "Unexpected data in ROMTABLE"
 		return 0
 	}
-	set designer_id [expr (( $romtable_pid(1) & 0xf0 ) >> 4) | (( $romtable_pid(2) & 0xf ) << 4 ) ]
+	set designer_id [expr {(( $romtable_pid(1) & 0xf0 ) >> 4) | (( $romtable_pid(2) & 0xf ) << 4 ) }]
 	if { $designer_id != 0xb4 } {
 		echo [format "ROMTABLE Designer ID 0x%02x is not Cypress" $designer_id]
 		return 0
 	}
-	set family_id [expr ( $romtable_pid(0) & 0xff ) | (( $romtable_pid(1) & 0xf ) << 8 ) ]
+	set family_id [expr {( $romtable_pid(0) & 0xff ) | (( $romtable_pid(1) & 0xf ) << 8 ) }]
 	return $family_id
 }
 
@@ -194,7 +194,7 @@ proc ocd_process_reset_inner { MODE } {
 
 		# Set registers to reset vector values
 		mem2array value 32 0 2
-		reg pc [expr $value(1) & 0xfffffffe ]
+		reg pc [expr {$value(1) & 0xfffffffe} ]
 		reg msp $value(0)
 
 		if { $PSOC4_TEST_MODE_WORKAROUND } {
diff --git a/tcl/target/stellaris.cfg b/tcl/target/stellaris.cfg
index 3cab4d140..4865e2916 100644
--- a/tcl/target/stellaris.cfg
+++ b/tcl/target/stellaris.cfg
@@ -83,7 +83,7 @@ proc reset_peripherals {family} {
 	mmw $SYSCTL_RCC2 $SYSCTL_RCC2_BYPASS2 0
 
 	# RCC and RCC2 to their reset values
-	mww $SYSCTL_RCC [expr (0x078e3ad0 | ([mrw $SYSCTL_RCC] & $SYSCTL_RCC_MOSCDIS))]
+	mww $SYSCTL_RCC [expr {0x078e3ad0 | ([mrw $SYSCTL_RCC] & $SYSCTL_RCC_MOSCDIS)}]
 	mww $SYSCTL_RCC2 0x07806810
 	mww $SYSCTL_RCC 0x078e3ad1
 
@@ -121,8 +121,8 @@ proc reset_peripherals {family} {
 	mww $SYSCTL_MISC 0xffffffff
 
 	# Wait for any pending flash operations to complete
-	while {[expr [mrw $FLASH_FMC] & 0xffff] != 0} { sleep 1 }
-	while {[expr [mrw $FLASH_FMC2] & 0xffff] != 0} { sleep 1 }
+	while {[expr {[mrw $FLASH_FMC] & 0xffff}] != 0} { sleep 1 }
+	while {[expr {[mrw $FLASH_FMC2] & 0xffff}] != 0} { sleep 1 }
 
 	# Reset the flash controller registers
 	mww $FLASH_FMA 0
@@ -152,7 +152,7 @@ $_TARGETNAME configure -event reset-start {
 	if {$_DEVICECLASS != 0xff} {
 	   set device_class $_DEVICECLASS
 	} else {
-	   set device_class [expr (([mrw 0x400fe000] >> 16) & 0xff)]
+	   set device_class [expr {([mrw 0x400fe000] >> 16) & 0xff}]
 	}
 
 	if {$device_class == 0 || $device_class == 1 ||
diff --git a/tcl/target/stm32mp15x.cfg b/tcl/target/stm32mp15x.cfg
index 1b2ae7d5e..e50ef9c20 100644
--- a/tcl/target/stm32mp15x.cfg
+++ b/tcl/target/stm32mp15x.cfg
@@ -107,7 +107,7 @@ proc toggle_cpu0_dbg_claim0 {} {
 
 proc detect_cpu1 {} {
 	$::_CHIPNAME.ap1 mem2array cpu1_prsr 32 0xE00D2314 1
-	set dual_core [expr $cpu1_prsr(0) & 1]
+	set dual_core [expr {$cpu1_prsr(0) & 1}]
 	if {! $dual_core} {$::_CHIPNAME.cpu1 configure -defer-examine}
 }
 
diff --git a/tcl/target/u8500.cfg b/tcl/target/u8500.cfg
index 15bacf308..5aee13541 100644
--- a/tcl/target/u8500.cfg
+++ b/tcl/target/u8500.cfg
@@ -18,12 +18,12 @@ proc ocd_gdb_restart {target_id} {
     global _TARGETNAME_1
 	global _SMP
     targets $_TARGETNAME_1
-	if { [expr ($_SMP == 1)] } {
+	if { $_SMP == 1 } {
 	cortex_a smp off
 	}
 	rst_run
 	halt
-	if { [expr ($_SMP == 1)]} {
+	if { $_SMP == 1 } {
 	cortex_a smp on
 	}
 }
diff --git a/tcl/tools/memtest.tcl b/tcl/tools/memtest.tcl
index f3567ef0f..c7fa591f3 100644
--- a/tcl/tools/memtest.tcl
+++ b/tcl/tools/memtest.tcl
@@ -166,7 +166,7 @@ proc memTestDevice { baseAddress nBytes } {
 	    return $pattern
 	}
 
-	set antiPattern [expr ~$pattern]
+	set antiPattern [expr {~$pattern}]
 	memwrite32 [expr {$baseAddress + $offset}] $antiPattern
     }
 
@@ -177,7 +177,7 @@ proc memTestDevice { baseAddress nBytes } {
 	set data [memread32 $addr]
 	set dataHex [convertToHex $data]
 	set antiPatternHex [convertToHex $antiPattern]
-	if {[expr $dataHex != $antiPatternHex]} {
+	if {$dataHex != $antiPatternHex} {
 	    echo "FAILED memTestDevice_antipattern: Address: [convertToHex $addr], antiPattern: $antiPatternHex, Returned: $dataHex, offset: $offset"
 	    return $pattern
 	}

-----------------------------------------------------------------------

Summary of changes:
 src/target/stm8.c                         |  2 +-
 src/target/stm8.h                         |  2 --
 tcl/bitsbytes.tcl                         |  4 ++--
 tcl/board/at91sam9261-ek.cfg              |  8 ++++----
 tcl/board/at91sam9263-ek.cfg              | 10 +++++-----
 tcl/board/at91sam9g20-ek.cfg              |  8 ++++----
 tcl/board/dm355evm.cfg                    |  2 +-
 tcl/board/embedded-artists_lpc2478-32.cfg |  2 +-
 tcl/board/hilscher_nxhx10.cfg             |  4 ++--
 tcl/board/icnova_imx53_sodimm.cfg         |  8 ++++----
 tcl/board/icnova_sam9g45_sodimm.cfg       | 16 ++++++++--------
 tcl/board/imx53-m53evk.cfg                |  8 ++++----
 tcl/board/imx53loco.cfg                   |  8 ++++----
 tcl/board/nxp_imx7sabre.cfg               |  2 +-
 tcl/chip/atmel/at91/at91_pmc.cfg          |  2 +-
 tcl/chip/atmel/at91/at91sam9_init.cfg     | 18 +++++++++---------
 tcl/chip/atmel/at91/usarts.tcl            |  2 +-
 tcl/chip/st/spear/quirk_no_srst.tcl       |  2 +-
 tcl/chip/st/spear/spear3xx.tcl            |  8 ++++----
 tcl/fpga/xilinx-xadc.cfg                  |  2 +-
 tcl/memory.tcl                            |  2 +-
 tcl/mmr_helpers.tcl                       |  4 ++--
 tcl/target/am335x.cfg                     |  4 ++--
 tcl/target/am437x.cfg                     | 14 +++++++-------
 tcl/target/bluenrg-x.cfg                  |  2 +-
 tcl/target/c100config.tcl                 |  6 +++---
 tcl/target/c100helper.tcl                 | 22 +++++++++++-----------
 tcl/target/davinci.cfg                    | 12 ++++++------
 tcl/target/hilscher_netx500.cfg           |  4 ++--
 tcl/target/icepick.cfg                    |  4 ++--
 tcl/target/psoc4.cfg                      | 12 ++++++------
 tcl/target/stellaris.cfg                  |  8 ++++----
 tcl/target/stm32mp15x.cfg                 |  2 +-
 tcl/target/u8500.cfg                      |  4 ++--
 tcl/tools/memtest.tcl                     |  4 ++--
 35 files changed, 110 insertions(+), 112 deletions(-)


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       via  f5657aa76e795e4ed5b13a9f5df943181a123e49 (commit)
       via  82b6a41117fa99e760681d9f31163e7b68357e71 (commit)
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not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit f855fdcf0d95ff9ba18a83f9a97d5368844d4f2c
Author: Antonio Borneo <bor...@gm...>
Date:   Sat Apr 10 17:37:04 2021 +0200

    tcl: [2/3] prepare for jimtcl 0.81 'expr' syntax change
    
    Jimtcl commit 1843b79a03dd ("expr: TIP 526, only support a single
    arg") drops the support for multi-argument syntax for the TCL
    command 'expr'.
    
    Enclose within double quote the argument of 'expr' when there is
    the need to concatenate strings.
    
    Change-Id: Ic0ea990ed37337a7e6c3a99670583685b570b8b1
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: http://openocd.zylin.com/6160
    Tested-by: jenkins

diff --git a/tcl/chip/atmel/at91/rtt.tcl b/tcl/chip/atmel/at91/rtt.tcl
index 3e3d414f4..d49ce7114 100644
--- a/tcl/chip/atmel/at91/rtt.tcl
+++ b/tcl/chip/atmel/at91/rtt.tcl
@@ -17,7 +17,7 @@ proc show_RTTC_RTMR_helper { NAME ADDR VAL } {
     global AT91C_SLOWOSC_FREQ
     # Nasty hack, make this a float by tacking a .0 on the end
     # otherwise, jim makes the value an integer
-    set f [expr $AT91C_SLOWOSC_FREQ.0 / $rtpres.0]
+    set f [expr "$AT91C_SLOWOSC_FREQ.0 / $rtpres.0"]
     echo [format "\tPrescale value: 0x%04x (%5d) => %f Hz" $rtpres $rtpres $f]
     if { $VAL & $BIT16 } {
 	echo "\tBit16 -> Alarm IRQ Enabled"
diff --git a/tcl/chip/atmel/at91/usarts.tcl b/tcl/chip/atmel/at91/usarts.tcl
index 95aced882..f840b78c3 100644
--- a/tcl/chip/atmel/at91/usarts.tcl
+++ b/tcl/chip/atmel/at91/usarts.tcl
@@ -89,7 +89,7 @@ foreach WHO { US0 US1 US2 US3 US4 US5 US6 US7 US8 US9 } {
 	    set vn [set WHO]_[set REG]
 	    # vn = USx_IER
 	    # vv = variable value
-	    set vv [expr $$n + [set USx_[set REG]]]
+	    set vv [expr "$$n + [set USx_[set REG]]"]
 	    # And VV is the address in memory of that register
 
 
diff --git a/tcl/fpga/xilinx-xadc.cfg b/tcl/fpga/xilinx-xadc.cfg
index 043e55393..c451ca2f2 100644
--- a/tcl/fpga/xilinx-xadc.cfg
+++ b/tcl/fpga/xilinx-xadc.cfg
@@ -101,7 +101,7 @@ proc xadc_select {tap} {
 proc xadc_xfer {tap cmd addr data} {
 	set ret [drscan $tap 32 [xadc_cmd $cmd $addr $data]]
 	runtest 10
-	return [expr 0x$ret]
+	return [expr "0x$ret"]
 }
 
 # XADC register write
diff --git a/tcl/target/u8500.cfg b/tcl/target/u8500.cfg
index 5ef98e9e1..15bacf308 100644
--- a/tcl/target/u8500.cfg
+++ b/tcl/target/u8500.cfg
@@ -52,9 +52,9 @@ proc pwrsts { } {
 	irscan $_CHIPNAME.jrc 0x3a
 	drscan $_CHIPNAME.jrc 4 0
 	set pwrsts [drscan $_CHIPNAME.jrc 16 0]
-    echo "pwrsts ="$pwrsts
-    set a9 [expr (0x$pwrsts & 0xc)]
-	set ape [expr (0x$pwrsts & 0x3)]
+	echo "pwrsts ="$pwrsts
+	set a9 [expr "0x$pwrsts & 0xc"]
+	set ape [expr "0x$pwrsts & 0x3"]
 	if {[string equal "0" $ape]} {
 		echo "ape off"
 	} else {
@@ -81,12 +81,12 @@ proc poll_pwrsts { } {
 	irscan $_CHIPNAME.jrc 0x3a
 	drscan $_CHIPNAME.jrc 4 0
 	set pwrsts [drscan $_CHIPNAME.jrc 16 0]
-	set pwrsts [expr (0x$pwrsts & 0xc)]
+	set pwrsts [expr "0x$pwrsts & 0xc"]
 	while {[string equal "4" $pwrsts] && $i<20} {
 		irscan $_CHIPNAME.jrc 0x3a
 		drscan $_CHIPNAME.jrc 4 0;
 		set pwrsts [drscan $_CHIPNAME.jrc 16 0]
-		set pwrsts [expr (0x$pwrsts & 0xc)]
+		set pwrsts [expr "0x$pwrsts & 0xc"]
 		if {![string equal "4" $pwrsts]} {
 			set result 1
 		} else {
@@ -239,7 +239,7 @@ proc secsts1 { } {
 		drscan $_CHIPNAME.jrc 4 4
 	set secsts1 [drscan $_CHIPNAME.jrc 16 0]
 	echo "secsts1 ="$secsts1
-	set secsts1 [expr (0x$secsts1 & 0x4)]
+	set secsts1 [expr "0x$secsts1 & 0x4"]
 	if {![string equal "4" $secsts1]} {
 	echo "APE target secured"
         } else {
@@ -254,7 +254,7 @@ proc att { } {
 	drscan $_CHIPNAME.jrc 4 4
 	set secsts1 [drscan $_CHIPNAME.jrc 16 0]
 	echo "secsts1 ="$secsts1
-	set secsts1 [expr (0x$secsts1 & 0x4)]
+	set secsts1 [expr "0x$secsts1 & 0x4"]
 	if {[string equal "4" $secsts1]} {
 		if {[poll_pwrsts]==1} {
 		enable_apetap
@@ -291,13 +291,13 @@ proc rst_run { } {
 	drscan $_CHIPNAME.jrc 4 4
 	set secsts1 [drscan $_CHIPNAME.jrc 16 0]
 	echo "secsts1 ="$secsts1
-	set secsts1 [expr (0x$secsts1 & 0x4)]
+	set secsts1 [expr "0x$secsts1 & 0x4"]
 	while {![string equal "4" $secsts1]} {
 		irscan u8500.jrc 0x3a
 		drscan u8500.jrc 4 4
 		set secsts1 [drscan $_CHIPNAME.jrc 16 0]
 		echo "secsts1 ="$secsts1
-		set secsts1 [expr (0x$secsts1 & 0x4)]
+		set secsts1 [expr "0x$secsts1 & 0x4"]
 	}
 	echo "ape debugable"
 	enable_apetap

commit f5657aa76e795e4ed5b13a9f5df943181a123e49
Author: Antonio Borneo <bor...@gm...>
Date:   Sat Apr 10 01:23:57 2021 +0200

    tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change
    
    Jimtcl commit 1843b79a03dd ("expr: TIP 526, only support a single
    arg") drops the support for multi-argument syntax for the TCL
    command 'expr'.
    
    In the TCL scripts distributed with OpenOCD there are 1700+ lines
    that should be modified before switching to jimtcl 0.81.
    
    Apply the script below on every script in tcl folder. It fixes
    more than 92% of the lines
    
    %<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---
     #!/usr/bin/perl -Wpi
    
     my $re_sym = qr{[a-z_][a-z0-9_]*}i;
     my $re_var = qr{(?:\$|\$::)$re_sym};
     my $re_const = qr{0x[0-9a-f]+|[0-9]+|[0-9]*\.[0-9]*}i;
     my $re_item = qr{(?:~\s*)?(?:$re_var|$re_const)};
     my $re_op = qr{<<|>>|[+\-*/&|]};
     my $re_expr = qr{(
         (?:\(\s*(?:$re_item|(?-1))\s*\)|$re_item)
         \s*$re_op\s*
         (?:$re_item|(?-1)|\(\s*(?:$re_item|(?-1))\s*\))
     )}x;
    
     # [expr [dict get $regsC100 SYM] + HEXNUM]
     s/\[expr (\[dict get $re_var $re_sym\s*\] \+ *$re_const)\]/\[expr \{$1\}\]/;
    
     # [ expr (EXPR) ]
     # [ expr EXPR ]
     # note: $re_expr captures '$3'
     s/\[(\s*expr\s*)\((\s*$re_expr\s*)\)(\s*)\]/\[$1\{$2\}$4\]/;
     s/\[(\s*expr\s*)($re_expr)(\s*)\]/\[$1\{$2\}$4\]/;
    %<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---
    
    Change-Id: I0d6bddc6abf6dd29062f2b4e72b5a2b5080293b9
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: http://openocd.zylin.com/6159
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/tcl/bitsbytes.tcl b/tcl/bitsbytes.tcl
index 52ca83db2..5f9cae114 100644
--- a/tcl/bitsbytes.tcl
+++ b/tcl/bitsbytes.tcl
@@ -5,30 +5,30 @@
 # Creat helper variables ...
 #    BIT0.. BIT31
 
-for { set x 0  } { $x < 32 } { set x [expr $x + 1]} {
+for { set x 0  } { $x < 32 } { set x [expr {$x + 1}]} {
     set vn [format "BIT%d" $x]
     global $vn
-    set $vn   [expr (1 << $x)]
+    set $vn   [expr {1 << $x}]
 }
 
 # Create K bytes values
 #    __1K ... to __2048K
-for { set x 1  } { $x < 2048 } { set x [expr $x * 2]} {
+for { set x 1  } { $x < 2048 } { set x [expr {$x * 2}]} {
     set vn [format "__%dK" $x]
     global $vn
-    set $vn   [expr (1024 * $x)]
+    set $vn   [expr {1024 * $x}]
 }
 
 # Create M bytes values
 #    __1M ... to __2048K
-for { set x 1  } { $x < 2048 } { set x [expr $x * 2]} {
+for { set x 1  } { $x < 2048 } { set x [expr {$x * 2}]} {
     set vn [format "__%dM" $x]
     global $vn
-    set $vn [expr (1024 * 1024 * $x)]
+    set $vn [expr {1024 * 1024 * $x}]
 }
 
 proc create_mask { MSB LSB } {
-    return [expr (((1 << ($MSB - $LSB + 1))-1) << $LSB)]
+    return [expr {((1 << ($MSB - $LSB + 1))-1) << $LSB}]
 }
 
 # Cut Bits $MSB to $LSB out of this value.
@@ -52,8 +52,8 @@ proc normalize_bitfield { VALUE MSB LSB } {
 
 proc show_normalize_bitfield { VALUE MSB LSB } {
     set m [create_mask $MSB $LSB]
-    set mr [expr $VALUE & $m]
-    set sr [expr $mr >> $LSB]
+    set mr [expr {$VALUE & $m}]
+    set sr [expr {$mr >> $LSB}]
     echo [format "((0x%08x & 0x%08x) -> 0x%08x) >> %2d => (0x%x) %5d " $VALUE $m $mr $LSB $sr $sr]
    return $sr
 }
diff --git a/tcl/board/at91cap7a-stk-sdram.cfg b/tcl/board/at91cap7a-stk-sdram.cfg
index 8395ba33b..8a371e064 100644
--- a/tcl/board/at91cap7a-stk-sdram.cfg
+++ b/tcl/board/at91cap7a-stk-sdram.cfg
@@ -38,7 +38,7 @@ proc peek32 {address} {
 
 # Wait for an expression to be true with a timeout
 proc wait_state {expression} {
-	for {set i 0} {$i < 1000} {set i [expr $i + 1]} {
+	for {set i 0} {$i < 1000} {set i [expr {$i + 1}]} {
 		if {[uplevel 1 $expression] == 0} {
 			return
 		}
diff --git a/tcl/board/at91sam9261-ek.cfg b/tcl/board/at91sam9261-ek.cfg
index 3963e9373..d6e8c2d15 100644
--- a/tcl/board/at91sam9261-ek.cfg
+++ b/tcl/board/at91sam9261-ek.cfg
@@ -30,29 +30,29 @@ proc at91sam9261ek_reset_init { } {
 	;# set master_pll_mul	13
 
 	set val	[expr $::AT91_WDT_WDV]			;# Counter Value
-	set val	[expr ($val | $::AT91_WDT_WDDIS)]	;# Watchdog Disable
-	set val	[expr ($val | $::AT91_WDT_WDD)]		;# Delta Value
-	set val	[expr ($val | $::AT91_WDT_WDDBGHLT)]	;# Debug Halt
-	set val	[expr ($val | $::AT91_WDT_WDIDLEHLT)]	;# Idle Halt
+	set val	[expr {$val | $::AT91_WDT_WDDIS}]	;# Watchdog Disable
+	set val	[expr {$val | $::AT91_WDT_WDD}]		;# Delta Value
+	set val	[expr {$val | $::AT91_WDT_WDDBGHLT}]	;# Debug Halt
+	set val	[expr {$val | $::AT91_WDT_WDIDLEHLT}]	;# Idle Halt
 
 	set config(wdt_mr_val) $val
 
 	;# EBI_CSA, no pull-ups for D[15:0], CS1 SDRAM, CS3 NAND Flash
 	set config(matrix_ebicsa_addr)	$::AT91_MATRIX_EBICSA
-	set config(matrix_ebicsa_val) [expr ($::AT91_MATRIX_DBPUC | $::AT91_MATRIX_CS1A_SDRAMC)]
+	set config(matrix_ebicsa_val) [expr {$::AT91_MATRIX_DBPUC | $::AT91_MATRIX_CS1A_SDRAMC}]
 
 	;# SDRAMC_CR - Configuration register
 	set val [expr $::AT91_SDRAMC_NC_9]
-	set val [expr ($val | $::AT91_SDRAMC_NR_13)]
-	set val [expr ($val | $::AT91_SDRAMC_NB_4)]
-	set val [expr ($val | $::AT91_SDRAMC_CAS_3)]
-	set val [expr ($val | $::AT91_SDRAMC_DBW_32)]
-	set val [expr ($val | (2 <<  8))]		;# Write Recovery Delay
-	set val [expr ($val | (7 << 12))]		;# Row Cycle Delay
-	set val [expr ($val | (3 << 16))]		;# Row Precharge Delay
-	set val [expr ($val | (2 << 20))]		;# Row to Column Delay
-	set val [expr ($val | (5 << 24))]		;# Active to Precharge Delay
-	set val [expr ($val | (8 << 28))]		;# Exit Self Refresh to Active Delay
+	set val [expr {$val | $::AT91_SDRAMC_NR_13}]
+	set val [expr {$val | $::AT91_SDRAMC_NB_4}]
+	set val [expr {$val | $::AT91_SDRAMC_CAS_3}]
+	set val [expr {$val | $::AT91_SDRAMC_DBW_32}]
+	set val [expr {$val | (2 <<  8)}]		;# Write Recovery Delay
+	set val [expr {$val | (7 << 12)}]		;# Row Cycle Delay
+	set val [expr {$val | (3 << 16)}]		;# Row Precharge Delay
+	set val [expr {$val | (2 << 20)}]		;# Row to Column Delay
+	set val [expr {$val | (5 << 24)}]		;# Active to Precharge Delay
+	set val [expr {$val | (8 << 28)}]		;# Exit Self Refresh to Active Delay
 
 	set config(sdram_cr_val) $val
 
diff --git a/tcl/board/at91sam9263-ek.cfg b/tcl/board/at91sam9263-ek.cfg
index 645b1a7bd..b88efa971 100644
--- a/tcl/board/at91sam9263-ek.cfg
+++ b/tcl/board/at91sam9263-ek.cfg
@@ -25,10 +25,10 @@ proc at91sam9263ek_reset_init { } {
 	set config(master_pll_mul)	171
 
 	set val	[expr $::AT91_WDT_WDV]			;# Counter Value
-	set val	[expr ($val | $::AT91_WDT_WDDIS)]	;# Watchdog Disable
-	set val	[expr ($val | $::AT91_WDT_WDD)]		;# Delta Value
-	set val	[expr ($val | $::AT91_WDT_WDDBGHLT)]	;# Debug Halt
-	set val	[expr ($val | $::AT91_WDT_WDIDLEHLT)]	;# Idle Halt
+	set val	[expr {$val | $::AT91_WDT_WDDIS}]	;# Watchdog Disable
+	set val	[expr {$val | $::AT91_WDT_WDD}]		;# Delta Value
+	set val	[expr {$val | $::AT91_WDT_WDDBGHLT}]	;# Debug Halt
+	set val	[expr {$val | $::AT91_WDT_WDIDLEHLT}]	;# Idle Halt
 
 	set config(wdt_mr_val) $val
 
@@ -37,22 +37,22 @@ proc at91sam9263ek_reset_init { } {
 	set config(matrix_ebicsa_addr)	$::AT91_MATRIX_EBI0CSA
 
 	set val	[expr $::AT91_MATRIX_EBI0_DBPUC]
-	set val [expr ($val | $::AT91_MATRIX_EBI0_VDDIOMSEL_3_3V)]
-	set val [expr ($val | $::AT91_MATRIX_EBI0_CS1A_SDRAMC)]
+	set val [expr {$val | $::AT91_MATRIX_EBI0_VDDIOMSEL_3_3V}]
+	set val [expr {$val | $::AT91_MATRIX_EBI0_CS1A_SDRAMC}]
 	set config(matrix_ebicsa_val) $val
 
 	;# SDRAMC_CR - Configuration register
 	set val [expr $::AT91_SDRAMC_NC_9]
-	set val [expr ($val | $::AT91_SDRAMC_NR_13)]
-	set val [expr ($val | $::AT91_SDRAMC_NB_4)]
-	set val [expr ($val | $::AT91_SDRAMC_CAS_3)]
-	set val [expr ($val | $::AT91_SDRAMC_DBW_32)]
-	set val [expr ($val | (1 <<  8))]		;# Write Recovery Delay
-	set val [expr ($val | (7 << 12))]		;# Row Cycle Delay
-	set val [expr ($val | (2 << 16))]		;# Row Precharge Delay
-	set val [expr ($val | (2 << 20))]		;# Row to Column Delay
-	set val [expr ($val | (5 << 24))]		;# Active to Precharge Delay
-	set val [expr ($val | (1 << 28))]		;# Exit Self Refresh to Active Delay
+	set val [expr {$val | $::AT91_SDRAMC_NR_13}]
+	set val [expr {$val | $::AT91_SDRAMC_NB_4}]
+	set val [expr {$val | $::AT91_SDRAMC_CAS_3}]
+	set val [expr {$val | $::AT91_SDRAMC_DBW_32}]
+	set val [expr {$val | (1 <<  8)}]		;# Write Recovery Delay
+	set val [expr {$val | (7 << 12)}]		;# Row Cycle Delay
+	set val [expr {$val | (2 << 16)}]		;# Row Precharge Delay
+	set val [expr {$val | (2 << 20)}]		;# Row to Column Delay
+	set val [expr {$val | (5 << 24)}]		;# Active to Precharge Delay
+	set val [expr {$val | (1 << 28)}]		;# Exit Self Refresh to Active Delay
 
 	set config(sdram_cr_val) $val
 
diff --git a/tcl/board/dm355evm.cfg b/tcl/board/dm355evm.cfg
index 0c971e9a0..1e35b68fa 100644
--- a/tcl/board/dm355evm.cfg
+++ b/tcl/board/dm355evm.cfg
@@ -80,7 +80,7 @@ proc dm355evm_init {} {
 
 	# VTPIOCR impedance calibration
 	set addr [dict get $dm355 sysbase]
-	set addr [expr $addr + 0x70]
+	set addr [expr {$addr + 0x70}]
 
 	# clear CLR, LOCK, PWRDN; wait a clock; set CLR
 	mmw $addr 0 0x20c0
@@ -108,24 +108,24 @@ proc dm355evm_init {} {
 	set addr [dict get $dm355 ddr_emif]
 
 	# DDRPHYCR1
-	mww [expr $addr + 0xe4] 0x50006404
+	mww [expr {$addr + 0xe4}] 0x50006404
 
 	# PBBPR -- burst priority
-	mww [expr $addr + 0x20] 0xfe
+	mww [expr {$addr + 0x20}] 0xfe
 
 	# SDCR -- unlock boot config; init for DDR2, relock, unlock SDTIM*
-	mmw [expr $addr + 0x08] 0x00800000 0
-	mmw [expr $addr + 0x08] 0x0013c632 0x03870fff
+	mmw [expr {$addr + 0x08}] 0x00800000 0
+	mmw [expr {$addr + 0x08}] 0x0013c632 0x03870fff
 
 	# SDTIMR0, SDTIMR1
-	mww [expr $addr + 0x10] 0x2a923249
-	mww [expr $addr + 0x14] 0x4c17c763
+	mww [expr {$addr + 0x10}] 0x2a923249
+	mww [expr {$addr + 0x14}] 0x4c17c763
 
 	# SDCR -- relock SDTIM*
-	mmw [expr $addr + 0x08] 0 0x00008000
+	mmw [expr {$addr + 0x08}] 0 0x00008000
 
 	# SDRCR -- refresh rate (171 MHz * 7.8usec)
-	mww [expr $addr + 0x0c] 1336
+	mww [expr {$addr + 0x0c}] 1336
 
 	########################
 	# ASYNC EMIF
@@ -138,13 +138,13 @@ proc dm355evm_init {} {
 	#set nand_timings 0x0400008c
 
 	# AWCCR
-	mww [expr $addr + 0x04] 0xff
+	mww [expr {$addr + 0x04}] 0xff
 	# CS0 == socketed NAND (default MT29F16G08FAA, 2GByte)
-	mww [expr $addr + 0x10] $nand_timings
+	mww [expr {$addr + 0x10}] $nand_timings
 	# CS1 == dm9000 Ethernet
-	mww [expr $addr + 0x14] 0x00a00505
+	mww [expr {$addr + 0x14}] 0x00a00505
 	# NANDFCR -- only CS0 has NAND
-	mww [expr $addr + 0x60] 0x01
+	mww [expr {$addr + 0x60}] 0x01
 
 	# default: both chipselects to the NAND socket are used
 	nand probe 0
@@ -156,27 +156,27 @@ proc dm355evm_init {} {
 	set addr [dict get $dm355 uart0]
 
 	# PWREMU_MGNT -- rx + tx in reset
-	mww [expr $addr + 0x30] 0
+	mww [expr {$addr + 0x30}] 0
 
 	# DLL, DLH -- 115200 baud
-	mwb [expr $addr + 0x20] 0x0d
-	mwb [expr $addr + 0x24] 0x00
+	mwb [expr {$addr + 0x20}] 0x0d
+	mwb [expr {$addr + 0x24}] 0x00
 
 	# FCR - clear and disable FIFOs
-	mwb [expr $addr + 0x08] 0x07
-	mwb [expr $addr + 0x08] 0x00
+	mwb [expr {$addr + 0x08}] 0x07
+	mwb [expr {$addr + 0x08}] 0x00
 
 	# IER - disable IRQs
-	mwb [expr $addr + 0x04] 0x00
+	mwb [expr {$addr + 0x04}] 0x00
 
 	# LCR - 8-N-1
-	mwb [expr $addr + 0x0c] 0x03
+	mwb [expr {$addr + 0x0c}] 0x03
 
 	# MCR - no flow control or loopback
-	mwb [expr $addr + 0x10] 0x00
+	mwb [expr {$addr + 0x10}] 0x00
 
 	# PWREMU_MGNT -- rx + tx normal, free running during JTAG halt
-	mww [expr $addr + 0x30] 0xe001
+	mww [expr {$addr + 0x30}] 0xe001
 
 
 	########################
diff --git a/tcl/board/dm365evm.cfg b/tcl/board/dm365evm.cfg
index 3b29dd866..8c7f8c0a6 100644
--- a/tcl/board/dm365evm.cfg
+++ b/tcl/board/dm365evm.cfg
@@ -56,10 +56,10 @@ if { $CS0 == "NAND" } {
 		#set nand_timings 0x0400008c
 
 		# CS0 == socketed NAND (default MT29F16G08FAA, 2 GBytes)
-		mww [expr $a_emif + 0x10] $nand_timings
+		mww [expr {$a_emif + 0x10}] $nand_timings
 
 		# NANDFCR -- CS0 has NAND
-		mww [expr $a_emif + 0x60] 0x01
+		mww [expr {$a_emif + 0x60}] 0x01
 	}
 	proc flashprobe {} {
 		nand probe 0
@@ -80,10 +80,10 @@ if { $CS0 == "NAND" } {
 		davinci_pinmux $dm365 2 0x00000055
 
 		# CS0 == OneNAND (KFG1G16U2B-DIB6, 128 KBytes)
-		mww [expr $a_emif + 0x10] 0x00000001
+		mww [expr {$a_emif + 0x10}] 0x00000001
 
 		# ONENANDCTRL -- CS0 has OneNAND, enable sync reads
-		mww [expr $a_emif + 0x5c] 0x0441
+		mww [expr {$a_emif + 0x5c}] 0x0441
 	}
 	proc flashprobe {} { }
 }
@@ -133,11 +133,11 @@ proc dm365evm_init {} {
 	set a_emif [dict get $dm365 a_emif]
 
 	# AWCCR
-	mww [expr $a_emif + 0x04] 0xff
+	mww [expr {$a_emif + 0x04}] 0xff
 	# CS0 == NAND or OneNAND
 	cs0_setup $a_emif
 	# CS1 == CPLD
-	mww [expr $a_emif + 0x14] 0x00a00505
+	mww [expr {$a_emif + 0x14}] 0x00a00505
 
 	# FIXME setup UART0
 
diff --git a/tcl/board/embedded-artists_lpc2478-32.cfg b/tcl/board/embedded-artists_lpc2478-32.cfg
index 8ef9179de..abf0a5f22 100644
--- a/tcl/board/embedded-artists_lpc2478-32.cfg
+++ b/tcl/board/embedded-artists_lpc2478-32.cfg
@@ -26,7 +26,7 @@ proc init_board {} {
     global _CHIPNAME
 
     # A working area will help speeding the flash programming
-    $_TARGETNAME configure -work-area-phys 0x40000200 -work-area-size [expr 0x10000-0x200-0x20] -work-area-backup 0
+    $_TARGETNAME configure -work-area-phys 0x40000200 -work-area-size [expr {0x10000-0x200-0x20}] -work-area-backup 0
 
     # External 16-bit flash at chip select CS0 (SST39VF3201-70, 4 MiB)
     flash bank $_CHIPNAME.extflash cfi 0x80000000 0x400000 2 2 $_TARGETNAME jedec_probe
diff --git a/tcl/board/icnova_imx53_sodimm.cfg b/tcl/board/icnova_imx53_sodimm.cfg
index af9818814..0a161f6cd 100644
--- a/tcl/board/icnova_imx53_sodimm.cfg
+++ b/tcl/board/icnova_imx53_sodimm.cfg
@@ -45,7 +45,7 @@ proc sodimm_init { } {
 
 	; # ARM errata ID #468414
 	set tR [arm mrc 15 0 1 0 1]
-	arm mcr 15 0 1 0 1 [expr $tR | (1<<5)]	; # enable L1NEON bit
+	arm mcr 15 0 1 0 1 [expr {$tR | (1<<5)}]	; # enable L1NEON bit
 
 	init_l2cc
 	init_aips
@@ -79,7 +79,7 @@ proc init_l2cc { } {
 	; #orr r0, r0, #(1 << 22)          /* disable write allocate */
 
 	; #mcr 15, 1, r0, c9, c0, 2
-	arm mcr 15 1 9 0 2 [expr 0xC4 | (1<<24) | (1<<23) | (1<<22)]
+	arm mcr 15 1 9 0 2 [expr {0xC4 | (1<<24) | (1<<23) | (1<<22)}]
 }
 
 
@@ -93,10 +93,10 @@ proc init_aips { } {
 	set VAL			0x77777777
 
 #	dap apsel 1
-	mww [expr $AIPS1_BASE_ADDR + 0x0] $VAL
-	mww [expr $AIPS1_BASE_ADDR + 0x4] $VAL
-	mww [expr $AIPS2_BASE_ADDR + 0x0] $VAL
-	mww [expr $AIPS2_BASE_ADDR + 0x4] $VAL
+	mww [expr {$AIPS1_BASE_ADDR + 0x0}] $VAL
+	mww [expr {$AIPS1_BASE_ADDR + 0x4}] $VAL
+	mww [expr {$AIPS2_BASE_ADDR + 0x0}] $VAL
+	mww [expr {$AIPS2_BASE_ADDR + 0x4}] $VAL
 #	dap apsel 0
 }
 
@@ -104,22 +104,22 @@ proc init_aips { } {
 proc init_clock { } {
 	global AIPS1_BASE_ADDR
 	global AIPS2_BASE_ADDR
-	set CCM_BASE_ADDR	[expr $AIPS1_BASE_ADDR + 0x000D4000]
+	set CCM_BASE_ADDR	[expr {$AIPS1_BASE_ADDR + 0x000D4000}]
 	set CLKCTL_CCSR         0x0C
 	set CLKCTL_CBCDR	0x14
 	set CLKCTL_CBCMR        0x18
-	set PLL1_BASE_ADDR	[expr $AIPS2_BASE_ADDR + 0x00080000]
-	set PLL2_BASE_ADDR	[expr $AIPS2_BASE_ADDR + 0x00084000]
-	set PLL3_BASE_ADDR	[expr $AIPS2_BASE_ADDR + 0x00088000]
-	set PLL4_BASE_ADDR	[expr $AIPS2_BASE_ADDR + 0x0008C000]
+	set PLL1_BASE_ADDR	[expr {$AIPS2_BASE_ADDR + 0x00080000}]
+	set PLL2_BASE_ADDR	[expr {$AIPS2_BASE_ADDR + 0x00084000}]
+	set PLL3_BASE_ADDR	[expr {$AIPS2_BASE_ADDR + 0x00088000}]
+	set PLL4_BASE_ADDR	[expr {$AIPS2_BASE_ADDR + 0x0008C000}]
 	set CLKCTL_CSCMR1	0x1C
 	set CLKCTL_CDHIPR	0x48
-	set PLATFORM_BASE_ADDR	[expr $AIPS2_BASE_ADDR + 0x000A0000]
+	set PLATFORM_BASE_ADDR	[expr {$AIPS2_BASE_ADDR + 0x000A0000}]
 	set CLKCTL_CSCDR1	0x24
 	set CLKCTL_CCDR		0x04
 
 	; # Switch ARM to step clock
-	mww [expr $CCM_BASE_ADDR + $CLKCTL_CCSR] 0x4
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CCSR}] 0x4
 
 	return
 	echo "not returned"
@@ -127,52 +127,52 @@ proc init_clock { } {
 	setup_pll $PLL3_BASE_ADDR 400
 
 	; # Switch peripheral to PLL3
-	mww [expr $CCM_BASE_ADDR + $CLKCTL_CBCMR] 0x00015154
-	mww [expr $CCM_BASE_ADDR + $CLKCTL_CBCDR] [expr 0x02888945 | (1<<16)]
-	while {[mrw [expr $CCM_BASE_ADDR + $CLKCTL_CDHIPR]] != 0} { sleep 1 }
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CBCMR}] 0x00015154
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CBCDR}] [expr {0x02888945 | (1<<16)}]
+	while {[mrw [expr {$CCM_BASE_ADDR + $CLKCTL_CDHIPR}]] != 0} { sleep 1 }
 
 	setup_pll $PLL2_BASE_ADDR 400
 
 	; # Switch peripheral to PLL2
-	mww [expr $CCM_BASE_ADDR + $CLKCTL_CBCDR] [expr 0x00808145 | (2<<10) | (9<<16) | (1<<19)]
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CBCDR}] [expr {0x00808145 | (2<<10) | (9<<16) | (1<<19)}]
 
-	mww [expr $CCM_BASE_ADDR + $CLKCTL_CBCMR] 0x00016154
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CBCMR}] 0x00016154
 
 	; # change uart clk parent to pll2
-	mww [expr $CCM_BASE_ADDR + $CLKCTL_CSCMR1] [expr [mrw [expr $CCM_BASE_ADDR + $CLKCTL_CSCMR1]] & 0xfcffffff | 0x01000000]
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CSCMR1}] [expr [mrw [expr {$CCM_BASE_ADDR + $CLKCTL_CSCMR1}]] & 0xfcffffff | 0x01000000]
 
 	; # make sure change is effective
-	while {[mrw [expr $CCM_BASE_ADDR + $CLKCTL_CDHIPR]] != 0} { sleep 1 }
+	while {[mrw [expr {$CCM_BASE_ADDR + $CLKCTL_CDHIPR}]] != 0} { sleep 1 }
 
 	setup_pll $PLL3_BASE_ADDR 216
 
 	setup_pll $PLL4_BASE_ADDR 455
 
 	; # Set the platform clock dividers
-	mww [expr $PLATFORM_BASE_ADDR + 0x14] 0x00000124
+	mww [expr {$PLATFORM_BASE_ADDR + 0x14}] 0x00000124
 
-	mww [expr $CCM_BASE_ADDR + 0x10] 0
+	mww [expr {$CCM_BASE_ADDR + 0x10}] 0
 
 	; # Switch ARM back to PLL 1.
-	mww [expr $CCM_BASE_ADDR + $CLKCTL_CCSR] 0x0
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CCSR}] 0x0
 
 	; # make uart div=6
-	mww [expr $CCM_BASE_ADDR + $CLKCTL_CSCDR1] [expr [mrw [expr $CCM_BASE_ADDR + $CLKCTL_CSCDR1]] & 0xffffffc0 | 0x0a]
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CSCDR1}] [expr [mrw [expr {$CCM_BASE_ADDR + $CLKCTL_CSCDR1}]] & 0xffffffc0 | 0x0a]
 
 	; # Restore the default values in the Gate registers
-	mww [expr $CCM_BASE_ADDR + 0x68] 0xFFFFFFFF
-	mww [expr $CCM_BASE_ADDR + 0x6C] 0xFFFFFFFF
-	mww [expr $CCM_BASE_ADDR + 0x70] 0xFFFFFFFF
-	mww [expr $CCM_BASE_ADDR + 0x74] 0xFFFFFFFF
-	mww [expr $CCM_BASE_ADDR + 0x78] 0xFFFFFFFF
-	mww [expr $CCM_BASE_ADDR + 0x7C] 0xFFFFFFFF
-	mww [expr $CCM_BASE_ADDR + 0x80] 0xFFFFFFFF
-	mww [expr $CCM_BASE_ADDR + 0x84] 0xFFFFFFFF
+	mww [expr {$CCM_BASE_ADDR + 0x68}] 0xFFFFFFFF
+	mww [expr {$CCM_BASE_ADDR + 0x6C}] 0xFFFFFFFF
+	mww [expr {$CCM_BASE_ADDR + 0x70}] 0xFFFFFFFF
+	mww [expr {$CCM_BASE_ADDR + 0x74}] 0xFFFFFFFF
+	mww [expr {$CCM_BASE_ADDR + 0x78}] 0xFFFFFFFF
+	mww [expr {$CCM_BASE_ADDR + 0x7C}] 0xFFFFFFFF
+	mww [expr {$CCM_BASE_ADDR + 0x80}] 0xFFFFFFFF
+	mww [expr {$CCM_BASE_ADDR + 0x84}] 0xFFFFFFFF
 
-	mww [expr $CCM_BASE_ADDR + $CLKCTL_CCDR] 0x00000
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CCDR}] 0x00000
 
 	; # for cko - for ARM div by 8
-	mww [expr $CCM_BASE_ADDR + 0x60] [expr 0x000A0000 & 0x00000F0]
+	mww [expr {$CCM_BASE_ADDR + 0x60}] [expr {0x000A0000 & 0x00000F0}]
 }
 
 
@@ -187,68 +187,68 @@ proc setup_pll { PLL_ADDR CLK } {
 	set PLL_DP_HFS_MFN	0x24
 
 	if {$CLK == 1000} {
-		set DP_OP	[expr (10 << 4) + ((1 - 1) << 0)]
-		set DP_MFD	[expr (12 - 1)]
+		set DP_OP	[expr {(10 << 4) + ((1 - 1) << 0)}]
+		set DP_MFD	[expr {12 - 1}]
 		set DP_MFN	5
 	} elseif {$CLK == 850} {
-		set DP_OP	[expr (8 << 4) + ((1 - 1)  << 0)]
-		set DP_MFD	[expr (48 - 1)]
+		set DP_OP	[expr {(8 << 4) + ((1 - 1)  << 0)}]
+		set DP_MFD	[expr {48 - 1}]
 		set DP_MFN	41
 	} elseif {$CLK == 800} {
-		set DP_OP	[expr (8 << 4) + ((1 - 1)  << 0)]
-		set DP_MFD	[expr (3 - 1)]
+		set DP_OP	[expr {(8 << 4) + ((1 - 1)  << 0)}]
+		set DP_MFD	[expr {3 - 1}]
 		set DP_MFN	1
 	} elseif {$CLK == 700} {
-		set DP_OP	[expr (7 << 4) + ((1 - 1)  << 0)]
-		set DP_MFD	[expr (24 - 1)]
+		set DP_OP	[expr {(7 << 4) + ((1 - 1)  << 0)}]
+		set DP_MFD	[expr {24 - 1}]
 		set DP_MFN	7
 	} elseif {$CLK == 600} {
-		set DP_OP	[expr (6 << 4) + ((1 - 1)  << 0)]
-		set DP_MFD	[expr (4 - 1)]
+		set DP_OP	[expr {(6 << 4) + ((1 - 1)  << 0)}]
+		set DP_MFD	[expr {4 - 1}]
 		set DP_MFN	1
 	} elseif {$CLK == 665} {
-		set DP_OP	[expr (6 << 4) + ((1 - 1)  << 0)]
-		set DP_MFD	[expr (96 - 1)]
+		set DP_OP	[expr {(6 << 4) + ((1 - 1)  << 0)}]
+		set DP_MFD	[expr {96 - 1}]
 		set DP_MFN	89
 	} elseif {$CLK == 532} {
-		set DP_OP	[expr (5 << 4) + ((1 - 1)  << 0)]
-		set DP_MFD	[expr (24 - 1)]
+		set DP_OP	[expr {(5 << 4) + ((1 - 1)  << 0)}]
+		set DP_MFD	[expr {24 - 1}]
 		set DP_MFN	13
 	} elseif {$CLK == 455} {
-		set DP_OP	[expr (8 << 4) + ((2 - 1)  << 0)]
-		set DP_MFD	[expr (48 - 1)]
+		set DP_OP	[expr {(8 << 4) + ((2 - 1)  << 0)}]
+		set DP_MFD	[expr {48 - 1}]
 		set DP_MFN	71
 	} elseif {$CLK == 400} {
-		set DP_OP	[expr (8 << 4) + ((2 - 1)  << 0)]
-		set DP_MFD	[expr (3 - 1)]
+		set DP_OP	[expr {(8 << 4) + ((2 - 1)  << 0)}]
+		set DP_MFD	[expr {3 - 1}]
 		set DP_MFN	1
 	} elseif {$CLK == 216} {
-		set DP_OP	[expr (6 << 4) + ((3 - 1)  << 0)]
-		set DP_MFD	[expr (4 - 1)]
+		set DP_OP	[expr {(6 << 4) + ((3 - 1)  << 0)}]
+		set DP_MFD	[expr {4 - 1}]
 		set DP_MFN	3
 	} else {
 		error "Error (setup_dll): clock not found!"
 	}
 
-	mww [expr $PLL_ADDR + $PLL_DP_CTL] 0x00001232
-	mww [expr $PLL_ADDR + $PLL_DP_CONFIG] 0x2
+	mww [expr {$PLL_ADDR + $PLL_DP_CTL}] 0x00001232
+	mww [expr {$PLL_ADDR + $PLL_DP_CONFIG}] 0x2
 
-	mww [expr $PLL_ADDR + $PLL_DP_OP] $DP_OP
-	mww [expr $PLL_ADDR + $PLL_DP_HFS_MFD] $DP_OP
+	mww [expr {$PLL_ADDR + $PLL_DP_OP}] $DP_OP
+	mww [expr {$PLL_ADDR + $PLL_DP_HFS_MFD}] $DP_OP
 
-	mww [expr $PLL_ADDR + $PLL_DP_MFD] $DP_MFD
-	mww [expr $PLL_ADDR + $PLL_DP_HFS_MFD] $DP_MFD
+	mww [expr {$PLL_ADDR + $PLL_DP_MFD}] $DP_MFD
+	mww [expr {$PLL_ADDR + $PLL_DP_HFS_MFD}] $DP_MFD
 
-	mww [expr $PLL_ADDR + $PLL_DP_MFN] $DP_MFN
-	mww [expr $PLL_ADDR + $PLL_DP_HFS_MFN] $DP_MFN
+	mww [expr {$PLL_ADDR + $PLL_DP_MFN}] $DP_MFN
+	mww [expr {$PLL_ADDR + $PLL_DP_HFS_MFN}] $DP_MFN
 
-	mww [expr $PLL_ADDR + $PLL_DP_CTL] 0x00001232
-	while {[expr [mrw [expr $PLL_ADDR + $PLL_DP_CTL]] & 0x1] == 0} { sleep 1 }
+	mww [expr {$PLL_ADDR + $PLL_DP_CTL}] 0x00001232
+	while {[expr [mrw [expr {$PLL_ADDR + $PLL_DP_CTL}]] & 0x1] == 0} { sleep 1 }
 }
 
 
 proc CPU_2_BE_32 { L } {
-	return [expr (($L & 0x000000FF) << 24) | (($L & 0x0000FF00) << 8) | (($L & 0x00FF0000) >> 8)  | (($L & 0xFF000000) >> 24)]
+	return [expr {(($L & 0x000000FF) << 24) | (($L & 0x0000FF00) << 8) | (($L & 0x00FF0000) >> 8)  | (($L & 0xFF000000) >> 24)}]
 }
 
 
diff --git a/tcl/board/imx31pdk.cfg b/tcl/board/imx31pdk.cfg
index 2dce157db..6c196543c 100644
--- a/tcl/board/imx31pdk.cfg
+++ b/tcl/board/imx31pdk.cfg
@@ -6,7 +6,7 @@ $_TARGETNAME configure -event reset-init { imx31pdk_init }
 proc self_test {} {
 	echo "Running 100 iterations of test."
 	dump_image /ram/test 0x80000000 0x40000
-	for {set i 0} {$i < 100} {set i [expr $i+1]} {
+	for {set i 0} {$i < 100} {set i [expr {$i+1}]} {
 		echo "Iteration $i"
 		reset init
 		mww 0x80000000 0x12345678 0x10000
diff --git a/tcl/board/imx53-m53evk.cfg b/tcl/board/imx53-m53evk.cfg
index b529c4940..6f4964e3d 100644
--- a/tcl/board/imx53-m53evk.cfg
+++ b/tcl/board/imx53-m53evk.cfg
@@ -44,7 +44,7 @@ proc m53evk_init { } {
 
 	; # ARM errata ID #468414
 	set tR [arm mrc 15 0 1 0 1]
-	arm mcr 15 0 1 0 1 [expr $tR | (1<<5)]	; # enable L1NEON bit
+	arm mcr 15 0 1 0 1 [expr {$tR | (1<<5)}]	; # enable L1NEON bit
 
 	init_l2cc
 	init_aips
@@ -75,7 +75,7 @@ proc init_l2cc { } {
 	; #orr r0, r0, #(1 << 22)          /* disable write allocate */
 
 	; #mcr 15, 1, r0, c9, c0, 2
-	arm mcr 15 1 9 0 2 [expr 0xC4 | (1<<24) | (1<<23) | (1<<22)]
+	arm mcr 15 1 9 0 2 [expr {0xC4 | (1<<24) | (1<<23) | (1<<22)}]
 }
 
 
@@ -89,10 +89,10 @@ proc init_aips { } {
 	set VAL			0x77777777
 
 #	dap apsel 1
-	mww [expr $AIPS1_BASE_ADDR + 0x0] $VAL
-	mww [expr $AIPS1_BASE_ADDR + 0x4] $VAL
-	mww [expr $AIPS2_BASE_ADDR + 0x0] $VAL
-	mww [expr $AIPS2_BASE_ADDR + 0x4] $VAL
+	mww [expr {$AIPS1_BASE_ADDR + 0x0}] $VAL
+	mww [expr {$AIPS1_BASE_ADDR + 0x4}] $VAL
+	mww [expr {$AIPS2_BASE_ADDR + 0x0}] $VAL
+	mww [expr {$AIPS2_BASE_ADDR + 0x4}] $VAL
 #	dap apsel 0
 }
 
@@ -100,22 +100,22 @@ proc init_aips { } {
 proc init_clock { } {
 	global AIPS1_BASE_ADDR
 	global AIPS2_BASE_ADDR
-	set CCM_BASE_ADDR	[expr $AIPS1_BASE_ADDR + 0x000D4000]
+	set CCM_BASE_ADDR	[expr {$AIPS1_BASE_ADDR + 0x000D4000}]
 	set CLKCTL_CCSR         0x0C
 	set CLKCTL_CBCDR	0x14
 	set CLKCTL_CBCMR        0x18
-	set PLL1_BASE_ADDR	[expr $AIPS2_BASE_ADDR + 0x00080000]
-	set PLL2_BASE_ADDR	[expr $AIPS2_BASE_ADDR + 0x00084000]
-	set PLL3_BASE_ADDR	[expr $AIPS2_BASE_ADDR + 0x00088000]
-	set PLL4_BASE_ADDR	[expr $AIPS2_BASE_ADDR + 0x0008C000]
+	set PLL1_BASE_ADDR	[expr {$AIPS2_BASE_ADDR + 0x00080000}]
+	set PLL2_BASE_ADDR	[expr {$AIPS2_BASE_ADDR + 0x00084000}]
+	set PLL3_BASE_ADDR	[expr {$AIPS2_BASE_ADDR + 0x00088000}]
+	set PLL4_BASE_ADDR	[expr {$AIPS2_BASE_ADDR + 0x0008C000}]
 	set CLKCTL_CSCMR1	0x1C
 	set CLKCTL_CDHIPR	0x48
-	set PLATFORM_BASE_ADDR	[expr $AIPS2_BASE_ADDR + 0x000A0000]
+	set PLATFORM_BASE_ADDR	[expr {$AIPS2_BASE_ADDR + 0x000A0000}]
 	set CLKCTL_CSCDR1	0x24
 	set CLKCTL_CCDR		0x04
 
 	; # Switch ARM to step clock
-	mww [expr $CCM_BASE_ADDR + $CLKCTL_CCSR] 0x4
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CCSR}] 0x4
 
 	return
 	echo "not returned"
@@ -123,52 +123,52 @@ proc init_clock { } {
 	setup_pll $PLL3_BASE_ADDR 400
 
 	; # Switch peripheral to PLL3
-	mww [expr $CCM_BASE_ADDR + $CLKCTL_CBCMR] 0x00015154
-	mww [expr $CCM_BASE_ADDR + $CLKCTL_CBCDR] [expr 0x02888945 | (1<<16)]
-	while {[mrw [expr $CCM_BASE_ADDR + $CLKCTL_CDHIPR]] != 0} { sleep 1 }
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CBCMR}] 0x00015154
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CBCDR}] [expr {0x02888945 | (1<<16)}]
+	while {[mrw [expr {$CCM_BASE_ADDR + $CLKCTL_CDHIPR}]] != 0} { sleep 1 }
 
 	setup_pll $PLL2_BASE_ADDR 400
 
 	; # Switch peripheral to PLL2
-	mww [expr $CCM_BASE_ADDR + $CLKCTL_CBCDR] [expr 0x00808145 | (2<<10) | (9<<16) | (1<<19)]
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CBCDR}] [expr {0x00808145 | (2<<10) | (9<<16) | (1<<19)}]
 
-	mww [expr $CCM_BASE_ADDR + $CLKCTL_CBCMR] 0x00016154
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CBCMR}] 0x00016154
 
 	; # change uart clk parent to pll2
-	mww [expr $CCM_BASE_ADDR + $CLKCTL_CSCMR1] [expr [mrw [expr $CCM_BASE_ADDR + $CLKCTL_CSCMR1]] & 0xfcffffff | 0x01000000]
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CSCMR1}] [expr [mrw [expr {$CCM_BASE_ADDR + $CLKCTL_CSCMR1}]] & 0xfcffffff | 0x01000000]
 
 	; # make sure change is effective
-	while {[mrw [expr $CCM_BASE_ADDR + $CLKCTL_CDHIPR]] != 0} { sleep 1 }
+	while {[mrw [expr {$CCM_BASE_ADDR + $CLKCTL_CDHIPR}]] != 0} { sleep 1 }
 
 	setup_pll $PLL3_BASE_ADDR 216
 
 	setup_pll $PLL4_BASE_ADDR 455
 
 	; # Set the platform clock dividers
-	mww [expr $PLATFORM_BASE_ADDR + 0x14] 0x00000124
+	mww [expr {$PLATFORM_BASE_ADDR + 0x14}] 0x00000124
 
-	mww [expr $CCM_BASE_ADDR + 0x10] 0
+	mww [expr {$CCM_BASE_ADDR + 0x10}] 0
 
 	; # Switch ARM back to PLL 1.
-	mww [expr $CCM_BASE_ADDR + $CLKCTL_CCSR] 0x0
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CCSR}] 0x0
 
 	; # make uart div=6
-	mww [expr $CCM_BASE_ADDR + $CLKCTL_CSCDR1] [expr [mrw [expr $CCM_BASE_ADDR + $CLKCTL_CSCDR1]] & 0xffffffc0 | 0x0a]
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CSCDR1}] [expr [mrw [expr {$CCM_BASE_ADDR + $CLKCTL_CSCDR1}]] & 0xffffffc0 | 0x0a]
 
 	; # Restore the default values in the Gate registers
-	mww [expr $CCM_BASE_ADDR + 0x68] 0xFFFFFFFF
-	mww [expr $CCM_BASE_ADDR + 0x6C] 0xFFFFFFFF
-	mww [expr $CCM_BASE_ADDR + 0x70] 0xFFFFFFFF
-	mww [expr $CCM_BASE_ADDR + 0x74] 0xFFFFFFFF
-	mww [expr $CCM_BASE_ADDR + 0x78] 0xFFFFFFFF
-	mww [expr $CCM_BASE_ADDR + 0x7C] 0xFFFFFFFF
-	mww [expr $CCM_BASE_ADDR + 0x80] 0xFFFFFFFF
-	mww [expr $CCM_BASE_ADDR + 0x84] 0xFFFFFFFF
+	mww [expr {$CCM_BASE_ADDR + 0x68}] 0xFFFFFFFF
+	mww [expr {$CCM_BASE_ADDR + 0x6C}] 0xFFFFFFFF
+	mww [expr {$CCM_BASE_ADDR + 0x70}] 0xFFFFFFFF
+	mww [expr {$CCM_BASE_ADDR + 0x74}] 0xFFFFFFFF
+	mww [expr {$CCM_BASE_ADDR + 0x78}] 0xFFFFFFFF
+	mww [expr {$CCM_BASE_ADDR + 0x7C}] 0xFFFFFFFF
+	mww [expr {$CCM_BASE_ADDR + 0x80}] 0xFFFFFFFF
+	mww [expr {$CCM_BASE_ADDR + 0x84}] 0xFFFFFFFF
 
-	mww [expr $CCM_BASE_ADDR + $CLKCTL_CCDR] 0x00000
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CCDR}] 0x00000
 
 	; # for cko - for ARM div by 8
-	mww [expr $CCM_BASE_ADDR + 0x60] [expr 0x000A0000 & 0x00000F0]
+	mww [expr {$CCM_BASE_ADDR + 0x60}] [expr {0x000A0000 & 0x00000F0}]
 }
 
 
@@ -183,68 +183,68 @@ proc setup_pll { PLL_ADDR CLK } {
 	set PLL_DP_HFS_MFN	0x24
 
 	if {$CLK == 1000} {
-		set DP_OP	[expr (10 << 4) + ((1 - 1) << 0)]
-		set DP_MFD	[expr (12 - 1)]
+		set DP_OP	[expr {(10 << 4) + ((1 - 1) << 0)}]
+		set DP_MFD	[expr {12 - 1}]
 		set DP_MFN	5
 	} elseif {$CLK == 850} {
-		set DP_OP	[expr (8 << 4) + ((1 - 1)  << 0)]
-		set DP_MFD	[expr (48 - 1)]
+		set DP_OP	[expr {(8 << 4) + ((1 - 1)  << 0)}]
+		set DP_MFD	[expr {48 - 1}]
 		set DP_MFN	41
 	} elseif {$CLK == 800} {
-		set DP_OP	[expr (8 << 4) + ((1 - 1)  << 0)]
-		set DP_MFD	[expr (3 - 1)]
+		set DP_OP	[expr {(8 << 4) + ((1 - 1)  << 0)}]
+		set DP_MFD	[expr {3 - 1}]
 		set DP_MFN	1
 	} elseif {$CLK == 700} {
-		set DP_OP	[expr (7 << 4) + ((1 - 1)  << 0)]
-		set DP_MFD	[expr (24 - 1)]
+		set DP_OP	[expr {(7 << 4) + ((1 - 1)  << 0)}]
+		set DP_MFD	[expr {24 - 1}]
 		set DP_MFN	7
 	} elseif {$CLK == 600} {
-		set DP_OP	[expr (6 << 4) + ((1 - 1)  << 0)]
-		set DP_MFD	[expr (4 - 1)]
+		set DP_OP	[expr {(6 << 4) + ((1 - 1)  << 0)}]
+		set DP_MFD	[expr {4 - 1}]
 		set DP_MFN	1
 	} elseif {$CLK == 665} {
-		set DP_OP	[expr (6 << 4) + ((1 - 1)  << 0)]
-		set DP_MFD	[expr (96 - 1)]
+		set DP_OP	[expr {(6 << 4) + ((1 - 1)  << 0)}]
+		set DP_MFD	[expr {96 - 1}]
 		set DP_MFN	89
 	} elseif {$CLK == 532} {
-		set DP_OP	[expr (5 << 4) + ((1 - 1)  << 0)]
-		set DP_MFD	[expr (24 - 1)]
+		set DP_OP	[expr {(5 << 4) + ((1 - 1)  << 0)}]
+		set DP_MFD	[expr {24 - 1}]
 		set DP_MFN	13
 	} elseif {$CLK == 455} {
-		set DP_OP	[expr (8 << 4) + ((2 - 1)  << 0)]
-		set DP_MFD	[expr (48 - 1)]
+		set DP_OP	[expr {(8 << 4) + ((2 - 1)  << 0)}]
+		set DP_MFD	[expr {48 - 1}]
 		set DP_MFN	71
 	} elseif {$CLK == 400} {
-		set DP_OP	[expr (8 << 4) + ((2 - 1)  << 0)]
-		set DP_MFD	[expr (3 - 1)]
+		set DP_OP	[expr {(8 << 4) + ((2 - 1)  << 0)}]
+		set DP_MFD	[expr {3 - 1}]
 		set DP_MFN	1
 	} elseif {$CLK == 216} {
-		set DP_OP	[expr (6 << 4) + ((3 - 1)  << 0)]
-		set DP_MFD	[expr (4 - 1)]
+		set DP_OP	[expr {(6 << 4) + ((3 - 1)  << 0)}]
+		set DP_MFD	[expr {4 - 1}]
 		set DP_MFN	3
 	} else {
 		error "Error (setup_dll): clock not found!"
 	}
 
-	mww [expr $PLL_ADDR + $PLL_DP_CTL] 0x00001232
-	mww [expr $PLL_ADDR + $PLL_DP_CONFIG] 0x2
+	mww [expr {$PLL_ADDR + $PLL_DP_CTL}] 0x00001232
+	mww [expr {$PLL_ADDR + $PLL_DP_CONFIG}] 0x2
 
-	mww [expr $PLL_ADDR + $PLL_DP_OP] $DP_OP
-	mww [expr $PLL_ADDR + $PLL_DP_HFS_MFD] $DP_OP
+	mww [expr {$PLL_ADDR + $PLL_DP_OP}] $DP_OP
+	mww [expr {$PLL_ADDR + $PLL_DP_HFS_MFD}] $DP_OP
 
-	mww [expr $PLL_ADDR + $PLL_DP_MFD] $DP_MFD
-	mww [expr $PLL_ADDR + $PLL_DP_HFS_MFD] $DP_MFD
+	mww [expr {$PLL_ADDR + $PLL_DP_MFD}] $DP_MFD
+	mww [expr {$PLL_ADDR + $PLL_DP_HFS_MFD}] $DP_MFD
 
-	mww [expr $PLL_ADDR + $PLL_DP_MFN] $DP_MFN
-	mww [expr $PLL_ADDR + $PLL_DP_HFS_MFN] $DP_MFN
+	mww [expr {$PLL_ADDR + $PLL_DP_MFN}] $DP_MFN
+	mww [expr {$PLL_ADDR + $PLL_DP_HFS_MFN}] $DP_MFN
 
-	mww [expr $PLL_ADDR + $PLL_DP_CTL] 0x00001232
-	while {[expr [mrw [expr $PLL_ADDR + $PLL_DP_CTL]] & 0x1] == 0} { sleep 1 }
+	mww [expr {$PLL_ADDR + $PLL_DP_CTL}] 0x00001232
+	while {[expr [mrw [expr {$PLL_ADDR + $PLL_DP_CTL}]] & 0x1] == 0} { sleep 1 }
 }
 
 
 proc CPU_2_BE_32 { L } {
-	return [expr (($L & 0x000000FF) << 24) | (($L & 0x0000FF00) << 8) | (($L & 0x00FF0000) >> 8)  | (($L & 0xFF000000) >> 24)]
+	return [expr {(($L & 0x000000FF) << 24) | (($L & 0x0000FF00) << 8) | (($L & 0x00FF0000) >> 8)  | (($L & 0xFF000000) >> 24)}]
 }
 
 
diff --git a/tcl/board/imx53loco.cfg b/tcl/board/imx53loco.cfg
index 91c260138..e1bc44da3 100644
--- a/tcl/board/imx53loco.cfg
+++ b/tcl/board/imx53loco.cfg
@@ -46,7 +46,7 @@ proc loco_init { } {
 
 	; # ARM errata ID #468414
 	set tR [arm mrc 15 0 1 0 1]
-	arm mcr 15 0 1 0 1 [expr $tR | (1<<5)]	; # enable L1NEON bit
+	arm mcr 15 0 1 0 1 [expr {$tR | (1<<5)}]	; # enable L1NEON bit
 
 	init_l2cc
 	init_aips
@@ -80,7 +80,7 @@ proc init_l2cc { } {
 	; #orr r0, r0, #(1 << 22)          /* disable write allocate */
 
 	; #mcr 15, 1, r0, c9, c0, 2
-	arm mcr 15 1 9 0 2 [expr 0xC4 | (1<<24) | (1<<23) | (1<<22)]
+	arm mcr 15 1 9 0 2 [expr {0xC4 | (1<<24) | (1<<23) | (1<<22)}]
 }
 
 
@@ -94,10 +94,10 @@ proc init_aips { } {
 	set VAL			0x77777777
 
 #	dap apsel 1
-	mww [expr $AIPS1_BASE_ADDR + 0x0] $VAL
-	mww [expr $AIPS1_BASE_ADDR + 0x4] $VAL
-	mww [expr $AIPS2_BASE_ADDR + 0x0] $VAL
-	mww [expr $AIPS2_BASE_ADDR + 0x4] $VAL
+	mww [expr {$AIPS1_BASE_ADDR + 0x0}] $VAL
+	mww [expr {$AIPS1_BASE_ADDR + 0x4}] $VAL
+	mww [expr {$AIPS2_BASE_ADDR + 0x0}] $VAL
+	mww [expr {$AIPS2_BASE_ADDR + 0x4}] $VAL
 #	dap apsel 0
 }
 
@@ -105,22 +105,22 @@ proc init_aips { } {
 proc init_clock { } {
 	global AIPS1_BASE_ADDR
 	global AIPS2_BASE_ADDR
-	set CCM_BASE_ADDR	[expr $AIPS1_BASE_ADDR + 0x000D4000]
+	set CCM_BASE_ADDR	[expr {$AIPS1_BASE_ADDR + 0x000D4000}]
 	set CLKCTL_CCSR         0x0C
 	set CLKCTL_CBCDR	0x14
 	set CLKCTL_CBCMR        0x18
-	set PLL1_BASE_ADDR	[expr $AIPS2_BASE_ADDR + 0x00080000]
-	set PLL2_BASE_ADDR	[expr $AIPS2_BASE_ADDR + 0x00084000]
-	set PLL3_BASE_ADDR	[expr $AIPS2_BASE_ADDR + 0x00088000]
-	set PLL4_BASE_ADDR	[expr $AIPS2_BASE_ADDR + 0x0008C000]
+	set PLL1_BASE_ADDR	[expr {$AIPS2_BASE_ADDR + 0x00080000}]
+	set PLL2_BASE_ADDR	[expr {$AIPS2_BASE_ADDR + 0x00084000}]
+	set PLL3_BASE_ADDR	[expr {$AIPS2_BASE_ADDR + 0x00088000}]
+	set PLL4_BASE_ADDR	[expr {$AIPS2_BASE_ADDR + 0x0008C000}]
 	set CLKCTL_CSCMR1	0x1C
 	set CLKCTL_CDHIPR	0x48
-	set PLATFORM_BASE_ADDR	[expr $AIPS2_BASE_ADDR + 0x000A0000]
+	set PLATFORM_BASE_ADDR	[expr {$AIPS2_BASE_ADDR + 0x000A0000}]
 	set CLKCTL_CSCDR1	0x24
 	set CLKCTL_CCDR		0x04
 
 	; # Switch ARM to step clock
-	mww [expr $CCM_BASE_ADDR + $CLKCTL_CCSR] 0x4
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CCSR}] 0x4
 
 	return
 	echo "not returned"
@@ -128,52 +128,52 @@ proc init_clock { } {
 	setup_pll $PLL3_BASE_ADDR 400
 
 	; # Switch peripheral to PLL3
-	mww [expr $CCM_BASE_ADDR + $CLKCTL_CBCMR] 0x00015154
-	mww [expr $CCM_BASE_ADDR + $CLKCTL_CBCDR] [expr 0x02888945 | (1<<16)]
-	while {[mrw [expr $CCM_BASE_ADDR + $CLKCTL_CDHIPR]] != 0} { sleep 1 }
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CBCMR}] 0x00015154
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CBCDR}] [expr {0x02888945 | (1<<16)}]
+	while {[mrw [expr {$CCM_BASE_ADDR + $CLKCTL_CDHIPR}]] != 0} { sleep 1 }
 
 	setup_pll $PLL2_BASE_ADDR 400
 
 	; # Switch peripheral to PLL2
-	mww [expr $CCM_BASE_ADDR + $CLKCTL_CBCDR] [expr 0x00808145 | (2<<10) | (9<<16) | (1<<19)]
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CBCDR}] [expr {0x00808145 | (2<<10) | (9<<16) | (1<<19)}]
 
-	mww [expr $CCM_BASE_ADDR + $CLKCTL_CBCMR] 0x00016154
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CBCMR}] 0x00016154
 
 	; # change uart clk parent to pll2
-	mww [expr $CCM_BASE_ADDR + $CLKCTL_CSCMR1] [expr [mrw [expr $CCM_BASE_ADDR + $CLKCTL_CSCMR1]] & 0xfcffffff | 0x01000000]
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CSCMR1}] [expr [mrw [expr {$CCM_BASE_ADDR + $CLKCTL_CSCMR1}]] & 0xfcffffff | 0x01000000]
 
 	; # make sure change is effective
-	while {[mrw [expr $CCM_BASE_ADDR + $CLKCTL_CDHIPR]] != 0} { sleep 1 }
+	while {[mrw [expr {$CCM_BASE_ADDR + $CLKCTL_CDHIPR}]] != 0} { sleep 1 }
 
 	setup_pll $PLL3_BASE_ADDR 216
 
 	setup_pll $PLL4_BASE_ADDR 455
 
 	; # Set the platform clock dividers
-	mww [expr $PLATFORM_BASE_ADDR + 0x14] 0x00000124
+	mww [expr {$PLATFORM_BASE_ADDR + 0x14}] 0x00000124
 
-	mww [expr $CCM_BASE_ADDR + 0x10] 0
+	mww [expr {$CCM_BASE_ADDR + 0x10}] 0
 
 	; # Switch ARM back to PLL 1.
-	mww [expr $CCM_BASE_ADDR + $CLKCTL_CCSR] 0x0
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CCSR}] 0x0
 
 	; # make uart div=6
-	mww [expr $CCM_BASE_ADDR + $CLKCTL_CSCDR1] [expr [mrw [expr $CCM_BASE_ADDR + $CLKCTL_CSCDR1]] & 0xffffffc0 | 0x0a]
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CSCDR1}] [expr [mrw [expr {$CCM_BASE_ADDR + $CLKCTL_CSCDR1}]] & 0xffffffc0 | 0x0a]
 
 	; # Restore the default values in the Gate registers
-	mww [expr $CCM_BASE_ADDR + 0x68] 0xFFFFFFFF
-	mww [expr $CCM_BASE_ADDR + 0x6C] 0xFFFFFFFF
-	mww [expr $CCM_BASE_ADDR + 0x70] 0xFFFFFFFF
-	mww [expr $CCM_BASE_ADDR + 0x74] 0xFFFFFFFF
-	mww [expr $CCM_BASE_ADDR + 0x78] 0xFFFFFFFF
-	mww [expr $CCM_BASE_ADDR + 0x7C] 0xFFFFFFFF
-	mww [expr $CCM_BASE_ADDR + 0x80] 0xFFFFFFFF
-	mww [expr $CCM_BASE_ADDR + 0x84] 0xFFFFFFFF
+	mww [expr {$CCM_BASE_ADDR + 0x68}] 0xFFFFFFFF
+	mww [expr {$CCM_BASE_ADDR + 0x6C}] 0xFFFFFFFF
+	mww [expr {$CCM_BASE_ADDR + 0x70}] 0xFFFFFFFF
+	mww [expr {$CCM_BASE_ADDR + 0x74}] 0xFFFFFFFF
+	mww [expr {$CCM_BASE_ADDR + 0x78}] 0xFFFFFFFF
+	mww [expr {$CCM_BASE_ADDR + 0x7C}] 0xFFFFFFFF
+	mww [expr {$CCM_BASE_ADDR + 0x80}] 0xFFFFFFFF
+	mww [expr {$CCM_BASE_ADDR + 0x84}] 0xFFFFFFFF
 
-	mww [expr $CCM_BASE_ADDR + $CLKCTL_CCDR] 0x00000
+	mww [expr {$CCM_BASE_ADDR + $CLKCTL_CCDR}] 0x00000
 
 	; # for cko - for ARM div by 8
-	mww [expr $CCM_BASE_ADDR + 0x60] [expr 0x000A0000 & 0x00000F0]
+	mww [expr {$CCM_BASE_ADDR + 0x60}] [expr {0x000A0000 & 0x00000F0}]
 }
 
 
@@ -188,68 +188,68 @@ proc setup_pll { PLL_ADDR CLK } {
 	set PLL_DP_HFS_MFN	0x24
 
 	if {$CLK == 1000} {
-		set DP_OP	[expr (10 << 4) + ((1 - 1) << 0)]
-		set DP_MFD	[expr (12 - 1)]
+		set DP_OP	[expr {(10 << 4) + ((1 - 1) << 0)}]
+		set DP_MFD	[expr {12 - 1}]
 		set DP_MFN	5
 	} elseif {$CLK == 850} {
-		set DP_OP	[expr (8 << 4) + ((1 - 1)  << 0)]
-		set DP_MFD	[expr (48 - 1)]
+		set DP_OP	[expr {(8 << 4) + ((1 - 1)  << 0)}]
+		set DP_MFD	[expr {48 - 1}]
 		set DP_MFN	41
 	} elseif {$CLK == 800} {
-		set DP_OP	[expr (8 << 4) + ((1 - 1)  << 0)]
-		set DP_MFD	[expr (3 - 1)]
+		set DP_OP	[expr {(8 << 4) + ((1 - 1)  << 0)}]
+		set DP_MFD	[expr {3 - 1}]
 		set DP_MFN	1
 	} elseif {$CLK == 700} {
-		set DP_OP	[expr (7 << 4) + ((1 - 1)  << 0)]
-		set DP_MFD	[expr (24 - 1)]
+		set DP_OP	[expr {(7 << 4) + ((1 - 1)  << 0)}]
+		set DP_MFD	[expr {24 - 1}]
 		set DP_MFN	7
 	} elseif {$CLK == 600} {
-		set DP_OP	[expr (6 << 4) + ((1 - 1)  << 0)]
-		set DP_MFD	[expr (4 - 1)]
+		set DP_OP	[expr {(6 << 4) + ((1 - 1)  << 0)}]
+		set DP_MFD	[expr {4 - 1}]
 		set DP_MFN	1
 	} elseif {$CLK == 665} {
-		set DP_OP	[expr (6 << 4) + ((1 - 1)  << 0)]
-		set DP_MFD	[expr (96 - 1)]
+		set DP_OP	[expr {(6 << 4) + ((1 - 1)  << 0)}]
+		set DP_MFD	[expr {96 - 1}]
 		set DP_MFN	89
 	} elseif {$CLK == 532} {
-		set DP_OP	[expr (5 << 4) + ((1 - 1)  << 0)]
-		set DP_MFD	[expr (24 - 1)]
+		set DP_OP	[expr {(5 << 4) + ((1 - 1)  << 0)}]
+		set DP_MFD	[expr {24 - 1}]
 		set DP_MFN	13
 	} elseif {$CLK == 455} {
-		set DP_OP	[expr (8 << 4) + ((2 - 1)  << 0)]
-		set DP_MFD	[expr (48 - 1)]
+		set DP_OP	[expr {(8 << 4) + ((2 - 1)  << 0)}]
+		set DP_MFD	[expr {48 - 1}]
 		set DP_MFN	71
 	} elseif {$CLK == 400} {
-		set DP_OP	[expr (8 << 4) + ((2 - 1)  << 0)]
-		set DP_MFD	[expr (3 - 1)]
+		set DP_OP	[expr {(8 << 4) + ((2 - 1)  << 0)}]
+		set DP_MFD	[expr {3 - 1}]
 		set DP_MFN	1
 	} elseif {$CLK == 216} {
-		set DP_OP	[expr (6 << 4) + ((3 - 1)  << 0)]
-		set DP_MFD	[expr (4 - 1)]
+		set DP_OP	[expr {(6 << 4) + ((3 - 1)  << 0)}]
+		set DP_MFD	[expr {4 - 1}]
 		set DP_MFN	3
 	} else {
 		error "Error (setup_dll): clock not found!"
 	}
 
-	mww [expr $PLL_ADDR + $PLL_DP_CTL] 0x00001232
-	mww [expr $PLL_ADDR + $PLL_DP_CONFIG] 0x2
+	mww [expr {$PLL_ADDR + $PLL_DP_CTL}] 0x00001232
+	mww [expr {$PLL_ADDR + $PLL_DP_CONFIG}] 0x2
 
-	mww [expr $PLL_ADDR + $PLL_DP_OP] $DP_OP
-	mww [expr $PLL_ADDR + $PLL_DP_HFS_MFD] $DP_OP
+	mww [expr {$PLL_ADDR + $PLL_DP_OP}] $DP_OP
+	mww [expr {$PLL_ADDR + $PLL_DP_HFS_MFD}] $DP_OP
 
-	mww [expr $PLL_ADDR + $PLL_DP_MFD] $DP_MFD
-	mww [expr $PLL_ADDR + $PLL_DP_HFS_MFD] $DP_MFD
+	mww [expr {$PLL_ADDR + $PLL_DP_MFD}] $DP_MFD
+	mww [expr {$PLL_ADDR + $PLL_DP_HFS_MFD}] $DP_MFD
 
-	mww [expr $PLL_ADDR + $PLL_DP_MFN] $DP_MFN
-	mww [expr $PLL_ADDR + $PLL_DP_HFS_MFN] $DP_MFN
+	mww [expr {$PLL_ADDR + $PLL_DP_MFN}] $DP_MFN
+	mww [expr {$PLL_ADDR + $PLL_DP_HFS_MFN}] $DP_MFN
 
-	mww [expr $PLL_ADDR + $PLL_DP_CTL] 0x00001232
-	while {[expr [mrw [expr $PLL_ADDR + $PLL_DP_CTL]] & 0x1] == 0} { sleep 1 }
+	mww [expr {$PLL_ADDR + $PLL_DP_CTL}] 0x00001232
+	while {[expr [mrw [expr {$PLL_ADDR + $PLL_DP_CTL}]] & 0x1] == 0} { sleep 1 }
 }
 
 
 proc CPU_2_BE_32 { L } {
-	return [expr (($L & 0x000000FF) << 24) | (($L & 0x0000FF00) << 8) | (($L & 0x00FF0000) >> 8)  | (($L & 0xFF000000) >> 24)]
+	return [expr {(($L & 0x000000FF) << 24) | (($L & 0x0000FF00) << 8) | (($L & 0x00FF0000) >> 8)  | (($L & 0xFF000000) >> 24)}]
 }
 
 
diff --git a/tcl/board/mcb1700.cfg b/tcl/board/mcb1700.cfg
index 01080a0b1..a5e19024a 100644
--- a/tcl/board/mcb1700.cfg
+++ b/tcl/board/mcb1700.cfg
@@ -55,7 +55,7 @@ $_TARGETNAME configure -event reset-init {
 	#
 	#
 	global MCB1700_CCLK
-	adapter speed [expr $MCB1700_CCLK / 8]
+	adapter speed [expr {$MCB1700_CCLK / 8}]
 
 	# Do not remap 0x0000-0x0020 to anything but the flash (i.e. select
 	# "User Flash Mode" where interrupt vectors are _not_ remapped,
diff --git a/tcl/chip/atmel/at91/aic.tcl b/tcl/chip/atmel/at91/aic.tcl
index ba0f2a91b..b0b100270 100644
--- a/tcl/chip/atmel/at91/aic.tcl
+++ b/tcl/chip/atmel/at91/aic.tcl
@@ -1,38 +1,38 @@
-set AIC_SMR      	[expr $AT91C_BASE_AIC + 0x00000000 ]
+set AIC_SMR      	[expr {$AT91C_BASE_AIC + 0x00000000} ]
 global AIC_SMR
-set AIC_SVR      	[expr $AT91C_BASE_AIC + 0x00000080 ]
+set AIC_SVR      	[expr {$AT91C_BASE_AIC + 0x00000080} ]
 global AIC_SVR
-set AIC_IVR      	[expr $AT91C_BASE_AIC + 0x00000100 ]
+set AIC_IVR      	[expr {$AT91C_BASE_AIC + 0x00000100} ]
 global AIC_IVR
-set AIC_FVR      	[expr $AT91C_BASE_AIC + 0x00000104 ]
+set AIC_FVR      	[expr {$AT91C_BASE_AIC + 0x00000104} ]
 global AIC_FVR
-set AIC_ISR      	[expr $AT91C_BASE_AIC + 0x00000108 ]
+set AIC_ISR      	[expr {$AT91C_BASE_AIC + 0x00000108} ]
 global AIC_ISR
-set AIC_IPR      	[expr $AT91C_BASE_AIC + 0x0000010C ]
+set AIC_IPR      	[expr {$AT91C_BASE_AIC + 0x0000010C} ]
 global AIC_IPR
-set AIC_IMR      	[expr $AT91C_BASE_AIC + 0x00000110 ]
+set AIC_IMR      	[expr {$AT91C_BASE_AIC + 0x00000110} ]
 global AIC_IMR
-set AIC_CISR     	[expr $AT91C_BASE_AIC + 0x00000114 ]
+set AIC_CISR     	[expr {$AT91C_BASE_AIC + 0x00000114} ]
 global AIC_CISR
-set AIC_IECR     	[expr $AT91C_BASE_AIC + 0x00000120 ]
+set AIC_IECR     	[expr {$AT91C_BASE_AIC + 0x00000120} ]
 global AIC_IECR
-set AIC_IDCR     	[expr $AT91C_BASE_AIC + 0x00000124 ]
+set AIC_IDCR     	[expr {$AT91C_BASE_AIC + 0x00000124} ]
 global AIC_IDCR
-set AIC_ICCR     	[expr $AT91C_BASE_AIC + 0x00000128 ]
+set AIC_ICCR     	[expr {$AT91C_BASE_AIC + 0x00000128} ]
 global AIC_ICCR
-set AIC_ISCR     	[expr $AT91C_BASE_AIC + 0x0000012C ]
+set AIC_ISCR     	[expr {$AT91C_BASE_AIC + 0x0000012C} ]
 global AIC_ISCR
-set AIC_EOICR    	[expr $AT91C_BASE_AIC + 0x00000130 ]
+set AIC_EOICR    	[expr {$AT91C_BASE_AIC + 0x00000130} ]
 global AIC_EOICR
-set AIC_SPU      	[expr $AT91C_BASE_AIC + 0x00000134 ]
+set AIC_SPU      	[expr {$AT91C_BASE_AIC + 0x00000134} ]
 global AIC_SPU
-set AIC_DCR      	[expr $AT91C_BASE_AIC + 0x00000138 ]
+set AIC_DCR      	[expr {$AT91C_BASE_AIC + 0x00000138} ]
 global AIC_DCR
-set AIC_FFER     	[expr $AT91C_BASE_AIC + 0x00000140 ]
+set AIC_FFER     	[expr {$AT91C_BASE_AIC + 0x00000140} ]
 global AIC_FFER
-set AIC_FFDR     	[expr $AT91C_BASE_AIC + 0x00000144 ]
+set AIC_FFDR     	[expr {$AT91C_BASE_AIC + 0x00000144} ]
 global AIC_FFDR
-set AIC_FFSR     	[expr $AT91C_BASE_AIC + 0x00000148 ]
+set AIC_FFSR     	[expr {$AT91C_BASE_AIC + 0x00000148} ]
 global AIC_FFSR
 
 
@@ -54,7 +54,7 @@ proc show_AIC_IMR_helper { NAME ADDR VAL } {
 
 proc show_AIC { } {
     global AIC_SMR
-    if [catch { mem2array aaa 32 $AIC_SMR [expr 32 * 4] } msg ] {
+    if [catch { mem2array aaa 32 $AIC_SMR [expr {32 * 4}] } msg ] {
 	error [format "%s (%s)" $msg AIC_SMR]
     }
     echo "AIC_SMR: Mode & Type"
@@ -71,7 +71,7 @@ proc show_AIC { } {
 	incr x
     }
     global AIC_SVR
-    if [catch { mem2array aaa 32 $AIC_SVR [expr 32 * 4] } msg ] {
+    if [catch { mem2array aaa 32 $AIC_SVR [expr {32 * 4}] } msg ] {
 	error [format "%s (%s)" $msg AIC_SVR]
     }
     echo "AIC_SVR: Vectors"
diff --git a/tcl/chip/atmel/at91/at91_pmc.cfg b/tcl/chip/atmel/at91/at91_pmc.cfg
index 88b137024..0233cb4c1 100644
--- a/tcl/chip/atmel/at91/at91_pmc.cfg
+++ b/tcl/chip/atmel/at91/at91_pmc.cfg
@@ -1,113 +1,113 @@
-set	AT91_PMC_SCER		[expr ($AT91_PMC + 0x00)]	;# System Clock Enable Register
-set	AT91_PMC_SCDR		[expr ($AT91_PMC + 0x04)]	;# System Clock Disable Register
+set	AT91_PMC_SCER		[expr {$AT91_PMC + 0x00}]	;# System Clock Enable Register
+set	AT91_PMC_SCDR		[expr {$AT91_PMC + 0x04}]	;# System Clock Disable Register
 
-set	AT91_PMC_SCSR		[expr ($AT91_PMC + 0x08)]	;# System Clock Status Register
-set		AT91_PMC_PCK		[expr (1 <<  0)]		;# Processor Clock
-set		AT91RM9200_PMC_UDP	[expr (1 <<  1)]		;# USB Devcice Port Clock [AT91RM9200 only]
-set		AT91RM9200_PMC_MCKUDP	[expr (1 <<  2)]		;# USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only]
-set		AT91CAP9_PMC_DDR	[expr (1 <<  2)]		;# DDR Clock [CAP9 revC & some SAM9 only]
-set		AT91RM9200_PMC_UHP	[expr (1 <<  4)]		;# USB Host Port Clock [AT91RM9200 only]
-set		AT91SAM926x_PMC_UHP	[expr (1 <<  6)]		;# USB Host Port Clock [AT91SAM926x only]
-set		AT91CAP9_PMC_UHP	[expr (1 <<  6)]		;# USB Host Port Clock [AT91CAP9 only]
-set		AT91SAM926x_PMC_UDP	[expr (1 <<  7)]		;# USB Devcice Port Clock [AT91SAM926x only]
-set		AT91_PMC_PCK0		[expr (1 <<  8)]		;# Programmable Clock 0
-set		AT91_PMC_PCK1		[expr (1 <<  9)]		;# Programmable Clock 1
-set		AT91_PMC_PCK2		[expr (1 << 10)]		;# Programmable Clock 2
-set		AT91_PMC_PCK3		[expr (1 << 11)]		;# Programmable Clock 3
-set		AT91_PMC_HCK0		[expr (1 << 16)]		;# AHB Clock (USB host) [AT91SAM9261 only]
-set		AT91_PMC_HCK1		[expr (1 << 17)]		;# AHB Clock (LCD) [AT91SAM9261 only]
+set	AT91_PMC_SCSR		[expr {$AT91_PMC + 0x08}]	;# System Clock Status Register
+set		AT91_PMC_PCK		[expr {1 <<  0}]		;# Processor Clock
+set		AT91RM9200_PMC_UDP	[expr {1 <<  1}]		;# USB Devcice Port Clock [AT91RM9200 only]
+set		AT91RM9200_PMC_MCKUDP	[expr {1 <<  2}]		;# USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only]
+set		AT91CAP9_PMC_DDR	[expr {1 <<  2}]		;# DDR Clock [CAP9 revC & some SAM9 only]
+set		AT91RM9200_PMC_UHP	[expr {1 <<  4}]		;# USB Host Port Clock [AT91RM9200 only]
+set		AT91SAM926x_PMC_UHP	[expr {1 <<  6}]		;# USB Host Port Clock [AT91SAM926x only]
+set		AT91CAP9_PMC_UHP	[expr {1 <<  6}]		;# USB Host Port Clock [AT91CAP9 only]
+set		AT91SAM926x_PMC_UDP	[expr {1 <<  7}]		;# USB Devcice Port Clock [AT91SAM926x only]
+set		AT91_PMC_PCK0		[expr {1 <<  8}]		;# Programmable Clock 0
+set		AT91_PMC_PCK1		[expr {1 <<  9}]		;# Programmable Clock 1
+set		AT91_PMC_PCK2		[expr {1 << 10}]		;# Programmable Clock 2
+set		AT91_PMC_PCK3		[expr {1 << 11}]		;# Programmable Clock 3
+set		AT91_PMC_HCK0		[expr {1 << 16}]		;# AHB Clock (USB host) [AT91SAM9261 only]
+set		AT91_PMC_HCK1		[expr {1 << 17}]		;# AHB Clock (LCD) [AT91SAM9261 only]
 
-set	AT91_PMC_PCER		[expr ($AT91_PMC + 0x10)]	;# Peripheral Clock Enable Register
-set	AT91_PMC_PCDR		[expr ($AT91_PMC + 0x14)]	;# Peripheral Clock Disable Register
-set	AT91_PMC_PCSR		[expr ($AT91_PMC + 0x18)]	;# Peripheral Clock Status Register
+set	AT91_PMC_PCER		[expr {$AT91_PMC + 0x10}]	;# Peripheral Clock Enable Register
+set	AT91_PMC_PCDR		[expr {$AT91_PMC + 0x14}]	;# Peripheral Clock Disable Register
+set	AT91_PMC_PCSR		[expr {$AT91_PMC + 0x18}]	;# Peripheral Clock Status Register
 
-set	AT91_CKGR_UCKR		[expr ($AT91_PMC + 0x1C)]	;# UTMI Clock Register [some SAM9, CAP9]
-set		AT91_PMC_UPLLEN		[expr (1   << 16)]		;# UTMI PLL Enable
-set		AT91_PMC_UPLLCOUNT	[expr (0xf << 20)]		;# UTMI PLL Start-up Time
-set		AT91_PMC_BIASEN		[expr (1   << 24)]		;# UTMI BIAS Enable
-set		AT91_PMC_BIASCOUNT	[expr (0xf << 28)]		;# UTMI BIAS Start-up Time
+set	AT91_CKGR_UCKR		[expr {$AT91_PMC + 0x1C}]	;# UTMI Clock Register [some SAM9, CAP9]
+set		AT91_PMC_UPLLEN		[expr {1   << 16}]		;# UTMI PLL Enable
+set		AT91_PMC_UPLLCOUNT	[expr {0xf << 20}]		;# UTMI PLL Start-up Time
+set		AT91_PMC_BIASEN		[expr {1   << 24}]		;# UTMI BIAS Enable
+set		AT91_PMC_BIASCOUNT	[expr {0xf << 28}]		;# UTMI BIAS Start-up Time
 
-set	AT91_CKGR_MOR		[expr ($AT91_PMC + 0x20)]	;# Main Oscillator Register [not on SAM9RL]
-set		AT91_PMC_MOSCEN		[expr (1    << 0)]		;# Main Oscillator Enable
-set		AT91_PMC_OSCBYPASS	[expr (1    << 1)]		;# Oscillator Bypass [SAM9x, CAP9]
-set		AT91_PMC_OSCOUNT	[expr (0xff << 8)]		;# Main Oscillator Start-up Time
+set	AT91_CKGR_MOR		[expr {$AT91_PMC + 0x20}]	;# Main Oscillator Register [not on SAM9RL]
+set		AT91_PMC_MOSCEN		[expr {1    << 0}]		;# Main Oscillator Enable
+set		AT91_PMC_OSCBYPASS	[expr {1    << 1}]		;# Oscillator Bypass [SAM9x, CAP9]
+set		AT91_PMC_OSCOUNT	[expr {0xff << 8}]		;# Main Oscillator Start-up Time
 
-set	AT91_CKGR_MCFR		[expr ($AT91_PMC + 0x24)]	;# Main Clock Frequency Register
-set		AT91_PMC_MAINF		[expr (0xffff <<  0)]		;# Main Clock Frequency
-set		AT91_PMC_MAINRDY	[expr (1	<< 16)]		;# Main Clock Ready
+set	AT91_CKGR_MCFR		[expr {$AT91_PMC + 0x24}]	;# Main Clock Frequency Register
+set		AT91_PMC_MAINF		[expr {0xffff <<  0}]		;# Main Clock Frequency
+set		AT91_PMC_MAINRDY	[expr {1	<< 16}]		;# Main Clock Ready
 
-set	AT91_CKGR_PLLAR		[expr ($AT91_PMC + 0x28)]	;# PLL A Register
-set	AT91_CKGR_PLLBR		[expr ($AT91_PMC + 0x2c)]	;# PLL B Register
-set		AT91_PMC_DIV		[expr (0xff  <<  0)]		;# Divider
-set		AT91_PMC_PLLCOUNT	[expr (0x3f  <<  8)]		;# PLL Counter
-set		AT91_PMC_OUT		[expr (3     << 14)]		;# PLL Clock Frequency Range
-set		AT91_PMC_MUL		[expr (0x7ff << 16)]		;# PLL Multiplier
-set		AT91_PMC_USBDIV		[expr (3     << 28)]		;# USB Divisor (PLLB only)
-set			AT91_PMC_USBDIV_1		[expr (0 << 28)]
-set			AT91_PMC_USBDIV_2		[expr (1 << 28)]
-set			AT91_PMC_USBDIV_4		[expr (2 << 28)]
-set		AT91_PMC_USB96M		[expr (1     << 28)]		;# Divider by 2 Enable (PLLB only)
-set		AT91_PMC_PLLA_WR_ERRATA	[expr (1     << 29)]		;# Bit 29 must always be set to 1 when programming the CKGR_PLLAR register
+set	AT91_CKGR_PLLAR		[expr {$AT91_PMC + 0x28}]	;# PLL A Register
+set	AT91_CKGR_PLLBR		[expr {$AT91_PMC + 0x2c}]	;# PLL B Register
+set		AT91_PMC_DIV		[expr {0xff  <<  0}]		;# Divider
+set		AT91_PMC_PLLCOUNT	[expr {0x3f  <<  8}]		;# PLL Counter
+set		AT91_PMC_OUT		[expr {3     << 14}]		;# PLL Clock Frequency Range
+set		AT91_PMC_MUL		[expr {0x7ff << 16}]		;# PLL Multiplier
+set		AT91_PMC_USBDIV		[expr {3     << 28}]		;# USB Divisor (PLLB only)
+set			AT91_PMC_USBDIV_1		[expr {0 << 28}]
+set			AT91_PMC_USBDIV_2		[expr {1 << 28}]
+set			AT91_PMC_USBDIV_4		[expr {2 << 28}]
+set		AT91_PMC_USB96M		[expr {1     << 28}]		;# Divider by 2 Enable (PLLB only)
+set		AT91_PMC_PLLA_WR_ERRATA	[expr {1     << 29}]		;# Bit 29 must always be set to 1 when programming the CKGR_PLLAR register
 
-set	AT91_PMC_MCKR		[expr ($AT91_PMC + 0x30)]	;# Master Clock Register
-set		AT91_PMC_CSS		[expr (3 <<  0)]		;# Master Clock Selection
-set			AT91_PMC_CSS_SLOW		[expr (0 << 0)]
-set			AT91_PMC_CSS_MAIN		[expr (1 << 0)]
-set			AT91_PMC_CSS_PLLA		[expr (2 << 0)]
-set			AT91_PMC_CSS_PLLB		[expr (3 << 0)]
-set			AT91_PMC_CSS_UPLL		[expr (3 << 0)]	;# [some SAM9 only]
-set		AT91_PMC_PRES		[expr (7 <<  2)]		;# Master Clock Prescaler
-set			AT91_PMC_PRES_1			[expr (0 << 2)]
-set			AT91_PMC_PRES_2			[expr (1 << 2)]
-set			AT91_PMC_PRES_4			[expr (2 << 2)]
-set			AT91_PMC_PRES_8			[expr (3 << 2)]
-set			AT91_PMC_PRES_16		[expr (4 << 2)]
-set			AT91_PMC_PRES_32		[expr (5 << 2)]
-set			AT91_PMC_PRES_64		[expr (6 << 2)]
-set		AT91_PMC_MDIV		[expr (3 <<  8)]		;# Master Clock Division
-set			AT91RM9200_PMC_MDIV_1		[expr (0 << 8)]	;# [AT91RM9200 only]
-set			AT91RM9200_PMC_MDIV_2		[expr (1 << 8)]
-set			AT91RM9200_PMC_MDIV_3		[expr (2 << 8)]
-set			AT91RM9200_PMC_MDIV_4		[expr (3 << 8)]
-set			AT91SAM9_PMC_MDIV_1		[expr (0 << 8)]	;# [SAM9,CAP9 only]
-set			AT91SAM9_PMC_MDIV_2		[expr (1 << 8)]
-set			AT91SAM9_PMC_MDIV_4		[expr (2 << 8)]
-set			AT91SAM9_PMC_MDIV_6		[expr (3 << 8)]	;# [some SAM9 only]
-set			AT91SAM9_PMC_MDIV_3		[expr (3 << 8)]	;# [some SAM9 only]
-set		AT91_PMC_PDIV		[expr (1 << 12)]		;# Processor Clock Division [some SAM9 only]
-set			AT91_PMC_PDIV_1			[expr (0 << 12)]
-set			AT91_PMC_PDIV_2			[expr (1 << 12)]
-set		AT91_PMC_PLLADIV2	[expr (1 << 12)]		;# PLLA divisor by 2 [some SAM9 only]
-set			AT91_PMC_PLLADIV2_OFF		[expr (0 << 12)]
-set			AT91_PMC_PLLADIV2_ON		[expr (1 << 12)]
+set	AT91_PMC_MCKR		[expr {$AT91_PMC + 0x30}]	;# Master Clock Register
+set		AT91_PMC_CSS		[expr {3 <<  0}]		;# Master Clock Selection
+set			AT91_PMC_CSS_SLOW		[expr {0 << 0}]
+set			AT91_PMC_CSS_MAIN		[expr {1 << 0}]
+set			AT91_PMC_CSS_PLLA		[expr {2 << 0}]
+set			AT91_PMC_CSS_PLLB		[expr {3 << 0}]
+set			AT91_PMC_CSS_UPLL		[expr {3 << 0}]	;# [some SAM9 only]
+set		AT91_PMC_PRES		[expr {7 <<  2}]		;# Master Clock Prescaler
+set			AT91_PMC_PRES_1			[expr {0 << 2}]
+set			AT91_PMC_PRES_2			[expr {1 << 2}]
+set			AT91_PMC_PRES_4			[expr {2 << 2}]
+set			AT91_PMC_PRES_8			[expr {3 << 2}]
+set			AT91_PMC_PRES_16		[expr {4 << 2}]
+set			AT91_PMC_PRES_32		[expr {5 << 2}]
+set			AT91_PMC_PRES_64		[expr {6 << 2}]
+set		AT91_PMC_MDIV		[expr {3 <<  8}]		;# Master Clock Division
+set			AT91RM9200_PMC_MDIV_1		[expr {0 << 8}]	;# [AT91RM9200 only]
+set			AT91RM9200_PMC_MDIV_2		[expr {1 << 8}]
+set			AT91RM9200_PMC_MDIV_3		[expr {2 << 8}]
+set			AT91RM9200_PMC_MDIV_4		[expr {3 << 8}]
+set			AT91SAM9_PMC_MDIV_1		[expr {0 << 8}]	;# [SAM9,CAP9 only]
+set			AT91SAM9_PMC_MDIV_2		[expr {1 << 8}]
+set			AT91SAM9_PMC_MDIV_4		[expr {2 << 8}]
+set			AT91SAM9_PMC_MDIV_6		[expr {3 << 8}]	;# [some SAM9 only]
+set			AT91SAM9_PMC_MDIV_3		[expr {3 << 8}]	;# [some SAM9 only]
+set		AT91_PMC_PDIV		[expr {1 << 12}]		;# Processor Clock Division [some SAM9 only]
+set			AT91_PMC_PDIV_1			[expr {0 << 12}]
+set			AT91_PMC_PDIV_2			[expr {1 << 12}]
+set		AT91_PMC_PLLADIV2	[expr {1 << 12}]		;# PLLA divisor by 2 [some SAM9 only]
+set			AT91_PMC_PLLADIV2_OFF		[expr {0 << 12}]
+set			AT91_PMC_PLLADIV2_ON		[expr {1 << 12}]
 
-set	AT91_PMC_USB		[expr ($AT91_PMC + 0x38)]	;# USB Clock Register [some SAM9 only]
-set		AT91_PMC_USBS		[expr (0x1 <<  0)]		;# USB OHCI Input clock selection
-set			AT91_PMC_USBS_PLLA		[expr (0 << 0)]
-set			AT91_PMC_USBS_UPLL		[expr (1 << 0)]
-set		AT91_PMC_OHCIUSBDIV	[expr (0xF <<  8)]		;# Divider for USB OHCI Clock
+set	AT91_PMC_USB		[expr {$AT91_PMC + 0x38}]	;# USB Clock Register [some SAM9 only]
+set		AT91_PMC_USBS		[expr {0x1 <<  0}]		;# USB OHCI Input clock selection
+set			AT91_PMC_USBS_PLLA		[expr {0 << 0}]
+set			AT91_PMC_USBS_UPLL		[expr {1 << 0}]
+set		AT91_PMC_OHCIUSBDIV	[expr {0xF <<  8}]		;# Divider for USB OHCI Clock
 
 ;# set	AT91_PMC_PCKR(n)	[expr ($AT91_PMC + 0x40 + ((n) * 4))]	;# Programmable Clock 0-N Registers
-set		AT91_PMC_CSSMCK		[expr (0x1 <<  8)]		;# CSS or Master Clock Selection
-set			AT91_PMC_CSSMCK_CSS		[expr (0 << 8)]
-set			AT91_PMC_CSSMCK_MCK		[expr (1 << 8)]
+set		AT91_PMC_CSSMCK		[expr {0x1 <<  8}]		;# CSS or Master Clock Selection
+set			AT91_PMC_CSSMCK_CSS		[expr {0 << 8}]
+set			AT91_PMC_CSSMCK_MCK		[expr {1 << 8}]
 
-set	AT91_PMC_IER		[expr ($AT91_PMC + 0x60)]	;# Interrupt Enable Register
-set	AT91_PMC_IDR		[expr ($AT91_PMC + 0x64)]	;# Interrupt Disable Register
-set	AT91_PMC_SR		[expr ($AT91_PMC + 0x68)]	;# Status Register
-set		AT91_PMC_MOSCS		[expr (1 <<  0)]		;# MOSCS Flag
-set		AT...
 
[truncated message content]

[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.11.0-141-g223b79ebe

[OpenOCD-Gerrit <ope...@us...>]

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       via  5ba8e365d9f02b7cb4a316959e0c8b39274f9d83 (commit)
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- Log -----------------------------------------------------------------
commit 223b79ebe21d53a21c85289349232fe7b8dca564
Author: Antonio Borneo <bor...@gm...>
Date:   Mon Apr 26 14:44:48 2021 +0200

    telnet/auto-complete: hide deprecated and internal commands
    
    For both:
    - TCL proc that redirect deprecated commands to the new commands,
    - TCL proc used internally and not supposed to be exposed to user,
    add their name to the list of commands that should be hide by the
    telnet auto-complete.
    
    Change-Id: I05237c6a79334b7d2b151dfb129fb57b2f40bba6
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: http://openocd.zylin.com/6195
    Tested-by: jenkins
    Reviewed-by: Tarek BOCHKATI <tar...@gm...>

diff --git a/src/flash/startup.tcl b/src/flash/startup.tcl
index 7d9dbc7da..0a26da08b 100644
--- a/src/flash/startup.tcl
+++ b/src/flash/startup.tcl
@@ -6,6 +6,7 @@
 # optional args: verify, reset, exit and address
 #
 
+lappend _telnet_autocomplete_skip program_error
 proc program_error {description exit} {
 	if {$exit == 1} {
 		echo $description
diff --git a/src/jtag/startup.tcl b/src/jtag/startup.tcl
index f1e69e591..c1eb2b2ee 100644
--- a/src/jtag/startup.tcl
+++ b/src/jtag/startup.tcl
@@ -119,6 +119,7 @@ proc jtag_ntrst_assert_width args {
 #
 # FIXME phase these aids out after some releases
 #
+lappend _telnet_autocomplete_skip jtag_reset
 proc jtag_reset args {
 	echo "DEPRECATED! use 'adapter \[de\]assert' not 'jtag_reset'"
 	switch $args {
@@ -135,51 +136,61 @@ proc jtag_reset args {
 	}
 }
 
+lappend _telnet_autocomplete_skip adapter_khz
 proc adapter_khz args {
 	echo "DEPRECATED! use 'adapter speed' not 'adapter_khz'"
 	eval adapter speed $args
 }
 
+lappend _telnet_autocomplete_skip adapter_name
 proc adapter_name args {
 	echo "DEPRECATED! use 'adapter name' not 'adapter_name'"
 	eval adapter name $args
 }
 
+lappend _telnet_autocomplete_skip adapter_nsrst_delay
 proc adapter_nsrst_delay args {
 	echo "DEPRECATED! use 'adapter srst delay' not 'adapter_nsrst_delay'"
 	eval adapter srst delay $args
 }
 
+lappend _telnet_autocomplete_skip adapter_nsrst_assert_width
 proc adapter_nsrst_assert_width args {
 	echo "DEPRECATED! use 'adapter srst pulse_width' not 'adapter_nsrst_assert_width'"
 	eval adapter srst pulse_width $args
 }
 
+lappend _telnet_autocomplete_skip interface
 proc interface args {
 	echo "DEPRECATED! use 'adapter driver' not 'interface'"
 	eval adapter driver $args
 }
 
+lappend _telnet_autocomplete_skip interface_transports
 proc  interface_transports args {
 	echo "DEPRECATED! use 'adapter transports' not 'interface_transports'"
 	eval adapter transports $args
 }
 
+lappend _telnet_autocomplete_skip interface_list
 proc  interface_list args {
 	echo "DEPRECATED! use 'adapter list' not 'interface_list'"
 	eval adapter list $args
 }
 
+lappend _telnet_autocomplete_skip ftdi_location
 proc ftdi_location args {
 	echo "DEPRECATED! use 'adapter usb location' not 'ftdi_location'"
 	eval adapter usb location $args
 }
 
+lappend _telnet_autocomplete_skip xds110_serial
 proc xds110_serial args {
 	echo "DEPRECATED! use 'xds110 serial' not 'xds110_serial'"
 	eval xds110 serial $args
 }
 
+lappend _telnet_autocomplete_skip xds110_supply_voltage
 proc xds110_supply_voltage args {
 	echo "DEPRECATED! use 'xds110 supply' not 'xds110_supply_voltage'"
 	eval xds110 supply $args
@@ -189,6 +200,7 @@ proc hla {cmd args} {
         tailcall "hla $cmd" {*}$args
 }
 
+lappend _telnet_autocomplete_skip "hla newtap"
 proc "hla newtap" {args} {
 	echo "DEPRECATED! use 'swj_newdap' not 'hla newtap'"
 	eval swj_newdap $args
diff --git a/src/server/startup.tcl b/src/server/startup.tcl
index 04a1cc046..447b57cc3 100644
--- a/src/server/startup.tcl
+++ b/src/server/startup.tcl
@@ -9,6 +9,9 @@ proc ocd_gdb_restart {target_id} {
 	reset halt
 }
 
+lappend _telnet_autocomplete_skip prevent_cps
+lappend _telnet_autocomplete_skip POST
+lappend _telnet_autocomplete_skip Host:
 proc prevent_cps {} {
 	echo "Possible SECURITY ATTACK detected."
 	echo "It looks like somebody is sending POST or Host: commands to OpenOCD."
diff --git a/src/target/startup.tcl b/src/target/startup.tcl
index f128d3b5e..cee036697 100644
--- a/src/target/startup.tcl
+++ b/src/target/startup.tcl
@@ -208,31 +208,37 @@ proc init_board {} {
 }
 
 # smp_on/smp_off were already DEPRECATED in v0.11.0 through http://openocd.zylin.com/4615
+lappend _telnet_autocomplete_skip "aarch64 smp_on"
 proc "aarch64 smp_on" {args} {
 	echo "DEPRECATED! use 'aarch64 smp on' not 'aarch64 smp_on'"
 	eval aarch64 smp on $args
 }
 
+lappend _telnet_autocomplete_skip "aarch64 smp_off"
 proc "aarch64 smp_off" {args} {
 	echo "DEPRECATED! use 'aarch64 smp off' not 'aarch64 smp_off'"
 	eval aarch64 smp off $args
 }
 
+lappend _telnet_autocomplete_skip "cortex_a smp_on"
 proc "cortex_a smp_on" {args} {
 	echo "DEPRECATED! use 'cortex_a smp on' not 'cortex_a smp_on'"
 	eval cortex_a smp on $args
 }
 
+lappend _telnet_autocomplete_skip "cortex_a smp_off"
 proc "cortex_a smp_off" {args} {
 	echo "DEPRECATED! use 'cortex_a smp off' not 'cortex_a smp_off'"
 	eval cortex_a smp off $args
 }
 
+lappend _telnet_autocomplete_skip "mips_m4k smp_on"
 proc "mips_m4k smp_on" {args} {
 	echo "DEPRECATED! use 'mips_m4k smp on' not 'mips_m4k smp_on'"
 	eval mips_m4k smp on $args
 }
 
+lappend _telnet_autocomplete_skip "mips_m4k smp_off"
 proc "mips_m4k smp_off" {args} {
 	echo "DEPRECATED! use 'mips_m4k smp off' not 'mips_m4k smp_off'"
 	eval mips_m4k smp off $args

commit 5ba8e365d9f02b7cb4a316959e0c8b39274f9d83
Author: Antonio Borneo <bor...@gm...>
Date:   Mon Apr 26 14:22:06 2021 +0200

    telnet: allow hiding selected commands during auto-completion
    
    We have TCL procedure and commands that we do not want to show in
    the list of auto-completion. E.g. TCL wrappers for deprecated
    commands, internal procedures that are not supposed to be exposed
    to user, or even commands that the user decides to hide.
    
    Create a TCL procedure to be called by telnet auto-complete code
    in place of the hard-coded TCL command. The procedure will run the
    same command and will filter-out the unwanted command names.
    
    Initialize the list of commands to be filtered-out with the name
    of the TCL procedure above, as it is considered as internal.
    
    Change-Id: I2d83bbf8194502368c589c85cccb617e69128c69
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: http://openocd.zylin.com/6194
    Tested-by: jenkins
    Reviewed-by: Tarek BOCHKATI <tar...@gm...>

diff --git a/src/server/startup.tcl b/src/server/startup.tcl
index dd1b31e41..04a1cc046 100644
--- a/src/server/startup.tcl
+++ b/src/server/startup.tcl
@@ -19,3 +19,20 @@ proc prevent_cps {} {
 
 proc POST {args} { prevent_cps }
 proc Host: {args} { prevent_cps }
+
+# list of commands we don't want to appear in autocomplete
+lappend _telnet_autocomplete_skip _telnet_autocomplete_helper
+
+# helper for telnet autocomplete
+proc _telnet_autocomplete_helper pattern {
+	set cmds [info commands $pattern]
+
+	# skip matches in variable '_telnet_autocomplete_skip'
+	foreach skip $::_telnet_autocomplete_skip {
+		foreach n [lsearch -all -regexp $cmds "^$skip\$"] {
+			set cmds [lreplace $cmds $n $n]
+		}
+	}
+
+	return [lsort $cmds]
+}
diff --git a/src/server/telnet_server.c b/src/server/telnet_server.c
index d5e0353c8..acb57efd1 100644
--- a/src/server/telnet_server.c
+++ b/src/server/telnet_server.c
@@ -470,7 +470,7 @@ static void telnet_auto_complete(struct connection *connection)
 	query[usr_cmd_len] = '\0';
 
 	/* filter commands */
-	char *query_cmd = alloc_printf("lsort [info commands {%s*}]", query);
+	char *query_cmd = alloc_printf("_telnet_autocomplete_helper {%s*}", query);
 
 	if (!query_cmd) {
 		LOG_ERROR("Out of memory");

-----------------------------------------------------------------------

Summary of changes:
 src/flash/startup.tcl      |  1 +
 src/jtag/startup.tcl       | 12 ++++++++++++
 src/server/startup.tcl     | 20 ++++++++++++++++++++
 src/server/telnet_server.c |  2 +-
 src/target/startup.tcl     |  6 ++++++
 5 files changed, 40 insertions(+), 1 deletion(-)


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Main OpenOCD repository

[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.11.0-139-g8ecc2888c

[OpenOCD-Gerrit <ope...@us...>]

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generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".

The branch, master has been updated
       via  8ecc2888cf219454527d77a7d355fdbe12c319f9 (commit)
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- Log -----------------------------------------------------------------
commit 8ecc2888cf219454527d77a7d355fdbe12c319f9
Author: Tarek BOCHKATI <tar...@gm...>
Date:   Sun Apr 25 07:53:26 2021 +0100

    cortex_m: use unsigned int for FPB and DWT quantifiers
    
    related quantifiers are:
     - fp_num_lit
     - fp_num_code
     - dwt_num_comp
     - dwt_comp_available
    
    Change-Id: I07dec2d4aa21bc0e580be0d9fd0a6809f876c2a8
    Signed-off-by: Tarek BOCHKATI <tar...@gm...>
    Reviewed-on: http://openocd.zylin.com/6185
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 2b38b4a7f..982f55081 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -285,7 +285,6 @@ static int cortex_m_enable_fpb(struct target *target)
 
 static int cortex_m_endreset_event(struct target *target)
 {
-	int i;
 	int retval;
 	uint32_t dcb_demcr;
 	struct cortex_m_common *cortex_m = target_to_cm(target);
@@ -343,14 +342,14 @@ static int cortex_m_endreset_event(struct target *target)
 	cortex_m->fpb_enabled = true;
 
 	/* Restore FPB registers */
-	for (i = 0; i < cortex_m->fp_num_code + cortex_m->fp_num_lit; i++) {
+	for (unsigned int i = 0; i < cortex_m->fp_num_code + cortex_m->fp_num_lit; i++) {
 		retval = target_write_u32(target, fp_list[i].fpcr_address, fp_list[i].fpcr_value);
 		if (retval != ERROR_OK)
 			return retval;
 	}
 
 	/* Restore DWT registers */
-	for (i = 0; i < cortex_m->dwt_num_comp; i++) {
+	for (unsigned int i = 0; i < cortex_m->dwt_num_comp; i++) {
 		retval = target_write_u32(target, dwt_list[i].dwt_comparator_address + 0,
 				dwt_list[i].comp);
 		if (retval != ERROR_OK)
@@ -1266,7 +1265,7 @@ static int cortex_m_deassert_reset(struct target *target)
 int cortex_m_set_breakpoint(struct target *target, struct breakpoint *breakpoint)
 {
 	int retval;
-	int fp_num = 0;
+	unsigned int fp_num = 0;
 	struct cortex_m_common *cortex_m = target_to_cm(target);
 	struct cortex_m_fp_comparator *comparator_list = cortex_m->fp_comparator_list;
 
@@ -1353,7 +1352,7 @@ int cortex_m_unset_breakpoint(struct target *target, struct breakpoint *breakpoi
 	struct cortex_m_common *cortex_m = target_to_cm(target);
 	struct cortex_m_fp_comparator *comparator_list = cortex_m->fp_comparator_list;
 
-	if (!breakpoint->set) {
+	if (breakpoint->set <= 0) {
 		LOG_WARNING("breakpoint not set");
 		return ERROR_OK;
 	}
@@ -1366,8 +1365,8 @@ int cortex_m_unset_breakpoint(struct target *target, struct breakpoint *breakpoi
 		breakpoint->set);
 
 	if (breakpoint->type == BKPT_HARD) {
-		int fp_num = breakpoint->set - 1;
-		if ((fp_num < 0) || (fp_num >= cortex_m->fp_num_code)) {
+		unsigned int fp_num = breakpoint->set - 1;
+		if (fp_num >= cortex_m->fp_num_code) {
 			LOG_DEBUG("Invalid FP Comparator number in breakpoint");
 			return ERROR_OK;
 		}
@@ -1413,7 +1412,7 @@ int cortex_m_remove_breakpoint(struct target *target, struct breakpoint *breakpo
 
 static int cortex_m_set_watchpoint(struct target *target, struct watchpoint *watchpoint)
 {
-	int dwt_num = 0;
+	unsigned int dwt_num = 0;
 	struct cortex_m_common *cortex_m = target_to_cm(target);
 
 	/* REVISIT Don't fully trust these "not used" records ... users
@@ -1498,21 +1497,20 @@ static int cortex_m_unset_watchpoint(struct target *target, struct watchpoint *w
 {
 	struct cortex_m_common *cortex_m = target_to_cm(target);
 	struct cortex_m_dwt_comparator *comparator;
-	int dwt_num;
 
-	if (!watchpoint->set) {
+	if (watchpoint->set <= 0) {
 		LOG_WARNING("watchpoint (wpid: %d) not set",
 			watchpoint->unique_id);
 		return ERROR_OK;
 	}
 
-	dwt_num = watchpoint->set - 1;
+	unsigned int dwt_num = watchpoint->set - 1;
 
 	LOG_DEBUG("Watchpoint (ID %d) DWT%d address: 0x%08x clear",
 		watchpoint->unique_id, dwt_num,
 		(unsigned) watchpoint->address);
 
-	if ((dwt_num < 0) || (dwt_num >= cortex_m->dwt_num_comp)) {
+	if (dwt_num >= cortex_m->dwt_num_comp) {
 		LOG_DEBUG("Invalid DWT Comparator number in watchpoint");
 		return ERROR_OK;
 	}
@@ -1851,7 +1849,7 @@ static void cortex_m_dwt_setup(struct cortex_m_common *cm, struct target *target
 	uint32_t dwtcr;
 	struct reg_cache *cache;
 	struct cortex_m_dwt_comparator *comparator;
-	int reg, i;
+	int reg;
 
 	target_read_u32(target, DWT_CTRL, &dwtcr);
 	LOG_DEBUG("DWT_CTRL: 0x%" PRIx32, dwtcr);
@@ -1893,7 +1891,7 @@ fail1:
 			dwt_base_regs + reg);
 
 	comparator = cm->dwt_comparator_list;
-	for (i = 0; i < cm->dwt_num_comp; i++, comparator++) {
+	for (unsigned int i = 0; i < cm->dwt_num_comp; i++, comparator++) {
 		int j;
 
 		comparator->dwt_comparator_address = DWT_COMP0 + 0x10 * i;
@@ -1964,7 +1962,6 @@ int cortex_m_examine(struct target *target)
 {
 	int retval;
 	uint32_t cpuid, fpcr, mvfr0, mvfr1;
-	int i;
 	struct cortex_m_common *cortex_m = target_to_cm(target);
 	struct adiv5_dap *swjdp = cortex_m->armv7m.arm.dap;
 	struct armv7m_common *armv7m = target_to_armv7m(target);
@@ -2000,23 +1997,23 @@ int cortex_m_examine(struct target *target)
 			return retval;
 
 		/* Get CPU Type */
-		i = (cpuid >> 4) & 0xf;
+		unsigned int core = (cpuid >> 4) & 0xf;
 
 		/* Check if it is an ARMv8-M core */
 		armv7m->arm.is_armv8m = true;
 
 		switch (cpuid & ARM_CPUID_PARTNO_MASK) {
 			case CORTEX_M23_PARTNO:
-				i = 23;
+				core = 23;
 				break;
 			case CORTEX_M33_PARTNO:
-				i = 33;
+				core = 33;
 				break;
 			case CORTEX_M35P_PARTNO:
-				i = 35;
+				core = 35;
 				break;
 			case CORTEX_M55_PARTNO:
-				i = 55;
+				core = 55;
 				break;
 			default:
 				armv7m->arm.is_armv8m = false;
@@ -2025,9 +2022,9 @@ int cortex_m_examine(struct target *target)
 
 
 		LOG_DEBUG("Cortex-M%d r%" PRId8 "p%" PRId8 " processor detected",
-				i, (uint8_t)((cpuid >> 20) & 0xf), (uint8_t)((cpuid >> 0) & 0xf));
+				core, (uint8_t)((cpuid >> 20) & 0xf), (uint8_t)((cpuid >> 0) & 0xf));
 		cortex_m->maskints_erratum = false;
-		if (i == 7) {
+		if (core == 7) {
 			uint8_t rev, patch;
 			rev = (cpuid >> 20) & 0xf;
 			patch = (cpuid >> 0) & 0xf;
@@ -2041,28 +2038,28 @@ int cortex_m_examine(struct target *target)
 		/* VECTRESET is supported only on ARMv7-M cores */
 		cortex_m->vectreset_supported = !armv7m->arm.is_armv8m && !armv7m->arm.is_armv6m;
 
-		if (i == 4) {
+		if (core == 4) {
 			target_read_u32(target, MVFR0, &mvfr0);
 			target_read_u32(target, MVFR1, &mvfr1);
 
 			/* test for floating point feature on Cortex-M4 */
 			if ((mvfr0 == MVFR0_DEFAULT_M4) && (mvfr1 == MVFR1_DEFAULT_M4)) {
-				LOG_DEBUG("Cortex-M%d floating point feature FPv4_SP found", i);
+				LOG_DEBUG("Cortex-M%d floating point feature FPv4_SP found", core);
 				armv7m->fp_feature = FPV4_SP;
 			}
-		} else if (i == 7 || i == 33 || i == 35 || i == 55) {
+		} else if (core == 7 || core == 33 || core == 35 || core == 55) {
 			target_read_u32(target, MVFR0, &mvfr0);
 			target_read_u32(target, MVFR1, &mvfr1);
 
 			/* test for floating point features on Cortex-M7 */
 			if ((mvfr0 == MVFR0_DEFAULT_M7_SP) && (mvfr1 == MVFR1_DEFAULT_M7_SP)) {
-				LOG_DEBUG("Cortex-M%d floating point feature FPv5_SP found", i);
+				LOG_DEBUG("Cortex-M%d floating point feature FPv5_SP found", core);
 				armv7m->fp_feature = FPV5_SP;
 			} else if ((mvfr0 == MVFR0_DEFAULT_M7_DP) && (mvfr1 == MVFR1_DEFAULT_M7_DP)) {
-				LOG_DEBUG("Cortex-M%d floating point feature FPv5_DP found", i);
+				LOG_DEBUG("Cortex-M%d floating point feature FPv5_DP found", core);
 				armv7m->fp_feature = FPV5_DP;
 			}
-		} else if (i == 0) {
+		} else if (core == 0) {
 			/* Cortex-M0 does not support unaligned memory access */
 			armv7m->arm.is_armv6m = true;
 		}
@@ -2074,11 +2071,11 @@ int cortex_m_examine(struct target *target)
 
 
 		if (!armv7m->stlink) {
-			if (i == 3 || i == 4)
+			if (core == 3 || core == 4)
 				/* Cortex-M3/M4 have 4096 bytes autoincrement range,
 				 * s. ARM IHI 0031C: MEM-AP 7.2.2 */
 				armv7m->debug_ap->tar_autoincr_block = (1 << 12);
-			else if (i == 7)
+			else if (core == 7)
 				/* Cortex-M7 has only 1024 bytes autoincrement range */
 				armv7m->debug_ap->tar_autoincr_block = (1 << 10);
 		}
@@ -2119,7 +2116,7 @@ int cortex_m_examine(struct target *target)
 				cortex_m->fp_num_code + cortex_m->fp_num_lit,
 				sizeof(struct cortex_m_fp_comparator));
 		cortex_m->fpb_enabled = fpcr & 1;
-		for (i = 0; i < cortex_m->fp_num_code + cortex_m->fp_num_lit; i++) {
+		for (unsigned int i = 0; i < cortex_m->fp_num_code + cortex_m->fp_num_lit; i++) {
 			cortex_m->fp_comparator_list[i].type =
 				(i < cortex_m->fp_num_code) ? FPCR_CODE : FPCR_LITERAL;
 			cortex_m->fp_comparator_list[i].fpcr_address = FP_COMP0 + 4 * i;
diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h
index 1e2197b1a..0f221ffff 100644
--- a/src/target/cortex_m.h
+++ b/src/target/cortex_m.h
@@ -196,15 +196,15 @@ struct cortex_m_common {
 	uint32_t nvic_icsr;  /* Interrupt Control State Register - shows active and pending IRQ */
 
 	/* Flash Patch and Breakpoint (FPB) */
-	int fp_num_lit;
-	int fp_num_code;
+	unsigned int fp_num_lit;
+	unsigned int fp_num_code;
 	int fp_rev;
 	bool fpb_enabled;
 	struct cortex_m_fp_comparator *fp_comparator_list;
 
 	/* Data Watchpoint and Trace (DWT) */
-	int dwt_num_comp;
-	int dwt_comp_available;
+	unsigned int dwt_num_comp;
+	unsigned int dwt_comp_available;
 	uint32_t dwt_devarch;
 	struct cortex_m_dwt_comparator *dwt_comparator_list;
 	struct reg_cache *dwt_cache;

-----------------------------------------------------------------------

Summary of changes:
 src/target/cortex_m.c | 59 ++++++++++++++++++++++++---------------------------
 src/target/cortex_m.h |  8 +++----
 2 files changed, 32 insertions(+), 35 deletions(-)


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- Log -----------------------------------------------------------------
commit a115b589a71d665787759cf8f2ff07210fd47164
Author: Tarek BOCHKATI <tar...@gm...>
Date:   Thu Apr 22 20:47:23 2021 +0100

    cortex_m: implement hit_watchpoint function
    
    this change aims to provide a better gdb debugging experience,
    by making gdb understand what's really happening.
    
    before this change when hitting a watchpoint
     - openocd reports "T05" to gdb
     - gdb displays: Program received signal SIGTRAP, Trace/breakpoint trap.
    
    after the change
     - openocd reports "T05watch:20000000;" to gdb
     - gdb displays:
       Hardware watchpoint 1: *0x20000000
    
       Old value = 16000000
       New value = 170000000
       ...
    
    Change-Id: Iac3a85eadd86663617889001dd04513a4211ced9
    Signed-off-by: Tarek BOCHKATI <tar...@gm...>
    Reviewed-on: http://openocd.zylin.com/6181
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 46b0e3c2a..2b38b4a7f 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -1596,6 +1596,35 @@ int cortex_m_remove_watchpoint(struct target *target, struct watchpoint *watchpo
 	return ERROR_OK;
 }
 
+int cortex_m_hit_watchpoint(struct target *target, struct watchpoint **hit_watchpoint)
+{
+	if (target->debug_reason != DBG_REASON_WATCHPOINT)
+		return ERROR_FAIL;
+
+	struct cortex_m_common *cortex_m = target_to_cm(target);
+
+	for (struct watchpoint *wp = target->watchpoints; wp; wp = wp->next) {
+		if (!wp->set)
+			continue;
+
+		unsigned int dwt_num = wp->set - 1;
+		struct cortex_m_dwt_comparator *comparator = cortex_m->dwt_comparator_list + dwt_num;
+
+		uint32_t dwt_function;
+		int retval = target_read_u32(target, comparator->dwt_comparator_address + 8, &dwt_function);
+		if (retval != ERROR_OK)
+			return ERROR_FAIL;
+
+		/* check the MATCHED bit */
+		if (dwt_function & BIT(24)) {
+			*hit_watchpoint = wp;
+			return ERROR_OK;
+		}
+	}
+
+	return ERROR_FAIL;
+}
+
 void cortex_m_enable_watchpoints(struct target *target)
 {
 	struct watchpoint *watchpoint = target->watchpoints;
@@ -2523,6 +2552,7 @@ struct target_type cortexm_target = {
 	.remove_breakpoint = cortex_m_remove_breakpoint,
 	.add_watchpoint = cortex_m_add_watchpoint,
 	.remove_watchpoint = cortex_m_remove_watchpoint,
+	.hit_watchpoint = cortex_m_hit_watchpoint,
 
 	.commands = cortex_m_command_handlers,
 	.target_create = cortex_m_target_create,

-----------------------------------------------------------------------

Summary of changes:
 src/target/cortex_m.c | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)


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- Log -----------------------------------------------------------------
commit b60d06ae325c00979e9ff17bb35e868879e6047f
Author: Peter Lawrence <maj...@gm...>
Date:   Tue Mar 2 15:21:28 2021 -0600

    tcl/board: add pico-debug support
    
    pico-debug is not a board; it is a virtual CMSIS-DAP adapter that
    runs on the same RP2040 also being debugged.  This is possible due
    to pico-debug running on the normally-dormant second Cortex-M0+
    core (Core1), providing debugging of the first core (Core0).
    As such, it could be used on a variety of RP2040-based boards.
    
    Since a flash driver is useful (if not essential), a flash driver
    is included.  This driver code originated on RPi's bespoke OpenOCD
    fork; lipstick was added to this particular pig to make it more
    presentable on OpenOCD proper.
    
    no new Clang analyzer warnings
    
    Change-Id: I31f98b5ea1664f0adfbc184b57efba963acfb958
    Signed-off-by: Peter Lawrence <maj...@gm...>
    Reviewed-on: http://openocd.zylin.com/6075
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/doc/openocd.texi b/doc/openocd.texi
index a05f85d5e..a8a413c4f 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -6876,6 +6876,17 @@ Note: only Main and Work flash regions support Erase operation.
 @end deffn
 @end deffn
 
+@deffn {Flash Driver} {rp2040}
+Supports RP2040 "Raspberry Pi Pico" microcontroller.
+RP2040 is a dual-core device with two CM0+ cores. Both cores share the same
+Flash/RAM/MMIO address space.  Non-volatile storage is achieved with an
+external QSPI flash; a Boot ROM provides helper functions.
+
+@example
+flash bank $_FLASHNAME rp2040_flash $_FLASHBASE $_FLASHSIZE 1 32 $_TARGETNAME
+@end example
+@end deffn
+
 @deffn {Flash Driver} {sim3x}
 All members of the SiM3 microcontroller family from Silicon Laboratories
 include internal flash and use ARM Cortex-M3 cores. It supports both JTAG
diff --git a/src/flash/nor/Makefile.am b/src/flash/nor/Makefile.am
index 8c9b2b7ab..532670436 100644
--- a/src/flash/nor/Makefile.am
+++ b/src/flash/nor/Makefile.am
@@ -52,6 +52,7 @@ NOR_DRIVERS = \
 	%D%/psoc5lp.c \
 	%D%/psoc6.c \
 	%D%/renesas_rpchf.c \
+	%D%/rp2040.c \
 	%D%/sfdp.c \
 	%D%/sh_qspi.c \
 	%D%/sim3x.c \
diff --git a/src/flash/nor/drivers.c b/src/flash/nor/drivers.c
index 570861ec5..6eadc756b 100644
--- a/src/flash/nor/drivers.c
+++ b/src/flash/nor/drivers.c
@@ -67,6 +67,7 @@ extern const struct flash_driver psoc5lp_eeprom_flash;
 extern const struct flash_driver psoc5lp_nvl_flash;
 extern const struct flash_driver psoc6_flash;
 extern const struct flash_driver renesas_rpchf_flash;
+extern const struct flash_driver rp2040_flash;
 extern const struct flash_driver sh_qspi_flash;
 extern const struct flash_driver sim3x_flash;
 extern const struct flash_driver stellaris_flash;
@@ -140,6 +141,7 @@ static const struct flash_driver * const flash_drivers[] = {
 	&psoc5lp_nvl_flash,
 	&psoc6_flash,
 	&renesas_rpchf_flash,
+	&rp2040_flash,
 	&sh_qspi_flash,
 	&sim3x_flash,
 	&stellaris_flash,
diff --git a/src/flash/nor/rp2040.c b/src/flash/nor/rp2040.c
new file mode 100644
index 000000000..5b4c16bb9
--- /dev/null
+++ b/src/flash/nor/rp2040.c
@@ -0,0 +1,453 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "imp.h"
+#include <helper/binarybuffer.h>
+#include <target/algorithm.h>
+#include <target/armv7m.h>
+#include "spi.h"
+
+/* NOTE THAT THIS CODE REQUIRES FLASH ROUTINES in BOOTROM WITH FUNCTION TABLE PTR AT 0x00000010
+   Your gdbinit should load the bootrom.elf if appropriate */
+
+/* this is 'M' 'u', 1 (version) */
+#define BOOTROM_MAGIC 0x01754d
+#define BOOTROM_MAGIC_ADDR 0x00000010
+
+/* Call a ROM function via the debug trampoline
+   Up to four arguments passed in r0...r3 as per ABI
+   Function address is passed in r7
+   the trampoline is needed because OpenOCD "algorithm" code insists on sw breakpoints. */
+
+#define MAKE_TAG(a, b) (((b)<<8) | a)
+#define FUNC_DEBUG_TRAMPOLINE       MAKE_TAG('D', 'T')
+#define FUNC_DEBUG_TRAMPOLINE_END   MAKE_TAG('D', 'E')
+#define FUNC_FLASH_EXIT_XIP         MAKE_TAG('E', 'X')
+#define FUNC_CONNECT_INTERNAL_FLASH MAKE_TAG('I', 'F')
+#define FUNC_FLASH_RANGE_ERASE      MAKE_TAG('R', 'E')
+#define FUNC_FLASH_RANGE_PROGRAM    MAKE_TAG('R', 'P')
+#define FUNC_FLASH_FLUSH_CACHE      MAKE_TAG('F', 'C')
+#define FUNC_FLASH_ENTER_CMD_XIP    MAKE_TAG('C', 'X')
+
+struct rp2040_flash_bank {
+	/* flag indicating successful flash probe */
+	bool probed;
+	/* stack used by Boot ROM calls */
+	struct working_area *stack;
+	/* function jump table populated by rp2040_flash_probe() */
+	uint16_t jump_debug_trampoline;
+	uint16_t jump_debug_trampoline_end;
+	uint16_t jump_flash_exit_xip;
+	uint16_t jump_connect_internal_flash;
+	uint16_t jump_flash_range_erase;
+	uint16_t jump_flash_range_program;
+	uint16_t jump_flush_cache;
+	uint16_t jump_enter_cmd_xip;
+	/* detected model of SPI flash */
+	const struct flash_device *dev;
+};
+
+static uint32_t rp2040_lookup_symbol(struct target *target, uint32_t tag, uint16_t *symbol)
+{
+	uint32_t magic;
+	int err = target_read_u32(target, BOOTROM_MAGIC_ADDR, &magic);
+	if (err != ERROR_OK)
+		return err;
+
+	magic &= 0xffffff; /* ignore bootrom version */
+	if (magic != BOOTROM_MAGIC) {
+		if (!((magic ^ BOOTROM_MAGIC)&0xffff))
+			LOG_ERROR("Incorrect RP2040 BOOT ROM version");
+		else
+			LOG_ERROR("RP2040 BOOT ROM not found");
+		return ERROR_FAIL;
+	}
+
+	/* dereference the table pointer */
+	uint16_t table_entry;
+	err = target_read_u16(target, BOOTROM_MAGIC_ADDR + 4, &table_entry);
+	if (err != ERROR_OK)
+		return err;
+
+	uint16_t entry_tag;
+	do {
+		err = target_read_u16(target, table_entry, &entry_tag);
+		if (err != ERROR_OK)
+			return err;
+		if (entry_tag == tag) {
+			/* 16 bit symbol is next */
+			return target_read_u16(target, table_entry + 2, symbol);
+		}
+		table_entry += 4;
+	} while (entry_tag);
+	return ERROR_FAIL;
+}
+
+static int rp2040_call_rom_func(struct target *target, struct rp2040_flash_bank *priv,
+		uint16_t func_offset, uint32_t argdata[], unsigned int n_args)
+{
+	char *regnames[4] = { "r0", "r1", "r2", "r3" };
+
+	assert(n_args <= ARRAY_SIZE(regnames)); /* only allow register arguments */
+
+	if (!priv->stack) {
+		LOG_ERROR("no stack for flash programming code");
+		return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+	}
+	target_addr_t stacktop = priv->stack->address + priv->stack->size;
+
+	LOG_DEBUG("Calling ROM func @0x%" PRIx16 " with %d arguments", func_offset, n_args);
+	LOG_DEBUG("Calling on core \"%s\"", target->cmd_name);
+
+	struct reg_param args[ARRAY_SIZE(regnames) + 2];
+	struct armv7m_algorithm alg_info;
+
+	for (unsigned int i = 0; i < n_args; ++i) {
+		init_reg_param(&args[i], regnames[i], 32, PARAM_OUT);
+		buf_set_u32(args[i].value, 0, 32, argdata[i]);
+	}
+	/* Pass function pointer in r7 */
+	init_reg_param(&args[n_args], "r7", 32, PARAM_OUT);
+	buf_set_u32(args[n_args].value, 0, 32, func_offset);
+	init_reg_param(&args[n_args + 1], "sp", 32, PARAM_OUT);
+	buf_set_u32(args[n_args + 1].value, 0, 32, stacktop);
+
+
+	for (unsigned int i = 0; i < n_args + 2; ++i)
+		LOG_DEBUG("Set %s = 0x%" PRIx32, args[i].reg_name, buf_get_u32(args[i].value, 0, 32));
+
+	/* Actually call the function */
+	alg_info.common_magic = ARMV7M_COMMON_MAGIC;
+	alg_info.core_mode = ARM_MODE_THREAD;
+	int err = target_run_algorithm(
+		target,
+		0, NULL,          /* No memory arguments */
+		n_args + 1, args, /* User arguments + r7 */
+		priv->jump_debug_trampoline, priv->jump_debug_trampoline_end,
+		3000, /* 3s timeout */
+		&alg_info
+	);
+	for (unsigned int i = 0; i < n_args + 2; ++i)
+		destroy_reg_param(&args[i]);
+	if (err != ERROR_OK)
+		LOG_ERROR("Failed to invoke ROM function @0x%" PRIx16 "\n", func_offset);
+	return err;
+
+}
+
+static int stack_grab_and_prep(struct flash_bank *bank)
+{
+	struct rp2040_flash_bank *priv = bank->driver_priv;
+
+	/* target_alloc_working_area always allocates multiples of 4 bytes, so no worry about alignment */
+	const int STACK_SIZE = 256;
+	int err = target_alloc_working_area(bank->target, STACK_SIZE, &priv->stack);
+	if (err != ERROR_OK) {
+		LOG_ERROR("Could not allocate stack for flash programming code");
+		return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+	}
+
+	LOG_DEBUG("Connecting internal flash");
+	err = rp2040_call_rom_func(bank->target, priv, priv->jump_connect_internal_flash, NULL, 0);
+	if (err != ERROR_OK) {
+		LOG_ERROR("RP2040 erase: failed to connect internal flash");
+		return err;
+	}
+
+	LOG_DEBUG("Kicking flash out of XIP mode");
+	err = rp2040_call_rom_func(bank->target, priv, priv->jump_flash_exit_xip, NULL, 0);
+	if (err != ERROR_OK) {
+		LOG_ERROR("RP2040 erase: failed to exit flash XIP mode");
+		return err;
+	}
+
+	return ERROR_OK;
+}
+
+static int rp2040_flash_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
+{
+	LOG_DEBUG("Writing %d bytes starting at 0x%" PRIx32, count, offset);
+
+	struct rp2040_flash_bank *priv = bank->driver_priv;
+	struct target *target = bank->target;
+	struct working_area *bounce;
+
+	int err = stack_grab_and_prep(bank);
+	if (err != ERROR_OK)
+		return err;
+
+	const unsigned int chunk_size = target_get_working_area_avail(target);
+	if (target_alloc_working_area(target, chunk_size, &bounce) != ERROR_OK) {
+		LOG_ERROR("Could not allocate bounce buffer for flash programming. Can't continue");
+		return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+	}
+
+	LOG_DEBUG("Allocated flash bounce buffer @" TARGET_ADDR_FMT, bounce->address);
+
+	while (count > 0) {
+		uint32_t write_size = count > chunk_size ? chunk_size : count;
+		LOG_DEBUG("Writing %d bytes to offset 0x%" PRIx32, write_size, offset);
+		err = target_write_buffer(target, bounce->address, write_size, buffer);
+		if (err != ERROR_OK) {
+			LOG_ERROR("Could not load data into target bounce buffer");
+			break;
+		}
+		uint32_t args[3] = {
+			offset, /* addr */
+			bounce->address, /* data */
+			write_size /* count */
+		};
+		err = rp2040_call_rom_func(target, priv, priv->jump_flash_range_program, args, ARRAY_SIZE(args));
+		if (err != ERROR_OK) {
+			LOG_ERROR("Failed to invoke flash programming code on target");
+			break;
+		}
+
+		buffer += write_size;
+		offset += write_size;
+		count -= write_size;
+	}
+	target_free_working_area(target, bounce);
+
+	if (err != ERROR_OK)
+		return err;
+
+	/* Flash is successfully programmed. We can now do a bit of poking to make the flash
+	   contents visible to us via memory-mapped (XIP) interface in the 0x1... memory region */
+	LOG_DEBUG("Flushing flash cache after write behind");
+	err = rp2040_call_rom_func(bank->target, priv, priv->jump_flush_cache, NULL, 0);
+	if (err != ERROR_OK) {
+		LOG_ERROR("RP2040 write: failed to flush flash cache");
+		return err;
+	}
+	LOG_DEBUG("Configuring SSI for execute-in-place");
+	err = rp2040_call_rom_func(bank->target, priv, priv->jump_enter_cmd_xip, NULL, 0);
+	if (err != ERROR_OK)
+		LOG_ERROR("RP2040 write: failed to flush flash cache");
+	return err;
+}
+
+static int rp2040_flash_erase(struct flash_bank *bank, unsigned int first, unsigned int last)
+{
+	struct rp2040_flash_bank *priv = bank->driver_priv;
+	uint32_t start_addr = bank->sectors[first].offset;
+	uint32_t length = bank->sectors[last].offset + bank->sectors[last].size - start_addr;
+	LOG_DEBUG("RP2040 erase %d bytes starting at 0x%" PRIx32, length, start_addr);
+
+	int err = stack_grab_and_prep(bank);
+	if (err != ERROR_OK)
+		return err;
+
+	LOG_DEBUG("Remote call flash_range_erase");
+
+	uint32_t args[4] = {
+		bank->sectors[first].offset, /* addr */
+		bank->sectors[last].offset + bank->sectors[last].size - bank->sectors[first].offset, /* count */
+		priv->dev->sectorsize, /* block_size */
+		priv->dev->erase_cmd /* block_cmd */
+	};
+
+	/*
+	The RP2040 Boot ROM provides a _flash_range_erase() API call documented in Section 2.8.3.1.3:
+	https://datasheets.raspberrypi.org/rp2040/rp2040-datasheet.pdf
+	and the particular source code for said Boot ROM function can be found here:
+	https://github.com/raspberrypi/pico-bootrom/blob/master/bootrom/program_flash_generic.c
+
+	In theory, the function algorithm provides for erasing both a smaller "sector" (4096 bytes) and
+	an optional larger "block" (size and command provided in args).  OpenOCD's spi.c only uses "block" sizes.
+	*/
+
+	err = rp2040_call_rom_func(bank->target, priv, priv->jump_flash_range_erase, args, ARRAY_SIZE(args));
+
+	return err;
+}
+
+/* -----------------------------------------------------------------------------
+   Driver probing etc */
+
+static int rp2040_ssel_active(struct target *target, bool active)
+{
+	const target_addr_t qspi_ctrl_addr = 0x4001800c;
+	const uint32_t qspi_ctrl_outover_low  = 2UL << 8;
+	const uint32_t qspi_ctrl_outover_high = 3UL << 8;
+	uint32_t state = (active) ? qspi_ctrl_outover_low : qspi_ctrl_outover_high;
+	uint32_t val;
+
+	int err = target_read_u32(target, qspi_ctrl_addr, &val);
+	if (err != ERROR_OK)
+		return err;
+
+	val = (val & ~qspi_ctrl_outover_high) | state;
+
+	err = target_write_u32(target, qspi_ctrl_addr, val);
+	if (err != ERROR_OK)
+		return err;
+
+	return ERROR_OK;
+}
+
+static int rp2040_flash_probe(struct flash_bank *bank)
+{
+	struct rp2040_flash_bank *priv = bank->driver_priv;
+	struct target *target = bank->target;
+
+	int err = rp2040_lookup_symbol(target, FUNC_DEBUG_TRAMPOLINE, &priv->jump_debug_trampoline);
+	if (err != ERROR_OK) {
+		LOG_ERROR("Debug trampoline not found in RP2040 ROM.");
+		return err;
+	}
+	priv->jump_debug_trampoline &= ~1u; /* mask off thumb bit */
+
+	err = rp2040_lookup_symbol(target, FUNC_DEBUG_TRAMPOLINE_END, &priv->jump_debug_trampoline_end);
+	if (err != ERROR_OK) {
+		LOG_ERROR("Debug trampoline end not found in RP2040 ROM.");
+		return err;
+	}
+	priv->jump_debug_trampoline_end &= ~1u; /* mask off thumb bit */
+
+	err = rp2040_lookup_symbol(target, FUNC_FLASH_EXIT_XIP, &priv->jump_flash_exit_xip);
+	if (err != ERROR_OK) {
+		LOG_ERROR("Function FUNC_FLASH_EXIT_XIP not found in RP2040 ROM.");
+		return err;
+	}
+
+	err = rp2040_lookup_symbol(target, FUNC_CONNECT_INTERNAL_FLASH, &priv->jump_connect_internal_flash);
+	if (err != ERROR_OK) {
+		LOG_ERROR("Function FUNC_CONNECT_INTERNAL_FLASH not found in RP2040 ROM.");
+		return err;
+	}
+
+	err = rp2040_lookup_symbol(target, FUNC_FLASH_RANGE_ERASE, &priv->jump_flash_range_erase);
+	if (err != ERROR_OK) {
+		LOG_ERROR("Function FUNC_FLASH_RANGE_ERASE not found in RP2040 ROM.");
+		return err;
+	}
+
+	err = rp2040_lookup_symbol(target, FUNC_FLASH_RANGE_PROGRAM, &priv->jump_flash_range_program);
+	if (err != ERROR_OK) {
+		LOG_ERROR("Function FUNC_FLASH_RANGE_PROGRAM not found in RP2040 ROM.");
+		return err;
+	}
+
+	err = rp2040_lookup_symbol(target, FUNC_FLASH_FLUSH_CACHE, &priv->jump_flush_cache);
+	if (err != ERROR_OK) {
+		LOG_ERROR("Function FUNC_FLASH_FLUSH_CACHE not found in RP2040 ROM.");
+		return err;
+	}
+
+	err = rp2040_lookup_symbol(target, FUNC_FLASH_ENTER_CMD_XIP, &priv->jump_enter_cmd_xip);
+	if (err != ERROR_OK) {
+		LOG_ERROR("Function FUNC_FLASH_ENTER_CMD_XIP not found in RP2040 ROM.");
+		return err;
+	}
+
+	err = stack_grab_and_prep(bank);
+	if (err != ERROR_OK)
+		return err;
+
+	uint32_t device_id = 0;
+	const target_addr_t ssi_dr0 = 0x18000060;
+
+	err = rp2040_ssel_active(target, true);
+
+	/* write RDID request into SPI peripheral's FIFO */
+	for (int count = 0; (count < 4) && (err == ERROR_OK); count++)
+		err = target_write_u32(target, ssi_dr0, SPIFLASH_READ_ID);
+
+	/* by this time, there is a receive FIFO entry for every write */
+	for (int count = 0; (count < 4) && (err == ERROR_OK); count++) {
+		uint32_t status;
+		err = target_read_u32(target, ssi_dr0, &status);
+
+		device_id >>= 8;
+		device_id |= (status & 0xFF) << 24;
+	}
+	device_id >>= 8;
+
+	err = rp2040_ssel_active(target, false);
+	if (err != ERROR_OK) {
+		LOG_ERROR("SSEL inactive failed");
+		return err;
+	}
+
+	/* search for a SPI flash Device ID match */
+	priv->dev = NULL;
+	for (const struct flash_device *p = flash_devices; p->name ; p++)
+		if (p->device_id == device_id) {
+			priv->dev = p;
+			break;
+		}
+
+	if (!priv->dev) {
+		LOG_ERROR("Unknown flash device (ID 0x%08" PRIx32 ")", device_id);
+		return ERROR_FAIL;
+	}
+
+	LOG_INFO("Found flash device \'%s\' (ID 0x%08" PRIx32 ")",
+		priv->dev->name, priv->dev->device_id);
+
+	/* the Boot ROM flash_range_program() routine requires page alignment */
+	bank->write_start_alignment = priv->dev->pagesize;
+	bank->write_end_alignment = priv->dev->pagesize;
+
+	bank->size = priv->dev->size_in_bytes;
+
+	bank->num_sectors = bank->size / priv->dev->sectorsize;
+	LOG_INFO("RP2040 B0 Flash Probe: %d bytes @" TARGET_ADDR_FMT ", in %d sectors\n",
+		bank->size, bank->base, bank->num_sectors);
+	bank->sectors = alloc_block_array(0, priv->dev->sectorsize, bank->num_sectors);
+	if (!bank->sectors)
+		return ERROR_FAIL;
+
+	if (err == ERROR_OK)
+		priv->probed = true;
+
+	return err;
+}
+
+static int rp2040_flash_auto_probe(struct flash_bank *bank)
+{
+	struct rp2040_flash_bank *priv = bank->driver_priv;
+
+	if (priv->probed)
+		return ERROR_OK;
+
+	return rp2040_flash_probe(bank);
+}
+
+static void rp2040_flash_free_driver_priv(struct flash_bank *bank)
+{
+	free(bank->driver_priv);
+	bank->driver_priv = NULL;
+}
+
+/* -----------------------------------------------------------------------------
+   Driver boilerplate */
+
+FLASH_BANK_COMMAND_HANDLER(rp2040_flash_bank_command)
+{
+	struct rp2040_flash_bank *priv;
+	priv = malloc(sizeof(struct rp2040_flash_bank));
+	priv->probed = false;
+
+	/* Set up driver_priv */
+	bank->driver_priv = priv;
+
+	return ERROR_OK;
+}
+
+struct flash_driver rp2040_flash = {
+	.name = "rp2040_flash",
+	.commands = NULL,
+	.flash_bank_command = rp2040_flash_bank_command,
+	.erase =  rp2040_flash_erase,
+	.write = rp2040_flash_write,
+	.read = default_flash_read,
+	.probe = rp2040_flash_probe,
+	.auto_probe = rp2040_flash_auto_probe,
+	.erase_check = default_flash_blank_check,
+	.free_driver_priv = rp2040_flash_free_driver_priv
+};
diff --git a/tcl/board/pico-debug.cfg b/tcl/board/pico-debug.cfg
new file mode 100644
index 000000000..c2fe7d3e2
--- /dev/null
+++ b/tcl/board/pico-debug.cfg
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# pico-debug is a virtual CMSIS-DAP debug adapter
+# it runs on the very same RP2040 target being debugged without additional hardware
+# https://github.com/majbthrd/pico-debug
+
+source [find interface/cmsis-dap.cfg]
+adapter speed 4000
+
+set CHIPNAME rp2040
+source [find target/rp2040-core0.cfg]
+
diff --git a/tcl/target/rp2040-core0.cfg b/tcl/target/rp2040-core0.cfg
new file mode 100644
index 000000000..e427083bc
--- /dev/null
+++ b/tcl/target/rp2040-core0.cfg
@@ -0,0 +1,38 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+transport select swd
+
+source [find target/swj-dp.tcl]
+
+if { [info exists CHIPNAME] } {
+	set _CHIPNAME $CHIPNAME
+} else {
+	set _CHIPNAME rp2040
+}
+
+if { [info exists WORKAREASIZE] } {
+	set _WORKAREASIZE $WORKAREASIZE
+} else {
+	set _WORKAREASIZE 0x10000
+}
+
+if { [info exists CPUTAPID] } {
+	set _CPUTAPID $CPUTAPID
+} else {
+	set _CPUTAPID 0x01002927
+}
+
+swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
+$_TARGETNAME configure -work-area-phys 0x20010000 -work-area-size $_WORKAREASIZE
+
+set _FLASHNAME $_CHIPNAME.flash
+set _FLASHSIZE 0x200000
+set _FLASHBASE 0x10000000
+flash bank $_FLASHNAME rp2040_flash $_FLASHBASE $_FLASHSIZE 1 32 $_TARGETNAME
+
+# srst does not exist; use SYSRESETREQ to perform a soft reset
+cortex_m reset_config sysresetreq
+

-----------------------------------------------------------------------

Summary of changes:
 doc/openocd.texi            |  11 ++
 src/flash/nor/Makefile.am   |   1 +
 src/flash/nor/drivers.c     |   2 +
 src/flash/nor/rp2040.c      | 453 ++++++++++++++++++++++++++++++++++++++++++++
 tcl/board/pico-debug.cfg    |  11 ++
 tcl/target/rp2040-core0.cfg |  38 ++++
 6 files changed, 516 insertions(+)
 create mode 100644 src/flash/nor/rp2040.c
 create mode 100644 tcl/board/pico-debug.cfg
 create mode 100644 tcl/target/rp2040-core0.cfg


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- Log -----------------------------------------------------------------
commit 64a3e7ba4f47c5340543d9a5cadd41bc45d93c93
Author: asier70 <as...@gm...>
Date:   Mon Apr 12 14:09:36 2021 +0200

    flash/nor/stm32f1x: Add support for GD32F1x0/3x0
    
    Nowadays, when it's difficult to buy STM32F030,
    the use of GD32F130 seems to be an interesting functional alternative.
    This is cortex-M3 and it works with the stm32f1x driver, but unfortunately not fully.
    The main difference is another offset of user option bits
    (like WDG_SW, nRST_STOP, nRST_STDBY) in option byte register
    (FLASH_OBR/FMC_OBSTAT 0x4002201C).
    Any use of functions like lock or unlock results in change default values of the those bits stored in flash.
    Thus broken microcontroller is malfunctioning, e.g. flash block programming is interrupted
    by unexpected active hardware watchog (after 0.4s).
    This patch is a simplified version of #4592 done by Dominik Peklo (http://openocd.zylin.com/#/c/4592/).
    GigaDevice GD32F1x0 & GD32F3x0 series devices share DEV_ID
    with STM32F101/2/3 medium-density line,
    however they use a REV_ID different from any STM32 device,
    so can be succesfully detected.
    
    Change-Id: I252cdf738d94983b70676a3497326f90c329e292
    Signed-off-by: asier70Andrzej Sierżęga <as...@gm...>
    Reviewed-on: http://openocd.zylin.com/6164
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/doc/openocd.texi b/doc/openocd.texi
index d71731138..a05f85d5e 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -6927,7 +6927,8 @@ applied to all of them.
 
 @deffn {Flash Driver} {stm32f1x}
 All members of the STM32F0, STM32F1 and STM32F3 microcontroller families
-from STMicroelectronics include internal flash and use ARM Cortex-M0/M3/M4 cores.
+from STMicroelectronics and all members of the GD32F1x0 and GD32F3x0 microcontroller
+families from GigaDevice include internal flash and use ARM Cortex-M0/M3/M4 cores.
 The driver automatically recognizes a number of these chips using
 the chip identification register, and autoconfigures itself.
 
diff --git a/src/flash/nor/stm32f1x.c b/src/flash/nor/stm32f1x.c
index 9cd282d65..125f77691 100644
--- a/src/flash/nor/stm32f1x.c
+++ b/src/flash/nor/stm32f1x.c
@@ -692,7 +692,7 @@ static int stm32x_probe(struct flash_bank *bank)
 	struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
 	uint16_t flash_size_in_kb;
 	uint16_t max_flash_size_in_kb;
-	uint32_t device_id;
+	uint32_t dbgmcu_idcode;
 	int page_size;
 	uint32_t base_address = 0x08000000;
 
@@ -705,14 +705,17 @@ static int stm32x_probe(struct flash_bank *bank)
 	stm32x_info->default_rdp = 0xA5;
 
 	/* read stm32 device id register */
-	int retval = stm32x_get_device_id(bank, &device_id);
+	int retval = stm32x_get_device_id(bank, &dbgmcu_idcode);
 	if (retval != ERROR_OK)
 		return retval;
 
-	LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
+	LOG_INFO("device id = 0x%08" PRIx32 "", dbgmcu_idcode);
+
+	uint16_t device_id = dbgmcu_idcode & 0xfff;
+	uint16_t rev_id = dbgmcu_idcode >> 16;
 
 	/* set page size, protection granularity and max flash size depending on family */
-	switch (device_id & 0xfff) {
+	switch (device_id) {
 	case 0x440: /* stm32f05x */
 		page_size = 1024;
 		stm32x_info->ppage_size = 4;
@@ -754,6 +757,25 @@ static int stm32x_probe(struct flash_bank *bank)
 		page_size = 1024;
 		stm32x_info->ppage_size = 4;
 		max_flash_size_in_kb = 128;
+		/* GigaDevice GD32F1x0 & GD32F3x0 series devices share DEV_ID
+		   with STM32F101/2/3 medium-density line,
+		   however they use a REV_ID different from any STM32 device.
+		   The main difference is another offset of user option bits
+		   (like WDG_SW, nRST_STOP, nRST_STDBY) in option byte register
+		   (FLASH_OBR/FMC_OBSTAT 0x4002201C).
+		   This caused problems e.g. during flash block programming
+		   because of unexpected active hardware watchog. */
+		switch (rev_id) {
+		case 0x1303: /* gd32f1x0 */
+			stm32x_info->user_data_offset = 16;
+			stm32x_info->option_offset = 6;
+			max_flash_size_in_kb = 64;
+			break;
+		case 0x1704: /* gd32f3x0 */
+			stm32x_info->user_data_offset = 16;
+			stm32x_info->option_offset = 6;
+			break;
+		}
 		break;
 	case 0x412: /* stm32f1x low-density */
 		page_size = 1024;
@@ -955,6 +977,14 @@ static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size)
 			rev_str = "A";
 			break;
 
+		case 0x1303: /* gd32f1x0 */
+			device_str = "GD32F1x0";
+			break;
+
+		case 0x1704: /* gd32f3x0 */
+			device_str = "GD32F3x0";
+			break;
+
 		case 0x2000:
 			rev_str = "B";
 			break;

-----------------------------------------------------------------------

Summary of changes:
 doc/openocd.texi         |  3 ++-
 src/flash/nor/stm32f1x.c | 38 ++++++++++++++++++++++++++++++++++----
 2 files changed, 36 insertions(+), 5 deletions(-)


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- Log -----------------------------------------------------------------
commit 87c90393fedc8bb278d189aa53bcd93f4892012b
Author: Tim Newsome <ti...@si...>
Date:   Mon Apr 19 13:04:30 2021 -0700

    Cleanup of config/includes.
    
    Remove a use of AH_BOTTOM from configure.ac. This macro is used by
    autoheader to add '#include' of some include file to the end of
    config.h.in and then to config.h. OpenOCD can be built with a custom
    config.h, so it's preferable to move these '#include' statement directly
    in the C files that need them dropping this unneeded dependency.
    
    It also causes problems when I want to use the gnulib library (which
    comes with its own Makefile, and does not have the same include path as
    the top-level Makefile).
    
    So this change touches a lot of files, but is actually really simple. It
    does not affect functionality at all.
    
    Change-Id: I52c70bf15eb2edc1dd10e0fde23b2bcd4caec000
    Signed-off-by: Tim Newsome <ti...@si...>
    Reviewed-on: http://openocd.zylin.com/6171
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/configure.ac b/configure.ac
index 979bb161b..58be79039 100644
--- a/configure.ac
+++ b/configure.ac
@@ -17,11 +17,6 @@ AC_SUBST([MAKEINFO])
 AM_INIT_AUTOMAKE([-Wall -Wno-portability dist-bzip2 dist-zip subdir-objects])
 
 AC_CONFIG_HEADERS([config.h])
-AH_BOTTOM([
-#include <helper/system.h>
-#include <helper/types.h>
-#include <helper/replacements.h>
-])
 
 AC_LANG([C])
 AC_PROG_CC
diff --git a/src/flash/common.h b/src/flash/common.h
index 4244f1360..69f60d9a3 100644
--- a/src/flash/common.h
+++ b/src/flash/common.h
@@ -19,6 +19,7 @@
 #define OPENOCD_FLASH_COMMON_H
 
 #include <helper/log.h>
+#include <helper/replacements.h>
 
 /**
  * Parses the optional '.index' portion of a flash bank identifier.
diff --git a/src/flash/nor/bluenrg-x.c b/src/flash/nor/bluenrg-x.c
index 57aebc597..cf968cb8c 100644
--- a/src/flash/nor/bluenrg-x.c
+++ b/src/flash/nor/bluenrg-x.c
@@ -20,6 +20,7 @@
 #include "config.h"
 #endif
 
+#include "helper/types.h"
 #include <target/algorithm.h>
 #include <target/armv7m.h>
 #include <target/cortex_m.h>
diff --git a/src/helper/binarybuffer.c b/src/helper/binarybuffer.c
index 44d139f58..3d35702ac 100644
--- a/src/helper/binarybuffer.c
+++ b/src/helper/binarybuffer.c
@@ -23,6 +23,7 @@
 #include "config.h"
 #endif
 
+#include "helper/replacements.h"
 #include "log.h"
 #include "binarybuffer.h"
 
diff --git a/src/helper/bits.h b/src/helper/bits.h
index cdcac9eaf..00d3c0270 100644
--- a/src/helper/bits.h
+++ b/src/helper/bits.h
@@ -24,6 +24,7 @@
 #ifndef OPENOCD_HELPER_BITS_H
 #define OPENOCD_HELPER_BITS_H
 
+#include <helper/replacements.h>
 #include <helper/types.h>
 
 #define BIT(nr)                     (1UL << (nr))
diff --git a/src/helper/configuration.c b/src/helper/configuration.c
index 114ad2c6c..8f4f11833 100644
--- a/src/helper/configuration.c
+++ b/src/helper/configuration.c
@@ -18,12 +18,14 @@
  *   You should have received a copy of the GNU General Public License     *
  *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
+
 #ifdef HAVE_CONFIG_H
 #include "config.h"
 #endif
 
 #include "configuration.h"
 #include "log.h"
+#include "replacements.h"
 
 static size_t num_config_files;
 static char **config_file_names;
diff --git a/src/helper/fileio.c b/src/helper/fileio.c
index 9dd57e72a..b6f1f4e2c 100644
--- a/src/helper/fileio.c
+++ b/src/helper/fileio.c
@@ -29,6 +29,7 @@
 #include "log.h"
 #include "configuration.h"
 #include "fileio.h"
+#include "replacements.h"
 
 struct fileio {
 	char *url;
diff --git a/src/helper/fileio.h b/src/helper/fileio.h
index 02592e28d..16c104657 100644
--- a/src/helper/fileio.h
+++ b/src/helper/fileio.h
@@ -25,6 +25,8 @@
 #ifndef OPENOCD_HELPER_FILEIO_H
 #define OPENOCD_HELPER_FILEIO_H
 
+#include "types.h"
+
 #define FILEIO_MAX_ERROR_STRING		(128)
 
 enum fileio_type {
diff --git a/src/helper/log.c b/src/helper/log.c
index 7440b70f6..f5a80623f 100644
--- a/src/helper/log.c
+++ b/src/helper/log.c
@@ -28,6 +28,7 @@
 
 #include "log.h"
 #include "command.h"
+#include "replacements.h"
 #include "time_support.h"
 
 #include <stdarg.h>
diff --git a/src/helper/options.c b/src/helper/options.c
index 477d7b303..f996749ea 100644
--- a/src/helper/options.c
+++ b/src/helper/options.c
@@ -31,6 +31,7 @@
 
 #include <limits.h>
 #include <stdlib.h>
+#include <string.h>
 #if IS_DARWIN
 #include <libproc.h>
 #endif
diff --git a/src/helper/replacements.c b/src/helper/replacements.c
index b4bb94f06..f4ecb8dfc 100644
--- a/src/helper/replacements.c
+++ b/src/helper/replacements.c
@@ -62,6 +62,7 @@ void *fill_malloc(size_t size)
 
 #ifdef _WIN32
 #include <io.h>
+#include <winsock2.h>
 #endif
 
 /* replacements for gettimeofday */
diff --git a/src/helper/replacements.h b/src/helper/replacements.h
index a0c59a79e..5aecf4182 100644
--- a/src/helper/replacements.h
+++ b/src/helper/replacements.h
@@ -26,6 +26,7 @@
 #define OPENOCD_HELPER_REPLACEMENTS_H
 
 #include <stdint.h>
+#include <helper/system.h>
 
 /* MIN,MAX macros */
 #ifndef MIN
diff --git a/src/helper/system.h b/src/helper/system.h
index 1aaca3b33..0d8be648c 100644
--- a/src/helper/system.h
+++ b/src/helper/system.h
@@ -21,6 +21,15 @@
 #ifndef OPENOCD_HELPER_SYSTEM_H
 #define OPENOCD_HELPER_SYSTEM_H
 
+/* +++ platform specific headers +++ */
+#ifdef _WIN32
+#include <winsock2.h>
+#include <ws2tcpip.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#endif
+/* --- platform specific headers --- */
+
 /* standard C library header files */
 #include <stdio.h>
 #include <stdlib.h>
@@ -34,15 +43,6 @@
 #include <sys/time.h>
 #endif
 
-/* +++ platform specific headers +++ */
-#ifdef _WIN32
-#include <winsock2.h>
-#include <ws2tcpip.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#endif
-/* --- platform specific headers --- */
-
 #ifdef HAVE_SYS_SOCKET_H
 #include <sys/socket.h>
 #endif
diff --git a/src/helper/time_support.h b/src/helper/time_support.h
index a9f2dffad..3c7d4255b 100644
--- a/src/helper/time_support.h
+++ b/src/helper/time_support.h
@@ -26,6 +26,7 @@
 #define OPENOCD_HELPER_TIME_SUPPORT_H
 
 #include <time.h>
+#include "types.h"
 
 #ifdef HAVE_SYS_TIME_H
 #include <sys/time.h>
diff --git a/src/jtag/aice/aice_pipe.c b/src/jtag/aice/aice_pipe.c
index c0e532c9d..5a8cbab78 100644
--- a/src/jtag/aice/aice_pipe.c
+++ b/src/jtag/aice/aice_pipe.c
@@ -19,6 +19,8 @@
 #include "config.h"
 #endif
 
+#include <helper/system.h>
+
 #ifdef _WIN32
 #include <windows.h>
 #else
diff --git a/src/jtag/aice/aice_transport.c b/src/jtag/aice/aice_transport.c
index e3d431b2e..c02a42f3b 100644
--- a/src/jtag/aice/aice_transport.c
+++ b/src/jtag/aice/aice_transport.c
@@ -27,6 +27,7 @@
 #include <target/target.h>
 #include <jtag/aice/aice_interface.h>
 #include <jtag/aice/aice_transport.h>
+#include <string.h>
 
 /* */
 static int jim_newtap_expected_id(Jim_Nvp *n, Jim_GetOptInfo *goi,
diff --git a/src/jtag/aice/aice_usb.c b/src/jtag/aice/aice_usb.c
index 0c219805f..6c452a327 100644
--- a/src/jtag/aice/aice_usb.c
+++ b/src/jtag/aice/aice_usb.c
@@ -19,6 +19,7 @@
 #include "config.h"
 #endif
 
+#include <helper/system.h>
 #include <jtag/drivers/libusb_helper.h>
 #include <helper/log.h>
 #include <helper/time_support.h>
diff --git a/src/jtag/core.c b/src/jtag/core.c
index 6604c5ae8..37924aad0 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -35,6 +35,7 @@
 #include "interface.h"
 #include <transport/transport.h>
 #include <helper/jep106.h>
+#include "helper/system.h"
 
 #ifdef HAVE_STRINGS_H
 #include <strings.h>
diff --git a/src/jtag/drivers/arm-jtag-ew.c b/src/jtag/drivers/arm-jtag-ew.c
index d7afbe24d..62d863191 100644
--- a/src/jtag/drivers/arm-jtag-ew.c
+++ b/src/jtag/drivers/arm-jtag-ew.c
@@ -22,6 +22,7 @@
 
 #include <jtag/interface.h>
 #include <jtag/commands.h>
+#include "helper/system.h"
 #include "libusb_helper.h"
 
 #define USB_VID						0x15ba
diff --git a/src/jtag/drivers/cmsis_dap.c b/src/jtag/drivers/cmsis_dap.c
index fb5c86aec..26e576b8e 100644
--- a/src/jtag/drivers/cmsis_dap.c
+++ b/src/jtag/drivers/cmsis_dap.c
@@ -36,6 +36,7 @@
 #endif
 
 #include <transport/transport.h>
+#include "helper/replacements.h"
 #include <jtag/swd.h>
 #include <jtag/interface.h>
 #include <jtag/commands.h>
diff --git a/src/jtag/drivers/cmsis_dap_usb_bulk.c b/src/jtag/drivers/cmsis_dap_usb_bulk.c
index f535119f3..a588b1bd8 100644
--- a/src/jtag/drivers/cmsis_dap_usb_bulk.c
+++ b/src/jtag/drivers/cmsis_dap_usb_bulk.c
@@ -35,8 +35,10 @@
 #include "config.h"
 #endif
 
+#include <helper/system.h>
 #include <libusb.h>
 #include <helper/log.h>
+#include <helper/replacements.h>
 
 #include "cmsis_dap.h"
 
diff --git a/src/jtag/drivers/cmsis_dap_usb_hid.c b/src/jtag/drivers/cmsis_dap_usb_hid.c
index e83ad1feb..38069f840 100644
--- a/src/jtag/drivers/cmsis_dap_usb_hid.c
+++ b/src/jtag/drivers/cmsis_dap_usb_hid.c
@@ -35,6 +35,7 @@
 #include "config.h"
 #endif
 
+#include <string.h>
 #include <hidapi.h>
 #include <helper/log.h>
 
diff --git a/src/jtag/drivers/ftdi.c b/src/jtag/drivers/ftdi.c
index 8c83d459d..e13977fb0 100644
--- a/src/jtag/drivers/ftdi.c
+++ b/src/jtag/drivers/ftdi.c
@@ -74,6 +74,7 @@
 #include <jtag/swd.h>
 #include <transport/transport.h>
 #include <helper/time_support.h>
+#include <helper/log.h>
 
 #if IS_CYGWIN == 1
 #include <windows.h>
diff --git a/src/jtag/drivers/jlink.c b/src/jtag/drivers/jlink.c
index 15d252cfb..8c1a8116d 100644
--- a/src/jtag/drivers/jlink.c
+++ b/src/jtag/drivers/jlink.c
@@ -39,6 +39,7 @@
 #include <jtag/swd.h>
 #include <jtag/commands.h>
 #include <jtag/drivers/jtag_usb_common.h>
+#include <src/helper/replacements.h>
 #include <target/cortex_m.h>
 
 #include <libjaylink/libjaylink.h>
diff --git a/src/jtag/drivers/jtag_usb_common.c b/src/jtag/drivers/jtag_usb_common.c
index 309f8c462..fdd713783 100644
--- a/src/jtag/drivers/jtag_usb_common.c
+++ b/src/jtag/drivers/jtag_usb_common.c
@@ -4,6 +4,7 @@
  */
 
 #include <helper/log.h>
+#include <string.h>
 
 #include "jtag_usb_common.h"
 
diff --git a/src/jtag/drivers/jtag_usb_common.h b/src/jtag/drivers/jtag_usb_common.h
index 8c03742e9..c4c28cc91 100644
--- a/src/jtag/drivers/jtag_usb_common.h
+++ b/src/jtag/drivers/jtag_usb_common.h
@@ -6,6 +6,9 @@
 #ifndef OPENOCD_JTAG_USB_COMMON_H
 #define OPENOCD_JTAG_USB_COMMON_H
 
+#include <helper/replacements.h>
+#include <helper/types.h>
+
 void jtag_usb_set_location(const char *location);
 const char *jtag_usb_get_location(void);
 bool jtag_usb_location_equal(uint8_t dev_bus, uint8_t *port_path,
diff --git a/src/jtag/drivers/jtag_vpi.c b/src/jtag/drivers/jtag_vpi.c
index c5ffe83ba..aeed6a56c 100644
--- a/src/jtag/drivers/jtag_vpi.c
+++ b/src/jtag/drivers/jtag_vpi.c
@@ -33,7 +33,7 @@
 #include <netinet/tcp.h>
 #endif
 
-#include <string.h>
+#include "helper/replacements.h"
 
 #define NO_TAP_SHIFT	0
 #define TAP_SHIFT	1
diff --git a/src/jtag/drivers/mpsse.c b/src/jtag/drivers/mpsse.c
index 7cda3b816..9ba1e2502 100644
--- a/src/jtag/drivers/mpsse.c
+++ b/src/jtag/drivers/mpsse.c
@@ -22,6 +22,7 @@
 
 #include "mpsse.h"
 #include "helper/log.h"
+#include "helper/replacements.h"
 #include "helper/time_support.h"
 #include <libusb.h>
 
diff --git a/src/jtag/drivers/remote_bitbang.c b/src/jtag/drivers/remote_bitbang.c
index 114e018b7..f7b88303b 100644
--- a/src/jtag/drivers/remote_bitbang.c
+++ b/src/jtag/drivers/remote_bitbang.c
@@ -24,6 +24,8 @@
 #include <sys/un.h>
 #include <netdb.h>
 #endif
+#include "helper/system.h"
+#include "helper/replacements.h"
 #include <jtag/interface.h>
 #include "bitbang.h"
 
diff --git a/src/jtag/drivers/rlink.c b/src/jtag/drivers/rlink.c
index ad629ca68..a88731f4a 100644
--- a/src/jtag/drivers/rlink.c
+++ b/src/jtag/drivers/rlink.c
@@ -29,6 +29,7 @@
 /* project specific includes */
 #include <jtag/interface.h>
 #include <jtag/commands.h>
+#include "helper/replacements.h"
 #include "rlink.h"
 #include "rlink_st7.h"
 #include "rlink_ep1_cmd.h"
diff --git a/src/jtag/drivers/rlink.h b/src/jtag/drivers/rlink.h
index 74b62580c..0c15a3223 100644
--- a/src/jtag/drivers/rlink.h
+++ b/src/jtag/drivers/rlink.h
@@ -19,6 +19,7 @@
 #ifndef OPENOCD_JTAG_DRIVERS_RLINK_H
 #define OPENOCD_JTAG_DRIVERS_RLINK_H
 
+#include "helper/types.h"
 struct rlink_speed_table {
 	uint8_t const *dtc;
 	uint16_t dtc_size;
diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c
index a088a83ee..60a2c319f 100644
--- a/src/jtag/drivers/stlink_usb.c
+++ b/src/jtag/drivers/stlink_usb.c
@@ -35,6 +35,7 @@
 /* project specific includes */
 #include <helper/binarybuffer.h>
 #include <helper/bits.h>
+#include <helper/system.h>
 #include <jtag/interface.h>
 #include <jtag/hla/hla_layout.h>
 #include <jtag/hla/hla_transport.h>
diff --git a/src/jtag/drivers/ulink.c b/src/jtag/drivers/ulink.c
index 096e254fa..fe95e7d18 100644
--- a/src/jtag/drivers/ulink.c
+++ b/src/jtag/drivers/ulink.c
@@ -21,6 +21,7 @@
 #endif
 
 #include <math.h>
+#include "helper/system.h"
 #include <jtag/interface.h>
 #include <jtag/commands.h>
 #include <target/image.h>
diff --git a/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c b/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c
index 4dec89b11..d55bf85cd 100644
--- a/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c
+++ b/src/jtag/drivers/usb_blaster/ublast2_access_libusb.c
@@ -23,6 +23,7 @@
 #endif
 #include <jtag/interface.h>
 #include <jtag/commands.h>
+#include "helper/system.h"
 #include <libusb_helper.h>
 #include <target/image.h>
 
diff --git a/src/jtag/drivers/usb_blaster/usb_blaster.c b/src/jtag/drivers/usb_blaster/usb_blaster.c
index 5002a5f53..c312468b4 100644
--- a/src/jtag/drivers/usb_blaster/usb_blaster.c
+++ b/src/jtag/drivers/usb_blaster/usb_blaster.c
@@ -77,6 +77,7 @@
 #include <jtag/interface.h>
 #include <jtag/commands.h>
 #include <helper/time_support.h>
+#include <helper/replacements.h>
 #include "ublast_access.h"
 
 /* system includes */
diff --git a/src/jtag/drivers/versaloon/versaloon.c b/src/jtag/drivers/versaloon/versaloon.c
index 194a3751c..6fea888ab 100644
--- a/src/jtag/drivers/versaloon/versaloon.c
+++ b/src/jtag/drivers/versaloon/versaloon.c
@@ -19,11 +19,12 @@
 #include "config.h"
 #endif
 
+#include "versaloon_include.h"
+
 #include <stdio.h>
 #include <string.h>
 #include <libusb.h>
 
-#include "versaloon_include.h"
 #include "versaloon.h"
 #include "versaloon_internal.h"
 #include "usbtoxxx/usbtoxxx.h"
diff --git a/src/jtag/drivers/versaloon/versaloon_include.h b/src/jtag/drivers/versaloon/versaloon_include.h
index 901402520..4ca81d5e2 100644
--- a/src/jtag/drivers/versaloon/versaloon_include.h
+++ b/src/jtag/drivers/versaloon/versaloon_include.h
@@ -18,6 +18,7 @@
 #ifndef OPENOCD_JTAG_DRIVERS_VERSALOON_VERSALOON_INCLUDE_H
 #define OPENOCD_JTAG_DRIVERS_VERSALOON_VERSALOON_INCLUDE_H
 
+#include "helper/system.h"
 /* This file is used to include different header and macros */
 /* according to different platform */
 #include <jtag/interface.h>
diff --git a/src/jtag/jtag.h b/src/jtag/jtag.h
index 86091e6a7..feb4614fa 100644
--- a/src/jtag/jtag.h
+++ b/src/jtag/jtag.h
@@ -24,6 +24,7 @@
 
 #include <helper/binarybuffer.h>
 #include <helper/log.h>
+#include <helper/replacements.h>
 
 #ifndef DEBUG_JTAG_IOZ
 #define DEBUG_JTAG_IOZ 64
diff --git a/src/main.c b/src/main.c
index 83e60d8e0..a437b6b4c 100644
--- a/src/main.c
+++ b/src/main.c
@@ -20,6 +20,7 @@
 #include "config.h"
 #endif
 #include "openocd.h"
+#include "helper/system.h"
 
 /* This is the main entry for developer PC hosted OpenOCD.
  *
diff --git a/src/pld/pld.c b/src/pld/pld.c
index 9e8c07d80..66f5d44bc 100644
--- a/src/pld/pld.c
+++ b/src/pld/pld.c
@@ -22,6 +22,7 @@
 
 #include "pld.h"
 #include <helper/log.h>
+#include <helper/replacements.h>
 #include <helper/time_support.h>
 
 
diff --git a/src/pld/xilinx_bit.c b/src/pld/xilinx_bit.c
index f83d8942d..a530ee776 100644
--- a/src/pld/xilinx_bit.c
+++ b/src/pld/xilinx_bit.c
@@ -25,7 +25,7 @@
 #include <helper/log.h>
 
 #include <sys/stat.h>
-
+#include <helper/system.h>
 
 static int read_section(FILE *input_file, int length_size, char section,
 	uint32_t *buffer_length, uint8_t **buffer)
diff --git a/src/pld/xilinx_bit.h b/src/pld/xilinx_bit.h
index 1a35c3be2..625a9d35e 100644
--- a/src/pld/xilinx_bit.h
+++ b/src/pld/xilinx_bit.h
@@ -19,6 +19,8 @@
 #ifndef OPENOCD_PLD_XILINX_BIT_H
 #define OPENOCD_PLD_XILINX_BIT_H
 
+#include "helper/types.h"
+
 struct xilinx_bit_file {
 	uint8_t unknown_header[13];
 	uint8_t *source_file;
diff --git a/src/server/server.c b/src/server/server.c
index e53f37d0b..307266389 100644
--- a/src/server/server.c
+++ b/src/server/server.c
@@ -33,6 +33,7 @@
 #include "openocd.h"
 #include "tcl_server.h"
 #include "telnet_server.h"
+#include "time_support.h"
 
 #include <signal.h>
 
diff --git a/src/server/server.h b/src/server/server.h
index ff2ada9cb..de18d2b4b 100644
--- a/src/server/server.h
+++ b/src/server/server.h
@@ -30,6 +30,7 @@
 #endif
 
 #include <helper/log.h>
+#include <helper/replacements.h>
 
 #ifdef HAVE_NETINET_IN_H
 #include <netinet/in.h>
diff --git a/src/svf/svf.c b/src/svf/svf.c
index 608703434..f35c61314 100644
--- a/src/svf/svf.c
+++ b/src/svf/svf.c
@@ -31,6 +31,7 @@
 
 #include <jtag/jtag.h>
 #include "svf.h"
+#include "helper/system.h"
 #include <helper/time_support.h>
 
 /* SVF command */
diff --git a/src/target/algorithm.h b/src/target/algorithm.h
index 8894241c0..0fc49d069 100644
--- a/src/target/algorithm.h
+++ b/src/target/algorithm.h
@@ -19,6 +19,9 @@
 #ifndef OPENOCD_TARGET_ALGORITHM_H
 #define OPENOCD_TARGET_ALGORITHM_H
 
+#include "helper/types.h"
+#include "helper/replacements.h"
+
 enum param_direction {
 	PARAM_IN,
 	PARAM_OUT,
diff --git a/src/target/armv4_5_cache.h b/src/target/armv4_5_cache.h
index 768938fd1..985a3a770 100644
--- a/src/target/armv4_5_cache.h
+++ b/src/target/armv4_5_cache.h
@@ -19,6 +19,8 @@
 #ifndef OPENOCD_TARGET_ARMV4_5_CACHE_H
 #define OPENOCD_TARGET_ARMV4_5_CACHE_H
 
+#include "helper/types.h"
+
 struct command_invocation;
 
 struct armv4_5_cachesize {
diff --git a/src/target/breakpoints.h b/src/target/breakpoints.h
index 20faf4e6c..8c247f7a9 100644
--- a/src/target/breakpoints.h
+++ b/src/target/breakpoints.h
@@ -21,6 +21,8 @@
 
 #include <stdint.h>
 
+#include "helper/types.h"
+
 struct target;
 
 enum breakpoint_type {
diff --git a/src/target/image.h b/src/target/image.h
index c8d00d1d7..5b5d11f6b 100644
--- a/src/target/image.h
+++ b/src/target/image.h
@@ -29,6 +29,7 @@
 #define OPENOCD_TARGET_IMAGE_H
 
 #include <helper/fileio.h>
+#include <helper/replacements.h>
 
 #ifdef HAVE_ELF_H
 #include <elf.h>
diff --git a/src/target/nds32_edm.h b/src/target/nds32_edm.h
index 1dec190f1..2b5067a34 100644
--- a/src/target/nds32_edm.h
+++ b/src/target/nds32_edm.h
@@ -19,6 +19,8 @@
 #ifndef OPENOCD_TARGET_NDS32_EDM_H
 #define OPENOCD_TARGET_NDS32_EDM_H
 
+#include "helper/types.h"
+
 /**
  * @file
  * This is the interface to the Embedded Debug Module for Andes cores.
diff --git a/src/target/register.h b/src/target/register.h
index 5f1c25fb4..a7705f76e 100644
--- a/src/target/register.h
+++ b/src/target/register.h
@@ -22,6 +22,9 @@
 #ifndef OPENOCD_TARGET_REGISTER_H
 #define OPENOCD_TARGET_REGISTER_H
 
+#include "helper/replacements.h"
+#include "helper/types.h"
+
 struct target;
 
 enum reg_type {
diff --git a/src/target/semihosting_common.h b/src/target/semihosting_common.h
index 8fb5e0c3a..b83464ed5 100644
--- a/src/target/semihosting_common.h
+++ b/src/target/semihosting_common.h
@@ -25,6 +25,7 @@
 #include <stdint.h>
 #include <stdbool.h>
 #include <time.h>
+#include "helper/replacements.h"
 
 /*
  * According to:
diff --git a/src/target/target.h b/src/target/target.h
index b9ae2f78e..046bd99ae 100644
--- a/src/target/target.h
+++ b/src/target/target.h
@@ -32,6 +32,8 @@
 #define OPENOCD_TARGET_TARGET_H
 
 #include <helper/list.h>
+#include "helper/replacements.h"
+#include "helper/system.h"
 #include <jim.h>
 
 struct reg;
diff --git a/src/target/trace.h b/src/target/trace.h
index 2966bbd94..45308c0d8 100644
--- a/src/target/trace.h
+++ b/src/target/trace.h
@@ -19,6 +19,8 @@
 #ifndef OPENOCD_TARGET_TRACE_H
 #define OPENOCD_TARGET_TRACE_H
 
+#include "helper/types.h"
+
 struct target;
 struct command_context;
 
diff --git a/src/transport/transport.c b/src/transport/transport.c
index cb000ab11..ba1f9e9f7 100644
--- a/src/transport/transport.c
+++ b/src/transport/transport.c
@@ -42,6 +42,7 @@
  */
 
 #include <helper/log.h>
+#include <helper/replacements.h>
 #include <transport/transport.h>
 
 extern struct command_context *global_cmd_ctx;
diff --git a/src/xsvf/xsvf.c b/src/xsvf/xsvf.c
index eaa5a3aae..2a7b56dbf 100644
--- a/src/xsvf/xsvf.c
+++ b/src/xsvf/xsvf.c
@@ -39,6 +39,7 @@
 #endif
 
 #include "xsvf.h"
+#include "helper/system.h"
 #include <jtag/jtag.h>
 #include <svf/svf.h>
 

-----------------------------------------------------------------------

Summary of changes:
 configure.ac                                         |  5 -----
 src/flash/common.h                                   |  1 +
 src/flash/nor/bluenrg-x.c                            |  1 +
 src/helper/binarybuffer.c                            |  1 +
 src/helper/bits.h                                    |  1 +
 src/helper/configuration.c                           |  2 ++
 src/helper/fileio.c                                  |  1 +
 src/helper/fileio.h                                  |  2 ++
 src/helper/log.c                                     |  1 +
 src/helper/options.c                                 |  1 +
 src/helper/replacements.c                            |  1 +
 src/helper/replacements.h                            |  1 +
 src/helper/system.h                                  | 18 +++++++++---------
 src/helper/time_support.h                            |  1 +
 src/jtag/aice/aice_pipe.c                            |  2 ++
 src/jtag/aice/aice_transport.c                       |  1 +
 src/jtag/aice/aice_usb.c                             |  1 +
 src/jtag/core.c                                      |  1 +
 src/jtag/drivers/arm-jtag-ew.c                       |  1 +
 src/jtag/drivers/cmsis_dap.c                         |  1 +
 src/jtag/drivers/cmsis_dap_usb_bulk.c                |  2 ++
 src/jtag/drivers/cmsis_dap_usb_hid.c                 |  1 +
 src/jtag/drivers/ftdi.c                              |  1 +
 src/jtag/drivers/jlink.c                             |  1 +
 src/jtag/drivers/jtag_usb_common.c                   |  1 +
 src/jtag/drivers/jtag_usb_common.h                   |  3 +++
 src/jtag/drivers/jtag_vpi.c                          |  2 +-
 src/jtag/drivers/mpsse.c                             |  1 +
 src/jtag/drivers/remote_bitbang.c                    |  2 ++
 src/jtag/drivers/rlink.c                             |  1 +
 src/jtag/drivers/rlink.h                             |  1 +
 src/jtag/drivers/stlink_usb.c                        |  1 +
 src/jtag/drivers/ulink.c                             |  1 +
 src/jtag/drivers/usb_blaster/ublast2_access_libusb.c |  1 +
 src/jtag/drivers/usb_blaster/usb_blaster.c           |  1 +
 src/jtag/drivers/versaloon/versaloon.c               |  3 ++-
 src/jtag/drivers/versaloon/versaloon_include.h       |  1 +
 src/jtag/jtag.h                                      |  1 +
 src/main.c                                           |  1 +
 src/pld/pld.c                                        |  1 +
 src/pld/xilinx_bit.c                                 |  2 +-
 src/pld/xilinx_bit.h                                 |  2 ++
 src/server/server.c                                  |  1 +
 src/server/server.h                                  |  1 +
 src/svf/svf.c                                        |  1 +
 src/target/algorithm.h                               |  3 +++
 src/target/armv4_5_cache.h                           |  2 ++
 src/target/breakpoints.h                             |  2 ++
 src/target/image.h                                   |  1 +
 src/target/nds32_edm.h                               |  2 ++
 src/target/register.h                                |  3 +++
 src/target/semihosting_common.h                      |  1 +
 src/target/target.h                                  |  2 ++
 src/target/trace.h                                   |  2 ++
 src/transport/transport.c                            |  1 +
 src/xsvf/xsvf.c                                      |  1 +
 56 files changed, 81 insertions(+), 17 deletions(-)


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commit b44948985f080df55adeb9377596432fff3c50d6
Author: Luis de Arquer <lui...@in...>
Date:   Wed Mar 24 17:12:14 2021 +0100

    drivers/ftdi: drscan: Skip DR-PAUSE when endstate == IDLE
    
    Currently, all drscan commands will cycle through DR-PAUSE before reaching
    TAP-IDLE. This patch provides a different path on FTDI driver.
    
    This change is required for the ST On Chip Emulator (OnCE), to avoid
    re-enabling the OnCE tap after every DRSCAN. This is because the OnCE
    TAP (see ST Application Note AN4035) gets disabled if DR-PAUSE is entered
    before DR-UPDATE.
    
    With this commit, the current path:
    
    DR-SHIFT -> DR-EXIT1 -> DR-PAUSE -> DR-EXIT2 -> DR-UPDATE -> IDLE
    
    is changed to:
    
    DR-SHIFT -> DR-EXIT1 -> DR-UPDATE -> IDLE
    
    only if IDLE is the endstate (which is the driver default).
    
    Before this patch, once the SHIFT sequence is complete, the driver would
    normally move to the nearest stable state, which is DR-PAUSE, by clocking
    out a '10' binary sequence. Then it would follow the path provided by
    tap_get_tms_path() to reach endstate. It is done this way because
    tap_get_tms_path() only supports stable states.
    
    After this patch, the strategy is mostly the same, with the exception that,
    if TAP_IDLE is the endstate, a '110' binary sequence is output after completing
    the SHIFT sequence. This takes the TAP directly to IDLE, with no further action
    required.
    
    A scheme of the DR chain is shown below. A * character is used to mark the
    stable states.
    
     ----------------------------------------------------------------------
     |                                                                    | 0
     v    1         0          0         1        0         1        1    |
    IDLE* -> SEL-DR -> CAPTURE -> SHIFT* -> EXIT1 -> PAUSE* -> EXIT2 -> UPDATE
                                              |                           ^
                                            1 |                           |
                                              -----------------------------
    
    Change-Id: Ib413e5c4c0bbf75dae0b4672119bae4ef03d0258
    Signed-off-by: Luis de Arquer <lui...@in...>
    Reviewed-on: http://openocd.zylin.com/6123
    Tested-by: jenkins
    Reviewed-by: Christopher Head <ch...@za...>
    Reviewed-by: Oleksij Rempel <li...@re...>
    Reviewed-by: Andreas Fritiofson <and...@gm...>

diff --git a/src/jtag/drivers/ftdi.c b/src/jtag/drivers/ftdi.c
index 9e47d3cad..8c83d459d 100644
--- a/src/jtag/drivers/ftdi.c
+++ b/src/jtag/drivers/ftdi.c
@@ -482,7 +482,11 @@ static void ftdi_execute_scan(struct jtag_command *cmd)
 			uint8_t last_bit = 0;
 			if (field->out_value)
 				bit_copy(&last_bit, 0, field->out_value, field->num_bits - 1, 1);
-			uint8_t tms_bits = 0x01;
+
+			/* If endstate is TAP_IDLE, clock out 1-1-0 (->EXIT1 ->UPDATE ->IDLE)
+			 * Otherwise, clock out 1-0 (->EXIT1 ->PAUSE)
+			 */
+			uint8_t tms_bits = 0x03;
 			mpsse_clock_tms_cs(mpsse_ctx,
 					&tms_bits,
 					0,
@@ -492,13 +496,24 @@ static void ftdi_execute_scan(struct jtag_command *cmd)
 					last_bit,
 					ftdi_jtag_mode);
 			tap_set_state(tap_state_transition(tap_get_state(), 1));
-			mpsse_clock_tms_cs_out(mpsse_ctx,
-					&tms_bits,
-					1,
-					1,
-					last_bit,
-					ftdi_jtag_mode);
-			tap_set_state(tap_state_transition(tap_get_state(), 0));
+			if (tap_get_end_state() == TAP_IDLE) {
+				mpsse_clock_tms_cs_out(mpsse_ctx,
+						&tms_bits,
+						1,
+						2,
+						last_bit,
+						ftdi_jtag_mode);
+				tap_set_state(tap_state_transition(tap_get_state(), 1));
+				tap_set_state(tap_state_transition(tap_get_state(), 0));
+			} else {
+				mpsse_clock_tms_cs_out(mpsse_ctx,
+						&tms_bits,
+						2,
+						1,
+						last_bit,
+						ftdi_jtag_mode);
+				tap_set_state(tap_state_transition(tap_get_state(), 0));
+			}
 		} else
 			mpsse_clock_data(mpsse_ctx,
 				field->out_value,

-----------------------------------------------------------------------

Summary of changes:
 src/jtag/drivers/ftdi.c | 31 +++++++++++++++++++++++--------
 1 file changed, 23 insertions(+), 8 deletions(-)


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- Log -----------------------------------------------------------------
commit d10141ef07644fc6a39211d60e811a868d91c575
Author: Tarek BOCHKATI <tar...@gm...>
Date:   Thu Mar 11 03:38:54 2021 +0100

    telnet: auto-completion of "registered" commands
    
    auto-completion behavior:
    - if there is only one matched command complete the user-command
    - else if multiple matches add the common part then in second step
      list all matched commands
    - sub-commands are handled in the same way
    - auto-completion restarts after these characters ';', '[', '{'
    
    Change-Id: I1b81dd19191a5785e68d0bb5cd244e01a4dd0587
    Signed-off-by: Tarek BOCHKATI <tar...@gm...>
    Reviewed-on: http://openocd.zylin.com/6095
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/server/telnet_server.c b/src/server/telnet_server.c
index e9de4f033..d5e0353c8 100644
--- a/src/server/telnet_server.c
+++ b/src/server/telnet_server.c
@@ -29,6 +29,7 @@
 #include "telnet_server.h"
 #include <target/target_request.h>
 #include <helper/configuration.h>
+#include <helper/list.h>
 
 static char *telnet_port;
 
@@ -58,6 +59,13 @@ static int telnet_write(struct connection *connection, const void *data,
 	return ERROR_SERVER_REMOTE_CLOSED;
 }
 
+/* output an audible bell */
+static int telnet_bell(struct connection *connection)
+{
+	/* ("\a" does not work, at least on windows) */
+	return telnet_write(connection, "\x07", 1);
+}
+
 static int telnet_prompt(struct connection *connection)
 {
 	struct telnet_connection *t_con = connection->priv;
@@ -366,6 +374,217 @@ static void telnet_move_cursor(struct connection *connection, size_t pos)
 	tc->line_cursor = pos;
 }
 
+/* check buffer size leaving one spare character for string null termination */
+static inline bool telnet_can_insert(struct connection *connection, size_t len)
+{
+	struct telnet_connection *t_con = connection->priv;
+
+	return t_con->line_size + len < TELNET_LINE_MAX_SIZE;
+}
+
+/* write to telnet console, and update the telnet_connection members
+ * this function is capable of inserting in the middle of a line
+ * please ensure that data does not contain special characters (\n, \r, \t, \b ...)
+ *
+ * returns false when it fails to insert the requested data
+ */
+static bool telnet_insert(struct connection *connection, const void *data, size_t len)
+{
+	struct telnet_connection *t_con = connection->priv;
+
+	if (!telnet_can_insert(connection, len)) {
+		telnet_bell(connection);
+		return false;
+	}
+
+	if (t_con->line_cursor < t_con->line_size) {
+		/* we have some content after the cursor */
+		memmove(t_con->line + t_con->line_cursor + len,
+				t_con->line + t_con->line_cursor,
+				t_con->line_size - t_con->line_cursor);
+	}
+
+	strncpy(t_con->line + t_con->line_cursor, data, len);
+
+	telnet_write(connection,
+			t_con->line + t_con->line_cursor,
+			t_con->line_size + len - t_con->line_cursor);
+
+	t_con->line_size += len;
+	t_con->line_cursor += len;
+
+	for (size_t i = t_con->line_cursor; i < t_con->line_size; i++)
+		telnet_write(connection, "\b", 1);
+
+	return true;
+}
+
+static void telnet_auto_complete(struct connection *connection)
+{
+	struct telnet_connection *t_con = connection->priv;
+	struct command_context *command_context = connection->cmd_ctx;
+
+	struct cmd_match {
+		char *cmd;
+		struct list_head lh;
+	};
+
+	LIST_HEAD(matches);
+
+	/* user command sequence, either at line beginning
+	 * or we start over after these characters ';', '[', '{' */
+	size_t seq_start = (t_con->line_cursor == 0) ? 0 : (t_con->line_cursor - 1);
+	while (seq_start > 0) {
+		char c = t_con->line[seq_start];
+		if (c == ';' || c == '[' || c == '{') {
+			seq_start++;
+			break;
+		}
+
+		seq_start--;
+	}
+
+	/* user command position in the line, ignore leading spaces */
+	size_t usr_cmd_pos = seq_start;
+	while ((usr_cmd_pos < t_con->line_cursor) && isspace(t_con->line[usr_cmd_pos]))
+		usr_cmd_pos++;
+
+	/* user command length */
+	size_t usr_cmd_len = t_con->line_cursor - usr_cmd_pos;
+
+	/* optimize multiple spaces in the user command,
+	 * because info commands does not tolerate multiple spaces */
+	size_t optimized_spaces = 0;
+	char query[usr_cmd_len + 1];
+	for (size_t i = 0; i < usr_cmd_len; i++) {
+		if ((i < usr_cmd_len - 1) && isspace(t_con->line[usr_cmd_pos + i])
+				&& isspace(t_con->line[usr_cmd_pos + i + 1])) {
+			optimized_spaces++;
+			continue;
+		}
+
+		query[i - optimized_spaces] = t_con->line[usr_cmd_pos + i];
+	}
+
+	usr_cmd_len -= optimized_spaces;
+	query[usr_cmd_len] = '\0';
+
+	/* filter commands */
+	char *query_cmd = alloc_printf("lsort [info commands {%s*}]", query);
+
+	if (!query_cmd) {
+		LOG_ERROR("Out of memory");
+		return;
+	}
+
+	int retval = Jim_EvalSource(command_context->interp, __FILE__, __LINE__, query_cmd);
+	free(query_cmd);
+	if (retval != JIM_OK)
+		return;
+
+	Jim_Obj *list = Jim_GetResult(command_context->interp);
+	Jim_IncrRefCount(list);
+
+	/* common prefix length of the matched commands */
+	size_t common_len = 0;
+	char *first_match = NULL; /* used to compute the common prefix length */
+
+	int len = Jim_ListLength(command_context->interp, list);
+	for (int i = 0; i < len; i++) {
+		Jim_Obj *elem = Jim_ListGetIndex(command_context->interp, list, i);
+		Jim_IncrRefCount(elem);
+
+		char *name = (char *)Jim_GetString(elem, NULL);
+
+		/* validate the command */
+		bool ignore_cmd = false;
+		Jim_Cmd *jim_cmd = Jim_GetCommand(command_context->interp, elem, JIM_NONE);
+
+		if (!jim_cmd)
+			ignore_cmd = true;
+		else {
+			if (!jim_cmd->isproc) {
+				/* ignore commands without handler
+				 * and those with COMMAND_CONFIG mode */
+				/* FIXME it's better to use jimcmd_is_ocd_command(jim_cmd)
+				 * or command_find_from_name(command_context->interp, name) */
+				struct command *cmd = jim_cmd->u.native.privData;
+				if (!cmd)
+					ignore_cmd = true;
+				/* make Valgrind happy by checking that cmd is not NULL  */
+				else if (cmd != NULL && !cmd->handler && !cmd->jim_handler)
+					ignore_cmd = true;
+				else if (cmd != NULL && cmd->mode == COMMAND_CONFIG)
+					ignore_cmd = true;
+			}
+		}
+
+		/* save the command in the prediction list */
+		if (!ignore_cmd) {
+			struct cmd_match *match = calloc(1, sizeof(struct cmd_match));
+			if (!match) {
+				LOG_ERROR("Out of memory");
+				Jim_DecrRefCount(command_context->interp, elem);
+				break; /* break the for loop */
+			}
+
+			if (list_empty(&matches)) {
+				common_len = strlen(name);
+				first_match = name;
+			} else {
+				size_t new_common_len = usr_cmd_len; /* save some loops */
+
+				while (new_common_len < common_len && first_match[new_common_len] == name[new_common_len])
+					new_common_len++;
+
+				common_len = new_common_len;
+			}
+
+			match->cmd = name;
+			list_add_tail(&match->lh, &matches);
+		}
+
+		Jim_DecrRefCount(command_context->interp, elem);
+	}
+	/* end of command filtering */
+
+	/* proceed with auto-completion */
+	if (list_empty(&matches))
+		telnet_bell(connection);
+	else if (common_len == usr_cmd_len && list_is_singular(&matches) && t_con->line_cursor == t_con->line_size)
+		telnet_insert(connection, " ", 1);
+	else if (common_len > usr_cmd_len) {
+		int completion_size = common_len - usr_cmd_len;
+		if (telnet_insert(connection, first_match + usr_cmd_len, completion_size)) {
+			/* in bash this extra space is only added when the cursor in at the end of line */
+			if (list_is_singular(&matches) && t_con->line_cursor == t_con->line_size)
+				telnet_insert(connection, " ", 1);
+		}
+	} else if (!list_is_singular(&matches)) {
+		telnet_write(connection, "\n\r", 2);
+
+		struct cmd_match *match;
+		list_for_each_entry(match, &matches, lh) {
+			telnet_write(connection, match->cmd, strlen(match->cmd));
+			telnet_write(connection, "\n\r", 2);
+		}
+
+		telnet_prompt(connection);
+		telnet_write(connection, t_con->line, t_con->line_size);
+
+		/* restore the terminal visible cursor location */
+		for (size_t i = t_con->line_cursor; i < t_con->line_size; i++)
+			telnet_write(connection, "\b", 1);
+	}
+
+	/* destroy the command_list */
+	struct cmd_match *tmp, *match;
+	list_for_each_entry_safe(match, tmp, &matches, lh)
+		free(match);
+
+	Jim_DecrRefCount(command_context->interp, list);
+}
+
 static int telnet_input(struct connection *connection)
 {
 	int bytes_read;
@@ -391,30 +610,7 @@ static int telnet_input(struct connection *connection)
 					t_con->state = TELNET_STATE_IAC;
 				else {
 					if (isprint(*buf_p)) {	/* printable character */
-						/* watch buffer size leaving one spare character for
-						 * string null termination */
-						if (t_con->line_size == TELNET_LINE_MAX_SIZE-1) {
-							/* output audible bell if buffer is full
-							 * "\a" does not work, at least on windows */
-							telnet_write(connection, "\x07", 1);
-						} else if (t_con->line_cursor == t_con->line_size) {
-							telnet_write(connection, buf_p, 1);
-							t_con->line[t_con->line_size++] = *buf_p;
-							t_con->line_cursor++;
-						} else {
-							size_t i;
-							memmove(t_con->line + t_con->line_cursor + 1,
-									t_con->line + t_con->line_cursor,
-									t_con->line_size - t_con->line_cursor);
-							t_con->line[t_con->line_cursor] = *buf_p;
-							t_con->line_size++;
-							telnet_write(connection,
-									t_con->line + t_con->line_cursor,
-									t_con->line_size - t_con->line_cursor);
-							t_con->line_cursor++;
-							for (i = t_con->line_cursor; i < t_con->line_size; i++)
-								telnet_write(connection, "\b", 1);
-						}
+						telnet_insert(connection, buf_p, 1);
 					} else {	/* non-printable */
 						if (*buf_p == 0x1b) {	/* escape */
 							t_con->state = TELNET_STATE_ESCAPE;
@@ -548,7 +744,9 @@ static int telnet_input(struct connection *connection)
 								t_con->line[t_con->line_cursor] = '\0';
 								t_con->line_size = t_con->line_cursor;
 							}
-						} else
+						} else if (*buf_p == '\t')
+							telnet_auto_complete(connection);
+						else
 							LOG_DEBUG("unhandled nonprintable: %2.2x", *buf_p);
 					}
 				}

-----------------------------------------------------------------------

Summary of changes:
 src/server/telnet_server.c | 248 ++++++++++++++++++++++++++++++++++++++++-----
 1 file changed, 223 insertions(+), 25 deletions(-)


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- Log -----------------------------------------------------------------
commit ffdb2f3d1ac99dc5c7558fa1e0f1528a756ebda4
Author: Jiri Kastner <cz1...@gm...>
Date:   Fri Apr 30 07:43:36 2021 +0200

    udev rules: add OSBDM device
    
    Change-Id: I7221a6b3fe6fcd4f17ea664c10fd32c645e21d7c
    Signed-off-by: Jiri Kastner <cz1...@gm...>
    Reviewed-on: http://openocd.zylin.com/6198
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/contrib/60-openocd.rules b/contrib/60-openocd.rules
index a3046be8f..1829f076c 100644
--- a/contrib/60-openocd.rules
+++ b/contrib/60-openocd.rules
@@ -154,6 +154,11 @@ ATTRS{idVendor}=="138e", ATTRS{idProduct}=="9000", MODE="660", GROUP="plugdev",
 # Debug Board for Neo1973
 ATTRS{idVendor}=="1457", ATTRS{idProduct}=="5118", MODE="660", GROUP="plugdev", TAG+="uaccess"
 
+# OSBDM
+ATTRS{idVendor}=="15a2", ATTRS{idProduct}=="0042", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="15a2", ATTRS{idProduct}=="0058", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="15a2", ATTRS{idProduct}=="005e", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
 # Olimex ARM-USB-OCD
 ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="0003", MODE="660", GROUP="plugdev", TAG+="uaccess"
 

-----------------------------------------------------------------------

Summary of changes:
 contrib/60-openocd.rules | 5 +++++
 1 file changed, 5 insertions(+)


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commit 1e5782a09a149fe106fa2e574482108f730e4beb
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Apr 25 23:15:36 2021 +0200

    jtag: simplify the calls to Jim_SetResultFormatted()
    
    The documentation of Jim_SetResultFormatted() reports that the jim
    objects passed as arguments would be freed if have zero refcount.
    
    Remove the useless Jim_IncrRefCount()/Jim_DecrRefCount().
    Remove the dangerous Jim_FreeNewObj() that should trigger a double
    free(). Not tested due to lack of aice adapter.
    
    While there, rename some CamelCase symbol.
    
    Change-Id: Ic56704c83d6391c38f6b0efa6566784d453bc0fb
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: http://openocd.zylin.com/6190
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/jtag/aice/aice_transport.c b/src/jtag/aice/aice_transport.c
index ea710ad25..e3d431b2e 100644
--- a/src/jtag/aice/aice_transport.c
+++ b/src/jtag/aice/aice_transport.c
@@ -255,9 +255,8 @@ static int jim_aice_arp_init_reset(Jim_Interp *interp, int argc, Jim_Obj * const
 	e = aice_init_reset(context);
 
 	if (e != ERROR_OK) {
-		Jim_Obj *eObj = Jim_NewIntObj(goi.interp, e);
-		Jim_SetResultFormatted(goi.interp, "error: %#s", eObj);
-		Jim_FreeNewObj(goi.interp, eObj);
+		Jim_Obj *obj = Jim_NewIntObj(goi.interp, e);
+		Jim_SetResultFormatted(goi.interp, "error: %#s", obj);
 		return JIM_ERR;
 	}
 	return JIM_OK;
diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c
index 3e7333515..8a52c0f18 100644
--- a/src/jtag/tcl.c
+++ b/src/jtag/tcl.c
@@ -687,10 +687,8 @@ static int jim_jtag_arp_init(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
 	struct command_context *context = current_command_context(interp);
 	int e = jtag_init_inner(context);
 	if (e != ERROR_OK) {
-		Jim_Obj *eObj = Jim_NewIntObj(goi.interp, e);
-		Jim_IncrRefCount(eObj);
-		Jim_SetResultFormatted(goi.interp, "error: %#s", eObj);
-		Jim_DecrRefCount(goi.interp, eObj);
+		Jim_Obj *obj = Jim_NewIntObj(goi.interp, e);
+		Jim_SetResultFormatted(goi.interp, "error: %#s", obj);
 		return JIM_ERR;
 	}
 	return JIM_OK;
@@ -712,10 +710,8 @@ static int jim_jtag_arp_init_reset(Jim_Interp *interp, int argc, Jim_Obj *const
 		e = swd_init_reset(context);
 
 	if (e != ERROR_OK) {
-		Jim_Obj *eObj = Jim_NewIntObj(goi.interp, e);
-		Jim_IncrRefCount(eObj);
-		Jim_SetResultFormatted(goi.interp, "error: %#s", eObj);
-		Jim_DecrRefCount(goi.interp, eObj);
+		Jim_Obj *obj = Jim_NewIntObj(goi.interp, e);
+		Jim_SetResultFormatted(goi.interp, "error: %#s", obj);
 		return JIM_ERR;
 	}
 	return JIM_OK;

commit 4622a95fcc470d0c1a086ba046abe1f63b139750
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Apr 25 20:44:27 2021 +0200

    helper/command: drop the TCL variable 'ocd_HOSTOS'
    
    Commit 7a731eb63731 ("Added HostOS variable"), merged in 2009,
    adds a TCL global variable 'ocd_HostOS' that reports in a string
    the OS of the host.
    This was proposed as a workaround for jimtcl that didn't define
    the standard TCL variable 'tcl_platform(os)'.
    
    With commit 42f3fb7b7f46 ("Determine platform_tcl() settings with
    configure"), merged in 2010 and part of jimtcl 0.70 issued in
    early 2011, jimtcl provides the requires TCL standard variable
    'tcl_platform(os)'.
    
    The variable 'ocd_HostOS' has never been used by any TCL script
    distributed with OpenOCD.
    
    Drop the TCL variable 'ocd_HostOS'.
    
    Change-Id: I27858de35cc9d30df97145ca1ccd24877be4af11
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: http://openocd.zylin.com/6189
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/doc/openocd.texi b/doc/openocd.texi
index c39e7c168..d71731138 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -11087,34 +11087,6 @@ OpenOCD commands can consist of two words, e.g. "flash banks". The
 @file{startup.tcl} "unknown" proc will translate this into a Tcl proc
 called "flash_banks".
 
-@section OpenOCD specific Global Variables
-
-Real Tcl has ::tcl_platform(), and platform::identify, and many other
-variables. JimTCL, as implemented in OpenOCD creates $ocd_HOSTOS which
-holds one of the following values:
-
-@itemize @bullet
-@item @b{cygwin}   Running under Cygwin
-@item @b{darwin}   Darwin (Mac-OS) is the underlying operating system.
-@item @b{freebsd}  Running under FreeBSD
-@item @b{openbsd}  Running under OpenBSD
-@item @b{netbsd}   Running under NetBSD
-@item @b{linux}    Linux is the underlying operating system
-@item @b{mingw32}  Running under MingW32
-@item @b{winxx}    Built using Microsoft Visual Studio
-@item @b{ecos}     Running under eCos
-@item @b{other}    Unknown, none of the above.
-@end itemize
-
-Note: 'winxx' was chosen because today (March-2009) no distinction is made between Win32 and Win64.
-
-@quotation Note
-We should add support for a variable like Tcl variable
-@code{tcl_platform(platform)}, it should be called
-@code{jim_platform} (because it
-is jim, not real tcl).
-@end quotation
-
 @section Tcl RPC server
 @cindex RPC
 
diff --git a/src/helper/command.c b/src/helper/command.c
index 08d14b47f..0c6e785f2 100644
--- a/src/helper/command.c
+++ b/src/helper/command.c
@@ -1277,7 +1277,6 @@ static const struct command_registration command_builtin_handlers[] = {
 struct command_context *command_init(const char *startup_tcl, Jim_Interp *interp)
 {
 	struct command_context *context = calloc(1, sizeof(struct command_context));
-	const char *HostOs;
 
 	context->mode = COMMAND_EXEC;
 
@@ -1296,39 +1295,6 @@ struct command_context *command_init(const char *startup_tcl, Jim_Interp *interp
 
 	context->interp = interp;
 
-	/* Stick to lowercase for HostOS strings. */
-#if defined(_MSC_VER)
-	/* WinXX - is generic, the forward
-	 * looking problem is this:
-	 *
-	 *   "win32" or "win64"
-	 *
-	 * "winxx" is generic.
-	 */
-	HostOs = "winxx";
-#elif defined(__linux__)
-	HostOs = "linux";
-#elif defined(__APPLE__) || defined(__DARWIN__)
-	HostOs = "darwin";
-#elif defined(__CYGWIN__)
-	HostOs = "cygwin";
-#elif defined(__MINGW32__)
-	HostOs = "mingw32";
-#elif defined(__ECOS)
-	HostOs = "ecos";
-#elif defined(__FreeBSD__)
-	HostOs = "freebsd";
-#elif defined(__NetBSD__)
-	HostOs = "netbsd";
-#elif defined(__OpenBSD__)
-	HostOs = "openbsd";
-#else
-#warning "Unrecognized host OS..."
-	HostOs = "other";
-#endif
-	Jim_SetGlobalVariableStr(interp, "ocd_HOSTOS",
-		Jim_NewStringObj(interp, HostOs, strlen(HostOs)));
-
 	register_commands(context, NULL, command_builtin_handlers);
 
 	Jim_SetAssocData(interp, "context", NULL, context);

commit 89c6b93ba278e26113aadcc3b7d357e05264beba
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Apr 25 20:38:58 2021 +0200

    helper/command: fix memory leak on malloc() fail
    
    If malloc() fails, the just allocated Jim_Obj will leaks.
    
    Move Jim_IncrRefCount() before the malloc() and deallocate the Jim
    object with Jim_DecrRefCount() on malloc() fail.
    
    While there, add the 'out of memory' log and fix the CamelCase
    name of the symbol tclOutput.
    
    Change-Id: Ic733db229d5aa5d477d758ea9cb88cd81d7542cd
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: http://openocd.zylin.com/6188
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/helper/command.c b/src/helper/command.c
index e703be400..08d14b47f 100644
--- a/src/helper/command.c
+++ b/src/helper/command.c
@@ -83,17 +83,21 @@ static struct log_capture_state *command_log_capture_start(Jim_Interp *interp)
 {
 	/* capture log output and return it. A garbage collect can
 	 * happen, so we need a reference count to this object */
-	Jim_Obj *tclOutput = Jim_NewStringObj(interp, "", 0);
-	if (NULL == tclOutput)
+	Jim_Obj *jim_output = Jim_NewStringObj(interp, "", 0);
+	if (!jim_output)
 		return NULL;
 
+	Jim_IncrRefCount(jim_output);
+
 	struct log_capture_state *state = malloc(sizeof(*state));
-	if (NULL == state)
+	if (!state) {
+		LOG_ERROR("Out of memory");
+		Jim_DecrRefCount(interp, jim_output);
 		return NULL;
+	}
 
 	state->interp = interp;
-	Jim_IncrRefCount(tclOutput);
-	state->output = tclOutput;
+	state->output = jim_output;
 
 	log_add_callback(tcl_output, state);
 

-----------------------------------------------------------------------

Summary of changes:
 doc/openocd.texi               | 28 ------------------------
 src/helper/command.c           | 48 ++++++++----------------------------------
 src/jtag/aice/aice_transport.c |  5 ++---
 src/jtag/tcl.c                 | 12 ++++-------
 4 files changed, 15 insertions(+), 78 deletions(-)


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- Log -----------------------------------------------------------------
commit f18a801e03e50274676544d10029c05e1f219246
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Apr 25 20:07:35 2021 +0200

    helper/jim-nvp: remove unused function Jim_nvpInit()
    
    The files jim-nvp.[ch] were originally inside jimtcl, then in 2011
    they were dropped by jimtcl and integrated in OpenOCD.
    The initial purpose was to make them as an independent library,
    thus the presence of an 'init' function. Being now part of OpenOCD
    do not require the 'init' function anymore, that is still empty
    and unused, plus its name is in violation of the coding style.
    
    Drop the function Jim_nvpInit().
    
    Change-Id: I429e10444c86a26dbdc22aa071315324dc5edc3e
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: http://openocd.zylin.com/6187
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/helper/jim-nvp.c b/src/helper/jim-nvp.c
index d13bdfba4..2caf18bce 100644
--- a/src/helper/jim-nvp.c
+++ b/src/helper/jim-nvp.c
@@ -333,9 +333,3 @@ const char *Jim_Debug_ArgvString(Jim_Interp *interp, int argc, Jim_Obj *const *a
 
 	return Jim_String(debug_string_obj);
 }
-
-int Jim_nvpInit(Jim_Interp *interp)
-{
-	/* This is really a helper library, not an extension, but this is the easy way */
-	return JIM_OK;
-}

commit 3c73cca1e09c92b13c77b903fb39ef9386e07fd9
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Apr 25 15:47:28 2021 +0200

    helper/types: remove type '_Bool'
    
    Accordingly to OpenOCD coding style, both typedef and Camelcase
    symbols are forbidden.
    The type '_Bool' is not used in the code, having 'bool' as
    preferred choice.
    
    Remove the definition of '_Bool' from 'types.h'.
    
    Change-Id: I8863f9836ccd9166e0c69fa5d75d6fef79ae7bfb
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: http://openocd.zylin.com/6186
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/helper/types.h b/src/helper/types.h
index f3d5e04a3..010529ffc 100644
--- a/src/helper/types.h
+++ b/src/helper/types.h
@@ -47,16 +47,10 @@
 #ifndef __cplusplus
 
 #define false	0
-#define true		1
+#define true	1
 
-typedef int _Bool;
-#else
-typedef bool _Bool;
 #endif	/* __cplusplus */
 #endif	/* HAVE__BOOL */
-
-#define bool _Bool
-
 #endif	/* HAVE_STDBOOL_H */
 
 /// turns a macro argument into a string constant

commit ae86bd8e18047ab586e9ac4ca2eafd0bb008ae87
Author: Antonio Borneo <bor...@gm...>
Date:   Thu Apr 22 12:06:04 2021 +0200

    helper/replacements: remove unused typedef's
    
    The ELF typedef's 'Elf32_Sword' and 'Elf32_Hashelt' are not used
    within OpenOCD. Plus, being their name in CamelCase require extra
    effort to include them in the exceptions for checkpatch.
    
    Remove the unused typedef's.
    
    Change-Id: I18f039567edd5b24dbb41df5406c154f31022ae7
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: http://openocd.zylin.com/6178
    Tested-by: jenkins
    Reviewed-by: Christian Hoff <chr...@ad...>

diff --git a/src/helper/replacements.h b/src/helper/replacements.h
index fff2dde0e..a0c59a79e 100644
--- a/src/helper/replacements.h
+++ b/src/helper/replacements.h
@@ -241,10 +241,8 @@ static inline int socket_select(int max_fd,
 typedef uint32_t Elf32_Addr;
 typedef uint16_t Elf32_Half;
 typedef uint32_t Elf32_Off;
-typedef int32_t Elf32_Sword;
 typedef uint32_t Elf32_Word;
 typedef uint32_t Elf32_Size;
-typedef Elf32_Off Elf32_Hashelt;
 
 #define EI_NIDENT   16
 

commit 565129119f0dc345a6e7d16bb468ff15cb3b828d
Author: Christian Hoff <chr...@ad...>
Date:   Tue Apr 20 19:14:30 2021 +0200

    target/image: report error if ELF file contains no loadable sections
    
    The existing code asserted in that case, which is not correct. This
    would allow the user to crash OpenOCD with a bad ELF file, which is
    not what we want. A proper error should be reported in that case and
    OpenOCD should not crash.
    
    Change-Id: Ied5a6a6fd4ee0fd163f3fe850d304a121ecbe33a
    Signed-off-by: Christian Hoff <chr...@ad...>
    Reviewed-on: http://openocd.zylin.com/6172
    Reviewed-by: Jonathan McDowell <noo...@ea...>
    Tested-by: jenkins
    Reviewed-by: Tomas Vanek <va...@fb...>
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/src/target/image.c b/src/target/image.c
index 9608375a5..8f72329bd 100644
--- a/src/target/image.c
+++ b/src/target/image.c
@@ -426,7 +426,10 @@ static int image_elf32_read_headers(struct image *image)
 			(field32(elf, elf->segments32[i].p_filesz) != 0))
 			image->num_sections++;
 
-	assert(image->num_sections > 0);
+	if (image->num_sections == 0) {
+		LOG_ERROR("invalid ELF file, no loadable segments");
+		return ERROR_IMAGE_FORMAT_ERROR;
+	}
 
 	/**
 	 * some ELF linkers produce binaries with *all* the program header
@@ -548,7 +551,10 @@ static int image_elf64_read_headers(struct image *image)
 			(field64(elf, elf->segments64[i].p_filesz) != 0))
 			image->num_sections++;
 
-	assert(image->num_sections > 0);
+	if (image->num_sections == 0) {
+		LOG_ERROR("invalid ELF file, no loadable segments");
+		return ERROR_IMAGE_FORMAT_ERROR;
+	}
 
 	/**
 	 * some ELF linkers produce binaries with *all* the program header

-----------------------------------------------------------------------

Summary of changes:
 src/helper/jim-nvp.c      |  6 ------
 src/helper/replacements.h |  2 --
 src/helper/types.h        |  8 +-------
 src/target/image.c        | 10 ++++++++--
 4 files changed, 9 insertions(+), 17 deletions(-)


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- Log -----------------------------------------------------------------
commit 9206bd243b0b594821ca96b37517b2e3de80dc39
Author: Florian Meister <flo...@ad...>
Date:   Wed Jun 5 10:19:52 2019 +0200

    target/image: allow loading of 64-bit ELF files
    
    Change-Id: I9b88edacf5ffcc3c1caeab8c426693de0d92a695
    Signed-off-by: Florian Meister <flo...@ad...>
    Signed-off-by: Christian Hoff <chr...@ad...>
    Reviewed-on: http://openocd.zylin.com/5204
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Reviewed-by: Ooi, Cinly <cin...@in...>
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/configure.ac b/configure.ac
index 5c7dab570..979bb161b 100644
--- a/configure.ac
+++ b/configure.ac
@@ -49,6 +49,9 @@ AC_SEARCH_LIBS([openpty], [util])
 
 AC_CHECK_HEADERS([sys/socket.h])
 AC_CHECK_HEADERS([elf.h])
+AC_EGREP_HEADER(Elf64_Ehdr, [elf.h], [
+  AC_DEFINE([HAVE_ELF64], [1], [Define to 1 if the system has the type `Elf64_Ehdr'.])
+])
 AC_CHECK_HEADERS([dirent.h])
 AC_CHECK_HEADERS([fcntl.h])
 AC_CHECK_HEADERS([malloc.h])
diff --git a/src/helper/replacements.h b/src/helper/replacements.h
index ac5009549..fff2dde0e 100644
--- a/src/helper/replacements.h
+++ b/src/helper/replacements.h
@@ -246,8 +246,10 @@ typedef uint32_t Elf32_Word;
 typedef uint32_t Elf32_Size;
 typedef Elf32_Off Elf32_Hashelt;
 
+#define EI_NIDENT   16
+
 typedef struct {
-	unsigned char e_ident[16];	/* Magic number and other info */
+	unsigned char e_ident[EI_NIDENT];	/* Magic number and other info */
 	Elf32_Half e_type;			/* Object file type */
 	Elf32_Half e_machine;			/* Architecture */
 	Elf32_Word e_version;			/* Object file version */
@@ -289,6 +291,44 @@ typedef struct {
 
 #endif	/* HAVE_ELF_H */
 
+#ifndef HAVE_ELF64
+
+typedef uint64_t Elf64_Addr;
+typedef uint16_t Elf64_Half;
+typedef uint64_t Elf64_Off;
+typedef uint32_t Elf64_Word;
+typedef uint64_t Elf64_Xword;
+
+typedef struct {
+	unsigned char e_ident[EI_NIDENT];	/* Magic number and other info */
+	Elf64_Half e_type;			/* Object file type */
+	Elf64_Half e_machine;		/* Architecture */
+	Elf64_Word e_version;		/* Object file version */
+	Elf64_Addr e_entry;			/* Entry point virtual address */
+	Elf64_Off e_phoff;			/* Program header table file offset */
+	Elf64_Off e_shoff;			/* Section header table file offset */
+	Elf64_Word e_flags;			/* Processor-specific flags */
+	Elf64_Half e_ehsize;		/* ELF header size in bytes */
+	Elf64_Half e_phentsize;		/* Program header table entry size */
+	Elf64_Half e_phnum;			/* Program header table entry count */
+	Elf64_Half e_shentsize;		/* Section header table entry size */
+	Elf64_Half e_shnum;			/* Section header table entry count */
+	Elf64_Half e_shstrndx;		/* Section header string table index */
+} Elf64_Ehdr;
+
+typedef struct {
+	Elf64_Word p_type;		/* Segment type */
+	Elf64_Word p_flags;		/* Segment flags */
+	Elf64_Off p_offset;		/* Segment file offset */
+	Elf64_Addr p_vaddr;		/* Segment virtual address */
+	Elf64_Addr p_paddr;		/* Segment physical address */
+	Elf64_Xword p_filesz;	/* Segment size in file */
+	Elf64_Xword p_memsz;	/* Segment size in memory */
+	Elf64_Xword p_align;	/* Segment alignment */
+} Elf64_Phdr;
+
+#endif /* HAVE_ELF64 */
+
 #if defined HAVE_LIBUSB1 && !defined HAVE_LIBUSB_ERROR_NAME
 const char *libusb_error_name(int error_code);
 #endif /* defined HAVE_LIBUSB1 && !defined HAVE_LIBUSB_ERROR_NAME */
diff --git a/src/target/image.c b/src/target/image.c
index e63cd0f9c..9608375a5 100644
--- a/src/target/image.c
+++ b/src/target/image.c
@@ -11,6 +11,9 @@
  *   Copyright (C) 2009 by Franck Hereson                                  *
  *   fra...@se...                                               *
  *                                                                         *
+ *   Copyright (C) 2018 by Advantest                                       *
+ *   flo...@ad...                                         *
+ *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
  *   the Free Software Foundation; either version 2 of the License, or     *
@@ -42,6 +45,10 @@
 	((elf->endianness == ELFDATA2LSB) ? \
 	le_to_h_u32((uint8_t *)&field) : be_to_h_u32((uint8_t *)&field))
 
+#define field64(elf, field) \
+	((elf->endianness == ELFDATA2LSB) ? \
+	le_to_h_u64((uint8_t *)&field) : be_to_h_u64((uint8_t *)&field))
+
 static int autodetect_image_type(struct image *image, const char *url)
 {
 	int retval;
@@ -49,7 +56,7 @@ static int autodetect_image_type(struct image *image, const char *url)
 	size_t read_bytes;
 	uint8_t buffer[9];
 
-	/* read the first 4 bytes of image */
+	/* read the first 9 bytes of image */
 	retval = fileio_open(&fileio, url, FILEIO_READ, FILEIO_BINARY);
 	if (retval != ERROR_OK)
 		return retval;
@@ -350,22 +357,29 @@ static int image_ihex_buffer_complete(struct image *image)
 	return retval;
 }
 
-static int image_elf_read_headers(struct image *image)
+static int image_elf32_read_headers(struct image *image)
 {
 	struct image_elf *elf = image->type_private;
 	size_t read_bytes;
 	uint32_t i, j;
 	int retval;
-	uint32_t nload, load_to_vaddr = 0;
+	uint32_t nload;
+	bool load_to_vaddr = false;
+
+	retval = fileio_seek(elf->fileio, 0);
+	if (retval != ERROR_OK) {
+		LOG_ERROR("cannot seek to ELF file header, read failed");
+		return retval;
+	}
 
-	elf->header = malloc(sizeof(Elf32_Ehdr));
+	elf->header32 = malloc(sizeof(Elf32_Ehdr));
 
-	if (elf->header == NULL) {
-		LOG_ERROR("insufficient memory to perform operation ");
+	if (elf->header32 == NULL) {
+		LOG_ERROR("insufficient memory to perform operation");
 		return ERROR_FILEIO_OPERATION_FAILED;
 	}
 
-	retval = fileio_read(elf->fileio, sizeof(Elf32_Ehdr), (uint8_t *)elf->header, &read_bytes);
+	retval = fileio_read(elf->fileio, sizeof(Elf32_Ehdr), (uint8_t *)elf->header32, &read_bytes);
 	if (retval != ERROR_OK) {
 		LOG_ERROR("cannot read ELF file header, read failed");
 		return ERROR_FILEIO_OPERATION_FAILED;
@@ -375,47 +389,153 @@ static int image_elf_read_headers(struct image *image)
 		return ERROR_FILEIO_OPERATION_FAILED;
 	}
 
-	if (strncmp((char *)elf->header->e_ident, ELFMAG, SELFMAG) != 0) {
-		LOG_ERROR("invalid ELF file, bad magic number");
+	elf->segment_count = field16(elf, elf->header32->e_phnum);
+	if (elf->segment_count == 0) {
+		LOG_ERROR("invalid ELF file, no program headers");
 		return ERROR_IMAGE_FORMAT_ERROR;
 	}
-	if (elf->header->e_ident[EI_CLASS] != ELFCLASS32) {
-		LOG_ERROR("invalid ELF file, only 32bits files are supported");
-		return ERROR_IMAGE_FORMAT_ERROR;
+
+	retval = fileio_seek(elf->fileio, field32(elf, elf->header32->e_phoff));
+	if (retval != ERROR_OK) {
+		LOG_ERROR("cannot seek to ELF program header table, read failed");
+		return retval;
 	}
 
-	elf->endianness = elf->header->e_ident[EI_DATA];
-	if ((elf->endianness != ELFDATA2LSB)
-		&& (elf->endianness != ELFDATA2MSB)) {
-		LOG_ERROR("invalid ELF file, unknown endianness setting");
-		return ERROR_IMAGE_FORMAT_ERROR;
+	elf->segments32 = malloc(elf->segment_count*sizeof(Elf32_Phdr));
+	if (elf->segments32 == NULL) {
+		LOG_ERROR("insufficient memory to perform operation");
+		return ERROR_FILEIO_OPERATION_FAILED;
+	}
+
+	retval = fileio_read(elf->fileio, elf->segment_count*sizeof(Elf32_Phdr),
+			(uint8_t *)elf->segments32, &read_bytes);
+	if (retval != ERROR_OK) {
+		LOG_ERROR("cannot read ELF segment headers, read failed");
+		return retval;
+	}
+	if (read_bytes != elf->segment_count*sizeof(Elf32_Phdr)) {
+		LOG_ERROR("cannot read ELF segment headers, only partially read");
+		return ERROR_FILEIO_OPERATION_FAILED;
+	}
+
+	/* count useful segments (loadable), ignore BSS section */
+	image->num_sections = 0;
+	for (i = 0; i < elf->segment_count; i++)
+		if ((field32(elf,
+			elf->segments32[i].p_type) == PT_LOAD) &&
+			(field32(elf, elf->segments32[i].p_filesz) != 0))
+			image->num_sections++;
+
+	assert(image->num_sections > 0);
+
+	/**
+	 * some ELF linkers produce binaries with *all* the program header
+	 * p_paddr fields zero (there can be however one loadable segment
+	 * that has valid physical address 0x0).
+	 * If we have such a binary with more than
+	 * one PT_LOAD header, then use p_vaddr instead of p_paddr
+	 * (ARM ELF standard demands p_paddr = 0 anyway, and BFD
+	 * library uses this approach to workaround zero-initialized p_paddrs
+	 * when obtaining lma - look at elf.c of BDF)
+	 */
+	for (nload = 0, i = 0; i < elf->segment_count; i++)
+		if (elf->segments32[i].p_paddr != 0)
+			break;
+		else if ((field32(elf,
+			elf->segments32[i].p_type) == PT_LOAD) &&
+			(field32(elf, elf->segments32[i].p_memsz) != 0))
+			++nload;
+
+	if (i >= elf->segment_count && nload > 1)
+		load_to_vaddr = true;
+
+	/* alloc and fill sections array with loadable segments */
+	image->sections = malloc(image->num_sections * sizeof(struct imagesection));
+	if (image->sections == NULL) {
+		LOG_ERROR("insufficient memory to perform operation");
+		return ERROR_FILEIO_OPERATION_FAILED;
+	}
+
+	for (i = 0, j = 0; i < elf->segment_count; i++) {
+		if ((field32(elf,
+			elf->segments32[i].p_type) == PT_LOAD) &&
+			(field32(elf, elf->segments32[i].p_filesz) != 0)) {
+			image->sections[j].size = field32(elf, elf->segments32[i].p_filesz);
+			if (load_to_vaddr)
+				image->sections[j].base_address = field32(elf,
+						elf->segments32[i].p_vaddr);
+			else
+				image->sections[j].base_address = field32(elf,
+						elf->segments32[i].p_paddr);
+			image->sections[j].private = &elf->segments32[i];
+			image->sections[j].flags = field32(elf, elf->segments32[i].p_flags);
+			j++;
+		}
+	}
+
+	image->start_address_set = true;
+	image->start_address = field32(elf, elf->header32->e_entry);
+
+	return ERROR_OK;
+}
+
+static int image_elf64_read_headers(struct image *image)
+{
+	struct image_elf *elf = image->type_private;
+	size_t read_bytes;
+	uint32_t i, j;
+	int retval;
+	uint32_t nload;
+	bool load_to_vaddr = false;
+
+	retval = fileio_seek(elf->fileio, 0);
+	if (retval != ERROR_OK) {
+		LOG_ERROR("cannot seek to ELF file header, read failed");
+		return retval;
+	}
+
+	elf->header64 = malloc(sizeof(Elf64_Ehdr));
+
+	if (elf->header64 == NULL) {
+		LOG_ERROR("insufficient memory to perform operation");
+		return ERROR_FILEIO_OPERATION_FAILED;
+	}
+
+	retval = fileio_read(elf->fileio, sizeof(Elf64_Ehdr), (uint8_t *)elf->header64, &read_bytes);
+	if (retval != ERROR_OK) {
+		LOG_ERROR("cannot read ELF file header, read failed");
+		return ERROR_FILEIO_OPERATION_FAILED;
+	}
+	if (read_bytes != sizeof(Elf64_Ehdr)) {
+		LOG_ERROR("cannot read ELF file header, only partially read");
+		return ERROR_FILEIO_OPERATION_FAILED;
 	}
 
-	elf->segment_count = field16(elf, elf->header->e_phnum);
+	elf->segment_count = field16(elf, elf->header64->e_phnum);
 	if (elf->segment_count == 0) {
 		LOG_ERROR("invalid ELF file, no program headers");
 		return ERROR_IMAGE_FORMAT_ERROR;
 	}
 
-	retval = fileio_seek(elf->fileio, field32(elf, elf->header->e_phoff));
+	retval = fileio_seek(elf->fileio, field64(elf, elf->header64->e_phoff));
 	if (retval != ERROR_OK) {
 		LOG_ERROR("cannot seek to ELF program header table, read failed");
 		return retval;
 	}
 
-	elf->segments = malloc(elf->segment_count*sizeof(Elf32_Phdr));
-	if (elf->segments == NULL) {
-		LOG_ERROR("insufficient memory to perform operation ");
+	elf->segments64 = malloc(elf->segment_count*sizeof(Elf64_Phdr));
+	if (elf->segments64 == NULL) {
+		LOG_ERROR("insufficient memory to perform operation");
 		return ERROR_FILEIO_OPERATION_FAILED;
 	}
 
-	retval = fileio_read(elf->fileio, elf->segment_count*sizeof(Elf32_Phdr),
-			(uint8_t *)elf->segments, &read_bytes);
+	retval = fileio_read(elf->fileio, elf->segment_count*sizeof(Elf64_Phdr),
+			(uint8_t *)elf->segments64, &read_bytes);
 	if (retval != ERROR_OK) {
 		LOG_ERROR("cannot read ELF segment headers, read failed");
 		return retval;
 	}
-	if (read_bytes != elf->segment_count*sizeof(Elf32_Phdr)) {
+	if (read_bytes != elf->segment_count*sizeof(Elf64_Phdr)) {
 		LOG_ERROR("cannot read ELF segment headers, only partially read");
 		return ERROR_FILEIO_OPERATION_FAILED;
 	}
@@ -424,8 +544,8 @@ static int image_elf_read_headers(struct image *image)
 	image->num_sections = 0;
 	for (i = 0; i < elf->segment_count; i++)
 		if ((field32(elf,
-			elf->segments[i].p_type) == PT_LOAD) &&
-			(field32(elf, elf->segments[i].p_filesz) != 0))
+			elf->segments64[i].p_type) == PT_LOAD) &&
+			(field64(elf, elf->segments64[i].p_filesz) != 0))
 			image->num_sections++;
 
 	assert(image->num_sections > 0);
@@ -441,44 +561,95 @@ static int image_elf_read_headers(struct image *image)
 	 * when obtaining lma - look at elf.c of BDF)
 	 */
 	for (nload = 0, i = 0; i < elf->segment_count; i++)
-		if (elf->segments[i].p_paddr != 0)
+		if (elf->segments64[i].p_paddr != 0)
 			break;
 		else if ((field32(elf,
-			elf->segments[i].p_type) == PT_LOAD) &&
-			(field32(elf, elf->segments[i].p_memsz) != 0))
+			elf->segments64[i].p_type) == PT_LOAD) &&
+			(field64(elf, elf->segments64[i].p_memsz) != 0))
 			++nload;
 
 	if (i >= elf->segment_count && nload > 1)
-		load_to_vaddr = 1;
+		load_to_vaddr = true;
 
 	/* alloc and fill sections array with loadable segments */
 	image->sections = malloc(image->num_sections * sizeof(struct imagesection));
+	if (image->sections == NULL) {
+		LOG_ERROR("insufficient memory to perform operation");
+		return ERROR_FILEIO_OPERATION_FAILED;
+	}
+
 	for (i = 0, j = 0; i < elf->segment_count; i++) {
 		if ((field32(elf,
-			elf->segments[i].p_type) == PT_LOAD) &&
-			(field32(elf, elf->segments[i].p_filesz) != 0)) {
-			image->sections[j].size = field32(elf, elf->segments[i].p_filesz);
+			elf->segments64[i].p_type) == PT_LOAD) &&
+			(field64(elf, elf->segments64[i].p_filesz) != 0)) {
+			image->sections[j].size = field64(elf, elf->segments64[i].p_filesz);
 			if (load_to_vaddr)
-				image->sections[j].base_address = field32(elf,
-						elf->segments[i].p_vaddr);
+				image->sections[j].base_address = field64(elf,
+						elf->segments64[i].p_vaddr);
 			else
-				image->sections[j].base_address = field32(elf,
-						elf->segments[i].p_paddr);
-			image->sections[j].private = &elf->segments[i];
-			image->sections[j].flags = field32(elf, elf->segments[i].p_flags);
+				image->sections[j].base_address = field64(elf,
+						elf->segments64[i].p_paddr);
+			image->sections[j].private = &elf->segments64[i];
+			image->sections[j].flags = field32(elf, elf->segments64[i].p_flags);
 			j++;
 		}
 	}
 
 	image->start_address_set = true;
-	image->start_address = field32(elf, elf->header->e_entry);
+	image->start_address = field64(elf, elf->header64->e_entry);
 
 	return ERROR_OK;
 }
 
-static int image_elf_read_section(struct image *image,
+static int image_elf_read_headers(struct image *image)
+{
+	struct image_elf *elf = image->type_private;
+	size_t read_bytes;
+	unsigned char e_ident[EI_NIDENT];
+	int retval;
+
+	retval = fileio_read(elf->fileio, EI_NIDENT, e_ident, &read_bytes);
+	if (retval != ERROR_OK) {
+		LOG_ERROR("cannot read ELF file header, read failed");
+		return ERROR_FILEIO_OPERATION_FAILED;
+	}
+	if (read_bytes != EI_NIDENT) {
+		LOG_ERROR("cannot read ELF file header, only partially read");
+		return ERROR_FILEIO_OPERATION_FAILED;
+	}
+
+	if (strncmp((char *)e_ident, ELFMAG, SELFMAG) != 0) {
+		LOG_ERROR("invalid ELF file, bad magic number");
+		return ERROR_IMAGE_FORMAT_ERROR;
+	}
+
+	elf->endianness = e_ident[EI_DATA];
+	if ((elf->endianness != ELFDATA2LSB)
+		&& (elf->endianness != ELFDATA2MSB)) {
+		LOG_ERROR("invalid ELF file, unknown endianness setting");
+		return ERROR_IMAGE_FORMAT_ERROR;
+	}
+
+	switch (e_ident[EI_CLASS]) {
+	case ELFCLASS32:
+		LOG_DEBUG("ELF32 image detected.");
+		elf->is_64_bit = false;
+		return image_elf32_read_headers(image);
+
+	case ELFCLASS64:
+		LOG_DEBUG("ELF64 image detected.");
+		elf->is_64_bit = true;
+		return image_elf64_read_headers(image);
+
+	default:
+		LOG_ERROR("invalid ELF file, only 32/64 bit ELF files are supported");
+		return ERROR_IMAGE_FORMAT_ERROR;
+	}
+}
+
+static int image_elf32_read_section(struct image *image,
 	int section,
-	uint32_t offset,
+	target_addr_t offset,
 	uint32_t size,
 	uint8_t *buffer,
 	size_t *size_read)
@@ -490,13 +661,13 @@ static int image_elf_read_section(struct image *image,
 
 	*size_read = 0;
 
-	LOG_DEBUG("load segment %d at 0x%" PRIx32 " (sz = 0x%" PRIx32 ")", section, offset, size);
+	LOG_DEBUG("load segment %d at 0x%" TARGET_PRIxADDR " (sz = 0x%" PRIx32 ")", section, offset, size);
 
 	/* read initialized data in current segment if any */
 	if (offset < field32(elf, segment->p_filesz)) {
 		/* maximal size present in file for the current segment */
 		read_size = MIN(size, field32(elf, segment->p_filesz) - offset);
-		LOG_DEBUG("read elf: size = 0x%zx at 0x%" PRIx32 "", read_size,
+		LOG_DEBUG("read elf: size = 0x%zx at 0x%" TARGET_PRIxADDR "", read_size,
 			field32(elf, segment->p_offset) + offset);
 		/* read initialized area of the segment */
 		retval = fileio_seek(elf->fileio, field32(elf, segment->p_offset) + offset);
@@ -519,6 +690,64 @@ static int image_elf_read_section(struct image *image,
 	return ERROR_OK;
 }
 
+static int image_elf64_read_section(struct image *image,
+	int section,
+	target_addr_t offset,
+	uint32_t size,
+	uint8_t *buffer,
+	size_t *size_read)
+{
+	struct image_elf *elf = image->type_private;
+	Elf64_Phdr *segment = (Elf64_Phdr *)image->sections[section].private;
+	size_t read_size, really_read;
+	int retval;
+
+	*size_read = 0;
+
+	LOG_DEBUG("load segment %d at 0x%" TARGET_PRIxADDR " (sz = 0x%" PRIx32 ")", section, offset, size);
+
+	/* read initialized data in current segment if any */
+	if (offset < field64(elf, segment->p_filesz)) {
+		/* maximal size present in file for the current segment */
+		read_size = MIN(size, field64(elf, segment->p_filesz) - offset);
+		LOG_DEBUG("read elf: size = 0x%zx at 0x%" TARGET_PRIxADDR "", read_size,
+			field64(elf, segment->p_offset) + offset);
+		/* read initialized area of the segment */
+		retval = fileio_seek(elf->fileio, field64(elf, segment->p_offset) + offset);
+		if (retval != ERROR_OK) {
+			LOG_ERROR("cannot find ELF segment content, seek failed");
+			return retval;
+		}
+		retval = fileio_read(elf->fileio, read_size, buffer, &really_read);
+		if (retval != ERROR_OK) {
+			LOG_ERROR("cannot read ELF segment content, read failed");
+			return retval;
+		}
+		size -= read_size;
+		*size_read += read_size;
+		/* need more data ? */
+		if (!size)
+			return ERROR_OK;
+	}
+
+	return ERROR_OK;
+}
+
+static int image_elf_read_section(struct image *image,
+	int section,
+	target_addr_t offset,
+	uint32_t size,
+	uint8_t *buffer,
+	size_t *size_read)
+{
+	struct image_elf *elf = image->type_private;
+
+	if (elf->is_64_bit)
+		return image_elf64_read_section(image, section, offset, size, buffer, size_read);
+	else
+		return image_elf32_read_section(image, section, offset, size, buffer, size_read);
+}
+
 static int image_mot_buffer_complete_inner(struct image *image,
 	char *lpszLine,
 	struct imagesection *section)
@@ -840,7 +1069,7 @@ int image_open(struct image *image, const char *url, const char *type_string)
 
 int image_read_section(struct image *image,
 	int section,
-	uint32_t offset,
+	target_addr_t offset,
 	uint32_t size,
 	uint8_t *buffer,
 	size_t *size_read)
@@ -850,7 +1079,7 @@ int image_read_section(struct image *image,
 	/* don't read past the end of a section */
 	if (offset + size > image->sections[section].size) {
 		LOG_DEBUG(
-			"read past end of section: 0x%8.8" PRIx32 " + 0x%8.8" PRIx32 " > 0x%8.8" PRIx32 "",
+			"read past end of section: 0x%8.8" TARGET_PRIxADDR " + 0x%8.8" PRIx32 " > 0x%8.8" PRIx32 "",
 			offset,
 			size,
 			image->sections[section].size);
@@ -878,9 +1107,9 @@ int image_read_section(struct image *image,
 		*size_read = size;
 
 		return ERROR_OK;
-	} else if (image->type == IMAGE_ELF)
+	} else if (image->type == IMAGE_ELF) {
 		return image_elf_read_section(image, section, offset, size, buffer, size_read);
-	else if (image->type == IMAGE_MEMORY) {
+	} else if (image->type == IMAGE_MEMORY) {
 		struct image_memory *image_memory = image->type_private;
 		uint32_t address = image->sections[section].base_address + offset;
 
@@ -933,7 +1162,7 @@ int image_read_section(struct image *image,
 	return ERROR_OK;
 }
 
-int image_add_section(struct image *image, uint32_t base, uint32_t size, int flags, uint8_t const *data)
+int image_add_section(struct image *image, target_addr_t base, uint32_t size, int flags, uint8_t const *data)
 {
 	struct imagesection *section;
 
@@ -988,11 +1217,19 @@ void image_close(struct image *image)
 
 		fileio_close(image_elf->fileio);
 
-		free(image_elf->header);
-		image_elf->header = NULL;
+		if (image_elf->is_64_bit) {
+			free(image_elf->header64);
+			image_elf->header64 = NULL;
 
-		free(image_elf->segments);
-		image_elf->segments = NULL;
+			free(image_elf->segments64);
+			image_elf->segments64 = NULL;
+		} else {
+			free(image_elf->header32);
+			image_elf->header32 = NULL;
+
+			free(image_elf->segments32);
+			image_elf->segments32 = NULL;
+		}
 	} else if (image->type == IMAGE_MEMORY) {
 		struct image_memory *image_memory = image->type_private;
 
diff --git a/src/target/image.h b/src/target/image.h
index 53c27d812..c8d00d1d7 100644
--- a/src/target/image.h
+++ b/src/target/image.h
@@ -8,6 +8,9 @@
  *   Copyright (C) 2008 by Spencer Oliver                                  *
  *   sp...@sp...                                                  *
  *                                                                         *
+ *   Copyright (C) 2018 by Advantest                                       *
+ *   flo...@ad...                                         *
+ *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
  *   the Free Software Foundation; either version 2 of the License, or     *
@@ -80,8 +83,15 @@ struct image_memory {
 
 struct image_elf {
 	struct fileio *fileio;
-	Elf32_Ehdr *header;
-	Elf32_Phdr *segments;
+	bool is_64_bit;
+	union {
+		Elf32_Ehdr *header32;
+		Elf64_Ehdr *header64;
+	};
+	union {
+		Elf32_Phdr *segments32;
+		Elf64_Phdr *segments64;
+	};
 	uint32_t segment_count;
 	uint8_t endianness;
 };
@@ -92,11 +102,11 @@ struct image_mot {
 };
 
 int image_open(struct image *image, const char *url, const char *type_string);
-int image_read_section(struct image *image, int section, uint32_t offset,
+int image_read_section(struct image *image, int section, target_addr_t offset,
 		uint32_t size, uint8_t *buffer, size_t *size_read);
 void image_close(struct image *image);
 
-int image_add_section(struct image *image, uint32_t base, uint32_t size,
+int image_add_section(struct image *image, target_addr_t base, uint32_t size,
 		int flags, uint8_t const *data);
 
 int image_calculate_checksum(const uint8_t *buffer, uint32_t nbytes,

commit 11d918d9c1f7cb637a525a92521b747d2d4c840f
Author: Antonio Borneo <bor...@gm...>
Date:   Wed Apr 14 23:44:57 2021 +0200

    libusb: don't use typedef's
    
    Libusb defines both the struct and a typedef to the struct using
    the same struct name. It's then possible to use either 'struct x'
    and 'x'. E.g.:
            typedef struct libusb_device libusb_device;
    
    OpenOCD is not consistent and uses a mix of 'struct x' and 'x'.
    
    To make OpenOCD code uniform, stick at project's coding style and
    use 'struct x' in place of the typedef'd name.
    
    Change-Id: I901458b680e42830d3f371e47997157f91b7f675
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: http://openocd.zylin.com/6165
    Tested-by: jenkins
    Reviewed-by: Jonathan McDowell <noo...@ea...>
    Reviewed-by: Marc Schink <de...@za...>
    Reviewed-by: Tomas Vanek <va...@fb...>

diff --git a/src/jtag/aice/aice_usb.c b/src/jtag/aice/aice_usb.c
index 7688aeaab..0c219805f 100644
--- a/src/jtag/aice/aice_usb.c
+++ b/src/jtag/aice/aice_usb.c
@@ -349,8 +349,8 @@ static void aice_unpack_dthmb(uint8_t *cmd_ack_code, uint8_t *target_id,
 /* calls the given usb_bulk_* function, allowing for the data to
  * trickle in with some timeouts  */
 static int usb_bulk_with_retries(
-			int (*f)(libusb_device_handle *, int, char *, int, int, int *),
-			libusb_device_handle *dev, int ep,
+			int (*f)(struct libusb_device_handle *, int, char *, int, int, int *),
+			struct libusb_device_handle *dev, int ep,
 			char *bytes, int size, int timeout, int *transferred)
 {
 	int tries = 3, count = 0;
@@ -369,7 +369,7 @@ static int usb_bulk_with_retries(
 	return ERROR_OK;
 }
 
-static int wrap_usb_bulk_write(libusb_device_handle *dev, int ep,
+static int wrap_usb_bulk_write(struct libusb_device_handle *dev, int ep,
 		char *buff, int size, int timeout, int *transferred)
 {
 
@@ -379,7 +379,7 @@ static int wrap_usb_bulk_write(libusb_device_handle *dev, int ep,
 	return 0;
 }
 
-static inline int usb_bulk_write_ex(libusb_device_handle *dev, int ep,
+static inline int usb_bulk_write_ex(struct libusb_device_handle *dev, int ep,
 		char *bytes, int size, int timeout)
 {
 	int tr = 0;
diff --git a/src/jtag/drivers/cmsis_dap_usb_bulk.c b/src/jtag/drivers/cmsis_dap_usb_bulk.c
index c9ee53d2e..f535119f3 100644
--- a/src/jtag/drivers/cmsis_dap_usb_bulk.c
+++ b/src/jtag/drivers/cmsis_dap_usb_bulk.c
@@ -41,8 +41,8 @@
 #include "cmsis_dap.h"
 
 struct cmsis_dap_backend_data {
-	libusb_context *usb_ctx;
-	libusb_device_handle *dev_handle;
+	struct libusb_context *usb_ctx;
+	struct libusb_device_handle *dev_handle;
 	unsigned int ep_out;
 	unsigned int ep_in;
 	int interface;
@@ -56,8 +56,8 @@ static int cmsis_dap_usb_alloc(struct cmsis_dap *dap, unsigned int pkt_sz);
 static int cmsis_dap_usb_open(struct cmsis_dap *dap, uint16_t vids[], uint16_t pids[], char *serial)
 {
 	int err;
-	libusb_context *ctx;
-	libusb_device **device_list;
+	struct libusb_context *ctx;
+	struct libusb_device **device_list;
 
 	err = libusb_init(&ctx);
 	if (err) {
@@ -73,7 +73,7 @@ static int cmsis_dap_usb_open(struct cmsis_dap *dap, uint16_t vids[], uint16_t p
 	}
 
 	for (int i = 0; i < num_devices; i++) {
-		libusb_device *dev = device_list[i];
+		struct libusb_device *dev = device_list[i];
 		struct libusb_device_descriptor dev_desc;
 
 		err = libusb_get_device_descriptor(dev, &dev_desc);
@@ -101,7 +101,7 @@ static int cmsis_dap_usb_open(struct cmsis_dap *dap, uint16_t vids[], uint16_t p
 		if (dev_desc.iSerialNumber == 0 && serial && serial[0])
 			continue;
 
-		libusb_device_handle *dev_handle = NULL;
+		struct libusb_device_handle *dev_handle = NULL;
 		err = libusb_open(dev, &dev_handle);
 		if (err) {
 			/* It's to be expected that most USB devices can't be opened
diff --git a/src/jtag/drivers/libusb_helper.c b/src/jtag/drivers/libusb_helper.c
index 184882abc..f0122d534 100644
--- a/src/jtag/drivers/libusb_helper.c
+++ b/src/jtag/drivers/libusb_helper.c
@@ -31,7 +31,7 @@
 #define MAX_USB_PORTS	7
 
 static struct libusb_context *jtag_libusb_context; /**< Libusb context **/
-static libusb_device **devs; /**< The usb device list **/
+static struct libusb_device **devs; /**< The usb device list **/
 
 static int jtag_libusb_error(int err)
 {
@@ -71,7 +71,7 @@ static bool jtag_libusb_match_ids(struct libusb_device_descriptor *dev_desc,
 }
 
 #ifdef HAVE_LIBUSB_GET_PORT_NUMBERS
-static bool jtag_libusb_location_equal(libusb_device *device)
+static bool jtag_libusb_location_equal(struct libusb_device *device)
 {
 	uint8_t port_path[MAX_USB_PORTS];
 	uint8_t dev_bus;
@@ -88,7 +88,7 @@ static bool jtag_libusb_location_equal(libusb_device *device)
 	return jtag_usb_location_equal(dev_bus, port_path, path_len);
 }
 #else /* HAVE_LIBUSB_GET_PORT_NUMBERS */
-static bool jtag_libusb_location_equal(libusb_device *device)
+static bool jtag_libusb_location_equal(struct libusb_device *device)
 {
 	return true;
 }
@@ -96,7 +96,7 @@ static bool jtag_libusb_location_equal(libusb_device *device)
 
 
 /* Returns true if the string descriptor indexed by str_index in device matches string */
-static bool string_descriptor_equal(libusb_device_handle *device, uint8_t str_index,
+static bool string_descriptor_equal(struct libusb_device_handle *device, uint8_t str_index,
 									const char *string)
 {
 	int retval;
@@ -123,7 +123,7 @@ static bool string_descriptor_equal(libusb_device_handle *device, uint8_t str_in
 	return matched;
 }
 
-static bool jtag_libusb_match_serial(libusb_device_handle *device,
+static bool jtag_libusb_match_serial(struct libusb_device_handle *device,
 		struct libusb_device_descriptor *dev_desc, const char *serial,
 		adapter_get_alternate_serial_fn adapter_get_alternate_serial)
 {
diff --git a/src/jtag/drivers/libusb_helper.h b/src/jtag/drivers/libusb_helper.h
index 74bb23c52..fa7d06e28 100644
--- a/src/jtag/drivers/libusb_helper.h
+++ b/src/jtag/drivers/libusb_helper.h
@@ -24,7 +24,7 @@
 
 /* this callback should return a non NULL value only when the serial could not
  * be retrieved by the standard 'libusb_get_string_descriptor_ascii' */
-typedef char * (*adapter_get_alternate_serial_fn)(libusb_device_handle *device,
+typedef char * (*adapter_get_alternate_serial_fn)(struct libusb_device_handle *device,
 		struct libusb_device_descriptor *dev_desc);
 
 int jtag_libusb_open(const uint16_t vids[], const uint16_t pids[],
diff --git a/src/jtag/drivers/mpsse.c b/src/jtag/drivers/mpsse.c
index fe8b6b82c..7cda3b816 100644
--- a/src/jtag/drivers/mpsse.c
+++ b/src/jtag/drivers/mpsse.c
@@ -62,8 +62,8 @@
 #define SIO_RESET_PURGE_TX 2
 
 struct mpsse_ctx {
-	libusb_context *usb_ctx;
-	libusb_device_handle *usb_dev;
+	struct libusb_context *usb_ctx;
+	struct libusb_device_handle *usb_dev;
 	unsigned int usb_write_timeout;
 	unsigned int usb_read_timeout;
 	uint8_t in_ep;
@@ -85,7 +85,7 @@ struct mpsse_ctx {
 };
 
 /* Returns true if the string descriptor indexed by str_index in device matches string */
-static bool string_descriptor_equal(libusb_device_handle *device, uint8_t str_index,
+static bool string_descriptor_equal(struct libusb_device_handle *device, uint8_t str_index,
 	const char *string)
 {
 	int retval;
@@ -99,7 +99,7 @@ static bool string_descriptor_equal(libusb_device_handle *device, uint8_t str_in
 	return strncmp(string, desc_string, sizeof(desc_string)) == 0;
 }
 
-static bool device_location_equal(libusb_device *device, const char *location)
+static bool device_location_equal(struct libusb_device *device, const char *location)
 {
 	bool result = false;
 #ifdef HAVE_LIBUSB_GET_PORT_NUMBERS
@@ -161,7 +161,7 @@ static bool device_location_equal(libusb_device *device, const char *location)
 static bool open_matching_device(struct mpsse_ctx *ctx, const uint16_t *vid, const uint16_t *pid,
 	const char *product, const char *serial, const char *location)
 {
-	libusb_device **list;
+	struct libusb_device **list;
 	struct libusb_device_descriptor desc;
 	struct libusb_config_descriptor *config0;
 	int err;
@@ -171,7 +171,7 @@ static bool open_matching_device(struct mpsse_ctx *ctx, const uint16_t *vid, con
 		LOG_ERROR("libusb_get_device_list() failed with %s", libusb_error_name(cnt));
 
 	for (ssize_t i = 0; i < cnt; i++) {
-		libusb_device *device = list[i];
+		struct libusb_device *device = list[i];
 
 		err = libusb_get_device_descriptor(device, &desc);
 		if (err != LIBUSB_SUCCESS) {
diff --git a/src/jtag/drivers/rlink.c b/src/jtag/drivers/rlink.c
index 006e7c5c7..ad629ca68 100644
--- a/src/jtag/drivers/rlink.c
+++ b/src/jtag/drivers/rlink.c
@@ -96,14 +96,14 @@
 #define ST7_PC_TDO      ST7_PC_IO9
 #define ST7_PA_DBGACK   ST7_PA_IO10
 
-static libusb_device_handle *pHDev;
+static struct libusb_device_handle *pHDev;
 
 /*
  * ep1 commands are up to USB_EP1OUT_SIZE bytes in length.
  * This function takes care of zeroing the unused bytes before sending the packet.
  * Any reply packet is not handled by this function.
  */
-static int ep1_generic_commandl(libusb_device_handle *pHDev_param, size_t length, ...)
+static int ep1_generic_commandl(struct libusb_device_handle *pHDev_param, size_t length, ...)
 {
 	uint8_t usb_buffer[USB_EP1OUT_SIZE];
 	uint8_t *usb_buffer_p;
@@ -143,7 +143,7 @@ static int ep1_generic_commandl(libusb_device_handle *pHDev_param, size_t length
 
 #if 0
 static ssize_t ep1_memory_read(
-	libusb_device_handle *pHDev_param, uint16_t addr,
+	struct libusb_device_handle *pHDev_param, uint16_t addr,
 	size_t length, uint8_t *buffer)
 {
 	uint8_t usb_buffer[USB_EP1OUT_SIZE];
@@ -202,7 +202,7 @@ static ssize_t ep1_memory_read(
 }
 #endif
 
-static ssize_t ep1_memory_write(libusb_device_handle *pHDev_param, uint16_t addr,
+static ssize_t ep1_memory_write(struct libusb_device_handle *pHDev_param, uint16_t addr,
 	size_t length, uint8_t const *buffer)
 {
 	uint8_t usb_buffer[USB_EP1OUT_SIZE];
@@ -258,7 +258,7 @@ static ssize_t ep1_memory_write(libusb_device_handle *pHDev_param, uint16_t addr
 
 
 #if 0
-static ssize_t ep1_memory_writel(libusb_device_handle *pHDev_param, uint16_t addr,
+static ssize_t ep1_memory_writel(struct libusb_device_handle *pHDev_param, uint16_t addr,
 	size_t length, ...)
 {
 	uint8_t buffer[USB_EP1OUT_SIZE - 4];
@@ -295,7 +295,7 @@ static ssize_t ep1_memory_writel(libusb_device_handle *pHDev_param, uint16_t add
 static uint8_t dtc_entry_download;
 
 /* The buffer is specially formatted to represent a valid image to load into the DTC. */
-static int dtc_load_from_buffer(libusb_device_handle *pHDev_param, const uint8_t *buffer,
+static int dtc_load_from_buffer(struct libusb_device_handle *pHDev_param, const uint8_t *buffer,
 		size_t length)
 {
 	struct header_s {
@@ -469,7 +469,7 @@ static int dtc_start_download(void)
 }
 
 static int dtc_run_download(
-	libusb_device_handle *pHDev_param,
+	struct libusb_device_handle *pHDev_param,
 	uint8_t *command_buffer,
 	int command_buffer_size,
 	uint8_t *reply_buffer,
diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c
index a5f8bdff1..a088a83ee 100644
--- a/src/jtag/drivers/stlink_usb.c
+++ b/src/jtag/drivers/stlink_usb.c
@@ -3016,7 +3016,7 @@ static int stlink_close(void *handle)
  *    based on the length (0x1a = 26) we could easily decide if we have to fixup the serial
  *    and then we have just to convert the raw data into printable characters using sprintf
  */
-static char *stlink_usb_get_alternate_serial(libusb_device_handle *device,
+static char *stlink_usb_get_alternate_serial(struct libusb_device_handle *device,
 		struct libusb_device_descriptor *dev_desc)
 {
 	int usb_retval;
diff --git a/src/jtag/drivers/ulink.c b/src/jtag/drivers/ulink.c
index ccc023fb8..096e254fa 100644
--- a/src/jtag/drivers/ulink.c
+++ b/src/jtag/drivers/ulink.c
@@ -266,7 +266,7 @@ static int ulink_usb_open(struct ulink **device)
 {
 	ssize_t num_devices, i;
 	bool found;
-	libusb_device **usb_devices;
+	struct libusb_device **usb_devices;
 	struct libusb_device_descriptor usb_desc;
 	struct libusb_device_handle *usb_device_handle;
 
diff --git a/src/jtag/drivers/versaloon/versaloon.c b/src/jtag/drivers/versaloon/versaloon.c
index b51779500..194a3751c 100644
--- a/src/jtag/drivers/versaloon/versaloon.c
+++ b/src/jtag/drivers/versaloon/versaloon.c
@@ -35,7 +35,7 @@ uint16_t versaloon_buf_size;
 struct versaloon_pending_t versaloon_pending[VERSALOON_MAX_PENDING_NUMBER];
 uint16_t versaloon_pending_idx;
 
-libusb_device_handle *versaloon_usb_device_handle;
+struct libusb_device_handle *versaloon_usb_device_handle;
 static uint32_t versaloon_usb_to = VERSALOON_TIMEOUT;
 
 static RESULT versaloon_init(void);
diff --git a/src/jtag/drivers/versaloon/versaloon.h b/src/jtag/drivers/versaloon/versaloon.h
index 9d92bcaa1..fcf223574 100644
--- a/src/jtag/drivers/versaloon/versaloon.h
+++ b/src/jtag/drivers/versaloon/versaloon.h
@@ -107,6 +107,6 @@ struct versaloon_interface_t {
 };
 
 extern struct versaloon_interface_t versaloon_interface;
-extern libusb_device_handle *versaloon_usb_device_handle;
+extern struct libusb_device_handle *versaloon_usb_device_handle;
 
 #endif /* OPENOCD_JTAG_DRIVERS_VERSALOON_VERSALOON_H */
diff --git a/src/jtag/drivers/vsllink.c b/src/jtag/drivers/vsllink.c
index 9aaed36b7..f08fa9165 100644
--- a/src/jtag/drivers/vsllink.c
+++ b/src/jtag/drivers/vsllink.c
@@ -812,7 +812,7 @@ static int vsllink_check_usb_strings(
 static int vsllink_usb_open(struct vsllink *vsllink)
 {
 	ssize_t num_devices, i;
-	libusb_device **usb_devices;
+	struct libusb_device **usb_devices;
 	struct libusb_device_descriptor usb_desc;
 	struct libusb_device_handle *usb_device_handle;
 	int retval;
@@ -823,7 +823,7 @@ static int vsllink_usb_open(struct vsllink *vsllink)
 		return ERROR_FAIL;
 
 	for (i = 0; i < num_devices; i++) {
-		libusb_device *device = usb_devices[i];
+		struct libusb_device *device = usb_devices[i];
 
 		retval = libusb_get_device_descriptor(device, &usb_desc);
 		if (retval != 0)
diff --git a/src/jtag/drivers/xds110.c b/src/jtag/drivers/xds110.c
index df1ab6529..c49280743 100644
--- a/src/jtag/drivers/xds110.c
+++ b/src/jtag/drivers/xds110.c
@@ -213,8 +213,8 @@ struct scan_result {
 
 struct xds110_info {
 	/* USB connection handles and data buffers */
-	libusb_context *ctx;
-	libusb_device_handle *dev;
+	struct libusb_context *ctx;
+	struct libusb_device_handle *dev;
 	unsigned char read_payload[USB_PAYLOAD_SIZE];
 	unsigned char write_packet[3];
 	unsigned char write_payload[USB_PAYLOAD_SIZE];
@@ -317,9 +317,9 @@ static inline uint16_t xds110_get_u16(uint8_t *buffer)
 
 static bool usb_connect(void)
 {
-	libusb_context *ctx  = NULL;
-	libusb_device **list = NULL;
-	libusb_device_handle *dev  = NULL;
+	struct libusb_context *ctx  = NULL;
+	struct libusb_device **list = NULL;
+	struct libusb_device_handle *dev  = NULL;
 
 	struct libusb_device_descriptor desc;
 

-----------------------------------------------------------------------

Summary of changes:
 configure.ac                           |   3 +
 src/helper/replacements.h              |  42 +++-
 src/jtag/aice/aice_usb.c               |   8 +-
 src/jtag/drivers/cmsis_dap_usb_bulk.c  |  12 +-
 src/jtag/drivers/libusb_helper.c       |  10 +-
 src/jtag/drivers/libusb_helper.h       |   2 +-
 src/jtag/drivers/mpsse.c               |  12 +-
 src/jtag/drivers/rlink.c               |  14 +-
 src/jtag/drivers/stlink_usb.c          |   2 +-
 src/jtag/drivers/ulink.c               |   2 +-
 src/jtag/drivers/versaloon/versaloon.c |   2 +-
 src/jtag/drivers/versaloon/versaloon.h |   2 +-
 src/jtag/drivers/vsllink.c             |   4 +-
 src/jtag/drivers/xds110.c              |  10 +-
 src/target/image.c                     | 345 +++++++++++++++++++++++++++------
 src/target/image.h                     |  18 +-
 16 files changed, 389 insertions(+), 99 deletions(-)


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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.11.0-122-ga60979b06

[OpenOCD-Gerrit <ope...@us...>]

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".

The branch, master has been updated
       via  a60979b069b5964639d87ce268a37078c0fb57bb (commit)
      from  ef0da7944886466bc09386616fa089925be5ac62 (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit a60979b069b5964639d87ce268a37078c0fb57bb
Author: Antonio Borneo <bor...@gm...>
Date:   Mon Apr 26 09:48:25 2021 +0200

    helper/command: fix build with jimtcl 0.79 or older
    
    Commit a7d68878e4ba ("helper/command: unregister commands through
    their full-name") introduces for the first time in OpenOCD the use
    of jimtcl API Jim_DeleteCommand().
    The prototype of Jim_DeleteCommand() has changed with jimtcl 0.80
    and the current code doesn't build with jimtcl 0.79 or older. This
    is an issue for those distributions, like Debian, that provide
    jimtcl as a separate package/library and have not switched yet to
    the new jimtcl version.
    
    Add a compile-time condition to cope with the jimtcl API change.
    
    Change-Id: Ic813ab7c0ebd3c8772f27775ba3912a47d5c275c
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Fixes: a7d68878e4ba ("helper/command: unregister commands through their full-name")
    Reviewed-on: http://openocd.zylin.com/6191
    Tested-by: jenkins

diff --git a/src/helper/command.c b/src/helper/command.c
index 80e297b1f..e703be400 100644
--- a/src/helper/command.c
+++ b/src/helper/command.c
@@ -437,7 +437,11 @@ int unregister_commands_match(struct command_context *cmd_ctx, const char *forma
 			continue;
 		}
 		LOG_DEBUG("delete command \"%s\"", name);
+#if JIM_VERSION >= 80
 		Jim_DeleteCommand(interp, elem);
+#else
+		Jim_DeleteCommand(interp, name);
+#endif
 
 		help_del_command(cmd_ctx, name);
 

-----------------------------------------------------------------------

Summary of changes:
 src/helper/command.c | 4 ++++
 1 file changed, 4 insertions(+)


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